--- /home/fdroid/fdroiddata/tmp/space.celestia.mobilecelestia_562.apk +++ /home/fdroid/fdroiddata/tmp/sigcp_space.celestia.mobilecelestia_562.apk ├── /usr/lib/android-sdk/build-tools/debian/apksigner verify --verbose --print-certs {} │┄ error from `/usr/lib/android-sdk/build-tools/debian/apksigner verify --verbose --print-certs {}` (b): │┄ DOES NOT VERIFY │┄ ERROR: APK Signature Scheme v3 signer #1: APK integrity check failed. CHUNKED_SHA256 digest mismatch. Expected: , actual: <278a299b344d3e1be466a18e5f1e49abffda372dd4f92253a4de9760d1722643> │┄ ERROR: APK Signature Scheme v3 signer #1: APK integrity check failed. VERITY_CHUNKED_SHA256 digest mismatch. Expected: <6ae9c523842e1161809717d7f2478fcb01fcadcd27b7a6195178ed7c2fae6279a8345b1700000000>, actual: <28337366d21af84a030950bfae9ba21210080ed97df40eaaabc69446dbd1b814a8345b1700000000> │ @@ -1,103 +0,0 @@ │ -Verifies │ -Verified using v1 scheme (JAR signing): true │ -Verified using v2 scheme (APK Signature Scheme v2): true │ -Verified using v3 scheme (APK Signature Scheme v3): true │ -Verified using v4 scheme (APK Signature Scheme v4): false │ -Verified for SourceStamp: false │ -Number of signers: 1 │ -Signer #1 certificate DN: CN=FDroid, OU=FDroid, O=fdroid.org, L=ORG, ST=ORG, C=UK │ -Signer #1 certificate SHA-256 digest: 77dd218436a66b04b3cf3f80a0618ca1b851b78bd37e585b73be3e302aedae8b │ -Signer #1 certificate SHA-1 digest: e37cefc65f285384d89ab05f4e640418b5457675 │ -Signer #1 certificate MD5 digest: fc6b677bba104240a6bfba6e16e1b820 │ -Signer #1 key algorithm: RSA │ -Signer #1 key size (bits): 2048 │ -Signer #1 public key SHA-256 digest: 56420afe78230195507481831ffc3b769f99a228ad832fa54e522bfe090628c6 │ -Signer #1 public key SHA-1 digest: 5e4f7a235e4f9a11153e59856929bd2ed568bd45 │ -Signer #1 public key MD5 digest: f783bfcb493593341ba2a8576a00b4ee │ -WARNING: META-INF/com/android/build/gradle/app-metadata.properties not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/version-control-info.textproto not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/NOTICE.md not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/README.md not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.activity_activity-compose.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.activity_activity-ktx.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.activity_activity.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.annotation_annotation-experimental.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.appcompat_appcompat-resources.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.appcompat_appcompat.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.arch.core_core-runtime.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.autofill_autofill.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.cardview_cardview.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.animation_animation-core.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.animation_animation.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.foundation_foundation-layout.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.foundation_foundation.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.material3_material3.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.material_material-icons-core.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.material_material-ripple.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.runtime_runtime-saveable.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.runtime_runtime.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.ui_ui-geometry.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.ui_ui-graphics.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.ui_ui-text.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.ui_ui-unit.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.ui_ui-util.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.compose.ui_ui.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.coordinatorlayout_coordinatorlayout.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.core_core-ktx.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.core_core.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.cursoradapter_cursoradapter.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.customview_customview-poolingcontainer.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.customview_customview.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.documentfile_documentfile.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.drawerlayout_drawerlayout.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.dynamicanimation_dynamicanimation.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.emoji2_emoji2-views-helper.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.emoji2_emoji2.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.fragment_fragment-ktx.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.fragment_fragment.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.graphics_graphics-path.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.hilt_hilt-navigation-compose.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.hilt_hilt-navigation.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.interpolator_interpolator.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.legacy_legacy-support-core-utils.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.lifecycle_lifecycle-livedata-core-ktx.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.lifecycle_lifecycle-livedata-core.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.lifecycle_lifecycle-livedata.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.lifecycle_lifecycle-process.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.lifecycle_lifecycle-runtime-compose.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.lifecycle_lifecycle-runtime-ktx.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.lifecycle_lifecycle-runtime.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.lifecycle_lifecycle-viewmodel-compose.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.lifecycle_lifecycle-viewmodel-ktx.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.lifecycle_lifecycle-viewmodel-savedstate.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.lifecycle_lifecycle-viewmodel.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.loader_loader.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.localbroadcastmanager_localbroadcastmanager.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.navigation_navigation-common-ktx.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.navigation_navigation-common.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.navigation_navigation-compose.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.navigation_navigation-runtime-ktx.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.navigation_navigation-runtime.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.print_print.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.profileinstaller_profileinstaller.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.recyclerview_recyclerview.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.savedstate_savedstate-ktx.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.savedstate_savedstate.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.startup_startup-runtime.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.tracing_tracing.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.transition_transition.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.vectordrawable_vectordrawable-animated.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.vectordrawable_vectordrawable.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.versionedparcelable_versionedparcelable.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.viewpager2_viewpager2.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.viewpager_viewpager.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/androidx.webkit_webkit.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/com.google.android.material_material.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/com.google.dagger_dagger-lint-aar.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/com.google.dagger_dagger.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/com.google.dagger_hilt-android.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/com.google.dagger_hilt-core.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/kotlinx_coroutines_android.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/kotlinx_coroutines_core.version not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/services/kotlinx.coroutines.u not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. │ -WARNING: META-INF/services/s2.a not protected by signature. Unauthorized modifications to this JAR entry will not be detected. Delete or move the entry outside of META-INF/. ├── zipinfo {} │ @@ -1878,8 +1878,8 @@ │ -rw---- 0.0 fat 464 b- defN 81-Jan-01 01:01 res/zq.xml │ -rw---- 0.0 fat 10500 b- stor 81-Jan-01 01:01 res/zr.png │ -rw---- 0.0 fat 884 b- stor 81-Jan-01 01:01 res/zz.png │ -rw---- 0.0 fat 1392552 b- stor 81-Jan-01 01:01 resources.arsc │ -rw---- 2.0 fat 201864 b- defN 81-Jan-01 01:01 META-INF/F7DB8DC7.SF │ -rw---- 2.0 fat 1336 b- defN 81-Jan-01 01:01 META-INF/F7DB8DC7.RSA │ -rw---- 2.0 fat 201737 b- defN 81-Jan-01 01:01 META-INF/MANIFEST.MF │ -1883 files, 558092947 bytes uncompressed, 391576270 bytes compressed: 29.8% │ +1883 files, 558092947 bytes uncompressed, 391576361 bytes compressed: 29.8% ├── lib/armeabi-v7a/libcelestia.so │┄ File has been modified after NT_GNU_BUILD_ID has been applied. │ ├── readelf --wide --notes {} │ │ @@ -1,8 +1,8 @@ │ │ │ │ Displaying notes found in: .note.android.ident │ │ Owner Data size Description │ │ Android 0x00000084 NT_VERSION (version) description data: 17 00 00 00 72 32 37 62 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 31 32 32 39 37 30 30 36 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 │ │ │ │ Displaying notes found in: .note.gnu.build-id │ │ Owner Data size Description │ │ - GNU 0x00000014 NT_GNU_BUILD_ID (unique build ID bitstring) Build ID: a3f9d086d8aa491a921e877e2d0090afbffca864 │ │ + GNU 0x00000014 NT_GNU_BUILD_ID (unique build ID bitstring) Build ID: 683fec4348775348cfa517e56aee9f4f5ad7f02c │ ├── strings --all --bytes=8 {} │ │ @@ -20958,14 +20958,15 @@ │ │ Processing MaterialTransparency chunk │ │ Processing Color24 chunk │ │ Processing ColorFloat chunk │ │ onFatalError │ │ SwappyGL_swap() returned error %d │ │ Renderer thread stopped │ │ Unable to interpret GL_VERSION string: %s │ │ +libjpeg-turbo version 3.0.4 (build 20241210) │ │ Wrong JPEG library version: library is %d, caller expects %d │ │ StemSnapV │ │ DesignVector │ │ ENDPROPERTIES │ │ flip_sign │ │ LUA_NOENV │ │ no module '%s' in file '%s' │ │ @@ -27225,15 +27226,14 @@ │ │ Failed to read material group face array count │ │ Remaining content size {} too small to include material group face array with {} entries │ │ Error reading Color24 RGB values │ │ space/celestia/celestia/Vector │ │ [json.exception. │ │ eglChooseConfig() returned error %d │ │ eglMakeCurrent() returned error %d │ │ -libjpeg-turbo version 3.0.4 (build 20240926) │ │ MAX_ALLOC_CHUNK is wrong, please fix │ │ Copyright (C) 1991-2024 The libjpeg-turbo Project and many others │ │ JFIF extension marker: RGB thumbnail image, length %u │ │ metrics-variations │ │ UniqueID │ │ BuildCharArray │ │ cff-load │ ├── readelf --wide --decompress --string-dump=.rodata {} │ │ @@ -117,5464 +117,5465 @@ │ │ [ a79] Processing Color24 chunk\n │ │ [ a93] Processing ColorFloat chunk\n │ │ [ ab0] getX │ │ [ ab5] onFatalError │ │ [ ac2] SwappyGL_swap() returned error %d │ │ [ ae4] Renderer thread stopped │ │ [ afc] Unable to interpret GL_VERSION string: %s\n │ │ - [ b27] Wrong JPEG library version: library is %d, caller expects %d │ │ - [ b64] Weight │ │ - [ b6b] StemSnapV │ │ - [ b75] DesignVector │ │ - [ b82] SIZE │ │ - [ b87] ENDPROPERTIES │ │ - [ ba2] sdf │ │ - [ ba6] flip_sign │ │ - [ bb0] nil │ │ - [ bb4] %p:%d │ │ - [ bba] self │ │ - [ bbf] %s: %s │ │ - [ bc6] start │ │ - [ bcc] LUA_NOENV │ │ - [ bd8] no module '%s' in file '%s' │ │ - [ bf4] _NAME │ │ - [ bfa] 'module' not called from a Lua function │ │ - [ c22] info │ │ - [ c27] metatable │ │ - [ c31] bad parameters to zlib │ │ - [ c48] gamma value does not match sRGB │ │ - [ c68] libpng warning: %s │ │ - [ c7b] Image is too high to process with png_read_png() │ │ - [ cac] color map overflow (BAD internal error) │ │ - [ cd4] invalid parameter count │ │ - [ cec] internal row width error │ │ - [ d05] cHRM Green Y │ │ - [ d12] Invalid sCAL width │ │ - [ d25] No profile for iCCP chunk │ │ - [ d3f] error writing ancillary chunked compressed data │ │ - [ d6f] bodn2c_c │ │ - [ d78] NEW FILES │ │ - [ d82] DAFCLS │ │ - [ d89] DAFLUH │ │ - [ d90] NULL │ │ - [ d95] DAFRWA │ │ - [ d9c] SPICE(DAFFRNOTFOUND) │ │ - [ db1] rbhan │ │ - [ db7] MAKE_COLUMN_TABLE_ENTRIES │ │ - [ dd1] DESCRIPTOR_TABLE_FULL │ │ - [ de7] dasfm_ │ │ - [ dee] DASHAM │ │ - [ df5] DASRWR │ │ - [ dfc] rcbufc │ │ - [ e03] SPICE(INQUIREFAILED) │ │ - [ e18] LNKILA │ │ - [ e1f] LNKNXT │ │ - [ e26] LNKPRV │ │ - [ e2d] btbeg │ │ - [ e33] btub │ │ - [ e38] POOL: You have called an entry which performs performs no run-time function. This may indicate a bug. Please check the documentation for the subroutine POOL. │ │ - [ ed6] dpvals │ │ - [ edd] The list of agents to notify when # is updated is too big. The maximum number of agents that any kernelpool variable can activate is #. │ │ - [ f65] kname │ │ - [ f6b] ckr01_ │ │ - [ f72] ckr06_ │ │ - [ f79] cmpval │ │ - [ f80] Kernel variable # was not found in the kernel pool. │ │ - [ fb4] The generic DAF segment you attempted to read has an unsupported reference directory structure. The integer code given for this structure is #, and allowed codes are within the range # to #. The likely cause of this anomaly is your version of SPICELIB needs updating. Contact your system administrator or NAIF for a toolkit update. │ │ - [ 1100] SIZEC │ │ - [ 1106] At least one SPK file needs to be loaded by SPKLEF before beginning a search. │ │ - [ 1154] spkgps_c │ │ - [ 115d] SPICE(INVALIDRADIUS) │ │ - [ 1172] spke12_ │ │ - [ 117a] A type 17 segment should contain exactly # double precision values. The segment supplied had #. The segment is badly formed. │ │ - [ 11fa] DELTET/K │ │ - [ 1203] Middle axis matches neighbor: # # #. │ │ - [ 1228] kididx │ │ - [ 122f] ZZBODDEF │ │ - [ 1238] BFF │ │ - [ 123c] Could not DAS read file record. File was #. IOSTAT was #. │ │ - [ 1277] Logical unit associated with # file $, is trying to be closed by routines in in the % system. │ │ - [ 12d5] SPICE(NOSUCHHANDLE) │ │ - [ 12e9] ZZDDHNFC │ │ - [ 12f2] DLAFPS │ │ - [ 12f9] 0123456789 │ │ - [ 1304] VECTOR_DEF │ │ - [ 130f] itmabc │ │ - [ 1316] itmlon │ │ - [ 131d] SPICE(INVALIDSELECTION) │ │ - [ 1335] In definition of frame #, the frame associated with a velocity vector has frame ID code #, but no frame center, frame class, or frame class ID was found by FRINFO. This situation MAY be caused by an error in a frame kernel in which the frame is defined. The problem also could be indicative of a SPICELIB bug. │ │ - [ 146c] term │ │ - [ 1471] The kernel variable # has used to define frame # was expected to have double precision data type but in fact has character type. Usually this type of problem is due to an error in a frame definition provided in a frame kernel. │ │ - [ 1556] Encoded query has not been semantically checked. │ │ - [ 1587] N_C_FREE │ │ - [ 1590] DASUDC │ │ - [ 1597] SPICE(UNINITIALIZEDVALUE) │ │ - [ 15b1] SPICE(MALLOCFAILED) │ │ - [ 15c5] IAU_TELESTO │ │ - [ 15d1] IAU_TEMPEL_1 │ │ - [ 15de] IAU_PALLAS │ │ - [ 15e9] IAU_52_EUROPA │ │ - [ 15f7] ZZGAPOOL │ │ - [ 1600] Only # axes were found for ID #. Three axes expected. │ │ - [ 1637] ZZHSC │ │ - [ 163d] Uninitialized hash. Size was #. │ │ - [ 165d] VENUS BARYCENTER │ │ - [ 166e] AMALTHEA │ │ - [ 1677] BEBHIONN │ │ - [ 1680] SKOLL │ │ - [ 1686] PSAMATHE │ │ - [ 168f] NIX │ │ - [ 1693] LUNAH-MAP │ │ - [ 169d] MARS EXPRESS │ │ - [ 16aa] EXOMARS 2016 EDM │ │ - [ 16bb] MARS2020 │ │ - [ 16c4] EXOMARS SCC │ │ - [ 16d0] OPPORTUNITY │ │ - [ 16dc] SELENE Relay Satellite │ │ - [ 16f3] BOETHIN │ │ - [ 16fb] DSS-69 │ │ - [ 1702] SPICE(NEGATIVEHASHVALUE1) │ │ - [ 171c] ZZRVAR │ │ - [ 1723] YmD │ │ - [ 1727] SmD │ │ - [ 172b] The minutes component of the time specified was #. This value must be greater than or equal to 0.0 and less than 60.0. │ │ - [ 17a3] The seconds component of time must be at least 0.0D0 and less than 60.0D0 (61.0D0 during the last minute of June 30 and December 31). The value supplied was #. │ │ - [ 1844] The kernel pool does not have room for any more variables. It filled up at line # of the text buffer. │ │ - [ 18ac] Kernel variable # for spacecraft clock # was not found. An SCLK kernel for this clock may not have been loaded. │ │ - [ 191c] Item # for SCLK # has size # but output array has size #. │ │ - [ 1956] Mean motion less-than zero. This error may indicate a bad TLE set. │ │ - [ 1999] SPICE(BADMECCENTRICITY) │ │ - [ 19b1] Perturbed eccentricity value, #, beyond allowed bounds [0,1]. This error may indicate a bad TLE set. │ │ - [ 1a16] FORMAL │ │ - [ 1a1e] YD.D │ │ - [ 1a24] Both a time system and time zone have been specified in the input string (# and #). These are inconsistent. A time zone is a fixed offset from UTC. │ │ - [ 1ab9] JULIAN │ │ - [ 1ac0] pends │ │ - [ 1ac6] period │ │ - [ 1acd] slash │ │ - [ 1ad3] wkday │ │ - [ 1ad9] digit │ │ - [ 1adf] Y-id │ │ - [ 1ae4] YmDH │ │ - [ 1ae9] YmDHM │ │ - [ 1aef] y*Y*H*M*S │ │ - [ 1af9] i-Y/i:n │ │ - [ 1b01] i-i-iti:i │ │ - [ 1b0b] i-i-iti:n │ │ - [ 1b15] i/i/Yi:i:i │ │ - [ 1b20] Aberration correction specification # calls for stellar aberration correction without light time correction; this combination is not supported. │ │ - [ 1bb0] zzxlated_ │ │ - [ 1bba] inbufr │ │ - [ 1bc1] The native binary file format of this toolkit build, #, is not currently supported for translation of double precision numbers from non-native formats. │ │ - [ 1c59] ZW │ │ - [ 1c5c] zh_MIN_NAN │ │ - [ 1c67] ars │ │ - [ 1c6b] bez │ │ - [ 1c6f] bum │ │ - [ 1c73] cho │ │ - [ 1c77] cs │ │ - [ 1c7a] dak │ │ - [ 1c7e] fr │ │ - [ 1c81] gay │ │ - [ 1c85] glk │ │ - [ 1c89] lez │ │ - [ 1c8d] mgo │ │ - [ 1c91] prg │ │ - [ 1c95] raj │ │ - [ 1c99] rar │ │ - [ 1c9d] rgn │ │ - [ 1ca1] rtm │ │ - [ 1ca5] sdc │ │ - [ 1ca9] sel │ │ - [ 1cad] smn │ │ - [ 1cb1] sms │ │ - [ 1cb5] tkl │ │ - [ 1cb9] vmw │ │ - [ 1cbd] cym │ │ - [ 1cc1] glg │ │ - [ 1cc5] ina │ │ - [ 1cc9] lit │ │ - [ 1ccd] msa │ │ - [ 1cd1] nav │ │ - [ 1cd5] ssw │ │ - [ 1cd9] tha │ │ - [ 1cdd] tat │ │ - [ 1ce1] vie │ │ - [ 1ce5] GG │ │ - [ 1ce8] IE │ │ - [ 1ceb] IL │ │ - [ 1cee] MD │ │ - [ 1cf1] VE │ │ - [ 1cf4] CCK │ │ - [ 1cf8] CHL │ │ - [ 1cfc] LVA │ │ - [ 1d00] MDV │ │ - [ 1d04] MOZ │ │ - [ 1d08] TKL │ │ - [ 1d0c] hr_HR │ │ - [ 1d12] jv_ID │ │ - [ 1d18] sd_IN │ │ - [ 1d1e] Africa/Tripoli │ │ - [ 1d2d] America/Havana │ │ - [ 1d3c] US/Pacific │ │ - [ 1d47] regionToPartitions │ │ - [ 1d5a] dv_MV │ │ - [ 1d60] en_AS │ │ - [ 1d66] gn_PY │ │ - [ 1d6c] mn_CN │ │ - [ 1d72] zh_Hans_SG │ │ - [ 1d7d] zh_TW@collation=stroke │ │ - [ 1d94] sgn-pt │ │ - [ 1d9b] sgn-se │ │ - [ 1da2] ucol_swap(formatVersion=3): too few bytes (%d after header) for collation data\n │ │ - [ 1df2] *NULL* │ │ - [ 1df9] ucol_getSortKey │ │ - [ 1e09] noon │ │ - [ 1e0e] evening1 │ │ - [ 1e17] islamic-civil │ │ - [ 1e25] M07 │ │ - [ 1e29] icudt75l-region │ │ - [ 1e39] uchar_swapNames(prefix string of algorithmic range %u) failed\n │ │ - [ 1e78] titlecase letter │ │ - [ 1e89] combining spacing mark │ │ - [ 1ea0] ARL │ │ - [ 1ea4] BGO │ │ - [ 1ea8] CLP │ │ - [ 1eac] DJF │ │ - [ 1eb0] GTQ │ │ - [ 1eb4] GWE │ │ - [ 1eb8] LSM │ │ - [ 1ebc] UYW │ │ - [ 1ec0] parse │ │ - [ 1ec6] millisecond │ │ - [ 1ed2] second │ │ - [ 1ed9] week-person │ │ - [ 1ee5] gigahertz │ │ - [ 1eef] variableTop │ │ - [ 1efb] tailoring quaternary after tertiary ignorables not supported │ │ - [ 1f38] others │ │ - [ 1f3f] pm │ │ - [ 1f42] wbe │ │ - [ 1f46] static void swappy::SwappyGL::recordFrameStart(swappy::EGLDisplay, swappy::EGLSurface) │ │ - [ 1f9d] Ljava/lang/String; │ │ - [ 1fb0] offset from previous frame: │ │ - [ 1fcd] Markers disabled │ │ - [ 1fde] Star color: Blackbody (Vega Whitepoint) │ │ - [ 2006] Medium res textures │ │ - [ 201a] resize │ │ - [ 2021] ~/.celestia.cfg │ │ - [ 2031] arrow │ │ - [ 2037] Error loading font; text will not be visible.\n │ │ - [ 2066] body axes │ │ - [ 2070] Failed to open leapseconds file {}\n │ │ - [ 2094] Failed to parse leapseconds file {}, line {}, column {}\n │ │ - [ 20cd] Error opening config file '{}'.\n │ │ - [ 20ee] ScriptSystemAccessPolicy │ │ - [ 2107] T │ │ - [ 2109] ly │ │ - [ 210c] }\n │ │ + [ b27] libjpeg-turbo version 3.0.4 (build 20241210) │ │ + [ b54] Wrong JPEG library version: library is %d, caller expects %d │ │ + [ b91] Weight │ │ + [ b98] StemSnapV │ │ + [ ba2] DesignVector │ │ + [ baf] SIZE │ │ + [ bb4] ENDPROPERTIES │ │ + [ bcf] sdf │ │ + [ bd3] flip_sign │ │ + [ bdd] nil │ │ + [ be1] %p:%d │ │ + [ be7] self │ │ + [ bec] %s: %s │ │ + [ bf3] start │ │ + [ bf9] LUA_NOENV │ │ + [ c05] no module '%s' in file '%s' │ │ + [ c21] _NAME │ │ + [ c27] 'module' not called from a Lua function │ │ + [ c4f] info │ │ + [ c54] metatable │ │ + [ c5e] bad parameters to zlib │ │ + [ c75] gamma value does not match sRGB │ │ + [ c95] libpng warning: %s │ │ + [ ca8] Image is too high to process with png_read_png() │ │ + [ cd9] color map overflow (BAD internal error) │ │ + [ d01] invalid parameter count │ │ + [ d19] internal row width error │ │ + [ d32] cHRM Green Y │ │ + [ d3f] Invalid sCAL width │ │ + [ d52] No profile for iCCP chunk │ │ + [ d6c] error writing ancillary chunked compressed data │ │ + [ d9c] bodn2c_c │ │ + [ da5] NEW FILES │ │ + [ daf] DAFCLS │ │ + [ db6] DAFLUH │ │ + [ dbd] NULL │ │ + [ dc2] DAFRWA │ │ + [ dc9] SPICE(DAFFRNOTFOUND) │ │ + [ dde] rbhan │ │ + [ de4] MAKE_COLUMN_TABLE_ENTRIES │ │ + [ dfe] DESCRIPTOR_TABLE_FULL │ │ + [ e14] dasfm_ │ │ + [ e1b] DASHAM │ │ + [ e22] DASRWR │ │ + [ e29] rcbufc │ │ + [ e30] SPICE(INQUIREFAILED) │ │ + [ e45] LNKILA │ │ + [ e4c] LNKNXT │ │ + [ e53] LNKPRV │ │ + [ e5a] btbeg │ │ + [ e60] btub │ │ + [ e65] POOL: You have called an entry which performs performs no run-time function. This may indicate a bug. Please check the documentation for the subroutine POOL. │ │ + [ f03] dpvals │ │ + [ f0a] The list of agents to notify when # is updated is too big. The maximum number of agents that any kernelpool variable can activate is #. │ │ + [ f92] kname │ │ + [ f98] ckr01_ │ │ + [ f9f] ckr06_ │ │ + [ fa6] cmpval │ │ + [ fad] Kernel variable # was not found in the kernel pool. │ │ + [ fe1] The generic DAF segment you attempted to read has an unsupported reference directory structure. The integer code given for this structure is #, and allowed codes are within the range # to #. The likely cause of this anomaly is your version of SPICELIB needs updating. Contact your system administrator or NAIF for a toolkit update. │ │ + [ 112d] SIZEC │ │ + [ 1133] At least one SPK file needs to be loaded by SPKLEF before beginning a search. │ │ + [ 1181] spkgps_c │ │ + [ 118a] SPICE(INVALIDRADIUS) │ │ + [ 119f] spke12_ │ │ + [ 11a7] A type 17 segment should contain exactly # double precision values. The segment supplied had #. The segment is badly formed. │ │ + [ 1227] DELTET/K │ │ + [ 1230] Middle axis matches neighbor: # # #. │ │ + [ 1255] kididx │ │ + [ 125c] ZZBODDEF │ │ + [ 1265] BFF │ │ + [ 1269] Could not DAS read file record. File was #. IOSTAT was #. │ │ + [ 12a4] Logical unit associated with # file $, is trying to be closed by routines in in the % system. │ │ + [ 1302] SPICE(NOSUCHHANDLE) │ │ + [ 1316] ZZDDHNFC │ │ + [ 131f] DLAFPS │ │ + [ 1326] 0123456789 │ │ + [ 1331] VECTOR_DEF │ │ + [ 133c] itmabc │ │ + [ 1343] itmlon │ │ + [ 134a] SPICE(INVALIDSELECTION) │ │ + [ 1362] In definition of frame #, the frame associated with a velocity vector has frame ID code #, but no frame center, frame class, or frame class ID was found by FRINFO. This situation MAY be caused by an error in a frame kernel in which the frame is defined. The problem also could be indicative of a SPICELIB bug. │ │ + [ 1499] term │ │ + [ 149e] The kernel variable # has used to define frame # was expected to have double precision data type but in fact has character type. Usually this type of problem is due to an error in a frame definition provided in a frame kernel. │ │ + [ 1583] Encoded query has not been semantically checked. │ │ + [ 15b4] N_C_FREE │ │ + [ 15bd] DASUDC │ │ + [ 15c4] SPICE(UNINITIALIZEDVALUE) │ │ + [ 15de] SPICE(MALLOCFAILED) │ │ + [ 15f2] IAU_TELESTO │ │ + [ 15fe] IAU_TEMPEL_1 │ │ + [ 160b] IAU_PALLAS │ │ + [ 1616] IAU_52_EUROPA │ │ + [ 1624] ZZGAPOOL │ │ + [ 162d] Only # axes were found for ID #. Three axes expected. │ │ + [ 1664] ZZHSC │ │ + [ 166a] Uninitialized hash. Size was #. │ │ + [ 168a] VENUS BARYCENTER │ │ + [ 169b] AMALTHEA │ │ + [ 16a4] BEBHIONN │ │ + [ 16ad] SKOLL │ │ + [ 16b3] PSAMATHE │ │ + [ 16bc] NIX │ │ + [ 16c0] LUNAH-MAP │ │ + [ 16ca] MARS EXPRESS │ │ + [ 16d7] EXOMARS 2016 EDM │ │ + [ 16e8] MARS2020 │ │ + [ 16f1] EXOMARS SCC │ │ + [ 16fd] OPPORTUNITY │ │ + [ 1709] SELENE Relay Satellite │ │ + [ 1720] BOETHIN │ │ + [ 1728] DSS-69 │ │ + [ 172f] SPICE(NEGATIVEHASHVALUE1) │ │ + [ 1749] ZZRVAR │ │ + [ 1750] YmD │ │ + [ 1754] SmD │ │ + [ 1758] The minutes component of the time specified was #. This value must be greater than or equal to 0.0 and less than 60.0. │ │ + [ 17d0] The seconds component of time must be at least 0.0D0 and less than 60.0D0 (61.0D0 during the last minute of June 30 and December 31). The value supplied was #. │ │ + [ 1871] The kernel pool does not have room for any more variables. It filled up at line # of the text buffer. │ │ + [ 18d9] Kernel variable # for spacecraft clock # was not found. An SCLK kernel for this clock may not have been loaded. │ │ + [ 1949] Item # for SCLK # has size # but output array has size #. │ │ + [ 1983] Mean motion less-than zero. This error may indicate a bad TLE set. │ │ + [ 19c6] SPICE(BADMECCENTRICITY) │ │ + [ 19de] Perturbed eccentricity value, #, beyond allowed bounds [0,1]. This error may indicate a bad TLE set. │ │ + [ 1a43] FORMAL │ │ + [ 1a4b] YD.D │ │ + [ 1a51] Both a time system and time zone have been specified in the input string (# and #). These are inconsistent. A time zone is a fixed offset from UTC. │ │ + [ 1ae6] JULIAN │ │ + [ 1aed] pends │ │ + [ 1af3] period │ │ + [ 1afa] slash │ │ + [ 1b00] wkday │ │ + [ 1b06] digit │ │ + [ 1b0c] Y-id │ │ + [ 1b11] YmDH │ │ + [ 1b16] YmDHM │ │ + [ 1b1c] y*Y*H*M*S │ │ + [ 1b26] i-Y/i:n │ │ + [ 1b2e] i-i-iti:i │ │ + [ 1b38] i-i-iti:n │ │ + [ 1b42] i/i/Yi:i:i │ │ + [ 1b4d] Aberration correction specification # calls for stellar aberration correction without light time correction; this combination is not supported. │ │ + [ 1bdd] zzxlated_ │ │ + [ 1be7] inbufr │ │ + [ 1bee] The native binary file format of this toolkit build, #, is not currently supported for translation of double precision numbers from non-native formats. │ │ + [ 1c86] ZW │ │ + [ 1c89] zh_MIN_NAN │ │ + [ 1c94] ars │ │ + [ 1c98] bez │ │ + [ 1c9c] bum │ │ + [ 1ca0] cho │ │ + [ 1ca4] cs │ │ + [ 1ca7] dak │ │ + [ 1cab] fr │ │ + [ 1cae] gay │ │ + [ 1cb2] glk │ │ + [ 1cb6] lez │ │ + [ 1cba] mgo │ │ + [ 1cbe] prg │ │ + [ 1cc2] raj │ │ + [ 1cc6] rar │ │ + [ 1cca] rgn │ │ + [ 1cce] rtm │ │ + [ 1cd2] sdc │ │ + [ 1cd6] sel │ │ + [ 1cda] smn │ │ + [ 1cde] sms │ │ + [ 1ce2] tkl │ │ + [ 1ce6] vmw │ │ + [ 1cea] cym │ │ + [ 1cee] glg │ │ + [ 1cf2] ina │ │ + [ 1cf6] lit │ │ + [ 1cfa] msa │ │ + [ 1cfe] nav │ │ + [ 1d02] ssw │ │ + [ 1d06] tha │ │ + [ 1d0a] tat │ │ + [ 1d0e] vie │ │ + [ 1d12] GG │ │ + [ 1d15] IE │ │ + [ 1d18] IL │ │ + [ 1d1b] MD │ │ + [ 1d1e] VE │ │ + [ 1d21] CCK │ │ + [ 1d25] CHL │ │ + [ 1d29] LVA │ │ + [ 1d2d] MDV │ │ + [ 1d31] MOZ │ │ + [ 1d35] TKL │ │ + [ 1d39] hr_HR │ │ + [ 1d3f] jv_ID │ │ + [ 1d45] sd_IN │ │ + [ 1d4b] Africa/Tripoli │ │ + [ 1d5a] America/Havana │ │ + [ 1d69] US/Pacific │ │ + [ 1d74] regionToPartitions │ │ + [ 1d87] dv_MV │ │ + [ 1d8d] en_AS │ │ + [ 1d93] gn_PY │ │ + [ 1d99] mn_CN │ │ + [ 1d9f] zh_Hans_SG │ │ + [ 1daa] zh_TW@collation=stroke │ │ + [ 1dc1] sgn-pt │ │ + [ 1dc8] sgn-se │ │ + [ 1dcf] ucol_swap(formatVersion=3): too few bytes (%d after header) for collation data\n │ │ + [ 1e1f] *NULL* │ │ + [ 1e26] ucol_getSortKey │ │ + [ 1e36] noon │ │ + [ 1e3b] evening1 │ │ + [ 1e44] islamic-civil │ │ + [ 1e52] M07 │ │ + [ 1e56] icudt75l-region │ │ + [ 1e66] uchar_swapNames(prefix string of algorithmic range %u) failed\n │ │ + [ 1ea5] titlecase letter │ │ + [ 1eb6] combining spacing mark │ │ + [ 1ecd] ARL │ │ + [ 1ed1] BGO │ │ + [ 1ed5] CLP │ │ + [ 1ed9] DJF │ │ + [ 1edd] GTQ │ │ + [ 1ee1] GWE │ │ + [ 1ee5] LSM │ │ + [ 1ee9] UYW │ │ + [ 1eed] parse │ │ + [ 1ef3] millisecond │ │ + [ 1eff] second │ │ + [ 1f06] week-person │ │ + [ 1f12] gigahertz │ │ + [ 1f1c] variableTop │ │ + [ 1f28] tailoring quaternary after tertiary ignorables not supported │ │ + [ 1f65] others │ │ + [ 1f6c] pm │ │ + [ 1f6f] wbe │ │ + [ 1f73] static void swappy::SwappyGL::recordFrameStart(swappy::EGLDisplay, swappy::EGLSurface) │ │ + [ 1fca] Ljava/lang/String; │ │ + [ 1fdd] offset from previous frame: │ │ + [ 1ffa] Markers disabled │ │ + [ 200b] Star color: Blackbody (Vega Whitepoint) │ │ + [ 2033] Medium res textures │ │ + [ 2047] resize │ │ + [ 204e] ~/.celestia.cfg │ │ + [ 205e] arrow │ │ + [ 2064] Error loading font; text will not be visible.\n │ │ + [ 2093] body axes │ │ + [ 209d] Failed to open leapseconds file {}\n │ │ + [ 20c1] Failed to parse leapseconds file {}, line {}, column {}\n │ │ + [ 20fa] Error opening config file '{}'.\n │ │ + [ 211b] ScriptSystemAccessPolicy │ │ + [ 2134] T │ │ + [ 2136] ly │ │ + [ 2139] }\n │ │ Track │ │ - [ 2116] Radius: {}\n │ │ - [ 2122] catalog^Dsolar system │ │ - [ 2137] CHANNEL_SIDE_RIGHT │ │ - [ 214a] Resource unavailable │ │ - [ 215f] Invalid │ │ - [ 2167] Null │ │ - [ 216c] RF64 │ │ - [ 2171] INAM │ │ - [ 2176] Incorrect hex value "{}"\n │ │ - [ 2190] Aug │ │ - [ 2194] September │ │ - [ 219e] deeppink │ │ - [ 21a7] mediumturquoise │ │ - [ 21b7] rosybrown │ │ - [ 21c1] seashell │ │ - [ 21ca] tan │ │ - [ 21ce] white │ │ - [ 21d4] .bmp │ │ - [ 21d9] .ssc │ │ - [ 21de] PRN │ │ - [ 21e2] DEL │ │ - [ 21e6] PI │ │ - [ 21e9] Gamma │ │ - [ 21ef] Sigma │ │ - [ 21f8] eclipticgrid │ │ - [ 2205] starorbits │ │ - [ 2210] asteroidorbits │ │ - [ 221f] move │ │ - [ 2224] Command Parser: error parsing render flags\n │ │ - [ 2250] deletechild │ │ - [ 225c] removeobject │ │ - [ 2269] getambient │ │ - [ 2274] newframe │ │ - [ 227d] newposition │ │ - [ 2289] registereventhandler │ │ - [ 229e] pauseaudio │ │ - [ 22a9] One argument expected to function celestia:unmark │ │ - [ 22db] No argument expected in celestia:gettintsaturation │ │ - [ 230e] hour │ │ - [ 2313] Second argument to celestia:takescreenshot must be a string │ │ - [ 234f] celestia-scriptpath │ │ - [ 2363] Event handler table not created │ │ - [ 2383] Function celestia:resumeaudio requires one argument │ │ - [ 23b7] Function celestia:setaudionopause requires two arguments │ │ - [ 23f0] Invalid addressMode │ │ - [ 2404] celestia_cleanup_callback │ │ - [ 241e] ERROR: appCore not found\n │ │ - [ 2438] celestia-luastate │ │ - [ 244a] class_position │ │ - [ 2459] Second arg to frame:from must be a number │ │ - [ 2483] TEXTURE_MAG_FILTER │ │ - [ 2496] Nine arguments expected for glu.LookAt() │ │ - [ 24bf] unbind │ │ - [ 24c6] localname │ │ - [ 24d0] getphase │ │ - [ 24d9] preloadtexture │ │ - [ 24e8] HIP │ │ - [ 24ec] No arguments expected to function object:name │ │ - [ 251a] No arguments expected for object:getchildren() │ │ - [ 2549] mieasymmetry │ │ - [ 2556] lookat │ │ - [ 255d] getlocationflags │ │ - [ 256e] No arguments expected to observer:getorientation() │ │ - [ 25a1] Second arg to observer:centerorbit must be a number │ │ - [ 25d5] No arguments expected to observer:travelling │ │ - [ 2602] Argument to position:vectorto must be a position │ │ - [ 2633] No arguments expected for rotation_real │ │ - [ 265b] Need two operands for multiplication │ │ - [ 2680] in_Color │ │ - [ 2689] vertexdesc │ │ - [ 2694] vertexdesc\n │ │ - [ 26a0] htc20-helene │ │ - [ 26ad] vsop87-earth │ │ - [ 26ba] iau-telesto │ │ - [ 26c6] iau-tethys │ │ - [ 26d1] iau-thebe │ │ - [ 26db] long │ │ - [ 26e0] Equ │ │ - [ 26e4] Gem │ │ - [ 26e8] Nebula │ │ - [ 26ef] E3 │ │ - [ 26f2] models/S0.png │ │ - [ 2700] RG │ │ - [ 2703] Rings │ │ - [ 2709] Object has incorrect FixedRotation syntax.\n │ │ - [ 2735] PrecessionRate │ │ - [ 2744] Invalid syntax for frame definition.\n │ │ - [ 276a] Vector │ │ - [ 2771] mas │ │ - [ 2775] normal = in_Normal;\n │ │ - [ 278a] nightTexCoord = │ │ - [ 279b] shadowTexGenS │ │ - [ 27a9] nightTex │ │ - [ 27b2] SurfaceObject │ │ - [ 27c0] warning duplicate definition of %s %s\n │ │ - [ 27e7] SemiAxes must be greater than zero │ │ - [ 280a] Temperature value must be greater than zero │ │ - [ 2836] Reading {} color palette\n │ │ - [ 2850] Failed to read entry {} of face array\n │ │ - [ 2877] getZ │ │ - [ 287c] cannot use operator[] with a string argument with │ │ - [ 28af] [] │ │ - [ 28b2] missing '}' in format string │ │ - [ 28cf] Couldn't open %s: %s\n │ │ - [ 28e5] Couldn't open %s\n │ │ - [ 28f7] i │ │ - [ 28f9] \n" │ │ - [ 28fd] Invalid progressive/lossless parameters at scan script entry %d │ │ - [ 293d] Bogus DQT index %d │ │ - [ 2950] Cannot transcode due to multiple use of quantization table %d │ │ - [ 298e] Cannot quantize to fewer than %d colors │ │ - [ 29b6] 6b 27-Mar-1998 │ │ - [ 29c6] JFIF extension marker: palette thumbnail image, length %u │ │ - [ 2a00] Unrecognized component IDs %d %d %d, assuming YCbCr (lossy) or RGB (lossless) │ │ - [ 2a4e] JSIMD_FORCENONE │ │ - [ 2a5e] .notdef │ │ - [ 2a66] BlueValues │ │ - [ 2a71] OtherBlues │ │ - [ 2a7c] StdHW │ │ - [ 2a82] StemSnapH │ │ - [ 2a8c] Ordering │ │ - [ 2a95] RAW_END_SPACE │ │ - [ 2aa6] � │ │ - [ 2aaf] � │ │ - [ 2ab9] � │ │ - [ 2abf] fallback-script │ │ - [ 2acf] CC │ │ - [ 2ad2] %s:%d: %s │ │ - [ 2adc] 0123456789ABCDEFPX │ │ - [ 2aef] until │ │ - [ 2af5] %lf │ │ - [ 2af9] ;^A; │ │ - [ 2afd] _PACKAGE │ │ - [ 2b06] func │ │ - [ 2b0b] (error object is not a string) │ │ - [ 2b2a] sib │ │ - [ 2b2e] zlib IO error │ │ - [ 2b3c] invalid rendering intent │ │ - [ 2b55] unexpected ICC PCS encoding │ │ - [ 2b71] Image width is zero in IHDR │ │ - [ 2b8d] Image width exceeds user limit in IHDR │ │ - [ 2bb4] undefined │ │ - [ 2bbe] png_image_begin_read_from_stdio: invalid argument │ │ - [ 2bf0] lost rgb to gray │ │ - [ 2c01] Application must supply a known background gamma │ │ - [ 2c32] out of place │ │ - [ 2c3f] non-positive height │ │ - [ 2c53] Insufficient memory to process text chunk │ │ - [ 2c7d] internal row logic error │ │ - [ 2c96] cHRM Green Z │ │ - [ 2ca3] Insufficient memory for eXIf chunk data │ │ - [ 2ccb] info change after png_start_read_image or png_read_update_info │ │ - [ 2d0a] png_image_write_to_memory: incorrect PNG_IMAGE_VERSION │ │ - [ 2d41] png_image_write_to_stdio: invalid argument │ │ - [ 2d6c] Invalid sRGB rendering intent specified │ │ - [ 2d94] Invalid cell cardinality. The cardinality was #. │ │ - [ 2dc6] actns │ │ - [ 2dcc] getmsg_c │ │ - [ 2dd5] An Invalid Error Message Type Was Specified │ │ - [ 2e01] The Symbol Does Not Exist in the Symbol Table │ │ - [ 2e2f] Input Axis Length is Zero │ │ - [ 2e49] CKLPF │ │ - [ 2e4f] There is no file open with handle = # │ │ - [ 2e75] DAFFNH │ │ - [ 2e7c] SPICE(DAFINVALIDACCESS) │ │ - [ 2e94] │ │ - [ 2eb2] read unexpected character │ │ - [ 2ecc] no end record │ │ - [ 2eda] read start │ │ - [ 2ee5] No DAF is currently being searched. │ │ - [ 2f09] rbrec │ │ - [ 2f0f] Could not read record #. IOSTAT was #. │ │ - [ 2f36] ctclas │ │ - [ 2f3d] dtdscs │ │ - [ 2f44] The EK file # could not be loaded; the number of columns (#) in segment # does not match the number of columns (#) in the parent table #. │ │ - [ 2fce] dtype │ │ - [ 2fd4] DASOPW │ │ - [ 2fdb] SPICE(DASWRITEFAIL) │ │ - [ 2fef] There is no DAS file open with unit = # │ │ - [ 3017] SPICE(DASFILEREADFAILED) │ │ - [ 3030] Could not write DAS integer record. File = # Record number = #. IOSTAT = #. │ │ - [ 307c] tbhan │ │ - [ 3082] Error occurred while performing an INQUIRE on a DAS file about to be closed. IOSTAT = #. File handle was #. Logical unit was #. │ │ - [ 3105] no space │ │ - [ 310e] bthfs │ │ - [ 3114] dpstr_ │ │ - [ 311b] SPICE(UNKNOWNFRAME) │ │ - [ 312f] REFCHG │ │ - [ 3136] A request has been made to obtain the transformation from inertial reference frame # to inertial reference frame #. Unfortunately # is not the id-code of a known inertial frame. │ │ - [ 31e9] were recognized. │ │ - [ 31fa] CKMETA │ │ - [ 3201] SPICE(INVALIDSCLKSTRING) │ │ - [ 321a] Invalid SCLK rate #. │ │ - [ 322f] SPICE(UNKNOWNREFDIR) │ │ - [ 3244] SPKLEF │ │ - [ 324b] The kernel file '#' does not exist. │ │ - [ 326f] The file '#' is opened as a binary SPICE kernel. But it cannot be read using a direct access read. The value of IOSTAT returned by the attempted READ is #. │ │ - [ 330d] PRE │ │ - [ 3311] TARG │ │ - [ 3316] Insufficient ephemeris data has been loaded to compute the position of TARG relative to OBS at the ephemeris epoch #. │ │ - [ 338d] refpos │ │ - [ 3394] The routine EQNCPV can reliably evaluate states from equinoctial elements if the eccentricity of the orbit associated with the elements is less than 0.9. The eccentricity associated with the elements supplies is #. The values of H and K are: # and # respectively. │ │ - [ 349f] HRMESP │ │ - [ 34a6] spke13_ │ │ - [ 34ae] btcoef │ │ - [ 34b5] SPICE(PCKKRECTOOLARGE) │ │ - [ 34cc] SPICE(BADAXISNUMBERS) │ │ - [ 34e2] Frame identification codes are required to be non-zero. You've specified a frame with ID value zero. │ │ - [ 3549] _RELATIVE │ │ - [ 3553] SPICE(ADDRESSOUTOFBOUNDS) │ │ - [ 356d] #: The kernel pool variable '#' must be of type "CHARACTER". However, the current type is numeric. │ │ - [ 35d1] , # │ │ - [ 35d5] WRLINE: An error occurred while attempting to WRITE to │ │ - [ 360d] no ) │ │ - [ 3612] w_ned, unexpected code: %d\n │ │ - [ 362e] ZZBODTRN │ │ - [ 3637] SPICE(BLANKNAMEASSIGNED) │ │ - [ 3650] dpbuf │ │ - [ 3656] utlun │ │ - [ 365c] ZZDDHFNH │ │ - [ 3665] FRAME_#_# │ │ - [ 366f] EARTH │ │ - [ 3675] Definition of frame # requires definition of body-fixed frame associated with target body #. A call to CIDFRM indicated no body-fixed frame is associated with the target body. This situation can arise when a frame kernel defining the target's body-fixed frame lacks the OBJECT__FRAME or OBJECT__FRAME keywords. The problem also could be caused by an error in a frame kernel in which the parameterized two-vector dynamic frame # is defined. │ │ - [ 383a] AXES │ │ - [ 383f] TO_FRAMES │ │ - [ 3849] Number of crossed tables was #; valid range is 0:# │ │ - [ 387c] Column index = #; valid range is 1:#.SEGNO = #; RECNO = #; EK = # │ │ - [ 38be] INT page = #; valid range is [1:#] │ │ - [ 38e1] String begin index # must be less than or equal to the end index #. │ │ - [ 3925] Column index = #; valid range is 1:#. │ │ - [ 394b] Pop count must be non-negative; call requests popping # elements. │ │ - [ 398d] ZZEKSCMP │ │ - [ 3996] IAU_MERCURY │ │ - [ 39a2] IAU_HELENE │ │ - [ 39ad] Parameter '#' is not recognized. │ │ - [ 39ce] PALLENE │ │ - [ 39d6] P12 │ │ - [ 39da] JUPITER ICY MOONS EXPLORER │ │ - [ 39f5] SAKIGAKE │ │ - [ 39fe] MARCO-B │ │ - [ 3a06] PHOENIX │ │ - [ 3a0e] DOUBLE ASTEROID REDIRECTION TEST │ │ - [ 3a2f] CHANDRA │ │ - [ 3a37] CH2O │ │ - [ 3a3c] MARS 96 │ │ - [ 3a44] MARS96 │ │ - [ 3a4b] SPRINT-A │ │ - [ 3a54] SHOEMAKER-LEVY 9-J │ │ - [ 3a67] DUBIAGO │ │ - [ 3a6f] SCHWASSMANN-WACHMANN 3 │ │ - [ 3a86] SHOEMAKER 1 │ │ - [ 3a92] WILD 2 │ │ - [ 3a99] SIDING SPRING │ │ - [ 3aa7] DIMORPHOS │ │ - [ 3ab1] This version of SPICELIB was originally packaged by NAIF for # hardware using # with the # compiler. This environment has a binary file format of #; however the software is running on an environment that has a binary file format of #. This is a severe problem and may be because the software package was intended for use on a different computer system. It also may be the result of an improper port; please contact NAIF. │ │ - [ 3c59] geo │ │ - [ 3c5d] The first item following the assignment operator should be the value of a variable or a left parenthesis '(' followed by a value for a variable. This is not true on line # of the text kernel file '#'. │ │ - [ 3d27] *e* │ │ - [ 3d2b] i:i │ │ - [ 3d2f] mnames │ │ - [ 3d36] At character # of line # in the text buffer the character '@' appears. This character is reserved for identifying time values in assignments to kernel pool variables. However it is not being used in this fashion for the variable '#'. │ │ - [ 3e24] zzrxr_ │ │ - [ 3e2b] DPROOM was #; must be in range 0:#. DPFREE was #; must be in range 1:#. │ │ - [ 3e73] The requested frame '#' is not a recognized inertial frame. │ │ - [ 3eb0] ZZTIME │ │ - [ 3eb7] A day of month was identified in the time string "#", but the month it belongs to could not be identified. │ │ - [ 3f23] A seconds components of the time was identified in the time string "#", but the minutes component could not be identified. │ │ - [ 3f9f] Y*y*H*M │ │ - [ 3fa7] Ymii │ │ - [ 3fac] iimi:i │ │ - [ 3fb3] imi:i:iY │ │ - [ 3fbc] miYi:i │ │ - [ 3fc3] mDYHMS │ │ - [ 3fca] H*Mm*D*Y │ │ - [ 3fd3] Y-i-itx │ │ - [ 3fdb] i-i-itx │ │ - [ 3fe3] i-i-iti:i:ix │ │ - [ 3ff0] Y-i-itnx │ │ - [ 3ff9] he │ │ - [ 3ffc] jbo │ │ - [ 4000] ain │ │ - [ 4004] arq │ │ - [ 4008] arw │ │ - [ 400c] bgc │ │ - [ 4010] iu │ │ - [ 4013] ka │ │ - [ 4016] kea │ │ - [ 401a] pro │ │ - [ 401e] rug │ │ - [ 4022] sid │ │ - [ 4026] sog │ │ - [ 402a] ter │ │ - [ 402e] vls │ │ - [ 4032] vmf │ │ - [ 4036] heb │ │ - [ 403a] her │ │ - [ 403e] nde │ │ - [ 4042] uig │ │ - [ 4046] ukr │ │ - [ 404a] MZ │ │ - [ 404d] PG │ │ - [ 4050] ARM │ │ - [ 4054] CIV │ │ - [ 4058] CUW │ │ - [ 405c] DEU │ │ - [ 4060] LSO │ │ - [ 4064] MNG │ │ - [ 4068] NLD │ │ - [ 406c] OMN │ │ - [ 4070] SLB │ │ - [ 4074] SJM │ │ - [ 4078] SVK │ │ - [ 407c] TLS │ │ - [ 4080] UMI │ │ - [ 4084] ZMB │ │ - [ 4088] ANT │ │ - [ 408c] de_DE │ │ - [ 4092] mr_IN │ │ - [ 4098] nl_NL │ │ - [ 409e] rg │ │ - [ 40a1] zzzz │ │ - [ 40a6] /usr/share/zoneinfo/ │ │ - [ 40bb] CHOT │ │ - [ 40c0] HOVST │ │ - [ 40c6] Asia/Krasnoyarsk │ │ - [ 40d7] VOLT │ │ - [ 40dc] EGST │ │ - [ 40e1] PYST │ │ - [ 40e6] m49 │ │ - [ 40ea] ar_OM │ │ - [ 40f0] ar_QA │ │ - [ 40f6] es_DO │ │ - [ 40fc] fr_HT │ │ - [ 4102] ii_CN │ │ - [ 4108] iu_Latn │ │ - [ 4110] nso_ZA │ │ - [ 4117] uz_Latn │ │ - [ 411f] yo_NG │ │ - [ 4125] i-klingon │ │ - [ 412f] no-bok │ │ - [ 4136] no-nyn │ │ - [ 413d] zh-min │ │ - [ 4144] dsl │ │ - [ 4148] sgn-no │ │ - [ 414f] zh-yue │ │ - [ 4156] ucol_swap(formatVersion=3): magic 0x%08x or format version %02x.%02x is not a collation binary\n │ │ - [ 41b6] ucnv_load │ │ - [ 41c0] other letter │ │ - [ 41cd] start punctuation │ │ - [ 41df] dictionaries │ │ - [ 41ec] extensions │ │ - [ 41f7] U_CE_NOT_FOUND_ERROR │ │ - [ 420c] U_RULE_MASK_ERROR │ │ - [ 421e] U_MULTIPLE_EXPONENTIAL_SYMBOLS │ │ - [ 423d] U_MULTIPLE_PERMILL_SYMBOLS │ │ - [ 4258] U_MF_MISSING_SELECTOR_ANNOTATION_ERROR │ │ - [ 427f] U_BRK_INTERNAL_ERROR │ │ - [ 4294] BIF │ │ - [ 4298] CVE │ │ - [ 429c] GMD │ │ - [ 42a0] HNL │ │ - [ 42a4] JPY │ │ - [ 42a8] SVC │ │ - [ 42ac] SZL │ │ - [ 42b0] TJR │ │ - [ 42b4] TJS │ │ - [ 42b8] UYP │ │ - [ 42bc] UYU │ │ - [ 42c0] ZAL │ │ - [ 42c4] latn │ │ - [ 42c9] Overflow │ │ - [ 42d2] +Infinity │ │ - [ 42dc] 0.6931471805599453094172321214581765680755 │ │ - [ 4307] M06L │ │ - [ 430c] gram │ │ - [ 4311] many │ │ - [ 4316] superscriptingExponent │ │ - [ 432d] times │ │ - [ 4333] unit │ │ - [ 4338] weekdayOfMonth │ │ - [ 4347] regular │ │ - [ 434f] NumberingSystemRules │ │ - [ 4364] icudt75l-rbnf │ │ - [ 4372] 1234...........IXO..SN..LU...... │ │ - [ 4393] colStrength │ │ - [ 439f] collations/default │ │ - [ 43b2] tailoring relative to an unassigned code point not supported │ │ - [ 43ef] range start greater than end in starred-relation string │ │ - [ 4427] meters_per_AU │ │ - [ 4435] SwappyChoreographer │ │ - [ 4449] ATrace_isEnabled │ │ - [ 445a] Trace │ │ - [ 4460] static void swappy::SwappyGL::onChoreographer(int64_t) │ │ - [ 4497] lastFrameIncomplete │ │ - [ 44ab] getDefaultDisplay │ │ - [ 44bd] ANativeWindow_setFrameRate │ │ - [ 44d8] libunwind: %s - %s\n │ │ - [ 44ec] Magnitude limit: {:.2f} │ │ - [ 4504] Cannot read DSO database. │ │ - [ 451e] warpmesh │ │ - [ 4527] invalid fill character '{' │ │ - [ 4542] Font │ │ - [ 4547] K │ │ - [ 4549] Line width range: %s - %s\n │ │ - [ 4564] 00010203040506070809101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899 │ │ - [ 462d] Recording │ │ - [ 4637] {} K │ │ - [ 463c] Loaded cross index {}\n │ │ - [ 4653] CHANNEL_TOP_FRONT_CENTER │ │ - [ 466c] CHANNEL_TOP_FRONT_RIGHT │ │ - [ 4684] Destination address required │ │ - [ 46a1] No host │ │ - [ 46a9] 0.13.13 │ │ - [ 46b1] Failed to load sound file {} │ │ - [ 46ce] AAudioStreamBuilder_setSampleRate │ │ - [ 46f0] AAudioStreamBuilder_openStream │ │ - [ 470f] AAudioStream_requestStop │ │ - [ 4728] NULL Capture Device │ │ - [ 473c] Title: │ │ - [ 4743] Sun │ │ - [ 4747] Oct │ │ - [ 474b] darkblue │ │ - [ 4754] darkred │ │ - [ 475c] deepskyblue │ │ - [ 4768] ivory │ │ - [ 476e] paleturquoise │ │ - [ 477c] powderblue │ │ - [ 4787] OME │ │ - [ 478b] Tau │ │ - [ 4799] locations │ │ - [ 47a3] MinorMoon │ │ - [ 47ad] undae │ │ - [ 47b3] capital │ │ - [ 47bb] always │ │ - [ 47c2] minormoonorbits │ │ - [ 47d2] verbosity │ │ - [ 47dc] ref │ │ - [ 47e0] occludable │ │ - [ 47eb] Four arguments expected for celestia:setsafeareainsets() │ │ - [ 4824] Third argument to celestia:setsafeareainsets() must be a number │ │ - [ 4864] setaltazimuthmode │ │ - [ 4876] Second argument to celestia:print must be a number │ │ - [ 48a9] Values in table-argument to celestia:setconstellationcolor() must be strings │ │ - [ 48f6] One argument expected for celestia:getlabelcolor() │ │ - [ 4929] Argument to celestia:settintsaturation must be a number │ │ - [ 4961] First arg to celestia:tojulianday must be a number │ │ - [ 4994] First arg to celestia:tdbtoutc must be a number │ │ - [ 49c4] second argument to celestia:newrotation must be a number │ │ - [ 49fd] No arguments expected for celestia:getscripttime │ │ - [ 4a2e] {}.{} │ │ - [ 4a34] internal error: invalid appCore │ │ - [ 4a54] Error: │ │ - [ 4a5c] Error running script initialization fragment.\n │ │ - [ 4a8b] KM_PER_MICROLY │ │ - [ 4a9a] debug │ │ - [ 4aa0] Ortho │ │ - [ 4aa6] TexParameter │ │ - [ 4ab3] LIGHTING │ │ - [ 4abc] LINEAR │ │ - [ 4ac3] argument 2 to gl.Ortho must be a number │ │ - [ 4aeb] argument 4 to gl.Ortho must be a number │ │ - [ 4b13] One argument expected for gl.Enable() │ │ - [ 4b39] bodyfixedframe │ │ - [ 4b48] equatorialframe │ │ - [ 4b58] [Object] │ │ - [ 4b61] Red, green, and blue color values exepected for object:setorbitcolor() │ │ - [ 4ba8] minormoon │ │ - [ 4bb2] No arguments expected to function object:spectraltype │ │ - [ 4be8] First arg to observer:gotolocation must be a position │ │ - [ 4c1e] First argument to observer:setspeed must be a number │ │ - [ 4c53] First argument to observer:phaseLock must be an object │ │ - [ 4c8a] Argument to phase:getorientation() must be number │ │ - [ 4cbc] Position expected as argument to position:distanceto │ │ - [ 4cf1] imag │ │ - [ 4cf6] Invalid access of vector-component │ │ - [ 4d19] specpower │ │ - [ 4d23] Invalid vertex attribute semantic '{}' │ │ - [ 4d4a] tristrip │ │ - [ 4d53] │ │ - [ 4d55] earth-sun │ │ - [ 4d5f] jupiter-sun │ │ - [ 4d6b] jpl-jupiter-sun │ │ - [ 4d7b] Aqr │ │ - [ 4d7f] CMa │ │ - [ 4d83] Leo │ │ - [ 4d87] Sgr │ │ - [ 4d8b] Tuc │ │ - [ 4d8f] {} DSOs total.\n │ │ + [ 2143] Radius: {}\n │ │ + [ 214f] catalog^Dsolar system │ │ + [ 2164] CHANNEL_SIDE_RIGHT │ │ + [ 2177] Resource unavailable │ │ + [ 218c] Invalid │ │ + [ 2194] Null │ │ + [ 2199] RF64 │ │ + [ 219e] INAM │ │ + [ 21a3] Incorrect hex value "{}"\n │ │ + [ 21bd] Aug │ │ + [ 21c1] September │ │ + [ 21cb] deeppink │ │ + [ 21d4] mediumturquoise │ │ + [ 21e4] rosybrown │ │ + [ 21ee] seashell │ │ + [ 21f7] tan │ │ + [ 21fb] white │ │ + [ 2201] .bmp │ │ + [ 2206] .ssc │ │ + [ 220b] PRN │ │ + [ 220f] DEL │ │ + [ 2213] PI │ │ + [ 2216] Gamma │ │ + [ 221c] Sigma │ │ + [ 2225] eclipticgrid │ │ + [ 2232] starorbits │ │ + [ 223d] asteroidorbits │ │ + [ 224c] move │ │ + [ 2251] Command Parser: error parsing render flags\n │ │ + [ 227d] deletechild │ │ + [ 2289] removeobject │ │ + [ 2296] getambient │ │ + [ 22a1] newframe │ │ + [ 22aa] newposition │ │ + [ 22b6] registereventhandler │ │ + [ 22cb] pauseaudio │ │ + [ 22d6] One argument expected to function celestia:unmark │ │ + [ 2308] No argument expected in celestia:gettintsaturation │ │ + [ 233b] hour │ │ + [ 2340] Second argument to celestia:takescreenshot must be a string │ │ + [ 237c] celestia-scriptpath │ │ + [ 2390] Event handler table not created │ │ + [ 23b0] Function celestia:resumeaudio requires one argument │ │ + [ 23e4] Function celestia:setaudionopause requires two arguments │ │ + [ 241d] Invalid addressMode │ │ + [ 2431] celestia_cleanup_callback │ │ + [ 244b] ERROR: appCore not found\n │ │ + [ 2465] celestia-luastate │ │ + [ 2477] class_position │ │ + [ 2486] Second arg to frame:from must be a number │ │ + [ 24b0] TEXTURE_MAG_FILTER │ │ + [ 24c3] Nine arguments expected for glu.LookAt() │ │ + [ 24ec] unbind │ │ + [ 24f3] localname │ │ + [ 24fd] getphase │ │ + [ 2506] preloadtexture │ │ + [ 2515] HIP │ │ + [ 2519] No arguments expected to function object:name │ │ + [ 2547] No arguments expected for object:getchildren() │ │ + [ 2576] mieasymmetry │ │ + [ 2583] lookat │ │ + [ 258a] getlocationflags │ │ + [ 259b] No arguments expected to observer:getorientation() │ │ + [ 25ce] Second arg to observer:centerorbit must be a number │ │ + [ 2602] No arguments expected to observer:travelling │ │ + [ 262f] Argument to position:vectorto must be a position │ │ + [ 2660] No arguments expected for rotation_real │ │ + [ 2688] Need two operands for multiplication │ │ + [ 26ad] in_Color │ │ + [ 26b6] vertexdesc │ │ + [ 26c1] vertexdesc\n │ │ + [ 26cd] htc20-helene │ │ + [ 26da] vsop87-earth │ │ + [ 26e7] iau-telesto │ │ + [ 26f3] iau-tethys │ │ + [ 26fe] iau-thebe │ │ + [ 2708] long │ │ + [ 270d] Equ │ │ + [ 2711] Gem │ │ + [ 2715] Nebula │ │ + [ 271c] E3 │ │ + [ 271f] models/S0.png │ │ + [ 272d] RG │ │ + [ 2730] Rings │ │ + [ 2736] Object has incorrect FixedRotation syntax.\n │ │ + [ 2762] PrecessionRate │ │ + [ 2771] Invalid syntax for frame definition.\n │ │ + [ 2797] Vector │ │ + [ 279e] mas │ │ + [ 27a2] normal = in_Normal;\n │ │ + [ 27b7] nightTexCoord = │ │ + [ 27c8] shadowTexGenS │ │ + [ 27d6] nightTex │ │ + [ 27df] SurfaceObject │ │ + [ 27ed] warning duplicate definition of %s %s\n │ │ + [ 2814] SemiAxes must be greater than zero │ │ + [ 2837] Temperature value must be greater than zero │ │ + [ 2863] Reading {} color palette\n │ │ + [ 287d] Failed to read entry {} of face array\n │ │ + [ 28a4] getZ │ │ + [ 28a9] cannot use operator[] with a string argument with │ │ + [ 28dc] [] │ │ + [ 28df] missing '}' in format string │ │ + [ 28fc] Couldn't open %s: %s\n │ │ + [ 2912] Couldn't open %s\n │ │ + [ 2924] i │ │ + [ 2926] \n" │ │ + [ 292a] Invalid progressive/lossless parameters at scan script entry %d │ │ + [ 296a] Bogus DQT index %d │ │ + [ 297d] Cannot transcode due to multiple use of quantization table %d │ │ + [ 29bb] Cannot quantize to fewer than %d colors │ │ + [ 29e3] 6b 27-Mar-1998 │ │ + [ 29f3] JFIF extension marker: palette thumbnail image, length %u │ │ + [ 2a2d] Unrecognized component IDs %d %d %d, assuming YCbCr (lossy) or RGB (lossless) │ │ + [ 2a7b] JSIMD_FORCENONE │ │ + [ 2a8b] .notdef │ │ + [ 2a93] BlueValues │ │ + [ 2a9e] OtherBlues │ │ + [ 2aa9] StdHW │ │ + [ 2aaf] StemSnapH │ │ + [ 2ab9] Ordering │ │ + [ 2ac2] RAW_END_SPACE │ │ + [ 2ad3] � │ │ + [ 2adc] � │ │ + [ 2ae6] � │ │ + [ 2aec] fallback-script │ │ + [ 2afc] CC │ │ + [ 2aff] %s:%d: %s │ │ + [ 2b09] 0123456789ABCDEFPX │ │ + [ 2b1c] until │ │ + [ 2b22] %lf │ │ + [ 2b26] ;^A; │ │ + [ 2b2a] _PACKAGE │ │ + [ 2b33] func │ │ + [ 2b38] (error object is not a string) │ │ + [ 2b57] sib │ │ + [ 2b5b] zlib IO error │ │ + [ 2b69] invalid rendering intent │ │ + [ 2b82] unexpected ICC PCS encoding │ │ + [ 2b9e] Image width is zero in IHDR │ │ + [ 2bba] Image width exceeds user limit in IHDR │ │ + [ 2be1] undefined │ │ + [ 2beb] png_image_begin_read_from_stdio: invalid argument │ │ + [ 2c1d] lost rgb to gray │ │ + [ 2c2e] Application must supply a known background gamma │ │ + [ 2c5f] out of place │ │ + [ 2c6c] non-positive height │ │ + [ 2c80] Insufficient memory to process text chunk │ │ + [ 2caa] internal row logic error │ │ + [ 2cc3] cHRM Green Z │ │ + [ 2cd0] Insufficient memory for eXIf chunk data │ │ + [ 2cf8] info change after png_start_read_image or png_read_update_info │ │ + [ 2d37] png_image_write_to_memory: incorrect PNG_IMAGE_VERSION │ │ + [ 2d6e] png_image_write_to_stdio: invalid argument │ │ + [ 2d99] Invalid sRGB rendering intent specified │ │ + [ 2dc1] Invalid cell cardinality. The cardinality was #. │ │ + [ 2df3] actns │ │ + [ 2df9] getmsg_c │ │ + [ 2e02] An Invalid Error Message Type Was Specified │ │ + [ 2e2e] The Symbol Does Not Exist in the Symbol Table │ │ + [ 2e5c] Input Axis Length is Zero │ │ + [ 2e76] CKLPF │ │ + [ 2e7c] There is no file open with handle = # │ │ + [ 2ea2] DAFFNH │ │ + [ 2ea9] SPICE(DAFINVALIDACCESS) │ │ + [ 2ec1] │ │ + [ 2edf] read unexpected character │ │ + [ 2ef9] no end record │ │ + [ 2f07] read start │ │ + [ 2f12] No DAF is currently being searched. │ │ + [ 2f36] rbrec │ │ + [ 2f3c] Could not read record #. IOSTAT was #. │ │ + [ 2f63] ctclas │ │ + [ 2f6a] dtdscs │ │ + [ 2f71] The EK file # could not be loaded; the number of columns (#) in segment # does not match the number of columns (#) in the parent table #. │ │ + [ 2ffb] dtype │ │ + [ 3001] DASOPW │ │ + [ 3008] SPICE(DASWRITEFAIL) │ │ + [ 301c] There is no DAS file open with unit = # │ │ + [ 3044] SPICE(DASFILEREADFAILED) │ │ + [ 305d] Could not write DAS integer record. File = # Record number = #. IOSTAT = #. │ │ + [ 30a9] tbhan │ │ + [ 30af] Error occurred while performing an INQUIRE on a DAS file about to be closed. IOSTAT = #. File handle was #. Logical unit was #. │ │ + [ 3132] no space │ │ + [ 313b] bthfs │ │ + [ 3141] dpstr_ │ │ + [ 3148] SPICE(UNKNOWNFRAME) │ │ + [ 315c] REFCHG │ │ + [ 3163] A request has been made to obtain the transformation from inertial reference frame # to inertial reference frame #. Unfortunately # is not the id-code of a known inertial frame. │ │ + [ 3216] were recognized. │ │ + [ 3227] CKMETA │ │ + [ 322e] SPICE(INVALIDSCLKSTRING) │ │ + [ 3247] Invalid SCLK rate #. │ │ + [ 325c] SPICE(UNKNOWNREFDIR) │ │ + [ 3271] SPKLEF │ │ + [ 3278] The kernel file '#' does not exist. │ │ + [ 329c] The file '#' is opened as a binary SPICE kernel. But it cannot be read using a direct access read. The value of IOSTAT returned by the attempted READ is #. │ │ + [ 333a] PRE │ │ + [ 333e] TARG │ │ + [ 3343] Insufficient ephemeris data has been loaded to compute the position of TARG relative to OBS at the ephemeris epoch #. │ │ + [ 33ba] refpos │ │ + [ 33c1] The routine EQNCPV can reliably evaluate states from equinoctial elements if the eccentricity of the orbit associated with the elements is less than 0.9. The eccentricity associated with the elements supplies is #. The values of H and K are: # and # respectively. │ │ + [ 34cc] HRMESP │ │ + [ 34d3] spke13_ │ │ + [ 34db] btcoef │ │ + [ 34e2] SPICE(PCKKRECTOOLARGE) │ │ + [ 34f9] SPICE(BADAXISNUMBERS) │ │ + [ 350f] Frame identification codes are required to be non-zero. You've specified a frame with ID value zero. │ │ + [ 3576] _RELATIVE │ │ + [ 3580] SPICE(ADDRESSOUTOFBOUNDS) │ │ + [ 359a] #: The kernel pool variable '#' must be of type "CHARACTER". However, the current type is numeric. │ │ + [ 35fe] , # │ │ + [ 3602] WRLINE: An error occurred while attempting to WRITE to │ │ + [ 363a] no ) │ │ + [ 363f] w_ned, unexpected code: %d\n │ │ + [ 365b] ZZBODTRN │ │ + [ 3664] SPICE(BLANKNAMEASSIGNED) │ │ + [ 367d] dpbuf │ │ + [ 3683] utlun │ │ + [ 3689] ZZDDHFNH │ │ + [ 3692] FRAME_#_# │ │ + [ 369c] EARTH │ │ + [ 36a2] Definition of frame # requires definition of body-fixed frame associated with target body #. A call to CIDFRM indicated no body-fixed frame is associated with the target body. This situation can arise when a frame kernel defining the target's body-fixed frame lacks the OBJECT__FRAME or OBJECT__FRAME keywords. The problem also could be caused by an error in a frame kernel in which the parameterized two-vector dynamic frame # is defined. │ │ + [ 3867] AXES │ │ + [ 386c] TO_FRAMES │ │ + [ 3876] Number of crossed tables was #; valid range is 0:# │ │ + [ 38a9] Column index = #; valid range is 1:#.SEGNO = #; RECNO = #; EK = # │ │ + [ 38eb] INT page = #; valid range is [1:#] │ │ + [ 390e] String begin index # must be less than or equal to the end index #. │ │ + [ 3952] Column index = #; valid range is 1:#. │ │ + [ 3978] Pop count must be non-negative; call requests popping # elements. │ │ + [ 39ba] ZZEKSCMP │ │ + [ 39c3] IAU_MERCURY │ │ + [ 39cf] IAU_HELENE │ │ + [ 39da] Parameter '#' is not recognized. │ │ + [ 39fb] PALLENE │ │ + [ 3a03] P12 │ │ + [ 3a07] JUPITER ICY MOONS EXPLORER │ │ + [ 3a22] SAKIGAKE │ │ + [ 3a2b] MARCO-B │ │ + [ 3a33] PHOENIX │ │ + [ 3a3b] DOUBLE ASTEROID REDIRECTION TEST │ │ + [ 3a5c] CHANDRA │ │ + [ 3a64] CH2O │ │ + [ 3a69] MARS 96 │ │ + [ 3a71] MARS96 │ │ + [ 3a78] SPRINT-A │ │ + [ 3a81] SHOEMAKER-LEVY 9-J │ │ + [ 3a94] DUBIAGO │ │ + [ 3a9c] SCHWASSMANN-WACHMANN 3 │ │ + [ 3ab3] SHOEMAKER 1 │ │ + [ 3abf] WILD 2 │ │ + [ 3ac6] SIDING SPRING │ │ + [ 3ad4] DIMORPHOS │ │ + [ 3ade] This version of SPICELIB was originally packaged by NAIF for # hardware using # with the # compiler. This environment has a binary file format of #; however the software is running on an environment that has a binary file format of #. This is a severe problem and may be because the software package was intended for use on a different computer system. It also may be the result of an improper port; please contact NAIF. │ │ + [ 3c86] geo │ │ + [ 3c8a] The first item following the assignment operator should be the value of a variable or a left parenthesis '(' followed by a value for a variable. This is not true on line # of the text kernel file '#'. │ │ + [ 3d54] *e* │ │ + [ 3d58] i:i │ │ + [ 3d5c] mnames │ │ + [ 3d63] At character # of line # in the text buffer the character '@' appears. This character is reserved for identifying time values in assignments to kernel pool variables. However it is not being used in this fashion for the variable '#'. │ │ + [ 3e51] zzrxr_ │ │ + [ 3e58] DPROOM was #; must be in range 0:#. DPFREE was #; must be in range 1:#. │ │ + [ 3ea0] The requested frame '#' is not a recognized inertial frame. │ │ + [ 3edd] ZZTIME │ │ + [ 3ee4] A day of month was identified in the time string "#", but the month it belongs to could not be identified. │ │ + [ 3f50] A seconds components of the time was identified in the time string "#", but the minutes component could not be identified. │ │ + [ 3fcc] Y*y*H*M │ │ + [ 3fd4] Ymii │ │ + [ 3fd9] iimi:i │ │ + [ 3fe0] imi:i:iY │ │ + [ 3fe9] miYi:i │ │ + [ 3ff0] mDYHMS │ │ + [ 3ff7] H*Mm*D*Y │ │ + [ 4000] Y-i-itx │ │ + [ 4008] i-i-itx │ │ + [ 4010] i-i-iti:i:ix │ │ + [ 401d] Y-i-itnx │ │ + [ 4026] he │ │ + [ 4029] jbo │ │ + [ 402d] ain │ │ + [ 4031] arq │ │ + [ 4035] arw │ │ + [ 4039] bgc │ │ + [ 403d] iu │ │ + [ 4040] ka │ │ + [ 4043] kea │ │ + [ 4047] pro │ │ + [ 404b] rug │ │ + [ 404f] sid │ │ + [ 4053] sog │ │ + [ 4057] ter │ │ + [ 405b] vls │ │ + [ 405f] vmf │ │ + [ 4063] heb │ │ + [ 4067] her │ │ + [ 406b] nde │ │ + [ 406f] uig │ │ + [ 4073] ukr │ │ + [ 4077] MZ │ │ + [ 407a] PG │ │ + [ 407d] ARM │ │ + [ 4081] CIV │ │ + [ 4085] CUW │ │ + [ 4089] DEU │ │ + [ 408d] LSO │ │ + [ 4091] MNG │ │ + [ 4095] NLD │ │ + [ 4099] OMN │ │ + [ 409d] SLB │ │ + [ 40a1] SJM │ │ + [ 40a5] SVK │ │ + [ 40a9] TLS │ │ + [ 40ad] UMI │ │ + [ 40b1] ZMB │ │ + [ 40b5] ANT │ │ + [ 40b9] de_DE │ │ + [ 40bf] mr_IN │ │ + [ 40c5] nl_NL │ │ + [ 40cb] rg │ │ + [ 40ce] zzzz │ │ + [ 40d3] /usr/share/zoneinfo/ │ │ + [ 40e8] CHOT │ │ + [ 40ed] HOVST │ │ + [ 40f3] Asia/Krasnoyarsk │ │ + [ 4104] VOLT │ │ + [ 4109] EGST │ │ + [ 410e] PYST │ │ + [ 4113] m49 │ │ + [ 4117] ar_OM │ │ + [ 411d] ar_QA │ │ + [ 4123] es_DO │ │ + [ 4129] fr_HT │ │ + [ 412f] ii_CN │ │ + [ 4135] iu_Latn │ │ + [ 413d] nso_ZA │ │ + [ 4144] uz_Latn │ │ + [ 414c] yo_NG │ │ + [ 4152] i-klingon │ │ + [ 415c] no-bok │ │ + [ 4163] no-nyn │ │ + [ 416a] zh-min │ │ + [ 4171] dsl │ │ + [ 4175] sgn-no │ │ + [ 417c] zh-yue │ │ + [ 4183] ucol_swap(formatVersion=3): magic 0x%08x or format version %02x.%02x is not a collation binary\n │ │ + [ 41e3] ucnv_load │ │ + [ 41ed] other letter │ │ + [ 41fa] start punctuation │ │ + [ 420c] dictionaries │ │ + [ 4219] extensions │ │ + [ 4224] U_CE_NOT_FOUND_ERROR │ │ + [ 4239] U_RULE_MASK_ERROR │ │ + [ 424b] U_MULTIPLE_EXPONENTIAL_SYMBOLS │ │ + [ 426a] U_MULTIPLE_PERMILL_SYMBOLS │ │ + [ 4285] U_MF_MISSING_SELECTOR_ANNOTATION_ERROR │ │ + [ 42ac] U_BRK_INTERNAL_ERROR │ │ + [ 42c1] BIF │ │ + [ 42c5] CVE │ │ + [ 42c9] GMD │ │ + [ 42cd] HNL │ │ + [ 42d1] JPY │ │ + [ 42d5] SVC │ │ + [ 42d9] SZL │ │ + [ 42dd] TJR │ │ + [ 42e1] TJS │ │ + [ 42e5] UYP │ │ + [ 42e9] UYU │ │ + [ 42ed] ZAL │ │ + [ 42f1] latn │ │ + [ 42f6] Overflow │ │ + [ 42ff] +Infinity │ │ + [ 4309] 0.6931471805599453094172321214581765680755 │ │ + [ 4334] M06L │ │ + [ 4339] gram │ │ + [ 433e] many │ │ + [ 4343] superscriptingExponent │ │ + [ 435a] times │ │ + [ 4360] unit │ │ + [ 4365] weekdayOfMonth │ │ + [ 4374] regular │ │ + [ 437c] NumberingSystemRules │ │ + [ 4391] icudt75l-rbnf │ │ + [ 439f] 1234...........IXO..SN..LU...... │ │ + [ 43c0] colStrength │ │ + [ 43cc] collations/default │ │ + [ 43df] tailoring relative to an unassigned code point not supported │ │ + [ 441c] range start greater than end in starred-relation string │ │ + [ 4454] meters_per_AU │ │ + [ 4462] SwappyChoreographer │ │ + [ 4476] ATrace_isEnabled │ │ + [ 4487] Trace │ │ + [ 448d] static void swappy::SwappyGL::onChoreographer(int64_t) │ │ + [ 44c4] lastFrameIncomplete │ │ + [ 44d8] getDefaultDisplay │ │ + [ 44ea] ANativeWindow_setFrameRate │ │ + [ 4505] libunwind: %s - %s\n │ │ + [ 4519] Magnitude limit: {:.2f} │ │ + [ 4531] Cannot read DSO database. │ │ + [ 454b] warpmesh │ │ + [ 4554] invalid fill character '{' │ │ + [ 456f] Font │ │ + [ 4574] K │ │ + [ 4576] Line width range: %s - %s\n │ │ + [ 4591] 00010203040506070809101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899 │ │ + [ 465a] Recording │ │ + [ 4664] {} K │ │ + [ 4669] Loaded cross index {}\n │ │ + [ 4680] CHANNEL_TOP_FRONT_CENTER │ │ + [ 4699] CHANNEL_TOP_FRONT_RIGHT │ │ + [ 46b1] Destination address required │ │ + [ 46ce] No host │ │ + [ 46d6] 0.13.13 │ │ + [ 46de] Failed to load sound file {} │ │ + [ 46fb] AAudioStreamBuilder_setSampleRate │ │ + [ 471d] AAudioStreamBuilder_openStream │ │ + [ 473c] AAudioStream_requestStop │ │ + [ 4755] NULL Capture Device │ │ + [ 4769] Title: │ │ + [ 4770] Sun │ │ + [ 4774] Oct │ │ + [ 4778] darkblue │ │ + [ 4781] darkred │ │ + [ 4789] deepskyblue │ │ + [ 4795] ivory │ │ + [ 479b] paleturquoise │ │ + [ 47a9] powderblue │ │ + [ 47b4] OME │ │ + [ 47b8] Tau │ │ + [ 47c6] locations │ │ + [ 47d0] MinorMoon │ │ + [ 47da] undae │ │ + [ 47e0] capital │ │ + [ 47e8] always │ │ + [ 47ef] minormoonorbits │ │ + [ 47ff] verbosity │ │ + [ 4809] ref │ │ + [ 480d] occludable │ │ + [ 4818] Four arguments expected for celestia:setsafeareainsets() │ │ + [ 4851] Third argument to celestia:setsafeareainsets() must be a number │ │ + [ 4891] setaltazimuthmode │ │ + [ 48a3] Second argument to celestia:print must be a number │ │ + [ 48d6] Values in table-argument to celestia:setconstellationcolor() must be strings │ │ + [ 4923] One argument expected for celestia:getlabelcolor() │ │ + [ 4956] Argument to celestia:settintsaturation must be a number │ │ + [ 498e] First arg to celestia:tojulianday must be a number │ │ + [ 49c1] First arg to celestia:tdbtoutc must be a number │ │ + [ 49f1] second argument to celestia:newrotation must be a number │ │ + [ 4a2a] No arguments expected for celestia:getscripttime │ │ + [ 4a5b] {}.{} │ │ + [ 4a61] internal error: invalid appCore │ │ + [ 4a81] Error: │ │ + [ 4a89] Error running script initialization fragment.\n │ │ + [ 4ab8] KM_PER_MICROLY │ │ + [ 4ac7] debug │ │ + [ 4acd] Ortho │ │ + [ 4ad3] TexParameter │ │ + [ 4ae0] LIGHTING │ │ + [ 4ae9] LINEAR │ │ + [ 4af0] argument 2 to gl.Ortho must be a number │ │ + [ 4b18] argument 4 to gl.Ortho must be a number │ │ + [ 4b40] One argument expected for gl.Enable() │ │ + [ 4b66] bodyfixedframe │ │ + [ 4b75] equatorialframe │ │ + [ 4b85] [Object] │ │ + [ 4b8e] Red, green, and blue color values exepected for object:setorbitcolor() │ │ + [ 4bd5] minormoon │ │ + [ 4bdf] No arguments expected to function object:spectraltype │ │ + [ 4c15] First arg to observer:gotolocation must be a position │ │ + [ 4c4b] First argument to observer:setspeed must be a number │ │ + [ 4c80] First argument to observer:phaseLock must be an object │ │ + [ 4cb7] Argument to phase:getorientation() must be number │ │ + [ 4ce9] Position expected as argument to position:distanceto │ │ + [ 4d1e] imag │ │ + [ 4d23] Invalid access of vector-component │ │ + [ 4d46] specpower │ │ + [ 4d50] Invalid vertex attribute semantic '{}' │ │ + [ 4d77] tristrip │ │ + [ 4d80] │ │ + [ 4d82] earth-sun │ │ + [ 4d8c] jupiter-sun │ │ + [ 4d98] jpl-jupiter-sun │ │ + [ 4da8] Aqr │ │ + [ 4dac] CMa │ │ + [ 4db0] Leo │ │ + [ 4db4] Sgr │ │ + [ 4db8] Tuc │ │ + [ 4dbc] {} DSOs total.\n │ │ Octree has {} nodes and {} DSOs.\n │ │ - [ 4dc0] crosshair │ │ - [ 4dca] FR │ │ - [ 4dcd] TA │ │ - [ 4dd0] Slices │ │ - [ 4dd7] map │ │ - [ 4ddb] Invalid filename in Mesh\n │ │ - [ 4df5] Object has incorrect FixedAttitude syntax.\n │ │ - [ 4e21] Invalid ending date specified for SPICE rotation.\n │ │ - [ 4e54] TwoVector │ │ - [ 4e5e] Center │ │ - [ 4e65] Object '{}' for mean equator frame not found.\n │ │ - [ 4e94] RelativePosition │ │ - [ 4ea5] diff = in_Color;\n │ │ - [ 4eb7] shadowFalloff │ │ - [ 4ec5] vec4 spec = vec4(0.0);\n │ │ - [ 4edd] l * shadow │ │ - [ 4ee8] .st) * spec;\n │ │ - [ 4ef6] overlayTexCoord │ │ - [ 4f06] sampler1D │ │ - [ 4f10] (texCoordBase{} + texCoordDelta{} * in_TexCoord{}.st) │ │ - [ 4f46] ringShadowTexCoordX │ │ - [ 4f5a] vec3 atmEnter = eyePosition + min(0.0, (-rq + d)) * eyeDir;\n │ │ - [ 4f9b] vec3 atmSamplePoint = (atmEnter + atmLeave) * 0.5;\n │ │ - [ 4fd3] rq = dot(atmSamplePointSun, │ │ - [ 4ff4] vec3 sunColor = │ │ - [ 5009] SpecularPower │ │ - [ 5017] Emissive │ │ - [ 5020] CompressTexture │ │ - [ 5030] {} stars in binary database\n │ │ - [ 504d] Total star count: {}\n │ │ - [ 5063] OrbitBarycenter refers to nonexistent star │ │ - [ 508e] ImageDirectory missing in virtual texture.\n │ │ - [ 50ba] Unknown FourCC in DDS file: {}\n │ │ - [ 50da] Found chunk type {}\n │ │ - [ 50ef] Remaining content size {} too small to include material group face array count\n │ │ - [ 513f] Error reading IntPercentage\n │ │ - [ 515c] getW │ │ - [ 5161] (Ljava/lang/String;Ljava/lang/String;DLjava/lang/String;)V │ │ - [ 519c] zh_Hant │ │ - [ 51a4] "subtype": │ │ - [ 51b0] eglGetDisplay() returned error %d │ │ - [ 51d2] domain │ │ - [ 51da] Bogus DAC value 0x%x │ │ - [ 51ef] %4u %4u %4u %4u %4u %4u %4u %4u │ │ - [ 5217] Start Of Frame 0x%02x: width=%u, height=%u, components=%d │ │ - [ 5251] Warning: unknown JFIF revision number %d.%02d │ │ - [ 527f] hinting-engine │ │ - [ 528e] FontDirectory │ │ - [ 529c] FontMatrix │ │ - [ 52a7] WeightVector │ │ - [ 52b4] POINT_SIZE │ │ - [ 52bf] FULL_NAME │ │ - [ 52c9] RAW_PIXELSIZE │ │ - [ 52da] � │ │ - [ 52e2] � │ │ - [ 52e9] � │ │ - [ 52f0] � � │ │ - [ 52f9] AxisLabel │ │ - [ 5303] AxisType │ │ - [ 530c] CharWidth │ │ - [ 5316] EndComposites │ │ - [ 5324] KPH │ │ - [ 5328] TrackKern │ │ - [ 5332] [builtin# │ │ - [ 533c] %d: │ │ - [ 5340] in function <%s:%d> │ │ - [ 5355] == │ │ - [ 5358] ~= │ │ - [ 535b] :: │ │ - [ 535e] local variables │ │ - [ 536e] cannot read %s: %s │ │ - [ 5382] aligned^K__aligned__^Fpacked\n │ │ + [ 4ded] crosshair │ │ + [ 4df7] FR │ │ + [ 4dfa] TA │ │ + [ 4dfd] Slices │ │ + [ 4e04] map │ │ + [ 4e08] Invalid filename in Mesh\n │ │ + [ 4e22] Object has incorrect FixedAttitude syntax.\n │ │ + [ 4e4e] Invalid ending date specified for SPICE rotation.\n │ │ + [ 4e81] TwoVector │ │ + [ 4e8b] Center │ │ + [ 4e92] Object '{}' for mean equator frame not found.\n │ │ + [ 4ec1] RelativePosition │ │ + [ 4ed2] diff = in_Color;\n │ │ + [ 4ee4] shadowFalloff │ │ + [ 4ef2] vec4 spec = vec4(0.0);\n │ │ + [ 4f0a] l * shadow │ │ + [ 4f15] .st) * spec;\n │ │ + [ 4f23] overlayTexCoord │ │ + [ 4f33] sampler1D │ │ + [ 4f3d] (texCoordBase{} + texCoordDelta{} * in_TexCoord{}.st) │ │ + [ 4f73] ringShadowTexCoordX │ │ + [ 4f87] vec3 atmEnter = eyePosition + min(0.0, (-rq + d)) * eyeDir;\n │ │ + [ 4fc8] vec3 atmSamplePoint = (atmEnter + atmLeave) * 0.5;\n │ │ + [ 5000] rq = dot(atmSamplePointSun, │ │ + [ 5021] vec3 sunColor = │ │ + [ 5036] SpecularPower │ │ + [ 5044] Emissive │ │ + [ 504d] CompressTexture │ │ + [ 505d] {} stars in binary database\n │ │ + [ 507a] Total star count: {}\n │ │ + [ 5090] OrbitBarycenter refers to nonexistent star │ │ + [ 50bb] ImageDirectory missing in virtual texture.\n │ │ + [ 50e7] Unknown FourCC in DDS file: {}\n │ │ + [ 5107] Found chunk type {}\n │ │ + [ 511c] Remaining content size {} too small to include material group face array count\n │ │ + [ 516c] Error reading IntPercentage\n │ │ + [ 5189] getW │ │ + [ 518e] (Ljava/lang/String;Ljava/lang/String;DLjava/lang/String;)V │ │ + [ 51c9] zh_Hant │ │ + [ 51d1] "subtype": │ │ + [ 51dd] eglGetDisplay() returned error %d │ │ + [ 51ff] domain │ │ + [ 5207] Bogus DAC value 0x%x │ │ + [ 521c] %4u %4u %4u %4u %4u %4u %4u %4u │ │ + [ 5244] Start Of Frame 0x%02x: width=%u, height=%u, components=%d │ │ + [ 527e] Warning: unknown JFIF revision number %d.%02d │ │ + [ 52ac] hinting-engine │ │ + [ 52bb] FontDirectory │ │ + [ 52c9] FontMatrix │ │ + [ 52d4] WeightVector │ │ + [ 52e1] POINT_SIZE │ │ + [ 52ec] FULL_NAME │ │ + [ 52f6] RAW_PIXELSIZE │ │ + [ 5307] � │ │ + [ 530f] � │ │ + [ 5316] � │ │ + [ 531d] � � │ │ + [ 5326] AxisLabel │ │ + [ 5330] AxisType │ │ + [ 5339] CharWidth │ │ + [ 5343] EndComposites │ │ + [ 5351] KPH │ │ + [ 5355] TrackKern │ │ + [ 535f] [builtin# │ │ + [ 5369] %d: │ │ + [ 536d] in function <%s:%d> │ │ + [ 5382] == │ │ + [ 5385] ~= │ │ + [ 5388] :: │ │ + [ 538b] local variables │ │ + [ 539b] cannot read %s: %s │ │ + [ 53af] aligned^K__aligned__^Fpacked\n │ │ __packed__^Dmode^H__mode__^Kvector_size^O__vector_size__ │ │ - [ 53d2] isdst │ │ - [ 53d8] preload │ │ - [ 53e0] count │ │ - [ 53e6] ICC profile tag outside profile │ │ - [ 5406] Unknown filter method in IHDR │ │ - [ 5424] Application jmp_buf size changed │ │ - [ 5445] Read palette index exceeding num_palette │ │ - [ 546e] rgb color-map: too few entries │ │ - [ 548d] unexpected encoding (internal error) │ │ - [ 54b2] Uninitialized row │ │ - [ 54c4] internal row size calculation error │ │ - [ 54e8] Compression buffer size cannot be reduced below 6 │ │ - [ 551a] profile matches sRGB but writing iCCP instead │ │ - [ 5548] Invalid compression type specified │ │ - [ 556b] Invalid background palette index │ │ - [ 558c] Unrecognized unit type for oFFs chunk │ │ - [ 55b2] msg │ │ - [ 55b6] SPICE(INVALIDMSGTYPE) │ │ - [ 55cc] SPICE(BADGEFVERSION) │ │ - [ 55e1] Checkout Was Attempted When No Routines Were Checked In │ │ - [ 5619] DAFOPR │ │ - [ 5620] NAIF/DAF │ │ - [ 5629] DAFHLU │ │ - [ 5630] unit not connected │ │ - [ 5643] EXCESS │ │ - [ 564a] startio │ │ - [ 5652] The binary file format for file '#' is not native. This routine operates only on files of the native format. │ │ - [ 56bf] selcol │ │ - [ 56c6] The SELECT column index # is out of the valid range 1:# │ │ - [ 56fe] SPICE(INVALIDTYPE) │ │ - [ 5711] The file type is blank. │ │ - [ 572a] DASIOI │ │ - [ 5731] rnbufd │ │ - [ 5738] pooli │ │ - [ 573e] values │ │ - [ 5745] The frame # was not recognized as a known reference frame. │ │ - [ 5781] FRAME_#_NAME │ │ - [ 578e] Kernel variable # is array-valued; Frame name variables must be scalar-valued. │ │ - [ 57dd] OBJECT_#_FRAME │ │ - [ 57ec] Invalid frame specification found in kernel pool: frame name is is # but associated frame ID assignment was not found. │ │ - [ 5863] Case (#) must be U, L, or C. │ │ - [ 5880] EIGHTH │ │ - [ 5887] CONVRT: Neither the input units │ │ - [ 58a8] SPICE(NOAVDATA) │ │ - [ 58b8] Quaternion magnitude at SCLK # was zero. │ │ - [ 58e1] xvals │ │ - [ 58e7] SPICE(CKWRONGDATATYPE) │ │ - [ 58fe] SCARDC │ │ - [ 5905] Could not parse SCLK component # from # as a number. │ │ - [ 593a] setmsg_c │ │ - [ 5943] The computed index is too large to be represented as an integer. The most likely problem is that an incorrect value was stored for the step size. The value found for the step was: # │ │ - [ 59f9] SPICE(INQUIREERROR) │ │ - [ 5a0d] SPICE(FILENOTFOUND) │ │ - [ 5a21] DASETF │ │ - [ 5a28] spkgps_ │ │ - [ 5a30] SPICE(BADECCENTRICITY) │ │ - [ 5a47] SPICE(ZEROPOSITION) │ │ - [ 5a5b] SPICE(NONCONICMOTION) │ │ - [ 5a71] spkr05_ │ │ - [ 5a79] bnphas │ │ - [ 5a80] bwc │ │ - [ 5a84] costh │ │ - [ 5a8a] ANGLES │ │ - [ 5a91] SPICE(MISSINGTIMEINFO) │ │ - [ 5aa8] %.9G │ │ - [ 5aad] XPOSBL │ │ - [ 5ab4] The number of columns in the matrix is not positive. The number of columns is #. │ │ - [ 5b05] ZZBODKIK │ │ - [ 5b0e] SPICE(BUG3) │ │ - [ 5b1a] ZZCTRINC │ │ - [ 5b23] Could not read DAS file record. File is #. IOSTAT was #. File's BFF integer code is #. │ │ - [ 5b7a] uthan │ │ - [ 5b80] The DAF, '#', appears to contain no data. As such, its binary file format can not be determined which prevents it from being loaded. │ │ - [ 5c06] SPICE(DSKTOOMANYFILES) │ │ - [ 5c1d] SPICE(NOLOADEDDSKFILES) │ │ - [ 5c35] The kernel variable # has used to define frame # was expected to have size not exceeding 1 but in fact has size #. Usually this type of problem is due to an error in a frame definition provided in a frame kernel. │ │ - [ 5d0a] BODS2C │ │ - [ 5d11] RELATIVE │ │ - [ 5d1a] Definition of frame # specifies aberration correction # for constant vector. Light time and stellar aberration corrections are mutually exclusive for constant vectors used in two-vector parameterized dynamic frame definitions. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 5e5d] Iteration limit # exceeded in NEARPT. A, B, C = # # #; POSITN = ( #, #, # ). LOWER = #; UPPER = #; UPPER-LOWER = #. Solution pass number = #. This event should never occur. Contact NAIF. │ │ - [ 5f19] STELAB │ │ - [ 5f20] Substring upper bound must not be less than lower bound. Actual range [BPOS,EPOS] was [#,#]. │ │ - [ 5f7e] Number of order-by columns must be positive but was #. │ │ - [ 5fb5] cdat │ │ - [ 5fba] zzekkey_ │ │ - [ 5fc3] ZZEKLLEC │ │ - [ 5fcc] ZZEKPGCH │ │ - [ 5fd5] File # has last char address #; `top' = #. │ │ - [ 6000] CHR_BUF_SIZE │ │ - [ 600d] Invalid string bounds #:# for column #. │ │ - [ 6035] PRTENC │ │ - [ 603c] ZZEKPGBS │ │ - [ 6045] ZZEKRD06 │ │ - [ 604e] IAU_GANYMEDE │ │ - [ 605b] IAU_PROTEUS │ │ - [ 6067] IAU_THEMISTO │ │ - [ 6074] IAU_HARPALYKE │ │ - [ 6082] IAU_DIDYMOS_BARYCENTER │ │ - [ 6099] PLUTO_BARYCENTER │ │ - [ 60aa] EUROPA │ │ - [ 60b1] GANYMEDE │ │ - [ 60ba] AOEDE │ │ - [ 60c0] JANUS │ │ - [ 60c6] METHONE │ │ - [ 60ce] VG1 │ │ - [ 60d2] EDM │ │ - [ 60d6] HUYGENS PROBE │ │ - [ 60e4] EXM RSP RM │ │ - [ 60ef] GALILEO PROBE │ │ - [ 60fd] SM1 │ │ - [ 6101] PSYC │ │ - [ 6106] SHOEMAKER-LEVY 9-U │ │ - [ 6119] SHOEMAKER-LEVY 9-L │ │ - [ 612c] SHOEMAKER-LEVY 9-A │ │ - [ 613f] BROOKS 2 │ │ - [ 6148] DUTOIT-NEUJMIN-DELPORTE │ │ - [ 6160] HARRINGTON │ │ - [ 616b] KOWAL-MRKOS │ │ - [ 6177] REINMUTH 1 │ │ - [ 6182] SLAUGHTER-BURNHAM │ │ - [ 6194] TSUCHINSHAN 2 │ │ - [ 61a2] HYAKUTAKE │ │ - [ 61ac] HALE-BOPP │ │ - [ 61b6] ARROKOTH │ │ - [ 61bf] DSS-36 │ │ - [ 61c6] is a transfer format file. Transfer format files cannot be loaded. │ │ - [ 620a] stl │ │ - [ 620e] w* │ │ - [ 6211] │ │ - [ 7fe2] ET │ │ - [ 7fe6] needy │ │ - [ 7fec] ZZINIL │ │ - [ 7ff3] Unknown value for OPMODE. Value # not coded in zzsgp4.inc. │ │ - [ 802e] Kernel variables for the switch frame having frame ID # have mismatched sizes: number of base frames = #; number of start times = #; number of stop times = #. │ │ - [ 80cd] SPICE(FRAMEINFONOTFOUND) │ │ - [ 80e6] AM/PM indicator │ │ - [ 80f6] AD │ │ - [ 80f9] TUESDAY │ │ - [ 8101] H │ │ - [ 8103] Two substrings representing seconds were identified in the input time string <#> and <#>: " │ │ - [ 815f] Yii │ │ - [ 8163] i-Ydi:i:i │ │ - [ 816d] i-Ydi:i:n │ │ - [ 8177] i:nimY │ │ - [ 817e] iim │ │ - [ 8182] iimiii │ │ - [ 8189] iimin │ │ - [ 818f] imYi:n │ │ - [ 8196] imYn │ │ - [ 819b] imi │ │ - [ 819f] H*M*Sm*D*Y │ │ - [ 81aa] zzxlatei_ │ │ - [ 81b4] ae │ │ - [ 81b7] az │ │ - [ 81ba] bla │ │ - [ 81be] eka │ │ - [ 81c2] fur │ │ - [ 81c6] gon │ │ - [ 81ca] izh │ │ - [ 81ce] lun │ │ - [ 81d2] mwl │ │ - [ 81d6] myv │ │ - [ 81da] ne │ │ - [ 81dd] stq │ │ - [ 81e1] sux │ │ - [ 81e5] sw │ │ - [ 81e8] tru │ │ - [ 81ec] aka │ │ - [ 81f0] ava │ │ - [ 81f4] BA │ │ - [ 81f7] BO │ │ - [ 81fa] KZ │ │ - [ 81fd] SM │ │ - [ 8200] UY │ │ - [ 8203] BVT │ │ - [ 8207] BLZ │ │ - [ 820b] GTM │ │ - [ 820f] MLT │ │ - [ 8213] NOR │ │ - [ 8217] bs_BA │ │ - [ 821d] MAGST │ │ - [ 8223] Asia/Novosibirsk │ │ - [ 8234] Asia/Yekaterinburg │ │ - [ 8247] America/Montevideo │ │ - [ 825a] ar_SY │ │ - [ 8260] az_Cyrl │ │ - [ 8268] en_029 │ │ - [ 826f] fr_BE │ │ - [ 8275] fr_MC │ │ - [ 827b] hsb_DE │ │ - [ 8282] mi_NZ │ │ - [ 8288] ne_IN │ │ - [ 828e] tg_Cyrl │ │ - [ 8296] fsl │ │ - [ 829a] %%ALIAS │ │ - [ 82a2] pool │ │ - [ 82a7] ures_swapResource(table res=%08x).uprv_sortArray(%d items) failed\n │ │ - [ 82ea] u_cleanup │ │ - [ 82f4] ucol_nextSortKeyPart │ │ - [ 8309] gregorian │ │ - [ 8313] {0} ({1}) │ │ - [ 831d] surrogate │ │ - [ 8327] U_STATE_TOO_OLD_ERROR │ │ - [ 833d] U_PLUGIN_CHANGED_LEVEL_WARNING │ │ - [ 835c] U_MISSING_OPERATOR │ │ - [ 836f] U_MALFORMED_EXPONENTIAL_PATTERN │ │ - [ 838f] U_MF_SYNTAX_ERROR │ │ - [ 83a1] U_MF_NONEXHAUSTIVE_PATTERN_ERROR │ │ - [ 83c2] U_MF_DUPLICATE_DECLARATION_ERROR │ │ - [ 83e3] U_REGEX_INTERNAL_ERROR │ │ - [ 83fa] U_REGEX_INVALID_BACK_REF │ │ - [ 8413] U_IDNA_VERIFICATION_ERROR │ │ - [ 842d] AZM │ │ - [ 8431] BGM │ │ - [ 8435] BHD │ │ - [ 8439] BOB │ │ - [ 843d] BRC │ │ - [ 8441] CUP │ │ - [ 8445] DZD │ │ - [ 8449] FIM │ │ - [ 844d] HUF │ │ - [ 8451] ISK │ │ - [ 8455] ITL │ │ - [ 8459] KGS │ │ - [ 845d] LVL │ │ - [ 8461] MDC │ │ - [ 8465] SDG │ │ - [ 8469] VNN │ │ - [ 846d] │ │ - [ 8491] decimalFormat │ │ - [ 849f] +Subnormal │ │ - [ 84aa] M05L │ │ - [ 84af] square-meter │ │ - [ 84bc] ROK │ │ - [ 84c0] mile │ │ - [ 84c5] candela │ │ - [ 84cd] lumen │ │ - [ 84d3] horsepower │ │ - [ 84de] pint │ │ - [ 84e3] animate │ │ - [ 84eb] =0 │ │ - [ 84ee] pow3- │ │ - [ 84f4] ender │ │ - [ 84fa] middle │ │ - [ 8501] zone │ │ - [ 8506] [import langTag] failed │ │ - [ 851e] ft3_to_m3 │ │ - [ 8528] shaku_to_m │ │ - [ 8533] ATrace_beginAsyncSection │ │ - [ 854c] mCommonSettings.refreshPeriod │ │ - [ 856a] PREVIEW_SDK_INT │ │ - [ 857a] Buckets: │ │ - [ 8597] Alt-azimuth mode enabled │ │ - [ 85b0] Star color: Blackbody (Solar Whitepoint) │ │ - [ 85d9] limit of knowledge │ │ - [ 85ec] Unknown temperature scale {}\n │ │ - [ 860a] ask │ │ - [ 860e] frame axes │ │ - [ 8619] %u %i │ │ - [ 861f] au │ │ - [ 8622] AU/s │ │ - [ 8627] Planetary companions present\n │ │ - [ 8645] Mass: {} Me\n │ │ - [ 8652] Channel Map Out: {%s}\n │ │ - [ 8676] CHANNEL_FRONT_RIGHT_CENTER │ │ - [ 8691] CHANNEL_AUX_22 │ │ - [ 86a0] Resource does not exist │ │ - [ 86b8] Path too long │ │ - [ 86c6] Protocol family not supported │ │ - [ 86e4] Operation cancelled │ │ - [ 86f8] No device │ │ - [ 8702] wav │ │ - [ 8706] sndio │ │ - [ 870c] AAudioStreamBuilder_setErrorCallback │ │ - [ 8731] AAudioStreamBuilder_setUsage │ │ - [ 874e] SL_IID_ANDROIDSIMPLEBUFFERQUEUE │ │ - [ 876e] [OpenSL] Cannot find symbol %s │ │ - [ 878d] [OpenSL] Failed to realize output mix object. │ │ - [ 87bb] [OpenSL] Failed to enqueue buffer for capture device. │ │ - [ 87f1] wb │ │ - [ 87f4] &ow={}&ox={}&oy={}&oz={} │ │ - [ 880d] ts │ │ - [ 8810] rf │ │ - [ 8813] {} │ │ - [ 8816] {:%Y %b %d %H:%M:%S %z} │ │ - [ 882e] Thursday │ │ - [ 8837] darkslateblue │ │ - [ 8845] dimgray │ │ - [ 884d] lightblue │ │ - [ 8857] olive │ │ - [ 885d] BET │ │ - [ 8861] rima │ │ - [ 8866] virga │ │ - [ 886c] cancel │ │ - [ 8873] renderpath │ │ - [ 887e] channel │ │ - [ 8886] level │ │ - [ 888c] No arguments expected for celestia:getsafeareainsets() │ │ - [ 88c3] setlabelflags │ │ - [ 88d1] getstarcolor │ │ - [ 88de] getstarcount │ │ - [ 88eb] Metatable for │ │ - [ 88fa] bindtranslationdomain │ │ - [ 8910] Four arguments expected for celestia:setlabelcolor() │ │ - [ 8945] Sixth arg to celestia:tojulianday must be a number │ │ - [ 8978] Fourth arg to celestia:utctotdb must be a number │ │ - [ 89a9] None or one argument expected for celestia:geturl │ │ - [ 89db] Second argument of celestia:bindtranslationdomain must be directory name string. │ │ - [ 8a2c] celestia-savedrenderflags │ │ - [ 8a46] {}\n │ │ - [ 8a4a] argument 2 to gl.Vertex must be a number │ │ - [ 8a73] argument 1 to gl.Begin must be a number │ │ - [ 8a9b] No arguments expected for texture:bind() │ │ - [ 8ac4] Bad position object! │ │ - [ 8ad9] Argument to object:setvisible() must be a boolean │ │ - [ 8b0b] One argument expected to object:setorbitcoloroverridden │ │ - [ 8b43] planet │ │ - [ 8b4a] hubbleType │ │ - [ 8b55] String argument expected │ │ - [ 8b6e] miescaleheight │ │ - [ 8b7d] getsurface │ │ - [ 8b88] Fourth arg to observer:gotoobject must be a number │ │ - [ 8bbb] One argument expected for observer:chase │ │ - [ 8be4] No argument expected for observer:singleview() │ │ - [ 8c13] No arguments allowed for to phase:orbitframe │ │ - [ 8c40] [Position] │ │ - [ 8c4b] No arguments expected for position:gety() │ │ - [ 8c75] material │ │ - [ 8c7e] tangent │ │ - [ 8c86] #celmodel_binary │ │ - [ 8c97] opacity {}\n │ │ - [ 8ca3] normal │ │ - [ 8cab] ub4\n │ │ - [ 8cb0] htc20-telesto │ │ - [ 8cbe] non-native │ │ - [ 8cc9] iau-adrastea │ │ - [ 8cd6] {:02} │ │ - [ 8cdd] Lyr │ │ - [ 8ce1] {}/{} │ │ - [ 8ce7] Error parsing deep sky catalog file: bad name.\n │ │ - [ 8d17] Bad Deep Sky Object definition--will continue parsing file.\n │ │ - [ 8d54] SBa │ │ - [ 8d58] GL_ARB_texture_filter_anisotropic │ │ - [ 8d7a] FT │ │ - [ 8d7d] ER │ │ - [ 8d80] CB │ │ - [ 8d83] Object has incorrect syntax for SampledTrajectory.\n │ │ - [ 8db7] Kernel list for SPICE orbit is neither a string nor array of strings\n │ │ - [ 8dfd] Eccentricity │ │ - [ 8e0a] Invalid beginning date specified for SPICE rotation.\n │ │ - [ 8e40] Bad syntax for secondary axis of two-vector frame.\n │ │ - [ 8e74] pc │ │ - [ 8e77] rad │ │ - [ 8e7b] color = texture2D(diffTex, │ │ - [ 8e97] .st);\n │ │ - [ 8e9e] color = vec4(1.0);\n │ │ - [ 8eb2] + │ │ - [ 8eb6] color = texture2D(diffTex, diffTexCoord.st);\n │ │ - [ 8ee4] // PARTICLE SHADER\n │ │ - [ 8ef8] ModelViewMatrix │ │ - [ 8f08] ProjectionMatrix │ │ - [ 8f19] cosNormalLightDir │ │ - [ 8f2b] GeomAlbedo │ │ - [ 8f36] BondAlbedo │ │ - [ 8f41] DC │ │ - [ 8f44] Barycenter │ │ - [ 8f4f] lores │ │ - [ 8f55] DDS file {} has bad surface desc.\n │ │ - [ 8f78] Unsupported format for DDS texture file {}.\n │ │ - [ 8fa5] Error skipping {} trailing bytes\n │ │ - [ 8fc7] Processing MaterialAmbient chunk\n │ │ - [ 8fe9] ()V │ │ - [ 8fed] \ufffd │ │ - [ 8ff4] eglCreateWindowSurface() returned error %d │ │ - [ 9020] msgctxt │ │ - [ 9029] Suspension not allowed here │ │ - [ 9045] Bogus DHT index %d │ │ - [ 9058] Invalid JPEG file structure: two SOI markers │ │ - [ 9085] with %d x %d thumbnail image │ │ - [ 90a6] Inconsistent progression sequence for component %d coefficient %d │ │ - [ 90e8] BlueScale │ │ - [ 90f2] FontName │ │ - [ 90fb] lenBuildCharArray │ │ - [ 910d] 8859 │ │ - [ 9112] FOUNDRY │ │ - [ 911a] RAW_POINT_SIZE │ │ - [ 9129] RAW_SUBSCRIPT_Y │ │ - [ 9139] STRIKEOUT_ASCENT │ │ - [ 914a] STRIKEOUT_DESCENT │ │ - [ 915c] _MULE_BASELINE_OFFSET │ │ - [ 9172] W1X │ │ - [ 9176] metamethod │ │ - [ 9181] Snlf │ │ - [ 9186] bytecode instructions │ │ - [ 919c] _G │ │ - [ 919f] too many captures │ │ - [ 91b1] too many arguments │ │ - [ 91c4] yday │ │ - [ 91c9] open │ │ - [ 91ce] 'package.loaders' must be a table │ │ - [ 91f0] Linux │ │ - [ 91f6] Invalid image height in IHDR │ │ - [ 9213] rgb+alpha color-map: too few entries │ │ - [ 9238] bad width format │ │ - [ 9249] no space in chunk cache │ │ - [ 9261] Invalid interlace type specified │ │ - [ 9282] SPICE(EMPTYSTRING) │ │ - [ 9295] op │ │ - [ 9298] EXPLAIN │ │ - [ 92a0] Version Identification of GEF File is Invalid │ │ - [ 92ce] SPICE(INCOMPATIBLEUNITS) │ │ - [ 92e7] SPICE(WINDOWTOOSMALL) │ │ - [ 92fd] iswhsp_c │ │ - [ 9306] There is no room left in KEEPER to load another SPICE kernel. The current limit on the number of files that can be loaded is #. If you really need more than this many files, you should increase the parameter MAXFIL in the subroutine KEEPER. │ │ - [ 93fa] SPICE(RECURSIVELOADING) │ │ - [ 9412] CK │ │ - [ 9415] CKUPF │ │ - [ 941b] RESUME │ │ - [ 9422] The file, '#', connected to unit # is not a DAF. │ │ - [ 9453] ZERO │ │ - [ 9458] truncation failed in endfile │ │ - [ 9475] No address for record #, word #. │ │ - [ 9496] cdue │ │ - [ 949b] DAFBBS │ │ - [ 94a2] SPICE(EKSEGTABLEFULL) │ │ - [ 94b8] The EK file # could not be loaded; the segment # contains duplicate column names in table #. │ │ - [ 9515] EKUEF │ │ - [ 951b] fort.%ld │ │ - [ 9524] CARDC │ │ - [ 952a] SPICE(INSUFFLEN) │ │ - [ 953b] hnbufd │ │ - [ 9542] SPICE(INVALIDSUBLIST) │ │ - [ 9558] PCKBSR │ │ - [ 955f] chvals │ │ - [ 9566] GCPOOL │ │ - [ 956d] SPICE(BADVARNAME) │ │ - [ 957f] INSLAI │ │ - [ 9586] rot2 │ │ - [ 958b] REMLAI │ │ - [ 9592] cnvrtn │ │ - [ 9599] Segment does not contain angular velocity data. │ │ - [ 95c9] Beginning address (#) greater than ending address (#). │ │ - [ 9600] vbuff │ │ - [ 9606] CKE02 │ │ - [ 960c] CKR06 │ │ - [ 9612] Input file # has architecture #. The file must be a binary SPK file to be readable by this routine. If the input file is an SPK file in transfer format, run TOBIN on the file to convert it to binary format. │ │ - [ 96e2] The file name is blank. │ │ - [ 96fa] IOSTAT error in INQUIRE statement. IOSTAT = #. │ │ - [ 9729] SPKPVN │ │ - [ 9730] sbound │ │ - [ 9737] SPKE17 │ │ - [ 973e] SPICE(BADSEMIAXIS) │ │ - [ 9751] SPKE21 │ │ - [ 9758] SPKR18 │ │ - [ 975f] Unexpected SPK type 18 subtype # found in type 18 segment. │ │ - [ 979a] SPICE(DEGREEOUTOFRANGE) │ │ - [ 97b2] NUT_PREC_PM │ │ - [ 97be] LOCATI │ │ - [ 97c5] SPICE(BADVARIABLESIZE) │ │ - [ 97dc] SPICE(NAMESDONOTMATCH) │ │ - [ 97f3] lio │ │ - [ 97f7] no imaginary part │ │ - [ 9809] SPICE(BADCOLUMNCOUNT) │ │ - [ 981f] bmat │ │ - [ 9824] Could not read non-native DAS integer record into character array. File = # Record number = #. IOSTAT = #. │ │ - [ 988f] DLABBS │ │ - [ 9896] ZZDYNBID │ │ - [ 989f] Variable # not found after DTPOOL indicated it was present in pool. │ │ - [ 98e3] ZZDYNFRM │ │ - [ 98ec] AXIS │ │ - [ 98f1] EULER │ │ - [ 98f7] rrows │ │ - [ 98fd] Column # should be CHR but has type #. │ │ - [ 9924] namidx │ │ - [ 992b] IAU_MERCURY_BARYCENTER │ │ - [ 9942] IAU_JUPITER │ │ - [ 994e] IAU_CALLISTO │ │ - [ 995b] IAU_TITANIA │ │ - [ 9967] IAU_THALASSA │ │ - [ 9974] IAU_CHALDENE │ │ - [ 9981] IAU_NIX │ │ - [ 9989] The reference frame # is a dynamic frame. Dynamic frames may not be used at recursion level 1. │ │ - [ 99e8] USED ITEM COUNT │ │ - [ 99f8] CALLISTO │ │ - [ 9a01] ALBIORIX │ │ - [ 9a0a] TARQEQ │ │ - [ 9a11] MOM │ │ - [ 9a15] WIND │ │ - [ 9a1a] LP │ │ - [ 9a1d] VIKING 1 ORBITER │ │ - [ 9a2e] GRAIL-B │ │ - [ 9a36] CLUSTER 1 │ │ - [ 9a40] NSYT │ │ - [ 9a45] SHOEMAKER-LEVY 9-V │ │ - [ 9a58] SHOEMAKER-LEVY 9-R │ │ - [ 9a6b] AREND │ │ - [ 9a71] BRADFIELD │ │ - [ 9a7b] DANIEL │ │ - [ 9a82] DENNING-FUJIKAWA │ │ - [ 9a93] MAURY │ │ - [ 9a99] SHOEMAKER-LEVY 1 │ │ - [ 9aaa] NOTO │ │ - [ 9aaf] DSS-43 │ │ - [ 9ab6] COMPILER │ │ - [ 9abf] zzdynrt0_ │ │ - [ 9ac9] A kernel variable was not properly formed on line # of the file #. Such an assignment should have the form: ' [+]= '. This line was '#'. │ │ - [ 9b6a] n │ │ - [ 9b6c] Mmi │ │ - [ 9b70] MmD │ │ - [ 9b74] The month specified, #, was not an integer. The month must be an integer in the range from 1 to 12. │ │ - [ 9bd9] TTRANS │ │ - [ 9be0] TAI │ │ - [ 9be5] YMWDF │ │ - [ 9bec] The seconds component of '#' is out of range. In the specified time zone (#) leapseconds can occur during the year # only in the second that immediately follows the time #:#:59 on # # and # #. │ │ - [ 9caf] AM │ │ - [ 9cb2] DD │ │ - [ 9cb5] Two substrings representing minutes of the hour were identified in the input time string <#> and <#>: " │ │ - [ 9d1d] Y-i/i:i:n │ │ - [ 9d27] Yimi:n │ │ - [ 9d2e] Ymii:i:n │ │ - [ 9d37] i-idi:n │ │ - [ 9d3f] i-iti:n │ │ - [ 9d47] i:i:iimY │ │ - [ 9d50] i-i-itn │ │ - [ 9d58] i:i:ii-i-Y │ │ - [ 9d63] ZZTWOVXF │ │ - [ 9d6c] und_ │ │ - [ 9d71] ab │ │ - [ 9d74] brx │ │ - [ 9d78] dua │ │ - [ 9d7c] es │ │ - [ 9d7f] fj │ │ - [ 9d82] kam │ │ - [ 9d86] khw │ │ - [ 9d8a] kk │ │ - [ 9d8d] oc │ │ - [ 9d90] sat │ │ - [ 9d94] sbp │ │ - [ 9d98] sdh │ │ - [ 9d9c] sm │ │ - [ 9d9f] bre │ │ - [ 9da3] iii │ │ - [ 9da7] mri │ │ - [ 9dab] mkd │ │ - [ 9daf] rus │ │ - [ 9db3] ven │ │ - [ 9db7] CQ │ │ - [ 9dba] ES │ │ - [ 9dbd] JO │ │ - [ 9dc0] KN │ │ - [ 9dc3] MG │ │ - [ 9dc6] NA │ │ - [ 9dc9] PK │ │ - [ 9dcc] BRB │ │ - [ 9dd0] CHE │ │ - [ 9dd4] CHN │ │ - [ 9dd8] FIN │ │ - [ 9ddc] FJI │ │ - [ 9de0] UGA │ │ - [ 9de4] my_MM │ │ - [ 9dea] heploc │ │ - [ 9df1] hepburn │ │ - [ 9df9] __system_property_read_callback │ │ - [ 9e19] KRAT │ │ - [ 9e1e] PMDT │ │ - [ 9e23] FKST │ │ - [ 9e28] ar_IQ │ │ - [ 9e2e] dz_BT │ │ - [ 9e34] es_BO │ │ - [ 9e3a] es_PY │ │ - [ 9e40] fa_AF │ │ - [ 9e46] fo_FO │ │ - [ 9e4c] fr_015 │ │ - [ 9e53] fr_029 │ │ - [ 9e5a] no_NO_NY │ │ - [ 9e63] sah_RU │ │ - [ 9e6a] xh_ZA │ │ - [ 9e70] en-gb-oed │ │ - [ 9e7a] i-tao │ │ - [ 9e80] vgt │ │ - [ 9e84] res_index │ │ - [ 9e8e] Regions │ │ - [ 9e96] currency │ │ - [ 9e9f] space separator │ │ - [ 9eaf] U_INPUT_TOO_LONG_ERROR │ │ - [ 9ec6] U_DIFFERENT_UCA_VERSION │ │ - [ 9ede] U_MALFORMED_UNICODE_ESCAPE │ │ - [ 9ef9] U_MULTIPLE_DECIMAL_SEPARATORS │ │ - [ 9f17] U_MF_OPERAND_MISMATCH_ERROR │ │ - [ 9f33] U_REGEX_NUMBER_TOO_BIG │ │ - [ 9f4a] U_REGEX_TIME_OUT │ │ - [ 9f5b] U_REGEX_INVALID_CAPTURE_GROUP_NAME │ │ - [ 9f7e] AOR │ │ - [ 9f82] BRL │ │ - [ 9f86] BYN │ │ - [ 9f8a] CHW │ │ - [ 9f8e] ERN │ │ - [ 9f92] GHC │ │ - [ 9f96] MKN │ │ - [ 9f9a] MNT │ │ - [ 9f9e] MZE │ │ - [ 9fa2] SBD │ │ - [ 9fa6] VUV │ │ - [ 9faa] frequency │ │ - [ 9fb4] BGJ │ │ - [ 9fb8] ohm │ │ - [ 9fbc] centimeter │ │ - [ 9fc7] ounce │ │ - [ 9fcd] fluid-ounce │ │ - [ 9fd9] accusative │ │ - [ 9fe4] plusSign │ │ - [ 9fed] ero │ │ - [ 9ff1] cubic- │ │ - [ 9ff8] /patternsLong │ │ - [ a006] tailoring primary after ignorables not supported │ │ - [ a037] factor │ │ - [ a03e] processor │ │ - [ a048] void swappy::SwappyCommon::startFrame() │ │ - [ a070] Swappy: CPU frame time │ │ - [ a087] charentered │ │ - [ a093] Error opening constellation boundaries file {}.\n │ │ - [ a0c4] Found non-string value in {} array.\n │ │ - [ a0e9] local │ │ - [ a0ef] phaselock │ │ - [ a0f9] Failed to get default measurement system {}, fallback to Metric system │ │ - [ a140] Earth │ │ - [ a146] invalid format │ │ - [ a155] {:.2f}" │ │ - [ a15d] Mpc │ │ - [ a161] ft │ │ - [ a164] Error opening {}\n │ │ - [ a176] Failed to load symbol: %s\n │ │ - [ a191] Channels: %d -> %d\n │ │ - [ a1ac] CHANNEL_BACK_LEFT │ │ - [ a1be] CHANNEL_AUX_0 │ │ - [ a1cc] CHANNEL_AUX_5 │ │ - [ a1da] CHANNEL_AUX_8 │ │ - [ a1e8] Unknown error │ │ - [ a1f6] flac │ │ - [ a1fb] Failed to start playing sound file {} │ │ - [ a221] AAudioStream_getFormat │ │ - [ a238] SL_IID_PLAY │ │ - [ a244] WAVE │ │ - [ a249] track │ │ - [ a24f] August │ │ - [ a256] Could not open font {}\n │ │ - [ a26e] brown │ │ - [ a274] mediumorchid │ │ - [ a281] oldlace │ │ - [ a289] .dds │ │ - [ a28e] .celx │ │ - [ a294] ~/.local/share │ │ - [ a2a3] TET │ │ - [ a2a7] Beta │ │ - [ a2ac] Iota │ │ - [ a2b1] Nu │ │ - [ a2b7] markers │ │ - [ a2bf] oceanus │ │ - [ a2c7] other │ │ - [ a2cd] planetorbits │ │ - [ a2da] setactiveview │ │ - [ a2e8] lookback │ │ - [ a2f1] fuzzypoints │ │ - [ a2fd] duration │ │ - [ a306] jd │ │ - [ a309] settimescale │ │ - [ a316] getdsocount │ │ - [ a322] takescreenshot │ │ - [ a331] createcelscript │ │ - [ a341] setaudiopan │ │ - [ a34d] One to four arguments expected to function celestia:printatpixel │ │ - [ a38e] Arguments to celestia:showlabel() must be strings │ │ - [ a3c0] Arguments to celestia:hidelabel() must be strings │ │ - [ a3f2] Argument to celestia:hideconstellations() must be a table │ │ - [ a42c] First argument to celestia:setconstellationcolor() must be a number │ │ - [ a470] No or one argument expected to function celestia:paused │ │ - [ a4a8] point │ │ - [ a4ae] Fourth arg to celestia:tojulianday must be a number │ │ - [ a4e2] One or two arguments expected for celestia:seturl │ │ - [ a514] WARNING:\n │ │ + [ 70c2] mat4 │ │ + [ 70c7] = NL;\n │ │ + [ 70cf] = pow(NH, shininess);\n │ │ + [ 70e7] {} = │ │ + [ 70ed] float rq = dot(eyePosition, eyeDir);\n │ │ + [ 7117] float density = 0.0;\n │ │ + [ 7131] shadowDepths.{} │ │ + [ 7141] in_TexCoord1 │ │ + [ 714e] Location │ │ + [ 7157] Outer │ │ + [ 715d] X │ │ + [ 715f] entry missing name and catalog number │ │ + [ 7185] jpeg │ │ + [ 718a] Negative trailing chunk size {} detected │ │ + [ 71b3] Processing MeshMatrix chunk\n │ │ + [ 71d0] Minor Moons │ │ + [ 71dc] \u%04x\u%04x │ │ + [ 71e9] Initializing context │ │ + [ 71fe] jX │ │ + [ 7201] a │ │ + [ 7203] Read from EMS failed │ │ + [ 7218] Cannot quantize more than %d color components │ │ + [ 7246] Cannot quantize to more than %d colors │ │ + [ 726d] Define Huffman Table 0x%02x │ │ + [ 7289] Quantizing to %d = %d*%d*%d colors │ │ + [ 72ac] At marker 0x%02x, recovery action %d │ │ + [ 72d1] Smoothing not supported with nonstandard sampling ratios │ │ + [ 730a] % │ │ + [ 730c] Bold │ │ + [ 7311] %!FontType │ │ + [ 731c] LanguageGroup │ │ + [ 732a] FONT_ASCENT │ │ + [ 7336] CAP_HEIGHT │ │ + [ 7341] STARTCHAR │ │ + [ 734f] � │ │ + [ 7358] � � │ │ + [ 7361] userdata │ │ + [ 736a] in main chunk │ │ + [ 7379] char(%d) │ │ + [ 7382] %s%s │ │ + [ 7387] running │ │ + [ 738f] string.buffer │ │ + [ 739d] table.clear │ │ + [ 73a9] source │ │ + [ 73b0] invalid sRGB rendering intent │ │ + [ 73ce] intent outside defined range │ │ + [ 73eb] Libpng jmp_buf still allocated │ │ + [ 740a] .Too many IDATs found │ │ + [ 7420] lost/gained channels │ │ + [ 7435] invalid file gamma in png_set_gamma │ │ + [ 7459] png_do_rgb_to_gray found nongray pixel │ │ + [ 7480] Read failure in png_handle_zTXt │ │ + [ 74a0] unhandled critical chunk │ │ + [ 74b9] invalid user transform pixel depth │ │ + [ 74dc] Insufficient memory to store text │ │ + [ 74fe] png_set_sPLT: invalid sPLT │ │ + [ 7519] png_image_write_: out of memory │ │ + [ 7539] Invalid bit depth for grayscale image │ │ + [ 755f] Unrecognized equation type for pCAL chunk │ │ + [ 7589] compressed data too long │ │ + [ 75a2] SHORT │ │ + [ 75a8] Invalid Radius--Equatorial or Polar Radius is Zero │ │ + [ 75db] srcfil │ │ + [ 75e2] + │ │ + [ 75e4] Hmmm. This is interesting. In the meta-text kernel '#' you've requested that the text kernel '#' be loaded. This second file is also a "meta-text" kernel and specifies new kernel loading instructions. Although you receive high marks for creativity, this path is fraught with peril and can not be supported by FURNSH. │ │ + [ 7723] NEW SEGMENTS │ │ + [ 7730] SPICE(ILLEGALCHARACTER) │ │ + [ 7748] Invalid cell cardinality; cardinality exceeds cell size. The cardinality was #. The size was #. │ │ + [ 77aa] DAFGN │ │ + [ 77b0] ctlens │ │ + [ 77b7] EKTNAM │ │ + [ 77be] DASFNH │ │ + [ 77c5] tbmxad │ │ + [ 77cc] DASRRI │ │ + [ 77d3] irec │ │ + [ 77d8] MAXVAR │ │ + [ 77df] COPYC │ │ + [ 77e5] INSRTC │ │ + [ 77ec] RDKDAT │ │ + [ 77f3] GETLUN │ │ + [ 77fa] idcode │ │ + [ 7801] kvbuff │ │ + [ 7808] NEGATIVE │ │ + [ 7811] The CK meta data item "#" is not a recognized meta data item for the routine CKMETA. The recognized value are "SPK" and "SCLK". │ │ + [ 7892] CKNR04 │ │ + [ 7899] .:-, │ │ + [ 789f] Component number # in the SCLK string, counting left to right, is invalid: component # is less than field offset #. │ │ + [ 7913] ET │ │ + [ 7916] The item requested, #, is not one of the recognized meta data items associated with this generic segment. │ │ + [ 7980] SPICE(EXTERNALOPEN) │ │ + [ 7994] DEC │ │ + [ 7998] sqovr0 │ │ + [ 799f] Interval radius must be positive but was #. │ │ + [ 79cb] EQNCPV │ │ + [ 79d2] SPKE20 │ │ + [ 79d9] SGFCON │ │ + [ 79e0] You are attempting to locate type 17 data in a type # data segment. │ │ + [ 7a24] Unexpected SPK type 19 subtype # found in type 19 segment within mini-segment #. │ │ + [ 7a75] The input value for the head of the ID address linked list is out of bounds. It should be between 0 and #. The value supplied was #. │ │ + [ 7afa] JDTDB │ │ + [ 7b00] The time types recognized by UNITIM are: TAI, GPS, TT, TDT, JDTDT, TDB, ET, JED, JDTDB. At least one of the inputs (#, #) was not in the list of recognized types. │ │ + [ 7ba4] ZZBODKER │ │ + [ 7bad] The kernel pool vectors used to define the names/ID-codes mappingexceeds the max size. The size of the NAME vector is #1. The size of the CODE vector is #2. The max number allowed of elements is #3. │ │ + [ 7c74] Could not add ID # to the hash. │ │ + [ 7c94] inbuf │ │ + [ 7c9a] ZZDAFNFR │ │ + [ 7ca3] SPICE(INVALIDACCESS) │ │ + [ 7cb8] DLAFNS │ │ + [ 7cbf] zzdynfrm_ │ │ + [ 7cc9] Definition of two-vector parameterized dynamic frame # includes constant vector specification #, which is not supported. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 7da1] degs │ │ + [ 7da6] PRODUCT │ │ + [ 7dae] ZZDNPT │ │ + [ 7db5] ZZEKESIZ │ │ + [ 7dbe] SPICE(NOTSEMCHECKED) │ │ + [ 7dd3] Input CHR page size = #; valid size is [#:] │ │ + [ 7dff] ZZEKSPOP │ │ + [ 7e08] ZZENUT80 │ │ + [ 7e11] IAU_VENUS_BARYCENTER │ │ + [ 7e26] IAU_ELARA │ │ + [ 7e30] IAU_CARME │ │ + [ 7e3a] IAU_PRAXIDIKE │ │ + [ 7e48] ZZHSIADD │ │ + [ 7e51] JUPITER BARYCENTER │ │ + [ 7e64] URANUS_BARYCENTER │ │ + [ 7e76] PHOBOS │ │ + [ 7e7d] ARCHE │ │ + [ 7e83] TARVOS │ │ + [ 7e8a] KIVIUQ │ │ + [ 7e91] KARI │ │ + [ 7e96] AEGAEON │ │ + [ 7e9e] URANUS │ │ + [ 7ea5] POLAR │ │ + [ 7eab] HUBBLE SPACE TELESCOPE │ │ + [ 7ec2] HALCA │ │ + [ 7ec8] MRO │ │ + [ 7ecc] DART │ │ + [ 7ed1] MARS 2020 │ │ + [ 7edb] SMART-1 │ │ + [ 7ee3] SHOEMAKER-LEVY 9-S │ │ + [ 7ef6] IRAS │ │ + [ 7efb] LOVAS 1 │ │ + [ 7f03] OLBERS │ │ + [ 7f0a] PETERS-HARTLEY │ │ + [ 7f19] SCHWASSMANN-WACHMANN 1 │ │ + [ 7f30] SHAJN-SCHALDACH │ │ + [ 7f40] TEMPEL 2 │ │ + [ 7f49] TUTTLE-GIACOBINI-KRESAK │ │ + [ 7f61] 52_EUROPA │ │ + [ 7f6b] RYUGU │ │ + [ 7f71] DSS-15 │ │ + [ 7f78] DSS-61 │ │ + [ 7f7f] ZZNWPOOL │ │ + [ 7f88] The ZZHASH function was called before the POOL hash parameters were initialized by a call to ZZSHSH. │ │ + [ 7fed] TEXT_FORMAT │ │ + [ 7ff9] [j] │ │ + [ 7ffd] delim │ │ + [ 8003] D*H*M*S │ │ + [ 800b] im> │ │ + [ 800f] ET │ │ + [ 8013] needy │ │ + [ 8019] ZZINIL │ │ + [ 8020] Unknown value for OPMODE. Value # not coded in zzsgp4.inc. │ │ + [ 805b] Kernel variables for the switch frame having frame ID # have mismatched sizes: number of base frames = #; number of start times = #; number of stop times = #. │ │ + [ 80fa] SPICE(FRAMEINFONOTFOUND) │ │ + [ 8113] AM/PM indicator │ │ + [ 8123] AD │ │ + [ 8126] TUESDAY │ │ + [ 812e] H │ │ + [ 8130] Two substrings representing seconds were identified in the input time string <#> and <#>: " │ │ + [ 818c] Yii │ │ + [ 8190] i-Ydi:i:i │ │ + [ 819a] i-Ydi:i:n │ │ + [ 81a4] i:nimY │ │ + [ 81ab] iim │ │ + [ 81af] iimiii │ │ + [ 81b6] iimin │ │ + [ 81bc] imYi:n │ │ + [ 81c3] imYn │ │ + [ 81c8] imi │ │ + [ 81cc] H*M*Sm*D*Y │ │ + [ 81d7] zzxlatei_ │ │ + [ 81e1] ae │ │ + [ 81e4] az │ │ + [ 81e7] bla │ │ + [ 81eb] eka │ │ + [ 81ef] fur │ │ + [ 81f3] gon │ │ + [ 81f7] izh │ │ + [ 81fb] lun │ │ + [ 81ff] mwl │ │ + [ 8203] myv │ │ + [ 8207] ne │ │ + [ 820a] stq │ │ + [ 820e] sux │ │ + [ 8212] sw │ │ + [ 8215] tru │ │ + [ 8219] aka │ │ + [ 821d] ava │ │ + [ 8221] BA │ │ + [ 8224] BO │ │ + [ 8227] KZ │ │ + [ 822a] SM │ │ + [ 822d] UY │ │ + [ 8230] BVT │ │ + [ 8234] BLZ │ │ + [ 8238] GTM │ │ + [ 823c] MLT │ │ + [ 8240] NOR │ │ + [ 8244] bs_BA │ │ + [ 824a] MAGST │ │ + [ 8250] Asia/Novosibirsk │ │ + [ 8261] Asia/Yekaterinburg │ │ + [ 8274] America/Montevideo │ │ + [ 8287] ar_SY │ │ + [ 828d] az_Cyrl │ │ + [ 8295] en_029 │ │ + [ 829c] fr_BE │ │ + [ 82a2] fr_MC │ │ + [ 82a8] hsb_DE │ │ + [ 82af] mi_NZ │ │ + [ 82b5] ne_IN │ │ + [ 82bb] tg_Cyrl │ │ + [ 82c3] fsl │ │ + [ 82c7] %%ALIAS │ │ + [ 82cf] pool │ │ + [ 82d4] ures_swapResource(table res=%08x).uprv_sortArray(%d items) failed\n │ │ + [ 8317] u_cleanup │ │ + [ 8321] ucol_nextSortKeyPart │ │ + [ 8336] gregorian │ │ + [ 8340] {0} ({1}) │ │ + [ 834a] surrogate │ │ + [ 8354] U_STATE_TOO_OLD_ERROR │ │ + [ 836a] U_PLUGIN_CHANGED_LEVEL_WARNING │ │ + [ 8389] U_MISSING_OPERATOR │ │ + [ 839c] U_MALFORMED_EXPONENTIAL_PATTERN │ │ + [ 83bc] U_MF_SYNTAX_ERROR │ │ + [ 83ce] U_MF_NONEXHAUSTIVE_PATTERN_ERROR │ │ + [ 83ef] U_MF_DUPLICATE_DECLARATION_ERROR │ │ + [ 8410] U_REGEX_INTERNAL_ERROR │ │ + [ 8427] U_REGEX_INVALID_BACK_REF │ │ + [ 8440] U_IDNA_VERIFICATION_ERROR │ │ + [ 845a] AZM │ │ + [ 845e] BGM │ │ + [ 8462] BHD │ │ + [ 8466] BOB │ │ + [ 846a] BRC │ │ + [ 846e] CUP │ │ + [ 8472] DZD │ │ + [ 8476] FIM │ │ + [ 847a] HUF │ │ + [ 847e] ISK │ │ + [ 8482] ITL │ │ + [ 8486] KGS │ │ + [ 848a] LVL │ │ + [ 848e] MDC │ │ + [ 8492] SDG │ │ + [ 8496] VNN │ │ + [ 849a] │ │ + [ 84be] decimalFormat │ │ + [ 84cc] +Subnormal │ │ + [ 84d7] M05L │ │ + [ 84dc] square-meter │ │ + [ 84e9] ROK │ │ + [ 84ed] mile │ │ + [ 84f2] candela │ │ + [ 84fa] lumen │ │ + [ 8500] horsepower │ │ + [ 850b] pint │ │ + [ 8510] animate │ │ + [ 8518] =0 │ │ + [ 851b] pow3- │ │ + [ 8521] ender │ │ + [ 8527] middle │ │ + [ 852e] zone │ │ + [ 8533] [import langTag] failed │ │ + [ 854b] ft3_to_m3 │ │ + [ 8555] shaku_to_m │ │ + [ 8560] ATrace_beginAsyncSection │ │ + [ 8579] mCommonSettings.refreshPeriod │ │ + [ 8597] PREVIEW_SDK_INT │ │ + [ 85a7] Buckets: │ │ + [ 85c4] Alt-azimuth mode enabled │ │ + [ 85dd] Star color: Blackbody (Solar Whitepoint) │ │ + [ 8606] limit of knowledge │ │ + [ 8619] Unknown temperature scale {}\n │ │ + [ 8637] ask │ │ + [ 863b] frame axes │ │ + [ 8646] %u %i │ │ + [ 864c] au │ │ + [ 864f] AU/s │ │ + [ 8654] Planetary companions present\n │ │ + [ 8672] Mass: {} Me\n │ │ + [ 867f] Channel Map Out: {%s}\n │ │ + [ 86a3] CHANNEL_FRONT_RIGHT_CENTER │ │ + [ 86be] CHANNEL_AUX_22 │ │ + [ 86cd] Resource does not exist │ │ + [ 86e5] Path too long │ │ + [ 86f3] Protocol family not supported │ │ + [ 8711] Operation cancelled │ │ + [ 8725] No device │ │ + [ 872f] wav │ │ + [ 8733] sndio │ │ + [ 8739] AAudioStreamBuilder_setErrorCallback │ │ + [ 875e] AAudioStreamBuilder_setUsage │ │ + [ 877b] SL_IID_ANDROIDSIMPLEBUFFERQUEUE │ │ + [ 879b] [OpenSL] Cannot find symbol %s │ │ + [ 87ba] [OpenSL] Failed to realize output mix object. │ │ + [ 87e8] [OpenSL] Failed to enqueue buffer for capture device. │ │ + [ 881e] wb │ │ + [ 8821] &ow={}&ox={}&oy={}&oz={} │ │ + [ 883a] ts │ │ + [ 883d] rf │ │ + [ 8840] {} │ │ + [ 8843] {:%Y %b %d %H:%M:%S %z} │ │ + [ 885b] Thursday │ │ + [ 8864] darkslateblue │ │ + [ 8872] dimgray │ │ + [ 887a] lightblue │ │ + [ 8884] olive │ │ + [ 888a] BET │ │ + [ 888e] rima │ │ + [ 8893] virga │ │ + [ 8899] cancel │ │ + [ 88a0] renderpath │ │ + [ 88ab] channel │ │ + [ 88b3] level │ │ + [ 88b9] No arguments expected for celestia:getsafeareainsets() │ │ + [ 88f0] setlabelflags │ │ + [ 88fe] getstarcolor │ │ + [ 890b] getstarcount │ │ + [ 8918] Metatable for │ │ + [ 8927] bindtranslationdomain │ │ + [ 893d] Four arguments expected for celestia:setlabelcolor() │ │ + [ 8972] Sixth arg to celestia:tojulianday must be a number │ │ + [ 89a5] Fourth arg to celestia:utctotdb must be a number │ │ + [ 89d6] None or one argument expected for celestia:geturl │ │ + [ 8a08] Second argument of celestia:bindtranslationdomain must be directory name string. │ │ + [ 8a59] celestia-savedrenderflags │ │ + [ 8a73] {}\n │ │ + [ 8a77] argument 2 to gl.Vertex must be a number │ │ + [ 8aa0] argument 1 to gl.Begin must be a number │ │ + [ 8ac8] No arguments expected for texture:bind() │ │ + [ 8af1] Bad position object! │ │ + [ 8b06] Argument to object:setvisible() must be a boolean │ │ + [ 8b38] One argument expected to object:setorbitcoloroverridden │ │ + [ 8b70] planet │ │ + [ 8b77] hubbleType │ │ + [ 8b82] String argument expected │ │ + [ 8b9b] miescaleheight │ │ + [ 8baa] getsurface │ │ + [ 8bb5] Fourth arg to observer:gotoobject must be a number │ │ + [ 8be8] One argument expected for observer:chase │ │ + [ 8c11] No argument expected for observer:singleview() │ │ + [ 8c40] No arguments allowed for to phase:orbitframe │ │ + [ 8c6d] [Position] │ │ + [ 8c78] No arguments expected for position:gety() │ │ + [ 8ca2] material │ │ + [ 8cab] tangent │ │ + [ 8cb3] #celmodel_binary │ │ + [ 8cc4] opacity {}\n │ │ + [ 8cd0] normal │ │ + [ 8cd8] ub4\n │ │ + [ 8cdd] htc20-telesto │ │ + [ 8ceb] non-native │ │ + [ 8cf6] iau-adrastea │ │ + [ 8d03] {:02} │ │ + [ 8d0a] Lyr │ │ + [ 8d0e] {}/{} │ │ + [ 8d14] Error parsing deep sky catalog file: bad name.\n │ │ + [ 8d44] Bad Deep Sky Object definition--will continue parsing file.\n │ │ + [ 8d81] SBa │ │ + [ 8d85] GL_ARB_texture_filter_anisotropic │ │ + [ 8da7] FT │ │ + [ 8daa] ER │ │ + [ 8dad] CB │ │ + [ 8db0] Object has incorrect syntax for SampledTrajectory.\n │ │ + [ 8de4] Kernel list for SPICE orbit is neither a string nor array of strings\n │ │ + [ 8e2a] Eccentricity │ │ + [ 8e37] Invalid beginning date specified for SPICE rotation.\n │ │ + [ 8e6d] Bad syntax for secondary axis of two-vector frame.\n │ │ + [ 8ea1] pc │ │ + [ 8ea4] rad │ │ + [ 8ea8] color = texture2D(diffTex, │ │ + [ 8ec4] .st);\n │ │ + [ 8ecb] color = vec4(1.0);\n │ │ + [ 8edf] + │ │ + [ 8ee3] color = texture2D(diffTex, diffTexCoord.st);\n │ │ + [ 8f11] // PARTICLE SHADER\n │ │ + [ 8f25] ModelViewMatrix │ │ + [ 8f35] ProjectionMatrix │ │ + [ 8f46] cosNormalLightDir │ │ + [ 8f58] GeomAlbedo │ │ + [ 8f63] BondAlbedo │ │ + [ 8f6e] DC │ │ + [ 8f71] Barycenter │ │ + [ 8f7c] lores │ │ + [ 8f82] DDS file {} has bad surface desc.\n │ │ + [ 8fa5] Unsupported format for DDS texture file {}.\n │ │ + [ 8fd2] Error skipping {} trailing bytes\n │ │ + [ 8ff4] Processing MaterialAmbient chunk\n │ │ + [ 9016] ()V │ │ + [ 901a] \ufffd │ │ + [ 9021] eglCreateWindowSurface() returned error %d │ │ + [ 904d] msgctxt │ │ + [ 9056] Suspension not allowed here │ │ + [ 9072] Bogus DHT index %d │ │ + [ 9085] Invalid JPEG file structure: two SOI markers │ │ + [ 90b2] with %d x %d thumbnail image │ │ + [ 90d3] Inconsistent progression sequence for component %d coefficient %d │ │ + [ 9115] BlueScale │ │ + [ 911f] FontName │ │ + [ 9128] lenBuildCharArray │ │ + [ 913a] 8859 │ │ + [ 913f] FOUNDRY │ │ + [ 9147] RAW_POINT_SIZE │ │ + [ 9156] RAW_SUBSCRIPT_Y │ │ + [ 9166] STRIKEOUT_ASCENT │ │ + [ 9177] STRIKEOUT_DESCENT │ │ + [ 9189] _MULE_BASELINE_OFFSET │ │ + [ 919f] W1X │ │ + [ 91a3] metamethod │ │ + [ 91ae] Snlf │ │ + [ 91b3] bytecode instructions │ │ + [ 91c9] _G │ │ + [ 91cc] too many captures │ │ + [ 91de] too many arguments │ │ + [ 91f1] yday │ │ + [ 91f6] open │ │ + [ 91fb] 'package.loaders' must be a table │ │ + [ 921d] Linux │ │ + [ 9223] Invalid image height in IHDR │ │ + [ 9240] rgb+alpha color-map: too few entries │ │ + [ 9265] bad width format │ │ + [ 9276] no space in chunk cache │ │ + [ 928e] Invalid interlace type specified │ │ + [ 92af] SPICE(EMPTYSTRING) │ │ + [ 92c2] op │ │ + [ 92c5] EXPLAIN │ │ + [ 92cd] Version Identification of GEF File is Invalid │ │ + [ 92fb] SPICE(INCOMPATIBLEUNITS) │ │ + [ 9314] SPICE(WINDOWTOOSMALL) │ │ + [ 932a] iswhsp_c │ │ + [ 9333] There is no room left in KEEPER to load another SPICE kernel. The current limit on the number of files that can be loaded is #. If you really need more than this many files, you should increase the parameter MAXFIL in the subroutine KEEPER. │ │ + [ 9427] SPICE(RECURSIVELOADING) │ │ + [ 943f] CK │ │ + [ 9442] CKUPF │ │ + [ 9448] RESUME │ │ + [ 944f] The file, '#', connected to unit # is not a DAF. │ │ + [ 9480] ZERO │ │ + [ 9485] truncation failed in endfile │ │ + [ 94a2] No address for record #, word #. │ │ + [ 94c3] cdue │ │ + [ 94c8] DAFBBS │ │ + [ 94cf] SPICE(EKSEGTABLEFULL) │ │ + [ 94e5] The EK file # could not be loaded; the segment # contains duplicate column names in table #. │ │ + [ 9542] EKUEF │ │ + [ 9548] fort.%ld │ │ + [ 9551] CARDC │ │ + [ 9557] SPICE(INSUFFLEN) │ │ + [ 9568] hnbufd │ │ + [ 956f] SPICE(INVALIDSUBLIST) │ │ + [ 9585] PCKBSR │ │ + [ 958c] chvals │ │ + [ 9593] GCPOOL │ │ + [ 959a] SPICE(BADVARNAME) │ │ + [ 95ac] INSLAI │ │ + [ 95b3] rot2 │ │ + [ 95b8] REMLAI │ │ + [ 95bf] cnvrtn │ │ + [ 95c6] Segment does not contain angular velocity data. │ │ + [ 95f6] Beginning address (#) greater than ending address (#). │ │ + [ 962d] vbuff │ │ + [ 9633] CKE02 │ │ + [ 9639] CKR06 │ │ + [ 963f] Input file # has architecture #. The file must be a binary SPK file to be readable by this routine. If the input file is an SPK file in transfer format, run TOBIN on the file to convert it to binary format. │ │ + [ 970f] The file name is blank. │ │ + [ 9727] IOSTAT error in INQUIRE statement. IOSTAT = #. │ │ + [ 9756] SPKPVN │ │ + [ 975d] sbound │ │ + [ 9764] SPKE17 │ │ + [ 976b] SPICE(BADSEMIAXIS) │ │ + [ 977e] SPKE21 │ │ + [ 9785] SPKR18 │ │ + [ 978c] Unexpected SPK type 18 subtype # found in type 18 segment. │ │ + [ 97c7] SPICE(DEGREEOUTOFRANGE) │ │ + [ 97df] NUT_PREC_PM │ │ + [ 97eb] LOCATI │ │ + [ 97f2] SPICE(BADVARIABLESIZE) │ │ + [ 9809] SPICE(NAMESDONOTMATCH) │ │ + [ 9820] lio │ │ + [ 9824] no imaginary part │ │ + [ 9836] SPICE(BADCOLUMNCOUNT) │ │ + [ 984c] bmat │ │ + [ 9851] Could not read non-native DAS integer record into character array. File = # Record number = #. IOSTAT = #. │ │ + [ 98bc] DLABBS │ │ + [ 98c3] ZZDYNBID │ │ + [ 98cc] Variable # not found after DTPOOL indicated it was present in pool. │ │ + [ 9910] ZZDYNFRM │ │ + [ 9919] AXIS │ │ + [ 991e] EULER │ │ + [ 9924] rrows │ │ + [ 992a] Column # should be CHR but has type #. │ │ + [ 9951] namidx │ │ + [ 9958] IAU_MERCURY_BARYCENTER │ │ + [ 996f] IAU_JUPITER │ │ + [ 997b] IAU_CALLISTO │ │ + [ 9988] IAU_TITANIA │ │ + [ 9994] IAU_THALASSA │ │ + [ 99a1] IAU_CHALDENE │ │ + [ 99ae] IAU_NIX │ │ + [ 99b6] The reference frame # is a dynamic frame. Dynamic frames may not be used at recursion level 1. │ │ + [ 9a15] USED ITEM COUNT │ │ + [ 9a25] CALLISTO │ │ + [ 9a2e] ALBIORIX │ │ + [ 9a37] TARQEQ │ │ + [ 9a3e] MOM │ │ + [ 9a42] WIND │ │ + [ 9a47] LP │ │ + [ 9a4a] VIKING 1 ORBITER │ │ + [ 9a5b] GRAIL-B │ │ + [ 9a63] CLUSTER 1 │ │ + [ 9a6d] NSYT │ │ + [ 9a72] SHOEMAKER-LEVY 9-V │ │ + [ 9a85] SHOEMAKER-LEVY 9-R │ │ + [ 9a98] AREND │ │ + [ 9a9e] BRADFIELD │ │ + [ 9aa8] DANIEL │ │ + [ 9aaf] DENNING-FUJIKAWA │ │ + [ 9ac0] MAURY │ │ + [ 9ac6] SHOEMAKER-LEVY 1 │ │ + [ 9ad7] NOTO │ │ + [ 9adc] DSS-43 │ │ + [ 9ae3] COMPILER │ │ + [ 9aec] zzdynrt0_ │ │ + [ 9af6] A kernel variable was not properly formed on line # of the file #. Such an assignment should have the form: ' [+]= '. This line was '#'. │ │ + [ 9b97] n │ │ + [ 9b99] Mmi │ │ + [ 9b9d] MmD │ │ + [ 9ba1] The month specified, #, was not an integer. The month must be an integer in the range from 1 to 12. │ │ + [ 9c06] TTRANS │ │ + [ 9c0d] TAI │ │ + [ 9c12] YMWDF │ │ + [ 9c19] The seconds component of '#' is out of range. In the specified time zone (#) leapseconds can occur during the year # only in the second that immediately follows the time #:#:59 on # # and # #. │ │ + [ 9cdc] AM │ │ + [ 9cdf] DD │ │ + [ 9ce2] Two substrings representing minutes of the hour were identified in the input time string <#> and <#>: " │ │ + [ 9d4a] Y-i/i:i:n │ │ + [ 9d54] Yimi:n │ │ + [ 9d5b] Ymii:i:n │ │ + [ 9d64] i-idi:n │ │ + [ 9d6c] i-iti:n │ │ + [ 9d74] i:i:iimY │ │ + [ 9d7d] i-i-itn │ │ + [ 9d85] i:i:ii-i-Y │ │ + [ 9d90] ZZTWOVXF │ │ + [ 9d99] und_ │ │ + [ 9d9e] ab │ │ + [ 9da1] brx │ │ + [ 9da5] dua │ │ + [ 9da9] es │ │ + [ 9dac] fj │ │ + [ 9daf] kam │ │ + [ 9db3] khw │ │ + [ 9db7] kk │ │ + [ 9dba] oc │ │ + [ 9dbd] sat │ │ + [ 9dc1] sbp │ │ + [ 9dc5] sdh │ │ + [ 9dc9] sm │ │ + [ 9dcc] bre │ │ + [ 9dd0] iii │ │ + [ 9dd4] mri │ │ + [ 9dd8] mkd │ │ + [ 9ddc] rus │ │ + [ 9de0] ven │ │ + [ 9de4] CQ │ │ + [ 9de7] ES │ │ + [ 9dea] JO │ │ + [ 9ded] KN │ │ + [ 9df0] MG │ │ + [ 9df3] NA │ │ + [ 9df6] PK │ │ + [ 9df9] BRB │ │ + [ 9dfd] CHE │ │ + [ 9e01] CHN │ │ + [ 9e05] FIN │ │ + [ 9e09] FJI │ │ + [ 9e0d] UGA │ │ + [ 9e11] my_MM │ │ + [ 9e17] heploc │ │ + [ 9e1e] hepburn │ │ + [ 9e26] __system_property_read_callback │ │ + [ 9e46] KRAT │ │ + [ 9e4b] PMDT │ │ + [ 9e50] FKST │ │ + [ 9e55] ar_IQ │ │ + [ 9e5b] dz_BT │ │ + [ 9e61] es_BO │ │ + [ 9e67] es_PY │ │ + [ 9e6d] fa_AF │ │ + [ 9e73] fo_FO │ │ + [ 9e79] fr_015 │ │ + [ 9e80] fr_029 │ │ + [ 9e87] no_NO_NY │ │ + [ 9e90] sah_RU │ │ + [ 9e97] xh_ZA │ │ + [ 9e9d] en-gb-oed │ │ + [ 9ea7] i-tao │ │ + [ 9ead] vgt │ │ + [ 9eb1] res_index │ │ + [ 9ebb] Regions │ │ + [ 9ec3] currency │ │ + [ 9ecc] space separator │ │ + [ 9edc] U_INPUT_TOO_LONG_ERROR │ │ + [ 9ef3] U_DIFFERENT_UCA_VERSION │ │ + [ 9f0b] U_MALFORMED_UNICODE_ESCAPE │ │ + [ 9f26] U_MULTIPLE_DECIMAL_SEPARATORS │ │ + [ 9f44] U_MF_OPERAND_MISMATCH_ERROR │ │ + [ 9f60] U_REGEX_NUMBER_TOO_BIG │ │ + [ 9f77] U_REGEX_TIME_OUT │ │ + [ 9f88] U_REGEX_INVALID_CAPTURE_GROUP_NAME │ │ + [ 9fab] AOR │ │ + [ 9faf] BRL │ │ + [ 9fb3] BYN │ │ + [ 9fb7] CHW │ │ + [ 9fbb] ERN │ │ + [ 9fbf] GHC │ │ + [ 9fc3] MKN │ │ + [ 9fc7] MNT │ │ + [ 9fcb] MZE │ │ + [ 9fcf] SBD │ │ + [ 9fd3] VUV │ │ + [ 9fd7] frequency │ │ + [ 9fe1] BGJ │ │ + [ 9fe5] ohm │ │ + [ 9fe9] centimeter │ │ + [ 9ff4] ounce │ │ + [ 9ffa] fluid-ounce │ │ + [ a006] accusative │ │ + [ a011] plusSign │ │ + [ a01a] ero │ │ + [ a01e] cubic- │ │ + [ a025] /patternsLong │ │ + [ a033] tailoring primary after ignorables not supported │ │ + [ a064] factor │ │ + [ a06b] processor │ │ + [ a075] void swappy::SwappyCommon::startFrame() │ │ + [ a09d] Swappy: CPU frame time │ │ + [ a0b4] charentered │ │ + [ a0c0] Error opening constellation boundaries file {}.\n │ │ + [ a0f1] Found non-string value in {} array.\n │ │ + [ a116] local │ │ + [ a11c] phaselock │ │ + [ a126] Failed to get default measurement system {}, fallback to Metric system │ │ + [ a16d] Earth │ │ + [ a173] invalid format │ │ + [ a182] {:.2f}" │ │ + [ a18a] Mpc │ │ + [ a18e] ft │ │ + [ a191] Error opening {}\n │ │ + [ a1a3] Failed to load symbol: %s\n │ │ + [ a1be] Channels: %d -> %d\n │ │ + [ a1d9] CHANNEL_BACK_LEFT │ │ + [ a1eb] CHANNEL_AUX_0 │ │ + [ a1f9] CHANNEL_AUX_5 │ │ + [ a207] CHANNEL_AUX_8 │ │ + [ a215] Unknown error │ │ + [ a223] flac │ │ + [ a228] Failed to start playing sound file {} │ │ + [ a24e] AAudioStream_getFormat │ │ + [ a265] SL_IID_PLAY │ │ + [ a271] WAVE │ │ + [ a276] track │ │ + [ a27c] August │ │ + [ a283] Could not open font {}\n │ │ + [ a29b] brown │ │ + [ a2a1] mediumorchid │ │ + [ a2ae] oldlace │ │ + [ a2b6] .dds │ │ + [ a2bb] .celx │ │ + [ a2c1] ~/.local/share │ │ + [ a2d0] TET │ │ + [ a2d4] Beta │ │ + [ a2d9] Iota │ │ + [ a2de] Nu │ │ + [ a2e4] markers │ │ + [ a2ec] oceanus │ │ + [ a2f4] other │ │ + [ a2fa] planetorbits │ │ + [ a307] setactiveview │ │ + [ a315] lookback │ │ + [ a31e] fuzzypoints │ │ + [ a32a] duration │ │ + [ a333] jd │ │ + [ a336] settimescale │ │ + [ a343] getdsocount │ │ + [ a34f] takescreenshot │ │ + [ a35e] createcelscript │ │ + [ a36e] setaudiopan │ │ + [ a37a] One to four arguments expected to function celestia:printatpixel │ │ + [ a3bb] Arguments to celestia:showlabel() must be strings │ │ + [ a3ed] Arguments to celestia:hidelabel() must be strings │ │ + [ a41f] Argument to celestia:hideconstellations() must be a table │ │ + [ a459] First argument to celestia:setconstellationcolor() must be a number │ │ + [ a49d] No or one argument expected to function celestia:paused │ │ + [ a4d5] point │ │ + [ a4db] Fourth arg to celestia:tojulianday must be a number │ │ + [ a50f] One or two arguments expected for celestia:seturl │ │ + [ a541] WARNING:\n │ │ This script requests permission to read/write files\n │ │ and execute external programs. Allowing this can be\n │ │ dangerous.\n │ │ Do you trust the script and want to allow this?\n │ │ y = yes, ESC = cancel script, any other key = no │ │ - [ a5f3] Error: LuaState invalid in Celx_SafeGetBoolean\n │ │ - [ a623] PushMatrix │ │ - [ a62e] QUADS │ │ - [ a634] Two arguments expected for gl.TexCoord() │ │ - [ a65d] One argument expected to function font:gettextwidth │ │ - [ a691] Argument 3 to object:setorbitcolor() must be a number │ │ - [ a6c7] body to body direction │ │ - [ a6de] Empty texture name passed to object:setringstexture() │ │ - [ a714] Selection object is empty! │ │ - [ a72f] One to two arguments expected to observer:gotosurface │ │ - [ a765] One argument required for setorientation │ │ - [ a78e] Bad position subtraction! │ │ - [ a7a8] [Vector] │ │ - [ a7b1] Bad vector multiplication! │ │ - [ a7cc] Optimized mesh groups: had {} groups, now: {} of them.\n │ │ - [ a804] saturn-sun │ │ - [ a80f] triton │ │ - [ a816] Loaded DE{} ephemeris. Valid from JD {:.8f} to JD {:.8f}\n │ │ - [ a850] Error opening ASCII sample file {}.\n │ │ - [ a875] Specified time interval for target {} not available.\n │ │ - [ a8ab] in_Brightness │ │ - [ a8b9] Crv │ │ - [ a8bd] Hyi │ │ - [ a8c1] Ori │ │ - [ a8c5] Pic │ │ - [ a8c9] Scl │ │ - [ a8cd] Radius │ │ - [ a8d4] Globular (core radius: %4.2f', King concentration: %4.2f) │ │ - [ a90e] PU │ │ - [ a911] LU │ │ - [ a914] Read a mesh of {} x {}\n │ │ - [ a92c] Object has incorrect spice orbit syntax.\n │ │ - [ a956] Object has incorrect UniformRotation syntax.\n │ │ - [ a984] Origin name missing from SPICE orbit\n │ │ - [ a9aa] Module │ │ - [ a9b1] Period cannot be zero.\n │ │ - [ a9c9] Frame name missing from SPICE rotation\n │ │ - [ a9f1] Ending specified for SPICE rotation, but beginning is missing.\n │ │ - [ aa31] Object has incorrect body-fixed frame syntax.\n │ │ - [ aa60] No center specified for reference frame.\n │ │ - [ aa8a] cloudShadowTexOffset │ │ - [ aa9f] normTexCoord = │ │ - [ aaaf] float shadowR;\n │ │ - [ aabf] * pow(NH, shininess) * │ │ - [ aad8] if (ringShadowTexCoordX >= 0.0 && ringShadowTexCoordX <= 1.0)\n │ │ + [ a620] Error: LuaState invalid in Celx_SafeGetBoolean\n │ │ + [ a650] PushMatrix │ │ + [ a65b] QUADS │ │ + [ a661] Two arguments expected for gl.TexCoord() │ │ + [ a68a] One argument expected to function font:gettextwidth │ │ + [ a6be] Argument 3 to object:setorbitcolor() must be a number │ │ + [ a6f4] body to body direction │ │ + [ a70b] Empty texture name passed to object:setringstexture() │ │ + [ a741] Selection object is empty! │ │ + [ a75c] One to two arguments expected to observer:gotosurface │ │ + [ a792] One argument required for setorientation │ │ + [ a7bb] Bad position subtraction! │ │ + [ a7d5] [Vector] │ │ + [ a7de] Bad vector multiplication! │ │ + [ a7f9] Optimized mesh groups: had {} groups, now: {} of them.\n │ │ + [ a831] saturn-sun │ │ + [ a83c] triton │ │ + [ a843] Loaded DE{} ephemeris. Valid from JD {:.8f} to JD {:.8f}\n │ │ + [ a87d] Error opening ASCII sample file {}.\n │ │ + [ a8a2] Specified time interval for target {} not available.\n │ │ + [ a8d8] in_Brightness │ │ + [ a8e6] Crv │ │ + [ a8ea] Hyi │ │ + [ a8ee] Ori │ │ + [ a8f2] Pic │ │ + [ a8f6] Scl │ │ + [ a8fa] Radius │ │ + [ a901] Globular (core radius: %4.2f', King concentration: %4.2f) │ │ + [ a93b] PU │ │ + [ a93e] LU │ │ + [ a941] Read a mesh of {} x {}\n │ │ + [ a959] Object has incorrect spice orbit syntax.\n │ │ + [ a983] Object has incorrect UniformRotation syntax.\n │ │ + [ a9b1] Origin name missing from SPICE orbit\n │ │ + [ a9d7] Module │ │ + [ a9de] Period cannot be zero.\n │ │ + [ a9f6] Frame name missing from SPICE rotation\n │ │ + [ aa1e] Ending specified for SPICE rotation, but beginning is missing.\n │ │ + [ aa5e] Object has incorrect body-fixed frame syntax.\n │ │ + [ aa8d] No center specified for reference frame.\n │ │ + [ aab7] cloudShadowTexOffset │ │ + [ aacc] normTexCoord = │ │ + [ aadc] float shadowR;\n │ │ + [ aaec] * pow(NH, shininess) * │ │ + [ ab05] if (ringShadowTexCoordX >= 0.0 && ringShadowTexCoordX <= 1.0)\n │ │ {\n │ │ - [ ab19] shadow *= 1.0 - texture2D(ringTex, vec2(ringShadowTexCoordX, 0.0), │ │ - [ ab5d] float cosTheta = dot(eyeDir, │ │ - [ ab7f] triangle_strip │ │ - [ ab8e] MeshScale │ │ - [ ab98] 2 │ │ - [ ab9a] Ia-0 │ │ - [ ab9f] StarDatabase::read: nStars = {}, time = {} ms\n │ │ - [ abce] Bad star definition at line {}.\n │ │ - [ abef] AppMag │ │ - [ abf6] AppMag cannot be used close to the origin │ │ - [ ac20] Failed to read entry {} of point array\n │ │ - [ ac48] Processing MaterialShininess chunk\n │ │ - [ ac6c] getY │ │ - [ ac71] , │ │ - [ ac74] engineStarted │ │ - [ ac82] cannot write to file │ │ - [ ac97] lli │ │ - [ ac9b] %s\n │ │ - [ ac9f] Insufficient memory (case %d) │ │ - [ acbd] Premature end of JPEG file │ │ - [ acd8] type1 │ │ - [ acde] FullName │ │ - [ ace7] UnderlineThickness │ │ - [ acfa] SubrMapOffset │ │ - [ ad08] winfonts │ │ - [ ad11] AVERAGE_WIDTH │ │ - [ ad1f] SPACING │ │ - [ ad27] RAW_AVERAGE_WIDTH │ │ - [ ad39] RAW_FIGURE_WIDTH │ │ - [ ad4a] RAW_PIXEL_SIZE │ │ - [ ad59] RAW_SUBSCRIPT_SIZE │ │ - [ ad6c] default-script │ │ - [ ad7b] smooth │ │ - [ ad82] PCC │ │ - [ ad86] StartDirection │ │ - [ ad95] dead │ │ - [ ad9a] 'package.preload' must be a table │ │ - [ adbc] unexpected zlib return code │ │ - [ add8] RGB color space not permitted on grayscale PNG │ │ - [ ae07] Invalid image width in IHDR │ │ - [ ae23] Invalid color type in IHDR │ │ - [ ae3e] fixed point overflow ignored │ │ - [ ae5b] internal sequential row size calculation error │ │ - [ ae8a] bad data option (internal error) │ │ - [ aeab] bad compression info │ │ - [ aec0] Only compression windows >= 256 supported by PNG │ │ - [ aef1] Ignoring attempt to write bKGD chunk out-of-range for bit_depth │ │ - [ af31] iTXt: uncompressed text too long │ │ - [ af52] String "#" has length #; must be >= 2. │ │ - [ af79] SPICE(TRACEBACKOVERFLOW) │ │ - [ af92] SPICE(WINDOWEXCESS) │ │ - [ afa6] KERNELS_TO_LOAD │ │ - [ afb6] There is no room left in KEEPER to load another SPICE kernel. The current limit on the number of files that can be loaded is #. │ │ - [ b036] itruex │ │ - [ b03d] ADD TO FRONT │ │ - [ b04a] READ │ │ - [ b04f] FILE_FORMAT │ │ - [ b05b] An element could not be inserted into the set due to lack of space; set size is #. │ │ - [ b0ae] Attempt was made to write to a read-only file. │ │ - [ b0dd] The EK file # could not be loaded; the maximum number of distinct tables has already been reached. │ │ - [ b140] SPICE(EKTABLELISTFULL) │ │ - [ b157] SPICE(EKCOLATTRTABLEFULL) │ │ - [ b171] ops │ │ - [ b175] cends │ │ - [ b17b] chtype │ │ - [ b182] DAS SCRATCH FILE │ │ - [ b193] lastwd │ │ - [ b19a] Attempt to read file record failed. File was '#'. Value of IOSTAT was '#'. │ │ - [ b1e6] DASHLU │ │ - [ b1ed] DASHOF │ │ - [ b1f4] APPNDI │ │ - [ b1fb] Directory record # in DAS file with handle # is probably corrupted. No high cluster address at or above the input address # was found, though it should have been. High address was #. Data type was #. │ │ - [ b2c3] Could not write DAS double precision record. File = # Record number = #. IOSTAT = #. │ │ - [ b318] dassdr_ │ │ - [ b320] RDKER: You have called an entry which performs no run-time function. This may indicate a bug. Please check the documentation for the subroutine RDKER. │ │ - [ b3b7] RDKNEW │ │ - [ b3be] RDTEXT │ │ - [ b3c5] fndlun_ │ │ - [ b3cd] FRMNAM │ │ - [ b3d4] kcent │ │ - [ b3da] An unexpected character was found while attempting to parse the input string. │ │ - [ b429] CONVRT │ │ - [ b430] SPICE(DIVIDEBYZERO) │ │ - [ b444] SPICE(SCLKTRUNCATED) │ │ - [ b459] TDB │ │ - [ b45d] integer │ │ - [ b465] KPL │ │ - [ b469] CKFXFM │ │ - [ b470] SPK type # is not supported in your version of the SPICE library. You will need to upgrade your version of the library to make use of ephemerides that contain this SPK data type. │ │ - [ b525] spke19_ │ │ - [ b52d] The trajectory pole vector supplied to SPKE15 had length zero. The most likely cause of this problem is a corrupted SPK (ephemeris) file. │ │ - [ b5b8] KPSOLV │ │ - [ b5bf] CHBIGR │ │ - [ b5c6] SPICE(WRONGSPKTYPE) │ │ - [ b5da] SPKR13 │ │ - [ b5e1] bpcref │ │ - [ b5e8] BODY#_CONSTANTS_JED_EPOCH │ │ - [ b602] BODY#_CONSTS_JED_EPOCH │ │ - [ b619] sinth │ │ - [ b61f] EUL2M │ │ - [ b625] BODFND │ │ - [ b62c] alt │ │ - [ b630] begindata │ │ - [ b63b] WNFETD: No such interval. │ │ - [ b655] ZZCLN │ │ - [ b65b] The attempt to load file, '#', with architecture, '#', failed because this file architecture is unsupported. │ │ - [ b6c8] SPICE(FTFULL) │ │ - [ b6d6] Attempt to open file, '#', for read access has failed. This file utilizes an unknown binary file format. This error may result from attempting to open a corrupt file or one of an unknown type. │ │ - [ b799] Invalid access method. This error should never be signaled. │ │ - [ b7d5] TWO-VECTOR │ │ - [ b7e0] OBSERVER_TARGET_POSITION │ │ - [ b7f9] The kernel variable # has used to define frame # was not found after DTPOOL indicated it was present in pool. │ │ - [ b867] spoint │ │ - [ b86e] lrows │ │ - [ b874] SPICE(UNNATURALRELATION) │ │ - [ b88d] The segment type # is not supported. │ │ - [ b8b2] CHR page = #; valid range is [1:#] │ │ - [ b8d5] ZZEKPGRI │ │ - [ b8de] ZZEKPGPG │ │ - [ b8e7] String end index must be in the range #:# but was #. │ │ - [ b91c] Column type is #; value type is #. │ │ - [ b93f] Runaway node pointer chain. Key = #; valid range = 1:#. Tree = #, file = # │ │ - [ b98b] An attempt to copy a C string to a temporary string of length # failed. This may be due to an unterminated input string. │ │ - [ ba05] IAU_PASIPHAE │ │ - [ ba12] IAU_TRITON │ │ - [ ba1d] VENUS_BARYCENTER │ │ - [ ba2e] ENCELADUS │ │ - [ ba38] TELESTO │ │ - [ ba40] YMIR │ │ - [ ba45] MUNDILFARI │ │ - [ ba50] NARVI │ │ - [ ba56] POLYDEUCES │ │ - [ ba61] BESTLA │ │ - [ ba68] CHARON │ │ - [ ba6f] VCO │ │ - [ ba73] STARDUST │ │ - [ ba7c] HST │ │ - [ ba80] OSIRIS-REX │ │ - [ ba8b] EPOXI │ │ - [ ba91] SOLAR ORBITER │ │ - [ ba9f] EXM ROVER │ │ - [ baa9] VSAT │ │ - [ baae] SELENE Vstar │ │ - [ babb] JACKSON-NEUJMIN │ │ - [ bacb] SCHWASSMANN-WACHMANN 2 │ │ - [ bae2] SHOEMAKER 2 │ │ - [ baee] STEPHAN-OTERMA │ │ - [ bafd] LOVAS 2 │ │ - [ bb05] PALLAS │ │ - [ bb0c] QUETA │ │ - [ bb12] DSS-28 │ │ - [ bb19] DSS-45 │ │ - [ bb20] LTL-IEEE │ │ - [ bb29] ZZDYNRT0 │ │ - [ bb32] *j* │ │ - [ bb36] *N* │ │ - [ bb3a] SCLK_DATA_TYPE_ │ │ - [ bb4a] kvmaxn │ │ - [ bb51] SPICE(BADFRAME) │ │ - [ bb61] Aberration correction flag # calls for stellar aberration but not light time corrections. This combination is not expected. │ │ - [ bbdd] ZZSPKPA0 │ │ - [ bbe6] bascnt │ │ - [ bbed] SPICE(NOPICTURE) │ │ - [ bbfe] Hour │ │ - [ bc03] Second │ │ - [ bc0a] Julian Date indicator │ │ - [ bc20] JUNE │ │ - [ bc25] Y-i/i:i │ │ - [ bc2d] i-Ydi:n │ │ - [ bc35] i-iti:i │ │ - [ bc3d] iid │ │ - [ bc41] YDmHM │ │ - [ bc47] imii:i:n │ │ - [ bc50] inY │ │ - [ bc54] i/i/ii:i:i │ │ - [ bc5f] Y-i-itn │ │ - [ bc67] i-itx │ │ - [ bc6d] i-i-itnx │ │ - [ bc76] The caller specified that # double precision numbers are to be translated from binary format # to #. However there is only room to hold # integers in the output array. This error should never occur. │ │ - [ bd3f] RH │ │ - [ bd42] GB │ │ - [ bd45] gan │ │ - [ bd49] ang │ │ - [ bd4d] arc │ │ - [ bd51] bg │ │ - [ bd54] bjn │ │ - [ bd58] bm │ │ - [ bd5b] byn │ │ - [ bd5f] cad │ │ - [ bd63] csb │ │ - [ bd67] fan │ │ - [ bd6b] frm │ │ - [ bd6f] is │ │ - [ bd72] it │ │ - [ bd75] koi │ │ - [ bd79] krl │ │ - [ bd7d] lad │ │ - [ bd81] li │ │ - [ bd84] sam │ │ - [ bd88] tsi │ │ - [ bd8c] swc │ │ - [ bd90] afr │ │ - [ bd94] cha │ │ - [ bd98] chu │ │ - [ bd9c] kor │ │ - [ bda0] mlg │ │ - [ bda4] roh │ │ - [ bda8] wln │ │ - [ bdac] yor │ │ - [ bdb0] BI │ │ - [ bdb3] DG │ │ - [ bdb6] NC │ │ - [ bdb9] NF │ │ - [ bdbc] WS │ │ - [ bdbf] ALB │ │ - [ bdc3] CYP │ │ - [ bdc7] MHL │ │ - [ bdcb] NCL │ │ - [ bdcf] SLE │ │ - [ bdd3] SSD │ │ - [ bdd7] VNM │ │ - [ bddb] XKK │ │ - [ bddf] ZWE │ │ - [ bde3] TMP │ │ - [ bde7] et_EE │ │ - [ bded] is_IS │ │ - [ bdf3] mn_MN │ │ - [ bdf9] NY │ │ - [ bdfc] Asia/Choibalsan │ │ - [ be0c] OMST │ │ - [ be11] YEKT │ │ - [ be16] VOLST │ │ - [ be1c] EEST │ │ - [ be21] Africa/Windhoek │ │ - [ be31] America/Miquelon │ │ - [ be42] America/Godthab │ │ - [ be52] ICU_TIMEZONE_FILES_DIR │ │ - [ be69] trie │ │ - [ be6e] ar_BH │ │ - [ be74] ar_MA │ │ - [ be7a] en_AU │ │ - [ be80] en_ZW │ │ - [ be86] es_MX │ │ - [ be8c] fr_RE │ │ - [ be92] bs_Latn_BA │ │ - [ be9d] pa_Arab_PK │ │ - [ bea8] ts_ZA │ │ - [ beae] sgn-be-nl │ │ - [ beb8] ucnv_openAlgorithmic │ │ - [ becd] resc │ │ - [ bed2] hebrew │ │ - [ bed9] ethiopic │ │ - [ bee2] M03 │ │ - [ bee6] contextTransforms │ │ - [ bef8] Countries%short │ │ - [ bf08] unassigned │ │ - [ bf13] enclosing mark │ │ - [ bf22] decimal digit number │ │ - [ bf37] initial punctuation │ │ - [ bf4b] U_INVALID_TABLE_FORMAT │ │ - [ bf62] U_MISPLACED_QUANTIFIER │ │ - [ bf79] U_ILLEGAL_CHAR_IN_SEGMENT │ │ - [ bf93] U_INTERNAL_TRANSLITERATOR_ERROR │ │ - [ bfb3] U_BRK_ASSIGN_ERROR │ │ - [ bfc6] U_BRK_NEW_LINE_IN_QUOTED_STRING │ │ - [ bfe6] U_PLUGIN_DIDNT_SET_LEVEL │ │ - [ bfff] BYR │ │ - [ c003] EEK │ │ - [ c007] FJD │ │ - [ c00b] GHS │ │ - [ c00f] LKR │ │ - [ c013] TOP │ │ - [ c017] transPre32 │ │ - [ c022] M04L │ │ - [ c027] M07L │ │ - [ c02c] terabit │ │ - [ c034] dot │ │ - [ c038] pixel-per-inch │ │ - [ c047] watt │ │ - [ c04c] cup │ │ - [ c050] hectoliter │ │ - [ c05b] dative │ │ - [ c062] minusSign │ │ - [ c06c] deka │ │ - [ c071] case │ │ - [ c076] dn │ │ - [ c079] account │ │ - [ c081] tertiary tailoring gap too small │ │ - [ c0a2] starred-relation string range is not all NFD-inert │ │ - [ c0d5] last variable │ │ - [ c0e3] in3_to_m3 │ │ - [ c0ed] glucose_molar_mass │ │ - [ c100] AChoreographerFrameCallbackData_getFrameTimelineDeadlineNanos │ │ - [ c13e] /proc/cpuinfo │ │ - [ c14c] thread constructor failed │ │ - [ c166] android/app/NativeActivity │ │ - [ c181] android/view/WindowManager │ │ - [ c19c] mousebuttonup │ │ - [ c1aa] Anti-aliasing enabled │ │ - [ c1c0] cel: │ │ - [ c1c5] argument not found │ │ - [ c1d8] StarNameDatabase │ │ - [ c1e9] LinearFadeFraction │ │ - [ c1fc] OrbitPathSamplePoints │ │ - [ c212] Renderer: %s\n │ │ - [ c220] minutes │ │ - [ c228] Rotation period: {} {}\n │ │ - [ c240] solar system │ │ - [ c24d] NEON: %s\n │ │ - [ c25b] Conversion:\n │ │ - [ c26c] CHANNEL_MONO │ │ - [ c279] 0.12.42 │ │ - [ c281] libaaudio.so │ │ - [ c28e] AAudioStreamBuilder_delete │ │ - [ c2a9] AAudioStreamBuilder_setInputPreset │ │ - [ c2cc] ox │ │ - [ c2cf] February │ │ - [ c2d8] lightgoldenrodyellow │ │ - [ c2ed] palegreen │ │ - [ c2f7] pink │ │ - [ c2fc] salmon │ │ - [ c303] .jpeg │ │ - [ c309] .clx │ │ - [ c30e] .cmod │ │ - [ c318] COM │ │ - [ c31c] Celestia │ │ - [ c325] planitia │ │ - [ c32e] planetographicgrid │ │ - [ c341] Unknown command name '{}' │ │ - [ c35b] cls │ │ - [ c35f] splitview │ │ - [ c369] up │ │ - [ c36c] radius │ │ - [ c373] Second argument to celestia:setsafeareainsets() must be a number │ │ - [ c3b4] getscreendpi │ │ - [ c3c1] getlabelflags │ │ - [ c3cf] getorbitflags │ │ - [ c3dd] gettextcolor │ │ - [ c3ea] geteventhandler │ │ - [ c3fa] windowbordersvisible │ │ - [ c40f] setaudioloop │ │ - [ c41c] getcategories │ │ - [ c42a] Second argument to celestia:flash must be a number │ │ - [ c45d] One argument expected to function celestia:setaltazimuthmode │ │ - [ c49a] Values in table-argument to celestia:setrenderflags() must be boolean │ │ - [ c4e0] Unknown key: {}\n │ │ - [ c4f1] setlabelcolor: color values must be numbers │ │ - [ c51d] One argument expected for function celestia:find() │ │ - [ c550] Internal Error: renderer is nullptr! │ │ - [ c575] disc │ │ - [ c57a] First arg to celestia:utctotdb must be a number │ │ - [ c5aa] Second arg to celestia:newvector must be a number │ │ - [ c5dc] Argument to celestia:runscript must be a string │ │ - [ c60c] Third argument to celestia:overlay must be a number (yoffset) │ │ - [ c64a] Function celestia:setaudioloop requires two arguments │ │ - [ c680] Third argument to celestia:loadtexture must be a string │ │ - [ c6b8] WARNING:\n │ │ + [ ab46] shadow *= 1.0 - texture2D(ringTex, vec2(ringShadowTexCoordX, 0.0), │ │ + [ ab8a] float cosTheta = dot(eyeDir, │ │ + [ abac] triangle_strip │ │ + [ abbb] MeshScale │ │ + [ abc5] 2 │ │ + [ abc7] Ia-0 │ │ + [ abcc] StarDatabase::read: nStars = {}, time = {} ms\n │ │ + [ abfb] Bad star definition at line {}.\n │ │ + [ ac1c] AppMag │ │ + [ ac23] AppMag cannot be used close to the origin │ │ + [ ac4d] Failed to read entry {} of point array\n │ │ + [ ac75] Processing MaterialShininess chunk\n │ │ + [ ac99] getY │ │ + [ ac9e] , │ │ + [ aca1] engineStarted │ │ + [ acaf] cannot write to file │ │ + [ acc4] lli │ │ + [ acc8] %s\n │ │ + [ accc] Insufficient memory (case %d) │ │ + [ acea] Premature end of JPEG file │ │ + [ ad05] type1 │ │ + [ ad0b] FullName │ │ + [ ad14] UnderlineThickness │ │ + [ ad27] SubrMapOffset │ │ + [ ad35] winfonts │ │ + [ ad3e] AVERAGE_WIDTH │ │ + [ ad4c] SPACING │ │ + [ ad54] RAW_AVERAGE_WIDTH │ │ + [ ad66] RAW_FIGURE_WIDTH │ │ + [ ad77] RAW_PIXEL_SIZE │ │ + [ ad86] RAW_SUBSCRIPT_SIZE │ │ + [ ad99] default-script │ │ + [ ada8] smooth │ │ + [ adaf] PCC │ │ + [ adb3] StartDirection │ │ + [ adc2] dead │ │ + [ adc7] 'package.preload' must be a table │ │ + [ ade9] unexpected zlib return code │ │ + [ ae05] RGB color space not permitted on grayscale PNG │ │ + [ ae34] Invalid image width in IHDR │ │ + [ ae50] Invalid color type in IHDR │ │ + [ ae6b] fixed point overflow ignored │ │ + [ ae88] internal sequential row size calculation error │ │ + [ aeb7] bad data option (internal error) │ │ + [ aed8] bad compression info │ │ + [ aeed] Only compression windows >= 256 supported by PNG │ │ + [ af1e] Ignoring attempt to write bKGD chunk out-of-range for bit_depth │ │ + [ af5e] iTXt: uncompressed text too long │ │ + [ af7f] String "#" has length #; must be >= 2. │ │ + [ afa6] SPICE(TRACEBACKOVERFLOW) │ │ + [ afbf] SPICE(WINDOWEXCESS) │ │ + [ afd3] KERNELS_TO_LOAD │ │ + [ afe3] There is no room left in KEEPER to load another SPICE kernel. The current limit on the number of files that can be loaded is #. │ │ + [ b063] itruex │ │ + [ b06a] ADD TO FRONT │ │ + [ b077] READ │ │ + [ b07c] FILE_FORMAT │ │ + [ b088] An element could not be inserted into the set due to lack of space; set size is #. │ │ + [ b0db] Attempt was made to write to a read-only file. │ │ + [ b10a] The EK file # could not be loaded; the maximum number of distinct tables has already been reached. │ │ + [ b16d] SPICE(EKTABLELISTFULL) │ │ + [ b184] SPICE(EKCOLATTRTABLEFULL) │ │ + [ b19e] ops │ │ + [ b1a2] cends │ │ + [ b1a8] chtype │ │ + [ b1af] DAS SCRATCH FILE │ │ + [ b1c0] lastwd │ │ + [ b1c7] Attempt to read file record failed. File was '#'. Value of IOSTAT was '#'. │ │ + [ b213] DASHLU │ │ + [ b21a] DASHOF │ │ + [ b221] APPNDI │ │ + [ b228] Directory record # in DAS file with handle # is probably corrupted. No high cluster address at or above the input address # was found, though it should have been. High address was #. Data type was #. │ │ + [ b2f0] Could not write DAS double precision record. File = # Record number = #. IOSTAT = #. │ │ + [ b345] dassdr_ │ │ + [ b34d] RDKER: You have called an entry which performs no run-time function. This may indicate a bug. Please check the documentation for the subroutine RDKER. │ │ + [ b3e4] RDKNEW │ │ + [ b3eb] RDTEXT │ │ + [ b3f2] fndlun_ │ │ + [ b3fa] FRMNAM │ │ + [ b401] kcent │ │ + [ b407] An unexpected character was found while attempting to parse the input string. │ │ + [ b456] CONVRT │ │ + [ b45d] SPICE(DIVIDEBYZERO) │ │ + [ b471] SPICE(SCLKTRUNCATED) │ │ + [ b486] TDB │ │ + [ b48a] integer │ │ + [ b492] KPL │ │ + [ b496] CKFXFM │ │ + [ b49d] SPK type # is not supported in your version of the SPICE library. You will need to upgrade your version of the library to make use of ephemerides that contain this SPK data type. │ │ + [ b552] spke19_ │ │ + [ b55a] The trajectory pole vector supplied to SPKE15 had length zero. The most likely cause of this problem is a corrupted SPK (ephemeris) file. │ │ + [ b5e5] KPSOLV │ │ + [ b5ec] CHBIGR │ │ + [ b5f3] SPICE(WRONGSPKTYPE) │ │ + [ b607] SPKR13 │ │ + [ b60e] bpcref │ │ + [ b615] BODY#_CONSTANTS_JED_EPOCH │ │ + [ b62f] BODY#_CONSTS_JED_EPOCH │ │ + [ b646] sinth │ │ + [ b64c] EUL2M │ │ + [ b652] BODFND │ │ + [ b659] alt │ │ + [ b65d] begindata │ │ + [ b668] WNFETD: No such interval. │ │ + [ b682] ZZCLN │ │ + [ b688] The attempt to load file, '#', with architecture, '#', failed because this file architecture is unsupported. │ │ + [ b6f5] SPICE(FTFULL) │ │ + [ b703] Attempt to open file, '#', for read access has failed. This file utilizes an unknown binary file format. This error may result from attempting to open a corrupt file or one of an unknown type. │ │ + [ b7c6] Invalid access method. This error should never be signaled. │ │ + [ b802] TWO-VECTOR │ │ + [ b80d] OBSERVER_TARGET_POSITION │ │ + [ b826] The kernel variable # has used to define frame # was not found after DTPOOL indicated it was present in pool. │ │ + [ b894] spoint │ │ + [ b89b] lrows │ │ + [ b8a1] SPICE(UNNATURALRELATION) │ │ + [ b8ba] The segment type # is not supported. │ │ + [ b8df] CHR page = #; valid range is [1:#] │ │ + [ b902] ZZEKPGRI │ │ + [ b90b] ZZEKPGPG │ │ + [ b914] String end index must be in the range #:# but was #. │ │ + [ b949] Column type is #; value type is #. │ │ + [ b96c] Runaway node pointer chain. Key = #; valid range = 1:#. Tree = #, file = # │ │ + [ b9b8] An attempt to copy a C string to a temporary string of length # failed. This may be due to an unterminated input string. │ │ + [ ba32] IAU_PASIPHAE │ │ + [ ba3f] IAU_TRITON │ │ + [ ba4a] VENUS_BARYCENTER │ │ + [ ba5b] ENCELADUS │ │ + [ ba65] TELESTO │ │ + [ ba6d] YMIR │ │ + [ ba72] MUNDILFARI │ │ + [ ba7d] NARVI │ │ + [ ba83] POLYDEUCES │ │ + [ ba8e] BESTLA │ │ + [ ba95] CHARON │ │ + [ ba9c] VCO │ │ + [ baa0] STARDUST │ │ + [ baa9] HST │ │ + [ baad] OSIRIS-REX │ │ + [ bab8] EPOXI │ │ + [ babe] SOLAR ORBITER │ │ + [ bacc] EXM ROVER │ │ + [ bad6] VSAT │ │ + [ badb] SELENE Vstar │ │ + [ bae8] JACKSON-NEUJMIN │ │ + [ baf8] SCHWASSMANN-WACHMANN 2 │ │ + [ bb0f] SHOEMAKER 2 │ │ + [ bb1b] STEPHAN-OTERMA │ │ + [ bb2a] LOVAS 2 │ │ + [ bb32] PALLAS │ │ + [ bb39] QUETA │ │ + [ bb3f] DSS-28 │ │ + [ bb46] DSS-45 │ │ + [ bb4d] LTL-IEEE │ │ + [ bb56] ZZDYNRT0 │ │ + [ bb5f] *j* │ │ + [ bb63] *N* │ │ + [ bb67] SCLK_DATA_TYPE_ │ │ + [ bb77] kvmaxn │ │ + [ bb7e] SPICE(BADFRAME) │ │ + [ bb8e] Aberration correction flag # calls for stellar aberration but not light time corrections. This combination is not expected. │ │ + [ bc0a] ZZSPKPA0 │ │ + [ bc13] bascnt │ │ + [ bc1a] SPICE(NOPICTURE) │ │ + [ bc2b] Hour │ │ + [ bc30] Second │ │ + [ bc37] Julian Date indicator │ │ + [ bc4d] JUNE │ │ + [ bc52] Y-i/i:i │ │ + [ bc5a] i-Ydi:n │ │ + [ bc62] i-iti:i │ │ + [ bc6a] iid │ │ + [ bc6e] YDmHM │ │ + [ bc74] imii:i:n │ │ + [ bc7d] inY │ │ + [ bc81] i/i/ii:i:i │ │ + [ bc8c] Y-i-itn │ │ + [ bc94] i-itx │ │ + [ bc9a] i-i-itnx │ │ + [ bca3] The caller specified that # double precision numbers are to be translated from binary format # to #. However there is only room to hold # integers in the output array. This error should never occur. │ │ + [ bd6c] RH │ │ + [ bd6f] GB │ │ + [ bd72] gan │ │ + [ bd76] ang │ │ + [ bd7a] arc │ │ + [ bd7e] bg │ │ + [ bd81] bjn │ │ + [ bd85] bm │ │ + [ bd88] byn │ │ + [ bd8c] cad │ │ + [ bd90] csb │ │ + [ bd94] fan │ │ + [ bd98] frm │ │ + [ bd9c] is │ │ + [ bd9f] it │ │ + [ bda2] koi │ │ + [ bda6] krl │ │ + [ bdaa] lad │ │ + [ bdae] li │ │ + [ bdb1] sam │ │ + [ bdb5] tsi │ │ + [ bdb9] swc │ │ + [ bdbd] afr │ │ + [ bdc1] cha │ │ + [ bdc5] chu │ │ + [ bdc9] kor │ │ + [ bdcd] mlg │ │ + [ bdd1] roh │ │ + [ bdd5] wln │ │ + [ bdd9] yor │ │ + [ bddd] BI │ │ + [ bde0] DG │ │ + [ bde3] NC │ │ + [ bde6] NF │ │ + [ bde9] WS │ │ + [ bdec] ALB │ │ + [ bdf0] CYP │ │ + [ bdf4] MHL │ │ + [ bdf8] NCL │ │ + [ bdfc] SLE │ │ + [ be00] SSD │ │ + [ be04] VNM │ │ + [ be08] XKK │ │ + [ be0c] ZWE │ │ + [ be10] TMP │ │ + [ be14] et_EE │ │ + [ be1a] is_IS │ │ + [ be20] mn_MN │ │ + [ be26] NY │ │ + [ be29] Asia/Choibalsan │ │ + [ be39] OMST │ │ + [ be3e] YEKT │ │ + [ be43] VOLST │ │ + [ be49] EEST │ │ + [ be4e] Africa/Windhoek │ │ + [ be5e] America/Miquelon │ │ + [ be6f] America/Godthab │ │ + [ be7f] ICU_TIMEZONE_FILES_DIR │ │ + [ be96] trie │ │ + [ be9b] ar_BH │ │ + [ bea1] ar_MA │ │ + [ bea7] en_AU │ │ + [ bead] en_ZW │ │ + [ beb3] es_MX │ │ + [ beb9] fr_RE │ │ + [ bebf] bs_Latn_BA │ │ + [ beca] pa_Arab_PK │ │ + [ bed5] ts_ZA │ │ + [ bedb] sgn-be-nl │ │ + [ bee5] ucnv_openAlgorithmic │ │ + [ befa] resc │ │ + [ beff] hebrew │ │ + [ bf06] ethiopic │ │ + [ bf0f] M03 │ │ + [ bf13] contextTransforms │ │ + [ bf25] Countries%short │ │ + [ bf35] unassigned │ │ + [ bf40] enclosing mark │ │ + [ bf4f] decimal digit number │ │ + [ bf64] initial punctuation │ │ + [ bf78] U_INVALID_TABLE_FORMAT │ │ + [ bf8f] U_MISPLACED_QUANTIFIER │ │ + [ bfa6] U_ILLEGAL_CHAR_IN_SEGMENT │ │ + [ bfc0] U_INTERNAL_TRANSLITERATOR_ERROR │ │ + [ bfe0] U_BRK_ASSIGN_ERROR │ │ + [ bff3] U_BRK_NEW_LINE_IN_QUOTED_STRING │ │ + [ c013] U_PLUGIN_DIDNT_SET_LEVEL │ │ + [ c02c] BYR │ │ + [ c030] EEK │ │ + [ c034] FJD │ │ + [ c038] GHS │ │ + [ c03c] LKR │ │ + [ c040] TOP │ │ + [ c044] transPre32 │ │ + [ c04f] M04L │ │ + [ c054] M07L │ │ + [ c059] terabit │ │ + [ c061] dot │ │ + [ c065] pixel-per-inch │ │ + [ c074] watt │ │ + [ c079] cup │ │ + [ c07d] hectoliter │ │ + [ c088] dative │ │ + [ c08f] minusSign │ │ + [ c099] deka │ │ + [ c09e] case │ │ + [ c0a3] dn │ │ + [ c0a6] account │ │ + [ c0ae] tertiary tailoring gap too small │ │ + [ c0cf] starred-relation string range is not all NFD-inert │ │ + [ c102] last variable │ │ + [ c110] in3_to_m3 │ │ + [ c11a] glucose_molar_mass │ │ + [ c12d] AChoreographerFrameCallbackData_getFrameTimelineDeadlineNanos │ │ + [ c16b] /proc/cpuinfo │ │ + [ c179] thread constructor failed │ │ + [ c193] android/app/NativeActivity │ │ + [ c1ae] android/view/WindowManager │ │ + [ c1c9] mousebuttonup │ │ + [ c1d7] Anti-aliasing enabled │ │ + [ c1ed] cel: │ │ + [ c1f2] argument not found │ │ + [ c205] StarNameDatabase │ │ + [ c216] LinearFadeFraction │ │ + [ c229] OrbitPathSamplePoints │ │ + [ c23f] Renderer: %s\n │ │ + [ c24d] minutes │ │ + [ c255] Rotation period: {} {}\n │ │ + [ c26d] solar system │ │ + [ c27a] NEON: %s\n │ │ + [ c288] Conversion:\n │ │ + [ c299] CHANNEL_MONO │ │ + [ c2a6] 0.12.42 │ │ + [ c2ae] libaaudio.so │ │ + [ c2bb] AAudioStreamBuilder_delete │ │ + [ c2d6] AAudioStreamBuilder_setInputPreset │ │ + [ c2f9] ox │ │ + [ c2fc] February │ │ + [ c305] lightgoldenrodyellow │ │ + [ c31a] palegreen │ │ + [ c324] pink │ │ + [ c329] salmon │ │ + [ c330] .jpeg │ │ + [ c336] .clx │ │ + [ c33b] .cmod │ │ + [ c345] COM │ │ + [ c349] Celestia │ │ + [ c352] planitia │ │ + [ c35b] planetographicgrid │ │ + [ c36e] Unknown command name '{}' │ │ + [ c388] cls │ │ + [ c38c] splitview │ │ + [ c396] up │ │ + [ c399] radius │ │ + [ c3a0] Second argument to celestia:setsafeareainsets() must be a number │ │ + [ c3e1] getscreendpi │ │ + [ c3ee] getlabelflags │ │ + [ c3fc] getorbitflags │ │ + [ c40a] gettextcolor │ │ + [ c417] geteventhandler │ │ + [ c427] windowbordersvisible │ │ + [ c43c] setaudioloop │ │ + [ c449] getcategories │ │ + [ c457] Second argument to celestia:flash must be a number │ │ + [ c48a] One argument expected to function celestia:setaltazimuthmode │ │ + [ c4c7] Values in table-argument to celestia:setrenderflags() must be boolean │ │ + [ c50d] Unknown key: {}\n │ │ + [ c51e] setlabelcolor: color values must be numbers │ │ + [ c54a] One argument expected for function celestia:find() │ │ + [ c57d] Internal Error: renderer is nullptr! │ │ + [ c5a2] disc │ │ + [ c5a7] First arg to celestia:utctotdb must be a number │ │ + [ c5d7] Second arg to celestia:newvector must be a number │ │ + [ c609] Argument to celestia:runscript must be a string │ │ + [ c639] Third argument to celestia:overlay must be a number (yoffset) │ │ + [ c677] Function celestia:setaudioloop requires two arguments │ │ + [ c6ad] Third argument to celestia:loadtexture must be a string │ │ + [ c6e5] WARNING:\n │ │ This script requests permission to read/write files\n │ │ and execute external programs. Allowing this can be\n │ │ dangerous.\n │ │ Do you trust the script and want to allow this? │ │ - [ c765] BLEND │ │ - [ c76b] NEAREST │ │ - [ c773] argument 5 to gl.Frustum must be a number │ │ - [ c79d] argument 1 to gl.TexCoord must be a number │ │ - [ c7c8] No arguments expected for image:getheight() │ │ - [ c7f4] setorbitcolor │ │ - [ c802] spectraltype │ │ - [ c80f] No arguments allowed for object:bodyfixedframe │ │ - [ c83e] One or no arguments allowed for to object:orbitframe │ │ - [ c873] gettrackedobject │ │ - [ c884] Argument to observer:setorientation must be a rotation │ │ - [ c8bb] No arguments expected to observer:gettime │ │ - [ c8e5] __sub │ │ - [ c8eb] second argument to rotation:slerp must be a number │ │ - [ c91e] Error opening LuaHook {} │ │ - [ c937] .lua │ │ - [ c93c] color0 │ │ - [ c943] texcoord3 │ │ - [ c94d] specular {} {} {}\n │ │ - [ c960] {} │ │ - [ c964] neptune-sun │ │ - [ c970] enceladus │ │ - [ c97a] jpl-saturn-sun │ │ - [ c989] pluto │ │ - [ c98f] jpl-mercury-sun │ │ - [ c99f] Error reading sample file {}.\n │ │ - [ c9be] Cannot load ScriptedOrbit package: 'require' function is unavailable\n │ │ - [ ca04] Error calling ScriptedRotation generator function: {}\n │ │ - [ ca3b] in_Size │ │ - [ ca43] Empty or single-element chain found in asterism "{}"\n │ │ - [ ca79] XXX │ │ - [ ca7d] Col │ │ - [ ca81] Visible │ │ - [ ca89] GL_EXT_texture_border_clamp │ │ - [ caa5] Error compiling fragment shader:\n │ │ - [ cac7] CH │ │ - [ caca] AS │ │ - [ cacd] Landing Site │ │ - [ cada] OC │ │ - [ cadd] Invalid filename in SampledOrientation\n │ │ - [ cb05] Beginning │ │ - [ cb0f] ArgOfPericenter │ │ - [ cb1f] MeanAnomaly │ │ - [ cb2b] Planetographic │ │ - [ cb3a] Kernel list for SPICE rotation is neither a string nor array of strings\n │ │ - [ cb83] Tilt │ │ - [ cb88] mE │ │ - [ cb8b] ringPlane │ │ - [ cb95] ringShadowTexCoord │ │ - [ cba8] vec2 shadowCenter;\n │ │ - [ cbbc] NL = dot( │ │ - [ cbc6] gl_FragColor = color * diff + texture2D(specTex, │ │ - [ cbf8] float cosTheta = dot(V, │ │ - [ cc15] gl_FragColor = vec4(color, dot(scatterEx, vec3(0.333)));\n │ │ - [ cc53] mieH │ │ - [ cc58] in_PositionNext │ │ - [ cc68] {}{}_{} │ │ - [ cc71] float calculateShadow()\n │ │ + [ c792] BLEND │ │ + [ c798] NEAREST │ │ + [ c7a0] argument 5 to gl.Frustum must be a number │ │ + [ c7ca] argument 1 to gl.TexCoord must be a number │ │ + [ c7f5] No arguments expected for image:getheight() │ │ + [ c821] setorbitcolor │ │ + [ c82f] spectraltype │ │ + [ c83c] No arguments allowed for object:bodyfixedframe │ │ + [ c86b] One or no arguments allowed for to object:orbitframe │ │ + [ c8a0] gettrackedobject │ │ + [ c8b1] Argument to observer:setorientation must be a rotation │ │ + [ c8e8] No arguments expected to observer:gettime │ │ + [ c912] __sub │ │ + [ c918] second argument to rotation:slerp must be a number │ │ + [ c94b] Error opening LuaHook {} │ │ + [ c964] .lua │ │ + [ c969] color0 │ │ + [ c970] texcoord3 │ │ + [ c97a] specular {} {} {}\n │ │ + [ c98d] {} │ │ + [ c991] neptune-sun │ │ + [ c99d] enceladus │ │ + [ c9a7] jpl-saturn-sun │ │ + [ c9b6] pluto │ │ + [ c9bc] jpl-mercury-sun │ │ + [ c9cc] Error reading sample file {}.\n │ │ + [ c9eb] Cannot load ScriptedOrbit package: 'require' function is unavailable\n │ │ + [ ca31] Error calling ScriptedRotation generator function: {}\n │ │ + [ ca68] in_Size │ │ + [ ca70] Empty or single-element chain found in asterism "{}"\n │ │ + [ caa6] XXX │ │ + [ caaa] Col │ │ + [ caae] Visible │ │ + [ cab6] GL_EXT_texture_border_clamp │ │ + [ cad2] Error compiling fragment shader:\n │ │ + [ caf4] CH │ │ + [ caf7] AS │ │ + [ cafa] Landing Site │ │ + [ cb07] OC │ │ + [ cb0a] Invalid filename in SampledOrientation\n │ │ + [ cb32] Beginning │ │ + [ cb3c] ArgOfPericenter │ │ + [ cb4c] MeanAnomaly │ │ + [ cb58] Planetographic │ │ + [ cb67] Kernel list for SPICE rotation is neither a string nor array of strings\n │ │ + [ cbb0] Tilt │ │ + [ cbb5] mE │ │ + [ cbb8] ringPlane │ │ + [ cbc2] ringShadowTexCoord │ │ + [ cbd5] vec2 shadowCenter;\n │ │ + [ cbe9] NL = dot( │ │ + [ cbf3] gl_FragColor = color * diff + texture2D(specTex, │ │ + [ cc25] float cosTheta = dot(V, │ │ + [ cc42] gl_FragColor = vec4(color, dot(scatterEx, vec3(0.333)));\n │ │ + [ cc80] mieH │ │ + [ cc85] in_PositionNext │ │ + [ cc95] {}{}_{} │ │ + [ cc9e] float calculateShadow()\n │ │ {\n │ │ float texelSize = 1.0 / shadowMapSize;\n │ │ float s = 0.0;\n │ │ float bias = max(0.005 * (1.0 - cosNormalLightDir), 0.0005);\n │ │ for(float x = -1.0; x <= 1.0; x += 1.0)\n │ │ {\n │ │ for(float y = -1.0; y <= 1.0; y += 1.0)\n │ │ {\n │ │ float pcfDepth = texture2D(shadowMapTex0, shadowTexCoord0.xy + vec2(x * texelSize, y * texelSize)).r;\n │ │ s += shadowTexCoord0.z - bias > pcfDepth ? 1.0 : 0.0;\n │ │ }\n │ │ }\n │ │ return 1.0 - s / 9.0;\n │ │ }\n │ │ - [ ce57] totalLight = 1.0 - totalLight;\n │ │ + [ ce84] totalLight = 1.0 - totalLight;\n │ │ totalLight = totalLight * totalLight * totalLight * totalLight;\n │ │ - [ ceb7] Error in timeline of '{}': phase {} is not a property group.\n │ │ - [ cef5] Loading image from file {}\n │ │ - [ cf11] Read3DSFile: Error reading 3DS file top level chunk size\n │ │ - [ cf4b] Failed to read entry {} of smoothing group array\n │ │ - [ cf7d] Processing MaterialTexmap chunk\n │ │ - [ cf9e] {"bytes":[ │ │ - [ cfa9] : 0x │ │ - [ cfae] libGLESv1_CM.so │ │ - [ cfbe] Requested feature was omitted at compile time │ │ - [ cfec] Seek failed on temporary file │ │ - [ d00a] Start of Image │ │ - [ d019] OpticalSize │ │ - [ d025] CDV │ │ - [ d029] BlendDesignPositions │ │ - [ d03e] BlendDesignMap │ │ - [ d051] KP │ │ - [ d054] W0Y │ │ - [ d058] constants │ │ - [ d062] seeall │ │ - [ d069] / │ │ - [ d06b] Unknown compression method in IHDR │ │ - [ d08e] h: │ │ - [ d092] sCAL width │ │ - [ d09d] png_read_update_info/png_start_read_image: duplicate call │ │ - [ d0d7] png_image_begin_read_from_stdio: incorrect PNG_IMAGE_VERSION │ │ - [ d114] png_image_finish_read: row_stride too large │ │ - [ d140] rgb[ga] color-map: too few entries │ │ - [ d163] Invalid pCAL parameter count │ │ - [ d180] tRNS chunk has out-of-range samples for bit_depth │ │ - [ d1b2] unknown chunk: out of memory │ │ - [ d1cf] Compression buffer size cannot be changed because it is in use │ │ - [ d20e] Call to NULL write function │ │ - [ d22a] Wrote palette index exceeding num_palette │ │ - [ d254] Invalid image color type specified │ │ - [ d277] Invalid number of transparent colors specified │ │ - [ d2a6] zTXt: invalid keyword │ │ - [ d2bc] iTXt: invalid keyword │ │ - [ d2d2] SPICE(INVALIDOPERATION) │ │ - [ d2ea] ERRACT │ │ - [ d2f1] Window Does Not Have an Even Number of Endpoints │ │ - [ d322] Number of path symbols is #; number of path values is #; counts must match. │ │ - [ d36e] UNLOAD │ │ - [ d375] The file type contains nonprinting characters. │ │ - [ d3a4] formatted io not allowed │ │ - [ d3bd] An excess of │ │ - [ d3ca] daffa_ │ │ - [ d3d1] stthis │ │ - [ d3d8] No array is current; the `next' array is the first array of DAF # │ │ - [ d41a] ekqmgr_ │ │ - [ d422] tbstpt │ │ - [ d429] stnrow │ │ - [ d430] rsize │ │ - [ d436] DAS │ │ - [ d43a] dirrec │ │ - [ d441] There is no DAS file open with handle = # │ │ - [ d46b] DASWRC │ │ - [ d472] ktotal_c │ │ - [ d47b] Node # cannot be found by forward traversal, starting at node #. │ │ - [ d4bc] PREV was #. LIST was #. Valid range is 1 to #. │ │ - [ d4ec] LNKINI │ │ - [ d4f3] The internal file table is already full, with # entries. │ │ - [ d52c] PCKSFS │ │ - [ d533] The value associated with index # of the kernel variable # is outside the range of integers. The value stored was: # . │ │ - [ d5aa] resnum │ │ - [ d5b1] FRINFO │ │ - [ d5b8] _CLASS │ │ - [ d5bf] MILLION │ │ - [ d5c7] sclks │ │ - [ d5cd] CK_ │ │ - [ d5d1] Window size in type 05 segment was #; max allowed value is # for subtypes 1 and 3 (Lagrange, 4 or 7-element packets). │ │ - [ d647] SEPOOL │ │ - [ d64e] SPICE(INDEXTOOLARGE) │ │ - [ d663] meta │ │ - [ d668] ASC │ │ - [ d66c] Insufficient ephemeris data has been loaded to compute the state of TARG relative to OBS at the ephemeris epoch #. │ │ - [ d6e0] v2 │ │ - [ d6e3] SPKE19 │ │ - [ d6ea] prop2b_ │ │ - [ d6f2] SPKE03 │ │ - [ d6f9] SPKR21 │ │ - [ d700] PCKE20 │ │ - [ d707] The data array associated with variable # has dimension #, which is larger than the available space # in the output array. │ │ - [ d782] TKFRAM │ │ - [ d789] SPICE(INCOMPLETEFRAME) │ │ - [ d7a0] Frame name-based and frame ID-based text kernel (fixed-offset) frame definition keywords '#' and '#' are both present in the POOL. Most likely this is because loaded text kernels contain competing definitions of the '#' frame using different keyword styles, which is not allowed. │ │ - [ d8b9] MATRIX │ │ - [ d8c0] TRCPKG: You have called an entry that performs no run-time function. │ │ - [ d906] trcpkg_ │ │ - [ d90e] left off │ │ - [ d917] ZZBODGET │ │ - [ d920] SPICE(UNSUPPORTEDMETHOD) │ │ - [ d939] INQUIRE failed. │ │ - [ d949] SPICE(RWCONFLICT) │ │ - [ d95b] HANDLE # was not found in the file table but was located in the unit table. This error should never occur. │ │ - [ d9c7] orderv │ │ - [ d9ce] Attempt to remove row # from the unit table failed because valid row indices range from 1 to NUT. │ │ - [ da30] Size of d.p. component of segment is #; cannot extract descriptor. This is a file format error which may be indicative of a corrupted file. │ │ - [ dabd] OBSERVER │ │ - [ dac6] UNITS │ │ - [ dacc] RECTANGULAR │ │ - [ dad8] copy │ │ - [ dadd] ZZEKJSRT │ │ - [ dae6] rhans │ │ - [ daec] ZZEKILLE │ │ - [ daf5] ZZEKLLEI │ │ - [ dafe] SPICE(UNPARSEDQUERY) │ │ - [ db13] DASADD │ │ - [ db1a] ZZEKRD08 │ │ - [ db23] ZZEKRD04 │ │ - [ db2c] ZZEKMLOC │ │ - [ db35] Key #; valid range = 1:#. Tree = #, file = #. Key was not found. This probably indicates a corrupted file or a bug in the EK code. │ │ - [ dbba] An attempt to create a temporary string failed. │ │ - [ dbea] Attempt to allocate string of length # failed. │ │ - [ dc19] IAU_EUROPA │ │ - [ dc24] IAU_CALYPSO │ │ - [ dc30] IAU_KALYKE │ │ - [ dc3b] ZZGFTREB │ │ - [ dc44] HASH SIZE │ │ - [ dc4e] NEPTUNE BARYCENTER │ │ - [ dc61] EURYDOME │ │ - [ dc6a] PROMETHEUS │ │ - [ dc75] BERGELMIR │ │ - [ dc7f] PERDITA │ │ - [ dc87] IMAP │ │ - [ dc8c] VSOP │ │ - [ dc91] MCOB │ │ - [ dc96] MGS SIMULATION │ │ - [ dca5] PERSEVERANCE │ │ - [ dcb2] SOIL MOISTURE ACTIVE AND PASSIVE │ │ - [ dcd3] MER-2 │ │ - [ dcd9] ASHBROOK-JACKSON │ │ - [ dcea] DE VICO-SWIFT │ │ - [ dcf8] KOWAL 2 │ │ - [ dd00] TEMPEL-TUTTLE │ │ - [ dd0e] PARKER-HARTLEY │ │ - [ dd1d] 1992KD │ │ - [ dd24] GOLDSTONE │ │ - [ dd2e] DSS-42 │ │ - [ dd35] The ZZHASH function calculated a negative value for string $1. Contact NAIF. │ │ - [ dd82] SYSTEM │ │ - [ dd89] O/S │ │ - [ dd8d] zzrvar_ │ │ - [ dd95] A kernel pool variable name read from a kernel file exceeds the maximum allowed length #1. The actual length of the variable name is #2, the offending variable name to #3 characters: '#4'. │ │ - [ de52] SPICE(BADTIMESPEC) │ │ - [ de65] [e] │ │ - [ de69] H*M*S │ │ - [ de6f] DAYSEC │ │ - [ de77] JDTDT │ │ - [ de7e] The FROM time representation '#' is not recognized. │ │ - [ deb3] Cosine of the aberration angle is 0; this cannot occur for realistic observer velocities. This case can arise due to uninitialized inputs. This cosine value is used as a divisor in a later computation, so it must not be equal to zero. │ │ - [ df9e] stops │ │ - [ dfa4] ZZSWFFET │ │ - [ dfad] SPICE(MISSINGFRAMEVAR) │ │ - [ dfc4] The requested frame # has # associated base frames. The maximum number that can be supported is #. │ │ - [ e027] SPICE(UNPARSEDTIME) │ │ - [ e03b] comma │ │ - [ e041] DOY │ │ - [ e045] lx4uns_ │ │ - [ e04d] Y*m*D* │ │ - [ e054] YDmH │ │ - [ e059] Ynm │ │ - [ e05d] iYdi:i:i │ │ - [ e066] iiYi:i │ │ - [ e06d] imii │ │ - [ e072] miY │ │ - [ e076] mDYHM │ │ - [ e07c] Y*y** │ │ - [ e082] DE │ │ - [ e085] jw │ │ - [ e088] aeb │ │ - [ e08c] ase │ │ - [ e090] bqi │ │ - [ e094] ca │ │ - [ e097] ff │ │ - [ e09a] fi │ │ - [ e09d] ia │ │ - [ e0a0] jmc │ │ - [ e0a4] kiu │ │ - [ e0a8] lui │ │ - [ e0ac] naq │ │ - [ e0b0] nso │ │ - [ e0b4] pcd │ │ - [ e0b8] sad │ │ - [ e0bc] saz │ │ - [ e0c0] mlt │ │ - [ e0c4] LY │ │ - [ e0c7] MS │ │ - [ e0ca] NP │ │ - [ e0cd] CPV │ │ - [ e0d1] JPN │ │ - [ e0d5] KEN │ │ - [ e0d9] MAR │ │ - [ e0dd] uprv_ebcdicFromAscii() string[%d] contains a variant character in position %d\n │ │ - [ e12c] si_LK │ │ - [ e132] subdivision │ │ - [ e13e] Asia/Hovd │ │ - [ e148] Brazil/East │ │ - [ e154] AKDT │ │ - [ e159] ar_AE │ │ - [ e15f] en_ZA │ │ - [ e165] bs_Cyrl │ │ - [ e16d] sr_Latn_BA │ │ - [ e178] dsb_DE │ │ - [ e17f] quz_EC │ │ - [ e186] i-tsu │ │ - [ e18c] en-x-i-default │ │ - [ e19b] sfs │ │ - [ e19f] LOCALE │ │ - [ e1a6] Latn │ │ - [ e1ab] ucnv_openPackage │ │ - [ e1bc] chinese │ │ - [ e1c4] dangi │ │ - [ e1ca] day-standalone-except-narrow │ │ - [ e1e7] month-narrow │ │ - [ e1f4] coptic │ │ - [ e1fb] M11 │ │ - [ e1ff] nfkc │ │ - [ e204] udict_swap(): too few bytes (%d after header) for dictionary data\n │ │ - [ e247] U_MALFORMED_VARIABLE_REFERENCE │ │ - [ e266] U_UNDEFINED_SEGMENT_REFERENCE │ │ - [ e284] U_REGEX_RULE_SYNTAX │ │ - [ e298] AZN │ │ - [ e29c] GBP │ │ - [ e2a0] GQE │ │ - [ e2a4] MDL │ │ - [ e2a8] MRU │ │ - [ e2ac] MVP │ │ - [ e2b0] MZN │ │ - [ e2b4] SDD │ │ - [ e2b8] ZWL │ │ - [ e2bc] currencyFormat │ │ - [ e2cb] Conversion syntax │ │ - [ e2dd] Clamped │ │ - [ e2e5] No status │ │ - [ e2ef] force │ │ - [ e2f5] graphics │ │ - [ e2fe] arc-second │ │ - [ e309] square-kilometer │ │ - [ e31a] pixel-per-centimeter │ │ - [ e32f] astronomical-unit │ │ - [ e341] ounce-troy │ │ - [ e34c] dessert-spoon │ │ - [ e35a] instrumental │ │ - [ e367] one │ │ - [ e36b] pluralRanges │ │ - [ e378] pow2- │ │ - [ e37e] convertUnits │ │ - [ e38b] femto │ │ - [ e391] yocto │ │ - [ e397] per │ │ - [ e39b] Sequence │ │ - [ e3a4] CollationBuilder initialization failed │ │ - [ e3cb] reset primary-before [first trailing] not supported │ │ - [ e3ff] range without start in starred-relation string │ │ - [ e42e] string contains an unpaired surrogate │ │ - [ e454] not a valid UnicodeSet pattern │ │ - [ e473] unitPreferenceData │ │ - [ e486] sho_to_m3 │ │ - [ e490] Unable to write to %s file. │ │ - [ e4ac] Using internal %s class from dex bytes. │ │ - [ e4d4] static void swappy::SwappyGL::resetFramePacing() │ │ - [ e505] void swappy::SwappyCommon::onChoreographer(int64_t) │ │ - [ e539] android/os/Build$VERSION │ │ - [ e552] SDK_INT │ │ - [ e55a] eglCreateSyncKHR │ │ - [ e56b] eglDestroySyncKHR │ │ - [ e57e] Unable to render viewport effect.\n │ │ - [ e5a1] kelvin │ │ - [ e5a8] number is too big │ │ - [ e5ba] ProjectionMode │ │ - [ e5c9] SAOCrossIndex │ │ - [ e5d7] ReverseMouseWheel │ │ - [ e5e9] AntialiasingSamples │ │ - [ e5fd] IgnoreGLExtensions │ │ - [ e610] WO │ │ - [ e614] angle │ │ - [ e61c] Edit Mode │ │ - [ e626] LockTo │ │ - [ e62d] Star system barycenter\n │ │ - [ e645] days │ │ - [ e64a] Playback Device │ │ - [ e65a] Invalid argument │ │ - [ e66b] Connection reset │ │ - [ e67c] AAudioStreamBuilder_setContentType │ │ - [ e69f] LIST │ │ - [ e6a4] &tsrc= │ │ - [ e6ab] May │ │ - [ e6af] June │ │ - [ e6b4] lightgrey │ │ - [ e6be] olivedrab │ │ - [ e6c8] skyblue │ │ - [ e6d3] globulars │ │ - [ e6dd] grid │ │ - [ e6e2] mare │ │ - [ e6e7] loop │ │ - [ e6ec] haschild │ │ - [ e6f5] Argument of category:createchild must be a string! │ │ - [ e728] flash │ │ - [ e72e] getscreendimension │ │ - [ e741] tdbtoutc │ │ - [ e74a] One argument expected for celestia:getlinecolor() │ │ - [ e77c] One argument expected for celestia:setminfeaturesize() │ │ - [ e7b3] Argument to celestia:setminorbitsize() must be a number │ │ - [ e7eb] enhanced │ │ - [ e7f4] newrotation: first argument must be a vector │ │ - [ e821] Need 0 to 2 arguments for celestia:takescreenshot │ │ - [ e853] Two arguments required for celestia:registereventhandler │ │ - [ e88c] Second argument to celestia:playaudio must be a string │ │ - [ e8c3] One argument required for celestia:settimeslice() │ │ - [ e8f5] In line {}: {} │ │ - [ e904] Internal Error: Invalid table entry for LuaState-pointer │ │ - [ e93d] class_frame │ │ - [ e949] class_font │ │ - [ e954] class_category │ │ - [ e963] Internal Error: Invalid value in checkTimeslice │ │ - [ e993] from │ │ - [ e998] getrefobject │ │ - [ e9a5] Enable │ │ - [ e9ac] argument 1 to gl.Color must be a number │ │ - [ e9d4] getwidth │ │ - [ e9dd] getheight │ │ - [ e9e7] [Celscript] │ │ - [ e9f3] No arguments expected for font:getmaxdescent() │ │ - [ ea22] No arguments expected to function object:radius │ │ - [ ea52] unknown │ │ - [ ea5a] rotationPeriod │ │ - [ ea69] geomAlbedo │ │ - [ ea74] oblateness │ │ - [ ea7f] Second argument to object:mark must be a string │ │ - [ eaaf] lowercolor │ │ - [ eaba] [Observer] │ │ - [ eac5] One to five arguments expected to observer:gotolonglat │ │ - [ eafc] First argument to observer:synchronous must be an object │ │ - [ eb35] slerp │ │ - [ eb3b] add │ │ - [ eb3f] jpl-pluto-sun │ │ - [ eb4d] oberon │ │ - [ eb54] jpl-saturn-ssb │ │ - [ eb63] Ephemeris record size: {} doubles, with {} endianess.\n │ │ - [ eb9a] Error finding data in ASCII sample file {}.\n │ │ - [ ebc7] Error parsing asterism file: expected string\n │ │ - [ ebf5] Cir │ │ - [ ebf9] CrB │ │ - [ ebfd] Tri │ │ - [ ec01] Vol │ │ - [ ec05] Sb │ │ - [ ec08] v │ │ - [ ec0a] Unknown object passed to GetInfoLog()!\n │ │ - [ ec32] AR │ │ - [ ec35] Period │ │ - [ ec3c] RGBA{}{}{}{} │ │ - [ ec49] ringRadius │ │ - [ ec54] overlayTexCoord = │ │ - [ ec67] eyePosition │ │ - [ ec73] vec3 N = normalize(normal);\n │ │ - [ ec90] vec3 eyeDir = normalize(eyePosition - nposition);\n │ │ - [ ecc3] intensity │ │ - [ eccd] shadow = 1.0;\n │ │ - [ ecdc] ;\n │ │ - [ ece0] scatterCoeffSum │ │ - [ ecf1] attribute vec4 in_Position;\n\n │ │ + [ cee4] Error in timeline of '{}': phase {} is not a property group.\n │ │ + [ cf22] Loading image from file {}\n │ │ + [ cf3e] Read3DSFile: Error reading 3DS file top level chunk size\n │ │ + [ cf78] Failed to read entry {} of smoothing group array\n │ │ + [ cfaa] Processing MaterialTexmap chunk\n │ │ + [ cfcb] {"bytes":[ │ │ + [ cfd6] : 0x │ │ + [ cfdb] libGLESv1_CM.so │ │ + [ cfeb] Requested feature was omitted at compile time │ │ + [ d019] Seek failed on temporary file │ │ + [ d037] Start of Image │ │ + [ d046] OpticalSize │ │ + [ d052] CDV │ │ + [ d056] BlendDesignPositions │ │ + [ d06b] BlendDesignMap │ │ + [ d07e] KP │ │ + [ d081] W0Y │ │ + [ d085] constants │ │ + [ d08f] seeall │ │ + [ d096] / │ │ + [ d098] Unknown compression method in IHDR │ │ + [ d0bb] h: │ │ + [ d0bf] sCAL width │ │ + [ d0ca] png_read_update_info/png_start_read_image: duplicate call │ │ + [ d104] png_image_begin_read_from_stdio: incorrect PNG_IMAGE_VERSION │ │ + [ d141] png_image_finish_read: row_stride too large │ │ + [ d16d] rgb[ga] color-map: too few entries │ │ + [ d190] Invalid pCAL parameter count │ │ + [ d1ad] tRNS chunk has out-of-range samples for bit_depth │ │ + [ d1df] unknown chunk: out of memory │ │ + [ d1fc] Compression buffer size cannot be changed because it is in use │ │ + [ d23b] Call to NULL write function │ │ + [ d257] Wrote palette index exceeding num_palette │ │ + [ d281] Invalid image color type specified │ │ + [ d2a4] Invalid number of transparent colors specified │ │ + [ d2d3] zTXt: invalid keyword │ │ + [ d2e9] iTXt: invalid keyword │ │ + [ d2ff] SPICE(INVALIDOPERATION) │ │ + [ d317] ERRACT │ │ + [ d31e] Window Does Not Have an Even Number of Endpoints │ │ + [ d34f] Number of path symbols is #; number of path values is #; counts must match. │ │ + [ d39b] UNLOAD │ │ + [ d3a2] The file type contains nonprinting characters. │ │ + [ d3d1] formatted io not allowed │ │ + [ d3ea] An excess of │ │ + [ d3f7] daffa_ │ │ + [ d3fe] stthis │ │ + [ d405] No array is current; the `next' array is the first array of DAF # │ │ + [ d447] ekqmgr_ │ │ + [ d44f] tbstpt │ │ + [ d456] stnrow │ │ + [ d45d] rsize │ │ + [ d463] DAS │ │ + [ d467] dirrec │ │ + [ d46e] There is no DAS file open with handle = # │ │ + [ d498] DASWRC │ │ + [ d49f] ktotal_c │ │ + [ d4a8] Node # cannot be found by forward traversal, starting at node #. │ │ + [ d4e9] PREV was #. LIST was #. Valid range is 1 to #. │ │ + [ d519] LNKINI │ │ + [ d520] The internal file table is already full, with # entries. │ │ + [ d559] PCKSFS │ │ + [ d560] The value associated with index # of the kernel variable # is outside the range of integers. The value stored was: # . │ │ + [ d5d7] resnum │ │ + [ d5de] FRINFO │ │ + [ d5e5] _CLASS │ │ + [ d5ec] MILLION │ │ + [ d5f4] sclks │ │ + [ d5fa] CK_ │ │ + [ d5fe] Window size in type 05 segment was #; max allowed value is # for subtypes 1 and 3 (Lagrange, 4 or 7-element packets). │ │ + [ d674] SEPOOL │ │ + [ d67b] SPICE(INDEXTOOLARGE) │ │ + [ d690] meta │ │ + [ d695] ASC │ │ + [ d699] Insufficient ephemeris data has been loaded to compute the state of TARG relative to OBS at the ephemeris epoch #. │ │ + [ d70d] v2 │ │ + [ d710] SPKE19 │ │ + [ d717] prop2b_ │ │ + [ d71f] SPKE03 │ │ + [ d726] SPKR21 │ │ + [ d72d] PCKE20 │ │ + [ d734] The data array associated with variable # has dimension #, which is larger than the available space # in the output array. │ │ + [ d7af] TKFRAM │ │ + [ d7b6] SPICE(INCOMPLETEFRAME) │ │ + [ d7cd] Frame name-based and frame ID-based text kernel (fixed-offset) frame definition keywords '#' and '#' are both present in the POOL. Most likely this is because loaded text kernels contain competing definitions of the '#' frame using different keyword styles, which is not allowed. │ │ + [ d8e6] MATRIX │ │ + [ d8ed] TRCPKG: You have called an entry that performs no run-time function. │ │ + [ d933] trcpkg_ │ │ + [ d93b] left off │ │ + [ d944] ZZBODGET │ │ + [ d94d] SPICE(UNSUPPORTEDMETHOD) │ │ + [ d966] INQUIRE failed. │ │ + [ d976] SPICE(RWCONFLICT) │ │ + [ d988] HANDLE # was not found in the file table but was located in the unit table. This error should never occur. │ │ + [ d9f4] orderv │ │ + [ d9fb] Attempt to remove row # from the unit table failed because valid row indices range from 1 to NUT. │ │ + [ da5d] Size of d.p. component of segment is #; cannot extract descriptor. This is a file format error which may be indicative of a corrupted file. │ │ + [ daea] OBSERVER │ │ + [ daf3] UNITS │ │ + [ daf9] RECTANGULAR │ │ + [ db05] copy │ │ + [ db0a] ZZEKJSRT │ │ + [ db13] rhans │ │ + [ db19] ZZEKILLE │ │ + [ db22] ZZEKLLEI │ │ + [ db2b] SPICE(UNPARSEDQUERY) │ │ + [ db40] DASADD │ │ + [ db47] ZZEKRD08 │ │ + [ db50] ZZEKRD04 │ │ + [ db59] ZZEKMLOC │ │ + [ db62] Key #; valid range = 1:#. Tree = #, file = #. Key was not found. This probably indicates a corrupted file or a bug in the EK code. │ │ + [ dbe7] An attempt to create a temporary string failed. │ │ + [ dc17] Attempt to allocate string of length # failed. │ │ + [ dc46] IAU_EUROPA │ │ + [ dc51] IAU_CALYPSO │ │ + [ dc5d] IAU_KALYKE │ │ + [ dc68] ZZGFTREB │ │ + [ dc71] HASH SIZE │ │ + [ dc7b] NEPTUNE BARYCENTER │ │ + [ dc8e] EURYDOME │ │ + [ dc97] PROMETHEUS │ │ + [ dca2] BERGELMIR │ │ + [ dcac] PERDITA │ │ + [ dcb4] IMAP │ │ + [ dcb9] VSOP │ │ + [ dcbe] MCOB │ │ + [ dcc3] MGS SIMULATION │ │ + [ dcd2] PERSEVERANCE │ │ + [ dcdf] SOIL MOISTURE ACTIVE AND PASSIVE │ │ + [ dd00] MER-2 │ │ + [ dd06] ASHBROOK-JACKSON │ │ + [ dd17] DE VICO-SWIFT │ │ + [ dd25] KOWAL 2 │ │ + [ dd2d] TEMPEL-TUTTLE │ │ + [ dd3b] PARKER-HARTLEY │ │ + [ dd4a] 1992KD │ │ + [ dd51] GOLDSTONE │ │ + [ dd5b] DSS-42 │ │ + [ dd62] The ZZHASH function calculated a negative value for string $1. Contact NAIF. │ │ + [ ddaf] SYSTEM │ │ + [ ddb6] O/S │ │ + [ ddba] zzrvar_ │ │ + [ ddc2] A kernel pool variable name read from a kernel file exceeds the maximum allowed length #1. The actual length of the variable name is #2, the offending variable name to #3 characters: '#4'. │ │ + [ de7f] SPICE(BADTIMESPEC) │ │ + [ de92] [e] │ │ + [ de96] H*M*S │ │ + [ de9c] DAYSEC │ │ + [ dea4] JDTDT │ │ + [ deab] The FROM time representation '#' is not recognized. │ │ + [ dee0] Cosine of the aberration angle is 0; this cannot occur for realistic observer velocities. This case can arise due to uninitialized inputs. This cosine value is used as a divisor in a later computation, so it must not be equal to zero. │ │ + [ dfcb] stops │ │ + [ dfd1] ZZSWFFET │ │ + [ dfda] SPICE(MISSINGFRAMEVAR) │ │ + [ dff1] The requested frame # has # associated base frames. The maximum number that can be supported is #. │ │ + [ e054] SPICE(UNPARSEDTIME) │ │ + [ e068] comma │ │ + [ e06e] DOY │ │ + [ e072] lx4uns_ │ │ + [ e07a] Y*m*D* │ │ + [ e081] YDmH │ │ + [ e086] Ynm │ │ + [ e08a] iYdi:i:i │ │ + [ e093] iiYi:i │ │ + [ e09a] imii │ │ + [ e09f] miY │ │ + [ e0a3] mDYHM │ │ + [ e0a9] Y*y** │ │ + [ e0af] DE │ │ + [ e0b2] jw │ │ + [ e0b5] aeb │ │ + [ e0b9] ase │ │ + [ e0bd] bqi │ │ + [ e0c1] ca │ │ + [ e0c4] ff │ │ + [ e0c7] fi │ │ + [ e0ca] ia │ │ + [ e0cd] jmc │ │ + [ e0d1] kiu │ │ + [ e0d5] lui │ │ + [ e0d9] naq │ │ + [ e0dd] nso │ │ + [ e0e1] pcd │ │ + [ e0e5] sad │ │ + [ e0e9] saz │ │ + [ e0ed] mlt │ │ + [ e0f1] LY │ │ + [ e0f4] MS │ │ + [ e0f7] NP │ │ + [ e0fa] CPV │ │ + [ e0fe] JPN │ │ + [ e102] KEN │ │ + [ e106] MAR │ │ + [ e10a] uprv_ebcdicFromAscii() string[%d] contains a variant character in position %d\n │ │ + [ e159] si_LK │ │ + [ e15f] subdivision │ │ + [ e16b] Asia/Hovd │ │ + [ e175] Brazil/East │ │ + [ e181] AKDT │ │ + [ e186] ar_AE │ │ + [ e18c] en_ZA │ │ + [ e192] bs_Cyrl │ │ + [ e19a] sr_Latn_BA │ │ + [ e1a5] dsb_DE │ │ + [ e1ac] quz_EC │ │ + [ e1b3] i-tsu │ │ + [ e1b9] en-x-i-default │ │ + [ e1c8] sfs │ │ + [ e1cc] LOCALE │ │ + [ e1d3] Latn │ │ + [ e1d8] ucnv_openPackage │ │ + [ e1e9] chinese │ │ + [ e1f1] dangi │ │ + [ e1f7] day-standalone-except-narrow │ │ + [ e214] month-narrow │ │ + [ e221] coptic │ │ + [ e228] M11 │ │ + [ e22c] nfkc │ │ + [ e231] udict_swap(): too few bytes (%d after header) for dictionary data\n │ │ + [ e274] U_MALFORMED_VARIABLE_REFERENCE │ │ + [ e293] U_UNDEFINED_SEGMENT_REFERENCE │ │ + [ e2b1] U_REGEX_RULE_SYNTAX │ │ + [ e2c5] AZN │ │ + [ e2c9] GBP │ │ + [ e2cd] GQE │ │ + [ e2d1] MDL │ │ + [ e2d5] MRU │ │ + [ e2d9] MVP │ │ + [ e2dd] MZN │ │ + [ e2e1] SDD │ │ + [ e2e5] ZWL │ │ + [ e2e9] currencyFormat │ │ + [ e2f8] Conversion syntax │ │ + [ e30a] Clamped │ │ + [ e312] No status │ │ + [ e31c] force │ │ + [ e322] graphics │ │ + [ e32b] arc-second │ │ + [ e336] square-kilometer │ │ + [ e347] pixel-per-centimeter │ │ + [ e35c] astronomical-unit │ │ + [ e36e] ounce-troy │ │ + [ e379] dessert-spoon │ │ + [ e387] instrumental │ │ + [ e394] one │ │ + [ e398] pluralRanges │ │ + [ e3a5] pow2- │ │ + [ e3ab] convertUnits │ │ + [ e3b8] femto │ │ + [ e3be] yocto │ │ + [ e3c4] per │ │ + [ e3c8] Sequence │ │ + [ e3d1] CollationBuilder initialization failed │ │ + [ e3f8] reset primary-before [first trailing] not supported │ │ + [ e42c] range without start in starred-relation string │ │ + [ e45b] string contains an unpaired surrogate │ │ + [ e481] not a valid UnicodeSet pattern │ │ + [ e4a0] unitPreferenceData │ │ + [ e4b3] sho_to_m3 │ │ + [ e4bd] Unable to write to %s file. │ │ + [ e4d9] Using internal %s class from dex bytes. │ │ + [ e501] static void swappy::SwappyGL::resetFramePacing() │ │ + [ e532] void swappy::SwappyCommon::onChoreographer(int64_t) │ │ + [ e566] android/os/Build$VERSION │ │ + [ e57f] SDK_INT │ │ + [ e587] eglCreateSyncKHR │ │ + [ e598] eglDestroySyncKHR │ │ + [ e5ab] Unable to render viewport effect.\n │ │ + [ e5ce] kelvin │ │ + [ e5d5] number is too big │ │ + [ e5e7] ProjectionMode │ │ + [ e5f6] SAOCrossIndex │ │ + [ e604] ReverseMouseWheel │ │ + [ e616] AntialiasingSamples │ │ + [ e62a] IgnoreGLExtensions │ │ + [ e63d] WO │ │ + [ e641] angle │ │ + [ e649] Edit Mode │ │ + [ e653] LockTo │ │ + [ e65a] Star system barycenter\n │ │ + [ e672] days │ │ + [ e677] Playback Device │ │ + [ e687] Invalid argument │ │ + [ e698] Connection reset │ │ + [ e6a9] AAudioStreamBuilder_setContentType │ │ + [ e6cc] LIST │ │ + [ e6d1] &tsrc= │ │ + [ e6d8] May │ │ + [ e6dc] June │ │ + [ e6e1] lightgrey │ │ + [ e6eb] olivedrab │ │ + [ e6f5] skyblue │ │ + [ e700] globulars │ │ + [ e70a] grid │ │ + [ e70f] mare │ │ + [ e714] loop │ │ + [ e719] haschild │ │ + [ e722] Argument of category:createchild must be a string! │ │ + [ e755] flash │ │ + [ e75b] getscreendimension │ │ + [ e76e] tdbtoutc │ │ + [ e777] One argument expected for celestia:getlinecolor() │ │ + [ e7a9] One argument expected for celestia:setminfeaturesize() │ │ + [ e7e0] Argument to celestia:setminorbitsize() must be a number │ │ + [ e818] enhanced │ │ + [ e821] newrotation: first argument must be a vector │ │ + [ e84e] Need 0 to 2 arguments for celestia:takescreenshot │ │ + [ e880] Two arguments required for celestia:registereventhandler │ │ + [ e8b9] Second argument to celestia:playaudio must be a string │ │ + [ e8f0] One argument required for celestia:settimeslice() │ │ + [ e922] In line {}: {} │ │ + [ e931] Internal Error: Invalid table entry for LuaState-pointer │ │ + [ e96a] class_frame │ │ + [ e976] class_font │ │ + [ e981] class_category │ │ + [ e990] Internal Error: Invalid value in checkTimeslice │ │ + [ e9c0] from │ │ + [ e9c5] getrefobject │ │ + [ e9d2] Enable │ │ + [ e9d9] argument 1 to gl.Color must be a number │ │ + [ ea01] getwidth │ │ + [ ea0a] getheight │ │ + [ ea14] [Celscript] │ │ + [ ea20] No arguments expected for font:getmaxdescent() │ │ + [ ea4f] No arguments expected to function object:radius │ │ + [ ea7f] unknown │ │ + [ ea87] rotationPeriod │ │ + [ ea96] geomAlbedo │ │ + [ eaa1] oblateness │ │ + [ eaac] Second argument to object:mark must be a string │ │ + [ eadc] lowercolor │ │ + [ eae7] [Observer] │ │ + [ eaf2] One to five arguments expected to observer:gotolonglat │ │ + [ eb29] First argument to observer:synchronous must be an object │ │ + [ eb62] slerp │ │ + [ eb68] add │ │ + [ eb6c] jpl-pluto-sun │ │ + [ eb7a] oberon │ │ + [ eb81] jpl-saturn-ssb │ │ + [ eb90] Ephemeris record size: {} doubles, with {} endianess.\n │ │ + [ ebc7] Error finding data in ASCII sample file {}.\n │ │ + [ ebf4] Error parsing asterism file: expected string\n │ │ + [ ec22] Cir │ │ + [ ec26] CrB │ │ + [ ec2a] Tri │ │ + [ ec2e] Vol │ │ + [ ec32] Sb │ │ + [ ec35] v │ │ + [ ec37] Unknown object passed to GetInfoLog()!\n │ │ + [ ec5f] AR │ │ + [ ec62] Period │ │ + [ ec69] RGBA{}{}{}{} │ │ + [ ec76] ringRadius │ │ + [ ec81] overlayTexCoord = │ │ + [ ec94] eyePosition │ │ + [ eca0] vec3 N = normalize(normal);\n │ │ + [ ecbd] vec3 eyeDir = normalize(eyePosition - nposition);\n │ │ + [ ecf0] intensity │ │ + [ ecfa] shadow = 1.0;\n │ │ + [ ed09] ;\n │ │ + [ ed0d] scatterCoeffSum │ │ + [ ed1e] attribute vec4 in_Position;\n\n │ │ void main(void)\n │ │ {\n │ │ gl_Position = MVPMatrix * in_Position;\n │ │ }\n │ │ - [ ed4f] uniform {} {};\n │ │ - [ ed5f] xyzw │ │ - [ ed64] pointFade = min(1.0, ptSize * ptSize);\n │ │ - [ ed8c] shadow *= 1.0 - texture2DLod(ringTex, vec2(ringShadowTexCoordX, 0.0), │ │ - [ edd3] OrbitColor │ │ - [ edde] CloudMap │ │ - [ ede7] Modify requested for nonexistent star.\n │ │ - [ ee0f] ignoring orbit for object without OrbitBarycenter │ │ - [ ee41] Warning in .stc file ({}): {}\n │ │ - [ ee60] screenRatio │ │ - [ ee6c] DDS texture file {} has bad header.\n │ │ - [ ee91] {}: unrecognized or unsupported image file type.\n │ │ - [ eec3] java/util/ArrayList │ │ - [ eed7] java/util/HashMap │ │ - [ eee9] %i.%i │ │ - [ eeef] llu │ │ - [ eef3] llX │ │ - [ eef7] LC_NUMERIC │ │ - [ ef02] plural= │ │ - [ ef0b] msgstr ""\n │ │ - [ ef16] Unsupported JPEG data precision %d │ │ - [ ef39] Invalid restart interval %d; must be an integer multiple of the number of MCUs in an MCU row (%d) │ │ - [ ef9b] JSIMD_NOHUFFENC │ │ - [ efab] StdVW │ │ - [ efb1] dup │ │ - [ efb5] UIDBase │ │ - [ efbd] DESTINATION │ │ - [ efc9] RAW_POINTSIZE │ │ - [ efd7] SUBSCRIPT_Y │ │ - [ efe3] UNDERLINE_THICKNESS │ │ - [ effb] � � │ │ - [ f009] � │ │ - [ f00e] Ascender │ │ - [ f017] StartComposites │ │ - [ f027] W0X │ │ - [ f02b] "] │ │ - [ f02e] [string] │ │ - [ f037] table.new │ │ - [ f041] cannot close standard file │ │ - [ f05c] . │ │ - [ f05e] =(debug command) │ │ - [ f070] libpng version 1.6.44\n │ │ + [ ed7c] uniform {} {};\n │ │ + [ ed8c] xyzw │ │ + [ ed91] pointFade = min(1.0, ptSize * ptSize);\n │ │ + [ edb9] shadow *= 1.0 - texture2DLod(ringTex, vec2(ringShadowTexCoordX, 0.0), │ │ + [ ee00] OrbitColor │ │ + [ ee0b] CloudMap │ │ + [ ee14] Modify requested for nonexistent star.\n │ │ + [ ee3c] ignoring orbit for object without OrbitBarycenter │ │ + [ ee6e] Warning in .stc file ({}): {}\n │ │ + [ ee8d] screenRatio │ │ + [ ee99] DDS texture file {} has bad header.\n │ │ + [ eebe] {}: unrecognized or unsupported image file type.\n │ │ + [ eef0] java/util/ArrayList │ │ + [ ef04] java/util/HashMap │ │ + [ ef16] %i.%i │ │ + [ ef1c] llu │ │ + [ ef20] llX │ │ + [ ef24] LC_NUMERIC │ │ + [ ef2f] plural= │ │ + [ ef38] msgstr ""\n │ │ + [ ef43] Unsupported JPEG data precision %d │ │ + [ ef66] Invalid restart interval %d; must be an integer multiple of the number of MCUs in an MCU row (%d) │ │ + [ efc8] JSIMD_NOHUFFENC │ │ + [ efd8] StdVW │ │ + [ efde] dup │ │ + [ efe2] UIDBase │ │ + [ efea] DESTINATION │ │ + [ eff6] RAW_POINTSIZE │ │ + [ f004] SUBSCRIPT_Y │ │ + [ f010] UNDERLINE_THICKNESS │ │ + [ f028] � � │ │ + [ f036] � │ │ + [ f03b] Ascender │ │ + [ f044] StartComposites │ │ + [ f054] W0X │ │ + [ f058] "] │ │ + [ f05b] [string] │ │ + [ f064] table.new │ │ + [ f06e] cannot close standard file │ │ + [ f089] . │ │ + [ f08b] =(debug command) │ │ + [ f09d] libpng version 1.6.44\n │ │ Copyright (c) 2018-2024 Cosmin Truta\n │ │ Copyright (c) 1998-2002,2004,2006-2018 Glenn Randers-Pehrson\n │ │ Copyright (c) 1996-1997 Andreas Dilger\n │ │ Copyright (c) 1995-1996 Guy Eric Schalnat, Group 42, Inc.\n │ │ - [ f14a] gamma value out of range │ │ - [ f163] invalid chromaticities │ │ - [ f17a] background color must be supplied to remove alpha/transparency │ │ - [ f1b9] Saving unknown chunk: │ │ - [ f1cf] cHRM Blue Y │ │ - [ f1db] png_set_gAMA │ │ - [ f1e8] Invalid palette size, hIST allocation skipped │ │ - [ f216] Insufficient memory for pCAL parameter │ │ - [ f23d] keyword "@1": bad character '0x@2' │ │ - [ f260] Only compression method 8 is supported by PNG │ │ - [ f28e] Ignoring attempt to write 16-bit tRNS chunk when bit_depth is 8 │ │ - [ f2ce] chkout_c │ │ - [ f2d7] errint_c │ │ - [ f2e0] SPICE(FILEALREADYOPEN) │ │ - [ f2f7] SPICE(FILEREADFAILED) │ │ - [ f30d] An Invalid Option Value Was Supplied │ │ - [ f332] kind │ │ - [ f337] itprvh │ │ - [ f33e] SPICE(DAFINVALIDPARAMS) │ │ - [ f356] sequential io not allowed │ │ - [ f370] external │ │ - [ f379] #1 │ │ - [ f37c] > │ │ - [ f37e] SPICE(EKNOSEGMENTS) │ │ - [ f392] DONE │ │ - [ f397] EKGI │ │ - [ f39c] The file table is full, with # entries. Could not open a scratch file. If a call to DASOPS was not made and this error occurred, it is likely that the DAS file table was full and an attempt to close a file opened with write access was made. See the DAS required reading and DASFM for details. │ │ - [ f4c1] lastla │ │ - [ f4c8] endfile │ │ - [ f4d0] The cell cannot accommodate the addition of the item *. │ │ - [ f508] DASA2L │ │ - [ f50f] rnbufi │ │ - [ f516] ' │ │ - [ f518] pxform_c │ │ - [ f521] CLASS_ID │ │ - [ f52a] The reference frame # has class #. This form of reference frame is not supported in version # of ROTGET. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ - [ f5f6] SPICE(WRONGDATATYPE) │ │ - [ f60b] pbuffr │ │ - [ f612] rotmat_ │ │ - [ f61a] SCFM01 │ │ - [ f621] SCTE01 │ │ - [ f628] FAILURE │ │ - [ f630] outmsg_ │ │ - [ f638] TOOLKIT │ │ - [ f640] Unexpected SPK type 19 subtype found in type 19 record. │ │ - [ f678] SPICE(BADLATUSRECTUM) │ │ - [ f68e] savegm │ │ - [ f695] SPICE(ECCOUTOFBOUNDS) │ │ - [ f6ab] spke08_ │ │ - [ f6b3] Request time # is outside of descriptor bounds # : #. │ │ - [ f6e9] SPICE(TIMEOUTOFBOUNDS) │ │ - [ f700] SPKR09 │ │ - [ f707] Packet count # is less than the minimum valid value, which is 2. │ │ - [ f748] Window size in type 18 segment was #; max allowed value is # for subtype 0 (Hermite, 12-element packets). │ │ - [ f7b2] Window size in type 18 segment was #; max allowed value is # for subtype 1 (Lagrange, 6-element packets). │ │ - [ f81c] BODY#_PM │ │ - [ f825] bnphco │ │ - [ f82c] The data associated with variable # are not of numeric type. │ │ - [ f869] #: The kernel pool variable '#' must be of type "NUMERIC". However, the current type is character. │ │ - [ f8ce] %+.2d │ │ - [ f8d4] dididx │ │ - [ f8db] Logical unit associated with # file $, is trying to be unlocked by routines in in the % system. │ │ - [ f93b] At least one of the kernel variables FRAME_#_# or FRAME_#_# was expected to be present in the kernel pool but neither was found. One of these variables is needed to define the reference frame #. Usually this type of problem is due to a missing keyword assignment in a frame kernel. Another, less likely, possibility is that other errors in a frame kernel have confused the frame subsystem into wrongly deciding these variables are needed. │ │ - [ faf4] In definition of frame #, the frame associated with a constant vector has frame ID code #, but no frame center, frame class, or frame class ID was found by FRINFO. This situation MAY be caused by an error in a frame kernel in which the frame is defined. The problem also could be indicative of a SPICELIB bug. │ │ - [ fc2b] QDERIV │ │ - [ fc32] SPICE(UNDEFINEDFRAME) │ │ - [ fc48] seqnce │ │ - [ fc4f] ZZDYNVAD │ │ - [ fc58] Column # should be DP or TIME but has type #. │ │ - [ fc86] ZZEKRSC │ │ - [ fc8e] PRTDEC │ │ - [ fc95] ZZEKRD02 │ │ - [ fc9e] Attempted to read uninitialized column entry. SEGNO = #; COLIDX = #; RECNO = #; EK = # │ │ - [ fcf6] ZZEKTRLK │ │ - [ fcff] Table count for first join row set was #; valid range is 1:# │ │ - [ fd3c] IAU_SINOPE │ │ - [ fd47] IAU_RHEA │ │ - [ fd50] ITRF93 │ │ - [ fd57] IAU_PATROCLUS_BARYCENTER │ │ - [ fd70] MERCURY │ │ - [ fd78] JUPITER │ │ - [ fd80] IO │ │ - [ fd83] ISONOE │ │ - [ fd8a] PRAXIDIKE │ │ - [ fd94] KALE │ │ - [ fd99] KALLICHORE │ │ - [ fda4] SATURN │ │ - [ fdab] RHEA │ │ - [ fdb0] ARIEL │ │ - [ fdb6] SETEBOS │ │ - [ fdbe] KERBEROS │ │ - [ fdc7] VENUS ORBITER │ │ - [ fdd5] JNSB │ │ - [ fdda] MSL │ │ - [ fdde] CASSINI ITL │ │ - [ fdea] DFLY │ │ - [ fdef] KOREAN PATHFINDER LUNAR ORBITER │ │ - [ fe0f] SMART1 │ │ - [ fe16] VEX │ │ - [ fe1a] BEPICOLOMBO MTM │ │ - [ fe2a] JOHNSON │ │ - [ fe32] RUSSELL 1 │ │ - [ fe3c] RUSSELL 4 │ │ - [ fe46] VESTA │ │ - [ fe4c] EURYBATES_BARYCENTER │ │ - [ fe61] ZZNAMFRM │ │ - [ fe6a] attcpy │ │ - [ fe71] YD │ │ - [ fe74] e │ │ - [ fe76] P.M. │ │ - [ fe7b] i:i:i:i │ │ - [ fe83] The day of the month specified for the month of # was #. For # the day must be at least 1.0D0 and less than #. │ │ - [ fef4] ZZRVBF │ │ - [ fefb] SCLU01 │ │ - [ ff02] Mean eccentricity value, #, beyond allowed bounds [-0.001,1.0). This error may indicate a bad TLE set. │ │ - [ ff69] SPICE(BADMSEMIMAJOR) │ │ - [ ff7e] ttrans_ │ │ - [ ff86] RMAIND │ │ - [ ff8d] GREGORIAN │ │ - [ ff97] Day of Year │ │ - [ ffa3] APRIL │ │ - [ ffa9] PST │ │ - [ ffad] mnmrk │ │ - [ ffb3] Y-i-iti:i:n │ │ - [ ffbf] Y-i-iti:n │ │ - [ ffc9] Ymn │ │ - [ ffcd] i/i/Y │ │ - [ ffd3] Y-iti │ │ - [ ffd9] Y-i-iti:nx │ │ - [ ffe4] i-i-iti:nx │ │ - [ ffef] bem │ │ - [ fff3] din │ │ - [ fff7] dum │ │ - [ fffb] ksb │ │ - [ ffff] lmo │ │ - [ 10003] lo │ │ - [ 10006] mad │ │ - [ 1000a] nd │ │ - [ 1000d] so │ │ - [ 10010] twq │ │ - [ 10014] wa │ │ - [ 10017] wo │ │ - [ 1001a] arg │ │ - [ 1001e] div │ │ - [ 10022] ewe │ │ - [ 10026] glv │ │ - [ 1002a] srd │ │ - [ 1002e] smo │ │ - [ 10032] swa │ │ - [ 10036] AZ │ │ - [ 10039] BD │ │ - [ 1003c] BV │ │ - [ 1003f] FJ │ │ - [ 10042] PH │ │ - [ 10045] AND │ │ - [ 10049] GEO │ │ - [ 1004d] NZL │ │ - [ 10051] REU │ │ - [ 10055] bg_BG │ │ - [ 1005b] ms_MY │ │ - [ 10061] sk_SK │ │ - [ 10067] sw_TZ │ │ - [ 1006d] ta_IN │ │ - [ 10073] territory │ │ - [ 1007d] replacement │ │ - [ 10089] EST5EDT │ │ - [ 10091] VLAST │ │ - [ 10097] America/St_Johns │ │ - [ 100a8] und-u- │ │ - [ 100af] langInfo │ │ - [ 100b8] ar_LY │ │ - [ 100be] bin_NG │ │ - [ 100c5] sr_Cyrl │ │ - [ 100cd] kr_NG │ │ - [ 100d3] REORDER_CODE │ │ - [ 100e0] RG_KEY_VALUE │ │ - [ 100ed] ami │ │ - [ 100f1] tay │ │ - [ 100f5] tsu │ │ - [ 100f9] bfi │ │ - [ 100fd] sgn-nl │ │ - [ 10104] cmn-hant │ │ - [ 1010d] ucnv_flushCache │ │ - [ 1011d] buddhist │ │ - [ 10126] unorm2_swap(): data format %02x.%02x.%02x.%02x (format version %02x) is not recognized as Normalizer2 data\n │ │ - [ 10192] lowercase letter │ │ - [ 101a3] math symbol │ │ - [ 101af] U_INVALID_CHAR_FOUND │ │ - [ 101c4] U_UNDEFINED_VARIABLE │ │ - [ 101d9] U_INVALID_FUNCTION │ │ - [ 101ec] ARP │ │ - [ 101f0] BRE │ │ - [ 101f4] COP │ │ - [ 101f8] CZK │ │ - [ 101fc] GIP │ │ - [ 10200] GNF │ │ - [ 10204] ILP │ │ - [ 10208] LTL │ │ - [ 1020c] MAD │ │ - [ 10210] MCF │ │ - [ 10214] MUR │ │ - [ 10218] 9.223372036854775808E+18 │ │ - [ 10231] Subnormal │ │ - [ 1023b] permillion │ │ - [ 10246] byte │ │ - [ 1024b] newton │ │ - [ 10252] cubic-meter │ │ - [ 1025e] common │ │ - [ 10265] /replacement │ │ - [ 10272] secondary │ │ - [ 1027c] starred-relation string range contains U+FFFD, U+FFFE or U+FFFF │ │ - [ 102bc] [import langTag] is not supported │ │ - [ 102de] last primary ignorable │ │ - [ 102f5] first variable │ │ - [ 10304] mu │ │ - [ 10307] ft2_to_m2 │ │ - [ 10311] AChoreographer_registerRefreshRateCallback │ │ - [ 1033c] dalvik/system/PathClassLoader │ │ - [ 1035a] getCacheDir │ │ - [ 10366] bool swappy::SwappyGL::setPresentationTime(swappy::EGLDisplay, swappy::EGLSurface) │ │ - [ 103b9] getRefreshRate │ │ - [ 103c8] mPipelineMode │ │ - [ 103d6] MANUFACTURER │ │ - [ 103e3] Invalid filetype │ │ - [ 103f4] Light gain: {:3.0f} % │ │ - [ 1040a] planetographic grid │ │ - [ 1041e] Error opening asterisms file {}.\n │ │ - [ 10440] SolarSystemCatalogs │ │ - [ 10454] M │ │ - [ 10456] S │ │ - [ 10458] Number of interpolators: %s\n │ │ - [ 10475] c │ │ - [ 10477] Black hole │ │ - [ 10482] m │ │ - [ 10484] {} {} │ │ - [ 1048a] Capture │ │ - [ 10492] CHANNEL_FRONT_LEFT │ │ - [ 104a5] Resource already exists │ │ - [ 104bd] Too many open files │ │ - [ 104d1] AAudioStream_close │ │ - [ 104e4] AAudioStream_requestStart │ │ - [ 104fe] [OpenSL] Failed to start internal capture device. │ │ - [ 10530] cue │ │ - [ 10535] Unsupported URL version: {}\n │ │ - [ 10552] Mar │ │ - [ 10556] darkmagenta │ │ - [ 10562] darkviolet │ │ - [ 1056d] fuchsia │ │ - [ 10575] greenyellow │ │ - [ 10581] ZET │ │ - [ 10589] automag │ │ - [ 10591] tessera │ │ - [ 10599] volcano │ │ - [ 105a1] fluctus │ │ - [ 105a9] albedo │ │ - [ 105b0] saxum │ │ - [ 105b6] overlay │ │ - [ 105be] setambientlight │ │ - [ 105ce] jpg │ │ - [ 105d2] find │ │ - [ 105d7] gettitlefont │ │ - [ 105e4] One argument expected to function celestia:gettextwidth │ │ - [ 1061c] No arguments expected for celestia:getlabelflags() │ │ - [ 1064f] One argument expected to function celestia:settime │ │ - [ 10682] No argument expected in celestia:getstardistancelimit │ │ - [ 106b8] Second argument for celestia:setaudionopause must be a boolean │ │ - [ 106f7] argument 2 to gl.TexCoord must be a number │ │ - [ 10722] One argument expected for gl.MatrixMode() │ │ - [ 1074c] One argument required for font:render │ │ - [ 10772] No arguments expected for image:getwidth() │ │ - [ 1079d] orbitvisibility │ │ - [ 107ad] null │ │ - [ 107b2] No arguments are expected for object:getdensity() │ │ - [ 107e4] rayleigh │ │ - [ 107ed] sunsetcolor │ │ - [ 107f9] travelling │ │ - [ 10804] __eq │ │ - [ 10809] No arguments expected for observer:isvalid() │ │ - [ 10836] Argument 1 and 2 (of 3) to observer:lookat must be of type position │ │ - [ 1087a] One argument expected to observer:setsurface() │ │ - [ 108a9] One argument expected for observer:setlocationflags() │ │ - [ 108df] getx │ │ - [ 108e4] No arguments expected for position:getz() │ │ - [ 1090e] real │ │ - [ 10913] pointsize │ │ - [ 1091d] has tangents: {}\n │ │ - [ 1092f] normalmap "{}"\n │ │ - [ 1093f] color0 │ │ - [ 10947] f1\n │ │ - [ 1094b] end_vertexdesc\n │ │ - [ 1095b] jpl-neptune-ssb │ │ - [ 1096b] jpl-venus-ssb │ │ - [ 10979] saturn │ │ - [ 10980] pluto-sun │ │ - [ 1098a] dione │ │ - [ 10990] ariel │ │ - [ 10996] iau-mercury │ │ - [ 109a2] eclipj2000 │ │ - [ 109ad] Men │ │ - [ 109b1] Mus │ │ - [ 109b5] Exceeded maximum DSO count.\n │ │ - [ 109d2] LO │ │ - [ 109d5] CM │ │ - [ 109d8] Historical │ │ - [ 109e3] CustomRotation │ │ - [ 109f2] EquatorJ2000 │ │ - [ 109ff] +x │ │ - [ 10a02] + vec2(textureOffset, 0.0);\n │ │ - [ 10a20] , n);\n │ │ - [ 10a27] , n)) * clamp( │ │ - [ 10a36] vec4 color = v_Color;\n │ │ - [ 10a51] overlayTex │ │ - [ 10a5c] in_TexCoord2 │ │ - [ 10a69] Deprecated parameter Albedo used in {} definition.\n │ │ + [ f177] gamma value out of range │ │ + [ f190] invalid chromaticities │ │ + [ f1a7] background color must be supplied to remove alpha/transparency │ │ + [ f1e6] Saving unknown chunk: │ │ + [ f1fc] cHRM Blue Y │ │ + [ f208] png_set_gAMA │ │ + [ f215] Invalid palette size, hIST allocation skipped │ │ + [ f243] Insufficient memory for pCAL parameter │ │ + [ f26a] keyword "@1": bad character '0x@2' │ │ + [ f28d] Only compression method 8 is supported by PNG │ │ + [ f2bb] Ignoring attempt to write 16-bit tRNS chunk when bit_depth is 8 │ │ + [ f2fb] chkout_c │ │ + [ f304] errint_c │ │ + [ f30d] SPICE(FILEALREADYOPEN) │ │ + [ f324] SPICE(FILEREADFAILED) │ │ + [ f33a] An Invalid Option Value Was Supplied │ │ + [ f35f] kind │ │ + [ f364] itprvh │ │ + [ f36b] SPICE(DAFINVALIDPARAMS) │ │ + [ f383] sequential io not allowed │ │ + [ f39d] external │ │ + [ f3a6] #1 │ │ + [ f3a9] > │ │ + [ f3ab] SPICE(EKNOSEGMENTS) │ │ + [ f3bf] DONE │ │ + [ f3c4] EKGI │ │ + [ f3c9] The file table is full, with # entries. Could not open a scratch file. If a call to DASOPS was not made and this error occurred, it is likely that the DAS file table was full and an attempt to close a file opened with write access was made. See the DAS required reading and DASFM for details. │ │ + [ f4ee] lastla │ │ + [ f4f5] endfile │ │ + [ f4fd] The cell cannot accommodate the addition of the item *. │ │ + [ f535] DASA2L │ │ + [ f53c] rnbufi │ │ + [ f543] ' │ │ + [ f545] pxform_c │ │ + [ f54e] CLASS_ID │ │ + [ f557] The reference frame # has class #. This form of reference frame is not supported in version # of ROTGET. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ + [ f623] SPICE(WRONGDATATYPE) │ │ + [ f638] pbuffr │ │ + [ f63f] rotmat_ │ │ + [ f647] SCFM01 │ │ + [ f64e] SCTE01 │ │ + [ f655] FAILURE │ │ + [ f65d] outmsg_ │ │ + [ f665] TOOLKIT │ │ + [ f66d] Unexpected SPK type 19 subtype found in type 19 record. │ │ + [ f6a5] SPICE(BADLATUSRECTUM) │ │ + [ f6bb] savegm │ │ + [ f6c2] SPICE(ECCOUTOFBOUNDS) │ │ + [ f6d8] spke08_ │ │ + [ f6e0] Request time # is outside of descriptor bounds # : #. │ │ + [ f716] SPICE(TIMEOUTOFBOUNDS) │ │ + [ f72d] SPKR09 │ │ + [ f734] Packet count # is less than the minimum valid value, which is 2. │ │ + [ f775] Window size in type 18 segment was #; max allowed value is # for subtype 0 (Hermite, 12-element packets). │ │ + [ f7df] Window size in type 18 segment was #; max allowed value is # for subtype 1 (Lagrange, 6-element packets). │ │ + [ f849] BODY#_PM │ │ + [ f852] bnphco │ │ + [ f859] The data associated with variable # are not of numeric type. │ │ + [ f896] #: The kernel pool variable '#' must be of type "NUMERIC". However, the current type is character. │ │ + [ f8fb] %+.2d │ │ + [ f901] dididx │ │ + [ f908] Logical unit associated with # file $, is trying to be unlocked by routines in in the % system. │ │ + [ f968] At least one of the kernel variables FRAME_#_# or FRAME_#_# was expected to be present in the kernel pool but neither was found. One of these variables is needed to define the reference frame #. Usually this type of problem is due to a missing keyword assignment in a frame kernel. Another, less likely, possibility is that other errors in a frame kernel have confused the frame subsystem into wrongly deciding these variables are needed. │ │ + [ fb21] In definition of frame #, the frame associated with a constant vector has frame ID code #, but no frame center, frame class, or frame class ID was found by FRINFO. This situation MAY be caused by an error in a frame kernel in which the frame is defined. The problem also could be indicative of a SPICELIB bug. │ │ + [ fc58] QDERIV │ │ + [ fc5f] SPICE(UNDEFINEDFRAME) │ │ + [ fc75] seqnce │ │ + [ fc7c] ZZDYNVAD │ │ + [ fc85] Column # should be DP or TIME but has type #. │ │ + [ fcb3] ZZEKRSC │ │ + [ fcbb] PRTDEC │ │ + [ fcc2] ZZEKRD02 │ │ + [ fccb] Attempted to read uninitialized column entry. SEGNO = #; COLIDX = #; RECNO = #; EK = # │ │ + [ fd23] ZZEKTRLK │ │ + [ fd2c] Table count for first join row set was #; valid range is 1:# │ │ + [ fd69] IAU_SINOPE │ │ + [ fd74] IAU_RHEA │ │ + [ fd7d] ITRF93 │ │ + [ fd84] IAU_PATROCLUS_BARYCENTER │ │ + [ fd9d] MERCURY │ │ + [ fda5] JUPITER │ │ + [ fdad] IO │ │ + [ fdb0] ISONOE │ │ + [ fdb7] PRAXIDIKE │ │ + [ fdc1] KALE │ │ + [ fdc6] KALLICHORE │ │ + [ fdd1] SATURN │ │ + [ fdd8] RHEA │ │ + [ fddd] ARIEL │ │ + [ fde3] SETEBOS │ │ + [ fdeb] KERBEROS │ │ + [ fdf4] VENUS ORBITER │ │ + [ fe02] JNSB │ │ + [ fe07] MSL │ │ + [ fe0b] CASSINI ITL │ │ + [ fe17] DFLY │ │ + [ fe1c] KOREAN PATHFINDER LUNAR ORBITER │ │ + [ fe3c] SMART1 │ │ + [ fe43] VEX │ │ + [ fe47] BEPICOLOMBO MTM │ │ + [ fe57] JOHNSON │ │ + [ fe5f] RUSSELL 1 │ │ + [ fe69] RUSSELL 4 │ │ + [ fe73] VESTA │ │ + [ fe79] EURYBATES_BARYCENTER │ │ + [ fe8e] ZZNAMFRM │ │ + [ fe97] attcpy │ │ + [ fe9e] YD │ │ + [ fea1] e │ │ + [ fea3] P.M. │ │ + [ fea8] i:i:i:i │ │ + [ feb0] The day of the month specified for the month of # was #. For # the day must be at least 1.0D0 and less than #. │ │ + [ ff21] ZZRVBF │ │ + [ ff28] SCLU01 │ │ + [ ff2f] Mean eccentricity value, #, beyond allowed bounds [-0.001,1.0). This error may indicate a bad TLE set. │ │ + [ ff96] SPICE(BADMSEMIMAJOR) │ │ + [ ffab] ttrans_ │ │ + [ ffb3] RMAIND │ │ + [ ffba] GREGORIAN │ │ + [ ffc4] Day of Year │ │ + [ ffd0] APRIL │ │ + [ ffd6] PST │ │ + [ ffda] mnmrk │ │ + [ ffe0] Y-i-iti:i:n │ │ + [ ffec] Y-i-iti:n │ │ + [ fff6] Ymn │ │ + [ fffa] i/i/Y │ │ + [ 10000] Y-iti │ │ + [ 10006] Y-i-iti:nx │ │ + [ 10011] i-i-iti:nx │ │ + [ 1001c] bem │ │ + [ 10020] din │ │ + [ 10024] dum │ │ + [ 10028] ksb │ │ + [ 1002c] lmo │ │ + [ 10030] lo │ │ + [ 10033] mad │ │ + [ 10037] nd │ │ + [ 1003a] so │ │ + [ 1003d] twq │ │ + [ 10041] wa │ │ + [ 10044] wo │ │ + [ 10047] arg │ │ + [ 1004b] div │ │ + [ 1004f] ewe │ │ + [ 10053] glv │ │ + [ 10057] srd │ │ + [ 1005b] smo │ │ + [ 1005f] swa │ │ + [ 10063] AZ │ │ + [ 10066] BD │ │ + [ 10069] BV │ │ + [ 1006c] FJ │ │ + [ 1006f] PH │ │ + [ 10072] AND │ │ + [ 10076] GEO │ │ + [ 1007a] NZL │ │ + [ 1007e] REU │ │ + [ 10082] bg_BG │ │ + [ 10088] ms_MY │ │ + [ 1008e] sk_SK │ │ + [ 10094] sw_TZ │ │ + [ 1009a] ta_IN │ │ + [ 100a0] territory │ │ + [ 100aa] replacement │ │ + [ 100b6] EST5EDT │ │ + [ 100be] VLAST │ │ + [ 100c4] America/St_Johns │ │ + [ 100d5] und-u- │ │ + [ 100dc] langInfo │ │ + [ 100e5] ar_LY │ │ + [ 100eb] bin_NG │ │ + [ 100f2] sr_Cyrl │ │ + [ 100fa] kr_NG │ │ + [ 10100] REORDER_CODE │ │ + [ 1010d] RG_KEY_VALUE │ │ + [ 1011a] ami │ │ + [ 1011e] tay │ │ + [ 10122] tsu │ │ + [ 10126] bfi │ │ + [ 1012a] sgn-nl │ │ + [ 10131] cmn-hant │ │ + [ 1013a] ucnv_flushCache │ │ + [ 1014a] buddhist │ │ + [ 10153] unorm2_swap(): data format %02x.%02x.%02x.%02x (format version %02x) is not recognized as Normalizer2 data\n │ │ + [ 101bf] lowercase letter │ │ + [ 101d0] math symbol │ │ + [ 101dc] U_INVALID_CHAR_FOUND │ │ + [ 101f1] U_UNDEFINED_VARIABLE │ │ + [ 10206] U_INVALID_FUNCTION │ │ + [ 10219] ARP │ │ + [ 1021d] BRE │ │ + [ 10221] COP │ │ + [ 10225] CZK │ │ + [ 10229] GIP │ │ + [ 1022d] GNF │ │ + [ 10231] ILP │ │ + [ 10235] LTL │ │ + [ 10239] MAD │ │ + [ 1023d] MCF │ │ + [ 10241] MUR │ │ + [ 10245] 9.223372036854775808E+18 │ │ + [ 1025e] Subnormal │ │ + [ 10268] permillion │ │ + [ 10273] byte │ │ + [ 10278] newton │ │ + [ 1027f] cubic-meter │ │ + [ 1028b] common │ │ + [ 10292] /replacement │ │ + [ 1029f] secondary │ │ + [ 102a9] starred-relation string range contains U+FFFD, U+FFFE or U+FFFF │ │ + [ 102e9] [import langTag] is not supported │ │ + [ 1030b] last primary ignorable │ │ + [ 10322] first variable │ │ + [ 10331] mu │ │ + [ 10334] ft2_to_m2 │ │ + [ 1033e] AChoreographer_registerRefreshRateCallback │ │ + [ 10369] dalvik/system/PathClassLoader │ │ + [ 10387] getCacheDir │ │ + [ 10393] bool swappy::SwappyGL::setPresentationTime(swappy::EGLDisplay, swappy::EGLSurface) │ │ + [ 103e6] getRefreshRate │ │ + [ 103f5] mPipelineMode │ │ + [ 10403] MANUFACTURER │ │ + [ 10410] Invalid filetype │ │ + [ 10421] Light gain: {:3.0f} % │ │ + [ 10437] planetographic grid │ │ + [ 1044b] Error opening asterisms file {}.\n │ │ + [ 1046d] SolarSystemCatalogs │ │ + [ 10481] M │ │ + [ 10483] S │ │ + [ 10485] Number of interpolators: %s\n │ │ + [ 104a2] c │ │ + [ 104a4] Black hole │ │ + [ 104af] m │ │ + [ 104b1] {} {} │ │ + [ 104b7] Capture │ │ + [ 104bf] CHANNEL_FRONT_LEFT │ │ + [ 104d2] Resource already exists │ │ + [ 104ea] Too many open files │ │ + [ 104fe] AAudioStream_close │ │ + [ 10511] AAudioStream_requestStart │ │ + [ 1052b] [OpenSL] Failed to start internal capture device. │ │ + [ 1055d] cue │ │ + [ 10562] Unsupported URL version: {}\n │ │ + [ 1057f] Mar │ │ + [ 10583] darkmagenta │ │ + [ 1058f] darkviolet │ │ + [ 1059a] fuchsia │ │ + [ 105a2] greenyellow │ │ + [ 105ae] ZET │ │ + [ 105b6] automag │ │ + [ 105be] tessera │ │ + [ 105c6] volcano │ │ + [ 105ce] fluctus │ │ + [ 105d6] albedo │ │ + [ 105dd] saxum │ │ + [ 105e3] overlay │ │ + [ 105eb] setambientlight │ │ + [ 105fb] jpg │ │ + [ 105ff] find │ │ + [ 10604] gettitlefont │ │ + [ 10611] One argument expected to function celestia:gettextwidth │ │ + [ 10649] No arguments expected for celestia:getlabelflags() │ │ + [ 1067c] One argument expected to function celestia:settime │ │ + [ 106af] No argument expected in celestia:getstardistancelimit │ │ + [ 106e5] Second argument for celestia:setaudionopause must be a boolean │ │ + [ 10724] argument 2 to gl.TexCoord must be a number │ │ + [ 1074f] One argument expected for gl.MatrixMode() │ │ + [ 10779] One argument required for font:render │ │ + [ 1079f] No arguments expected for image:getwidth() │ │ + [ 107ca] orbitvisibility │ │ + [ 107da] null │ │ + [ 107df] No arguments are expected for object:getdensity() │ │ + [ 10811] rayleigh │ │ + [ 1081a] sunsetcolor │ │ + [ 10826] travelling │ │ + [ 10831] __eq │ │ + [ 10836] No arguments expected for observer:isvalid() │ │ + [ 10863] Argument 1 and 2 (of 3) to observer:lookat must be of type position │ │ + [ 108a7] One argument expected to observer:setsurface() │ │ + [ 108d6] One argument expected for observer:setlocationflags() │ │ + [ 1090c] getx │ │ + [ 10911] No arguments expected for position:getz() │ │ + [ 1093b] real │ │ + [ 10940] pointsize │ │ + [ 1094a] has tangents: {}\n │ │ + [ 1095c] normalmap "{}"\n │ │ + [ 1096c] color0 │ │ + [ 10974] f1\n │ │ + [ 10978] end_vertexdesc\n │ │ + [ 10988] jpl-neptune-ssb │ │ + [ 10998] jpl-venus-ssb │ │ + [ 109a6] saturn │ │ + [ 109ad] pluto-sun │ │ + [ 109b7] dione │ │ + [ 109bd] ariel │ │ + [ 109c3] iau-mercury │ │ + [ 109cf] eclipj2000 │ │ + [ 109da] Men │ │ + [ 109de] Mus │ │ + [ 109e2] Exceeded maximum DSO count.\n │ │ + [ 109ff] LO │ │ + [ 10a02] CM │ │ + [ 10a05] Historical │ │ + [ 10a10] CustomRotation │ │ + [ 10a1f] EquatorJ2000 │ │ + [ 10a2c] +x │ │ + [ 10a2f] + vec2(textureOffset, 0.0);\n │ │ + [ 10a4d] , n);\n │ │ + [ 10a54] , n)) * clamp( │ │ + [ 10a63] vec4 color = v_Color;\n │ │ + [ 10a7e] overlayTex │ │ + [ 10a89] in_TexCoord2 │ │ + [ 10a96] Deprecated parameter Albedo used in {} definition.\n │ │ Use GeomAlbedo & BondAlbedo instead.\n │ │ - [ 10ac2] Mass │ │ - [ 10ac7] Invalid filename in CloudNormalMap\n │ │ - [ 10aeb] Invalid filename in SpecularTexture\n │ │ - [ 10b10] DQ │ │ - [ 10b13] SAO {} │ │ - [ 10b1a] Creating ordinary texture: {}x{}\n │ │ - [ 10b3c] Error opening virtual texture file: {}\n │ │ - [ 10b64] Failed to read face array count\n │ │ - [ 10b85] ": │ │ - [ 10b88] Destroying context │ │ - [ 10b9b] eglDestroySurface() returned error %d │ │ - [ 10bc1] ju │ │ - [ 10bc4] Unsupported color conversion request │ │ - [ 10be9] Output file write error --- out of disk space? │ │ - [ 10c18] Freed EMS handle %u │ │ - [ 10c2c] t1cid │ │ - [ 10c32] tt-glyf │ │ - [ 10c3a] interpreter-version │ │ - [ 10c4e] PaintType │ │ - [ 10c58] known │ │ - [ 10c5e] MAX_SPACE │ │ - [ 10c68] RAW_X_HEIGHT │ │ - [ 10c75] RELATIVE_SETWIDTH │ │ - [ 10c87] SWIDTH │ │ - [ 10c8e] EndFontMetrics │ │ - [ 10c9d] IsCIDFont │ │ - [ 10ca7] trace │ │ - [ 10cad] (*temporary) │ │ - [ 10cba] closed file │ │ - [ 10cc6] lastlinedefined │ │ - [ 10cd6] Invalid attempt to read row data │ │ - [ 10cf7] Can't set both read_data_fn and write_data_fn in the same structure │ │ - [ 10d3b] invalid alpha mode │ │ - [ 10d4e] Not a PNG file │ │ - [ 10d5d] No space in chunk cache for sPLT │ │ - [ 10d7e] using zstream │ │ - [ 10d8d] too many sPLT chunks │ │ - [ 10da2] No IDATs written into file │ │ - [ 10dbd] Unrecognized unit type for pHYs chunk │ │ - [ 10de3] Invalid time specified for tIME chunk │ │ - [ 10e09] # │ │ - [ 10e0b] chkin_c │ │ - [ 10e13] b │ │ - [ 10e15] The Input and Output Units are Incompatible │ │ - [ 10e41] An Invalid Operation Value Was Supplied │ │ - [ 10e69] keeper_ │ │ - [ 10e71] SEARCH W/O BUFF │ │ - [ 10e81] reading │ │ - [ 10e89] DAFRS │ │ - [ 10e8f] SUMMARIZE_SEGMENT │ │ - [ 10ea1] ctindx │ │ - [ 10ea8] Column indices for table # range from # to #; requested index was #. │ │ - [ 10eed] rtbidx │ │ - [ 10ef4] Array indices FIRST and LAST were #, #; allowed range for both is [#, #]. File was #, record number was #. │ │ - [ 10f60] dasrwr_ │ │ - [ 10f68] rnbufc │ │ - [ 10f6f] LNKAN │ │ - [ 10f75] Node HEAD: node number = #; backward pointer = #; forward pointer = #. Node TAIL: node number = #; backward pointer = #; forward pointer = #. ("FREE" is #) │ │ - [ 11013] LNKILB │ │ - [ 1101a] PCPOOL │ │ - [ 11021] SZPOOL │ │ - [ 11028] kclass │ │ - [ 1102f] Invalid frame specification found in kernel pool: frame class keyword is # but integer class was not associated with this keyword. │ │ - [ 110b2] SPICE(INVALIDFRAMEDEF) │ │ - [ 110c9] _ID │ │ - [ 110cd] The input string could not be recognized as a number. │ │ - [ 11104] usrctr │ │ - [ 1110b] Unexpected CK type 5 subtype # found in type 5 segment. │ │ - [ 11143] Quaternion sign error: quaternion at index # in the input record is farther than its negative from the preceding quaternion in the record. Quaternion is (#, #, #, #); predecessor is (#, #, #, #). This makes the quaternion sequence unsuitable for Hermite interpolation. The quaternions, and if applicable, their derivatives, must be adjusted before they are passed to this routine. │ │ - [ 112c0] state │ │ - [ 112c6] Window size in type 06 segment was #; must be even for subtype #. Mini-segment index is #. │ │ - [ 11321] SPICE(BUG): The trcdep_ routine returned a depth, %i, larger than the maximum allowed depth, %i. This error should never signal. Please contact NAIF.\n │ │ + [ 10aef] Mass │ │ + [ 10af4] Invalid filename in CloudNormalMap\n │ │ + [ 10b18] Invalid filename in SpecularTexture\n │ │ + [ 10b3d] DQ │ │ + [ 10b40] SAO {} │ │ + [ 10b47] Creating ordinary texture: {}x{}\n │ │ + [ 10b69] Error opening virtual texture file: {}\n │ │ + [ 10b91] Failed to read face array count\n │ │ + [ 10bb2] ": │ │ + [ 10bb5] Destroying context │ │ + [ 10bc8] eglDestroySurface() returned error %d │ │ + [ 10bee] ju │ │ + [ 10bf1] Unsupported color conversion request │ │ + [ 10c16] Output file write error --- out of disk space? │ │ + [ 10c45] Freed EMS handle %u │ │ + [ 10c59] t1cid │ │ + [ 10c5f] tt-glyf │ │ + [ 10c67] interpreter-version │ │ + [ 10c7b] PaintType │ │ + [ 10c85] known │ │ + [ 10c8b] MAX_SPACE │ │ + [ 10c95] RAW_X_HEIGHT │ │ + [ 10ca2] RELATIVE_SETWIDTH │ │ + [ 10cb4] SWIDTH │ │ + [ 10cbb] EndFontMetrics │ │ + [ 10cca] IsCIDFont │ │ + [ 10cd4] trace │ │ + [ 10cda] (*temporary) │ │ + [ 10ce7] closed file │ │ + [ 10cf3] lastlinedefined │ │ + [ 10d03] Invalid attempt to read row data │ │ + [ 10d24] Can't set both read_data_fn and write_data_fn in the same structure │ │ + [ 10d68] invalid alpha mode │ │ + [ 10d7b] Not a PNG file │ │ + [ 10d8a] No space in chunk cache for sPLT │ │ + [ 10dab] using zstream │ │ + [ 10dba] too many sPLT chunks │ │ + [ 10dcf] No IDATs written into file │ │ + [ 10dea] Unrecognized unit type for pHYs chunk │ │ + [ 10e10] Invalid time specified for tIME chunk │ │ + [ 10e36] # │ │ + [ 10e38] chkin_c │ │ + [ 10e40] b │ │ + [ 10e42] The Input and Output Units are Incompatible │ │ + [ 10e6e] An Invalid Operation Value Was Supplied │ │ + [ 10e96] keeper_ │ │ + [ 10e9e] SEARCH W/O BUFF │ │ + [ 10eae] reading │ │ + [ 10eb6] DAFRS │ │ + [ 10ebc] SUMMARIZE_SEGMENT │ │ + [ 10ece] ctindx │ │ + [ 10ed5] Column indices for table # range from # to #; requested index was #. │ │ + [ 10f1a] rtbidx │ │ + [ 10f21] Array indices FIRST and LAST were #, #; allowed range for both is [#, #]. File was #, record number was #. │ │ + [ 10f8d] dasrwr_ │ │ + [ 10f95] rnbufc │ │ + [ 10f9c] LNKAN │ │ + [ 10fa2] Node HEAD: node number = #; backward pointer = #; forward pointer = #. Node TAIL: node number = #; backward pointer = #; forward pointer = #. ("FREE" is #) │ │ + [ 11040] LNKILB │ │ + [ 11047] PCPOOL │ │ + [ 1104e] SZPOOL │ │ + [ 11055] kclass │ │ + [ 1105c] Invalid frame specification found in kernel pool: frame class keyword is # but integer class was not associated with this keyword. │ │ + [ 110df] SPICE(INVALIDFRAMEDEF) │ │ + [ 110f6] _ID │ │ + [ 110fa] The input string could not be recognized as a number. │ │ + [ 11131] usrctr │ │ + [ 11138] Unexpected CK type 5 subtype # found in type 5 segment. │ │ + [ 11170] Quaternion sign error: quaternion at index # in the input record is farther than its negative from the preceding quaternion in the record. Quaternion is (#, #, #, #); predecessor is (#, #, #, #). This makes the quaternion sequence unsuitable for Hermite interpolation. The quaternions, and if applicable, their derivatives, must be adjusted before they are passed to this routine. │ │ + [ 112ed] state │ │ + [ 112f3] Window size in type 06 segment was #; must be even for subtype #. Mini-segment index is #. │ │ + [ 1134e] SPICE(BUG): The trcdep_ routine returned a depth, %i, larger than the maximum allowed depth, %i. This error should never signal. Please contact NAIF.\n │ │ sc01_ │ │ - [ 113bf] SCPR01 │ │ - [ 113c6] words │ │ - [ 113cc] MSGSEL: An invalid error message type was supplied as input; the type specifiedwas: │ │ - [ 11423] Input file # has architecture #. The file must be a binary SPK file to be readable by this routine. Binary SPK files have DAF architecture. If you expected the file to be a binary SPK file, the problem may be due to the file being an old non-native file lacking binary file format information. It's also possible the file has been corrupted. │ │ - [ 1157b] GETFAT │ │ - [ 11582] The mass supplied for the central body of a type 15 segment was non-positive. Masses must be positive. The value supplied was #. │ │ - [ 11605] The eccentricity supplied for a type 17 segment is greater than 0.9. It must be less than 0.9.The value supplied to the type 17 evaluator was #. │ │ - [ 11698] The semi-major axis supplied to EQNCPV was non-positive. The value is required to be positive by this routine. The value supplied was #. │ │ - [ 11722] PCK data required to compute the orientation of the # # for epoch # TDB were not found. If these data were to be provided by a binary PCK file, then it is possible that the PCK file does not have coverage for the specified body-fixed frame at the time of interest. If the data were to be provided by a text PCK file, then possibly the file does not contain data for the specified body-fixed frame. In either case it is possible that a required PCK file was not loaded at all. │ │ - [ 118fe] MAX_PHASE_DEGREE │ │ - [ 1190f] dtipm │ │ - [ 11915] N0067 │ │ - [ 1191b] marker or final newline character, or is │ │ - [ 11945] Left endpoint was *. Right endpoint was *. │ │ - [ 11970] IOSTAT = │ │ - [ 1197a] CLLINE: File = │ │ - [ 1198b] w_ed, unexpected code: %d\n │ │ - [ 119a6] defnam │ │ - [ 119ad] An attempt to assign the code, #, to a blank string was made. Check loaded text kernels for a blank string in the NAIF_BODY_NAME array. │ │ - [ 11a36] ZZDAFGSR │ │ - [ 11a3f] The attempt to load file, '#', with access method, '#', failed because this access method is unsupported. │ │ - [ 11aa9] strarc │ │ - [ 11ab0] Definition of frame # contains # specification #. The only valid rotation states are # or #. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 11b6b] NONE │ │ - [ 11b70] ddat │ │ - [ 11b75] N_D_ALLOC │ │ - [ 11b7f] ZZEKSZ05 │ │ - [ 11b88] IAU_DEIMOS │ │ - [ 11b93] IAU_OPHELIA │ │ - [ 11b9f] LONGEST LIST SIZE │ │ - [ 11bb1] MAB │ │ - [ 11bb5] MEX │ │ - [ 11bb9] JUNO │ │ - [ 11bbe] NEAR EARTH ASTEROID RENDEZVOUS │ │ - [ 11bdd] DIXI │ │ - [ 11be2] CH2L │ │ - [ 11be7] MAP │ │ - [ 11beb] DAWN │ │ - [ 11bf0] RBSP_A │ │ - [ 11bf7] MARS-96 │ │ - [ 11bff] SHOEMAKER-LEVY 9-N │ │ - [ 11c12] SHOEMAKER-LEVY 9-B │ │ - [ 11c25] FAYE │ │ - [ 11c2a] GICLAS │ │ - [ 11c31] SCHUSTER │ │ - [ 11c3a] TRITTON │ │ - [ 11c42] HELIN-ROMAN-ALU 1 │ │ - [ 11c54] MATHILDE │ │ - [ 11c5d] MADRID │ │ - [ 11c64] DSS-17 │ │ - [ 11c6b] # is a CK frame; a CK file containing data for instrument or structure # at the epoch shown above, as well as a corresponding SCLK kernel, must be loaded in order to use this frame. │ │ - [ 11d21] │ │ - [ 11d42] zzplatfm_ │ │ - [ 11d4c] ZZPLTCHK │ │ - [ 11d55] zzrefch0_ │ │ - [ 11d5f] [w] │ │ - [ 11d63] Dm │ │ - [ 11d66] The type of the time vector specified was #, only 'YD' and 'YMD' are recognized. │ │ - [ 11db8] SPICE(BADKERNELVARTYPE) │ │ - [ 11dd0] Offset count # does not match field count # for SCLK #. │ │ - [ 11e08] SPICE(BADPECCENTRICITY) │ │ - [ 11e20] Semi-latus rectum less-than zero. │ │ - [ 11e42] zzspkgp0_ │ │ - [ 11e4c] Interval time bounds are not strictly increasing at interval index # for switch frame #. Time bounds are #:# TDB (# TDB : # TDB) │ │ - [ 11ecd] White Space │ │ - [ 11ed9] Month │ │ - [ 11edf] recog │ │ - [ 11ee5] UTC- │ │ - [ 11eea] Two substrings indicating a calendar year were identified in the input time string <#> and <#>: " │ │ - [ 11f4c] Both a day of year and month were identified in the input string. " │ │ - [ 11f90] ############## │ │ - [ 11f9f] Y*m*D*H*M │ │ - [ 11fa9] Y-idi:i │ │ - [ 11fb1] Y-idi:n │ │ - [ 11fb9] i-Y/i:i:n │ │ - [ 11fc3] i-i/i:i │ │ - [ 11fcb] miii:n │ │ - [ 11fd2] i-i-Yi:i:i │ │ - [ 11fdd] Y-itx │ │ - [ 11fe3] The direction vectors associated with states AXDEF and PLNDEF are linearly dependent. │ │ - [ 12039] hy__AREVMDA │ │ - [ 12045] aa │ │ - [ 12048] blo │ │ - [ 1204c] dsb │ │ - [ 12050] gn │ │ - [ 12053] grb │ │ - [ 12057] hai │ │ - [ 1205b] ho │ │ - [ 1205e] ksf │ │ - [ 12062] ku │ │ - [ 12065] lam │ │ - [ 12069] ml │ │ - [ 1206c] pap │ │ - [ 12070] tli │ │ - [ 12074] zbl │ │ - [ 12078] cos │ │ - [ 1207c] fra │ │ - [ 12080] jpn │ │ - [ 12084] nau │ │ - [ 12088] oci │ │ - [ 1208c] oji │ │ - [ 12090] sna │ │ - [ 12094] sun │ │ - [ 12098] DM │ │ - [ 1209b] GF │ │ - [ 1209e] GU │ │ - [ 120a1] LV │ │ - [ 120a4] PT │ │ - [ 120a7] SB │ │ - [ 120aa] TM │ │ - [ 120ad] ZM │ │ - [ 120b0] ATG │ │ - [ 120b4] CAN │ │ - [ 120b8] FRA │ │ - [ 120bc] GRC │ │ - [ 120c0] MKD │ │ - [ 120c4] MYS │ │ - [ 120c8] PCN │ │ - [ 120cc] SVN │ │ - [ 120d0] cs_CZ │ │ - [ 120d6] pl_PL │ │ - [ 120dc] ur_PK │ │ - [ 120e2] MST7MDT │ │ - [ 120ea] AST │ │ - [ 120ee] Chile/EasterIsland │ │ - [ 12101] America/Guatemala │ │ - [ 12113] ar_KW │ │ - [ 12119] en_MP │ │ - [ 1211f] fr_CI │ │ - [ 12125] haw_US │ │ - [ 1212c] om_ET │ │ - [ 12132] sd_Arab │ │ - [ 1213a] ti_ER │ │ - [ 12140] sgn-mx │ │ - [ 12147] ures_swap(): too few bytes (%d after header) for a resource bundle\n │ │ - [ 1218b] ures_swap().swapArray16(16-bit units[%d]) failed\n │ │ - [ 121bd] windowsZones │ │ - [ 121ca] weekData │ │ - [ 121d3] calendarPreferenceData │ │ - [ 121ea] M02 │ │ - [ 121ee] mapTimezones │ │ - [ 121fb] icudt75l-zone │ │ - [ 12209] pattern │ │ - [ 12211] line separator │ │ - [ 12220] U_UNSUPPORTED_ERROR │ │ - [ 12234] U_NO_SPACE_AVAILABLE │ │ - [ 12249] U_UNTERMINATED_QUOTE │ │ - [ 1225e] U_ILLEGAL_PAD_POSITION │ │ - [ 12275] U_ARGUMENT_TYPE_MISMATCH │ │ - [ 1228e] U_BRK_VARIABLE_REDFINITION │ │ - [ 122a9] U_BRK_MISMATCHED_PAREN │ │ - [ 122c0] U_BRK_UNDEFINED_VARIABLE │ │ - [ 122d9] U_REGEX_LOOK_BEHIND_LIMIT │ │ - [ 122f3] U_IDNA_LABEL_TOO_LONG_ERROR │ │ - [ 1230f] exceptions │ │ - [ 1231a] BOV │ │ - [ 1231e] BWP │ │ - [ 12322] CSK │ │ - [ 12326] ECV │ │ - [ 1232a] ESB │ │ - [ 1232e] LBP │ │ - [ 12332] LUL │ │ - [ 12336] SIT │ │ - [ 1233a] XBB │ │ - [ 1233e] XEU │ │ - [ 12342] XSU │ │ - [ 12346] Division by zero │ │ - [ 12357] Insufficient storage │ │ - [ 1236c] calendarData │ │ - [ 12379] @calendar=coptic │ │ - [ 1238a] concentr │ │ - [ 12393] consumption │ │ - [ 1239f] revolution │ │ - [ 123aa] square-mile │ │ - [ 123b6] liter-per-kilometer │ │ - [ 123ca] kilobit │ │ - [ 123d2] kilojoule │ │ - [ 123dc] milligram │ │ - [ 123e6] beaufort │ │ - [ 123ef] micro │ │ - [ 123f5] nano │ │ - [ 123fa] or-short │ │ - [ 12403] cldrVersion │ │ - [ 1240f] tsubo_to_m2 │ │ - [ 1241b] dalvik/system/InMemoryDexClassLoader │ │ - [ 12440] android/view/Display │ │ - [ 12455] MODEL │ │ - [ 1245b] unique_lock::lock: references null mutex │ │ - [ 12484] Comet tails disabled │ │ - [ 12499] Time: Backward │ │ - [ 124a8] ltr │ │ - [ 124ac] inverting crosshair │ │ - [ 124c0] MeasurementSystem │ │ - [ 124d2] RayBasedDragging │ │ - [ 124e3] OrbitPeriodsShown │ │ - [ 124f5] false\n │ │ - [ 124fd] selection " │ │ - [ 12509] LT │ │ - [ 1250e] Chase %s\n │ │ - [ 12518] Density: {} lb/ft�\n │ │ - [ 1252d] Loading symbol: %s\n │ │ - [ 12541] Capture Device │ │ - [ 12550] Attempting to initialize %s backend...\n │ │ - [ 12578] Failed to initialize %s backend.\n │ │ - [ 1259a] Channel Routing: %s\n │ │ - [ 125bc] CHANNEL_AUX_4 │ │ - [ 125ca] Out of memory │ │ - [ 125d8] Failed to initialize backend │ │ - [ 125f5] [AAudio] Device Disconnected. Failed to post job for rerouting.\n │ │ - [ 12636] AAudioStreamBuilder_setFormat │ │ - [ 12654] AAudioStream_getState │ │ - [ 1266a] [OpenSL] Failed to stop internal playback device. │ │ - [ 1269c] labl │ │ - [ 126a1] note │ │ - [ 126a6] darksalmon │ │ - [ 126b1] darkturquoise │ │ - [ 126bf] mediumaquamarine │ │ - [ 126d6] cloudmaps │ │ - [ 126e0] facula │ │ - [ 126e7] gotoloc │ │ - [ 126ef] setwindowbordersvisible │ │ - [ 12707] unmark │ │ - [ 1270e] unmarkall │ │ - [ 12718] view │ │ - [ 1271d] User data expected │ │ - [ 12730] showconstellations │ │ - [ 12743] hideconstellations │ │ - [ 12756] setoverlayelements │ │ - [ 12769] getstarstyle │ │ - [ 12776] tojulianday │ │ - [ 12782] getstar │ │ - [ 1278a] newcategory │ │ - [ 12796] Third argument to celestia:print must be a number │ │ - [ 127c8] Argument to celestia:getlabelcolor() must be a string │ │ - [ 127fe] setlinecolor: color values must be numbers │ │ - [ 12829] Values in table-argument to celestia:setoverlayelements() must be boolean │ │ - [ 12873] One argument expected for celestia:setgalaxylightgain() │ │ - [ 128ab] One argument expected for celestia:select() │ │ - [ 128d7] No argument expected to function celestia:ispaused │ │ - [ 1290a] No argument expected to function celestia:istimesynchronized │ │ - [ 12947] No argument expected to function celestia:gettimescale │ │ - [ 1297e] Second arg to celestia:settimescale must be a number │ │ - [ 129b3] No argument expected in celestia:getstarstyle │ │ - [ 129e1] Argument to celestia:setstarcolor must be a string │ │ - [ 12a14] Fourth argument to celestia:overlay must be a number (alpha) │ │ - [ 12a51] Second argument to celestia:play must be a number (volume) │ │ - [ 12a8c] edgeclamp │ │ - [ 12a96] string │ │ - [ 12a9d] Error: LuaState invalid in Celx_SafeGetNumber\n │ │ - [ 12acc] class_matrix │ │ - [ 12ad9] class_rotation │ │ - [ 12ae8] Color │ │ - [ 12aee] Translate │ │ - [ 12af8] One argument expected for gl.LineWidth() │ │ - [ 12b21] No arguments expected for font:unbind() │ │ - [ 12b49] Error while parsing CEL-script. │ │ - [ 12b69] First argument to object:setorbitvisibility() must be a string │ │ - [ 12ba8] Unknown visibility policy: {}\n │ │ - [ 12bc7] invisible │ │ - [ 12bd1] stellarClass │ │ - [ 12bde] absoluteMagnitude │ │ - [ 12bf0] hasRings │ │ - [ 12bf9] Time expected as argument to object:getphase │ │ - [ 12c26] setfov │ │ - [ 12c2d] accelTime │ │ - [ 12c37] Bad observer object (maybe tried to access a deleted view?)! │ │ - [ 12c74] Argument for observer:orbit must be a rotation │ │ - [ 12ca3] Bad phase object during garbage collection! │ │ - [ 12ccf] Bad phase object! │ │ - [ 12ce1] second argument to rotation:setaxisangle must be a number │ │ - [ 12d1b] normalize │ │ - [ 12d25] emissive │ │ - [ 12d2e] trilist │ │ - [ 12d36] texcoord1 │ │ - [ 12d41] jpl-sun-ssb │ │ - [ 12d4d] miranda │ │ - [ 12d55] iau-titan │ │ - [ 12d5f] Failed to load module for ScriptedOrbit: {}\n │ │ - [ 12d8c] ScriptedRotation generator function returned bad value.\n │ │ - [ 12dc5] %ld │ │ - [ 12dca] Loaded SPK file {}\n │ │ - [ 12dde] spk │ │ - [ 12de2] pixelWeight │ │ - [ 12dee] Error parsing asterism {} chain: expected array\n │ │ - [ 12e1f] Aur │ │ - [ 12e23] Cyg │ │ - [ 12e27] Sco │ │ - [ 12e2b] Error parsing deep sky catalog entry {}\n │ │ - [ 12e54] Galaxy (Hubble type: %s) │ │ - [ 12e6d] models/SBa.png │ │ - [ 12e7c] s │ │ - [ 12e7e] NoiseOffset │ │ - [ 12e8a] Could not find custom rotation model named '{}'\n │ │ - [ 12ebb] FixedAttitude │ │ - [ 12ec9] FixedPosition planetographic coordinates are not valid for stars.\n │ │ - [ 12f0c] MeridianAngle │ │ - [ 12f1a] Object has incorrect topocentric frame syntax.\n │ │ - [ 12f4a] Bad two-vector frame: vector has invalid axis label.\n │ │ - [ 12f80] rE │ │ - [ 12f83] tangent = in_Tangent;\n │ │ - [ 12f9a] );\n │ │ - [ 12f9e] shadowMaxDepth │ │ - [ 12fad] l = mix(NL, (NL / (max(NV, 0.001) + NL)), lunarLambert) * clamp( │ │ - [ 12fee] color.rgb = mix(color.rgb, overlayColor.rgb, overlayColor.a);\n │ │ - [ 1302d] gl_FragColor = color * diff + spec;\n │ │ - [ 13052] .st) * totalLight;\n │ │ - [ 13066] opticalDepth │ │ - [ 13073] ringShadowTexCoordX = │ │ - [ 1308a] triangles │ │ - [ 13094] Invalid SemiAxes value for object {}: [{}, {}, {}]\n │ │ - [ 130c8] Mie │ │ - [ 130cc] CloudNormalMap │ │ - [ 130db] OverlayTexture │ │ - [ 130ea] LabelColor │ │ - [ 130f5] Ia │ │ - [ 130f8] unrecognized object type │ │ - [ 13111] Content size {} too small to include face array count\n │ │ - [ 13148] (DDD)V │ │ - [ 1314f] (Ljava/lang/Object;)Z │ │ - [ 13165] Locations │ │ - [ 1316f] ],\n │ │ - [ 13173] occulter │ │ - [ 1317c] receiver │ │ - [ 13185] (I)Z │ │ - [ 1318a] LC_COLLATE │ │ - [ 13195] Bogus virtual array access │ │ - [ 131b0] Memory limit exceeded │ │ - [ 131c6] Not a JPEG file: starts with 0x%02x 0x%02x │ │ - [ 131f1] ._ │ │ - [ 131f4] .AppleDouble/ │ │ - [ 13202] multi-masters │ │ - [ 13210] BlueFuzz │ │ - [ 13219] MinFeature │ │ - [ 13224] StrokeWidth │ │ - [ 13230] BlendAxisTypes │ │ - [ 1323f] XUID │ │ - [ 13244] Bold Italic │ │ - [ 13250] ADD_STYLE_NAME │ │ - [ 1325f] AVG_CAPITAL_WIDTH │ │ - [ 13271] DEFAULT_CHAR │ │ - [ 1327e] RAW_CAP_HEIGHT │ │ - [ 13290] � │ │ - [ 13295] StartKernPairs │ │ - [ 132a4] upval │ │ - [ 132aa] k │ │ - [ 132ac] && │ │ - [ 132af] luaopen_%s │ │ - [ 132ba] external hook │ │ - [ 132c9] 32bit^Cfpu^Fsoftfp^Deabi^Ble │ │ - [ 132e2] png_image_begin_read_from_file: invalid argument │ │ - [ 13313] missing IHDR │ │ - [ 13320] hIST must be after │ │ - [ 13333] too many profiles │ │ - [ 13345] iCCP: invalid keyword │ │ - [ 1335b] SPICE(INVALIDSIZE) │ │ - [ 1336e] SPICE(INVALIDCLUSTERNUM) │ │ - [ 13387] SPICE(INVALIDOPTION) │ │ - [ 1339c] SPICE(PATHTOOLONG) │ │ - [ 133af] itbeg │ │ - [ 133b5] ithfs │ │ - [ 133bb] Number of files loaded is at a maximum, as specified by the parameter FTSIZE, the value of which is #. You will need to either load fewer files, or change the parameter FTSIZE. │ │ - [ 1346c] SPICE(NOLOADEDFILES) │ │ - [ 13481] NI was #, should be in range [2,#]. │ │ - [ 134a5] internal │ │ - [ 134ae] No record, word for address #. │ │ - [ 134cd] DAFBFS │ │ - [ 134d4] DAFFNA │ │ - [ 134db] Character record write failed. Value of IOSTAT was # │ │ - [ 13510] stncol │ │ - [ 13517] EKCCNT │ │ - [ 1351e] sizes │ │ - [ 13524] The number of comment records allocated must be non-negative but was #. │ │ - [ 1356c] lastrc │ │ - [ 13573] SPICE(DASNOSUCHHANDLE) │ │ - [ 1358a] rcbufd │ │ - [ 13591] SPICE(INVALIDNODE) │ │ - [ 135a4] r+b │ │ - [ 135a8] malloc failure │ │ - [ 135b7] btchkp │ │ - [ 135be] pckbsr_ │ │ - [ 135c6] btruex │ │ - [ 135cd] pool_ │ │ - [ 135d3] The watched kernel variable name list WTVARS has room for # more elements, so the # new names (in a list of # names) associated with agent # cannot be inserted. │ │ - [ 13674] J2000 │ │ - [ 1367a] FRAME_ │ │ - [ 13681] SPICE(NONEXISTELEMENTS) │ │ - [ 13699] SPICE(PASTENDSTR) │ │ - [ 136ab] SPICE(BADSUBSTR) │ │ - [ 136bc] CONVRT: Input units │ │ - [ 136d1] type: │ │ - [ 136d8] agent │ │ - [ 136de] cks │ │ - [ 136e2] CKR01 │ │ - [ 136e8] DAFGDA │ │ - [ 136ef] SPICE(BADQUATSIGN) │ │ - [ 13702] SPICE(NOTAROTATION) │ │ - [ 13716] rd_ed, unexpected code: %d\n │ │ - [ 13732] OUTMSG: An invalid message type was specified in the type list. │ │ - [ 13774] SPICE(INVALIDFORMAT) │ │ - [ 13789] DAFETF │ │ - [ 13790] 'NAIF/DAF' │ │ - [ 1379b] The input record has a maximum table dimension of #, while the maximum supported by this routine is #. It is possible that this problem is due to your SPICE Toolkit being out of date. │ │ - [ 13853] LGRESP │ │ - [ 1385a] SPKR14 │ │ - [ 13861] Both kernel variables # and # are present in the kernel pool. At most one form of the kernel variable name may be present. │ │ - [ 138dc] PCKE02 │ │ - [ 138e3] SCREEN │ │ - [ 138ea] frozen │ │ - [ 138f1] & │ │ - [ 138f3] WRLINE: File = │ │ - [ 13903] list in │ │ - [ 1390b] bltnam │ │ - [ 13912] SPICE(HANDLENOTFOUND) │ │ - [ 13928] ZZDASNFR │ │ - [ 13931] ZZDDHHLU │ │ - [ 1393a] The binary file format, '#', is not supported by this version of the toolkit. This is a serious problem, contact NAIF. │ │ - [ 139bd] Attempt to open file '#' failed. Value of IOSTAT was #. │ │ - [ 139f5] SPICE(UNKNOWNFILARC) │ │ - [ 13a0a] itmaxe │ │ - [ 13a11] itmunt │ │ - [ 13a18] VECTOR │ │ - [ 13a1f] NUT_MODEL │ │ - [ 13a29] OBLIQ_MODEL │ │ - [ 13a35] nearpt_ │ │ - [ 13a3d] axisqr │ │ - [ 13a44] Norm of scaled point is 0. POSITN = ( #, #, # ) │ │ - [ 13a74] zzekjtst_ │ │ - [ 13a7e] idxset │ │ - [ 13a85] ZZEKLLED │ │ - [ 13a8e] SPICE(DASNOTEMPTY) │ │ - [ 13aa1] ZZEKRSD │ │ - [ 13aa9] ZZEKRD01 │ │ - [ 13ab2] Key = #; valid range = 1:#. Tree = #, file = # │ │ - [ 13ae1] An attempt to create a temporary string array failed. Attempted to allocate # bytes. │ │ - [ 13b37] An attempt to copy a string using C2F_StrCpy failed. │ │ - [ 13b6c] There is an inconsistency between the version of the routine calling ZZFDAT and the current version of ZZFDAT. Check to make sure that you have the most current versions of ZZFDAT and the routines that make use of it. │ │ - [ 13c46] IAU_UMBRIEL │ │ - [ 13c52] IAU_GALATEA │ │ - [ 13c5e] IAU_EURYBATES │ │ - [ 13c6c] zzdynfr0_ │ │ - [ 13c76] SPICE(INVALIDDIVISOR) │ │ - [ 13c8c] EARTH_BARYCENTER │ │ - [ 13c9d] LEDA │ │ - [ 13ca2] THYONE │ │ - [ 13ca9] HEGEMONE │ │ - [ 13cb2] HERSE │ │ - [ 13cb8] CALYPSO │ │ - [ 13cc0] HATI │ │ - [ 13cc5] LOGE │ │ - [ 13cca] DESPINA │ │ - [ 13cd2] LADEE │ │ - [ 13cd8] P10 │ │ - [ 13cdc] PIONEER-11 │ │ - [ 13ce7] JANUS_B │ │ - [ 13cef] TROPICAL RAINFALL MEASURING MISSION │ │ - [ 13d13] ICE │ │ - [ 13d17] CASP │ │ - [ 13d1c] MARTIAN MOONS EXPLORATION │ │ - [ 13d36] SELENE VLBI Radio Satellite │ │ - [ 13d52] SHOEMAKER-LEVY 9-E │ │ - [ 13d65] RUSSELL 3 │ │ - [ 13d6f] SCHAUMASSE │ │ - [ 13d7a] SINGER-BREWSTER │ │ - [ 13d8a] HOLT-OLMSTEAD │ │ - [ 13d98] DSS-27 │ │ - [ 13d9f] xmit │ │ - [ 13da4] TPARSE does not support the specification of a time system in a string. The time system # was specified. │ │ - [ 13e0f] *w* │ │ - [ 13e13] The year value was #. This must be an integral value. │ │ - [ 13e4b] YMD │ │ - [ 13e50] SPICE(BADTIMEBOUNDS) │ │ - [ 13e65] YDF │ │ - [ 13e69] YMDF │ │ - [ 13e6e] SPICE(BADPICTURE) │ │ - [ 13e80] UTC-Offset indicator │ │ - [ 13e95] JANUARY │ │ - [ 13e9d] The input time string is blank. │ │ - [ 13ebd] │ │ - [ 13ec3] Y-it │ │ - [ 13ec8] YmDH*M*S │ │ - [ 13ed1] Yiiiii │ │ - [ 13ed8] i:i:nimY │ │ - [ 13ee1] mDYH*M │ │ - [ 13ee8] imYi:i │ │ - [ 13eef] i/i/Yi:i:n │ │ - [ 13efa] mo │ │ - [ 13efd] zh_GAN │ │ - [ 13f04] be │ │ - [ 13f07] bgn │ │ - [ 13f0b] fil │ │ - [ 13f0f] goh │ │ - [ 13f13] hil │ │ - [ 13f17] kaw │ │ - [ 13f1b] ky │ │ - [ 13f1e] lzh │ │ - [ 13f22] mai │ │ - [ 13f26] mde │ │ - [ 13f2a] mh │ │ - [ 13f2d] mn │ │ - [ 13f30] srr │ │ - [ 13f34] su │ │ - [ 13f37] ve │ │ - [ 13f3a] xnr │ │ - [ 13f3e] zun │ │ - [ 13f42] fao │ │ - [ 13f46] hun │ │ - [ 13f4a] ndo │ │ - [ 13f4e] slk │ │ - [ 13f52] tgk │ │ - [ 13f56] tso │ │ - [ 13f5a] tah │ │ - [ 13f5e] BH │ │ - [ 13f61] IC │ │ - [ 13f64] KY │ │ - [ 13f67] SJ │ │ - [ 13f6a] SX │ │ - [ 13f6d] TN │ │ - [ 13f70] AUS │ │ - [ 13f74] AZE │ │ - [ 13f78] BDI │ │ - [ 13f7c] COK │ │ - [ 13f80] CMR │ │ - [ 13f84] CYM │ │ - [ 13f88] LBY │ │ - [ 13f8c] STP │ │ - [ 13f90] UZB │ │ - [ 13f94] ZAF │ │ - [ 13f98] uprv_copyEbcdic() string[%] contains a variant character in position %d\n │ │ - [ 13fe1] es_ES │ │ - [ 13fe7] km_KH │ │ - [ 13fed] lo_LA │ │ - [ 13ff3] yue_Hant_HK │ │ - [ 13fff] metadata │ │ - [ 14008] Asia/Anadyr │ │ - [ 14014] Asia/Yakutsk │ │ - [ 14021] Asia/Ulaanbaatar │ │ - [ 14032] AZT │ │ - [ 14036] WET │ │ - [ 1403a] BRST │ │ - [ 1403f] America/Cuiaba │ │ - [ 1404e] US/Central │ │ - [ 14059] PSACCENT │ │ - [ 14062] PSCRACK │ │ - [ 1406a] partitions │ │ - [ 14075] en_PH │ │ - [ 1407b] gd_GB │ │ - [ 14081] it_CH │ │ - [ 14087] ms_BN │ │ - [ 1408d] qu_PE │ │ - [ 14093] ur_IN │ │ - [ 14099] i-ami │ │ - [ 1409f] sgn-br │ │ - [ 140a6] ncs │ │ - [ 140aa] dse │ │ - [ 140ae] zh-cmn-hans │ │ - [ 140ba] zh-wuu │ │ - [ 140c1] ucnv_unload │ │ - [ 140cd] ucol_openFromShortString │ │ - [ 140e6] layout │ │ - [ 140ed] TZVersion │ │ - [ 140f7] uchar_swapNames(): too few bytes (%d after header) for unames.icu\n │ │ - [ 1413a] udict_swap(): too few bytes (%d after header) for all of dictionary data\n │ │ - [ 14184] U_ZERO_ERROR │ │ - [ 14191] U_INTERNAL_PROGRAM_ERROR │ │ - [ 141aa] U_BUFFER_OVERFLOW_ERROR │ │ - [ 141c2] U_ILLEGAL_ESCAPE_SEQUENCE │ │ - [ 141dc] U_MISMATCHED_SEGMENT_DELIMITERS │ │ - [ 141fc] U_UNSUPPORTED_ATTRIBUTE │ │ - [ 14214] U_MF_SELECTOR_ERROR │ │ - [ 14228] U_BRK_RULE_SYNTAX │ │ - [ 1423a] U_REGEX_PROPERTY_SYNTAX │ │ - [ 14252] U_REGEX_UNIMPLEMENTED │ │ - [ 14268] currencyNumericCodes │ │ - [ 1427d] CNY │ │ - [ 14281] ETB │ │ - [ 14285] KMF │ │ - [ 14289] KRO │ │ - [ 1428d] KYD │ │ - [ 14291] THB │ │ - [ 14295] TMT │ │ - [ 14299] XCG │ │ - [ 1429d] typeOffsets │ │ - [ 142a9] M10L │ │ - [ 142ae] @calendar=ethiopic │ │ - [ 142c1] digital │ │ - [ 142c9] speed │ │ - [ 142cf] millimole-per-liter │ │ - [ 142e3] ZWN │ │ - [ 142e7] millimeter │ │ - [ 142f2] yard │ │ - [ 142f7] kilogram │ │ - [ 14300] centiliter │ │ - [ 1430b] cubic-centimeter │ │ - [ 1431c] personal │ │ - [ 14325] any │ │ - [ 14329] zepto │ │ - [ 1432f] grammaticalFeatures │ │ - [ 14343] UCARules │ │ - [ 1434c] AMU │ │ - [ 14350] ATrace_setCounter │ │ - [ 14362] preferredRefreshPeriod │ │ - [ 14379] Alt-azimuth mode disabled │ │ - [ 14393] Time and script are paused │ │ - [ 143ae] High res textures │ │ - [ 143c0] Unknown script system access policy {}\n │ │ - [ 143e8] invalid precision │ │ - [ 143fa] negative precision │ │ - [ 1440d] AsterismsFile │ │ - [ 1441b] HDCrossIndex │ │ - [ 14428] WarpMeshFile │ │ - [ 14435] FocusZooming │ │ - [ 14442] R │ │ - [ 14444] angle │ │ - [ 1444a] true\n │ │ - [ 14450] "\n │ │ - [ 14453] Travelling ({})\n │ │ - [ 14464] seconds │ │ - [ 1446c] Mass: {} lb\n │ │ - [ 14479] Error reading {} catalog file: {}\n │ │ - [ 1449c] Failed to load library: %s\n │ │ - [ 144b8] Failed to initialize mutex for device info retrieval. ma_context_get_device_info() is not thread safe.\n │ │ - [ 14520] Passthrough: %s\n │ │ - [ 14542] CHANNEL_AUX_3 │ │ - [ 14550] CHANNEL_AUX_14 │ │ - [ 1455f] Format not supported │ │ - [ 14574] WASAPI │ │ - [ 1457b] SL_IID_AUDIOIODEVICECAPABILITIES │ │ - [ 1459c] {:%c} │ │ - [ 145a2] {:%Y %b %d %H:%M:%S %Z} │ │ - [ 145ba] darkolivegreen │ │ - [ 145c9] lightgreen │ │ - [ 145d4] lightseagreen │ │ - [ 145e2] mediumvioletred │ │ - [ 145f2] purple │ │ - [ 145f9] yellowgreen │ │ - [ 14605] .tga │ │ - [ 14610] labes │ │ - [ 14616] ring │ │ - [ 1461b] Time │ │ - [ 14620] magnitude │ │ - [ 1462a] getaltazimuthmode │ │ - [ 1463c] hidelabel │ │ - [ 14646] fromjulianday │ │ - [ 14654] runscript │ │ - [ 1465e] settimeslice │ │ - [ 1466b] Argument to celestia:setlabelflags() must be a table │ │ - [ 146a0] Keys in table-argument to celestia:setlabelflags() must be strings │ │ - [ 146e3] Wrong number of arguments to function celestia:tojulianday │ │ - [ 1471e] Third arg to celestia:utctotdb must be a number │ │ - [ 1474e] newframe: one object argument required for frame │ │ - [ 1477f] First arg to celestia:newvector must be a number │ │ - [ 147b0] Argument to celestia:setwindowbordersvisible must be a boolean │ │ - [ 147ef] One argument expected to function celestia:verbosity │ │ - [ 14824] First argument for celestia:isplayingaudio must be a number │ │ - [ 14860] First argument for celestia:stopaudio must be a number │ │ - [ 14897] First argument for celestia:setaudioloop must be a number │ │ - [ 148d1] Second argument for celestia:setaudioloop must be a boolean │ │ - [ 1490d] One argument expected to function celestia:log │ │ - [ 1493c] Error while executing tick callback: {}\n │ │ - [ 14965] celestia │ │ - [ 1496e] PROJECTION │ │ - [ 14979] No arguments expected for font:bind() │ │ - [ 1499f] No arguments expected for font:getmaxascent() │ │ - [ 149cd] setorbitvisibility │ │ - [ 149e0] No arguments expected to object:orbitvisibility │ │ - [ 14a10] atmosphereCloudHeight │ │ - [ 14a26] Sixth argument to object:mark must be a boolean │ │ - [ 14a56] skycolor │ │ - [ 14a5f] Value of {} must be number │ │ - [ 14a7a] isvalid │ │ - [ 14a82] Last argument to observer:lookat must be of type vector │ │ - [ 14aba] No arguments expected to observer:getposition │ │ - [ 14ae8] Vector components must be numbers │ │ - [ 14b0a] Merged similar meshes: {} -> {}.\n │ │ - [ 14b2c] end_material │ │ - [ 14b39] jpl-earth-sun │ │ - [ 14b47] mars-sun │ │ - [ 14b50] jpl-mercury-ssb │ │ - [ 14b60] vsop87-mercury │ │ - [ 14b6f] mercury-jpl │ │ - [ 14b7b] iau-prometheus │ │ - [ 14b8a] iau-ganymede │ │ - [ 14b97] earth-p03lp │ │ - [ 14ba3] ScriptedOrbit generator function returned bad value.\n │ │ - [ 14bd9] viewMat │ │ - [ 14be1] Crt │ │ - [ 14be5] Cru │ │ - [ 14be9] AbsMag │ │ - [ 14bf0] SC │ │ - [ 14bf3] SampledTrajectory │ │ - [ 14c05] EllipticalOrbit │ │ - [ 14c15] RotationOffset │ │ - [ 14c24] {}_vert.glsl │ │ - [ 14c31] /***************************************************\n │ │ - [ 14c67] diff │ │ - [ 14c6c] ringWidth │ │ - [ 14c76] #extension GL_ARB_shader_texture_lod : enable\n │ │ - [ 14ca5] shininess │ │ - [ 14caf] vec4 diff = vec4(ambientColor, opacity);\n │ │ - [ 14cd9] * │ │ - [ 14cdd] set_vp(vec4(position.xyz, 1.0));\n │ │ - [ 14cff] position = in_Position.xyz;\n │ │ - [ 14d20] v_TexCoord0.st = │ │ - [ 14d36] rayleighH │ │ - [ 14d40] sampler2D │ │ - [ 14d4a] Fragment shader source:\n │ │ - [ 14d63] shadow *= 1.0 - shadowR;\n │ │ - [ 14d7d] Oblateness │ │ - [ 14d88] Sunset │ │ - [ 14d8f] LunarLambert │ │ - [ 14d9c] OrbitBarycenter cycle detected │ │ - [ 14dbb] AbsMag ignored on Barycenter │ │ - [ 14dd8] Extinction │ │ - [ 14de3] Extinction ignored for stars close to the origin │ │ - [ 14e14] tex │ │ - [ 14e18] Error reading PNG image file {}\n │ │ - [ 14e39] Failed to read chunk type\n │ │ - [ 14e54] Chunk size {} too small to include header\n │ │ - [ 14e7f] Failed to read element {} of mesh matrix\n │ │ - [ 14ea9] Content size {} too small to include float color\n │ │ - [ 14edb] Processing IntPercentage chunk\n │ │ - [ 14efb] ()J │ │ - [ 14eff] zh_CN │ │ - [ 14f05] boolean │ │ - [ 14f0d] startTime │ │ - [ 14f17] flushTasks │ │ - [ 14f22] GL_ARB_shading_language_100 │ │ - [ 14f3e] Missing Huffman code table entry │ │ - [ 14f5f] Empty input file │ │ - [ 14f70] Scan script does not transmit all data │ │ - [ 14f97] End Of Image │ │ - [ 14fa4] RST%d │ │ - [ 14faa] Component %d: dc=%d ac=%d │ │ - [ 14fc8] Corrupt JPEG data: %u extraneous bytes before marker 0x%02x │ │ - [ 15004] adobe │ │ - [ 1500a] ItalicAngle │ │ - [ 15016] isFixedPitch │ │ - [ 15023] lenIV │ │ - [ 15029] %!PS-Adobe-3.0 Resource-CIDFont │ │ - [ 15049] FACE_NAME │ │ - [ 15053] QUAD_WIDTH │ │ - [ 1505e] SUPERSCRIPT_X │ │ - [ 1506f] � � │ │ - [ 15084] � │ │ - [ 15089] StartAxis │ │ - [ 15093] 0123456789abcdefpx │ │ - [ 150a6] if │ │ - [ 150a9] in │ │ - [ 150ac] ... │ │ - [ 150b0] union │ │ - [ 150b6] %s at line %d │ │ - [ 150c4] inconsistent rendering intents │ │ - [ 150e3] internal error handling cHRM->XYZ │ │ - [ 15105] inconsistent chromaticities │ │ - [ 15121] Missing PLTE before IDAT │ │ - [ 1513a] png_start_read_image/png_read_update_info: duplicate call │ │ - [ 15174] gray+alpha color-map: too few entries │ │ - [ 1519a] non-positive width │ │ - [ 151ad] bad height format │ │ - [ 151bf] Invalid sCAL width ignored │ │ - [ 151da] png_image_write_to_file: incorrect PNG_IMAGE_VERSION │ │ - [ 1520f] Writing zero-length unknown chunk │ │ - [ 15231] memory image too large │ │ - [ 15248] ICC profile too short │ │ - [ 1525e] tEXt: invalid keyword │ │ - [ 15274] deflateEnd failed (ignored) │ │ - [ 15290] erract_c │ │ - [ 15299] furnsh_c │ │ - [ 152a2] Invalid Endpoints--Left Endpoint Exceeds Right Endpoint │ │ - [ 152da] SPICE(DATATYPENOTRECOG) │ │ - [ 152f2] Invalid embedded blank was found in character string │ │ - [ 15327] SPICE(INVALIDCHECKOUT) │ │ - [ 1533e] Specification of Time String Format Was Not Recognized │ │ - [ 15375] Window Does Not Contain Interval Corresponding to the Supplied Index │ │ - [ 153ba] SPICE(UNITSNOTREC) │ │ - [ 153cd] Cardinality of Output Window is Too Small │ │ - [ 153f7] Input Vector is the Zero Vector │ │ - [ 15417] kdata_c │ │ - [ 1541f] PATH_SYMBOLS │ │ - [ 1542c] In meta-kernel <#>, the file name at index # in the KERNELS_TO_LOAD list has length # characters; the limit is # characters. │ │ - [ 154a9] DSK │ │ - [ 154ad] SPICE(CKBOGUSENTRY) │ │ - [ 154c1] invalid array section │ │ - [ 154d7] %s: %s\n │ │ - [ 154df] COPYI │ │ - [ 154e5] TABLE_LIST_FULL │ │ - [ 154f5] cnams │ │ - [ 154fb] The EK file # could not be loaded; the maximum number of columns havingdistinct attributes has already been reached. │ │ - [ 15570] ldrec │ │ - [ 15576] Attempt to update file record failed. File was '#'. Value of IOSTAT was '#'. │ │ - [ 155c4] SPICE(INVALIDHANDLE) │ │ - [ 155d9] dasa2l_ │ │ - [ 155e1] SPICE(DASNOSUCHADDRESS) │ │ - [ 155f9] DASWBR │ │ - [ 15600] EXPOOL │ │ - [ 15607] uvalue │ │ - [ 1560e] eqchr_ │ │ - [ 15615] typeid │ │ - [ 1561c] REPMOT │ │ - [ 15623] ONE │ │ - [ 15627] TWELFTH │ │ - [ 1562f] REPSUB error: LEFT (#) must not be less than 1. │ │ - [ 1565f] [ │ │ - [ 15661] SCLK │ │ - [ 15666] CKE05 │ │ - [ 1566c] yvals │ │ - [ 15672] , │ │ - [ 15674] frmchg_ │ │ - [ 1567c] dpjan0 │ │ - [ 15683] Epoch before │ │ - [ 15691] wc │ │ - [ 15694] The eccentricity supplied for a type 15 segment is negative. It must be non-negative. The value supplied to the type 15 evaluator was #. │ │ - [ 1571f] body-fixed frame │ │ - [ 15730] ; popped name is │ │ - [ 15742] JDTDT │ │ - [ 15748] Relational operator, *, is not recognized. │ │ - [ 15773] vhatg_ │ │ - [ 1577a] WRLINE: Maximum number of logical units that can be allocated by SPICELIB has already been reached │ │ - [ 157dd] no comma │ │ - [ 157e6] drdtrt │ │ - [ 157ed] The block size is not positive. The block size is #. │ │ - [ 15822] defcod │ │ - [ 15829] There is no room available for adding '#' to the list of name/code pairs. The number of names that can be supported is #. This number has been reached. │ │ - [ 158c4] zzdafgfr_ │ │ - [ 158ce] ZZDASGRD │ │ - [ 158d7] Attempt to open file, '$' for % access failed. IOSTAT was #. │ │ - [ 15914] Attempt to open file, '#', for write access has failed. This file utilizes an unknown binary file format. This error may result from attempting to open a corrupt file or one of an unknown type. │ │ - [ 159d8] ZZDDHRMU │ │ - [ 159e1] itmvec │ │ - [ 159e8] Definition of frame # specifies frame center # and obliquity model #. This obliquity model is not applicable to body #. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 15abf] coeffs │ │ - [ 15ac6] ZZDYNFID │ │ - [ 15acf] ? │ │ - [ 15ad3] SPICE(NOCLASS) │ │ - [ 15ae2] ZZEKIXLK │ │ - [ 15aeb] Number tables in first join row set was #; valid range is 1:# │ │ - [ 15b29] zzekjsqz_ │ │ - [ 15b33] Constraint index # is out of valid range 1:#. │ │ - [ 15b61] The relational operator # was not recognized or was not applicable for data type #. │ │ - [ 15bb5] IAU_TAYGETE │ │ - [ 15bc1] IAU_STEINS │ │ - [ 15bcc] MOON │ │ - [ 15bd1] ANANKE │ │ - [ 15bd8] METIS │ │ - [ 15bde] AUTONOE │ │ - [ 15be6] NEPTUNE │ │ - [ 15bee] P6 │ │ - [ 15bf1] MAGELLAN │ │ - [ 15bfa] LCROSS │ │ - [ 15c01] LUCY │ │ - [ 15c06] CHANDRAYAAN-1 │ │ - [ 15c14] TRMM │ │ - [ 15c19] EXM RSP SP │ │ - [ 15c24] GLL PROBE │ │ - [ 15c2e] CROMMELIN │ │ - [ 15c38] PONS-WINNECKE │ │ - [ 15c46] WIRTANEN │ │ - [ 15c4f] MUELLER 2 │ │ - [ 15c59] DAVIDA │ │ - [ 15c60] PARKES │ │ - [ 15c67] SPICE(NOSUCHFILE) │ │ - [ 15c79] ZZPRSCOR │ │ - [ 15c82] ZZREFCH1 │ │ - [ 15c8b] There is a quoted string with no characters on line # of the text kernel file '#'. │ │ - [ 15cdf] Encountered '#' while attempting to parse a time on line # of the text kernel file '#'. Error message: '#' │ │ - [ 15d4b] miY> │ │ - [ 15d50] imY │ │ - [ 15d54] Field count was not found for SCLK #. │ │ - [ 15d7a] The routine ZZSGP4 is an umbrella for the SGP4 initializer and propagator entry points. Do not call ZZSGP4. It is likely that a programming error has been made. │ │ - [ 15e1b] daytab │ │ - [ 15e22] The string supplied to specify the reference frame, ('#') contains non-printing characters. The two most common causes for this kind of error are: 1. an error in the call to ZZSPKGO0; 2. an uninitialized variable. │ │ - [ 15efa] ZZSWFINI │ │ - [ 15f03] FRAME_#_START │ │ - [ 15f11] SPICE(TOOMANYBASEFRAMES) │ │ - [ 15f2a] Start time kernel variable # exists but DTPOOL returned data type # rather than one of the expected values: 'C' or 'N'. │ │ - [ 15fa2] The Year may be abbreviated only if the year belongs to the Christian Era (A.D.) │ │ - [ 15ff4] The default value assigned to the time system must be one of 'UTC', 'TDT', 'TT', or 'TDB'. The value supplied was '#'. │ │ - [ 1606c] SPICE(OUTPUTTOOSHORT) │ │ - [ 16082] Day of Month │ │ - [ 1608f] An unexpected # ("#") was encountered in the time string: │ │ - [ 160ca] Two substrings indicating a day of year were identified in the input time string <#> and <#>: " │ │ - [ 1612a] A month was identified in the time string "#", but a day of month could not be identified. │ │ - [ 16186] Yiii:n │ │ - [ 1618d] YDm │ │ - [ 16191] i-Ydi:i │ │ - [ 16199] i:iimY │ │ - [ 161a0] iiYi:n │ │ - [ 161a7] i/i/Y/i:n │ │ - [ 161b1] Y*m*D*H*M* │ │ - [ 161bc] Y*y*H* │ │ - [ 161c3] angrt │ │ - [ 161c9] collation │ │ - [ 161d3] NH │ │ - [ 161d6] hsn │ │ - [ 161da] ar │ │ - [ 161dd] ary │ │ - [ 161e1] bas │ │ - [ 161e5] bo │ │ - [ 161e8] br │ │ - [ 161eb] ckb │ │ - [ 161ef] fo │ │ - [ 161f2] frr │ │ - [ 161f6] jrb │ │ - [ 161fa] kab │ │ - [ 161fe] kfo │ │ - [ 16202] kho │ │ - [ 16206] khq │ │ - [ 1620a] kmb │ │ - [ 1620e] lag │ │ - [ 16212] lfn │ │ - [ 16216] lij │ │ - [ 1621a] mdr │ │ - [ 1621e] nwc │ │ - [ 16222] pau │ │ - [ 16226] pfl │ │ - [ 1622a] sli │ │ - [ 1622e] tly │ │ - [ 16232] zap │ │ - [ 16236] zgh │ │ - [ 1623a] ces │ │ - [ 1623e] hin │ │ - [ 16242] nbl │ │ - [ 16246] BM │ │ - [ 16249] BW │ │ - [ 1624c] GA │ │ - [ 1624f] KE │ │ - [ 16252] MW │ │ - [ 16255] MX │ │ - [ 16258] PS │ │ - [ 1625b] RW │ │ - [ 1625e] SL │ │ - [ 16261] AGO │ │ - [ 16265] CAF │ │ - [ 16269] CRQ │ │ - [ 1626d] CRI │ │ - [ 16271] SGS │ │ - [ 16275] HND │ │ - [ 16279] IDN │ │ - [ 1627d] IRL │ │ - [ 16281] ISL │ │ - [ 16285] JEY │ │ - [ 16289] MLI │ │ - [ 1628d] QAT │ │ - [ 16291] SAU │ │ - [ 16295] SYR │ │ - [ 16299] fil_PH │ │ - [ 162a0] variant │ │ - [ 162a8] __system_property_get │ │ - [ 162be] YAKST │ │ - [ 162c4] Asia/Baku │ │ - [ 162ce] BST │ │ - [ 162d2] America/Scoresbysund │ │ - [ 162e7] Canada/Atlantic │ │ - [ 162f7] en_MH │ │ - [ 162fd] es_CO │ │ - [ 16303] mn_Cyrl │ │ - [ 1630b] qu_BO │ │ - [ 16311] tt_RU │ │ - [ 16317] yi_001 │ │ - [ 1631e] i-enochian │ │ - [ 16329] csn │ │ - [ 1632d] sgn-dk │ │ - [ 16334] sgn-ie │ │ - [ 1633b] psr │ │ - [ 1633f] ures_swap().udata_swapInvStringBlock(keys[%d]) failed\n │ │ - [ 16376] ures_swapResource(array res=%08x)[%d].recurse(%08x) failed\n │ │ - [ 163b2] ucol_swap(formatVersion=4): unknown data at IX_RESERVED10_OFFSET\n │ │ - [ 163f4] supplementalData │ │ - [ 16405] icudt75l-curr │ │ - [ 16413] U_MESSAGE_PARSE_ERROR │ │ - [ 16429] U_MF_UNSUPPORTED_EXPRESSION_ERROR │ │ - [ 1644b] AOK │ │ - [ 1644f] ARA │ │ - [ 16453] BGL │ │ - [ 16457] CNX │ │ - [ 1645b] IRR │ │ - [ 1645f] LUC │ │ - [ 16463] LYD │ │ - [ 16467] MVR │ │ - [ 1646b] OMR │ │ - [ 1646f] RSD │ │ - [ 16473] RUR │ │ - [ 16477] SKK │ │ - [ 1647b] SLL │ │ - [ 1647f] XFU │ │ - [ 16483] date │ │ - [ 16488] INFINITY │ │ - [ 16491] dunam │ │ - [ 16497] AYM │ │ - [ 1649b] CSJ │ │ - [ 1649f] ZWC │ │ - [ 164a3] dot-per-inch │ │ - [ 164b0] atmosphere │ │ - [ 164bb] acre-foot │ │ - [ 164c5] cubic-inch │ │ - [ 164d0] gallon-imperial │ │ - [ 164e0] tablespoon │ │ - [ 164eb] genitive │ │ - [ 164f4] few │ │ - [ 164f8] ronto │ │ - [ 164fe] Week │ │ - [ 16503] -short │ │ - [ 1650a] -narrow │ │ - [ 16512] grouping │ │ - [ 1651b] reset secondary-before secondary ignorable not possible │ │ - [ 16553] secondary tailoring gap too small │ │ - [ 16575] alternateQuotationStart │ │ - [ 1658d] ()F │ │ - [ 16591] Anti-aliasing disabled │ │ - [ 165a8] Auto-magnitude disabled │ │ - [ 165c0] Could not find locale, falling back to classic.\n │ │ - [ 165f1] format specifier requires numeric argument │ │ - [ 1661c] cannot switch from manual to automatic argument indexing │ │ - [ 16655] StarTextures │ │ - [ 16662] A │ │ - [ 16664] Distance │ │ - [ 1666d] km │ │ - [ 16670] base │ │ - [ 16675] Depth component: %s\n │ │ - [ 1668a] Max anisotropy filtering: %s\n │ │ - [ 166a8] F11 Start/Pause F12 Stop │ │ - [ 166c4] catalog^Ddeep sky │ │ - [ 166d5] star │ │ - [ 166da] 0.11.21 │ │ - [ 166e2] Buffer Size: %d*%d (%d)\n │ │ - [ 166ff] CHANNEL_SIDE_LEFT │ │ - [ 16711] Invalid file │ │ - [ 1671e] Memory already mapped │ │ - [ 16734] SL_IID_ANDROIDCONFIGURATION │ │ - [ 16750] [OpenSL] Cannot find symbol slCreateEngine. │ │ - [ 1677c] &ver= │ │ - [ 16782] oy │ │ - [ 16785] crimson │ │ - [ 1678d] cyan │ │ - [ 16792] darkslategray │ │ - [ 167a0] lime │ │ - [ 167a5] midnightblue │ │ - [ 167b2] orangered │ │ - [ 167bc] {}{} │ │ - [ 167c1] "/:<>?\| │ │ - [ 167ca] ecliptic │ │ - [ 167d3] insula │ │ - [ 167da] sulcus │ │ - [ 167e1] selectioncursor │ │ - [ 167f1] capture │ │ - [ 167f9] timerate │ │ - [ 16802] orbit │ │ - [ 16808] xrot │ │ - [ 1680d] render │ │ - [ 16814] requestkeyboard │ │ - [ 16824] findcategory │ │ - [ 16831] Bad method call! │ │ - [ 16842] fuzzy │ │ - [ 16848] screenshot-{}{:06i} │ │ - [ 1685c] mousedown │ │ - [ 16866] l │ │ - [ 16868] Internal Error: Invalid table entry in checkTimeslice │ │ - [ 1689e] Timeout: script hasn't returned control to celestia (forgot to call wait()?) │ │ - [ 168eb] to │ │ - [ 168ee] Position or rotation expected as second argument to frame:from() │ │ - [ 1692f] Frustum │ │ - [ 16937] argument 1 to gl.TexParameter must be a number │ │ - [ 16966] argument 2 to gl.TexParameter must be a number │ │ - [ 16995] argument 1 to gl.BlendFunc must be a number │ │ - [ 169c1] removereferencemark │ │ - [ 169d5] bodyframe │ │ - [ 169df] setatmosphere │ │ - [ 169ed] location │ │ - [ 169f6] dwarfplanet │ │ - [ 16a02] parent │ │ - [ 16a09] Argument to object:catalognumber must be a string │ │ - [ 16a3b] getframe │ │ - [ 16a44] makeactiveview │ │ - [ 16a53] timespan │ │ - [ 16a5c] Internal error: couldn't get metatable │ │ - [ 16a83] setaxisangle │ │ - [ 16a90] No arguments expected for vector:gety │ │ - [ 16ab6] Unknown error loading hook script │ │ - [ 16ad8] texcoord2 │ │ - [ 16ae2] linestrip │ │ - [ 16aec] diffuse {} {} {}\n │ │ - [ 16afe] normal\n │ │ - [ 16b06] mimas │ │ - [ 16b0c] jpl-earth-emb │ │ - [ 16b1a] jpl-pluto-ssb │ │ - [ 16b28] iau-phobos │ │ - [ 16b33] Unsupported byte order {}, expected {} in {}.\n │ │ - [ 16b62] tidalSize │ │ - [ 16b6c] scale │ │ - [ 16b72] largestar │ │ - [ 16b7c] Cnc │ │ - [ 16b80] PsA │ │ - [ 16b84] Sge │ │ - [ 16b88] .* │ │ - [ 16b8b] Open cluster │ │ - [ 16b98] Bad spice orbit\n │ │ - [ 16ba9] Missing coordinates for FixedPosition\n │ │ - [ 16bd0] RelativeVelocity │ │ - [ 16be1] vec3 ringShadowProj;\n │ │ - [ 16bf7] float NV = dot(N, eyeDir);\n │ │ - [ 16c13] vec3 H;\n │ │ - [ 16c1c] totalLight += l * │ │ - [ 16c2f] vec4 overlayColor = texture2D(overlayTex, overlayTexCoord.st);\n │ │ - [ 16c6f] scatterEx │ │ - [ 16c79] gl_FragColor.rgb = gl_FragColor.rgb * scatterEx + scatterColor;\n │ │ - [ 16cba] shadowCenter │ │ - [ 16cc7] mieK │ │ - [ 16ccc] pointFade = 1.0;\n │ │ - [ 16cde] line_strip │ │ - [ 16ce9] ReferencePoint │ │ - [ 16cf8] No valid orbit specified for object '{}'. Skipping.\n │ │ - [ 16d2d] Error: Beginning can only be specified for initial phase of timeline.\n │ │ - [ 16d74] Lower │ │ - [ 16d7a] Inner │ │ - [ 16d80] BumpHeight │ │ - [ 16d8b] III │ │ - [ 16d8f] Texture is ignored on Barycenters │ │ - [ 16db1] {}1 {} A │ │ - [ 16dba] ()D │ │ - [ 16dbe] (JI)V │ │ - [ 16dc4] ,\n │ │ - [ 16dc7] [\n │ │ - [ 16dca] No known providers. This is likely a bug in libepoxy code generation\n │ │ - [ 16e15] %s() not found: %s\n │ │ - [ 16e29] int epoxy_egl_version(EGLDisplay) │ │ - [ 16e4b] Too many color components: %d, max %d │ │ - [ 16e71] Bogus DAC index %d │ │ - [ 16e84] %3d %3d %3d %3d %3d %3d %3d %3d │ │ - [ 16eac] JFIF extension marker: type 0x%02x, length %u │ │ - [ 16eda] Corrupt JPEG data: premature end of data segment │ │ - [ 16f0b] Component index %d: mismatching sampling ratio %d:%d, %d:%d, %c │ │ - [ 16f4b] resource.frk/ │ │ - [ 16f59] /sfnts │ │ - [ 16f60] FDBytes │ │ - [ 16f68] pcf │ │ - [ 16f6c] IRV │ │ - [ 16f74] � │ │ - [ 16f7d] � │ │ - [ 16f85] � │ │ - [ 16f8a] raster1 │ │ - [ 16f92] svg-hooks │ │ - [ 16f9c] Version │ │ - [ 16fa4] WX │ │ - [ 16fa7] function │ │ - [ 16fb0] ^$*+?.([%- │ │ - [ 16fbb] global │ │ - [ 16fc2] stack traceback: │ │ - [ 16fd7] $^P^H^T^X^\^F^P^F^X^X^\ $(,^F^H^H^H^L │ │ - [ 16fed] -> │ │ - [ 16ff0] LUA_CPATH │ │ - [ 16ffa] short_src │ │ - [ 17004] isvararg │ │ - [ 1700d] activelines │ │ - [ 17019] exceeds application limits │ │ - [ 17034] MNG features are not allowed in a PNG datastream │ │ - [ 17065] Not recognizing known sRGB profile that has been edited │ │ - [ 1709d] bad encoding (internal error) │ │ - [ 170bb] unknown compression type │ │ - [ 170d4] insufficient memory to read chunk │ │ - [ 170f6] cHRM Blue X │ │ - [ 17102] image row stride too large │ │ - [ 1711d] Invalid sBIT depth specified │ │ - [ 1713a] card_c │ │ - [ 17141] SPICE(INVALIDACTION) │ │ - [ 17156] The Value in the Kernel File was Expected to be a date. │ │ - [ 1718e] An Invalid Function Argument was Supplied │ │ - [ 171b8] An Invalid Epoch Type Specification Was Supplied │ │ - [ 171e9] SPICE(NUMBEREXPECTED) │ │ - [ 171ff] SPICE(WRITEERROR) │ │ - [ 17211] files │ │ - [ 17217] DAFHOF │ │ - [ 1721e] SEQUENTIAL │ │ - [ 17229] variable count incorrect │ │ - [ 17242] can't read file │ │ - [ 17252] lately %s %s %s %s │ │ - [ 17265] IO │ │ - [ 17269] DAFRCR │ │ - [ 17270] ivals │ │ - [ 17276] SPICE(DASFTFULL) │ │ - [ 17287] nw │ │ - [ 1728a] The file type contains nonprinting characters. │ │ - [ 172ba] DASUFS │ │ - [ 172c1] SPICE(DASNOSUCHFILE) │ │ - [ 172d6] SPICE(DASINVALIDTYPE) │ │ - [ 172ec] poold │ │ - [ 172f2] Could not read DAS double precision record. File = # Record number = #. IOSTAT = #. │ │ - [ 17346] Could not write DAS character record. File = # Record number = #. IOSTAT = #. │ │ - [ 17397] NEW BODY │ │ - [ 173a0] writing a variable to the output kernel file │ │ - [ 173ce] This is never supposed to happen. The requested name, '#', was found in the name list, but the pointer to the head of the data for this variable is zero. Please note your activities and report this error to NAIF. │ │ - [ 174a5] LMPOOL │ │ - [ 174ac] ELEMC │ │ - [ 174b2] \begindata │ │ - [ 174bd] Invalid frame specification found in kernel pool: frame class keyword is # but associated frame name assignment was not found. │ │ - [ 1753c] BODC2N │ │ - [ 17543] BILLION │ │ - [ 1754b] del │ │ - [ 1754f] This segment reports that it has # meta data items. Every generic segment must have at least #. │ │ - [ 175af] xmeta │ │ - [ 175b5] XFR │ │ - [ 175b9] NIP │ │ - [ 175bd] ) │ │ - [ 175bf] SPICE(SPKINSUFFDATA) │ │ - [ 175d4] SPICE(NONPOSITIVEMASS) │ │ - [ 175eb] The periapsis and trajectory pole vectors are not orthogonal. The anglebetween them is # degrees. │ │ - [ 1764e] sb2rv │ │ - [ 17654] SPKE02 │ │ - [ 1765b] SPKE12 │ │ - [ 17662] SPKR02 │ │ - [ 17669] tsipm │ │ - [ 1766f] The variable # could not be found in the kernel pool. │ │ - [ 176a5] idents │ │ - [ 176ac] => │ │ - [ 176af] otherwise corrupted---or deleting previous │ │ - [ 176da] invalid integer │ │ - [ 176ea] no real part │ │ - [ 176f7] A subsystem state counter overflowed. For this to happen there must be a SPICE bug or you must have been running your SPICE-based application for a very long time. Please contact NAIF.and report the circumstances under which this happened. │ │ - [ 177e7] File '#' already loaded. │ │ - [ 17800] ftmnm │ │ - [ 17806] Attempt to reconnect logical unit to file '#' failed. IOSTAT was #. │ │ - [ 1784a] ZZDDHINI │ │ - [ 17853] ZZDDHGTU │ │ - [ 1785c] zzddhnfc_ │ │ - [ 17866] Unable to determine the binary file format of DAF '#'. │ │ - [ 1789d] ZZDSKSNS ran out of segment table room while trying to append to the tail of the segment list for body #. Current state is ADD TO END. │ │ - [ 17924] ZZDSKCHK │ │ - [ 1792d] itmfrm │ │ - [ 17934] TARGET │ │ - [ 1793b] LATITUDE │ │ - [ 17944] Definition of frame # specifies frame center # and nutation model #. This nutation model is not applicable to body #. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 17a19] FROM_FRAMES │ │ - [ 17a25] The kernel variable # used to define frame # is assigned the character value #. This value was expected to be a reference frame name, but NAMFRM cannot translate this name to a frame ID code. │ │ - [ 17ae6] SPICE(BADAXISLENGTH) │ │ - [ 17afb] zzdynrot_ │ │ - [ 17b05] SPICE(BADSUBSTRINGBOUNDS) │ │ - [ 17b1f] ZZEKJOIN │ │ - [ 17b28] rsdsc │ │ - [ 17b2e] ZZEKQSEL │ │ - [ 17b37] ZZEKPGAL │ │ - [ 17b40] Attempt to free non-existent CHR page. Page number = #; valid range is 1:# │ │ - [ 17b8b] Statistic # is not supported. │ │ - [ 17ba9] ZZEKVCAL │ │ - [ 17bb2] ZZEKVMCH │ │ - [ 17bbb] EK = #; COLIDX = #; ROW = #; ELTIDX = #. Column entry element was not found. │ │ - [ 17c0b] IAU_JUPITER_BARYCENTER │ │ - [ 17c22] IAU_BORRELLY │ │ - [ 17c2f] MARS_BARYCENTER │ │ - [ 17c3f] SINOPE │ │ - [ 17c46] CARPO │ │ - [ 17c4c] DAPHNIS │ │ - [ 17c54] ANTHE │ │ - [ 17c5a] CORDELIA │ │ - [ 17c63] CALIBAN │ │ - [ 17c6b] FERDINAND │ │ - [ 17c75] BEPICOLOMBO MMO │ │ - [ 17c85] SIRTF │ │ - [ 17c8b] MPL │ │ - [ 17c8f] EXM SPACECRAFT COMPOSITE │ │ - [ 17ca8] EXOMARS SP │ │ - [ 17cb3] CLUSTER 3 │ │ - [ 17cbd] SHOEMAKER-LEVY 9-W │ │ - [ 17cd0] CLARK │ │ - [ 17cd6] GEHRELS 3 │ │ - [ 17ce0] KOPFF │ │ - [ 17ce6] TUTTLE │ │ - [ 17ced] WILSON-HARRINGTON │ │ - [ 17cff] POLYMELE │ │ - [ 17d08] zzmsxf_ │ │ - [ 17d10] ZZSHSH │ │ - [ 17d17] SPICE(BADVARASSIGN) │ │ - [ 17d2b] Oi │ │ - [ 17d2e] yY* │ │ - [ 17d32] Ydi │ │ - [ 17d36] zzrvbf_ │ │ - [ 17d3e] There is a non-printing character embedded in line # of the text buffer. Non-printing characters are not allowed in kernel variable assignments. The non-printing character has ASCII code #. │ │ - [ 17dff] The kernel variable # has been set up as a numeric or time variable. However, the value that you are attempting to assign to this variable on line # of the kernel buffer is not a numeric or time value. │ │ - [ 17ecb] SPICE(TOOMANYCOEFFS) │ │ - [ 17ee0] SPICE(KERNELVARTOOLARGE) │ │ - [ 17ef9] SCLI01 │ │ - [ 17f00] JDUTC │ │ - [ 17f06] ZZSPKGO1 │ │ - [ 17f0f] Target range rate magnitude is approximately the speed of light. The light time derivative cannot be computed. │ │ - [ 17f7e] tvec │ │ - [ 17f83] The input time string '#' cannot be processed because it contains more than @ recognizable tokens. The token that could not be processed was '#'. │ │ - [ 18015] CDT │ │ - [ 18019] Yidi:i:n │ │ - [ 18022] Yimi │ │ - [ 18027] i-i-iti:i:n │ │ - [ 18033] i-idi:i:i │ │ - [ 1803d] H*M*SmDY │ │ - [ 18046] iiY │ │ - [ 1804a] iiYn │ │ - [ 1804f] iimi │ │ - [ 18054] DmH*M*SY │ │ - [ 1805d] imiiin │ │ - [ 18064] miYi:i:n │ │ - [ 1806d] mii:i:nY │ │ - [ 18076] Y-i-iti │ │ - [ 1807e] i:i:ni/i/i │ │ - [ 18089] i:ii/i/Y │ │ - [ 18092] ZZXLATED │ │ - [ 1809b] FX │ │ - [ 1809e] art__LOJBAN │ │ - [ 180aa] ach │ │ - [ 180ae] dar │ │ - [ 180b2] de │ │ - [ 180b5] krj │ │ - [ 180b9] ltg │ │ - [ 180bd] lua │ │ - [ 180c1] luo │ │ - [ 180c5] mfe │ │ - [ 180c9] nyo │ │ - [ 180cd] rn │ │ - [ 180d0] sd │ │ - [ 180d3] cre │ │ - [ 180d7] eng │ │ - [ 180db] gla │ │ - [ 180df] ibo │ │ - [ 180e3] cor │ │ - [ 180e7] ori │ │ - [ 180eb] tel │ │ - [ 180ef] twi │ │ - [ 180f3] AW │ │ - [ 180f6] JE │ │ - [ 180f9] KI │ │ - [ 180fc] TW │ │ - [ 180ff] UG │ │ - [ 18102] AFG │ │ - [ 18106] ASM │ │ - [ 1810a] ERI │ │ - [ 1810e] GHA │ │ - [ 18112] GNQ │ │ - [ 18116] ISR │ │ - [ 1811a] da_DK │ │ - [ 18120] kk_KZ │ │ - [ 18126] ro_RO │ │ - [ 1812c] tk_TM │ │ - [ 18132] PETST │ │ - [ 18138] ULAT │ │ - [ 1813d] languageAliases │ │ - [ 1814d] en_ID │ │ - [ 18153] en_IN │ │ - [ 18159] es_CU │ │ - [ 1815f] es_EC │ │ - [ 18165] fr_MA │ │ - [ 1816b] la_001 │ │ - [ 18172] mn_Mong │ │ - [ 1817a] ures_swap(): resource top %d exceeds bundle length %d\n │ │ - [ 181b1] ures_swap(): unable to allocate memory for tracking resources\n │ │ - [ 181f0] ucol_strcollIter │ │ - [ 18201] night2 │ │ - [ 18208] indian │ │ - [ 1820f] Countries │ │ - [ 18219] parseRegions │ │ - [ 18226] {0}, {1} │ │ - [ 1822f] other number │ │ - [ 1823c] U_STRING_NOT_TERMINATED_WARNING │ │ - [ 1825c] U_TRAILING_BACKSLASH │ │ - [ 18271] U_INVALID_RBT_SYNTAX │ │ - [ 18286] AUD │ │ - [ 1828a] BAM │ │ - [ 1828e] CLE │ │ - [ 18292] KHR │ │ - [ 18296] MGA │ │ - [ 1829a] MTL │ │ - [ 1829e] RHD │ │ - [ 182a2] SOS │ │ - [ 182a6] SYP │ │ - [ 182aa] scientificFormat │ │ - [ 182bb] M02L │ │ - [ 182c0] milligram-ofglucose-per-deciliter │ │ - [ 182e2] liter-per-100-kilometer │ │ - [ 182fa] GNE │ │ - [ 182fe] petabyte │ │ - [ 18307] day-person │ │ - [ 18312] kilowatt-hour │ │ - [ 18320] earth-mass │ │ - [ 1832b] pinch │ │ - [ 18331] pow10- │ │ - [ 18338] compound │ │ - [ 18341] unit-narrow │ │ - [ 1834d] /decimalFormat │ │ - [ 1835c] yes │ │ - [ 18360] ucadata │ │ - [ 18368] reset position maps to too many collation elements (more than 31) │ │ - [ 183aa] LDML forbids tailoring to U+FFFF │ │ - [ 183cb] lb_to_kg │ │ - [ 183d4] speed_of_light_meters_per_second │ │ - [ 183f5] AChoreographerFrameCallbackData_getPreferredFrameTimelineIndex │ │ - [ 18434] mPipelineModeAutoMode │ │ - [ 1844a] Swappy: GPU frame time │ │ - [ 18461] View too small to be split │ │ - [ 1847c] cannot switch from automatic to manual argument indexing │ │ - [ 184b5] {} must be an array of strings.\n │ │ - [ 184d6] Target │ │ - [ 184dd] Error parsing favorites file.\n │ │ - [ 184fc] Point size granularity: %s\n │ │ - [ 18518] {}\n │ │ - [ 18520] inf │ │ - [ 18524] Time stopped │ │ - [ 18534] CHANNEL_TOP_BACK_LEFT │ │ - [ 1854a] Too large │ │ - [ 18554] NULL Playback Device │ │ - [ 18569] Failed to retrieve data buffer connector. Unknown data supply type.\n │ │ - [ 185ae] ICMT │ │ - [ 185b3] ^I │ │ - [ 185b6] URL must have at least mode and time!\n │ │ - [ 185dd] tsrc │ │ - [ 185e2] failed to format time │ │ - [ 185f8] Jul │ │ - [ 185fc] text │ │ - [ 18601] azure │ │ - [ 18607] cadetblue │ │ - [ 18611] cornsilk │ │ - [ 1861a] gray │ │ - [ 1861f] maroon │ │ - [ 18626] .png │ │ - [ 1862b] .ctx │ │ - [ 18630] XI │ │ - [ 18633] TAU │ │ - [ 18641] Comet │ │ - [ 18647] regio │ │ - [ 1864d] synchronous │ │ - [ 18659] filename │ │ - [ 18662] longitude │ │ - [ 1866c] downarrow │ │ - [ 18676] row │ │ - [ 1867a] xoffset │ │ - [ 18682] colorbottom │ │ - [ 1868e] createchild │ │ - [ 1869a] getlinecolor │ │ - [ 186a7] getfaintestvisible │ │ - [ 186ba] getsystemtime │ │ - [ 186c8] No arguments expected for celestia:getrenderflags() │ │ - [ 186fc] One argument expected for celestia:setfaintestvisible() │ │ - [ 18734] Argument to celestia:setstarstyle must be a string │ │ - [ 18767] First argument to celestia:seturl must be a string │ │ - [ 1879a] Function celestia:seekaudio requires two arguments │ │ - [ 187cd] mouseup │ │ - [ 187d5] Oops, expected savedrenderflags to be userdata\n │ │ - [ 18805] class_phase │ │ - [ 18811] No arguments expected for frame:getcoordinatesystem() │ │ - [ 18847] Begin │ │ - [ 1884d] TEXTURE_MIN_FILTER │ │ - [ 18860] argument 4 to gl.Frustum must be a number │ │ - [ 1888a] argument 1 to gl.Vertex must be a number │ │ - [ 188b3] catalognumber │ │ - [ 188c1] globular │ │ - [ 188ca] First arg to observer:gotoobject must be object or position │ │ - [ 18906] Second arg to observer:gotodistance must be a number │ │ - [ 1893b] Argument to observer:setpos must be a rotation │ │ - [ 1896a] One argument expected to observer:getsurface() │ │ - [ 18999] Bad vector addition! │ │ - [ 189ae] Need two operands for sub │ │ - [ 189c8] hook thread failed\n │ │ - [ 189dc] emissivemap │ │ - [ 189e8] texcoord2 │ │ - [ 189f3] ganymede │ │ - [ 189fc] iapetus │ │ - [ 18a04] iau-mars │ │ - [ 18a0d] iau-jupiter │ │ - [ 18a19] colorTex │ │ - [ 18a22] Error parsing asterism {} chain: expected string\n │ │ - [ 18a54] Aql │ │ - [ 18a58] Cae │ │ - [ 18a5c] RA │ │ - [ 18a5f] GL_OES_vertex_array_object │ │ - [ 18a7a] AMD │ │ - [ 18a7e] SU │ │ - [ 18a81] RotationPeriod │ │ - [ 18a90] PrecessionPeriod │ │ - [ 18aa1] AU │ │ - [ 18aa4] GLSL │ │ - [ 18aaa] usesShadows = {}\n │ │ + [ 113ec] SCPR01 │ │ + [ 113f3] words │ │ + [ 113f9] MSGSEL: An invalid error message type was supplied as input; the type specifiedwas: │ │ + [ 11450] Input file # has architecture #. The file must be a binary SPK file to be readable by this routine. Binary SPK files have DAF architecture. If you expected the file to be a binary SPK file, the problem may be due to the file being an old non-native file lacking binary file format information. It's also possible the file has been corrupted. │ │ + [ 115a8] GETFAT │ │ + [ 115af] The mass supplied for the central body of a type 15 segment was non-positive. Masses must be positive. The value supplied was #. │ │ + [ 11632] The eccentricity supplied for a type 17 segment is greater than 0.9. It must be less than 0.9.The value supplied to the type 17 evaluator was #. │ │ + [ 116c5] The semi-major axis supplied to EQNCPV was non-positive. The value is required to be positive by this routine. The value supplied was #. │ │ + [ 1174f] PCK data required to compute the orientation of the # # for epoch # TDB were not found. If these data were to be provided by a binary PCK file, then it is possible that the PCK file does not have coverage for the specified body-fixed frame at the time of interest. If the data were to be provided by a text PCK file, then possibly the file does not contain data for the specified body-fixed frame. In either case it is possible that a required PCK file was not loaded at all. │ │ + [ 1192b] MAX_PHASE_DEGREE │ │ + [ 1193c] dtipm │ │ + [ 11942] N0067 │ │ + [ 11948] marker or final newline character, or is │ │ + [ 11972] Left endpoint was *. Right endpoint was *. │ │ + [ 1199d] IOSTAT = │ │ + [ 119a7] CLLINE: File = │ │ + [ 119b8] w_ed, unexpected code: %d\n │ │ + [ 119d3] defnam │ │ + [ 119da] An attempt to assign the code, #, to a blank string was made. Check loaded text kernels for a blank string in the NAIF_BODY_NAME array. │ │ + [ 11a63] ZZDAFGSR │ │ + [ 11a6c] The attempt to load file, '#', with access method, '#', failed because this access method is unsupported. │ │ + [ 11ad6] strarc │ │ + [ 11add] Definition of frame # contains # specification #. The only valid rotation states are # or #. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 11b98] NONE │ │ + [ 11b9d] ddat │ │ + [ 11ba2] N_D_ALLOC │ │ + [ 11bac] ZZEKSZ05 │ │ + [ 11bb5] IAU_DEIMOS │ │ + [ 11bc0] IAU_OPHELIA │ │ + [ 11bcc] LONGEST LIST SIZE │ │ + [ 11bde] MAB │ │ + [ 11be2] MEX │ │ + [ 11be6] JUNO │ │ + [ 11beb] NEAR EARTH ASTEROID RENDEZVOUS │ │ + [ 11c0a] DIXI │ │ + [ 11c0f] CH2L │ │ + [ 11c14] MAP │ │ + [ 11c18] DAWN │ │ + [ 11c1d] RBSP_A │ │ + [ 11c24] MARS-96 │ │ + [ 11c2c] SHOEMAKER-LEVY 9-N │ │ + [ 11c3f] SHOEMAKER-LEVY 9-B │ │ + [ 11c52] FAYE │ │ + [ 11c57] GICLAS │ │ + [ 11c5e] SCHUSTER │ │ + [ 11c67] TRITTON │ │ + [ 11c6f] HELIN-ROMAN-ALU 1 │ │ + [ 11c81] MATHILDE │ │ + [ 11c8a] MADRID │ │ + [ 11c91] DSS-17 │ │ + [ 11c98] # is a CK frame; a CK file containing data for instrument or structure # at the epoch shown above, as well as a corresponding SCLK kernel, must be loaded in order to use this frame. │ │ + [ 11d4e] │ │ + [ 11d6f] zzplatfm_ │ │ + [ 11d79] ZZPLTCHK │ │ + [ 11d82] zzrefch0_ │ │ + [ 11d8c] [w] │ │ + [ 11d90] Dm │ │ + [ 11d93] The type of the time vector specified was #, only 'YD' and 'YMD' are recognized. │ │ + [ 11de5] SPICE(BADKERNELVARTYPE) │ │ + [ 11dfd] Offset count # does not match field count # for SCLK #. │ │ + [ 11e35] SPICE(BADPECCENTRICITY) │ │ + [ 11e4d] Semi-latus rectum less-than zero. │ │ + [ 11e6f] zzspkgp0_ │ │ + [ 11e79] Interval time bounds are not strictly increasing at interval index # for switch frame #. Time bounds are #:# TDB (# TDB : # TDB) │ │ + [ 11efa] White Space │ │ + [ 11f06] Month │ │ + [ 11f0c] recog │ │ + [ 11f12] UTC- │ │ + [ 11f17] Two substrings indicating a calendar year were identified in the input time string <#> and <#>: " │ │ + [ 11f79] Both a day of year and month were identified in the input string. " │ │ + [ 11fbd] ############## │ │ + [ 11fcc] Y*m*D*H*M │ │ + [ 11fd6] Y-idi:i │ │ + [ 11fde] Y-idi:n │ │ + [ 11fe6] i-Y/i:i:n │ │ + [ 11ff0] i-i/i:i │ │ + [ 11ff8] miii:n │ │ + [ 11fff] i-i-Yi:i:i │ │ + [ 1200a] Y-itx │ │ + [ 12010] The direction vectors associated with states AXDEF and PLNDEF are linearly dependent. │ │ + [ 12066] hy__AREVMDA │ │ + [ 12072] aa │ │ + [ 12075] blo │ │ + [ 12079] dsb │ │ + [ 1207d] gn │ │ + [ 12080] grb │ │ + [ 12084] hai │ │ + [ 12088] ho │ │ + [ 1208b] ksf │ │ + [ 1208f] ku │ │ + [ 12092] lam │ │ + [ 12096] ml │ │ + [ 12099] pap │ │ + [ 1209d] tli │ │ + [ 120a1] zbl │ │ + [ 120a5] cos │ │ + [ 120a9] fra │ │ + [ 120ad] jpn │ │ + [ 120b1] nau │ │ + [ 120b5] oci │ │ + [ 120b9] oji │ │ + [ 120bd] sna │ │ + [ 120c1] sun │ │ + [ 120c5] DM │ │ + [ 120c8] GF │ │ + [ 120cb] GU │ │ + [ 120ce] LV │ │ + [ 120d1] PT │ │ + [ 120d4] SB │ │ + [ 120d7] TM │ │ + [ 120da] ZM │ │ + [ 120dd] ATG │ │ + [ 120e1] CAN │ │ + [ 120e5] FRA │ │ + [ 120e9] GRC │ │ + [ 120ed] MKD │ │ + [ 120f1] MYS │ │ + [ 120f5] PCN │ │ + [ 120f9] SVN │ │ + [ 120fd] cs_CZ │ │ + [ 12103] pl_PL │ │ + [ 12109] ur_PK │ │ + [ 1210f] MST7MDT │ │ + [ 12117] AST │ │ + [ 1211b] Chile/EasterIsland │ │ + [ 1212e] America/Guatemala │ │ + [ 12140] ar_KW │ │ + [ 12146] en_MP │ │ + [ 1214c] fr_CI │ │ + [ 12152] haw_US │ │ + [ 12159] om_ET │ │ + [ 1215f] sd_Arab │ │ + [ 12167] ti_ER │ │ + [ 1216d] sgn-mx │ │ + [ 12174] ures_swap(): too few bytes (%d after header) for a resource bundle\n │ │ + [ 121b8] ures_swap().swapArray16(16-bit units[%d]) failed\n │ │ + [ 121ea] windowsZones │ │ + [ 121f7] weekData │ │ + [ 12200] calendarPreferenceData │ │ + [ 12217] M02 │ │ + [ 1221b] mapTimezones │ │ + [ 12228] icudt75l-zone │ │ + [ 12236] pattern │ │ + [ 1223e] line separator │ │ + [ 1224d] U_UNSUPPORTED_ERROR │ │ + [ 12261] U_NO_SPACE_AVAILABLE │ │ + [ 12276] U_UNTERMINATED_QUOTE │ │ + [ 1228b] U_ILLEGAL_PAD_POSITION │ │ + [ 122a2] U_ARGUMENT_TYPE_MISMATCH │ │ + [ 122bb] U_BRK_VARIABLE_REDFINITION │ │ + [ 122d6] U_BRK_MISMATCHED_PAREN │ │ + [ 122ed] U_BRK_UNDEFINED_VARIABLE │ │ + [ 12306] U_REGEX_LOOK_BEHIND_LIMIT │ │ + [ 12320] U_IDNA_LABEL_TOO_LONG_ERROR │ │ + [ 1233c] exceptions │ │ + [ 12347] BOV │ │ + [ 1234b] BWP │ │ + [ 1234f] CSK │ │ + [ 12353] ECV │ │ + [ 12357] ESB │ │ + [ 1235b] LBP │ │ + [ 1235f] LUL │ │ + [ 12363] SIT │ │ + [ 12367] XBB │ │ + [ 1236b] XEU │ │ + [ 1236f] XSU │ │ + [ 12373] Division by zero │ │ + [ 12384] Insufficient storage │ │ + [ 12399] calendarData │ │ + [ 123a6] @calendar=coptic │ │ + [ 123b7] concentr │ │ + [ 123c0] consumption │ │ + [ 123cc] revolution │ │ + [ 123d7] square-mile │ │ + [ 123e3] liter-per-kilometer │ │ + [ 123f7] kilobit │ │ + [ 123ff] kilojoule │ │ + [ 12409] milligram │ │ + [ 12413] beaufort │ │ + [ 1241c] micro │ │ + [ 12422] nano │ │ + [ 12427] or-short │ │ + [ 12430] cldrVersion │ │ + [ 1243c] tsubo_to_m2 │ │ + [ 12448] dalvik/system/InMemoryDexClassLoader │ │ + [ 1246d] android/view/Display │ │ + [ 12482] MODEL │ │ + [ 12488] unique_lock::lock: references null mutex │ │ + [ 124b1] Comet tails disabled │ │ + [ 124c6] Time: Backward │ │ + [ 124d5] ltr │ │ + [ 124d9] inverting crosshair │ │ + [ 124ed] MeasurementSystem │ │ + [ 124ff] RayBasedDragging │ │ + [ 12510] OrbitPeriodsShown │ │ + [ 12522] false\n │ │ + [ 1252a] selection " │ │ + [ 12536] LT │ │ + [ 1253b] Chase %s\n │ │ + [ 12545] Density: {} lb/ft�\n │ │ + [ 1255a] Loading symbol: %s\n │ │ + [ 1256e] Capture Device │ │ + [ 1257d] Attempting to initialize %s backend...\n │ │ + [ 125a5] Failed to initialize %s backend.\n │ │ + [ 125c7] Channel Routing: %s\n │ │ + [ 125e9] CHANNEL_AUX_4 │ │ + [ 125f7] Out of memory │ │ + [ 12605] Failed to initialize backend │ │ + [ 12622] [AAudio] Device Disconnected. Failed to post job for rerouting.\n │ │ + [ 12663] AAudioStreamBuilder_setFormat │ │ + [ 12681] AAudioStream_getState │ │ + [ 12697] [OpenSL] Failed to stop internal playback device. │ │ + [ 126c9] labl │ │ + [ 126ce] note │ │ + [ 126d3] darksalmon │ │ + [ 126de] darkturquoise │ │ + [ 126ec] mediumaquamarine │ │ + [ 12703] cloudmaps │ │ + [ 1270d] facula │ │ + [ 12714] gotoloc │ │ + [ 1271c] setwindowbordersvisible │ │ + [ 12734] unmark │ │ + [ 1273b] unmarkall │ │ + [ 12745] view │ │ + [ 1274a] User data expected │ │ + [ 1275d] showconstellations │ │ + [ 12770] hideconstellations │ │ + [ 12783] setoverlayelements │ │ + [ 12796] getstarstyle │ │ + [ 127a3] tojulianday │ │ + [ 127af] getstar │ │ + [ 127b7] newcategory │ │ + [ 127c3] Third argument to celestia:print must be a number │ │ + [ 127f5] Argument to celestia:getlabelcolor() must be a string │ │ + [ 1282b] setlinecolor: color values must be numbers │ │ + [ 12856] Values in table-argument to celestia:setoverlayelements() must be boolean │ │ + [ 128a0] One argument expected for celestia:setgalaxylightgain() │ │ + [ 128d8] One argument expected for celestia:select() │ │ + [ 12904] No argument expected to function celestia:ispaused │ │ + [ 12937] No argument expected to function celestia:istimesynchronized │ │ + [ 12974] No argument expected to function celestia:gettimescale │ │ + [ 129ab] Second arg to celestia:settimescale must be a number │ │ + [ 129e0] No argument expected in celestia:getstarstyle │ │ + [ 12a0e] Argument to celestia:setstarcolor must be a string │ │ + [ 12a41] Fourth argument to celestia:overlay must be a number (alpha) │ │ + [ 12a7e] Second argument to celestia:play must be a number (volume) │ │ + [ 12ab9] edgeclamp │ │ + [ 12ac3] string │ │ + [ 12aca] Error: LuaState invalid in Celx_SafeGetNumber\n │ │ + [ 12af9] class_matrix │ │ + [ 12b06] class_rotation │ │ + [ 12b15] Color │ │ + [ 12b1b] Translate │ │ + [ 12b25] One argument expected for gl.LineWidth() │ │ + [ 12b4e] No arguments expected for font:unbind() │ │ + [ 12b76] Error while parsing CEL-script. │ │ + [ 12b96] First argument to object:setorbitvisibility() must be a string │ │ + [ 12bd5] Unknown visibility policy: {}\n │ │ + [ 12bf4] invisible │ │ + [ 12bfe] stellarClass │ │ + [ 12c0b] absoluteMagnitude │ │ + [ 12c1d] hasRings │ │ + [ 12c26] Time expected as argument to object:getphase │ │ + [ 12c53] setfov │ │ + [ 12c5a] accelTime │ │ + [ 12c64] Bad observer object (maybe tried to access a deleted view?)! │ │ + [ 12ca1] Argument for observer:orbit must be a rotation │ │ + [ 12cd0] Bad phase object during garbage collection! │ │ + [ 12cfc] Bad phase object! │ │ + [ 12d0e] second argument to rotation:setaxisangle must be a number │ │ + [ 12d48] normalize │ │ + [ 12d52] emissive │ │ + [ 12d5b] trilist │ │ + [ 12d63] texcoord1 │ │ + [ 12d6e] jpl-sun-ssb │ │ + [ 12d7a] miranda │ │ + [ 12d82] iau-titan │ │ + [ 12d8c] Failed to load module for ScriptedOrbit: {}\n │ │ + [ 12db9] ScriptedRotation generator function returned bad value.\n │ │ + [ 12df2] %ld │ │ + [ 12df7] Loaded SPK file {}\n │ │ + [ 12e0b] spk │ │ + [ 12e0f] pixelWeight │ │ + [ 12e1b] Error parsing asterism {} chain: expected array\n │ │ + [ 12e4c] Aur │ │ + [ 12e50] Cyg │ │ + [ 12e54] Sco │ │ + [ 12e58] Error parsing deep sky catalog entry {}\n │ │ + [ 12e81] Galaxy (Hubble type: %s) │ │ + [ 12e9a] models/SBa.png │ │ + [ 12ea9] s │ │ + [ 12eab] NoiseOffset │ │ + [ 12eb7] Could not find custom rotation model named '{}'\n │ │ + [ 12ee8] FixedAttitude │ │ + [ 12ef6] FixedPosition planetographic coordinates are not valid for stars.\n │ │ + [ 12f39] MeridianAngle │ │ + [ 12f47] Object has incorrect topocentric frame syntax.\n │ │ + [ 12f77] Bad two-vector frame: vector has invalid axis label.\n │ │ + [ 12fad] rE │ │ + [ 12fb0] tangent = in_Tangent;\n │ │ + [ 12fc7] );\n │ │ + [ 12fcb] shadowMaxDepth │ │ + [ 12fda] l = mix(NL, (NL / (max(NV, 0.001) + NL)), lunarLambert) * clamp( │ │ + [ 1301b] color.rgb = mix(color.rgb, overlayColor.rgb, overlayColor.a);\n │ │ + [ 1305a] gl_FragColor = color * diff + spec;\n │ │ + [ 1307f] .st) * totalLight;\n │ │ + [ 13093] opticalDepth │ │ + [ 130a0] ringShadowTexCoordX = │ │ + [ 130b7] triangles │ │ + [ 130c1] Invalid SemiAxes value for object {}: [{}, {}, {}]\n │ │ + [ 130f5] Mie │ │ + [ 130f9] CloudNormalMap │ │ + [ 13108] OverlayTexture │ │ + [ 13117] LabelColor │ │ + [ 13122] Ia │ │ + [ 13125] unrecognized object type │ │ + [ 1313e] Content size {} too small to include face array count\n │ │ + [ 13175] (DDD)V │ │ + [ 1317c] (Ljava/lang/Object;)Z │ │ + [ 13192] Locations │ │ + [ 1319c] ],\n │ │ + [ 131a0] occulter │ │ + [ 131a9] receiver │ │ + [ 131b2] (I)Z │ │ + [ 131b7] LC_COLLATE │ │ + [ 131c2] Bogus virtual array access │ │ + [ 131dd] Memory limit exceeded │ │ + [ 131f3] Not a JPEG file: starts with 0x%02x 0x%02x │ │ + [ 1321e] ._ │ │ + [ 13221] .AppleDouble/ │ │ + [ 1322f] multi-masters │ │ + [ 1323d] BlueFuzz │ │ + [ 13246] MinFeature │ │ + [ 13251] StrokeWidth │ │ + [ 1325d] BlendAxisTypes │ │ + [ 1326c] XUID │ │ + [ 13271] Bold Italic │ │ + [ 1327d] ADD_STYLE_NAME │ │ + [ 1328c] AVG_CAPITAL_WIDTH │ │ + [ 1329e] DEFAULT_CHAR │ │ + [ 132ab] RAW_CAP_HEIGHT │ │ + [ 132bd] � │ │ + [ 132c2] StartKernPairs │ │ + [ 132d1] upval │ │ + [ 132d7] k │ │ + [ 132d9] && │ │ + [ 132dc] luaopen_%s │ │ + [ 132e7] external hook │ │ + [ 132f6] 32bit^Cfpu^Fsoftfp^Deabi^Ble │ │ + [ 1330f] png_image_begin_read_from_file: invalid argument │ │ + [ 13340] missing IHDR │ │ + [ 1334d] hIST must be after │ │ + [ 13360] too many profiles │ │ + [ 13372] iCCP: invalid keyword │ │ + [ 13388] SPICE(INVALIDSIZE) │ │ + [ 1339b] SPICE(INVALIDCLUSTERNUM) │ │ + [ 133b4] SPICE(INVALIDOPTION) │ │ + [ 133c9] SPICE(PATHTOOLONG) │ │ + [ 133dc] itbeg │ │ + [ 133e2] ithfs │ │ + [ 133e8] Number of files loaded is at a maximum, as specified by the parameter FTSIZE, the value of which is #. You will need to either load fewer files, or change the parameter FTSIZE. │ │ + [ 13499] SPICE(NOLOADEDFILES) │ │ + [ 134ae] NI was #, should be in range [2,#]. │ │ + [ 134d2] internal │ │ + [ 134db] No record, word for address #. │ │ + [ 134fa] DAFBFS │ │ + [ 13501] DAFFNA │ │ + [ 13508] Character record write failed. Value of IOSTAT was # │ │ + [ 1353d] stncol │ │ + [ 13544] EKCCNT │ │ + [ 1354b] sizes │ │ + [ 13551] The number of comment records allocated must be non-negative but was #. │ │ + [ 13599] lastrc │ │ + [ 135a0] SPICE(DASNOSUCHHANDLE) │ │ + [ 135b7] rcbufd │ │ + [ 135be] SPICE(INVALIDNODE) │ │ + [ 135d1] r+b │ │ + [ 135d5] malloc failure │ │ + [ 135e4] btchkp │ │ + [ 135eb] pckbsr_ │ │ + [ 135f3] btruex │ │ + [ 135fa] pool_ │ │ + [ 13600] The watched kernel variable name list WTVARS has room for # more elements, so the # new names (in a list of # names) associated with agent # cannot be inserted. │ │ + [ 136a1] J2000 │ │ + [ 136a7] FRAME_ │ │ + [ 136ae] SPICE(NONEXISTELEMENTS) │ │ + [ 136c6] SPICE(PASTENDSTR) │ │ + [ 136d8] SPICE(BADSUBSTR) │ │ + [ 136e9] CONVRT: Input units │ │ + [ 136fe] type: │ │ + [ 13705] agent │ │ + [ 1370b] cks │ │ + [ 1370f] CKR01 │ │ + [ 13715] DAFGDA │ │ + [ 1371c] SPICE(BADQUATSIGN) │ │ + [ 1372f] SPICE(NOTAROTATION) │ │ + [ 13743] rd_ed, unexpected code: %d\n │ │ + [ 1375f] OUTMSG: An invalid message type was specified in the type list. │ │ + [ 137a1] SPICE(INVALIDFORMAT) │ │ + [ 137b6] DAFETF │ │ + [ 137bd] 'NAIF/DAF' │ │ + [ 137c8] The input record has a maximum table dimension of #, while the maximum supported by this routine is #. It is possible that this problem is due to your SPICE Toolkit being out of date. │ │ + [ 13880] LGRESP │ │ + [ 13887] SPKR14 │ │ + [ 1388e] Both kernel variables # and # are present in the kernel pool. At most one form of the kernel variable name may be present. │ │ + [ 13909] PCKE02 │ │ + [ 13910] SCREEN │ │ + [ 13917] frozen │ │ + [ 1391e] & │ │ + [ 13920] WRLINE: File = │ │ + [ 13930] list in │ │ + [ 13938] bltnam │ │ + [ 1393f] SPICE(HANDLENOTFOUND) │ │ + [ 13955] ZZDASNFR │ │ + [ 1395e] ZZDDHHLU │ │ + [ 13967] The binary file format, '#', is not supported by this version of the toolkit. This is a serious problem, contact NAIF. │ │ + [ 139ea] Attempt to open file '#' failed. Value of IOSTAT was #. │ │ + [ 13a22] SPICE(UNKNOWNFILARC) │ │ + [ 13a37] itmaxe │ │ + [ 13a3e] itmunt │ │ + [ 13a45] VECTOR │ │ + [ 13a4c] NUT_MODEL │ │ + [ 13a56] OBLIQ_MODEL │ │ + [ 13a62] nearpt_ │ │ + [ 13a6a] axisqr │ │ + [ 13a71] Norm of scaled point is 0. POSITN = ( #, #, # ) │ │ + [ 13aa1] zzekjtst_ │ │ + [ 13aab] idxset │ │ + [ 13ab2] ZZEKLLED │ │ + [ 13abb] SPICE(DASNOTEMPTY) │ │ + [ 13ace] ZZEKRSD │ │ + [ 13ad6] ZZEKRD01 │ │ + [ 13adf] Key = #; valid range = 1:#. Tree = #, file = # │ │ + [ 13b0e] An attempt to create a temporary string array failed. Attempted to allocate # bytes. │ │ + [ 13b64] An attempt to copy a string using C2F_StrCpy failed. │ │ + [ 13b99] There is an inconsistency between the version of the routine calling ZZFDAT and the current version of ZZFDAT. Check to make sure that you have the most current versions of ZZFDAT and the routines that make use of it. │ │ + [ 13c73] IAU_UMBRIEL │ │ + [ 13c7f] IAU_GALATEA │ │ + [ 13c8b] IAU_EURYBATES │ │ + [ 13c99] zzdynfr0_ │ │ + [ 13ca3] SPICE(INVALIDDIVISOR) │ │ + [ 13cb9] EARTH_BARYCENTER │ │ + [ 13cca] LEDA │ │ + [ 13ccf] THYONE │ │ + [ 13cd6] HEGEMONE │ │ + [ 13cdf] HERSE │ │ + [ 13ce5] CALYPSO │ │ + [ 13ced] HATI │ │ + [ 13cf2] LOGE │ │ + [ 13cf7] DESPINA │ │ + [ 13cff] LADEE │ │ + [ 13d05] P10 │ │ + [ 13d09] PIONEER-11 │ │ + [ 13d14] JANUS_B │ │ + [ 13d1c] TROPICAL RAINFALL MEASURING MISSION │ │ + [ 13d40] ICE │ │ + [ 13d44] CASP │ │ + [ 13d49] MARTIAN MOONS EXPLORATION │ │ + [ 13d63] SELENE VLBI Radio Satellite │ │ + [ 13d7f] SHOEMAKER-LEVY 9-E │ │ + [ 13d92] RUSSELL 3 │ │ + [ 13d9c] SCHAUMASSE │ │ + [ 13da7] SINGER-BREWSTER │ │ + [ 13db7] HOLT-OLMSTEAD │ │ + [ 13dc5] DSS-27 │ │ + [ 13dcc] xmit │ │ + [ 13dd1] TPARSE does not support the specification of a time system in a string. The time system # was specified. │ │ + [ 13e3c] *w* │ │ + [ 13e40] The year value was #. This must be an integral value. │ │ + [ 13e78] YMD │ │ + [ 13e7d] SPICE(BADTIMEBOUNDS) │ │ + [ 13e92] YDF │ │ + [ 13e96] YMDF │ │ + [ 13e9b] SPICE(BADPICTURE) │ │ + [ 13ead] UTC-Offset indicator │ │ + [ 13ec2] JANUARY │ │ + [ 13eca] The input time string is blank. │ │ + [ 13eea] │ │ + [ 13ef0] Y-it │ │ + [ 13ef5] YmDH*M*S │ │ + [ 13efe] Yiiiii │ │ + [ 13f05] i:i:nimY │ │ + [ 13f0e] mDYH*M │ │ + [ 13f15] imYi:i │ │ + [ 13f1c] i/i/Yi:i:n │ │ + [ 13f27] mo │ │ + [ 13f2a] zh_GAN │ │ + [ 13f31] be │ │ + [ 13f34] bgn │ │ + [ 13f38] fil │ │ + [ 13f3c] goh │ │ + [ 13f40] hil │ │ + [ 13f44] kaw │ │ + [ 13f48] ky │ │ + [ 13f4b] lzh │ │ + [ 13f4f] mai │ │ + [ 13f53] mde │ │ + [ 13f57] mh │ │ + [ 13f5a] mn │ │ + [ 13f5d] srr │ │ + [ 13f61] su │ │ + [ 13f64] ve │ │ + [ 13f67] xnr │ │ + [ 13f6b] zun │ │ + [ 13f6f] fao │ │ + [ 13f73] hun │ │ + [ 13f77] ndo │ │ + [ 13f7b] slk │ │ + [ 13f7f] tgk │ │ + [ 13f83] tso │ │ + [ 13f87] tah │ │ + [ 13f8b] BH │ │ + [ 13f8e] IC │ │ + [ 13f91] KY │ │ + [ 13f94] SJ │ │ + [ 13f97] SX │ │ + [ 13f9a] TN │ │ + [ 13f9d] AUS │ │ + [ 13fa1] AZE │ │ + [ 13fa5] BDI │ │ + [ 13fa9] COK │ │ + [ 13fad] CMR │ │ + [ 13fb1] CYM │ │ + [ 13fb5] LBY │ │ + [ 13fb9] STP │ │ + [ 13fbd] UZB │ │ + [ 13fc1] ZAF │ │ + [ 13fc5] uprv_copyEbcdic() string[%] contains a variant character in position %d\n │ │ + [ 1400e] es_ES │ │ + [ 14014] km_KH │ │ + [ 1401a] lo_LA │ │ + [ 14020] yue_Hant_HK │ │ + [ 1402c] metadata │ │ + [ 14035] Asia/Anadyr │ │ + [ 14041] Asia/Yakutsk │ │ + [ 1404e] Asia/Ulaanbaatar │ │ + [ 1405f] AZT │ │ + [ 14063] WET │ │ + [ 14067] BRST │ │ + [ 1406c] America/Cuiaba │ │ + [ 1407b] US/Central │ │ + [ 14086] PSACCENT │ │ + [ 1408f] PSCRACK │ │ + [ 14097] partitions │ │ + [ 140a2] en_PH │ │ + [ 140a8] gd_GB │ │ + [ 140ae] it_CH │ │ + [ 140b4] ms_BN │ │ + [ 140ba] qu_PE │ │ + [ 140c0] ur_IN │ │ + [ 140c6] i-ami │ │ + [ 140cc] sgn-br │ │ + [ 140d3] ncs │ │ + [ 140d7] dse │ │ + [ 140db] zh-cmn-hans │ │ + [ 140e7] zh-wuu │ │ + [ 140ee] ucnv_unload │ │ + [ 140fa] ucol_openFromShortString │ │ + [ 14113] layout │ │ + [ 1411a] TZVersion │ │ + [ 14124] uchar_swapNames(): too few bytes (%d after header) for unames.icu\n │ │ + [ 14167] udict_swap(): too few bytes (%d after header) for all of dictionary data\n │ │ + [ 141b1] U_ZERO_ERROR │ │ + [ 141be] U_INTERNAL_PROGRAM_ERROR │ │ + [ 141d7] U_BUFFER_OVERFLOW_ERROR │ │ + [ 141ef] U_ILLEGAL_ESCAPE_SEQUENCE │ │ + [ 14209] U_MISMATCHED_SEGMENT_DELIMITERS │ │ + [ 14229] U_UNSUPPORTED_ATTRIBUTE │ │ + [ 14241] U_MF_SELECTOR_ERROR │ │ + [ 14255] U_BRK_RULE_SYNTAX │ │ + [ 14267] U_REGEX_PROPERTY_SYNTAX │ │ + [ 1427f] U_REGEX_UNIMPLEMENTED │ │ + [ 14295] currencyNumericCodes │ │ + [ 142aa] CNY │ │ + [ 142ae] ETB │ │ + [ 142b2] KMF │ │ + [ 142b6] KRO │ │ + [ 142ba] KYD │ │ + [ 142be] THB │ │ + [ 142c2] TMT │ │ + [ 142c6] XCG │ │ + [ 142ca] typeOffsets │ │ + [ 142d6] M10L │ │ + [ 142db] @calendar=ethiopic │ │ + [ 142ee] digital │ │ + [ 142f6] speed │ │ + [ 142fc] millimole-per-liter │ │ + [ 14310] ZWN │ │ + [ 14314] millimeter │ │ + [ 1431f] yard │ │ + [ 14324] kilogram │ │ + [ 1432d] centiliter │ │ + [ 14338] cubic-centimeter │ │ + [ 14349] personal │ │ + [ 14352] any │ │ + [ 14356] zepto │ │ + [ 1435c] grammaticalFeatures │ │ + [ 14370] UCARules │ │ + [ 14379] AMU │ │ + [ 1437d] ATrace_setCounter │ │ + [ 1438f] preferredRefreshPeriod │ │ + [ 143a6] Alt-azimuth mode disabled │ │ + [ 143c0] Time and script are paused │ │ + [ 143db] High res textures │ │ + [ 143ed] Unknown script system access policy {}\n │ │ + [ 14415] invalid precision │ │ + [ 14427] negative precision │ │ + [ 1443a] AsterismsFile │ │ + [ 14448] HDCrossIndex │ │ + [ 14455] WarpMeshFile │ │ + [ 14462] FocusZooming │ │ + [ 1446f] R │ │ + [ 14471] angle │ │ + [ 14477] true\n │ │ + [ 1447d] "\n │ │ + [ 14480] Travelling ({})\n │ │ + [ 14491] seconds │ │ + [ 14499] Mass: {} lb\n │ │ + [ 144a6] Error reading {} catalog file: {}\n │ │ + [ 144c9] Failed to load library: %s\n │ │ + [ 144e5] Failed to initialize mutex for device info retrieval. ma_context_get_device_info() is not thread safe.\n │ │ + [ 1454d] Passthrough: %s\n │ │ + [ 1456f] CHANNEL_AUX_3 │ │ + [ 1457d] CHANNEL_AUX_14 │ │ + [ 1458c] Format not supported │ │ + [ 145a1] WASAPI │ │ + [ 145a8] SL_IID_AUDIOIODEVICECAPABILITIES │ │ + [ 145c9] {:%c} │ │ + [ 145cf] {:%Y %b %d %H:%M:%S %Z} │ │ + [ 145e7] darkolivegreen │ │ + [ 145f6] lightgreen │ │ + [ 14601] lightseagreen │ │ + [ 1460f] mediumvioletred │ │ + [ 1461f] purple │ │ + [ 14626] yellowgreen │ │ + [ 14632] .tga │ │ + [ 1463d] labes │ │ + [ 14643] ring │ │ + [ 14648] Time │ │ + [ 1464d] magnitude │ │ + [ 14657] getaltazimuthmode │ │ + [ 14669] hidelabel │ │ + [ 14673] fromjulianday │ │ + [ 14681] runscript │ │ + [ 1468b] settimeslice │ │ + [ 14698] Argument to celestia:setlabelflags() must be a table │ │ + [ 146cd] Keys in table-argument to celestia:setlabelflags() must be strings │ │ + [ 14710] Wrong number of arguments to function celestia:tojulianday │ │ + [ 1474b] Third arg to celestia:utctotdb must be a number │ │ + [ 1477b] newframe: one object argument required for frame │ │ + [ 147ac] First arg to celestia:newvector must be a number │ │ + [ 147dd] Argument to celestia:setwindowbordersvisible must be a boolean │ │ + [ 1481c] One argument expected to function celestia:verbosity │ │ + [ 14851] First argument for celestia:isplayingaudio must be a number │ │ + [ 1488d] First argument for celestia:stopaudio must be a number │ │ + [ 148c4] First argument for celestia:setaudioloop must be a number │ │ + [ 148fe] Second argument for celestia:setaudioloop must be a boolean │ │ + [ 1493a] One argument expected to function celestia:log │ │ + [ 14969] Error while executing tick callback: {}\n │ │ + [ 14992] celestia │ │ + [ 1499b] PROJECTION │ │ + [ 149a6] No arguments expected for font:bind() │ │ + [ 149cc] No arguments expected for font:getmaxascent() │ │ + [ 149fa] setorbitvisibility │ │ + [ 14a0d] No arguments expected to object:orbitvisibility │ │ + [ 14a3d] atmosphereCloudHeight │ │ + [ 14a53] Sixth argument to object:mark must be a boolean │ │ + [ 14a83] skycolor │ │ + [ 14a8c] Value of {} must be number │ │ + [ 14aa7] isvalid │ │ + [ 14aaf] Last argument to observer:lookat must be of type vector │ │ + [ 14ae7] No arguments expected to observer:getposition │ │ + [ 14b15] Vector components must be numbers │ │ + [ 14b37] Merged similar meshes: {} -> {}.\n │ │ + [ 14b59] end_material │ │ + [ 14b66] jpl-earth-sun │ │ + [ 14b74] mars-sun │ │ + [ 14b7d] jpl-mercury-ssb │ │ + [ 14b8d] vsop87-mercury │ │ + [ 14b9c] mercury-jpl │ │ + [ 14ba8] iau-prometheus │ │ + [ 14bb7] iau-ganymede │ │ + [ 14bc4] earth-p03lp │ │ + [ 14bd0] ScriptedOrbit generator function returned bad value.\n │ │ + [ 14c06] viewMat │ │ + [ 14c0e] Crt │ │ + [ 14c12] Cru │ │ + [ 14c16] AbsMag │ │ + [ 14c1d] SC │ │ + [ 14c20] SampledTrajectory │ │ + [ 14c32] EllipticalOrbit │ │ + [ 14c42] RotationOffset │ │ + [ 14c51] {}_vert.glsl │ │ + [ 14c5e] /***************************************************\n │ │ + [ 14c94] diff │ │ + [ 14c99] ringWidth │ │ + [ 14ca3] #extension GL_ARB_shader_texture_lod : enable\n │ │ + [ 14cd2] shininess │ │ + [ 14cdc] vec4 diff = vec4(ambientColor, opacity);\n │ │ + [ 14d06] * │ │ + [ 14d0a] set_vp(vec4(position.xyz, 1.0));\n │ │ + [ 14d2c] position = in_Position.xyz;\n │ │ + [ 14d4d] v_TexCoord0.st = │ │ + [ 14d63] rayleighH │ │ + [ 14d6d] sampler2D │ │ + [ 14d77] Fragment shader source:\n │ │ + [ 14d90] shadow *= 1.0 - shadowR;\n │ │ + [ 14daa] Oblateness │ │ + [ 14db5] Sunset │ │ + [ 14dbc] LunarLambert │ │ + [ 14dc9] OrbitBarycenter cycle detected │ │ + [ 14de8] AbsMag ignored on Barycenter │ │ + [ 14e05] Extinction │ │ + [ 14e10] Extinction ignored for stars close to the origin │ │ + [ 14e41] tex │ │ + [ 14e45] Error reading PNG image file {}\n │ │ + [ 14e66] Failed to read chunk type\n │ │ + [ 14e81] Chunk size {} too small to include header\n │ │ + [ 14eac] Failed to read element {} of mesh matrix\n │ │ + [ 14ed6] Content size {} too small to include float color\n │ │ + [ 14f08] Processing IntPercentage chunk\n │ │ + [ 14f28] ()J │ │ + [ 14f2c] zh_CN │ │ + [ 14f32] boolean │ │ + [ 14f3a] startTime │ │ + [ 14f44] flushTasks │ │ + [ 14f4f] GL_ARB_shading_language_100 │ │ + [ 14f6b] Missing Huffman code table entry │ │ + [ 14f8c] Empty input file │ │ + [ 14f9d] Scan script does not transmit all data │ │ + [ 14fc4] End Of Image │ │ + [ 14fd1] RST%d │ │ + [ 14fd7] Component %d: dc=%d ac=%d │ │ + [ 14ff5] Corrupt JPEG data: %u extraneous bytes before marker 0x%02x │ │ + [ 15031] adobe │ │ + [ 15037] ItalicAngle │ │ + [ 15043] isFixedPitch │ │ + [ 15050] lenIV │ │ + [ 15056] %!PS-Adobe-3.0 Resource-CIDFont │ │ + [ 15076] FACE_NAME │ │ + [ 15080] QUAD_WIDTH │ │ + [ 1508b] SUPERSCRIPT_X │ │ + [ 1509c] � � │ │ + [ 150b1] � │ │ + [ 150b6] StartAxis │ │ + [ 150c0] 0123456789abcdefpx │ │ + [ 150d3] if │ │ + [ 150d6] in │ │ + [ 150d9] ... │ │ + [ 150dd] union │ │ + [ 150e3] %s at line %d │ │ + [ 150f1] inconsistent rendering intents │ │ + [ 15110] internal error handling cHRM->XYZ │ │ + [ 15132] inconsistent chromaticities │ │ + [ 1514e] Missing PLTE before IDAT │ │ + [ 15167] png_start_read_image/png_read_update_info: duplicate call │ │ + [ 151a1] gray+alpha color-map: too few entries │ │ + [ 151c7] non-positive width │ │ + [ 151da] bad height format │ │ + [ 151ec] Invalid sCAL width ignored │ │ + [ 15207] png_image_write_to_file: incorrect PNG_IMAGE_VERSION │ │ + [ 1523c] Writing zero-length unknown chunk │ │ + [ 1525e] memory image too large │ │ + [ 15275] ICC profile too short │ │ + [ 1528b] tEXt: invalid keyword │ │ + [ 152a1] deflateEnd failed (ignored) │ │ + [ 152bd] erract_c │ │ + [ 152c6] furnsh_c │ │ + [ 152cf] Invalid Endpoints--Left Endpoint Exceeds Right Endpoint │ │ + [ 15307] SPICE(DATATYPENOTRECOG) │ │ + [ 1531f] Invalid embedded blank was found in character string │ │ + [ 15354] SPICE(INVALIDCHECKOUT) │ │ + [ 1536b] Specification of Time String Format Was Not Recognized │ │ + [ 153a2] Window Does Not Contain Interval Corresponding to the Supplied Index │ │ + [ 153e7] SPICE(UNITSNOTREC) │ │ + [ 153fa] Cardinality of Output Window is Too Small │ │ + [ 15424] Input Vector is the Zero Vector │ │ + [ 15444] kdata_c │ │ + [ 1544c] PATH_SYMBOLS │ │ + [ 15459] In meta-kernel <#>, the file name at index # in the KERNELS_TO_LOAD list has length # characters; the limit is # characters. │ │ + [ 154d6] DSK │ │ + [ 154da] SPICE(CKBOGUSENTRY) │ │ + [ 154ee] invalid array section │ │ + [ 15504] %s: %s\n │ │ + [ 1550c] COPYI │ │ + [ 15512] TABLE_LIST_FULL │ │ + [ 15522] cnams │ │ + [ 15528] The EK file # could not be loaded; the maximum number of columns havingdistinct attributes has already been reached. │ │ + [ 1559d] ldrec │ │ + [ 155a3] Attempt to update file record failed. File was '#'. Value of IOSTAT was '#'. │ │ + [ 155f1] SPICE(INVALIDHANDLE) │ │ + [ 15606] dasa2l_ │ │ + [ 1560e] SPICE(DASNOSUCHADDRESS) │ │ + [ 15626] DASWBR │ │ + [ 1562d] EXPOOL │ │ + [ 15634] uvalue │ │ + [ 1563b] eqchr_ │ │ + [ 15642] typeid │ │ + [ 15649] REPMOT │ │ + [ 15650] ONE │ │ + [ 15654] TWELFTH │ │ + [ 1565c] REPSUB error: LEFT (#) must not be less than 1. │ │ + [ 1568c] [ │ │ + [ 1568e] SCLK │ │ + [ 15693] CKE05 │ │ + [ 15699] yvals │ │ + [ 1569f] , │ │ + [ 156a1] frmchg_ │ │ + [ 156a9] dpjan0 │ │ + [ 156b0] Epoch before │ │ + [ 156be] wc │ │ + [ 156c1] The eccentricity supplied for a type 15 segment is negative. It must be non-negative. The value supplied to the type 15 evaluator was #. │ │ + [ 1574c] body-fixed frame │ │ + [ 1575d] ; popped name is │ │ + [ 1576f] JDTDT │ │ + [ 15775] Relational operator, *, is not recognized. │ │ + [ 157a0] vhatg_ │ │ + [ 157a7] WRLINE: Maximum number of logical units that can be allocated by SPICELIB has already been reached │ │ + [ 1580a] no comma │ │ + [ 15813] drdtrt │ │ + [ 1581a] The block size is not positive. The block size is #. │ │ + [ 1584f] defcod │ │ + [ 15856] There is no room available for adding '#' to the list of name/code pairs. The number of names that can be supported is #. This number has been reached. │ │ + [ 158f1] zzdafgfr_ │ │ + [ 158fb] ZZDASGRD │ │ + [ 15904] Attempt to open file, '$' for % access failed. IOSTAT was #. │ │ + [ 15941] Attempt to open file, '#', for write access has failed. This file utilizes an unknown binary file format. This error may result from attempting to open a corrupt file or one of an unknown type. │ │ + [ 15a05] ZZDDHRMU │ │ + [ 15a0e] itmvec │ │ + [ 15a15] Definition of frame # specifies frame center # and obliquity model #. This obliquity model is not applicable to body #. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 15aec] coeffs │ │ + [ 15af3] ZZDYNFID │ │ + [ 15afc] ? │ │ + [ 15b00] SPICE(NOCLASS) │ │ + [ 15b0f] ZZEKIXLK │ │ + [ 15b18] Number tables in first join row set was #; valid range is 1:# │ │ + [ 15b56] zzekjsqz_ │ │ + [ 15b60] Constraint index # is out of valid range 1:#. │ │ + [ 15b8e] The relational operator # was not recognized or was not applicable for data type #. │ │ + [ 15be2] IAU_TAYGETE │ │ + [ 15bee] IAU_STEINS │ │ + [ 15bf9] MOON │ │ + [ 15bfe] ANANKE │ │ + [ 15c05] METIS │ │ + [ 15c0b] AUTONOE │ │ + [ 15c13] NEPTUNE │ │ + [ 15c1b] P6 │ │ + [ 15c1e] MAGELLAN │ │ + [ 15c27] LCROSS │ │ + [ 15c2e] LUCY │ │ + [ 15c33] CHANDRAYAAN-1 │ │ + [ 15c41] TRMM │ │ + [ 15c46] EXM RSP SP │ │ + [ 15c51] GLL PROBE │ │ + [ 15c5b] CROMMELIN │ │ + [ 15c65] PONS-WINNECKE │ │ + [ 15c73] WIRTANEN │ │ + [ 15c7c] MUELLER 2 │ │ + [ 15c86] DAVIDA │ │ + [ 15c8d] PARKES │ │ + [ 15c94] SPICE(NOSUCHFILE) │ │ + [ 15ca6] ZZPRSCOR │ │ + [ 15caf] ZZREFCH1 │ │ + [ 15cb8] There is a quoted string with no characters on line # of the text kernel file '#'. │ │ + [ 15d0c] Encountered '#' while attempting to parse a time on line # of the text kernel file '#'. Error message: '#' │ │ + [ 15d78] miY> │ │ + [ 15d7d] imY │ │ + [ 15d81] Field count was not found for SCLK #. │ │ + [ 15da7] The routine ZZSGP4 is an umbrella for the SGP4 initializer and propagator entry points. Do not call ZZSGP4. It is likely that a programming error has been made. │ │ + [ 15e48] daytab │ │ + [ 15e4f] The string supplied to specify the reference frame, ('#') contains non-printing characters. The two most common causes for this kind of error are: 1. an error in the call to ZZSPKGO0; 2. an uninitialized variable. │ │ + [ 15f27] ZZSWFINI │ │ + [ 15f30] FRAME_#_START │ │ + [ 15f3e] SPICE(TOOMANYBASEFRAMES) │ │ + [ 15f57] Start time kernel variable # exists but DTPOOL returned data type # rather than one of the expected values: 'C' or 'N'. │ │ + [ 15fcf] The Year may be abbreviated only if the year belongs to the Christian Era (A.D.) │ │ + [ 16021] The default value assigned to the time system must be one of 'UTC', 'TDT', 'TT', or 'TDB'. The value supplied was '#'. │ │ + [ 16099] SPICE(OUTPUTTOOSHORT) │ │ + [ 160af] Day of Month │ │ + [ 160bc] An unexpected # ("#") was encountered in the time string: │ │ + [ 160f7] Two substrings indicating a day of year were identified in the input time string <#> and <#>: " │ │ + [ 16157] A month was identified in the time string "#", but a day of month could not be identified. │ │ + [ 161b3] Yiii:n │ │ + [ 161ba] YDm │ │ + [ 161be] i-Ydi:i │ │ + [ 161c6] i:iimY │ │ + [ 161cd] iiYi:n │ │ + [ 161d4] i/i/Y/i:n │ │ + [ 161de] Y*m*D*H*M* │ │ + [ 161e9] Y*y*H* │ │ + [ 161f0] angrt │ │ + [ 161f6] collation │ │ + [ 16200] NH │ │ + [ 16203] hsn │ │ + [ 16207] ar │ │ + [ 1620a] ary │ │ + [ 1620e] bas │ │ + [ 16212] bo │ │ + [ 16215] br │ │ + [ 16218] ckb │ │ + [ 1621c] fo │ │ + [ 1621f] frr │ │ + [ 16223] jrb │ │ + [ 16227] kab │ │ + [ 1622b] kfo │ │ + [ 1622f] kho │ │ + [ 16233] khq │ │ + [ 16237] kmb │ │ + [ 1623b] lag │ │ + [ 1623f] lfn │ │ + [ 16243] lij │ │ + [ 16247] mdr │ │ + [ 1624b] nwc │ │ + [ 1624f] pau │ │ + [ 16253] pfl │ │ + [ 16257] sli │ │ + [ 1625b] tly │ │ + [ 1625f] zap │ │ + [ 16263] zgh │ │ + [ 16267] ces │ │ + [ 1626b] hin │ │ + [ 1626f] nbl │ │ + [ 16273] BM │ │ + [ 16276] BW │ │ + [ 16279] GA │ │ + [ 1627c] KE │ │ + [ 1627f] MW │ │ + [ 16282] MX │ │ + [ 16285] PS │ │ + [ 16288] RW │ │ + [ 1628b] SL │ │ + [ 1628e] AGO │ │ + [ 16292] CAF │ │ + [ 16296] CRQ │ │ + [ 1629a] CRI │ │ + [ 1629e] SGS │ │ + [ 162a2] HND │ │ + [ 162a6] IDN │ │ + [ 162aa] IRL │ │ + [ 162ae] ISL │ │ + [ 162b2] JEY │ │ + [ 162b6] MLI │ │ + [ 162ba] QAT │ │ + [ 162be] SAU │ │ + [ 162c2] SYR │ │ + [ 162c6] fil_PH │ │ + [ 162cd] variant │ │ + [ 162d5] __system_property_get │ │ + [ 162eb] YAKST │ │ + [ 162f1] Asia/Baku │ │ + [ 162fb] BST │ │ + [ 162ff] America/Scoresbysund │ │ + [ 16314] Canada/Atlantic │ │ + [ 16324] en_MH │ │ + [ 1632a] es_CO │ │ + [ 16330] mn_Cyrl │ │ + [ 16338] qu_BO │ │ + [ 1633e] tt_RU │ │ + [ 16344] yi_001 │ │ + [ 1634b] i-enochian │ │ + [ 16356] csn │ │ + [ 1635a] sgn-dk │ │ + [ 16361] sgn-ie │ │ + [ 16368] psr │ │ + [ 1636c] ures_swap().udata_swapInvStringBlock(keys[%d]) failed\n │ │ + [ 163a3] ures_swapResource(array res=%08x)[%d].recurse(%08x) failed\n │ │ + [ 163df] ucol_swap(formatVersion=4): unknown data at IX_RESERVED10_OFFSET\n │ │ + [ 16421] supplementalData │ │ + [ 16432] icudt75l-curr │ │ + [ 16440] U_MESSAGE_PARSE_ERROR │ │ + [ 16456] U_MF_UNSUPPORTED_EXPRESSION_ERROR │ │ + [ 16478] AOK │ │ + [ 1647c] ARA │ │ + [ 16480] BGL │ │ + [ 16484] CNX │ │ + [ 16488] IRR │ │ + [ 1648c] LUC │ │ + [ 16490] LYD │ │ + [ 16494] MVR │ │ + [ 16498] OMR │ │ + [ 1649c] RSD │ │ + [ 164a0] RUR │ │ + [ 164a4] SKK │ │ + [ 164a8] SLL │ │ + [ 164ac] XFU │ │ + [ 164b0] date │ │ + [ 164b5] INFINITY │ │ + [ 164be] dunam │ │ + [ 164c4] AYM │ │ + [ 164c8] CSJ │ │ + [ 164cc] ZWC │ │ + [ 164d0] dot-per-inch │ │ + [ 164dd] atmosphere │ │ + [ 164e8] acre-foot │ │ + [ 164f2] cubic-inch │ │ + [ 164fd] gallon-imperial │ │ + [ 1650d] tablespoon │ │ + [ 16518] genitive │ │ + [ 16521] few │ │ + [ 16525] ronto │ │ + [ 1652b] Week │ │ + [ 16530] -short │ │ + [ 16537] -narrow │ │ + [ 1653f] grouping │ │ + [ 16548] reset secondary-before secondary ignorable not possible │ │ + [ 16580] secondary tailoring gap too small │ │ + [ 165a2] alternateQuotationStart │ │ + [ 165ba] ()F │ │ + [ 165be] Anti-aliasing disabled │ │ + [ 165d5] Auto-magnitude disabled │ │ + [ 165ed] Could not find locale, falling back to classic.\n │ │ + [ 1661e] format specifier requires numeric argument │ │ + [ 16649] cannot switch from manual to automatic argument indexing │ │ + [ 16682] StarTextures │ │ + [ 1668f] A │ │ + [ 16691] Distance │ │ + [ 1669a] km │ │ + [ 1669d] base │ │ + [ 166a2] Depth component: %s\n │ │ + [ 166b7] Max anisotropy filtering: %s\n │ │ + [ 166d5] F11 Start/Pause F12 Stop │ │ + [ 166f1] catalog^Ddeep sky │ │ + [ 16702] star │ │ + [ 16707] 0.11.21 │ │ + [ 1670f] Buffer Size: %d*%d (%d)\n │ │ + [ 1672c] CHANNEL_SIDE_LEFT │ │ + [ 1673e] Invalid file │ │ + [ 1674b] Memory already mapped │ │ + [ 16761] SL_IID_ANDROIDCONFIGURATION │ │ + [ 1677d] [OpenSL] Cannot find symbol slCreateEngine. │ │ + [ 167a9] &ver= │ │ + [ 167af] oy │ │ + [ 167b2] crimson │ │ + [ 167ba] cyan │ │ + [ 167bf] darkslategray │ │ + [ 167cd] lime │ │ + [ 167d2] midnightblue │ │ + [ 167df] orangered │ │ + [ 167e9] {}{} │ │ + [ 167ee] "/:<>?\| │ │ + [ 167f7] ecliptic │ │ + [ 16800] insula │ │ + [ 16807] sulcus │ │ + [ 1680e] selectioncursor │ │ + [ 1681e] capture │ │ + [ 16826] timerate │ │ + [ 1682f] orbit │ │ + [ 16835] xrot │ │ + [ 1683a] render │ │ + [ 16841] requestkeyboard │ │ + [ 16851] findcategory │ │ + [ 1685e] Bad method call! │ │ + [ 1686f] fuzzy │ │ + [ 16875] screenshot-{}{:06i} │ │ + [ 16889] mousedown │ │ + [ 16893] l │ │ + [ 16895] Internal Error: Invalid table entry in checkTimeslice │ │ + [ 168cb] Timeout: script hasn't returned control to celestia (forgot to call wait()?) │ │ + [ 16918] to │ │ + [ 1691b] Position or rotation expected as second argument to frame:from() │ │ + [ 1695c] Frustum │ │ + [ 16964] argument 1 to gl.TexParameter must be a number │ │ + [ 16993] argument 2 to gl.TexParameter must be a number │ │ + [ 169c2] argument 1 to gl.BlendFunc must be a number │ │ + [ 169ee] removereferencemark │ │ + [ 16a02] bodyframe │ │ + [ 16a0c] setatmosphere │ │ + [ 16a1a] location │ │ + [ 16a23] dwarfplanet │ │ + [ 16a2f] parent │ │ + [ 16a36] Argument to object:catalognumber must be a string │ │ + [ 16a68] getframe │ │ + [ 16a71] makeactiveview │ │ + [ 16a80] timespan │ │ + [ 16a89] Internal error: couldn't get metatable │ │ + [ 16ab0] setaxisangle │ │ + [ 16abd] No arguments expected for vector:gety │ │ + [ 16ae3] Unknown error loading hook script │ │ + [ 16b05] texcoord2 │ │ + [ 16b0f] linestrip │ │ + [ 16b19] diffuse {} {} {}\n │ │ + [ 16b2b] normal\n │ │ + [ 16b33] mimas │ │ + [ 16b39] jpl-earth-emb │ │ + [ 16b47] jpl-pluto-ssb │ │ + [ 16b55] iau-phobos │ │ + [ 16b60] Unsupported byte order {}, expected {} in {}.\n │ │ + [ 16b8f] tidalSize │ │ + [ 16b99] scale │ │ + [ 16b9f] largestar │ │ + [ 16ba9] Cnc │ │ + [ 16bad] PsA │ │ + [ 16bb1] Sge │ │ + [ 16bb5] .* │ │ + [ 16bb8] Open cluster │ │ + [ 16bc5] Bad spice orbit\n │ │ + [ 16bd6] Missing coordinates for FixedPosition\n │ │ + [ 16bfd] RelativeVelocity │ │ + [ 16c0e] vec3 ringShadowProj;\n │ │ + [ 16c24] float NV = dot(N, eyeDir);\n │ │ + [ 16c40] vec3 H;\n │ │ + [ 16c49] totalLight += l * │ │ + [ 16c5c] vec4 overlayColor = texture2D(overlayTex, overlayTexCoord.st);\n │ │ + [ 16c9c] scatterEx │ │ + [ 16ca6] gl_FragColor.rgb = gl_FragColor.rgb * scatterEx + scatterColor;\n │ │ + [ 16ce7] shadowCenter │ │ + [ 16cf4] mieK │ │ + [ 16cf9] pointFade = 1.0;\n │ │ + [ 16d0b] line_strip │ │ + [ 16d16] ReferencePoint │ │ + [ 16d25] No valid orbit specified for object '{}'. Skipping.\n │ │ + [ 16d5a] Error: Beginning can only be specified for initial phase of timeline.\n │ │ + [ 16da1] Lower │ │ + [ 16da7] Inner │ │ + [ 16dad] BumpHeight │ │ + [ 16db8] III │ │ + [ 16dbc] Texture is ignored on Barycenters │ │ + [ 16dde] {}1 {} A │ │ + [ 16de7] ()D │ │ + [ 16deb] (JI)V │ │ + [ 16df1] ,\n │ │ + [ 16df4] [\n │ │ + [ 16df7] No known providers. This is likely a bug in libepoxy code generation\n │ │ + [ 16e42] %s() not found: %s\n │ │ + [ 16e56] int epoxy_egl_version(EGLDisplay) │ │ + [ 16e78] Too many color components: %d, max %d │ │ + [ 16e9e] Bogus DAC index %d │ │ + [ 16eb1] %3d %3d %3d %3d %3d %3d %3d %3d │ │ + [ 16ed9] JFIF extension marker: type 0x%02x, length %u │ │ + [ 16f07] Corrupt JPEG data: premature end of data segment │ │ + [ 16f38] Component index %d: mismatching sampling ratio %d:%d, %d:%d, %c │ │ + [ 16f78] resource.frk/ │ │ + [ 16f86] /sfnts │ │ + [ 16f8d] FDBytes │ │ + [ 16f95] pcf │ │ + [ 16f99] IRV │ │ + [ 16fa1] � │ │ + [ 16faa] � │ │ + [ 16fb2] � │ │ + [ 16fb7] raster1 │ │ + [ 16fbf] svg-hooks │ │ + [ 16fc9] Version │ │ + [ 16fd1] WX │ │ + [ 16fd4] function │ │ + [ 16fdd] ^$*+?.([%- │ │ + [ 16fe8] global │ │ + [ 16fef] stack traceback: │ │ + [ 17004] $^P^H^T^X^\^F^P^F^X^X^\ $(,^F^H^H^H^L │ │ + [ 1701a] -> │ │ + [ 1701d] LUA_CPATH │ │ + [ 17027] short_src │ │ + [ 17031] isvararg │ │ + [ 1703a] activelines │ │ + [ 17046] exceeds application limits │ │ + [ 17061] MNG features are not allowed in a PNG datastream │ │ + [ 17092] Not recognizing known sRGB profile that has been edited │ │ + [ 170ca] bad encoding (internal error) │ │ + [ 170e8] unknown compression type │ │ + [ 17101] insufficient memory to read chunk │ │ + [ 17123] cHRM Blue X │ │ + [ 1712f] image row stride too large │ │ + [ 1714a] Invalid sBIT depth specified │ │ + [ 17167] card_c │ │ + [ 1716e] SPICE(INVALIDACTION) │ │ + [ 17183] The Value in the Kernel File was Expected to be a date. │ │ + [ 171bb] An Invalid Function Argument was Supplied │ │ + [ 171e5] An Invalid Epoch Type Specification Was Supplied │ │ + [ 17216] SPICE(NUMBEREXPECTED) │ │ + [ 1722c] SPICE(WRITEERROR) │ │ + [ 1723e] files │ │ + [ 17244] DAFHOF │ │ + [ 1724b] SEQUENTIAL │ │ + [ 17256] variable count incorrect │ │ + [ 1726f] can't read file │ │ + [ 1727f] lately %s %s %s %s │ │ + [ 17292] IO │ │ + [ 17296] DAFRCR │ │ + [ 1729d] ivals │ │ + [ 172a3] SPICE(DASFTFULL) │ │ + [ 172b4] nw │ │ + [ 172b7] The file type contains nonprinting characters. │ │ + [ 172e7] DASUFS │ │ + [ 172ee] SPICE(DASNOSUCHFILE) │ │ + [ 17303] SPICE(DASINVALIDTYPE) │ │ + [ 17319] poold │ │ + [ 1731f] Could not read DAS double precision record. File = # Record number = #. IOSTAT = #. │ │ + [ 17373] Could not write DAS character record. File = # Record number = #. IOSTAT = #. │ │ + [ 173c4] NEW BODY │ │ + [ 173cd] writing a variable to the output kernel file │ │ + [ 173fb] This is never supposed to happen. The requested name, '#', was found in the name list, but the pointer to the head of the data for this variable is zero. Please note your activities and report this error to NAIF. │ │ + [ 174d2] LMPOOL │ │ + [ 174d9] ELEMC │ │ + [ 174df] \begindata │ │ + [ 174ea] Invalid frame specification found in kernel pool: frame class keyword is # but associated frame name assignment was not found. │ │ + [ 17569] BODC2N │ │ + [ 17570] BILLION │ │ + [ 17578] del │ │ + [ 1757c] This segment reports that it has # meta data items. Every generic segment must have at least #. │ │ + [ 175dc] xmeta │ │ + [ 175e2] XFR │ │ + [ 175e6] NIP │ │ + [ 175ea] ) │ │ + [ 175ec] SPICE(SPKINSUFFDATA) │ │ + [ 17601] SPICE(NONPOSITIVEMASS) │ │ + [ 17618] The periapsis and trajectory pole vectors are not orthogonal. The anglebetween them is # degrees. │ │ + [ 1767b] sb2rv │ │ + [ 17681] SPKE02 │ │ + [ 17688] SPKE12 │ │ + [ 1768f] SPKR02 │ │ + [ 17696] tsipm │ │ + [ 1769c] The variable # could not be found in the kernel pool. │ │ + [ 176d2] idents │ │ + [ 176d9] => │ │ + [ 176dc] otherwise corrupted---or deleting previous │ │ + [ 17707] invalid integer │ │ + [ 17717] no real part │ │ + [ 17724] A subsystem state counter overflowed. For this to happen there must be a SPICE bug or you must have been running your SPICE-based application for a very long time. Please contact NAIF.and report the circumstances under which this happened. │ │ + [ 17814] File '#' already loaded. │ │ + [ 1782d] ftmnm │ │ + [ 17833] Attempt to reconnect logical unit to file '#' failed. IOSTAT was #. │ │ + [ 17877] ZZDDHINI │ │ + [ 17880] ZZDDHGTU │ │ + [ 17889] zzddhnfc_ │ │ + [ 17893] Unable to determine the binary file format of DAF '#'. │ │ + [ 178ca] ZZDSKSNS ran out of segment table room while trying to append to the tail of the segment list for body #. Current state is ADD TO END. │ │ + [ 17951] ZZDSKCHK │ │ + [ 1795a] itmfrm │ │ + [ 17961] TARGET │ │ + [ 17968] LATITUDE │ │ + [ 17971] Definition of frame # specifies frame center # and nutation model #. This nutation model is not applicable to body #. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 17a46] FROM_FRAMES │ │ + [ 17a52] The kernel variable # used to define frame # is assigned the character value #. This value was expected to be a reference frame name, but NAMFRM cannot translate this name to a frame ID code. │ │ + [ 17b13] SPICE(BADAXISLENGTH) │ │ + [ 17b28] zzdynrot_ │ │ + [ 17b32] SPICE(BADSUBSTRINGBOUNDS) │ │ + [ 17b4c] ZZEKJOIN │ │ + [ 17b55] rsdsc │ │ + [ 17b5b] ZZEKQSEL │ │ + [ 17b64] ZZEKPGAL │ │ + [ 17b6d] Attempt to free non-existent CHR page. Page number = #; valid range is 1:# │ │ + [ 17bb8] Statistic # is not supported. │ │ + [ 17bd6] ZZEKVCAL │ │ + [ 17bdf] ZZEKVMCH │ │ + [ 17be8] EK = #; COLIDX = #; ROW = #; ELTIDX = #. Column entry element was not found. │ │ + [ 17c38] IAU_JUPITER_BARYCENTER │ │ + [ 17c4f] IAU_BORRELLY │ │ + [ 17c5c] MARS_BARYCENTER │ │ + [ 17c6c] SINOPE │ │ + [ 17c73] CARPO │ │ + [ 17c79] DAPHNIS │ │ + [ 17c81] ANTHE │ │ + [ 17c87] CORDELIA │ │ + [ 17c90] CALIBAN │ │ + [ 17c98] FERDINAND │ │ + [ 17ca2] BEPICOLOMBO MMO │ │ + [ 17cb2] SIRTF │ │ + [ 17cb8] MPL │ │ + [ 17cbc] EXM SPACECRAFT COMPOSITE │ │ + [ 17cd5] EXOMARS SP │ │ + [ 17ce0] CLUSTER 3 │ │ + [ 17cea] SHOEMAKER-LEVY 9-W │ │ + [ 17cfd] CLARK │ │ + [ 17d03] GEHRELS 3 │ │ + [ 17d0d] KOPFF │ │ + [ 17d13] TUTTLE │ │ + [ 17d1a] WILSON-HARRINGTON │ │ + [ 17d2c] POLYMELE │ │ + [ 17d35] zzmsxf_ │ │ + [ 17d3d] ZZSHSH │ │ + [ 17d44] SPICE(BADVARASSIGN) │ │ + [ 17d58] Oi │ │ + [ 17d5b] yY* │ │ + [ 17d5f] Ydi │ │ + [ 17d63] zzrvbf_ │ │ + [ 17d6b] There is a non-printing character embedded in line # of the text buffer. Non-printing characters are not allowed in kernel variable assignments. The non-printing character has ASCII code #. │ │ + [ 17e2c] The kernel variable # has been set up as a numeric or time variable. However, the value that you are attempting to assign to this variable on line # of the kernel buffer is not a numeric or time value. │ │ + [ 17ef8] SPICE(TOOMANYCOEFFS) │ │ + [ 17f0d] SPICE(KERNELVARTOOLARGE) │ │ + [ 17f26] SCLI01 │ │ + [ 17f2d] JDUTC │ │ + [ 17f33] ZZSPKGO1 │ │ + [ 17f3c] Target range rate magnitude is approximately the speed of light. The light time derivative cannot be computed. │ │ + [ 17fab] tvec │ │ + [ 17fb0] The input time string '#' cannot be processed because it contains more than @ recognizable tokens. The token that could not be processed was '#'. │ │ + [ 18042] CDT │ │ + [ 18046] Yidi:i:n │ │ + [ 1804f] Yimi │ │ + [ 18054] i-i-iti:i:n │ │ + [ 18060] i-idi:i:i │ │ + [ 1806a] H*M*SmDY │ │ + [ 18073] iiY │ │ + [ 18077] iiYn │ │ + [ 1807c] iimi │ │ + [ 18081] DmH*M*SY │ │ + [ 1808a] imiiin │ │ + [ 18091] miYi:i:n │ │ + [ 1809a] mii:i:nY │ │ + [ 180a3] Y-i-iti │ │ + [ 180ab] i:i:ni/i/i │ │ + [ 180b6] i:ii/i/Y │ │ + [ 180bf] ZZXLATED │ │ + [ 180c8] FX │ │ + [ 180cb] art__LOJBAN │ │ + [ 180d7] ach │ │ + [ 180db] dar │ │ + [ 180df] de │ │ + [ 180e2] krj │ │ + [ 180e6] ltg │ │ + [ 180ea] lua │ │ + [ 180ee] luo │ │ + [ 180f2] mfe │ │ + [ 180f6] nyo │ │ + [ 180fa] rn │ │ + [ 180fd] sd │ │ + [ 18100] cre │ │ + [ 18104] eng │ │ + [ 18108] gla │ │ + [ 1810c] ibo │ │ + [ 18110] cor │ │ + [ 18114] ori │ │ + [ 18118] tel │ │ + [ 1811c] twi │ │ + [ 18120] AW │ │ + [ 18123] JE │ │ + [ 18126] KI │ │ + [ 18129] TW │ │ + [ 1812c] UG │ │ + [ 1812f] AFG │ │ + [ 18133] ASM │ │ + [ 18137] ERI │ │ + [ 1813b] GHA │ │ + [ 1813f] GNQ │ │ + [ 18143] ISR │ │ + [ 18147] da_DK │ │ + [ 1814d] kk_KZ │ │ + [ 18153] ro_RO │ │ + [ 18159] tk_TM │ │ + [ 1815f] PETST │ │ + [ 18165] ULAT │ │ + [ 1816a] languageAliases │ │ + [ 1817a] en_ID │ │ + [ 18180] en_IN │ │ + [ 18186] es_CU │ │ + [ 1818c] es_EC │ │ + [ 18192] fr_MA │ │ + [ 18198] la_001 │ │ + [ 1819f] mn_Mong │ │ + [ 181a7] ures_swap(): resource top %d exceeds bundle length %d\n │ │ + [ 181de] ures_swap(): unable to allocate memory for tracking resources\n │ │ + [ 1821d] ucol_strcollIter │ │ + [ 1822e] night2 │ │ + [ 18235] indian │ │ + [ 1823c] Countries │ │ + [ 18246] parseRegions │ │ + [ 18253] {0}, {1} │ │ + [ 1825c] other number │ │ + [ 18269] U_STRING_NOT_TERMINATED_WARNING │ │ + [ 18289] U_TRAILING_BACKSLASH │ │ + [ 1829e] U_INVALID_RBT_SYNTAX │ │ + [ 182b3] AUD │ │ + [ 182b7] BAM │ │ + [ 182bb] CLE │ │ + [ 182bf] KHR │ │ + [ 182c3] MGA │ │ + [ 182c7] MTL │ │ + [ 182cb] RHD │ │ + [ 182cf] SOS │ │ + [ 182d3] SYP │ │ + [ 182d7] scientificFormat │ │ + [ 182e8] M02L │ │ + [ 182ed] milligram-ofglucose-per-deciliter │ │ + [ 1830f] liter-per-100-kilometer │ │ + [ 18327] GNE │ │ + [ 1832b] petabyte │ │ + [ 18334] day-person │ │ + [ 1833f] kilowatt-hour │ │ + [ 1834d] earth-mass │ │ + [ 18358] pinch │ │ + [ 1835e] pow10- │ │ + [ 18365] compound │ │ + [ 1836e] unit-narrow │ │ + [ 1837a] /decimalFormat │ │ + [ 18389] yes │ │ + [ 1838d] ucadata │ │ + [ 18395] reset position maps to too many collation elements (more than 31) │ │ + [ 183d7] LDML forbids tailoring to U+FFFF │ │ + [ 183f8] lb_to_kg │ │ + [ 18401] speed_of_light_meters_per_second │ │ + [ 18422] AChoreographerFrameCallbackData_getPreferredFrameTimelineIndex │ │ + [ 18461] mPipelineModeAutoMode │ │ + [ 18477] Swappy: GPU frame time │ │ + [ 1848e] View too small to be split │ │ + [ 184a9] cannot switch from automatic to manual argument indexing │ │ + [ 184e2] {} must be an array of strings.\n │ │ + [ 18503] Target │ │ + [ 1850a] Error parsing favorites file.\n │ │ + [ 18529] Point size granularity: %s\n │ │ + [ 18545] {}\n │ │ + [ 1854d] inf │ │ + [ 18551] Time stopped │ │ + [ 18561] CHANNEL_TOP_BACK_LEFT │ │ + [ 18577] Too large │ │ + [ 18581] NULL Playback Device │ │ + [ 18596] Failed to retrieve data buffer connector. Unknown data supply type.\n │ │ + [ 185db] ICMT │ │ + [ 185e0] ^I │ │ + [ 185e3] URL must have at least mode and time!\n │ │ + [ 1860a] tsrc │ │ + [ 1860f] failed to format time │ │ + [ 18625] Jul │ │ + [ 18629] text │ │ + [ 1862e] azure │ │ + [ 18634] cadetblue │ │ + [ 1863e] cornsilk │ │ + [ 18647] gray │ │ + [ 1864c] maroon │ │ + [ 18653] .png │ │ + [ 18658] .ctx │ │ + [ 1865d] XI │ │ + [ 18660] TAU │ │ + [ 1866e] Comet │ │ + [ 18674] regio │ │ + [ 1867a] synchronous │ │ + [ 18686] filename │ │ + [ 1868f] longitude │ │ + [ 18699] downarrow │ │ + [ 186a3] row │ │ + [ 186a7] xoffset │ │ + [ 186af] colorbottom │ │ + [ 186bb] createchild │ │ + [ 186c7] getlinecolor │ │ + [ 186d4] getfaintestvisible │ │ + [ 186e7] getsystemtime │ │ + [ 186f5] No arguments expected for celestia:getrenderflags() │ │ + [ 18729] One argument expected for celestia:setfaintestvisible() │ │ + [ 18761] Argument to celestia:setstarstyle must be a string │ │ + [ 18794] First argument to celestia:seturl must be a string │ │ + [ 187c7] Function celestia:seekaudio requires two arguments │ │ + [ 187fa] mouseup │ │ + [ 18802] Oops, expected savedrenderflags to be userdata\n │ │ + [ 18832] class_phase │ │ + [ 1883e] No arguments expected for frame:getcoordinatesystem() │ │ + [ 18874] Begin │ │ + [ 1887a] TEXTURE_MIN_FILTER │ │ + [ 1888d] argument 4 to gl.Frustum must be a number │ │ + [ 188b7] argument 1 to gl.Vertex must be a number │ │ + [ 188e0] catalognumber │ │ + [ 188ee] globular │ │ + [ 188f7] First arg to observer:gotoobject must be object or position │ │ + [ 18933] Second arg to observer:gotodistance must be a number │ │ + [ 18968] Argument to observer:setpos must be a rotation │ │ + [ 18997] One argument expected to observer:getsurface() │ │ + [ 189c6] Bad vector addition! │ │ + [ 189db] Need two operands for sub │ │ + [ 189f5] hook thread failed\n │ │ + [ 18a09] emissivemap │ │ + [ 18a15] texcoord2 │ │ + [ 18a20] ganymede │ │ + [ 18a29] iapetus │ │ + [ 18a31] iau-mars │ │ + [ 18a3a] iau-jupiter │ │ + [ 18a46] colorTex │ │ + [ 18a4f] Error parsing asterism {} chain: expected string\n │ │ + [ 18a81] Aql │ │ + [ 18a85] Cae │ │ + [ 18a89] RA │ │ + [ 18a8c] GL_OES_vertex_array_object │ │ + [ 18aa7] AMD │ │ + [ 18aab] SU │ │ + [ 18aae] RotationPeriod │ │ + [ 18abd] PrecessionPeriod │ │ + [ 18ace] AU │ │ + [ 18ad1] GLSL │ │ + [ 18ad7] usesShadows = {}\n │ │ usesTangentSpaceLighting = {}\n │ │ hasEclipseShadows = {}\n │ │ hasRingShadows = {}\n │ │ hasSelfShadows = {}\n │ │ hasCloudShadows = {}\n │ │ hasSpecular = {}\n │ │ hasScattering = {}\n │ │ isViewDependent = {}\n │ │ lightModel = {:x}\n │ │ - [ 18ba1] diffTexCoord.x += textureOffset;\n │ │ - [ 18bc3] ringShadowLOD │ │ - [ 18bd1] float shadow;\n │ │ - [ 18be0] gl_FragColor += texture2D(nightTex, │ │ - [ 18c05] litSide │ │ - [ 18c0d] intensity = mix(intensity, intensity * (1.0 - opticalDepth), litSide);\n │ │ - [ 18c55] gl_FragColor = v_Color * texture2D(diffTex, gl_PointCoord);\n │ │ - [ 18c96] gl_FragColor = v_Color;\n │ │ - [ 18cb3] lineWidthY │ │ - [ 18cbe] specTex │ │ - [ 18cc6] light{}_halfVector │ │ - [ 18cd9] shadowTexCoord0 │ │ - [ 18ce9] in_ScaleFactor │ │ - [ 18cf9] if (cosNormalLightDir > 0.0)\n │ │ + [ 18bce] diffTexCoord.x += textureOffset;\n │ │ + [ 18bf0] ringShadowLOD │ │ + [ 18bfe] float shadow;\n │ │ + [ 18c0d] gl_FragColor += texture2D(nightTex, │ │ + [ 18c32] litSide │ │ + [ 18c3a] intensity = mix(intensity, intensity * (1.0 - opticalDepth), litSide);\n │ │ + [ 18c82] gl_FragColor = v_Color * texture2D(diffTex, gl_PointCoord);\n │ │ + [ 18cc3] gl_FragColor = v_Color;\n │ │ + [ 18ce0] lineWidthY │ │ + [ 18ceb] specTex │ │ + [ 18cf3] light{}_halfVector │ │ + [ 18d06] shadowTexCoord0 │ │ + [ 18d16] in_ScaleFactor │ │ + [ 18d26] if (cosNormalLightDir > 0.0)\n │ │ {{\n │ │ shadowMapCoeff = calculateShadow();\n │ │ diff.rgb *= shadowMapCoeff;\n │ │ {}\n │ │ }}\n │ │ - [ 18d6c] float distSun = -rq + d;\n │ │ - [ 18d8a] AltSurface │ │ - [ 18d95] Atmosphere must be an associative array.\n │ │ - [ 18dbf] CloudSpeed │ │ - [ 18dca] 6 │ │ - [ 18dcc] missing SpectralType on Star │ │ - [ 18de9] invalid filename in Texture │ │ - [ 18e05] Bad header for cross index\n │ │ - [ 18e21] Processing PointArray chunk\n │ │ - [ 18e3e] Processing MaterialMapname chunk\n │ │ - [ 18e60] Asteroids │ │ - [ 18e6a] Stopping renderer thread │ │ - [ 18e83] unmatched '}' in format string │ │ - [ 18ea2] Unknown Adobe color transform code %d │ │ - [ 18ec8] postscript-font-name │ │ - [ 18edd] random-seed │ │ - [ 18ee9] CharStrings │ │ - [ 18ef5] CIDFontType │ │ - [ 18f03] � │ │ - [ 18f0a] � │ │ - [ 18f13] � � │ │ - [ 18f1e] glyph-to-script-map │ │ - [ 18f32] StartKernData │ │ - [ 18f40] StartKernPairs1 │ │ - [ 18f50] VM handler failed: │ │ - [ 18f64] do │ │ - [ 18f67] │ │ - [ 18f6d] ;; │ │ - [ 18f70] %s.so │ │ - [ 18f76] invalid end points │ │ - [ 18f89] invalid length │ │ - [ 18f98] unexpected DeviceLink ICC profile class │ │ - [ 18fc0] gamma table being rebuilt │ │ - [ 18fda] 123456789 │ │ - [ 18fe4] ..Too many IDATs found │ │ - [ 18ffb] Read Error │ │ - [ 19006] gamma value │ │ - [ 19012] bad compression method │ │ - [ 19029] Insufficient memory for pCAL params │ │ - [ 1904d] Invalid iCCP compression method │ │ - [ 1906d] text chunk: out of memory │ │ - [ 19087] png_set_filler: inappropriate color type │ │ - [ 190b0] png_write_info was never called before png_write_row │ │ - [ 190e5] internal write transform logic error │ │ - [ 1910a] String "#" has length zero. │ │ - [ 19126] marker │ │ - [ 1912d] This Entry Point Contains No Executable Code │ │ - [ 1915a] Error Writing to Ephemeris File │ │ - [ 1917a] Name of Device Exceeds 128-Character Limit │ │ - [ 191a5] SPICE(KERNELVARNOTFOUND) │ │ - [ 191be] SPICE(NOSEGMENT) │ │ - [ 191cf] digits │ │ - [ 191d6] SPICE(NOMOREROOM) │ │ - [ 191e8] SPK │ │ - [ 191ec] DAF │ │ - [ 191f0] DAFOPN │ │ - [ 191f7] There is no file open with unit = # │ │ - [ 1921b] The file, '#', is not a DAF. │ │ - [ 19238] %s: end of file\n │ │ - [ 19249] cell │ │ - [ 1924e] DAFFA │ │ - [ 19254] #2 │ │ - [ 19257] │ │ + [ 18f9a] ;; │ │ + [ 18f9d] %s.so │ │ + [ 18fa3] invalid end points │ │ + [ 18fb6] invalid length │ │ + [ 18fc5] unexpected DeviceLink ICC profile class │ │ + [ 18fed] gamma table being rebuilt │ │ + [ 19007] 123456789 │ │ + [ 19011] ..Too many IDATs found │ │ + [ 19028] Read Error │ │ + [ 19033] gamma value │ │ + [ 1903f] bad compression method │ │ + [ 19056] Insufficient memory for pCAL params │ │ + [ 1907a] Invalid iCCP compression method │ │ + [ 1909a] text chunk: out of memory │ │ + [ 190b4] png_set_filler: inappropriate color type │ │ + [ 190dd] png_write_info was never called before png_write_row │ │ + [ 19112] internal write transform logic error │ │ + [ 19137] String "#" has length zero. │ │ + [ 19153] marker │ │ + [ 1915a] This Entry Point Contains No Executable Code │ │ + [ 19187] Error Writing to Ephemeris File │ │ + [ 191a7] Name of Device Exceeds 128-Character Limit │ │ + [ 191d2] SPICE(KERNELVARNOTFOUND) │ │ + [ 191eb] SPICE(NOSEGMENT) │ │ + [ 191fc] digits │ │ + [ 19203] SPICE(NOMOREROOM) │ │ + [ 19215] SPK │ │ + [ 19219] DAF │ │ + [ 1921d] DAFOPN │ │ + [ 19224] There is no file open with unit = # │ │ + [ 19248] The file, '#', is not a DAF. │ │ + [ 19265] %s: end of file\n │ │ + [ 19276] cell │ │ + [ 1927b] DAFFA │ │ + [ 19281] #2 │ │ + [ 19284] │ │ - [ 195a1] SPKUEF │ │ - [ 195a8] SPICE(EVECOUTOFRANGE) │ │ - [ 195be] The range of constants requested extends beyond the available constant data. Constants are available for indices 1 to #. You have requested data from # to #. │ │ - [ 1965f] SPKR05 │ │ - [ 19666] BODY │ │ - [ 1966b] TKFRAME_# │ │ - [ 19675] _MATRIX │ │ - [ 1967d] angles │ │ - [ 19684] SPICE(VARIABLENOTFOUND) │ │ - [ 1969c] < │ │ - [ 1969e] DELTET/M │ │ - [ 196a7] v1 │ │ - [ 196aa] zzbodtrn_ │ │ - [ 196b4] The kernel pool vector, #, used in mapping between names and ID-codes is absent, while # is not. This is often due to an improperly constructed text kernel. Check loaded kernels for these keywords. │ │ - [ 1977c] The kernel pool vectors used for mapping between names and ID-codes are not the same size. The size of the name vector, NAIF_BODY_NAME is #. The size of the ID-code vector, NAIF_BODY_CODE is #. You need to examine the ID-code kernel you loaded and correct the mismatch. │ │ - [ 1988b] ID to name mappings. │ │ - [ 198a0] ZZCTR: You have called an entry which performs performs no run-time function. This may indicate a bug. Please check the documentation for the subroutine ZZCTR. │ │ - [ 19940] SPICE(SPICEISTIRED) │ │ - [ 19954] Attempt to open file, '#', for read access has failed. The non-native binary file format '#' is not currently supported on this platform. Obtain a transfer format version, and convert it to the native format. See the Convert User's Guide for details. │ │ - [ 19a51] Error reading the file record from the binary DAF file '#'. IOSTAT = #. │ │ - [ 19a9a] FTP transfer error detected. This binary $, '#', has most likely been corrupted by an ASCII mode FTP transfer. Obtain the file using IMAGE or BINARY transfer mode from the source. │ │ - [ 19b4f] zzdskbsr_ │ │ - [ 19b59] itmra │ │ - [ 19b5f] itmdec │ │ - [ 19b66] Definition of frame # specifies nutation model #, which is not recognized. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 19c0f] ZZDYNROT │ │ - [ 19c18] DASRDC │ │ - [ 19c1f] File # has last d.p. address #; `top' = #. │ │ - [ 19c4a] Attempt to free non-existent DP page. Page number = #; valid range is 1:# │ │ - [ 19c94] ZZEKRD09 │ │ - [ 19c9d] Data pointer is corrupted. SEGNO = #; COLIDX = #; RECNO = #; EK = # │ │ - [ 19ce2] ZZEKSDEC │ │ - [ 19ceb] ZZEKSZ06 │ │ - [ 19cf4] page │ │ - [ 19cf9] Row vector index was #; valid range is 0:# │ │ - [ 19d24] C2F_CreateStr_Sig │ │ - [ 19d36] IAU_MOON │ │ - [ 19d3f] IAU_MIMAS │ │ - [ 19d49] IAU_OBERON │ │ - [ 19d54] IAU_CRESSIDA │ │ - [ 19d61] IAU_PORTIA │ │ - [ 19d6c] IAU_NAIAD │ │ - [ 19d76] IAU_VESTA │ │ - [ 19d80] IAU_HYDRA │ │ - [ 19d8a] Degenerate case. The # axis of body # is negative or zero. Please check the text PCK file. You should fix the # component of the kernel pool variable BODY#_RADII. │ │ - [ 19e30] ZZHSICHK │ │ - [ 19e39] ZZHASHI │ │ - [ 19e41] MERCURY BARYCENTER │ │ - [ 19e54] CHALDENE │ │ - [ 19e5d] IOCASTE │ │ - [ 19e65] IAPETUS │ │ - [ 19e6d] ATLAS │ │ - [ 19e73] IJIRAQ │ │ - [ 19e7a] NEREID │ │ - [ 19e81] BEAGLE 2 │ │ - [ 19e8a] MMO │ │ - [ 19e8e] CASSINI SIMULATION │ │ - [ 19ea1] SPP │ │ - [ 19ea5] TRACE GAS ORBITER │ │ - [ 19eb7] CHANDRAYAAN-2 ORBITER │ │ - [ 19ecd] CLUSTER 2 │ │ - [ 19ed7] HANEDA-CAMPOS │ │ - [ 19ee5] HERSCHEL-RIGOLLET │ │ - [ 19ef7] WOLF │ │ - [ 19efc] DSS-16 │ │ - [ 19f03] DSS-53 │ │ - [ 19f0a] ZZLDKER │ │ - [ 19f12] ::RND │ │ - [ 19f18] There are two successive delimiters <#> in the input string. This is an ambiguous input. ' │ │ - [ 19f75] ,/-:. │ │ - [ 19f7b] SPICE(TOOMANYPARTITIONS) │ │ - [ 19f94] The variable that points to the leapseconds (DELTET/DELTA_AT) could not be located in the kernel pool. It is likely that the leapseconds kernel has not been loaded. │ │ - [ 1a03a] ZZDSPR │ │ - [ 1a041] Stop time kernel variable # exists but DTPOOL returned data type # rather than one of the expected values: 'C' or 'N'. │ │ - [ 1a0b8] FORMAL │ │ - [ 1a0bf] Format pictures must have at least one significant character. The picture provided '#' does not. │ │ - [ 1a121] Year │ │ - [ 1a126] Time-Zone indicator │ │ - [ 1a13a] MONTH │ │ - [ 1a140] wkd │ │ - [ 1a144] WKD │ │ - [ 1a148] DECEMBER │ │ - [ 1a151] JULY │ │ - [ 1a156] UTC+ │ │ - [ 1a15b] JULIAND │ │ - [ 1a163] The meaning of the decimal number <#> could not be determined: │ │ - [ 1a1a3] Two substrings representing an hour of the day were identified in the input time string <#> and <#>: " │ │ - [ 1a20a] Y-i-iti:i:i │ │ - [ 1a216] Y*y*H*M*S │ │ - [ 1a220] YmDHMS │ │ - [ 1a227] i-Yd │ │ - [ 1a22c] i-i-iti:i:i │ │ - [ 1a238] i:i:imiY │ │ - [ 1a241] iimi:i:i │ │ - [ 1a24a] DmYH*M │ │ - [ 1a251] mnY │ │ - [ 1a255] nmY │ │ - [ 1a259] Y-i-iti:i:nx │ │ - [ 1a266] Y-iti:i:ix │ │ - [ 1a271] ; │ │ - [ 1a273] hyw │ │ - [ 1a277] zh__GUOYU │ │ - [ 1a281] av │ │ - [ 1a284] bkm │ │ - [ 1a288] cay │ │ - [ 1a28c] dyu │ │ - [ 1a290] ik │ │ - [ 1a293] kaa │ │ - [ 1a297] la │ │ - [ 1a29a] men │ │ - [ 1a29e] mic │ │ - [ 1a2a2] mnc │ │ - [ 1a2a6] na │ │ - [ 1a2a9] njo │ │ - [ 1a2ad] sly │ │ - [ 1a2b1] suk │ │ - [ 1a2b5] tok │ │ - [ 1a2b9] yao │ │ - [ 1a2bd] zza │ │ - [ 1a2c1] amh │ │ - [ 1a2c5] aze │ │ - [ 1a2c9] bak │ │ - [ 1a2cd] che │ │ - [ 1a2d1] eus │ │ - [ 1a2d5] gle │ │ - [ 1a2d9] sin │ │ - [ 1a2dd] AE │ │ - [ 1a2e0] BS │ │ - [ 1a2e3] CL │ │ - [ 1a2e6] CN │ │ - [ 1a2e9] EE │ │ - [ 1a2ec] KW │ │ - [ 1a2ef] PN │ │ - [ 1a2f2] SO │ │ - [ 1a2f5] UM │ │ - [ 1a2f8] BMU │ │ - [ 1a2fc] BLR │ │ - [ 1a300] DOM │ │ - [ 1a304] GUY │ │ - [ 1a308] MAC │ │ - [ 1a30c] NAM │ │ - [ 1a310] UKR │ │ - [ 1a314] ka_GE │ │ - [ 1a31a] lt_LT │ │ - [ 1a320] sl_SI │ │ - [ 1a326] yue_Hant │ │ - [ 1a32f] zh_Hant_TW │ │ - [ 1a33a] language │ │ - [ 1a343] VLAT │ │ - [ 1a348] bo_BT │ │ - [ 1a34e] es_PE │ │ - [ 1a354] es@collation=traditional │ │ - [ 1a36d] fr_ML │ │ - [ 1a373] iu_Latn_CA │ │ - [ 1a37e] ti_ET │ │ - [ 1a384] uz_Cyrl_UZ │ │ - [ 1a38f] CODEPOINTS │ │ - [ 1a39a] see-x-i-mingo │ │ - [ 1a3a8] sgn-fr │ │ - [ 1a3af] ures_swapResource(root res=%08x) failed\n │ │ - [ 1a3d8] ucol_swapInverseUCA(): data format %02x.%02x.%02x.%02x (format version %02x.%02x) is not an inverse UCA collation file\n │ │ - [ 1a450] @calendar=gregory │ │ - [ 1a462] tzdbNames │ │ - [ 1a46c] Scripts │ │ - [ 1a474] U_MULTIPLE_POST_CONTEXTS │ │ - [ 1a48d] U_PATTERN_SYNTAX_ERROR │ │ - [ 1a4a4] U_IDNA_DOMAIN_NAME_TOO_LONG_ERROR │ │ - [ 1a4c6] BAD │ │ - [ 1a4ca] BAN │ │ - [ 1a4ce] BRR │ │ - [ 1a4d2] KRH │ │ - [ 1a4d6] MYR │ │ - [ 1a4da] NAD │ │ - [ 1a4de] PYG │ │ - [ 1a4e2] QAR │ │ - [ 1a4e6] XAG │ │ - [ 1a4ea] ZRN │ │ - [ 1a4ee] M12L │ │ - [ 1a4f3] arc-minute │ │ - [ 1a4fe] CHC │ │ - [ 1a502] pound-force │ │ - [ 1a50e] fathom │ │ - [ 1a515] bushel │ │ - [ 1a51c] quart-imperial │ │ - [ 1a52b] approximatelySign │ │ - [ 1a53d] ew │ │ - [ 1a540] pow9- │ │ - [ 1a546] pow11- │ │ - [ 1a54d] giga │ │ - [ 1a552] hecto │ │ - [ 1a558] plural │ │ - [ 1a55f] er │ │ - [ 1a562] in 'prefix|str', prefix and str must each start with an NFC boundary │ │ - [ 1a5a7] [hiraganaQ on] is not supported │ │ - [ 1a5c7] first regular │ │ - [ 1a5d5] last regular │ │ - [ 1a5e2] ATrace_endSection │ │ - [ 1a5f4] ()Landroid/view/WindowManager; │ │ - [ 1a613] android/os/Build │ │ - [ 1a624] sounds │ │ - [ 1a62b] celsius │ │ - [ 1a633] StarDatabase │ │ - [ 1a640] LuaHook │ │ - [ 1a648] RotateAcceleration │ │ - [ 1a65b] L │ │ - [ 1a65d] Error parsing destinations file.\n │ │ - [ 1a67f] Name │ │ - [ 1a685] isFolder │ │ - [ 1a68f] Sync │ │ - [ 1a694] {:3d}:{:05.2f} │ │ - [ 1a6a3] {} �F │ │ - [ 1a6aa] %s backend is disabled.\n │ │ - [ 1a6c3] CHANNEL_AUX_1 │ │ - [ 1a6d1] Input/output error │ │ - [ 1a6e4] Resource already in use │ │ - [ 1a6fc] Invalid data │ │ - [ 1a709] Address family not supported │ │ - [ 1a726] Operation in progress │ │ - [ 1a73c] Failed to stop backend device │ │ - [ 1a75a] AAudioStream_waitForStateChange │ │ - [ 1a77a] slCreateEngine │ │ - [ 1a789] androidRecordingPreset │ │ - [ 1a7a0] [OpenSL] Failed to create audio player. │ │ - [ 1a7c8] RIFF │ │ - [ 1a7cd] bext │ │ - [ 1a7d2] ICOP │ │ - [ 1a7d7] %{:02x} │ │ - [ 1a7df] lm │ │ - [ 1a7e2] no format │ │ - [ 1a7ec] Sat │ │ - [ 1a7f0] Sunday │ │ - [ 1a7f7] darkgoldenrod │ │ - [ 1a805] indigo │ │ - [ 1a80c] lemonchiffon │ │ - [ 1a819] lightslategray │ │ - [ 1a828] peachpuff │ │ - [ 1a832] Alpha │ │ - [ 1a840] observatory │ │ - [ 1a84c] tholus │ │ - [ 1a853] scopulus │ │ - [ 1a85c] wait │ │ - [ 1a861] renderflags │ │ - [ 1a86d] scaleddiscs │ │ - [ 1a879] zrot │ │ - [ 1a87e] leftarrow │ │ - [ 1a888] show │ │ - [ 1a88d] setsafeareainsets │ │ - [ 1a89f] isplayingaudio │ │ - [ 1a8ae] Wrong number of arguments to celestia:hide │ │ - [ 1a8d9] No argument expected in celestia:getlayoutdirection │ │ - [ 1a90d] Invalid layoutDirection │ │ - [ 1a925] Fourth argument to celestia:setconstellationcolor() must be a table │ │ - [ 1a969] No argument expected to function celestia:getsystemtime │ │ - [ 1a9a1] arguments to celestia:newrotation must either be (vec, number) or four numbers │ │ - [ 1a9f0] Sixth argument to celestia:play must be a number (nopause) │ │ - [ 1aa2b] First argument for celestia:seekaudio must be a number │ │ - [ 1aa62] Celx_istype failed! Unregistered class.\n │ │ - [ 1aa8c] Error while executing cleanup-callback: {}\n │ │ - [ 1aab8] io │ │ - [ 1aabb] Bad frame object! │ │ - [ 1aacd] argument 2 to gl.BlendFunc must be a number │ │ - [ 1aaf9] Argument to object:addreferencemark() must be a table │ │ - [ 1ab2f] luminosity │ │ - [ 1ab3a] orbitPeriod │ │ - [ 1ab46] No arguments allowed for to object:equatorialframe │ │ - [ 1ab79] gotosurface │ │ - [ 1ab85] cancelgoto │ │ - [ 1ab90] getorientation │ │ - [ 1ab9f] getfov │ │ - [ 1aba6] finalOrientation │ │ - [ 1abb7] Second arg to observer:gotosurface must be a number │ │ - [ 1abeb] First argument to observer:centerorbit must be an object │ │ - [ 1ac24] setaxisangle: first argument must be a vector │ │ - [ 1ac52] Invalid access of rotation-component │ │ - [ 1ac77] #celmodel__ascii │ │ - [ 1ac88] pointsize │ │ - [ 1ac93] Texture coordinate must be a float2\n │ │ - [ 1acb8] native │ │ - [ 1acbf] iau-enceladus │ │ - [ 1accd] iau-io │ │ - [ 1acd4] Bad binary xyzv file {}.\n │ │ - [ 1acee] Cas │ │ - [ 1acf2] Ind │ │ - [ 1acf6] Sct │ │ - [ 1acfa] Angle │ │ - [ 1ad00] E7 │ │ - [ 1ad03] SF │ │ - [ 1ad06] Could not load SPICE orbit\n │ │ - [ 1ad22] EquatorAscendingNode │ │ - [ 1ad37] Ending specified for SPICE orbit, but beginning is missing.\n │ │ - [ 1ad74] AscendingNode │ │ - [ 1ad82] Roll │ │ - [ 1ad87] Object has incorrect J2000 equator frame syntax.\n │ │ - [ 1adb9] n.z = sqrt(1.0 - n.x * n.x - n.y * n.y);\n │ │ - [ 1ade3] shadow │ │ - [ 1adea] v_Color = vec4({}, opacity);\n │ │ - [ 1ae0c] mieCoeff │ │ - [ 1ae15] light{}_diffuse │ │ - [ 1ae25] vec4 │ │ - [ 1ae2a] samplerCube │ │ - [ 1ae36] ) - 0.5;\n │ │ - [ 1ae40] shadowR = clamp((2.0 * sqrt(dot(shadowCenter, shadowCenter)) - 1.0) * │ │ - [ 1ae87] Sky │ │ - [ 1ae8b] SpecularColor │ │ - [ 1ae99] NormalMap │ │ - [ 1aea3] 8 │ │ - [ 1aea5] 9 │ │ - [ 1aea7] {} {} A │ │ - [ 1aeaf] Loading bump map: {}\n │ │ - [ 1aec5] dds │ │ - [ 1aec9] level{:d} │ │ - [ 1aed3] ImageDirectory │ │ - [ 1aee2] TileSize is missing from virtual texture\n │ │ - [ 1af0c] Error skipping {} bytes of unknown/unexpected chunk type {}\n │ │ - [ 1af49] Processing MaterialSpecular chunk\n │ │ - [ 1af6c] Content size {} too small to include integer perecentage\n │ │ - [ 1afa6] (DDDD)V │ │ - [ 1afae] space/celestia/celestia/Selection │ │ - [ 1afd0] cannot use push_back() with │ │ - [ 1afee] msgid │ │ - [ 1aff5] C.UTF-8 │ │ - [ 1affd] Type 1 │ │ - [ 1b004] .resource/ │ │ - [ 1b00f] pshinter │ │ - [ 1b018] Black │ │ - [ 1b01e] def │ │ - [ 1b022] SDBytes │ │ - [ 1b02d] � � │ │ - [ 1b03a] StartTrackKern │ │ - [ 1b049] %s │ │ - [ 1b04c] │ │ - [ 1b053] != │ │ - [ 1b057] set^Ccur^Cend │ │ - [ 1b063] file (closed) │ │ - [ 1b071] loaded │ │ - [ 1b078] >%s │ │ - [ 1b07c] Gray color space not permitted on RGB PNG │ │ - [ 1b0a6] Missing IHDR before IDAT │ │ - [ 1b0bf] png_do_quantize returned rowbytes=0 │ │ - [ 1b0e3] invalid before the PNG header has been read │ │ - [ 1b10f] unrecognized equation type │ │ - [ 1b12a] chunk data is too large │ │ - [ 1b142] cHRM White X │ │ - [ 1b14f] cHRM Red Y │ │ - [ 1b15a] Insufficient memory for hIST chunk data │ │ - [ 1b182] too many unknown chunks │ │ - [ 1b19a] keyword truncated │ │ - [ 1b1ac] png_image_write_to_file: invalid argument │ │ - [ 1b1d6] tEXt: text too long │ │ - [ 1b1ea] in use by IDAT │ │ - [ 1b1f9] BODN2C │ │ - [ 1b200] ERRACT: An invalid value of OP was supplied. The value was: │ │ - [ 1b23f] An Attempt to Open a File Failed │ │ - [ 1b260] SPICE(TOOMANYFILESOPEN) │ │ - [ 1b278] $ │ │ - [ 1b27a] CKBSR │ │ - [ 1b280] At least one CK file must be loaded by CKLPF before beginning a search. │ │ - [ 1b2c8] ftnd │ │ - [ 1b2cd] unformatted io not allowed │ │ - [ 1b2e8] %s: illegal error number %d\n │ │ - [ 1b305] DAFRN │ │ - [ 1b30b] rbdat │ │ - [ 1b311] DAFWCR │ │ - [ 1b318] tbfils │ │ - [ 1b31f] MISSING_COLUMN │ │ - [ 1b32e] segvec │ │ - [ 1b335] SCRATCH │ │ - [ 1b33d] DASHFN │ │ - [ 1b344] DASURC │ │ - [ 1b34b] Invalid data type: #. │ │ - [ 1b362] NODE was #; backward pointer = #; forward pointer = #. "FREE" is #) │ │ - [ 1b3a6] btprvi │ │ - [ 1b3ad] CLPOOL │ │ - [ 1b3b4] datlst │ │ - [ 1b3bb] SPICE(INTOUTOFRANGE) │ │ - [ 1b3d0] DTPOOL │ │ - [ 1b3d7] Trying to remove non-existent elements. │ │ - [ 1b3ff] IRFROT │ │ - [ 1b406] The reference frame with id-code # is not a recognized inertial reference frame. │ │ - [ 1b458] The segment is not a type 1 segment. Type is # │ │ - [ 1b488] SPICE(INVALIDVALUE) │ │ - [ 1b49c] DTOL should be non-negative; it is #. │ │ - [ 1b4c2] prodm │ │ - [ 1b4c8] SGFRVI │ │ - [ 1b4cf] SPKGEO │ │ - [ 1b4d6] OBS │ │ - [ 1b4da] FRMCHG │ │ - [ 1b4e1] B.C. │ │ - [ 1b4e8] kq │ │ - [ 1b4eb] SPICE(ZEROVELOCITY) │ │ - [ 1b4ff] NUT_PREC_RA │ │ - [ 1b50b] Insufficient number of nutation/precession angles for body * at time #. Number of angles is #; number required is #. │ │ - [ 1b580] bna │ │ - [ 1b584] bnw │ │ - [ 1b588] _Q │ │ - [ 1b58b] SPICE(UNKNOWNCOMPARE) │ │ - [ 1b5a1] SETC │ │ - [ 1b5a6] WNINSD │ │ - [ 1b5ad] complex format │ │ - [ 1b5bc] kernam │ │ - [ 1b5c3] ID │ │ - [ 1b5c6] ZZDDHMAN │ │ - [ 1b5cf] utlck │ │ - [ 1b5d5] ftabs │ │ - [ 1b5db] zzddhppf_ │ │ - [ 1b5e5] stdlad │ │ - [ 1b5ec] DEF_STYLE │ │ - [ 1b5f6] PARAMETERIZED │ │ - [ 1b604] SPICE(NOTANINTEGER) │ │ - [ 1b618] The A,B, and C axes were #, #, and # respectively. │ │ - [ 1b64b] The input vectors AXDEF and PLNDEF are linearly dependent. │ │ - [ 1b686] Cross product table index for right hand side of constraint # was #; valid range is 1:# │ │ - [ 1b6de] ZZEKRP2N │ │ - [ 1b6e7] ZZEKSZ04 │ │ - [ 1b6f0] SPICE(VERSIONMISMATCH1) │ │ - [ 1b708] SPICE(VERSIONMISMATCH2) │ │ - [ 1b720] IAU_TETHYS │ │ - [ 1b72b] IAU_IAPETUS │ │ - [ 1b737] IAU_ATLAS │ │ - [ 1b741] IAU_CERES │ │ - [ 1b74b] IAU_LEUCUS │ │ - [ 1b756] SATURN BARYCENTER │ │ - [ 1b768] HIMALIA │ │ - [ 1b770] TAYGETE │ │ - [ 1b778] THELXINOE │ │ - [ 1b782] SIARNAQ │ │ - [ 1b78a] SYCORAX │ │ - [ 1b792] MARS ORBITER MISSION │ │ - [ 1b7a7] PIONEER 12 │ │ - [ 1b7b2] DS-1 │ │ - [ 1b7b7] VOYAGER 1 │ │ - [ 1b7c1] ORX │ │ - [ 1b7c5] MARS OBSERVER │ │ - [ 1b7d3] BEPICOLOMBO MPO │ │ - [ 1b7e3] CHANDRAYAAN-2 LANDER │ │ - [ 1b7f8] IMAGE │ │ - [ 1b7fe] VIPER │ │ - [ 1b804] SHOEMAKER-LEVY 9-Q │ │ - [ 1b817] SHOEMAKER-LEVY 9-P │ │ - [ 1b82a] SHOEMAKER-LEVY 9-H │ │ - [ 1b83d] HOWELL │ │ - [ 1b844] LONGMORE │ │ - [ 1b84d] PATROCLUS BARYCENTER │ │ - [ 1b862] DIDYMOS_BARYCENTER │ │ - [ 1b875] PATROCLUS │ │ - [ 1b87f] DSS-05 │ │ - [ 1b886] DSS-23 │ │ - [ 1b88d] The latter is a CK frame; a CK file containing data for instrument or structure # at the epoch shown above, as well as a corresponding SCLK kernel, must be loaded in order to use this frame. │ │ - [ 1b94c] SPICE(NEGATIVEHASHVALUE2) │ │ - [ 1b966] i.i │ │ - [ 1b96a] Ye │ │ - [ 1b96d] A.M. │ │ - [ 1b972] i:i:i │ │ - [ 1b978] Smi │ │ - [ 1b97c] The numbers of partition start times # and stop times # are unequal for spacecraft clock #. │ │ - [ 1b9d8] Kernel variable # for spacecraft clock # does not have numeric type. │ │ - [ 1ba1d] sclu01_ │ │ - [ 1ba25] XXSGP4I │ │ - [ 1ba2d] ZZSPKLT1 │ │ - [ 1ba36] FRAME_#_CLASS_ID │ │ - [ 1ba47] FRAME_# │ │ - [ 1ba4f] The specified item '#' is not a recognized time default item. The items that you may "SET" via the routine TIMDEF are 'CALENDAR', 'SYSTEM', or 'ZONE' │ │ - [ 1bae7] zztime_ │ │ - [ 1baef] The input time string '#' cannot be processed because the internal picture describing it requires more than @ characters. The token that could not be processed was '#'. │ │ - [ 1bb98] weekday │ │ - [ 1bba0] SUNDAY │ │ - [ 1bba7] MM │ │ - [ 1bbaa] No numeric components were supplied in the time string. │ │ - [ 1bbe3] There is more than one Julian Date specified in the epoch string. │ │ - [ 1bc26] H*MDmY │ │ - [ 1bc2d] imiin │ │ - [ 1bc33] miYi:i:i │ │ - [ 1bc3c] i/i/ii:n │ │ - [ 1bc45] zzwahr_ │ │ - [ 1bc4d] VN │ │ - [ 1bc50] cop │ │ - [ 1bc54] csw │ │ - [ 1bc58] eo │ │ - [ 1bc5b] frp │ │ - [ 1bc5f] kri │ │ - [ 1bc63] liv │ │ - [ 1bc67] loz │ │ - [ 1bc6b] moh │ │ - [ 1bc6f] nn │ │ - [ 1bc72] pms │ │ - [ 1bc76] sc │ │ - [ 1bc79] was │ │ - [ 1bc7d] yav │ │ - [ 1bc81] ara │ │ - [ 1bc85] epo │ │ - [ 1bc89] ido │ │ - [ 1bc8d] por │ │ - [ 1bc91] mol │ │ - [ 1bc95] BQ │ │ - [ 1bc98] BT │ │ - [ 1bc9b] EH │ │ - [ 1bc9e] IM │ │ - [ 1bca1] PF │ │ - [ 1bca4] SD │ │ - [ 1bca7] ARG │ │ - [ 1bcab] BOL │ │ - [ 1bcaf] XIC │ │ - [ 1bcb3] KWT │ │ - [ 1bcb7] MNP │ │ - [ 1bcbb] RWA │ │ - [ 1bcbf] TUN │ │ - [ 1bcc3] TTO │ │ - [ 1bcc7] uprv_asciiFromEbcdic() string[%d] contains a variant character in position %d\n │ │ - [ 1bd16] as_IN │ │ - [ 1bd1c] eu_ES │ │ - [ 1bd22] fr_FR │ │ - [ 1bd28] ga_IE │ │ - [ 1bd2e] pa_IN │ │ - [ 1bd34] WST │ │ - [ 1bd38] EASST │ │ - [ 1bd3e] az_Cyrl_AZ │ │ - [ 1bd49] ba_RU │ │ - [ 1bd4f] en_SG │ │ - [ 1bd55] es_GT │ │ - [ 1bd5b] fr_LU │ │ - [ 1bd61] hr_BA │ │ - [ 1bd67] kl_GL │ │ - [ 1bd6d] ko_KP │ │ - [ 1bd73] pa_PK │ │ - [ 1bd79] en-gb-oxendict │ │ - [ 1bd88] ssp │ │ - [ 1bd8c] gss │ │ - [ 1bd90] zh-gan │ │ - [ 1bd97] calendar/gregorian/DateTimePatterns%atTime │ │ - [ 1bdc2] afternoon2 │ │ - [ 1bdcd] islamic │ │ - [ 1bdd5] Zones │ │ - [ 1bddb] Keys │ │ - [ 1bde0] icu │ │ - [ 1bde4] unorm2_swap(): too few bytes (%d after header) for Normalizer2 data\n │ │ - [ 1be29] U_TOO_MANY_ALIASES_ERROR │ │ - [ 1be42] U_BRK_SEMICOLON_EXPECTED │ │ - [ 1be5b] AON │ │ - [ 1be5f] ATS │ │ - [ 1be63] DDM │ │ - [ 1be67] LSL │ │ - [ 1be6b] USN │ │ - [ 1be6f] sNaN │ │ - [ 1be74] @calendar=chinese │ │ - [ 1be86] degree │ │ - [ 1be8d] UGW │ │ - [ 1be91] VNC │ │ - [ 1be95] microsecond │ │ - [ 1bea1] quarter │ │ - [ 1bea9] dot-per-centimeter │ │ - [ 1bebc] picometer │ │ - [ 1bec6] tonne │ │ - [ 1becc] millimeter-ofhg │ │ - [ 1bedc] milliliter │ │ - [ 1bee7] quart │ │ - [ 1beed] oblique │ │ - [ 1bef5] %%.%dfe%%d │ │ - [ 1bf00] milli │ │ - [ 1bf06] cf │ │ - [ 1bf09] colNumeric │ │ - [ 1bf14] upper │ │ - [ 1bf1a] expected a reset or setting or comment │ │ - [ 1bf41] starred-relation string is not all NFD-inert │ │ - [ 1bf6e] unknown script or reorder code │ │ - [ 1bf8d] last trailing │ │ - [ 1bf9b] ExemplarCharactersIndex │ │ - [ 1bfb3] PaperSize │ │ - [ 1bfbd] nSetSupportedRefreshPeriods │ │ - [ 1bfd9] static void swappy::SwappyGL::setBufferStuffingFixWait(int32_t) │ │ - [ 1c019] eglGetError │ │ - [ 1c025] frame latency: │ │ - [ 1c042] Initialization of SPICE library failed. │ │ - [ 1c06a] frame center direction │ │ - [ 1c081] Unable to open log file {}\n │ │ - [ 1c09d] C-{:c} │ │ - [ 1c0a4] invalid format string │ │ - [ 1c0ba] Cursor │ │ - [ 1c0c2] coordsys " │ │ - [ 1c0cd] Max simultaneous textures: %s\n │ │ - [ 1c0ec] true │ │ - [ 1c0f1] {}x{} at {:.2f} fps {} │ │ - [ 1c109] Radius: {} ({} � {} � {})\n │ │ - [ 1c126] ERROR │ │ - [ 1c12c] Loading library: %s\n │ │ - [ 1c141] Failed to start backend device │ │ - [ 1c160] mp3 │ │ - [ 1c164] Failed to load file "%s". %s.\n │ │ - [ 1c183] AAudioStreamBuilder_setPerformanceMode │ │ - [ 1c1aa] AAudioStreamBuilder_setAllowedCapturePolicy │ │ - [ 1c1d6] IGNR │ │ - [ 1c1db] string_view::substr │ │ - [ 1c1ef] Freeflight │ │ - [ 1c1fa] January │ │ - [ 1c202] November │ │ - [ 1c20b] forestgreen │ │ - [ 1c217] mistyrose │ │ - [ 1c221] sienna │ │ - [ 1c228] wheat │ │ - [ 1c22e] .dxt5nm │ │ - [ 1c236] XDG_DATA_HOME │ │ - [ 1c244] cloudshadows │ │ - [ 1c251] mons │ │ - [ 1c256] mensa │ │ - [ 1c25c] linea │ │ - [ 1c262] farrum │ │ - [ 1c269] follow │ │ - [ 1c270] settextcolor │ │ - [ 1c27d] setlinecolor │ │ - [ 1c28a] lock │ │ - [ 1c28f] colorbottomright │ │ - [ 1c2a0] FOV │ │ - [ 1c2a4] Argument of category:createchild must be a string or userdata! │ │ - [ 1c2e3] getwindowdimension │ │ - [ 1c2f6] setambient │ │ - [ 1c301] setstarstyle │ │ - [ 1c30e] One argument expected for celestia:setscreendpi() │ │ - [ 1c340] No arguments expected for celestia:getorbitflags() │ │ - [ 1c373] Argument to celestia:showconstellations() must be a table │ │ - [ 1c3ad] No arguments expected for celestia:getminfeaturesize() │ │ - [ 1c3e4] First argument to celestia:takescreenshot must be a string │ │ - [ 1c41f] No argument expected for celestia:getscriptpath() │ │ - [ 1c451] First argument to celestia:verbosity must be a number (level) │ │ - [ 1c48f] Sixth argument to celestia:playaudio must be a boolean │ │ - [ 1c4c6] Function celestia:setaudiovolume requires two arguments │ │ - [ 1c4fe] One argument required for celestia:setluahook() │ │ - [ 1c52e] Internal Error: Invalid LuaState-pointer │ │ - [ 1c557] math │ │ - [ 1c55c] TexCoord │ │ - [ 1c565] [Texture:{}x{}] │ │ - [ 1c575] No arguments expected for texture:getwidth() │ │ - [ 1c5a2] component │ │ - [ 1c5ac] featureType │ │ - [ 1c5b8] No arguments expected to function object:localname │ │ - [ 1c5eb] Time expected as argument to object:getposition │ │ - [ 1c61b] centerorbit │ │ - [ 1c627] Second arg to observer:gotoobject must be a number │ │ - [ 1c65a] Third arg to observer:gotoobject must be a number │ │ - [ 1c68c] Sixth argument to observer:gotolonglat must be a vector │ │ - [ 1c6c4] First arg to observer:gotodistance must be object │ │ - [ 1c6f6] No argument expected to observer:getfov() │ │ - [ 1c720] First argument to observer:follow must be an object │ │ - [ 1c754] Argument to observer:setframe must be a frame │ │ - [ 1c782] specularmap │ │ - [ 1c78e] # {}\n │ │ - [ 1c794] f3\n │ │ - [ 1c798] uranus │ │ - [ 1c79f] vsop87-venus │ │ - [ 1c7ac] iau-mimas │ │ - [ 1c7b6] iau-rhea │ │ - [ 1c7bf] {:02}{} │ │ - [ 1c7c8] Aps │ │ - [ 1c7cc] Phe │ │ - [ 1c7d0] Detail │ │ - [ 1c7d7] models/SBb.png │ │ - [ 1c7e6] GL_EXT_texture_compression_s3tc │ │ - [ 1c806] KingConcentration │ │ - [ 1c818] City │ │ - [ 1c81d] RU │ │ - [ 1c820] LF │ │ - [ 1c823] MN │ │ - [ 1c826] XX │ │ - [ 1c829] UN │ │ - [ 1c82c] VS │ │ - [ 1c82f] Unknown model format '{}'\n │ │ - [ 1c84a] SpiceRotation │ │ - [ 1c858] Function name missing from script orbit definition.\n │ │ - [ 1c88d] MeanLongitude │ │ - [ 1c89b] Freeze │ │ - [ 1c8a3] void main(void)\n │ │ + [ 1956b] Attempt to set cardinality of cell to invalid value. The value was #. │ │ + [ 195b2] cmptks │ │ + [ 195b9] SGMETA │ │ + [ 195c0] TRACEBACK │ │ + [ 195ca] --> │ │ + [ 195ce] SPKUEF │ │ + [ 195d5] SPICE(EVECOUTOFRANGE) │ │ + [ 195eb] The range of constants requested extends beyond the available constant data. Constants are available for indices 1 to #. You have requested data from # to #. │ │ + [ 1968c] SPKR05 │ │ + [ 19693] BODY │ │ + [ 19698] TKFRAME_# │ │ + [ 196a2] _MATRIX │ │ + [ 196aa] angles │ │ + [ 196b1] SPICE(VARIABLENOTFOUND) │ │ + [ 196c9] < │ │ + [ 196cb] DELTET/M │ │ + [ 196d4] v1 │ │ + [ 196d7] zzbodtrn_ │ │ + [ 196e1] The kernel pool vector, #, used in mapping between names and ID-codes is absent, while # is not. This is often due to an improperly constructed text kernel. Check loaded kernels for these keywords. │ │ + [ 197a9] The kernel pool vectors used for mapping between names and ID-codes are not the same size. The size of the name vector, NAIF_BODY_NAME is #. The size of the ID-code vector, NAIF_BODY_CODE is #. You need to examine the ID-code kernel you loaded and correct the mismatch. │ │ + [ 198b8] ID to name mappings. │ │ + [ 198cd] ZZCTR: You have called an entry which performs performs no run-time function. This may indicate a bug. Please check the documentation for the subroutine ZZCTR. │ │ + [ 1996d] SPICE(SPICEISTIRED) │ │ + [ 19981] Attempt to open file, '#', for read access has failed. The non-native binary file format '#' is not currently supported on this platform. Obtain a transfer format version, and convert it to the native format. See the Convert User's Guide for details. │ │ + [ 19a7e] Error reading the file record from the binary DAF file '#'. IOSTAT = #. │ │ + [ 19ac7] FTP transfer error detected. This binary $, '#', has most likely been corrupted by an ASCII mode FTP transfer. Obtain the file using IMAGE or BINARY transfer mode from the source. │ │ + [ 19b7c] zzdskbsr_ │ │ + [ 19b86] itmra │ │ + [ 19b8c] itmdec │ │ + [ 19b93] Definition of frame # specifies nutation model #, which is not recognized. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 19c3c] ZZDYNROT │ │ + [ 19c45] DASRDC │ │ + [ 19c4c] File # has last d.p. address #; `top' = #. │ │ + [ 19c77] Attempt to free non-existent DP page. Page number = #; valid range is 1:# │ │ + [ 19cc1] ZZEKRD09 │ │ + [ 19cca] Data pointer is corrupted. SEGNO = #; COLIDX = #; RECNO = #; EK = # │ │ + [ 19d0f] ZZEKSDEC │ │ + [ 19d18] ZZEKSZ06 │ │ + [ 19d21] page │ │ + [ 19d26] Row vector index was #; valid range is 0:# │ │ + [ 19d51] C2F_CreateStr_Sig │ │ + [ 19d63] IAU_MOON │ │ + [ 19d6c] IAU_MIMAS │ │ + [ 19d76] IAU_OBERON │ │ + [ 19d81] IAU_CRESSIDA │ │ + [ 19d8e] IAU_PORTIA │ │ + [ 19d99] IAU_NAIAD │ │ + [ 19da3] IAU_VESTA │ │ + [ 19dad] IAU_HYDRA │ │ + [ 19db7] Degenerate case. The # axis of body # is negative or zero. Please check the text PCK file. You should fix the # component of the kernel pool variable BODY#_RADII. │ │ + [ 19e5d] ZZHSICHK │ │ + [ 19e66] ZZHASHI │ │ + [ 19e6e] MERCURY BARYCENTER │ │ + [ 19e81] CHALDENE │ │ + [ 19e8a] IOCASTE │ │ + [ 19e92] IAPETUS │ │ + [ 19e9a] ATLAS │ │ + [ 19ea0] IJIRAQ │ │ + [ 19ea7] NEREID │ │ + [ 19eae] BEAGLE 2 │ │ + [ 19eb7] MMO │ │ + [ 19ebb] CASSINI SIMULATION │ │ + [ 19ece] SPP │ │ + [ 19ed2] TRACE GAS ORBITER │ │ + [ 19ee4] CHANDRAYAAN-2 ORBITER │ │ + [ 19efa] CLUSTER 2 │ │ + [ 19f04] HANEDA-CAMPOS │ │ + [ 19f12] HERSCHEL-RIGOLLET │ │ + [ 19f24] WOLF │ │ + [ 19f29] DSS-16 │ │ + [ 19f30] DSS-53 │ │ + [ 19f37] ZZLDKER │ │ + [ 19f3f] ::RND │ │ + [ 19f45] There are two successive delimiters <#> in the input string. This is an ambiguous input. ' │ │ + [ 19fa2] ,/-:. │ │ + [ 19fa8] SPICE(TOOMANYPARTITIONS) │ │ + [ 19fc1] The variable that points to the leapseconds (DELTET/DELTA_AT) could not be located in the kernel pool. It is likely that the leapseconds kernel has not been loaded. │ │ + [ 1a067] ZZDSPR │ │ + [ 1a06e] Stop time kernel variable # exists but DTPOOL returned data type # rather than one of the expected values: 'C' or 'N'. │ │ + [ 1a0e5] FORMAL │ │ + [ 1a0ec] Format pictures must have at least one significant character. The picture provided '#' does not. │ │ + [ 1a14e] Year │ │ + [ 1a153] Time-Zone indicator │ │ + [ 1a167] MONTH │ │ + [ 1a16d] wkd │ │ + [ 1a171] WKD │ │ + [ 1a175] DECEMBER │ │ + [ 1a17e] JULY │ │ + [ 1a183] UTC+ │ │ + [ 1a188] JULIAND │ │ + [ 1a190] The meaning of the decimal number <#> could not be determined: │ │ + [ 1a1d0] Two substrings representing an hour of the day were identified in the input time string <#> and <#>: " │ │ + [ 1a237] Y-i-iti:i:i │ │ + [ 1a243] Y*y*H*M*S │ │ + [ 1a24d] YmDHMS │ │ + [ 1a254] i-Yd │ │ + [ 1a259] i-i-iti:i:i │ │ + [ 1a265] i:i:imiY │ │ + [ 1a26e] iimi:i:i │ │ + [ 1a277] DmYH*M │ │ + [ 1a27e] mnY │ │ + [ 1a282] nmY │ │ + [ 1a286] Y-i-iti:i:nx │ │ + [ 1a293] Y-iti:i:ix │ │ + [ 1a29e] ; │ │ + [ 1a2a0] hyw │ │ + [ 1a2a4] zh__GUOYU │ │ + [ 1a2ae] av │ │ + [ 1a2b1] bkm │ │ + [ 1a2b5] cay │ │ + [ 1a2b9] dyu │ │ + [ 1a2bd] ik │ │ + [ 1a2c0] kaa │ │ + [ 1a2c4] la │ │ + [ 1a2c7] men │ │ + [ 1a2cb] mic │ │ + [ 1a2cf] mnc │ │ + [ 1a2d3] na │ │ + [ 1a2d6] njo │ │ + [ 1a2da] sly │ │ + [ 1a2de] suk │ │ + [ 1a2e2] tok │ │ + [ 1a2e6] yao │ │ + [ 1a2ea] zza │ │ + [ 1a2ee] amh │ │ + [ 1a2f2] aze │ │ + [ 1a2f6] bak │ │ + [ 1a2fa] che │ │ + [ 1a2fe] eus │ │ + [ 1a302] gle │ │ + [ 1a306] sin │ │ + [ 1a30a] AE │ │ + [ 1a30d] BS │ │ + [ 1a310] CL │ │ + [ 1a313] CN │ │ + [ 1a316] EE │ │ + [ 1a319] KW │ │ + [ 1a31c] PN │ │ + [ 1a31f] SO │ │ + [ 1a322] UM │ │ + [ 1a325] BMU │ │ + [ 1a329] BLR │ │ + [ 1a32d] DOM │ │ + [ 1a331] GUY │ │ + [ 1a335] MAC │ │ + [ 1a339] NAM │ │ + [ 1a33d] UKR │ │ + [ 1a341] ka_GE │ │ + [ 1a347] lt_LT │ │ + [ 1a34d] sl_SI │ │ + [ 1a353] yue_Hant │ │ + [ 1a35c] zh_Hant_TW │ │ + [ 1a367] language │ │ + [ 1a370] VLAT │ │ + [ 1a375] bo_BT │ │ + [ 1a37b] es_PE │ │ + [ 1a381] es@collation=traditional │ │ + [ 1a39a] fr_ML │ │ + [ 1a3a0] iu_Latn_CA │ │ + [ 1a3ab] ti_ET │ │ + [ 1a3b1] uz_Cyrl_UZ │ │ + [ 1a3bc] CODEPOINTS │ │ + [ 1a3c7] see-x-i-mingo │ │ + [ 1a3d5] sgn-fr │ │ + [ 1a3dc] ures_swapResource(root res=%08x) failed\n │ │ + [ 1a405] ucol_swapInverseUCA(): data format %02x.%02x.%02x.%02x (format version %02x.%02x) is not an inverse UCA collation file\n │ │ + [ 1a47d] @calendar=gregory │ │ + [ 1a48f] tzdbNames │ │ + [ 1a499] Scripts │ │ + [ 1a4a1] U_MULTIPLE_POST_CONTEXTS │ │ + [ 1a4ba] U_PATTERN_SYNTAX_ERROR │ │ + [ 1a4d1] U_IDNA_DOMAIN_NAME_TOO_LONG_ERROR │ │ + [ 1a4f3] BAD │ │ + [ 1a4f7] BAN │ │ + [ 1a4fb] BRR │ │ + [ 1a4ff] KRH │ │ + [ 1a503] MYR │ │ + [ 1a507] NAD │ │ + [ 1a50b] PYG │ │ + [ 1a50f] QAR │ │ + [ 1a513] XAG │ │ + [ 1a517] ZRN │ │ + [ 1a51b] M12L │ │ + [ 1a520] arc-minute │ │ + [ 1a52b] CHC │ │ + [ 1a52f] pound-force │ │ + [ 1a53b] fathom │ │ + [ 1a542] bushel │ │ + [ 1a549] quart-imperial │ │ + [ 1a558] approximatelySign │ │ + [ 1a56a] ew │ │ + [ 1a56d] pow9- │ │ + [ 1a573] pow11- │ │ + [ 1a57a] giga │ │ + [ 1a57f] hecto │ │ + [ 1a585] plural │ │ + [ 1a58c] er │ │ + [ 1a58f] in 'prefix|str', prefix and str must each start with an NFC boundary │ │ + [ 1a5d4] [hiraganaQ on] is not supported │ │ + [ 1a5f4] first regular │ │ + [ 1a602] last regular │ │ + [ 1a60f] ATrace_endSection │ │ + [ 1a621] ()Landroid/view/WindowManager; │ │ + [ 1a640] android/os/Build │ │ + [ 1a651] sounds │ │ + [ 1a658] celsius │ │ + [ 1a660] StarDatabase │ │ + [ 1a66d] LuaHook │ │ + [ 1a675] RotateAcceleration │ │ + [ 1a688] L │ │ + [ 1a68a] Error parsing destinations file.\n │ │ + [ 1a6ac] Name │ │ + [ 1a6b2] isFolder │ │ + [ 1a6bc] Sync │ │ + [ 1a6c1] {:3d}:{:05.2f} │ │ + [ 1a6d0] {} �F │ │ + [ 1a6d7] %s backend is disabled.\n │ │ + [ 1a6f0] CHANNEL_AUX_1 │ │ + [ 1a6fe] Input/output error │ │ + [ 1a711] Resource already in use │ │ + [ 1a729] Invalid data │ │ + [ 1a736] Address family not supported │ │ + [ 1a753] Operation in progress │ │ + [ 1a769] Failed to stop backend device │ │ + [ 1a787] AAudioStream_waitForStateChange │ │ + [ 1a7a7] slCreateEngine │ │ + [ 1a7b6] androidRecordingPreset │ │ + [ 1a7cd] [OpenSL] Failed to create audio player. │ │ + [ 1a7f5] RIFF │ │ + [ 1a7fa] bext │ │ + [ 1a7ff] ICOP │ │ + [ 1a804] %{:02x} │ │ + [ 1a80c] lm │ │ + [ 1a80f] no format │ │ + [ 1a819] Sat │ │ + [ 1a81d] Sunday │ │ + [ 1a824] darkgoldenrod │ │ + [ 1a832] indigo │ │ + [ 1a839] lemonchiffon │ │ + [ 1a846] lightslategray │ │ + [ 1a855] peachpuff │ │ + [ 1a85f] Alpha │ │ + [ 1a86d] observatory │ │ + [ 1a879] tholus │ │ + [ 1a880] scopulus │ │ + [ 1a889] wait │ │ + [ 1a88e] renderflags │ │ + [ 1a89a] scaleddiscs │ │ + [ 1a8a6] zrot │ │ + [ 1a8ab] leftarrow │ │ + [ 1a8b5] show │ │ + [ 1a8ba] setsafeareainsets │ │ + [ 1a8cc] isplayingaudio │ │ + [ 1a8db] Wrong number of arguments to celestia:hide │ │ + [ 1a906] No argument expected in celestia:getlayoutdirection │ │ + [ 1a93a] Invalid layoutDirection │ │ + [ 1a952] Fourth argument to celestia:setconstellationcolor() must be a table │ │ + [ 1a996] No argument expected to function celestia:getsystemtime │ │ + [ 1a9ce] arguments to celestia:newrotation must either be (vec, number) or four numbers │ │ + [ 1aa1d] Sixth argument to celestia:play must be a number (nopause) │ │ + [ 1aa58] First argument for celestia:seekaudio must be a number │ │ + [ 1aa8f] Celx_istype failed! Unregistered class.\n │ │ + [ 1aab9] Error while executing cleanup-callback: {}\n │ │ + [ 1aae5] io │ │ + [ 1aae8] Bad frame object! │ │ + [ 1aafa] argument 2 to gl.BlendFunc must be a number │ │ + [ 1ab26] Argument to object:addreferencemark() must be a table │ │ + [ 1ab5c] luminosity │ │ + [ 1ab67] orbitPeriod │ │ + [ 1ab73] No arguments allowed for to object:equatorialframe │ │ + [ 1aba6] gotosurface │ │ + [ 1abb2] cancelgoto │ │ + [ 1abbd] getorientation │ │ + [ 1abcc] getfov │ │ + [ 1abd3] finalOrientation │ │ + [ 1abe4] Second arg to observer:gotosurface must be a number │ │ + [ 1ac18] First argument to observer:centerorbit must be an object │ │ + [ 1ac51] setaxisangle: first argument must be a vector │ │ + [ 1ac7f] Invalid access of rotation-component │ │ + [ 1aca4] #celmodel__ascii │ │ + [ 1acb5] pointsize │ │ + [ 1acc0] Texture coordinate must be a float2\n │ │ + [ 1ace5] native │ │ + [ 1acec] iau-enceladus │ │ + [ 1acfa] iau-io │ │ + [ 1ad01] Bad binary xyzv file {}.\n │ │ + [ 1ad1b] Cas │ │ + [ 1ad1f] Ind │ │ + [ 1ad23] Sct │ │ + [ 1ad27] Angle │ │ + [ 1ad2d] E7 │ │ + [ 1ad30] SF │ │ + [ 1ad33] Could not load SPICE orbit\n │ │ + [ 1ad4f] EquatorAscendingNode │ │ + [ 1ad64] Ending specified for SPICE orbit, but beginning is missing.\n │ │ + [ 1ada1] AscendingNode │ │ + [ 1adaf] Roll │ │ + [ 1adb4] Object has incorrect J2000 equator frame syntax.\n │ │ + [ 1ade6] n.z = sqrt(1.0 - n.x * n.x - n.y * n.y);\n │ │ + [ 1ae10] shadow │ │ + [ 1ae17] v_Color = vec4({}, opacity);\n │ │ + [ 1ae39] mieCoeff │ │ + [ 1ae42] light{}_diffuse │ │ + [ 1ae52] vec4 │ │ + [ 1ae57] samplerCube │ │ + [ 1ae63] ) - 0.5;\n │ │ + [ 1ae6d] shadowR = clamp((2.0 * sqrt(dot(shadowCenter, shadowCenter)) - 1.0) * │ │ + [ 1aeb4] Sky │ │ + [ 1aeb8] SpecularColor │ │ + [ 1aec6] NormalMap │ │ + [ 1aed0] 8 │ │ + [ 1aed2] 9 │ │ + [ 1aed4] {} {} A │ │ + [ 1aedc] Loading bump map: {}\n │ │ + [ 1aef2] dds │ │ + [ 1aef6] level{:d} │ │ + [ 1af00] ImageDirectory │ │ + [ 1af0f] TileSize is missing from virtual texture\n │ │ + [ 1af39] Error skipping {} bytes of unknown/unexpected chunk type {}\n │ │ + [ 1af76] Processing MaterialSpecular chunk\n │ │ + [ 1af99] Content size {} too small to include integer perecentage\n │ │ + [ 1afd3] (DDDD)V │ │ + [ 1afdb] space/celestia/celestia/Selection │ │ + [ 1affd] cannot use push_back() with │ │ + [ 1b01b] msgid │ │ + [ 1b022] C.UTF-8 │ │ + [ 1b02a] Type 1 │ │ + [ 1b031] .resource/ │ │ + [ 1b03c] pshinter │ │ + [ 1b045] Black │ │ + [ 1b04b] def │ │ + [ 1b04f] SDBytes │ │ + [ 1b05a] � � │ │ + [ 1b067] StartTrackKern │ │ + [ 1b076] %s │ │ + [ 1b079] │ │ + [ 1b080] != │ │ + [ 1b084] set^Ccur^Cend │ │ + [ 1b090] file (closed) │ │ + [ 1b09e] loaded │ │ + [ 1b0a5] >%s │ │ + [ 1b0a9] Gray color space not permitted on RGB PNG │ │ + [ 1b0d3] Missing IHDR before IDAT │ │ + [ 1b0ec] png_do_quantize returned rowbytes=0 │ │ + [ 1b110] invalid before the PNG header has been read │ │ + [ 1b13c] unrecognized equation type │ │ + [ 1b157] chunk data is too large │ │ + [ 1b16f] cHRM White X │ │ + [ 1b17c] cHRM Red Y │ │ + [ 1b187] Insufficient memory for hIST chunk data │ │ + [ 1b1af] too many unknown chunks │ │ + [ 1b1c7] keyword truncated │ │ + [ 1b1d9] png_image_write_to_file: invalid argument │ │ + [ 1b203] tEXt: text too long │ │ + [ 1b217] in use by IDAT │ │ + [ 1b226] BODN2C │ │ + [ 1b22d] ERRACT: An invalid value of OP was supplied. The value was: │ │ + [ 1b26c] An Attempt to Open a File Failed │ │ + [ 1b28d] SPICE(TOOMANYFILESOPEN) │ │ + [ 1b2a5] $ │ │ + [ 1b2a7] CKBSR │ │ + [ 1b2ad] At least one CK file must be loaded by CKLPF before beginning a search. │ │ + [ 1b2f5] ftnd │ │ + [ 1b2fa] unformatted io not allowed │ │ + [ 1b315] %s: illegal error number %d\n │ │ + [ 1b332] DAFRN │ │ + [ 1b338] rbdat │ │ + [ 1b33e] DAFWCR │ │ + [ 1b345] tbfils │ │ + [ 1b34c] MISSING_COLUMN │ │ + [ 1b35b] segvec │ │ + [ 1b362] SCRATCH │ │ + [ 1b36a] DASHFN │ │ + [ 1b371] DASURC │ │ + [ 1b378] Invalid data type: #. │ │ + [ 1b38f] NODE was #; backward pointer = #; forward pointer = #. "FREE" is #) │ │ + [ 1b3d3] btprvi │ │ + [ 1b3da] CLPOOL │ │ + [ 1b3e1] datlst │ │ + [ 1b3e8] SPICE(INTOUTOFRANGE) │ │ + [ 1b3fd] DTPOOL │ │ + [ 1b404] Trying to remove non-existent elements. │ │ + [ 1b42c] IRFROT │ │ + [ 1b433] The reference frame with id-code # is not a recognized inertial reference frame. │ │ + [ 1b485] The segment is not a type 1 segment. Type is # │ │ + [ 1b4b5] SPICE(INVALIDVALUE) │ │ + [ 1b4c9] DTOL should be non-negative; it is #. │ │ + [ 1b4ef] prodm │ │ + [ 1b4f5] SGFRVI │ │ + [ 1b4fc] SPKGEO │ │ + [ 1b503] OBS │ │ + [ 1b507] FRMCHG │ │ + [ 1b50e] B.C. │ │ + [ 1b515] kq │ │ + [ 1b518] SPICE(ZEROVELOCITY) │ │ + [ 1b52c] NUT_PREC_RA │ │ + [ 1b538] Insufficient number of nutation/precession angles for body * at time #. Number of angles is #; number required is #. │ │ + [ 1b5ad] bna │ │ + [ 1b5b1] bnw │ │ + [ 1b5b5] _Q │ │ + [ 1b5b8] SPICE(UNKNOWNCOMPARE) │ │ + [ 1b5ce] SETC │ │ + [ 1b5d3] WNINSD │ │ + [ 1b5da] complex format │ │ + [ 1b5e9] kernam │ │ + [ 1b5f0] ID │ │ + [ 1b5f3] ZZDDHMAN │ │ + [ 1b5fc] utlck │ │ + [ 1b602] ftabs │ │ + [ 1b608] zzddhppf_ │ │ + [ 1b612] stdlad │ │ + [ 1b619] DEF_STYLE │ │ + [ 1b623] PARAMETERIZED │ │ + [ 1b631] SPICE(NOTANINTEGER) │ │ + [ 1b645] The A,B, and C axes were #, #, and # respectively. │ │ + [ 1b678] The input vectors AXDEF and PLNDEF are linearly dependent. │ │ + [ 1b6b3] Cross product table index for right hand side of constraint # was #; valid range is 1:# │ │ + [ 1b70b] ZZEKRP2N │ │ + [ 1b714] ZZEKSZ04 │ │ + [ 1b71d] SPICE(VERSIONMISMATCH1) │ │ + [ 1b735] SPICE(VERSIONMISMATCH2) │ │ + [ 1b74d] IAU_TETHYS │ │ + [ 1b758] IAU_IAPETUS │ │ + [ 1b764] IAU_ATLAS │ │ + [ 1b76e] IAU_CERES │ │ + [ 1b778] IAU_LEUCUS │ │ + [ 1b783] SATURN BARYCENTER │ │ + [ 1b795] HIMALIA │ │ + [ 1b79d] TAYGETE │ │ + [ 1b7a5] THELXINOE │ │ + [ 1b7af] SIARNAQ │ │ + [ 1b7b7] SYCORAX │ │ + [ 1b7bf] MARS ORBITER MISSION │ │ + [ 1b7d4] PIONEER 12 │ │ + [ 1b7df] DS-1 │ │ + [ 1b7e4] VOYAGER 1 │ │ + [ 1b7ee] ORX │ │ + [ 1b7f2] MARS OBSERVER │ │ + [ 1b800] BEPICOLOMBO MPO │ │ + [ 1b810] CHANDRAYAAN-2 LANDER │ │ + [ 1b825] IMAGE │ │ + [ 1b82b] VIPER │ │ + [ 1b831] SHOEMAKER-LEVY 9-Q │ │ + [ 1b844] SHOEMAKER-LEVY 9-P │ │ + [ 1b857] SHOEMAKER-LEVY 9-H │ │ + [ 1b86a] HOWELL │ │ + [ 1b871] LONGMORE │ │ + [ 1b87a] PATROCLUS BARYCENTER │ │ + [ 1b88f] DIDYMOS_BARYCENTER │ │ + [ 1b8a2] PATROCLUS │ │ + [ 1b8ac] DSS-05 │ │ + [ 1b8b3] DSS-23 │ │ + [ 1b8ba] The latter is a CK frame; a CK file containing data for instrument or structure # at the epoch shown above, as well as a corresponding SCLK kernel, must be loaded in order to use this frame. │ │ + [ 1b979] SPICE(NEGATIVEHASHVALUE2) │ │ + [ 1b993] i.i │ │ + [ 1b997] Ye │ │ + [ 1b99a] A.M. │ │ + [ 1b99f] i:i:i │ │ + [ 1b9a5] Smi │ │ + [ 1b9a9] The numbers of partition start times # and stop times # are unequal for spacecraft clock #. │ │ + [ 1ba05] Kernel variable # for spacecraft clock # does not have numeric type. │ │ + [ 1ba4a] sclu01_ │ │ + [ 1ba52] XXSGP4I │ │ + [ 1ba5a] ZZSPKLT1 │ │ + [ 1ba63] FRAME_#_CLASS_ID │ │ + [ 1ba74] FRAME_# │ │ + [ 1ba7c] The specified item '#' is not a recognized time default item. The items that you may "SET" via the routine TIMDEF are 'CALENDAR', 'SYSTEM', or 'ZONE' │ │ + [ 1bb14] zztime_ │ │ + [ 1bb1c] The input time string '#' cannot be processed because the internal picture describing it requires more than @ characters. The token that could not be processed was '#'. │ │ + [ 1bbc5] weekday │ │ + [ 1bbcd] SUNDAY │ │ + [ 1bbd4] MM │ │ + [ 1bbd7] No numeric components were supplied in the time string. │ │ + [ 1bc10] There is more than one Julian Date specified in the epoch string. │ │ + [ 1bc53] H*MDmY │ │ + [ 1bc5a] imiin │ │ + [ 1bc60] miYi:i:i │ │ + [ 1bc69] i/i/ii:n │ │ + [ 1bc72] zzwahr_ │ │ + [ 1bc7a] VN │ │ + [ 1bc7d] cop │ │ + [ 1bc81] csw │ │ + [ 1bc85] eo │ │ + [ 1bc88] frp │ │ + [ 1bc8c] kri │ │ + [ 1bc90] liv │ │ + [ 1bc94] loz │ │ + [ 1bc98] moh │ │ + [ 1bc9c] nn │ │ + [ 1bc9f] pms │ │ + [ 1bca3] sc │ │ + [ 1bca6] was │ │ + [ 1bcaa] yav │ │ + [ 1bcae] ara │ │ + [ 1bcb2] epo │ │ + [ 1bcb6] ido │ │ + [ 1bcba] por │ │ + [ 1bcbe] mol │ │ + [ 1bcc2] BQ │ │ + [ 1bcc5] BT │ │ + [ 1bcc8] EH │ │ + [ 1bccb] IM │ │ + [ 1bcce] PF │ │ + [ 1bcd1] SD │ │ + [ 1bcd4] ARG │ │ + [ 1bcd8] BOL │ │ + [ 1bcdc] XIC │ │ + [ 1bce0] KWT │ │ + [ 1bce4] MNP │ │ + [ 1bce8] RWA │ │ + [ 1bcec] TUN │ │ + [ 1bcf0] TTO │ │ + [ 1bcf4] uprv_asciiFromEbcdic() string[%d] contains a variant character in position %d\n │ │ + [ 1bd43] as_IN │ │ + [ 1bd49] eu_ES │ │ + [ 1bd4f] fr_FR │ │ + [ 1bd55] ga_IE │ │ + [ 1bd5b] pa_IN │ │ + [ 1bd61] WST │ │ + [ 1bd65] EASST │ │ + [ 1bd6b] az_Cyrl_AZ │ │ + [ 1bd76] ba_RU │ │ + [ 1bd7c] en_SG │ │ + [ 1bd82] es_GT │ │ + [ 1bd88] fr_LU │ │ + [ 1bd8e] hr_BA │ │ + [ 1bd94] kl_GL │ │ + [ 1bd9a] ko_KP │ │ + [ 1bda0] pa_PK │ │ + [ 1bda6] en-gb-oxendict │ │ + [ 1bdb5] ssp │ │ + [ 1bdb9] gss │ │ + [ 1bdbd] zh-gan │ │ + [ 1bdc4] calendar/gregorian/DateTimePatterns%atTime │ │ + [ 1bdef] afternoon2 │ │ + [ 1bdfa] islamic │ │ + [ 1be02] Zones │ │ + [ 1be08] Keys │ │ + [ 1be0d] icu │ │ + [ 1be11] unorm2_swap(): too few bytes (%d after header) for Normalizer2 data\n │ │ + [ 1be56] U_TOO_MANY_ALIASES_ERROR │ │ + [ 1be6f] U_BRK_SEMICOLON_EXPECTED │ │ + [ 1be88] AON │ │ + [ 1be8c] ATS │ │ + [ 1be90] DDM │ │ + [ 1be94] LSL │ │ + [ 1be98] USN │ │ + [ 1be9c] sNaN │ │ + [ 1bea1] @calendar=chinese │ │ + [ 1beb3] degree │ │ + [ 1beba] UGW │ │ + [ 1bebe] VNC │ │ + [ 1bec2] microsecond │ │ + [ 1bece] quarter │ │ + [ 1bed6] dot-per-centimeter │ │ + [ 1bee9] picometer │ │ + [ 1bef3] tonne │ │ + [ 1bef9] millimeter-ofhg │ │ + [ 1bf09] milliliter │ │ + [ 1bf14] quart │ │ + [ 1bf1a] oblique │ │ + [ 1bf22] %%.%dfe%%d │ │ + [ 1bf2d] milli │ │ + [ 1bf33] cf │ │ + [ 1bf36] colNumeric │ │ + [ 1bf41] upper │ │ + [ 1bf47] expected a reset or setting or comment │ │ + [ 1bf6e] starred-relation string is not all NFD-inert │ │ + [ 1bf9b] unknown script or reorder code │ │ + [ 1bfba] last trailing │ │ + [ 1bfc8] ExemplarCharactersIndex │ │ + [ 1bfe0] PaperSize │ │ + [ 1bfea] nSetSupportedRefreshPeriods │ │ + [ 1c006] static void swappy::SwappyGL::setBufferStuffingFixWait(int32_t) │ │ + [ 1c046] eglGetError │ │ + [ 1c052] frame latency: │ │ + [ 1c06f] Initialization of SPICE library failed. │ │ + [ 1c097] frame center direction │ │ + [ 1c0ae] Unable to open log file {}\n │ │ + [ 1c0ca] C-{:c} │ │ + [ 1c0d1] invalid format string │ │ + [ 1c0e7] Cursor │ │ + [ 1c0ef] coordsys " │ │ + [ 1c0fa] Max simultaneous textures: %s\n │ │ + [ 1c119] true │ │ + [ 1c11e] {}x{} at {:.2f} fps {} │ │ + [ 1c136] Radius: {} ({} � {} � {})\n │ │ + [ 1c153] ERROR │ │ + [ 1c159] Loading library: %s\n │ │ + [ 1c16e] Failed to start backend device │ │ + [ 1c18d] mp3 │ │ + [ 1c191] Failed to load file "%s". %s.\n │ │ + [ 1c1b0] AAudioStreamBuilder_setPerformanceMode │ │ + [ 1c1d7] AAudioStreamBuilder_setAllowedCapturePolicy │ │ + [ 1c203] IGNR │ │ + [ 1c208] string_view::substr │ │ + [ 1c21c] Freeflight │ │ + [ 1c227] January │ │ + [ 1c22f] November │ │ + [ 1c238] forestgreen │ │ + [ 1c244] mistyrose │ │ + [ 1c24e] sienna │ │ + [ 1c255] wheat │ │ + [ 1c25b] .dxt5nm │ │ + [ 1c263] XDG_DATA_HOME │ │ + [ 1c271] cloudshadows │ │ + [ 1c27e] mons │ │ + [ 1c283] mensa │ │ + [ 1c289] linea │ │ + [ 1c28f] farrum │ │ + [ 1c296] follow │ │ + [ 1c29d] settextcolor │ │ + [ 1c2aa] setlinecolor │ │ + [ 1c2b7] lock │ │ + [ 1c2bc] colorbottomright │ │ + [ 1c2cd] FOV │ │ + [ 1c2d1] Argument of category:createchild must be a string or userdata! │ │ + [ 1c310] getwindowdimension │ │ + [ 1c323] setambient │ │ + [ 1c32e] setstarstyle │ │ + [ 1c33b] One argument expected for celestia:setscreendpi() │ │ + [ 1c36d] No arguments expected for celestia:getorbitflags() │ │ + [ 1c3a0] Argument to celestia:showconstellations() must be a table │ │ + [ 1c3da] No arguments expected for celestia:getminfeaturesize() │ │ + [ 1c411] First argument to celestia:takescreenshot must be a string │ │ + [ 1c44c] No argument expected for celestia:getscriptpath() │ │ + [ 1c47e] First argument to celestia:verbosity must be a number (level) │ │ + [ 1c4bc] Sixth argument to celestia:playaudio must be a boolean │ │ + [ 1c4f3] Function celestia:setaudiovolume requires two arguments │ │ + [ 1c52b] One argument required for celestia:setluahook() │ │ + [ 1c55b] Internal Error: Invalid LuaState-pointer │ │ + [ 1c584] math │ │ + [ 1c589] TexCoord │ │ + [ 1c592] [Texture:{}x{}] │ │ + [ 1c5a2] No arguments expected for texture:getwidth() │ │ + [ 1c5cf] component │ │ + [ 1c5d9] featureType │ │ + [ 1c5e5] No arguments expected to function object:localname │ │ + [ 1c618] Time expected as argument to object:getposition │ │ + [ 1c648] centerorbit │ │ + [ 1c654] Second arg to observer:gotoobject must be a number │ │ + [ 1c687] Third arg to observer:gotoobject must be a number │ │ + [ 1c6b9] Sixth argument to observer:gotolonglat must be a vector │ │ + [ 1c6f1] First arg to observer:gotodistance must be object │ │ + [ 1c723] No argument expected to observer:getfov() │ │ + [ 1c74d] First argument to observer:follow must be an object │ │ + [ 1c781] Argument to observer:setframe must be a frame │ │ + [ 1c7af] specularmap │ │ + [ 1c7bb] # {}\n │ │ + [ 1c7c1] f3\n │ │ + [ 1c7c5] uranus │ │ + [ 1c7cc] vsop87-venus │ │ + [ 1c7d9] iau-mimas │ │ + [ 1c7e3] iau-rhea │ │ + [ 1c7ec] {:02}{} │ │ + [ 1c7f5] Aps │ │ + [ 1c7f9] Phe │ │ + [ 1c7fd] Detail │ │ + [ 1c804] models/SBb.png │ │ + [ 1c813] GL_EXT_texture_compression_s3tc │ │ + [ 1c833] KingConcentration │ │ + [ 1c845] City │ │ + [ 1c84a] RU │ │ + [ 1c84d] LF │ │ + [ 1c850] MN │ │ + [ 1c853] XX │ │ + [ 1c856] UN │ │ + [ 1c859] VS │ │ + [ 1c85c] Unknown model format '{}'\n │ │ + [ 1c877] SpiceRotation │ │ + [ 1c885] Function name missing from script orbit definition.\n │ │ + [ 1c8ba] MeanLongitude │ │ + [ 1c8c8] Freeze │ │ + [ 1c8d0] void main(void)\n │ │ {\n │ │ - [ 1c8b6] emissiveTexCoord = │ │ - [ 1c8ca] = (length(ringShadowProj - ringCenter) - ringRadius) * ringWidth;\n │ │ - [ 1c90e] lunarLambert │ │ - [ 1c91b] pointFade │ │ - [ 1c925] .st).ag * 2.0 - vec2(1.0);\n │ │ - [ 1c941] )));\n │ │ - [ 1c947] color = texture2D(diffTex, gl_PointCoord);\n │ │ - [ 1c973] // buildAtmosphereVertexShader\n │ │ - [ 1c993] * texture2D(diffTex, v_TexCoord0.st);\n │ │ - [ 1c9bb] texCoordDelta{} │ │ - [ 1c9cc] vec4 calc_vp(vec4 in_Position)\n │ │ + [ 1c8e3] emissiveTexCoord = │ │ + [ 1c8f7] = (length(ringShadowProj - ringCenter) - ringRadius) * ringWidth;\n │ │ + [ 1c93b] lunarLambert │ │ + [ 1c948] pointFade │ │ + [ 1c952] .st).ag * 2.0 - vec2(1.0);\n │ │ + [ 1c96e] )));\n │ │ + [ 1c974] color = texture2D(diffTex, gl_PointCoord);\n │ │ + [ 1c9a0] // buildAtmosphereVertexShader\n │ │ + [ 1c9c0] * texture2D(diffTex, v_TexCoord0.st);\n │ │ + [ 1c9e8] texCoordDelta{} │ │ + [ 1c9f9] vec4 calc_vp(vec4 in_Position)\n │ │ {\n │ │ float PID2 = 1.570796326794896619231322;\n │ │ vec4 inPos = ModelViewMatrix * in_Position;\n │ │ float l = length(inPos.xy);\n │ │ if (l != 0.0)\n │ │ {\n │ │ float phi = atan(l, -inPos.z);\n │ │ @@ -5583,5832 +5584,5831 @@ │ │ }\n │ │ return ProjectionMatrix * inPos;\n │ │ }\n │ │ void set_vp(vec4 in_Position)\n │ │ {\n │ │ gl_Position = calc_vp(in_Position);\n │ │ }\n │ │ - [ 1cb65] set_vp(in_Position);\n │ │ - [ 1cb7f] NL = max(0.0, dot(N, │ │ - [ 1cb95] triangles_adjacency │ │ - [ 1cba9] bad alternate surface │ │ - [ 1cbbf] Error: Ending is required for all timeline phases other than the final one.\n │ │ - [ 1cc0c] MeshCenter │ │ - [ 1cc17] Invalid filename in OverlayTexture\n │ │ - [ 1cc3b] TYC {}-{}-{} │ │ - [ 1cc48] ignoring RA/Dec/Distance in favor of Position │ │ - [ 1cc76] - {} │ │ - [ 1cc7c] {}{} {}{} │ │ - [ 1cc86] Loading texture: {}\n │ │ - [ 1cc9b] dxt5nm │ │ - [ 1cca2] TileType │ │ - [ 1ccab] Failed to read chunk size\n │ │ - [ 1ccc6] Failed to read point array count\n │ │ - [ 1cce8] java/lang/String │ │ - [ 1ccf9] getObjectType │ │ - [ 1cd07] LANG │ │ - [ 1cd0c] zh_Hans │ │ - [ 1cd14] o │ │ - [ 1cd16] LC_MONETARY │ │ - [ 1cd22] LC_MESSAGES │ │ - [ 1cd2e] Invalid component ID %d in SOS │ │ - [ 1cd4d] Write to EMS failed │ │ - [ 1cd61] Huffman table 0x%02x was not defined │ │ - [ 1cd86] Invalid JPEG file structure: two SOF markers │ │ - [ 1cdb3] Define Arithmetic Table 0x%02x: 0x%02x │ │ - [ 1cdda] sfnt-table │ │ - [ 1cde5] ISOLatin1Encoding │ │ - [ 1cdf7] StartData │ │ - [ 1ce01] (Hex) │ │ - [ 1ce07] %!PS-TrueTypeFont │ │ - [ 1ce19] Windows FNT │ │ - [ 1ce25] RAW_SUBSCRIPT_X │ │ - [ 1ce35] RESOLUTION │ │ - [ 1ce40] flip_y │ │ - [ 1ce47] EndCharMetrics │ │ - [ 1ce56] EndKernData │ │ - [ 1ce62] __index__newindex__gc__mode__eq__len__lt__le__concat__call__add__sub__mul__div__mod__pow__unm__metatable__tostring__new__pairs__ipairs │ │ - [ 1ceeb] ... │ │ - [ 1ceef] .. │ │ - [ 1cef2] │ │ - [ 1ceff] kv │ │ - [ 1cf03] full^Dline^Bno │ │ - [ 1cf10] cpath │ │ - [ 1cf16] path too long │ │ - [ 1cf24] nups │ │ - [ 1cf29] unexpected end of LZ stream │ │ - [ 1cf45] invalid ICC profile color space │ │ - [ 1cf65] Image height exceeds user limit in IHDR │ │ - [ 1cf8d] libpng error: %s │ │ - [ 1cf9e] png_image_begin_read_from_memory: incorrect PNG_IMAGE_VERSION │ │ - [ 1cfdc] rgb-alpha color-map: too few entries │ │ - [ 1d001] color-map index out of range │ │ - [ 1d01e] png_set_background │ │ - [ 1d031] ignoring out of range rgb_to_gray coefficients │ │ - [ 1d060] libpng does not support gamma+background+rgb_to_gray │ │ - [ 1d095] invalid background gamma type │ │ - [ 1d0b3] bKGD must be after │ │ - [ 1d0c6] forcing save of an unhandled chunk; please call png_set_keep_unknown_chunks │ │ - [ 1d112] cHRM Red Z │ │ - [ 1d11d] Insufficient memory for pCAL purpose │ │ - [ 1d142] Invalid sCAL height ignored │ │ - [ 1d15e] Insufficient memory to process iCCP profile │ │ - [ 1d18a] zTXt: invalid compression type │ │ - [ 1d1a9] SPICE(CELLTOOSMALL) │ │ - [ 1d1bd] SPICE(INVALIDLISTITEM) │ │ - [ 1d1d4] SPICE(NAMETABLEFULL) │ │ - [ 1d1e9] The SPICELIB Limit for Number of Open Files Has Already Been Reached │ │ - [ 1d22e] Cardinality of Window Is Too Small to Contain Result of the Requested Operation │ │ - [ 1d27e] @ │ │ - [ 1d280] itprvd │ │ - [ 1d287] OLD SEGMENTS │ │ - [ 1d294] last format: %s\n │ │ - [ 1d2a5] SPICE(DAFNOSUCHADDR) │ │ - [ 1d2ba] syserr │ │ - [ 1d2c1] DAFRDR │ │ - [ 1d2c8] SPICE(DAFDPWRITEFAIL) │ │ - [ 1d2de] tbctpt │ │ - [ 1d2e5] The index # does not correspond to a loaded table. │ │ - [ 1d318] DASHFS │ │ - [ 1d31f] SPICE(PCKFILETABLEFULL) │ │ - [ 1d337] There is no room available for adding another character value to the kernel pool. │ │ - [ 1d389] SPICE(KERNELPOOLFULL) │ │ - [ 1d39f] ZZVUPOOL │ │ - [ 1d3a8] \begintext │ │ - [ 1d3b3] bnmidx │ │ - [ 1d3ba] IETH │ │ - [ 1d3bf] The input string is blank. Blank strings are not considered to be numbers. │ │ - [ 1d40b] SPICE(UNKNOWNCKMETA) │ │ - [ 1d420] ARCH │ │ - [ 1d425] TXT │ │ - [ 1d429] tframe │ │ - [ 1d430] spke21_ │ │ - [ 1d438] REMLAD │ │ - [ 1d43f] STPOOL │ │ - [ 1d446] BODY#_CONSTANTS_REF_FRAME │ │ - [ 1d460] Maximum phase angle degree for body # must be in the range 1:# but was #. │ │ - [ 1d4aa] The Text Kernel (TK) frame with ID code # does not have a recognized name. │ │ - [ 1d4f6] Names Overflowed> │ │ - [ 1d508] UNITIM │ │ - [ 1d50f] window │ │ - [ 1d516] exponent field │ │ - [ 1d525] Total number of name/ID mappings: │ │ - [ 1d548] The binary file format, '#', is not supported by this version of the toolkit. This is a serious problem, contact NAIF. │ │ - [ 1d5bf] The attempt to load file '#' as a # has failed because it is already loaded as a #. │ │ - [ 1d613] There are less files in the file table than units in the unit table, and no row with a zero-valued handle can be found. This should never occur. │ │ - [ 1d6a5] The integer code, '#' indicating the file architecture to examine is out of range. │ │ - [ 1d6f8] A request to load the # file, $, has been made by the % system. This operation is not permitted. │ │ - [ 1d75a] ZZCOREPC │ │ - [ 1d763] conmap │ │ - [ 1d76a] zzekreqi_ │ │ - [ 1d774] ZZEKPGIN │ │ - [ 1d77d] End address END was #; valid range is 1:# │ │ - [ 1d7a7] IAU_PLUTO │ │ - [ 1d7b1] IAU_LYSITHEA │ │ - [ 1d7be] IAU_MENOETIUS │ │ - [ 1d7cc] The reference frame # has class #. This form of reference frame is not supported in version # of ZZFRMGT0. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ - [ 1d89a] SOLAR SYSTEM BARYCENTER │ │ - [ 1d8b2] EARTH-MOON BARYCENTER │ │ - [ 1d8c8] SATURN_BARYCENTER │ │ - [ 1d8da] NEPTUNE_BARYCENTER │ │ - [ 1d8ed] PAN │ │ - [ 1d8f1] THRYMR │ │ - [ 1d8f8] CUPID │ │ - [ 1d8fe] JUICE │ │ - [ 1d904] CLEMENTINE │ │ - [ 1d90f] LUNAR ICECUBE │ │ - [ 1d91d] GIOTTO │ │ - [ 1d924] EXOMARS 2016 TGO │ │ - [ 1d935] INSIGHT │ │ - [ 1d93d] RSAT │ │ - [ 1d942] SHOEMAKER-LEVY 9-G │ │ - [ 1d955] SMIRNOVA-CHERNYKH │ │ - [ 1d967] IDA │ │ - [ 1d96b] DSS-12 │ │ - [ 1d972] zzphsh_ │ │ - [ 1d97a] Aberration correction specification # is not recognized. │ │ - [ 1d9b3] ZZREFCH0 │ │ - [ 1d9bc] A kernel variable was not properly formed on line # of the file #. Such an assignment should have the form: ' [+]= '. More specifically, the assignment operator did not have one of the expected forms: '=' or '+='. The line was '#'. │ │ - [ 1dabd] -n │ │ - [ 1dac0] The substring "#" is a duplicate modifier of the input string: ' │ │ - [ 1db02] │ │ + [ 1cf2c] kv │ │ + [ 1cf30] full^Dline^Bno │ │ + [ 1cf3d] cpath │ │ + [ 1cf43] path too long │ │ + [ 1cf51] nups │ │ + [ 1cf56] unexpected end of LZ stream │ │ + [ 1cf72] invalid ICC profile color space │ │ + [ 1cf92] Image height exceeds user limit in IHDR │ │ + [ 1cfba] libpng error: %s │ │ + [ 1cfcb] png_image_begin_read_from_memory: incorrect PNG_IMAGE_VERSION │ │ + [ 1d009] rgb-alpha color-map: too few entries │ │ + [ 1d02e] color-map index out of range │ │ + [ 1d04b] png_set_background │ │ + [ 1d05e] ignoring out of range rgb_to_gray coefficients │ │ + [ 1d08d] libpng does not support gamma+background+rgb_to_gray │ │ + [ 1d0c2] invalid background gamma type │ │ + [ 1d0e0] bKGD must be after │ │ + [ 1d0f3] forcing save of an unhandled chunk; please call png_set_keep_unknown_chunks │ │ + [ 1d13f] cHRM Red Z │ │ + [ 1d14a] Insufficient memory for pCAL purpose │ │ + [ 1d16f] Invalid sCAL height ignored │ │ + [ 1d18b] Insufficient memory to process iCCP profile │ │ + [ 1d1b7] zTXt: invalid compression type │ │ + [ 1d1d6] SPICE(CELLTOOSMALL) │ │ + [ 1d1ea] SPICE(INVALIDLISTITEM) │ │ + [ 1d201] SPICE(NAMETABLEFULL) │ │ + [ 1d216] The SPICELIB Limit for Number of Open Files Has Already Been Reached │ │ + [ 1d25b] Cardinality of Window Is Too Small to Contain Result of the Requested Operation │ │ + [ 1d2ab] @ │ │ + [ 1d2ad] itprvd │ │ + [ 1d2b4] OLD SEGMENTS │ │ + [ 1d2c1] last format: %s\n │ │ + [ 1d2d2] SPICE(DAFNOSUCHADDR) │ │ + [ 1d2e7] syserr │ │ + [ 1d2ee] DAFRDR │ │ + [ 1d2f5] SPICE(DAFDPWRITEFAIL) │ │ + [ 1d30b] tbctpt │ │ + [ 1d312] The index # does not correspond to a loaded table. │ │ + [ 1d345] DASHFS │ │ + [ 1d34c] SPICE(PCKFILETABLEFULL) │ │ + [ 1d364] There is no room available for adding another character value to the kernel pool. │ │ + [ 1d3b6] SPICE(KERNELPOOLFULL) │ │ + [ 1d3cc] ZZVUPOOL │ │ + [ 1d3d5] \begintext │ │ + [ 1d3e0] bnmidx │ │ + [ 1d3e7] IETH │ │ + [ 1d3ec] The input string is blank. Blank strings are not considered to be numbers. │ │ + [ 1d438] SPICE(UNKNOWNCKMETA) │ │ + [ 1d44d] ARCH │ │ + [ 1d452] TXT │ │ + [ 1d456] tframe │ │ + [ 1d45d] spke21_ │ │ + [ 1d465] REMLAD │ │ + [ 1d46c] STPOOL │ │ + [ 1d473] BODY#_CONSTANTS_REF_FRAME │ │ + [ 1d48d] Maximum phase angle degree for body # must be in the range 1:# but was #. │ │ + [ 1d4d7] The Text Kernel (TK) frame with ID code # does not have a recognized name. │ │ + [ 1d523] Names Overflowed> │ │ + [ 1d535] UNITIM │ │ + [ 1d53c] window │ │ + [ 1d543] exponent field │ │ + [ 1d552] Total number of name/ID mappings: │ │ + [ 1d575] The binary file format, '#', is not supported by this version of the toolkit. This is a serious problem, contact NAIF. │ │ + [ 1d5ec] The attempt to load file '#' as a # has failed because it is already loaded as a #. │ │ + [ 1d640] There are less files in the file table than units in the unit table, and no row with a zero-valued handle can be found. This should never occur. │ │ + [ 1d6d2] The integer code, '#' indicating the file architecture to examine is out of range. │ │ + [ 1d725] A request to load the # file, $, has been made by the % system. This operation is not permitted. │ │ + [ 1d787] ZZCOREPC │ │ + [ 1d790] conmap │ │ + [ 1d797] zzekreqi_ │ │ + [ 1d7a1] ZZEKPGIN │ │ + [ 1d7aa] End address END was #; valid range is 1:# │ │ + [ 1d7d4] IAU_PLUTO │ │ + [ 1d7de] IAU_LYSITHEA │ │ + [ 1d7eb] IAU_MENOETIUS │ │ + [ 1d7f9] The reference frame # has class #. This form of reference frame is not supported in version # of ZZFRMGT0. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ + [ 1d8c7] SOLAR SYSTEM BARYCENTER │ │ + [ 1d8df] EARTH-MOON BARYCENTER │ │ + [ 1d8f5] SATURN_BARYCENTER │ │ + [ 1d907] NEPTUNE_BARYCENTER │ │ + [ 1d91a] PAN │ │ + [ 1d91e] THRYMR │ │ + [ 1d925] CUPID │ │ + [ 1d92b] JUICE │ │ + [ 1d931] CLEMENTINE │ │ + [ 1d93c] LUNAR ICECUBE │ │ + [ 1d94a] GIOTTO │ │ + [ 1d951] EXOMARS 2016 TGO │ │ + [ 1d962] INSIGHT │ │ + [ 1d96a] RSAT │ │ + [ 1d96f] SHOEMAKER-LEVY 9-G │ │ + [ 1d982] SMIRNOVA-CHERNYKH │ │ + [ 1d994] IDA │ │ + [ 1d998] DSS-12 │ │ + [ 1d99f] zzphsh_ │ │ + [ 1d9a7] Aberration correction specification # is not recognized. │ │ + [ 1d9e0] ZZREFCH0 │ │ + [ 1d9e9] A kernel variable was not properly formed on line # of the file #. Such an assignment should have the form: ' [+]= '. More specifically, the assignment operator did not have one of the expected forms: '=' or '+='. The line was '#'. │ │ + [ 1daea] -n │ │ + [ 1daed] The substring "#" is a duplicate modifier of the input string: ' │ │ + [ 1db2f] │ │ - [ 1ee19] >> │ │ - [ 1ee1c] Lua 5.1 │ │ - [ 1ee24] sec │ │ - [ 1ee28] wday │ │ - [ 1ee2d] _LOADLIB │ │ - [ 1ee36] searchpath │ │ - [ 1ee41] 'package.%s' must be a string │ │ - [ 1ee5f] unsupported zlib version │ │ - [ 1ee78] invalid embedded Abstract ICC profile │ │ - [ 1ee9e] read beyond end of data │ │ - [ 1eeb6] invalid PNG color type │ │ - [ 1eecd] png_do_encode_alpha: unexpected call │ │ - [ 1eef2] PNG unsigned integer out of range │ │ - [ 1ef14] incorrect byte-order specifier │ │ - [ 1ef33] Not enough image data │ │ - [ 1ef49] cHRM Blue Z │ │ - [ 1ef55] sPLT out of memory │ │ - [ 1ef68] png_image_write_to_stdio: incorrect PNG_IMAGE_VERSION │ │ - [ 1ef9e] Invalid bit depth for grayscale+alpha image │ │ - [ 1efca] GETMSG: An invalid value of OPTION was input. Valid choices are 'SHORT', 'EXPLAIN', or 'LONG'. The value that was input was: │ │ - [ 1f051] SPICE(ZEROVECTOR) │ │ - [ 1f063] FURNSH │ │ - [ 1f06a] CHECK PARTIAL LIST │ │ - [ 1f07d] DAFHSF │ │ - [ 1f084] DAFGS │ │ - [ 1f08a] The EK file # contains no segments. │ │ - [ 1f0ae] SPICE(INVALIDTABLENAME) │ │ - [ 1f0c6] activv │ │ - [ 1f0cd] # is not name of a column in FROM table #. │ │ - [ 1f0f8] ocols │ │ - [ 1f0fe] The cell cannot accommodate the addition of the element *. │ │ - [ 1f13a] There are no free nodes left for allocating in the supplied linked list pool. │ │ - [ 1f189] SPICE(NOFREENODES) │ │ - [ 1f19c] LNKFSL │ │ - [ 1f1a3] Node NEXT: node number = #; backward pointer = #; forward pointer = #. Node LIST: node number = #; backward pointer = #; forward pointer = #. ("FREE" is #) │ │ - [ 1f241] wtagnt │ │ - [ 1f248] #3 │ │ - [ 1f24b] SPICE(UPDATEPENDING) │ │ - [ 1f260] were not recognized │ │ - [ 1f275] CKR05 │ │ - [ 1f27b] SPICE(NOTSUPPORTED) │ │ - [ 1f28f] NTOL should be non-negative; it is #. │ │ - [ 1f2b5] The segment is not a type 2 segment. Type is # │ │ - [ 1f2e5] SPICE(INVALIDMETADATA) │ │ - [ 1f2fc] SUCCESS │ │ - [ 1f304] double precision │ │ - [ 1f315] cover │ │ - [ 1f31b] SPKCOV │ │ - [ 1f322] 00 │ │ - [ 1f325] The periapse vector supplied to SPKE15 had length zero. The most likely cause of this problem is a corrupted SPK (ephemeris) file. │ │ - [ 1f3a9] SPICE(INVALIDSTEPSIZE) │ │ - [ 1f3c0] spkr09_ │ │ - [ 1f3c8] SPKR12 │ │ - [ 1f3cf] SPICE(MALFORMEDSEGMENT) │ │ - [ 1f3e7] bpckep │ │ - [ 1f3ee] bdcoef │ │ - [ 1f3f5] PCKE03 │ │ - [ 1f3fc] do_ud │ │ - [ 1f402] wnincd_c │ │ - [ 1f40b] SCARDD │ │ - [ 1f412] lread │ │ - [ 1f418] XF2EUL │ │ - [ 1f41f] xf2eul_ │ │ - [ 1f427] nornam │ │ - [ 1f42e] zzddhgtu_ │ │ - [ 1f438] SPICE(FILARCHMISMATCH) │ │ - [ 1f44f] The file '#' utilizes the binary file format '#'. This format is currently unknown to this toolkit. A toolkit update may be in order. │ │ - [ 1f4d7] The native architecture for this platform is unknown to this version of the toolkit. This is a severe problem that should never occur, please contact NAIF. │ │ - [ 1f573] EARTH_IAU_1980 │ │ - [ 1f582] AXIS(#) + LAMBDA/AXIS(#) is zero. │ │ - [ 1f5a4] ZZDYNOAC │ │ - [ 1f5ad] twovec_ │ │ - [ 1f5b5] EK = #; SEG = #; ROW = #; COLIDX = #; ELT = #; column entry elt was not found. │ │ - [ 1f604] SPICE(UNINITIALIZED) │ │ - [ 1f619] ZZEKPGWD │ │ - [ 1f622] SPICE(STRINGCOPYFAIL) │ │ - [ 1f638] F_Alloc │ │ - [ 1f640] F2C_CreateStrArr_Sig │ │ - [ 1f655] IAU_THEBE │ │ - [ 1f65f] ZZHSCADD │ │ - [ 1f668] The hash has no room for any more items. │ │ - [ 1f691] ADRASTEA │ │ - [ 1f69a] SKATHI │ │ - [ 1f6a1] JARNSAXA │ │ - [ 1f6aa] GEOTAIL │ │ - [ 1f6b2] NEXT │ │ - [ 1f6b7] RADIOASTRON │ │ - [ 1f6c3] LRO │ │ - [ 1f6c7] LUNAR RECONNAISSANCE ORBITER │ │ - [ 1f6e4] MGS │ │ - [ 1f6e8] INTEGRAL │ │ - [ 1f6f1] SMART LANDER FOR INVESTIGATING MOON │ │ - [ 1f715] RADIATION BELT STORM PROBE B │ │ - [ 1f732] SHOEMAKER-LEVY 9-C │ │ - [ 1f745] KOWAL 1 │ │ - [ 1f74d] VAISALA 1 │ │ - [ 1f757] WOLF-HARRINGTON │ │ - [ 1f767] WISEMAN-SKIFF │ │ - [ 1f775] C/2013 A1 │ │ - [ 1f77f] STEINS │ │ - [ 1f786] BRAILLE │ │ - [ 1f78e] SPICE(TRANSFERFILE) │ │ - [ 1f7a2] temp │ │ - [ 1f7a7] E │ │ - [ 1f7a9] BIG-IEEE LTL-IEEE │ │ - [ 1f7bb] ZZROTGT1 │ │ - [ 1f7c4] SPICE(NONPRINTINGCHAR) │ │ - [ 1f7db] oi │ │ - [ 1f7de] m* │ │ - [ 1f7e1] mD │ │ - [ 1f7e4] SCLK01_N_FIELDS_ │ │ - [ 1f7f5] The number of values associated with the kernel variable # for clock # is #, which exceeds the limit #. │ │ - [ 1f85d] SPICE(NUMPARTSUNEQUAL) │ │ - [ 1f874] SPICE(ORBITDECAY) │ │ - [ 1f886] JDTDB │ │ - [ 1f88d] ZZSPKEZ1 │ │ - [ 1f896] ZZSPKGP1 │ │ - [ 1f89f] Base frame kernel variable # exists but DTPOOL returned data type # rather than one of the expected values: 'C' or 'N'. │ │ - [ 1f917] The seconds component of '#' is out of range. On the Julian Calendar in the specified time zone (#) leapseconds can occur during the year # only in the second that immediately follows the time #:#:59 on # # and # #. │ │ - [ 1f9f2] mon │ │ - [ 1f9f6] DPFMT │ │ - [ 1f9fc] ( │ │ - [ 1f9fe] EDT │ │ - [ 1fa02] OCTOBER │ │ - [ 1fa0a] Two substrings indicating a calendar month were identified in the input time string <#> and <#>: " │ │ - [ 1fa6d] Y-iti:i:i │ │ - [ 1fa77] Yidi:n │ │ - [ 1fa7e] Yiii │ │ - [ 1fa83] YDmH*M │ │ - [ 1fa8a] Yimi:i:n │ │ - [ 1fa93] mDYH*M*S │ │ - [ 1fa9c] inm │ │ - [ 1faa0] miiiii │ │ - [ 1faa7] i/i/Yi:i │ │ - [ 1fab0] Y-i-iti:ix │ │ - [ 1fabb] ZZVALCOR │ │ - [ 1fac4] matrix │ │ - [ 1facb] AN │ │ - [ 1face] YU │ │ - [ 1fad1] CD │ │ - [ 1fad4] wuu │ │ - [ 1fad8] ak │ │ - [ 1fadb] akk │ │ - [ 1fadf] ale │ │ - [ 1fae3] bss │ │ - [ 1fae7] chy │ │ - [ 1faeb] cr │ │ - [ 1faee] dje │ │ - [ 1faf2] egy │ │ - [ 1faf6] ewo │ │ - [ 1fafa] fro │ │ - [ 1fafe] gur │ │ - [ 1fb02] ig │ │ - [ 1fb05] ilo │ │ - [ 1fb09] kaj │ │ - [ 1fb0d] kde │ │ - [ 1fb11] kru │ │ - [ 1fb15] lah │ │ - [ 1fb19] mwr │ │ - [ 1fb1d] nds │ │ - [ 1fb21] niu │ │ - [ 1fb25] nog │ │ - [ 1fb29] ny │ │ - [ 1fb2c] pdt │ │ - [ 1fb30] pon │ │ - [ 1fb34] tsd │ │ - [ 1fb38] uk │ │ - [ 1fb3b] vep │ │ - [ 1fb3f] vun │ │ - [ 1fb43] ave │ │ - [ 1fb47] dzo │ │ - [ 1fb4b] kas │ │ - [ 1fb4f] mah │ │ - [ 1fb53] mya │ │ - [ 1fb57] nob │ │ - [ 1fb5b] que │ │ - [ 1fb5f] run │ │ - [ 1fb63] xho │ │ - [ 1fb67] CG │ │ - [ 1fb6a] GL │ │ - [ 1fb6d] GW │ │ - [ 1fb70] SK │ │ - [ 1fb73] SY │ │ - [ 1fb76] TO │ │ - [ 1fb79] AUT │ │ - [ 1fb7d] CXR │ │ - [ 1fb81] GUF │ │ - [ 1fb85] GRL │ │ - [ 1fb89] IRQ │ │ - [ 1fb8d] KAZ │ │ - [ 1fb91] TZA │ │ - [ 1fb95] ne_NP │ │ - [ 1fb9b] sq_AL │ │ - [ 1fba1] sr_Latn │ │ - [ 1fba9] persist.sys.timezone │ │ - [ 1fbbe] NZST │ │ - [ 1fbc3] ANAST │ │ - [ 1fbc9] Europe/Athens │ │ - [ 1fbd7] Asia/Jerusalem │ │ - [ 1fbe6] AZOST │ │ - [ 1fbec] PYT │ │ - [ 1fbf0] match │ │ - [ 1fbf6] chr_Cher_US │ │ - [ 1fc02] ckb_Arab_IQ │ │ - [ 1fc0e] en_VI │ │ - [ 1fc14] es_VE │ │ - [ 1fc1a] fuv_NG │ │ - [ 1fc21] ibb_NG │ │ - [ 1fc28] no_NO │ │ - [ 1fc2e] quc_Latn_GT │ │ - [ 1fc3a] rm_CH │ │ - [ 1fc40] sd_Arab_PK │ │ - [ 1fc4b] wo_SN │ │ - [ 1fc51] -u │ │ - [ 1fc54] i-navajo │ │ - [ 1fc5d] nan-x-zh-min │ │ - [ 1fc6a] ja-latn-alalc97 │ │ - [ 1fc7a] afternoon1 │ │ - [ 1fc85] localeDisplayPattern │ │ - [ 1fc9a] {0}={1} │ │ - [ 1fca2] noncharacter │ │ - [ 1fcaf] U_INDEX_OUTOFBOUNDS_ERROR │ │ - [ 1fcc9] U_MALFORMED_VARIABLE_DEFINITION │ │ - [ 1fce9] U_MISPLACED_ANCHOR_START │ │ - [ 1fd02] U_MULTIPLE_COMPOUND_FILTERS │ │ - [ 1fd1e] U_UNSUPPORTED_PROPERTY │ │ - [ 1fd35] U_BRK_INIT_ERROR │ │ - [ 1fd46] U_REGEX_SET_CONTAINS_STRING │ │ - [ 1fd62] ADP │ │ - [ 1fd66] AWG │ │ - [ 1fd6a] CSD │ │ - [ 1fd6e] NGN │ │ - [ 1fd72] NPR │ │ - [ 1fd76] SDP │ │ - [ 1fd7a] SGD │ │ - [ 1fd7e] VND │ │ - [ 1fd82] YER │ │ - [ 1fd86] YUD │ │ - [ 1fd8a] ZWR │ │ - [ 1fd8e] lenient │ │ - [ 1fd96] -Subnormal │ │ - [ 1fda1] ICU_ENABLE_TENTATIVE_ERA │ │ - [ 1fdba] mole │ │ - [ 1fdbf] mile-per-gallon │ │ - [ 1fdcf] gigabyte │ │ - [ 1fdd8] solar-radius │ │ - [ 1fde5] hectopascal │ │ - [ 1fdf1] inch-ofhg │ │ - [ 1fdfb] megapascal │ │ - [ 1fe06] locative_copulative │ │ - [ 1fe1a] locales_ordinals │ │ - [ 1fe2b] locales/ │ │ - [ 1fe34] -and- │ │ - [ 1fe3a] pow4- │ │ - [ 1fe40] pow6- │ │ - [ 1fe46] pow14- │ │ - [ 1fe4d] kilo │ │ - [ 1fe52] or-narrow │ │ - [ 1fe5c] icudt75l-coll │ │ - [ 1fe6a] last implicit │ │ - [ 1fe78] at │ │ - [ 1fe7b] %.*g │ │ - [ 1fe80] setPreferredDisplayModeId │ │ - [ 1fe9a] unique_lock::lock: already locked │ │ - [ 1febc] Comet tails enabled │ │ - [ 1fed0] INF │ │ - [ 1fed4] {:02d}' {:.1f}" │ │ - [ 1fee4] kpc │ │ - [ 1fee8] Distance from center: %s\n │ │ - [ 1ff02] Temperature: %s\n │ │ - [ 1ff13] CHANNEL_AUX_27 │ │ - [ 1ff22] Already connected │ │ - [ 1ff34] Core Audio │ │ - [ 1ff3f] [OpenSL] Failed to register buffer queue callback. │ │ - [ 1ff72] [OpenSL] Failed to enqueue buffer for playback device. │ │ - [ 1ffa9] Failed to post MA_JOB_TYPE_RESOURCE_MANAGER_LOAD_DATA_BUFFER_NODE job. %s.\n │ │ - [ 1fff5] adtl │ │ - [ 1fffa] Path {} doesn't exist or isn't a directory\n │ │ - [ 20026] x │ │ - [ 20028] SyncOrbit │ │ - [ 20032] aliceblue │ │ - [ 2003c] mediumseagreen │ │ - [ 2004b] OMI │ │ - [ 2004f] CHI │ │ - [ 20053] Kappa │ │ - [ 20059] comettails │ │ - [ 20064] boundaries │ │ - [ 2006f] center │ │ - [ 20076] settextureresolution │ │ - [ 2008b] upframe │ │ - [ 20093] object │ │ - [ 2009a] square │ │ - [ 200a1] filledsquare │ │ - [ 200ae] circle │ │ - [ 200b5] Argument of category:haschild must be string or userdata! │ │ - [ 200ef] getobservers │ │ - [ 200fc] Expected three or four arguments to celestia:setconstellationcolor() │ │ - [ 20141] One argument expected for celestia:setoverlayelements() │ │ - [ 20179] No argument expected for celestia:windowbordersvisible │ │ - [ 201b0] Function celestia:pauseaudio requires one argument │ │ - [ 201e3] No arguments expected to function celestia:gettitlefont │ │ - [ 2021b] Need one argument for celestia:loadfont() │ │ - [ 20245] char │ │ - [ 2024a] class_celestia │ │ - [ 20259] LoadIdentity │ │ - [ 20266] No arguments expected for texture:getheight() │ │ - [ 20294] getmass │ │ - [ 2029c] mass │ │ - [ 202a1] getspeed │ │ - [ 202aa] Third arg to observer:gotodistance must be a number │ │ - [ 202de] Expected no arguments to observer:cancelgoto │ │ - [ 2030b] No arguments expected for observer:getlocationflags() │ │ - [ 20341] Argument to observer:setlocationflags() must be a table │ │ - [ 20379] Need two operands for addition │ │ - [ 20398] Bad {} value in material │ │ - [ 203b1] color1 │ │ - [ 203b8] linelist │ │ - [ 203c1] material\n │ │ - [ 203cb] mesh\n │ │ - [ 203d1] {}\n │ │ - [ 203d6] Texture coordinates must be present in mesh to generate tangents\n │ │ - [ 20418] jpl-emb-ssb │ │ - [ 20424] phobos │ │ - [ 2042b] iau-oberon │ │ - [ 20436] cel_script_object_ │ │ - [ 20449] galaxy150 │ │ - [ 20453] Ari │ │ - [ 20457] Psc │ │ - [ 2045b] OpenCluster │ │ - [ 20467] Spatially sorting DSOs for improved locality of reference . . .\n │ │ - [ 204a8] E4 │ │ - [ 204ab] models/E0.png │ │ - [ 204b9] FA │ │ - [ 204bc] ScriptedOrbit │ │ - [ 204ca] Could not load sampled orbit file '{}'\n │ │ - [ 204f2] FixedPosition │ │ - [ 20500] Invalid beginning date specified for SPICE orbit.\n │ │ - [ 20533] MeanEquator │ │ - [ 2053f] Primary axis missing from two-vector frame.\n │ │ - [ 2056c] diffTexCoord = │ │ - [ 2057c] vec4 color;\n │ │ - [ 20589] eyeDir_tan │ │ - [ 20594] gl_FragColor = │ │ - [ 205a8] vec2 │ │ - [ 205ad] vec3 │ │ - [ 205b2] cloudShadowTexCoord{} │ │ - [ 205c8] specFactors.{} │ │ - [ 205d7] float distAtm = length(atmEnter - atmLeave);\n │ │ - [ 20609] * exp(-extinctionCoeff * density * distSun);\n │ │ - [ 20638] vec3 ex = exp(-extinctionCoeff * density * distAtm);\n │ │ - [ 20672] scatterEx = ex;\n │ │ - [ 20687] scatterColor = (phRayleigh * rayleighCoeff + phMie * mieCoeff) * invScatterCoeffSum * sunColor * │ │ - [ 206ed] float phMie = (1.0 - mieK * mieK) / ((1.0 - mieK * cosTheta) * (1.0 - mieK * cosTheta));\n │ │ - [ 2074b] Class │ │ - [ 20751] Density │ │ - [ 20759] Height │ │ - [ 20760] V │ │ - [ 20762] Bad spectral type in star database, star #{}\n │ │ - [ 20790] {}1 {}{} │ │ - [ 20799] Processing Meshdata chunk\n │ │ - [ 207b4] Content size {} too small to include texture coord array with {} entries\n │ │ - [ 207fe] onCelestiaProgress │ │ - [ 20811] Comets │ │ - [ 20818] binary │ │ - [ 2081f] number │ │ - [ 20826] Creating renderer thread │ │ - [ 2083f] Bogus marker length │ │ - [ 20853] Empty JPEG image (DNL not supported) │ │ - [ 20878] Read from XMS failed │ │ - [ 2088d] TrueType │ │ - [ 20896] Notice │ │ - [ 2089d] Subrs │ │ - [ 208a3] CFF │ │ - [ 208a7] /FSType │ │ - [ 208af] %ADOBeginFontDict │ │ - [ 208c1] CIDFontVersion │ │ - [ 208d0] GDBytes │ │ - [ 208d8] ForceBoldThreshold │ │ - [ 208eb] ITALIC_ANGLE │ │ - [ 208f8] NOTICE │ │ - [ 208ff] SUBSCRIPT_SIZE │ │ - [ 2090e] WEIGHT │ │ - [ 20915] BBX │ │ - [ 2091c] � │ │ - [ 20921] KPX │ │ - [ 20925] XHeight │ │ - [ 2092d] variable names │ │ - [ 2093c] cannot open %s: %s │ │ - [ 2094f] __mode │ │ - [ 20956] << │ │ - [ 20959] ./?.lua;/home/vagrant/build/apple-android/LuaJIT-87ae18af97fd4de790bb6c476b212e047689cc93/output/share/luajit-2.1/?.lua;/usr/local/share/lua/5.1/?.lua;/usr/local/share/lua/5.1/?/init.lua;/home/vagrant/build/apple-android/LuaJIT-87ae18af97fd4de790bb6c476b212e047689cc93/output/share/lua/5.1/?.lua;/home/vagrant/build/apple-android/LuaJIT-87ae18af97fd4de790bb6c476b212e047689cc93/output/share/lua/5.1/?/init.lua │ │ - [ 20af3] linedefined │ │ - [ 20aff] INPUT │ │ - [ 20b05] tostring │ │ - [ 20b0e] damaged LZ stream │ │ - [ 20b20] internal error checking chromaticities │ │ - [ 20b47] length does not match profile │ │ - [ 20b65] Invalid color type/bit depth combination in IHDR │ │ - [ 20b96] Unknown interlace method in IHDR │ │ - [ 20bb7] Invalid IHDR data │ │ - [ 20bc9] internal error: array alloc │ │ - [ 20be5] png_image_begin_read_from_memory: invalid argument │ │ - [ 20c18] gray[16] color-map: too few entries │ │ - [ 20c3c] gray-alpha color-map: too few entries │ │ - [ 20c62] unknown interlace type │ │ - [ 20c79] Too much image data │ │ - [ 20c8d] zstream unclaimed │ │ - [ 20c9f] png_set_keep_unknown_chunks: no chunk list │ │ - [ 20cca] png_set_filter: UP/AVG/PAETH cannot be added after start │ │ - [ 20d03] Invalid number of colors in palette │ │ - [ 20d27] Can't write tRNS with an alpha channel │ │ - [ 20d4e] action │ │ - [ 20d55] SPICE(INVALIDEPOCH) │ │ - [ 20d69] SPICE(INVALIDINDEX) │ │ - [ 20d7d] There Is No Element Corresponding to the Supplied Index │ │ - [ 20db5] Summary size was #, should not exceed #. │ │ - [ 20dde] An attempt was made to reserve a negative number (#) of records. │ │ - [ 20e1f] Attempt to write file '#' failed. Value of IOSTAT was #. │ │ - [ 20e58] writing │ │ - [ 20e60] No array is current; the `previous' array is the last array of DAF # │ │ - [ 20ea5] EKQMGR │ │ - [ 20eac] ABORT │ │ - [ 20eb2] SPICE(BLANKFILENAME) │ │ - [ 20ec7] Action was #; should be READ or WRITE │ │ - [ 20eed] DECHAR │ │ - [ 20ef4] SPICE(BADDASDIRECTORY) │ │ - [ 20f0b] DASRRD │ │ - [ 20f12] SPICE(INDEXOUTOFRANGE) │ │ - [ 20f29] String indices FIRST and LAST were #, #; allowed range for both is [#, #]. File was #, record number was #. │ │ - [ 20f96] WRITE │ │ - [ 20f9d] NEXT was #. LIST was #. Valid range is 1 to #. │ │ - [ 20fcd] dppool │ │ - [ 20fd4] WRPOOL │ │ - [ 20fdb] chpool │ │ - [ 20fe2] CVPOOL │ │ - [ 20fe9] SPICE(BADARRAYSIZE) │ │ - [ 20ffd] GNPOOL │ │ - [ 21004] power │ │ - [ 2100a] INQUIRE error. File = #, IOSTAT = #. │ │ - [ 21030] (A) │ │ - [ 21034] EIGHT │ │ - [ 2103a] SPICE(UNKNOWNFRAMETYPE) │ │ - [ 21052] SPICE(IRFNOTREC) │ │ - [ 21063] ckmeta_ │ │ - [ 2106b] M2Q │ │ - [ 2106f] ISROT │ │ - [ 21075] scard_c │ │ - [ 2107d] SCLKDP │ │ - [ 21084] Invalid time system code # was found for SCLK #. │ │ - [ 210b5] SCEC01 │ │ - [ 210bc] SGFPKT │ │ - [ 210c3] Attempt to read from file '#' failed. IOSTAT = #. │ │ - [ 210f5] IDW2AT │ │ - [ 210fc] : │ │ - [ 210fe] SPKR08 │ │ - [ 21105] A type 15 segment should contain exactly 16 double precision values. The segment supplied had #. The segment is badly formed. │ │ - [ 21186] The input value of X must be greater than #. The input value was # │ │ - [ 211ca] bnd │ │ - [ 211ce] Bad fixed offset frame specification: the frame '#' (frame ID #) is defined relative to itself. SPICE cannot work with such frames. │ │ - [ 21253] SPICE(TRACESTACKEMPTY) │ │ - [ 2126a] bltcod │ │ - [ 21271] The file table is full, with # entries. As a result, the file '#' could not be loaded. │ │ - [ 212c8] ftrtm │ │ - [ 212ce] vname │ │ - [ 212d4] xform │ │ - [ 212da] mxmg_ │ │ - [ 212e0] zzekjoin_ │ │ - [ 212ea] ZZEKQTAB │ │ - [ 212f3] N_C_ALLOC │ │ - [ 212fd] EK stack pointer = #; call requests popping # items. │ │ - [ 21332] ZZEKWEED │ │ - [ 2133b] IAU_EARTH_BARYCENTER │ │ - [ 21350] IAU_SUN │ │ - [ 21358] IAU_MARS │ │ - [ 21361] IAU_DIONE │ │ - [ 2136b] IAU_HYPERION │ │ - [ 21378] IAU_DESPINA │ │ - [ 21384] zzfrmch0_ │ │ - [ 2138e] ZZDYNFR0 │ │ - [ 21397] ZZHSCINI │ │ - [ 213a0] DIONE │ │ - [ 213a6] STEPHANO │ │ - [ 213af] FRANCISCO │ │ - [ 213b9] P7 │ │ - [ 213bc] P8 │ │ - [ 213bf] SDU │ │ - [ 213c3] VOYAGER 2 │ │ - [ 213cd] HAYABUSA2 │ │ - [ 213d7] SUISEI │ │ - [ 213de] MARS PATHFINDER │ │ - [ 213ee] MARS SURVEYOR 01 ORBITER │ │ - [ 21407] LUNAR RECON ORBITER │ │ - [ 2141b] EOS-AM1 │ │ - [ 21423] EUROPA CLIPPER │ │ - [ 21432] LARA │ │ - [ 21437] SLIM │ │ - [ 2143c] RBSP_B │ │ - [ 21443] MTM │ │ - [ 21447] BORRELLY │ │ - [ 21450] HARRINGTON-ABELL │ │ - [ 21461] SANGUIN │ │ - [ 21469] CERES │ │ - [ 2146f] KLEOPATRA │ │ - [ 21479] DSS-65 │ │ - [ 21480] DSS-66 │ │ - [ 21487] Name not available │ │ - [ 2149a] JULIAND. │ │ - [ 214a3] .# │ │ - [ 214a6] [Z] │ │ - [ 214aa] Day # has been specified for the year #. The correct range for the day of year for this year is from 1 to #. │ │ - [ 21518] A kernel pool variable name in the input buffer exceeds the maximum allowed length #1. The actual length of the variable name is #2, the offending variable name to #3 characters: '#4'. │ │ - [ 215d1] Mean semi-major axis value, #, below allowed minimum of 0.95. This error may indicate a bad TLE set or a decayed orbit. │ │ - [ 21649] YD │ │ - [ 2164d] forml │ │ - [ 21653] ZZSPKAC1 │ │ - [ 2165c] Base frame name # of switch frame # could not be translated to a frame ID code │ │ - [ 216ac] mname │ │ - [ 216b2] The format picture must begin with a non-blank character. The picture supplied was begun with a blank. │ │ - [ 21719] MDT │ │ - [ 2171d] i-i/i:i:n │ │ - [ 21727] i-i/i:n │ │ - [ 2172f] imiii │ │ - [ 21735] m*D*Y │ │ - [ 2173b] i:ni/i/Y │ │ - [ 21744] Y-i-itix │ │ - [ 2174d] id │ │ - [ 21750] hy │ │ - [ 21753] zh__HAKKA │ │ - [ 2175d] ace │ │ - [ 21761] arp │ │ - [ 21765] chg │ │ - [ 21769] chp │ │ - [ 2176d] cy │ │ - [ 21770] dv │ │ - [ 21773] esu │ │ - [ 21777] gag │ │ - [ 2177b] gom │ │ - [ 2177f] lg │ │ - [ 21782] luy │ │ - [ 21786] mg │ │ - [ 21789] mt │ │ - [ 2178c] nap │ │ - [ 21790] nyn │ │ - [ 21794] pi │ │ - [ 21797] rif │ │ - [ 2179b] rue │ │ - [ 2179f] sco │ │ - [ 217a3] teo │ │ - [ 217a7] tkr │ │ - [ 217ab] tzm │ │ - [ 217af] vi │ │ - [ 217b2] wal │ │ - [ 217b6] est │ │ - [ 217ba] kik │ │ - [ 217be] lug │ │ - [ 217c2] ton │ │ - [ 217c6] AF │ │ - [ 217c9] CZ │ │ - [ 217cc] EA │ │ - [ 217cf] HM │ │ - [ 217d2] HT │ │ - [ 217d5] SR │ │ - [ 217d8] TC │ │ - [ 217db] VG │ │ - [ 217de] BEN │ │ - [ 217e2] BES │ │ - [ 217e6] COG │ │ - [ 217ea] DZA │ │ - [ 217ee] FRO │ │ - [ 217f2] GRD │ │ - [ 217f6] HMD │ │ - [ 217fa] KIR │ │ - [ 217fe] LIE │ │ - [ 21802] MSR │ │ - [ 21806] MUS │ │ - [ 2180a] NIU │ │ - [ 2180e] ROU │ │ - [ 21812] TCD │ │ - [ 21816] URY │ │ - [ 2181a] ROM │ │ - [ 2181e] /zoneinfo/ │ │ - [ 21829] 75.1 │ │ - [ 2182e] WAT │ │ - [ 21832] GMT │ │ - [ 21836] Chile/Continental │ │ - [ 21848] EAST │ │ - [ 2184d] de_AT │ │ - [ 21853] de_LI │ │ - [ 21859] de_LU │ │ - [ 2185f] en_HK │ │ - [ 21865] ff_Latn_SN │ │ - [ 21870] fr_CM │ │ - [ 21876] sr_Cyrl_CS │ │ - [ 21881] iw_IL │ │ - [ 21887] sa_IN │ │ - [ 2188d] sms_FI │ │ - [ 21894] bnn │ │ - [ 21898] i-pwn │ │ - [ 2189e] jsl │ │ - [ 218a2] collations │ │ - [ 218ad] %%Parent │ │ - [ 218b6] *NULL* │ │ - [ 218be] ucol_close │ │ - [ 218c9] metazone-short │ │ - [ 218d8] M05 │ │ - [ 218dc] Languages │ │ - [ 218e6] Rules │ │ - [ 218ec] languages │ │ - [ 218f6] paragraph separator │ │ - [ 2190a] other punctuation │ │ - [ 2191c] 0123456789ABCDEF<>- │ │ - [ 21930] U_NO_WRITE_PERMISSION │ │ - [ 21946] U_AMBIGUOUS_ALIAS_WARNING │ │ - [ 21960] U_INVALID_PROPERTY_PATTERN │ │ - [ 2197b] U_REGEX_MISSING_CLOSE_BRACKET │ │ - [ 21999] U_STRINGPREP_PROHIBITED_ERROR │ │ - [ 219b7] SentenceBreak │ │ - [ 219c5] ANG │ │ - [ 219c9] BRZ │ │ - [ 219cd] EUR │ │ - [ 219d1] IDR │ │ - [ 219d5] PGK │ │ - [ 219d9] VED │ │ - [ 219dd] YUN │ │ - [ 219e1] percentFormat │ │ - [ 219ef] Division impossible │ │ - [ 21a03] Division undefined │ │ - [ 21a16] -Normal │ │ - [ 21a1e] british-thermal-unit │ │ - [ 21a33] liter │ │ - [ 21a39] decimal │ │ - [ 21a41] [:digit:] │ │ - [ 21a4b] zetta │ │ - [ 21a51] tera │ │ - [ 21a56] kibi │ │ - [ 21a5b] gender │ │ - [ 21a62] missing root elements data, tailoring not supported │ │ - [ 21a96] reset primary-before ignorable not possible │ │ - [ 21ac2] modifying collation elements │ │ - [ 21adf] starred-relation string range contains a surrogate │ │ - [ 21b12] backslash escape at the end of the rule string │ │ - [ 21b41] not a valid setting/option │ │ - [ 21b5c] last tertiary ignorable │ │ - [ 21b74] ussystem │ │ - [ 21b7d] special │ │ - [ 21b85] ft_to_m │ │ - [ 21b8d] ATrace_endAsyncSection │ │ - [ 21ba4] ()Landroid/view/Display; │ │ - [ 21bbd] mAutoSwapInterval │ │ - [ 21bd0] │ │ - [ 21bd2] Chase │ │ - [ 21bd8] renderoverlay │ │ - [ 21be6] Failed to initialize renderer │ │ - [ 21c04] velocity vector │ │ - [ 21c14] C-{} │ │ - [ 21c19] width is not integer │ │ - [ 21c2e] FFVHEncoderOptions │ │ - [ 21c41] TitleFont │ │ - [ 21c4b] O │ │ - [ 21c4d] G │ │ - [ 21c4f] Y │ │ - [ 21c51] " {\n │ │ - [ 21c57] time │ │ - [ 21c5f] Track %s\n │ │ - [ 21c69] ft/s │ │ - [ 21c6e] Abs (app) mag: {:.2f} ({:.2f})\n │ │ - [ 21c8e] WARNING │ │ - [ 21c96] SSE2: %s\n │ │ - [ 21ca4] [%s]\n │ │ - [ 21caa] Format: %s -> %s\n │ │ - [ 21cc5] CHANNEL_LFE │ │ - [ 21cd1] CHANNEL_AUX_25 │ │ - [ 21ce0] Timeout │ │ - [ 21ce8] Socket operation on non-socket │ │ - [ 21d07] 8-bit Unsigned Integer │ │ - [ 21d1e] 32-bit Signed Integer │ │ - [ 21d34] Failed to post MA_JOB_TYPE_RESOURCE_MANAGER_FREE_DATA_BUFFER_NODE job. %s.\n │ │ - [ 21d80] fmt │ │ - [ 21d85] July │ │ - [ 21d8a] limegreen │ │ - [ 21d94] _ │ │ - [ 21d96] locale │ │ - [ 21d9d] EPS │ │ - [ 21da4] horizontalgrid │ │ - [ 21db3] rupes │ │ - [ 21db9] setsurface │ │ - [ 21dc4] clear │ │ - [ 21dca] visible │ │ - [ 21dd2] Celx class expected │ │ - [ 21de6] setlayoutdirection │ │ - [ 21df9] getminfeaturesize │ │ - [ 21e0b] ispaused │ │ - [ 21e14] dsos │ │ - [ 21e19] Values in table-argument to celestia:setlabelflags() must be boolean │ │ - [ 21e5e] Third argument to celestia:setconstellationcolor() must be a number │ │ - [ 21ea2] Argument to celestia:setminfeaturesize() must be a number │ │ - [ 21edc] Wrong number of arguments to function celestia:utctotdb │ │ - [ 21f14] Arguments to celestia:newposition must be either numbers or strings │ │ - [ 21f58] Two to six arguments expected to function celestia:play │ │ - [ 21f90] First argument for celestia:play must be a number │ │ - [ 21fc2] Function celestia:stopaudio requires one argument │ │ - [ 21ff4] First argument for celestia:setaudiopan must be a number │ │ - [ 2202d] Argument to celestia:getparamstring must be a string │ │ - [ 22062] Invalid mipMapMode │ │ - [ 22075] package │ │ - [ 2207d] button │ │ - [ 22084] class_celscript │ │ - [ 22094] POINTS │ │ - [ 2209b] POLYGON │ │ - [ 220a3] MODELVIEW │ │ - [ 220ad] argument 3 to gl.Color must be a number │ │ - [ 220d5] Two arguments expected for gl.BlendFunc() │ │ - [ 220ff] comet │ │ - [ 22105] gotoobject │ │ - [ 22110] One argument required for setpos │ │ - [ 22131] One argument expected for observer:synchronous │ │ - [ 22160] One argument expected for observer:lock │ │ - [ 22188] One argument expected for observer:track │ │ - [ 221b1] One argument required for observer:setframe() │ │ - [ 221df] No arguments expected for vector:normalize │ │ - [ 2220a] ?.lua; │ │ - [ 22211] Error: Unknown block type {} │ │ - [ 2222e] texcoord1 │ │ - [ 22238] callisto │ │ - [ 22241] iau-neptune │ │ - [ 2224d] Could not read XYZV binary file {}.\n │ │ - [ 22272] boundingRadius │ │ - [ 22281] Failed to load module for ScriptedRotation: {}\n │ │ - [ 222b1] galaxyTex │ │ - [ 222bb] tidalTex │ │ - [ 222c4] celestia-data │ │ - [ 222d2] Error parsing asterism "{}": expected array\n │ │ - [ 222ff] Dor │ │ - [ 22303] Lyn │ │ - [ 22307] Per │ │ - [ 2230b] Tel │ │ - [ 2230f] qupeculavnctis minoris austrinise maeleonagittanajorisiopeiasoeniboologirsacadrpiucharicornoceromedangule berenicescopisum venaticorumba australes venaticis australisyxpenforoscopiculptoretertaurodisphindhemigaygborealiscinaelopardalisilalia │ │ - [ 22401] RT │ │ - [ 22404] MO │ │ - [ 22407] FeatureHeight │ │ - [ 22415] Failed to read mesh header\n │ │ - [ 22431] Bad syntax for primary axis of two-vector frame.\n │ │ - [ 22463] -x │ │ - [ 22466] Bad two-vector frame: no target specified for vector.\n │ │ - [ 2249d] textureOffset │ │ - [ 224ab] ringCenter │ │ - [ 224b6] diff.rgb += │ │ - [ 224c3] {0}.x = dot(T, {1});\n │ │ + [ 1e9d3] FixedRotation │ │ + [ 1e9e1] DoublePrecision │ │ + [ 1e9f1] Epoch │ │ + [ 1e9f7] Rectangular │ │ + [ 1ea03] ConstantVector │ │ + [ 1ea12] Bad two-vector frame: observer object '{}' of vector not found.\n │ │ + [ 1ea53] arcmin │ │ + [ 1ea5a] Error creating shadow FBO.\n │ │ + [ 1ea76] cloudHeight │ │ + [ 1ea82] vec3 T = normalize(tangent);\n │ │ + [ 1eaa0] diffFactors │ │ + [ 1eaac] vec3 V = normalize(eyeDir_tan);\n │ │ + [ 1eacd] NH = max(0.0, dot(n, H));\n │ │ + [ 1eae8] color.a │ │ + [ 1eaf0] {}{}{}{}{}{}\n │ │ + [ 1eafe] lineWidthX │ │ + [ 1eb09] in_TexCoord3 │ │ + [ 1eb16] BodyFrame │ │ + [ 1eb20] Importance │ │ + [ 1eb2b] 3 │ │ + [ 1eb2d] 4 │ │ + [ 1eb2f] OrbitBarycenter should be either a string or an integer │ │ + [ 1eb67] invalid SpectralType │ │ + [ 1eb7c] no magnitude defined for star │ │ + [ 1eb9a] %d_%d. │ │ + [ 1eba1] 1.6.44 │ │ + [ 1eba8] Content size {} too small to include texture coord array count\n │ │ + [ 1ebe8] Content size {} too small to include smoothing group array with {} entries\n │ │ + [ 1ec34] Unknown color chunk type {}\n │ │ + [ 1ec51] Content size {} too small to include 24-bit color\n │ │ + [ 1ec84] (FFLspace/celestia/celestia/Selection;)V │ │ + [ 1ecad] jo │ │ + [ 1ecb0] DCT coefficient (lossy) or spatial difference (lossless) out of range │ │ + [ 1ecf6] Bogus input colorspace │ │ + [ 1ed0d] CCIR601 sampling not implemented yet │ │ + [ 1ed32] Unexpected marker 0x%02x │ │ + [ 1ed4b] Selected %d colors for quantization │ │ + [ 1ed6f] Closed temporary file %s │ │ + [ 1ed88] Arithmetic table 0x%02x was not defined │ │ + [ 1edb0] Registry │ │ + [ 1edb9] pfr-metrics │ │ + [ 1edc5] WEIGHT_NAME │ │ + [ 1edd1] + │ │ + [ 1edd4] RELATIVE_WEIGHT │ │ + [ 1ede6] � � │ │ + [ 1edf0] � � � │ │ + [ 1edfd] Descender │ │ + [ 1ee07] W0 │ │ + [ 1ee0a] W1 │ │ + [ 1ee0d] no value │ │ + [ 1ee16] field │ │ + [ 1ee1c] main │ │ + [ 1ee21] in function '%s' │ │ + [ 1ee33] or │ │ + [ 1ee36] return │ │ + [ 1ee3d] │ │ + [ 1ee46] >> │ │ + [ 1ee49] Lua 5.1 │ │ + [ 1ee51] sec │ │ + [ 1ee55] wday │ │ + [ 1ee5a] _LOADLIB │ │ + [ 1ee63] searchpath │ │ + [ 1ee6e] 'package.%s' must be a string │ │ + [ 1ee8c] unsupported zlib version │ │ + [ 1eea5] invalid embedded Abstract ICC profile │ │ + [ 1eecb] read beyond end of data │ │ + [ 1eee3] invalid PNG color type │ │ + [ 1eefa] png_do_encode_alpha: unexpected call │ │ + [ 1ef1f] PNG unsigned integer out of range │ │ + [ 1ef41] incorrect byte-order specifier │ │ + [ 1ef60] Not enough image data │ │ + [ 1ef76] cHRM Blue Z │ │ + [ 1ef82] sPLT out of memory │ │ + [ 1ef95] png_image_write_to_stdio: incorrect PNG_IMAGE_VERSION │ │ + [ 1efcb] Invalid bit depth for grayscale+alpha image │ │ + [ 1eff7] GETMSG: An invalid value of OPTION was input. Valid choices are 'SHORT', 'EXPLAIN', or 'LONG'. The value that was input was: │ │ + [ 1f07e] SPICE(ZEROVECTOR) │ │ + [ 1f090] FURNSH │ │ + [ 1f097] CHECK PARTIAL LIST │ │ + [ 1f0aa] DAFHSF │ │ + [ 1f0b1] DAFGS │ │ + [ 1f0b7] The EK file # contains no segments. │ │ + [ 1f0db] SPICE(INVALIDTABLENAME) │ │ + [ 1f0f3] activv │ │ + [ 1f0fa] # is not name of a column in FROM table #. │ │ + [ 1f125] ocols │ │ + [ 1f12b] The cell cannot accommodate the addition of the element *. │ │ + [ 1f167] There are no free nodes left for allocating in the supplied linked list pool. │ │ + [ 1f1b6] SPICE(NOFREENODES) │ │ + [ 1f1c9] LNKFSL │ │ + [ 1f1d0] Node NEXT: node number = #; backward pointer = #; forward pointer = #. Node LIST: node number = #; backward pointer = #; forward pointer = #. ("FREE" is #) │ │ + [ 1f26e] wtagnt │ │ + [ 1f275] #3 │ │ + [ 1f278] SPICE(UPDATEPENDING) │ │ + [ 1f28d] were not recognized │ │ + [ 1f2a2] CKR05 │ │ + [ 1f2a8] SPICE(NOTSUPPORTED) │ │ + [ 1f2bc] NTOL should be non-negative; it is #. │ │ + [ 1f2e2] The segment is not a type 2 segment. Type is # │ │ + [ 1f312] SPICE(INVALIDMETADATA) │ │ + [ 1f329] SUCCESS │ │ + [ 1f331] double precision │ │ + [ 1f342] cover │ │ + [ 1f348] SPKCOV │ │ + [ 1f34f] 00 │ │ + [ 1f352] The periapse vector supplied to SPKE15 had length zero. The most likely cause of this problem is a corrupted SPK (ephemeris) file. │ │ + [ 1f3d6] SPICE(INVALIDSTEPSIZE) │ │ + [ 1f3ed] spkr09_ │ │ + [ 1f3f5] SPKR12 │ │ + [ 1f3fc] SPICE(MALFORMEDSEGMENT) │ │ + [ 1f414] bpckep │ │ + [ 1f41b] bdcoef │ │ + [ 1f422] PCKE03 │ │ + [ 1f429] do_ud │ │ + [ 1f42f] wnincd_c │ │ + [ 1f438] SCARDD │ │ + [ 1f43f] lread │ │ + [ 1f445] XF2EUL │ │ + [ 1f44c] xf2eul_ │ │ + [ 1f454] nornam │ │ + [ 1f45b] zzddhgtu_ │ │ + [ 1f465] SPICE(FILARCHMISMATCH) │ │ + [ 1f47c] The file '#' utilizes the binary file format '#'. This format is currently unknown to this toolkit. A toolkit update may be in order. │ │ + [ 1f504] The native architecture for this platform is unknown to this version of the toolkit. This is a severe problem that should never occur, please contact NAIF. │ │ + [ 1f5a0] EARTH_IAU_1980 │ │ + [ 1f5af] AXIS(#) + LAMBDA/AXIS(#) is zero. │ │ + [ 1f5d1] ZZDYNOAC │ │ + [ 1f5da] twovec_ │ │ + [ 1f5e2] EK = #; SEG = #; ROW = #; COLIDX = #; ELT = #; column entry elt was not found. │ │ + [ 1f631] SPICE(UNINITIALIZED) │ │ + [ 1f646] ZZEKPGWD │ │ + [ 1f64f] SPICE(STRINGCOPYFAIL) │ │ + [ 1f665] F_Alloc │ │ + [ 1f66d] F2C_CreateStrArr_Sig │ │ + [ 1f682] IAU_THEBE │ │ + [ 1f68c] ZZHSCADD │ │ + [ 1f695] The hash has no room for any more items. │ │ + [ 1f6be] ADRASTEA │ │ + [ 1f6c7] SKATHI │ │ + [ 1f6ce] JARNSAXA │ │ + [ 1f6d7] GEOTAIL │ │ + [ 1f6df] NEXT │ │ + [ 1f6e4] RADIOASTRON │ │ + [ 1f6f0] LRO │ │ + [ 1f6f4] LUNAR RECONNAISSANCE ORBITER │ │ + [ 1f711] MGS │ │ + [ 1f715] INTEGRAL │ │ + [ 1f71e] SMART LANDER FOR INVESTIGATING MOON │ │ + [ 1f742] RADIATION BELT STORM PROBE B │ │ + [ 1f75f] SHOEMAKER-LEVY 9-C │ │ + [ 1f772] KOWAL 1 │ │ + [ 1f77a] VAISALA 1 │ │ + [ 1f784] WOLF-HARRINGTON │ │ + [ 1f794] WISEMAN-SKIFF │ │ + [ 1f7a2] C/2013 A1 │ │ + [ 1f7ac] STEINS │ │ + [ 1f7b3] BRAILLE │ │ + [ 1f7bb] SPICE(TRANSFERFILE) │ │ + [ 1f7cf] temp │ │ + [ 1f7d4] E │ │ + [ 1f7d6] BIG-IEEE LTL-IEEE │ │ + [ 1f7e8] ZZROTGT1 │ │ + [ 1f7f1] SPICE(NONPRINTINGCHAR) │ │ + [ 1f808] oi │ │ + [ 1f80b] m* │ │ + [ 1f80e] mD │ │ + [ 1f811] SCLK01_N_FIELDS_ │ │ + [ 1f822] The number of values associated with the kernel variable # for clock # is #, which exceeds the limit #. │ │ + [ 1f88a] SPICE(NUMPARTSUNEQUAL) │ │ + [ 1f8a1] SPICE(ORBITDECAY) │ │ + [ 1f8b3] JDTDB │ │ + [ 1f8ba] ZZSPKEZ1 │ │ + [ 1f8c3] ZZSPKGP1 │ │ + [ 1f8cc] Base frame kernel variable # exists but DTPOOL returned data type # rather than one of the expected values: 'C' or 'N'. │ │ + [ 1f944] The seconds component of '#' is out of range. On the Julian Calendar in the specified time zone (#) leapseconds can occur during the year # only in the second that immediately follows the time #:#:59 on # # and # #. │ │ + [ 1fa1f] mon │ │ + [ 1fa23] DPFMT │ │ + [ 1fa29] ( │ │ + [ 1fa2b] EDT │ │ + [ 1fa2f] OCTOBER │ │ + [ 1fa37] Two substrings indicating a calendar month were identified in the input time string <#> and <#>: " │ │ + [ 1fa9a] Y-iti:i:i │ │ + [ 1faa4] Yidi:n │ │ + [ 1faab] Yiii │ │ + [ 1fab0] YDmH*M │ │ + [ 1fab7] Yimi:i:n │ │ + [ 1fac0] mDYH*M*S │ │ + [ 1fac9] inm │ │ + [ 1facd] miiiii │ │ + [ 1fad4] i/i/Yi:i │ │ + [ 1fadd] Y-i-iti:ix │ │ + [ 1fae8] ZZVALCOR │ │ + [ 1faf1] matrix │ │ + [ 1faf8] AN │ │ + [ 1fafb] YU │ │ + [ 1fafe] CD │ │ + [ 1fb01] wuu │ │ + [ 1fb05] ak │ │ + [ 1fb08] akk │ │ + [ 1fb0c] ale │ │ + [ 1fb10] bss │ │ + [ 1fb14] chy │ │ + [ 1fb18] cr │ │ + [ 1fb1b] dje │ │ + [ 1fb1f] egy │ │ + [ 1fb23] ewo │ │ + [ 1fb27] fro │ │ + [ 1fb2b] gur │ │ + [ 1fb2f] ig │ │ + [ 1fb32] ilo │ │ + [ 1fb36] kaj │ │ + [ 1fb3a] kde │ │ + [ 1fb3e] kru │ │ + [ 1fb42] lah │ │ + [ 1fb46] mwr │ │ + [ 1fb4a] nds │ │ + [ 1fb4e] niu │ │ + [ 1fb52] nog │ │ + [ 1fb56] ny │ │ + [ 1fb59] pdt │ │ + [ 1fb5d] pon │ │ + [ 1fb61] tsd │ │ + [ 1fb65] uk │ │ + [ 1fb68] vep │ │ + [ 1fb6c] vun │ │ + [ 1fb70] ave │ │ + [ 1fb74] dzo │ │ + [ 1fb78] kas │ │ + [ 1fb7c] mah │ │ + [ 1fb80] mya │ │ + [ 1fb84] nob │ │ + [ 1fb88] que │ │ + [ 1fb8c] run │ │ + [ 1fb90] xho │ │ + [ 1fb94] CG │ │ + [ 1fb97] GL │ │ + [ 1fb9a] GW │ │ + [ 1fb9d] SK │ │ + [ 1fba0] SY │ │ + [ 1fba3] TO │ │ + [ 1fba6] AUT │ │ + [ 1fbaa] CXR │ │ + [ 1fbae] GUF │ │ + [ 1fbb2] GRL │ │ + [ 1fbb6] IRQ │ │ + [ 1fbba] KAZ │ │ + [ 1fbbe] TZA │ │ + [ 1fbc2] ne_NP │ │ + [ 1fbc8] sq_AL │ │ + [ 1fbce] sr_Latn │ │ + [ 1fbd6] persist.sys.timezone │ │ + [ 1fbeb] NZST │ │ + [ 1fbf0] ANAST │ │ + [ 1fbf6] Europe/Athens │ │ + [ 1fc04] Asia/Jerusalem │ │ + [ 1fc13] AZOST │ │ + [ 1fc19] PYT │ │ + [ 1fc1d] match │ │ + [ 1fc23] chr_Cher_US │ │ + [ 1fc2f] ckb_Arab_IQ │ │ + [ 1fc3b] en_VI │ │ + [ 1fc41] es_VE │ │ + [ 1fc47] fuv_NG │ │ + [ 1fc4e] ibb_NG │ │ + [ 1fc55] no_NO │ │ + [ 1fc5b] quc_Latn_GT │ │ + [ 1fc67] rm_CH │ │ + [ 1fc6d] sd_Arab_PK │ │ + [ 1fc78] wo_SN │ │ + [ 1fc7e] -u │ │ + [ 1fc81] i-navajo │ │ + [ 1fc8a] nan-x-zh-min │ │ + [ 1fc97] ja-latn-alalc97 │ │ + [ 1fca7] afternoon1 │ │ + [ 1fcb2] localeDisplayPattern │ │ + [ 1fcc7] {0}={1} │ │ + [ 1fccf] noncharacter │ │ + [ 1fcdc] U_INDEX_OUTOFBOUNDS_ERROR │ │ + [ 1fcf6] U_MALFORMED_VARIABLE_DEFINITION │ │ + [ 1fd16] U_MISPLACED_ANCHOR_START │ │ + [ 1fd2f] U_MULTIPLE_COMPOUND_FILTERS │ │ + [ 1fd4b] U_UNSUPPORTED_PROPERTY │ │ + [ 1fd62] U_BRK_INIT_ERROR │ │ + [ 1fd73] U_REGEX_SET_CONTAINS_STRING │ │ + [ 1fd8f] ADP │ │ + [ 1fd93] AWG │ │ + [ 1fd97] CSD │ │ + [ 1fd9b] NGN │ │ + [ 1fd9f] NPR │ │ + [ 1fda3] SDP │ │ + [ 1fda7] SGD │ │ + [ 1fdab] VND │ │ + [ 1fdaf] YER │ │ + [ 1fdb3] YUD │ │ + [ 1fdb7] ZWR │ │ + [ 1fdbb] lenient │ │ + [ 1fdc3] -Subnormal │ │ + [ 1fdce] ICU_ENABLE_TENTATIVE_ERA │ │ + [ 1fde7] mole │ │ + [ 1fdec] mile-per-gallon │ │ + [ 1fdfc] gigabyte │ │ + [ 1fe05] solar-radius │ │ + [ 1fe12] hectopascal │ │ + [ 1fe1e] inch-ofhg │ │ + [ 1fe28] megapascal │ │ + [ 1fe33] locative_copulative │ │ + [ 1fe47] locales_ordinals │ │ + [ 1fe58] locales/ │ │ + [ 1fe61] -and- │ │ + [ 1fe67] pow4- │ │ + [ 1fe6d] pow6- │ │ + [ 1fe73] pow14- │ │ + [ 1fe7a] kilo │ │ + [ 1fe7f] or-narrow │ │ + [ 1fe89] icudt75l-coll │ │ + [ 1fe97] last implicit │ │ + [ 1fea5] at │ │ + [ 1fea8] %.*g │ │ + [ 1fead] setPreferredDisplayModeId │ │ + [ 1fec7] unique_lock::lock: already locked │ │ + [ 1fee9] Comet tails enabled │ │ + [ 1fefd] INF │ │ + [ 1ff01] {:02d}' {:.1f}" │ │ + [ 1ff11] kpc │ │ + [ 1ff15] Distance from center: %s\n │ │ + [ 1ff2f] Temperature: %s\n │ │ + [ 1ff40] CHANNEL_AUX_27 │ │ + [ 1ff4f] Already connected │ │ + [ 1ff61] Core Audio │ │ + [ 1ff6c] [OpenSL] Failed to register buffer queue callback. │ │ + [ 1ff9f] [OpenSL] Failed to enqueue buffer for playback device. │ │ + [ 1ffd6] Failed to post MA_JOB_TYPE_RESOURCE_MANAGER_LOAD_DATA_BUFFER_NODE job. %s.\n │ │ + [ 20022] adtl │ │ + [ 20027] Path {} doesn't exist or isn't a directory\n │ │ + [ 20053] x │ │ + [ 20055] SyncOrbit │ │ + [ 2005f] aliceblue │ │ + [ 20069] mediumseagreen │ │ + [ 20078] OMI │ │ + [ 2007c] CHI │ │ + [ 20080] Kappa │ │ + [ 20086] comettails │ │ + [ 20091] boundaries │ │ + [ 2009c] center │ │ + [ 200a3] settextureresolution │ │ + [ 200b8] upframe │ │ + [ 200c0] object │ │ + [ 200c7] square │ │ + [ 200ce] filledsquare │ │ + [ 200db] circle │ │ + [ 200e2] Argument of category:haschild must be string or userdata! │ │ + [ 2011c] getobservers │ │ + [ 20129] Expected three or four arguments to celestia:setconstellationcolor() │ │ + [ 2016e] One argument expected for celestia:setoverlayelements() │ │ + [ 201a6] No argument expected for celestia:windowbordersvisible │ │ + [ 201dd] Function celestia:pauseaudio requires one argument │ │ + [ 20210] No arguments expected to function celestia:gettitlefont │ │ + [ 20248] Need one argument for celestia:loadfont() │ │ + [ 20272] char │ │ + [ 20277] class_celestia │ │ + [ 20286] LoadIdentity │ │ + [ 20293] No arguments expected for texture:getheight() │ │ + [ 202c1] getmass │ │ + [ 202c9] mass │ │ + [ 202ce] getspeed │ │ + [ 202d7] Third arg to observer:gotodistance must be a number │ │ + [ 2030b] Expected no arguments to observer:cancelgoto │ │ + [ 20338] No arguments expected for observer:getlocationflags() │ │ + [ 2036e] Argument to observer:setlocationflags() must be a table │ │ + [ 203a6] Need two operands for addition │ │ + [ 203c5] Bad {} value in material │ │ + [ 203de] color1 │ │ + [ 203e5] linelist │ │ + [ 203ee] material\n │ │ + [ 203f8] mesh\n │ │ + [ 203fe] {}\n │ │ + [ 20403] Texture coordinates must be present in mesh to generate tangents\n │ │ + [ 20445] jpl-emb-ssb │ │ + [ 20451] phobos │ │ + [ 20458] iau-oberon │ │ + [ 20463] cel_script_object_ │ │ + [ 20476] galaxy150 │ │ + [ 20480] Ari │ │ + [ 20484] Psc │ │ + [ 20488] OpenCluster │ │ + [ 20494] Spatially sorting DSOs for improved locality of reference . . .\n │ │ + [ 204d5] E4 │ │ + [ 204d8] models/E0.png │ │ + [ 204e6] FA │ │ + [ 204e9] ScriptedOrbit │ │ + [ 204f7] Could not load sampled orbit file '{}'\n │ │ + [ 2051f] FixedPosition │ │ + [ 2052d] Invalid beginning date specified for SPICE orbit.\n │ │ + [ 20560] MeanEquator │ │ + [ 2056c] Primary axis missing from two-vector frame.\n │ │ + [ 20599] diffTexCoord = │ │ + [ 205a9] vec4 color;\n │ │ + [ 205b6] eyeDir_tan │ │ + [ 205c1] gl_FragColor = │ │ + [ 205d5] vec2 │ │ + [ 205da] vec3 │ │ + [ 205df] cloudShadowTexCoord{} │ │ + [ 205f5] specFactors.{} │ │ + [ 20604] float distAtm = length(atmEnter - atmLeave);\n │ │ + [ 20636] * exp(-extinctionCoeff * density * distSun);\n │ │ + [ 20665] vec3 ex = exp(-extinctionCoeff * density * distAtm);\n │ │ + [ 2069f] scatterEx = ex;\n │ │ + [ 206b4] scatterColor = (phRayleigh * rayleighCoeff + phMie * mieCoeff) * invScatterCoeffSum * sunColor * │ │ + [ 2071a] float phMie = (1.0 - mieK * mieK) / ((1.0 - mieK * cosTheta) * (1.0 - mieK * cosTheta));\n │ │ + [ 20778] Class │ │ + [ 2077e] Density │ │ + [ 20786] Height │ │ + [ 2078d] V │ │ + [ 2078f] Bad spectral type in star database, star #{}\n │ │ + [ 207bd] {}1 {}{} │ │ + [ 207c6] Processing Meshdata chunk\n │ │ + [ 207e1] Content size {} too small to include texture coord array with {} entries\n │ │ + [ 2082b] onCelestiaProgress │ │ + [ 2083e] Comets │ │ + [ 20845] binary │ │ + [ 2084c] number │ │ + [ 20853] Creating renderer thread │ │ + [ 2086c] Bogus marker length │ │ + [ 20880] Empty JPEG image (DNL not supported) │ │ + [ 208a5] Read from XMS failed │ │ + [ 208ba] TrueType │ │ + [ 208c3] Notice │ │ + [ 208ca] Subrs │ │ + [ 208d0] CFF │ │ + [ 208d4] /FSType │ │ + [ 208dc] %ADOBeginFontDict │ │ + [ 208ee] CIDFontVersion │ │ + [ 208fd] GDBytes │ │ + [ 20905] ForceBoldThreshold │ │ + [ 20918] ITALIC_ANGLE │ │ + [ 20925] NOTICE │ │ + [ 2092c] SUBSCRIPT_SIZE │ │ + [ 2093b] WEIGHT │ │ + [ 20942] BBX │ │ + [ 20949] � │ │ + [ 2094e] KPX │ │ + [ 20952] XHeight │ │ + [ 2095a] variable names │ │ + [ 20969] cannot open %s: %s │ │ + [ 2097c] __mode │ │ + [ 20983] << │ │ + [ 20986] ./?.lua;/home/vagrant/build/apple-android/LuaJIT-87ae18af97fd4de790bb6c476b212e047689cc93/output/share/luajit-2.1/?.lua;/usr/local/share/lua/5.1/?.lua;/usr/local/share/lua/5.1/?/init.lua;/home/vagrant/build/apple-android/LuaJIT-87ae18af97fd4de790bb6c476b212e047689cc93/output/share/lua/5.1/?.lua;/home/vagrant/build/apple-android/LuaJIT-87ae18af97fd4de790bb6c476b212e047689cc93/output/share/lua/5.1/?/init.lua │ │ + [ 20b20] linedefined │ │ + [ 20b2c] INPUT │ │ + [ 20b32] tostring │ │ + [ 20b3b] damaged LZ stream │ │ + [ 20b4d] internal error checking chromaticities │ │ + [ 20b74] length does not match profile │ │ + [ 20b92] Invalid color type/bit depth combination in IHDR │ │ + [ 20bc3] Unknown interlace method in IHDR │ │ + [ 20be4] Invalid IHDR data │ │ + [ 20bf6] internal error: array alloc │ │ + [ 20c12] png_image_begin_read_from_memory: invalid argument │ │ + [ 20c45] gray[16] color-map: too few entries │ │ + [ 20c69] gray-alpha color-map: too few entries │ │ + [ 20c8f] unknown interlace type │ │ + [ 20ca6] Too much image data │ │ + [ 20cba] zstream unclaimed │ │ + [ 20ccc] png_set_keep_unknown_chunks: no chunk list │ │ + [ 20cf7] png_set_filter: UP/AVG/PAETH cannot be added after start │ │ + [ 20d30] Invalid number of colors in palette │ │ + [ 20d54] Can't write tRNS with an alpha channel │ │ + [ 20d7b] action │ │ + [ 20d82] SPICE(INVALIDEPOCH) │ │ + [ 20d96] SPICE(INVALIDINDEX) │ │ + [ 20daa] There Is No Element Corresponding to the Supplied Index │ │ + [ 20de2] Summary size was #, should not exceed #. │ │ + [ 20e0b] An attempt was made to reserve a negative number (#) of records. │ │ + [ 20e4c] Attempt to write file '#' failed. Value of IOSTAT was #. │ │ + [ 20e85] writing │ │ + [ 20e8d] No array is current; the `previous' array is the last array of DAF # │ │ + [ 20ed2] EKQMGR │ │ + [ 20ed9] ABORT │ │ + [ 20edf] SPICE(BLANKFILENAME) │ │ + [ 20ef4] Action was #; should be READ or WRITE │ │ + [ 20f1a] DECHAR │ │ + [ 20f21] SPICE(BADDASDIRECTORY) │ │ + [ 20f38] DASRRD │ │ + [ 20f3f] SPICE(INDEXOUTOFRANGE) │ │ + [ 20f56] String indices FIRST and LAST were #, #; allowed range for both is [#, #]. File was #, record number was #. │ │ + [ 20fc3] WRITE │ │ + [ 20fca] NEXT was #. LIST was #. Valid range is 1 to #. │ │ + [ 20ffa] dppool │ │ + [ 21001] WRPOOL │ │ + [ 21008] chpool │ │ + [ 2100f] CVPOOL │ │ + [ 21016] SPICE(BADARRAYSIZE) │ │ + [ 2102a] GNPOOL │ │ + [ 21031] power │ │ + [ 21037] INQUIRE error. File = #, IOSTAT = #. │ │ + [ 2105d] (A) │ │ + [ 21061] EIGHT │ │ + [ 21067] SPICE(UNKNOWNFRAMETYPE) │ │ + [ 2107f] SPICE(IRFNOTREC) │ │ + [ 21090] ckmeta_ │ │ + [ 21098] M2Q │ │ + [ 2109c] ISROT │ │ + [ 210a2] scard_c │ │ + [ 210aa] SCLKDP │ │ + [ 210b1] Invalid time system code # was found for SCLK #. │ │ + [ 210e2] SCEC01 │ │ + [ 210e9] SGFPKT │ │ + [ 210f0] Attempt to read from file '#' failed. IOSTAT = #. │ │ + [ 21122] IDW2AT │ │ + [ 21129] : │ │ + [ 2112b] SPKR08 │ │ + [ 21132] A type 15 segment should contain exactly 16 double precision values. The segment supplied had #. The segment is badly formed. │ │ + [ 211b3] The input value of X must be greater than #. The input value was # │ │ + [ 211f7] bnd │ │ + [ 211fb] Bad fixed offset frame specification: the frame '#' (frame ID #) is defined relative to itself. SPICE cannot work with such frames. │ │ + [ 21280] SPICE(TRACESTACKEMPTY) │ │ + [ 21297] bltcod │ │ + [ 2129e] The file table is full, with # entries. As a result, the file '#' could not be loaded. │ │ + [ 212f5] ftrtm │ │ + [ 212fb] vname │ │ + [ 21301] xform │ │ + [ 21307] mxmg_ │ │ + [ 2130d] zzekjoin_ │ │ + [ 21317] ZZEKQTAB │ │ + [ 21320] N_C_ALLOC │ │ + [ 2132a] EK stack pointer = #; call requests popping # items. │ │ + [ 2135f] ZZEKWEED │ │ + [ 21368] IAU_EARTH_BARYCENTER │ │ + [ 2137d] IAU_SUN │ │ + [ 21385] IAU_MARS │ │ + [ 2138e] IAU_DIONE │ │ + [ 21398] IAU_HYPERION │ │ + [ 213a5] IAU_DESPINA │ │ + [ 213b1] zzfrmch0_ │ │ + [ 213bb] ZZDYNFR0 │ │ + [ 213c4] ZZHSCINI │ │ + [ 213cd] DIONE │ │ + [ 213d3] STEPHANO │ │ + [ 213dc] FRANCISCO │ │ + [ 213e6] P7 │ │ + [ 213e9] P8 │ │ + [ 213ec] SDU │ │ + [ 213f0] VOYAGER 2 │ │ + [ 213fa] HAYABUSA2 │ │ + [ 21404] SUISEI │ │ + [ 2140b] MARS PATHFINDER │ │ + [ 2141b] MARS SURVEYOR 01 ORBITER │ │ + [ 21434] LUNAR RECON ORBITER │ │ + [ 21448] EOS-AM1 │ │ + [ 21450] EUROPA CLIPPER │ │ + [ 2145f] LARA │ │ + [ 21464] SLIM │ │ + [ 21469] RBSP_B │ │ + [ 21470] MTM │ │ + [ 21474] BORRELLY │ │ + [ 2147d] HARRINGTON-ABELL │ │ + [ 2148e] SANGUIN │ │ + [ 21496] CERES │ │ + [ 2149c] KLEOPATRA │ │ + [ 214a6] DSS-65 │ │ + [ 214ad] DSS-66 │ │ + [ 214b4] Name not available │ │ + [ 214c7] JULIAND. │ │ + [ 214d0] .# │ │ + [ 214d3] [Z] │ │ + [ 214d7] Day # has been specified for the year #. The correct range for the day of year for this year is from 1 to #. │ │ + [ 21545] A kernel pool variable name in the input buffer exceeds the maximum allowed length #1. The actual length of the variable name is #2, the offending variable name to #3 characters: '#4'. │ │ + [ 215fe] Mean semi-major axis value, #, below allowed minimum of 0.95. This error may indicate a bad TLE set or a decayed orbit. │ │ + [ 21676] YD │ │ + [ 2167a] forml │ │ + [ 21680] ZZSPKAC1 │ │ + [ 21689] Base frame name # of switch frame # could not be translated to a frame ID code │ │ + [ 216d9] mname │ │ + [ 216df] The format picture must begin with a non-blank character. The picture supplied was begun with a blank. │ │ + [ 21746] MDT │ │ + [ 2174a] i-i/i:i:n │ │ + [ 21754] i-i/i:n │ │ + [ 2175c] imiii │ │ + [ 21762] m*D*Y │ │ + [ 21768] i:ni/i/Y │ │ + [ 21771] Y-i-itix │ │ + [ 2177a] id │ │ + [ 2177d] hy │ │ + [ 21780] zh__HAKKA │ │ + [ 2178a] ace │ │ + [ 2178e] arp │ │ + [ 21792] chg │ │ + [ 21796] chp │ │ + [ 2179a] cy │ │ + [ 2179d] dv │ │ + [ 217a0] esu │ │ + [ 217a4] gag │ │ + [ 217a8] gom │ │ + [ 217ac] lg │ │ + [ 217af] luy │ │ + [ 217b3] mg │ │ + [ 217b6] mt │ │ + [ 217b9] nap │ │ + [ 217bd] nyn │ │ + [ 217c1] pi │ │ + [ 217c4] rif │ │ + [ 217c8] rue │ │ + [ 217cc] sco │ │ + [ 217d0] teo │ │ + [ 217d4] tkr │ │ + [ 217d8] tzm │ │ + [ 217dc] vi │ │ + [ 217df] wal │ │ + [ 217e3] est │ │ + [ 217e7] kik │ │ + [ 217eb] lug │ │ + [ 217ef] ton │ │ + [ 217f3] AF │ │ + [ 217f6] CZ │ │ + [ 217f9] EA │ │ + [ 217fc] HM │ │ + [ 217ff] HT │ │ + [ 21802] SR │ │ + [ 21805] TC │ │ + [ 21808] VG │ │ + [ 2180b] BEN │ │ + [ 2180f] BES │ │ + [ 21813] COG │ │ + [ 21817] DZA │ │ + [ 2181b] FRO │ │ + [ 2181f] GRD │ │ + [ 21823] HMD │ │ + [ 21827] KIR │ │ + [ 2182b] LIE │ │ + [ 2182f] MSR │ │ + [ 21833] MUS │ │ + [ 21837] NIU │ │ + [ 2183b] ROU │ │ + [ 2183f] TCD │ │ + [ 21843] URY │ │ + [ 21847] ROM │ │ + [ 2184b] /zoneinfo/ │ │ + [ 21856] 75.1 │ │ + [ 2185b] WAT │ │ + [ 2185f] GMT │ │ + [ 21863] Chile/Continental │ │ + [ 21875] EAST │ │ + [ 2187a] de_AT │ │ + [ 21880] de_LI │ │ + [ 21886] de_LU │ │ + [ 2188c] en_HK │ │ + [ 21892] ff_Latn_SN │ │ + [ 2189d] fr_CM │ │ + [ 218a3] sr_Cyrl_CS │ │ + [ 218ae] iw_IL │ │ + [ 218b4] sa_IN │ │ + [ 218ba] sms_FI │ │ + [ 218c1] bnn │ │ + [ 218c5] i-pwn │ │ + [ 218cb] jsl │ │ + [ 218cf] collations │ │ + [ 218da] %%Parent │ │ + [ 218e3] *NULL* │ │ + [ 218eb] ucol_close │ │ + [ 218f6] metazone-short │ │ + [ 21905] M05 │ │ + [ 21909] Languages │ │ + [ 21913] Rules │ │ + [ 21919] languages │ │ + [ 21923] paragraph separator │ │ + [ 21937] other punctuation │ │ + [ 21949] 0123456789ABCDEF<>- │ │ + [ 2195d] U_NO_WRITE_PERMISSION │ │ + [ 21973] U_AMBIGUOUS_ALIAS_WARNING │ │ + [ 2198d] U_INVALID_PROPERTY_PATTERN │ │ + [ 219a8] U_REGEX_MISSING_CLOSE_BRACKET │ │ + [ 219c6] U_STRINGPREP_PROHIBITED_ERROR │ │ + [ 219e4] SentenceBreak │ │ + [ 219f2] ANG │ │ + [ 219f6] BRZ │ │ + [ 219fa] EUR │ │ + [ 219fe] IDR │ │ + [ 21a02] PGK │ │ + [ 21a06] VED │ │ + [ 21a0a] YUN │ │ + [ 21a0e] percentFormat │ │ + [ 21a1c] Division impossible │ │ + [ 21a30] Division undefined │ │ + [ 21a43] -Normal │ │ + [ 21a4b] british-thermal-unit │ │ + [ 21a60] liter │ │ + [ 21a66] decimal │ │ + [ 21a6e] [:digit:] │ │ + [ 21a78] zetta │ │ + [ 21a7e] tera │ │ + [ 21a83] kibi │ │ + [ 21a88] gender │ │ + [ 21a8f] missing root elements data, tailoring not supported │ │ + [ 21ac3] reset primary-before ignorable not possible │ │ + [ 21aef] modifying collation elements │ │ + [ 21b0c] starred-relation string range contains a surrogate │ │ + [ 21b3f] backslash escape at the end of the rule string │ │ + [ 21b6e] not a valid setting/option │ │ + [ 21b89] last tertiary ignorable │ │ + [ 21ba1] ussystem │ │ + [ 21baa] special │ │ + [ 21bb2] ft_to_m │ │ + [ 21bba] ATrace_endAsyncSection │ │ + [ 21bd1] ()Landroid/view/Display; │ │ + [ 21bea] mAutoSwapInterval │ │ + [ 21bfd] │ │ + [ 21bff] Chase │ │ + [ 21c05] renderoverlay │ │ + [ 21c13] Failed to initialize renderer │ │ + [ 21c31] velocity vector │ │ + [ 21c41] C-{} │ │ + [ 21c46] width is not integer │ │ + [ 21c5b] FFVHEncoderOptions │ │ + [ 21c6e] TitleFont │ │ + [ 21c78] O │ │ + [ 21c7a] G │ │ + [ 21c7c] Y │ │ + [ 21c7e] " {\n │ │ + [ 21c84] time │ │ + [ 21c8c] Track %s\n │ │ + [ 21c96] ft/s │ │ + [ 21c9b] Abs (app) mag: {:.2f} ({:.2f})\n │ │ + [ 21cbb] WARNING │ │ + [ 21cc3] SSE2: %s\n │ │ + [ 21cd1] [%s]\n │ │ + [ 21cd7] Format: %s -> %s\n │ │ + [ 21cf2] CHANNEL_LFE │ │ + [ 21cfe] CHANNEL_AUX_25 │ │ + [ 21d0d] Timeout │ │ + [ 21d15] Socket operation on non-socket │ │ + [ 21d34] 8-bit Unsigned Integer │ │ + [ 21d4b] 32-bit Signed Integer │ │ + [ 21d61] Failed to post MA_JOB_TYPE_RESOURCE_MANAGER_FREE_DATA_BUFFER_NODE job. %s.\n │ │ + [ 21dad] fmt │ │ + [ 21db2] July │ │ + [ 21db7] limegreen │ │ + [ 21dc1] _ │ │ + [ 21dc3] locale │ │ + [ 21dca] EPS │ │ + [ 21dd1] horizontalgrid │ │ + [ 21de0] rupes │ │ + [ 21de6] setsurface │ │ + [ 21df1] clear │ │ + [ 21df7] visible │ │ + [ 21dff] Celx class expected │ │ + [ 21e13] setlayoutdirection │ │ + [ 21e26] getminfeaturesize │ │ + [ 21e38] ispaused │ │ + [ 21e41] dsos │ │ + [ 21e46] Values in table-argument to celestia:setlabelflags() must be boolean │ │ + [ 21e8b] Third argument to celestia:setconstellationcolor() must be a number │ │ + [ 21ecf] Argument to celestia:setminfeaturesize() must be a number │ │ + [ 21f09] Wrong number of arguments to function celestia:utctotdb │ │ + [ 21f41] Arguments to celestia:newposition must be either numbers or strings │ │ + [ 21f85] Two to six arguments expected to function celestia:play │ │ + [ 21fbd] First argument for celestia:play must be a number │ │ + [ 21fef] Function celestia:stopaudio requires one argument │ │ + [ 22021] First argument for celestia:setaudiopan must be a number │ │ + [ 2205a] Argument to celestia:getparamstring must be a string │ │ + [ 2208f] Invalid mipMapMode │ │ + [ 220a2] package │ │ + [ 220aa] button │ │ + [ 220b1] class_celscript │ │ + [ 220c1] POINTS │ │ + [ 220c8] POLYGON │ │ + [ 220d0] MODELVIEW │ │ + [ 220da] argument 3 to gl.Color must be a number │ │ + [ 22102] Two arguments expected for gl.BlendFunc() │ │ + [ 2212c] comet │ │ + [ 22132] gotoobject │ │ + [ 2213d] One argument required for setpos │ │ + [ 2215e] One argument expected for observer:synchronous │ │ + [ 2218d] One argument expected for observer:lock │ │ + [ 221b5] One argument expected for observer:track │ │ + [ 221de] One argument required for observer:setframe() │ │ + [ 2220c] No arguments expected for vector:normalize │ │ + [ 22237] ?.lua; │ │ + [ 2223e] Error: Unknown block type {} │ │ + [ 2225b] texcoord1 │ │ + [ 22265] callisto │ │ + [ 2226e] iau-neptune │ │ + [ 2227a] Could not read XYZV binary file {}.\n │ │ + [ 2229f] boundingRadius │ │ + [ 222ae] Failed to load module for ScriptedRotation: {}\n │ │ + [ 222de] galaxyTex │ │ + [ 222e8] tidalTex │ │ + [ 222f1] celestia-data │ │ + [ 222ff] Error parsing asterism "{}": expected array\n │ │ + [ 2232c] Dor │ │ + [ 22330] Lyn │ │ + [ 22334] Per │ │ + [ 22338] Tel │ │ + [ 2233c] qupeculavnctis minoris austrinise maeleonagittanajorisiopeiasoeniboologirsacadrpiucharicornoceromedangule berenicescopisum venaticorumba australes venaticis australisyxpenforoscopiculptoretertaurodisphindhemigaygborealiscinaelopardalisilalia │ │ + [ 2242e] RT │ │ + [ 22431] MO │ │ + [ 22434] FeatureHeight │ │ + [ 22442] Failed to read mesh header\n │ │ + [ 2245e] Bad syntax for primary axis of two-vector frame.\n │ │ + [ 22490] -x │ │ + [ 22493] Bad two-vector frame: no target specified for vector.\n │ │ + [ 224ca] textureOffset │ │ + [ 224d8] ringCenter │ │ + [ 224e3] diff.rgb += │ │ + [ 224f0] {0}.x = dot(T, {1});\n │ │ {0}.y = dot(-bitangent, {1});\n │ │ {0}.z = dot(N, {1});\n │ │ - [ 2250c] ).a * 0.75;\n │ │ - [ 22519] NormalizeMesh │ │ - [ 22527] Invalid filename in rings Texture\n │ │ - [ 2254a] Invalid filename in BumpMap\n │ │ - [ 22567] {}{}{} │ │ - [ 2256e] 1 │ │ - [ 22570] D │ │ - [ 22572] SpectralType │ │ - [ 2257f] Loading cross index failed\n │ │ - [ 2259b] Error writing PNG file '{}'\n │ │ - [ 225b8] Processing NamedObject chunk\n │ │ - [ 225d6] Processing BackgroundColor chunk\n │ │ - [ 225f8] Error occurred reading string\n │ │ - [ 22617] Content size {} too small to include point array count\n │ │ - [ 2264f] Processing MaterialDiffuse chunk\n │ │ - [ 22671] space/celestia/celestia/Star │ │ - [ 2268e] put │ │ - [ 22692] Planets │ │ - [ 2269a] discarded │ │ - [ 226a4] invalid UTF-8 byte at index │ │ - [ 226c1] incomplete UTF-8 string; last byte: 0x │ │ - [ 226e8] {} ({}) │ │ - [ 226f0] %s\n │ │ - [ 226f8] llx │ │ - [ 226fc] LC_ALL │ │ - [ 22703] nplurals= │ │ - [ 2270d] Improper call to JPEG library in state %d │ │ - [ 22737] Requested features are incompatible │ │ - [ 2275b] Unsupported JPEG process: SOF type 0x%02x │ │ - [ 22785] Invalid JPEG file structure: SOS before SOF │ │ - [ 227b1] JFIF extension marker: JPEG-compressed thumbnail image, length %u │ │ - [ 227f3] Corrupt JPEG data: bad arithmetic code │ │ - [ 2281a] %ld%c │ │ - [ 22820] FamilyName │ │ - [ 2282b] sfnts │ │ - [ 22831] 10646 │ │ - [ 22837] STARTPROPERTIES │ │ - [ 22847] RAW_ASCENT │ │ - [ 22852] _XFREE86_GLYPH_RANGES │ │ - [ 22868] ENDCHAR │ │ - [ 22870] 1.2.8 │ │ - [ 22876] IsBaseFont │ │ - [ 22881] MappingScheme │ │ - [ 2288f] [string " │ │ - [ 22899] abort │ │ - [ 2289f] _LOADED │ │ - [ 228a7] init │ │ - [ 228ac] flnSu │ │ - [ 228b2] ctype<%s> │ │ - [ 228bc] /* GNU ld script │ │ - [ 228cd] gamma value does not match libpng estimate │ │ - [ 228f8] profile ' │ │ - [ 22902] gray[8] color-map: too few entries │ │ - [ 22925] Call to NULL read function │ │ - [ 22940] output gamma out of expected range │ │ - [ 22963] conflicting calls to set alpha mode and background │ │ - [ 22996] extra compressed data │ │ - [ 229ac] sPLT chunk has bad length │ │ - [ 229c6] too many text chunks │ │ - [ 229db] png_set_keep_unknown_chunks: invalid keep │ │ - [ 22a05] ERRACT: An invalid value of ACTION was supplied. The value was: │ │ - [ 22a48] errch_c │ │ - [ 22a50] SPICE(EMBEDDEDBLANK) │ │ - [ 22a65] An Invalid Action Value Was Supplied │ │ - [ 22a8a] No Further Symbols Can be Inserted; the Name Table is Full │ │ - [ 22ac5] intstr_ │ │ - [ 22acd] Input file name <#> has length @ characters. The limit on the length of file names stored by FURNSH is @ characters. │ │ - [ 22b42] srces │ │ - [ 22b48] KCLEAR │ │ - [ 22b4f] sthan │ │ - [ 22b55] SPICE(CKTOOMANYFILES) │ │ - [ 22b6b] NEW INSTRUMENT │ │ - [ 22b7a] MAKE ROOM │ │ - [ 22b84] SPICE(DAFFTFULL) │ │ - [ 22b95] off end of record │ │ - [ 22ba7] INSRTI │ │ - [ 22bae] write start │ │ - [ 22bba] sthvnr │ │ - [ 22bc1] rbreq │ │ - [ 22bc7] DUPLICATE_COLUMN_NAMES │ │ - [ 22bde] stsidx │ │ - [ 22be5] ATTRIBUTE_TABLE_FULL │ │ - [ 22bfa] NUM_TABLES │ │ - [ 22c05] Row indices for query result range from 1 to #; requested row index was #. │ │ - [ 22c50] Column # has data type #. │ │ - [ 22c6a] SPICE(DASNOSUCHUNIT) │ │ - [ 22c7f] upbufd │ │ - [ 22c86] DASRRC │ │ - [ 22c8d] upbufc │ │ - [ 22c94] DASSDR │ │ - [ 22c9b] NWORDS was #; should be non-negative. │ │ - [ 22cc1] NODE was #; valid range is 1 to #. │ │ - [ 22ce4] (1X,A,D25.17,A) │ │ - [ 22cf4] An error occurred while │ │ - [ 22d0c] 0.0000000000000000000000000 │ │ - [ 22d29] ipower │ │ - [ 22d30] j2000 │ │ - [ 22d36] REMOVC │ │ - [ 22d3d] THREE │ │ - [ 22d43] Window size in type 05 segment was #; must be even for subtypes 1 and 3 (Lagrange, 4 or 7-element packets). │ │ - [ 22daf] LGRINT │ │ - [ 22db6] Input matrix was not a rotation. │ │ - [ 22dd7] SPICE(BADSUBSCRIPT): Subscript out of range on file line %ld, procedure "%s". Attempt to access element %ld of variable "%s".\n │ │ + [ 22539] ).a * 0.75;\n │ │ + [ 22546] NormalizeMesh │ │ + [ 22554] Invalid filename in rings Texture\n │ │ + [ 22577] Invalid filename in BumpMap\n │ │ + [ 22594] {}{}{} │ │ + [ 2259b] 1 │ │ + [ 2259d] D │ │ + [ 2259f] SpectralType │ │ + [ 225ac] Loading cross index failed\n │ │ + [ 225c8] Error writing PNG file '{}'\n │ │ + [ 225e5] Processing NamedObject chunk\n │ │ + [ 22603] Processing BackgroundColor chunk\n │ │ + [ 22625] Error occurred reading string\n │ │ + [ 22644] Content size {} too small to include point array count\n │ │ + [ 2267c] Processing MaterialDiffuse chunk\n │ │ + [ 2269e] space/celestia/celestia/Star │ │ + [ 226bb] put │ │ + [ 226bf] Planets │ │ + [ 226c7] discarded │ │ + [ 226d1] invalid UTF-8 byte at index │ │ + [ 226ee] incomplete UTF-8 string; last byte: 0x │ │ + [ 22715] {} ({}) │ │ + [ 2271d] %s\n │ │ + [ 22725] llx │ │ + [ 22729] LC_ALL │ │ + [ 22730] nplurals= │ │ + [ 2273a] Improper call to JPEG library in state %d │ │ + [ 22764] Requested features are incompatible │ │ + [ 22788] Unsupported JPEG process: SOF type 0x%02x │ │ + [ 227b2] Invalid JPEG file structure: SOS before SOF │ │ + [ 227de] JFIF extension marker: JPEG-compressed thumbnail image, length %u │ │ + [ 22820] Corrupt JPEG data: bad arithmetic code │ │ + [ 22847] %ld%c │ │ + [ 2284d] FamilyName │ │ + [ 22858] sfnts │ │ + [ 2285e] 10646 │ │ + [ 22864] STARTPROPERTIES │ │ + [ 22874] RAW_ASCENT │ │ + [ 2287f] _XFREE86_GLYPH_RANGES │ │ + [ 22895] ENDCHAR │ │ + [ 2289d] 1.2.8 │ │ + [ 228a3] IsBaseFont │ │ + [ 228ae] MappingScheme │ │ + [ 228bc] [string " │ │ + [ 228c6] abort │ │ + [ 228cc] _LOADED │ │ + [ 228d4] init │ │ + [ 228d9] flnSu │ │ + [ 228df] ctype<%s> │ │ + [ 228e9] /* GNU ld script │ │ + [ 228fa] gamma value does not match libpng estimate │ │ + [ 22925] profile ' │ │ + [ 2292f] gray[8] color-map: too few entries │ │ + [ 22952] Call to NULL read function │ │ + [ 2296d] output gamma out of expected range │ │ + [ 22990] conflicting calls to set alpha mode and background │ │ + [ 229c3] extra compressed data │ │ + [ 229d9] sPLT chunk has bad length │ │ + [ 229f3] too many text chunks │ │ + [ 22a08] png_set_keep_unknown_chunks: invalid keep │ │ + [ 22a32] ERRACT: An invalid value of ACTION was supplied. The value was: │ │ + [ 22a75] errch_c │ │ + [ 22a7d] SPICE(EMBEDDEDBLANK) │ │ + [ 22a92] An Invalid Action Value Was Supplied │ │ + [ 22ab7] No Further Symbols Can be Inserted; the Name Table is Full │ │ + [ 22af2] intstr_ │ │ + [ 22afa] Input file name <#> has length @ characters. The limit on the length of file names stored by FURNSH is @ characters. │ │ + [ 22b6f] srces │ │ + [ 22b75] KCLEAR │ │ + [ 22b7c] sthan │ │ + [ 22b82] SPICE(CKTOOMANYFILES) │ │ + [ 22b98] NEW INSTRUMENT │ │ + [ 22ba7] MAKE ROOM │ │ + [ 22bb1] SPICE(DAFFTFULL) │ │ + [ 22bc2] off end of record │ │ + [ 22bd4] INSRTI │ │ + [ 22bdb] write start │ │ + [ 22be7] sthvnr │ │ + [ 22bee] rbreq │ │ + [ 22bf4] DUPLICATE_COLUMN_NAMES │ │ + [ 22c0b] stsidx │ │ + [ 22c12] ATTRIBUTE_TABLE_FULL │ │ + [ 22c27] NUM_TABLES │ │ + [ 22c32] Row indices for query result range from 1 to #; requested row index was #. │ │ + [ 22c7d] Column # has data type #. │ │ + [ 22c97] SPICE(DASNOSUCHUNIT) │ │ + [ 22cac] upbufd │ │ + [ 22cb3] DASRRC │ │ + [ 22cba] upbufc │ │ + [ 22cc1] DASSDR │ │ + [ 22cc8] NWORDS was #; should be non-negative. │ │ + [ 22cee] NODE was #; valid range is 1 to #. │ │ + [ 22d11] (1X,A,D25.17,A) │ │ + [ 22d21] An error occurred while │ │ + [ 22d39] 0.0000000000000000000000000 │ │ + [ 22d56] ipower │ │ + [ 22d5d] j2000 │ │ + [ 22d63] REMOVC │ │ + [ 22d6a] THREE │ │ + [ 22d70] Window size in type 05 segment was #; must be even for subtypes 1 and 3 (Lagrange, 4 or 7-element packets). │ │ + [ 22ddc] LGRINT │ │ + [ 22de3] Input matrix was not a rotation. │ │ + [ 22e04] SPICE(BADSUBSCRIPT): Subscript out of range on file line %ld, procedure "%s". Attempt to access element %ld of variable "%s".\n │ │ SCARDI │ │ - [ 22e5e] SPKSFS │ │ - [ 22e65] spkgeo_c │ │ - [ 22e6e] extra │ │ - [ 22e74] SPKE15 │ │ - [ 22e7b] SPKE18 │ │ - [ 22e82] KEPLEQ │ │ - [ 22e89] SPICE(INSUFFICIENTANGLES) │ │ - [ 22ea3] bwcoef │ │ - [ 22eaa] PCKR03 │ │ - [ 22eb1] TRCNAM: An invalid index was input. The value was: │ │ - [ 22ee6] GPS │ │ - [ 22eea] <> │ │ - [ 22eed] vout │ │ - [ 22ef2] invalid number │ │ - [ 22f01] ZZBODINI │ │ - [ 22f0a] Insufficient room to copy the stored body name-code mappings to the output arguments. Space required is #, but the caller supplied #. │ │ - [ 22f91] ZZBODLST │ │ - [ 22f9a] Name to ID mappings. │ │ - [ 22faf] zzdafgdr_ │ │ - [ 22fb9] Attempt to write file '#' failed. Value of IOSTAT was #. The file has been deleted. │ │ - [ 2300d] The maximum number of units are locked to handles. As such, there is no room to open the requested scratch file. │ │ - [ 2307f] ftbff │ │ - [ 23085] # file $ is open for READ access. Attempt to close and delete file has failed. │ │ - [ 230d6] SPICE(FILENOTCONNECTED) │ │ - [ 230ee] ZZDSKBSR │ │ - [ 230f7] CONSTANT │ │ - [ 23100] Kernel variable # was expected to be present in the kernel pool but was not found. The alternative form of kernel variable name FRAME_#_# was not searched for because this name has excessive length (# characters vs allowed maximum of #). One of these variables is needed to define the parameterized dynamic frame #. Usually this type of problem is due to a missing keyword assignment in a frame kernel. Another, less likely, possibility is that other errors in a frame kernel have confused the frame subsystem into wrongly deciding these variables are needed. │ │ - [ 23334] Delta abscissa value is zero; a non-zero value is required. │ │ - [ 23370] orignl │ │ - [ 23377] Cross product table index for left hand side of constraint # was #; valid range is 1:# │ │ - [ 233ce] ZZEKQORD │ │ - [ 233d7] NAMES_RESOLVED │ │ - [ 233e6] ZZEKRCMP │ │ - [ 233ef] The data type code # was not recognized. │ │ - [ 23418] Item # not found. │ │ - [ 2342a] SPICE(INVALIDNAME) │ │ - [ 2343d] Segment number = #; valid range is 1:#. │ │ - [ 23465] ZZEKVADR │ │ - [ 2346e] SPICE(BADADDRESS) │ │ - [ 23480] Data type mismatch for order-by column having index #; type for segment # = #; type for segment # is # │ │ - [ 234e7] C2F_CreateStrArr_Sig │ │ - [ 234fc] IAU_VENUS │ │ - [ 23506] IAU_URANUS │ │ - [ 23511] IAU_NEPTUNE │ │ - [ 2351d] IAU_TITAN │ │ - [ 23527] IAU_BIANCA │ │ - [ 23532] IAU_QUETA │ │ - [ 2353c] MARS BARYCENTER │ │ - [ 2354c] MIMAS │ │ - [ 23552] HYPERION │ │ - [ 2355b] PANDORA │ │ - [ 23563] FENRIR │ │ - [ 2356a] SURTUR │ │ - [ 23571] PLC │ │ - [ 23575] PLANET-C │ │ - [ 2357e] BEAGLE2 │ │ - [ 23586] GENESIS │ │ - [ 2358e] TGO │ │ - [ 23592] MUSES-B │ │ - [ 2359a] NISAR │ │ - [ 235a0] LICIACUBE │ │ - [ 235aa] SELENE VRAD Satellite │ │ - [ 235c0] SHOEMAKER-LEVY 9-Q1 │ │ - [ 235d4] BUS │ │ - [ 235d8] 67P/CHURYUMOV-GERASIMENKO (1969 R1) │ │ - [ 235fc] COMAS SOLA │ │ - [ 23607] TSUCHINSHAN 1 │ │ - [ 23615] VAN BIESBROECK │ │ - [ 23624] ORUS │ │ - [ 23629] Failure to find required CK data could be due to one or more CK files not having been loaded, or to the epoch shown above lying within a coverage gap or beyond the coverage bounds of the loaded CK files. It is also possible that no loaded CK file has required angular velocity data for the input epoch, even if a loaded CK does have attitude data for that epoch. You can use CKBRIEF with the -dump option to display coverage intervals of a CK file. │ │ - [ 237ea] SPICE(CALLEDOUTOFORDER) │ │ - [ 23802] lt │ │ - [ 23805] Z │ │ - [ 23807] _# │ │ - [ 2380a] Item # has size # but output array has size #. │ │ - [ 23839] TDB │ │ - [ 2383e] TDT │ │ - [ 23843] YWD │ │ - [ 23848] ZZSPKLT0 │ │ - [ 23851] basbeg │ │ - [ 23858] SPICE(BADDEFAULTVALUE) │ │ - [ 2386f] substring │ │ - [ 23879] MONDAY │ │ - [ 23880] The year associated with the calendar string "#" could not be identified. │ │ - [ 238cb] Yy*H*M │ │ - [ 238d2] Ymii:i │ │ - [ 238d9] y*Y*H*M │ │ - [ 238e1] iidi:i:n │ │ - [ 238ea] iimiin │ │ - [ 238f1] i-itn │ │ - [ 238f7] i:ni/i/i │ │ - [ 23900] i:ni-i-Y │ │ - [ 23909] Y-itnx │ │ - [ 23910] Aberration correction specification # calls for relativistic corrections, which are not supported. │ │ - [ 23973] RS │ │ - [ 23976] YE │ │ - [ 23979] as │ │ - [ 2397c] asa │ │ - [ 23980] awa │ │ - [ 23984] bal │ │ - [ 23988] bi │ │ - [ 2398b] den │ │ - [ 2398f] eu │ │ - [ 23992] gez │ │ - [ 23996] kxv │ │ - [ 2399a] mua │ │ - [ 2399e] om │ │ - [ 239a1] osa │ │ - [ 239a5] sa │ │ - [ 239a8] shi │ │ - [ 239ac] tk │ │ - [ 239af] tlh │ │ - [ 239b3] uz │ │ - [ 239b6] wae │ │ - [ 239ba] aar │ │ - [ 239be] bos │ │ - [ 239c2] fij │ │ - [ 239c6] jav │ │ - [ 239ca] ltz │ │ - [ 239ce] nya │ │ - [ 239d2] oss │ │ - [ 239d6] tir │ │ - [ 239da] tsn │ │ - [ 239de] FI │ │ - [ 239e1] GT │ │ - [ 239e4] KR │ │ - [ 239e7] BHR │ │ - [ 239eb] BLM │ │ - [ 239ef] BHS │ │ - [ 239f3] DMA │ │ - [ 239f7] LAO │ │ - [ 239fb] LUX │ │ - [ 239ff] MDA │ │ - [ 23a03] MTQ │ │ - [ 23a07] SRB │ │ - [ 23a0b] SYC │ │ - [ 23a0f] TUR │ │ - [ 23a13] VAT │ │ - [ 23a17] am_ET │ │ - [ 23a1d] Asia/Sakhalin │ │ - [ 23a2b] Asia/Vladivostok │ │ - [ 23a3c] Asia/Yerevan │ │ - [ 23a49] MSD │ │ - [ 23a4d] Africa/Algiers │ │ - [ 23a5c] Europe/London │ │ - [ 23a6a] ar_DZ │ │ - [ 23a70] es_AR │ │ - [ 23a76] fr_CD │ │ - [ 23a7c] mn_Mong_CN │ │ - [ 23a87] sgn-ch-de │ │ - [ 23a91] zh-hakka │ │ - [ 23a9a] sgn-de │ │ - [ 23aa1] nb nn │ │ - [ 23aa7] zoneinfo64 │ │ - [ 23ab2] hebr │ │ - [ 23ab7] month-format-except-narrow │ │ - [ 23ad2] zone-long │ │ - [ 23adc] ethiopic-amete-alem │ │ - [ 23af0] M01 │ │ - [ 23af4] characters │ │ - [ 23aff] Names │ │ - [ 23b05] standard │ │ - [ 23b0e] ubrk_swap(): RBBI Data header is invalid.\n │ │ - [ 23b39] out of memory swapping %u unames.icu tokens\n │ │ - [ 23b66] U_BAD_VARIABLE_DEFINITION │ │ - [ 23b80] U_DECIMAL_NUMBER_SYNTAX_ERROR │ │ - [ 23b9e] U_BRK_HEX_DIGITS_EXPECTED │ │ - [ 23bb8] U_STRINGPREP_UNASSIGNED_ERROR │ │ - [ 23bd6] U_IDNA_ZERO_LENGTH_LABEL_ERROR │ │ - [ 23bf5] BYB │ │ - [ 23bf9] CHF │ │ - [ 23bfd] CUC │ │ - [ 23c01] HKD │ │ - [ 23c05] MXV │ │ - [ 23c09] XAF │ │ - [ 23c0d] XPT │ │ - [ 23c11] NaN │ │ - [ 23c15] light │ │ - [ 23c1b] megabyte │ │ - [ 23c24] kilocalorie │ │ - [ 23c30] parsec │ │ - [ 23c37] solar-mass │ │ - [ 23c42] millibar │ │ - [ 23c4b] pow15- │ │ - [ 23c52] deci │ │ - [ 23c57] weekOfMonth │ │ - [ 23c63] colReorder │ │ - [ 23c6e] normalizing the reset position │ │ - [ 23c8d] item_per_mole │ │ - [ 23c9b] virtual void swappy::ChoreographerThread::postFrameCallbacks() │ │ - [ 23cda] (Ljava/lang/String;Ljava/lang/ClassLoader;)V │ │ - [ 23d07] SwappyDisplayManager │ │ - [ 23d1c] getPresentationDeadlineNanos │ │ - [ 23d39] keydown │ │ - [ 23d41] Star style: fuzzy points │ │ - [ 23d5a] ~/.celestia/celestia.cfg │ │ - [ 23d73] Invalid URL │ │ - [ 23d7f] spin vector │ │ - [ 23d8b] terminator │ │ - [ 23d96] LayoutDirection │ │ - [ 23da6] parentFolder │ │ - [ 23db4] offset [ │ │ - [ 23dbe] Real time │ │ - [ 23dc8] {} �C │ │ - [ 23dcf] Default Capture Device │ │ - [ 23de6] LE │ │ - [ 23de9] Interrupted │ │ - [ 23df5] Bad address │ │ - [ 23e01] Invalid message │ │ - [ 23e11] Not connected │ │ - [ 23e1f] Invalid device config │ │ - [ 23e35] 0.6.38 │ │ - [ 23e3c] OpenSL|ES │ │ - [ 23e46] AAudioStreamBuilder_setDirection │ │ - [ 23e67] ??? │ │ - [ 23e6b] Loading character {:x} failed!\n │ │ - [ 23e8b] antiquewhite │ │ - [ 23e98] linen │ │ - [ 23e9e] mediumspringgreen │ │ - [ 23eb0] tomato │ │ - [ 23eb7] .xyz │ │ - [ 23ebf] ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/ │ │ - [ 23f00] arcus │ │ - [ 23f06] Selection │ │ - [ 23f10] spacecraftorbits │ │ - [ 23f21] texture │ │ - [ 23f29] color │ │ - [ 23f2f] Unknown {} flag: {}\n │ │ - [ 23f44] bottom │ │ - [ 23f4b] left │ │ - [ 23f50] fitscreen │ │ - [ 23f5a] setminorbitsize │ │ - [ 23f6a] geturl │ │ - [ 23f71] Keys in table-argument to celestia:setoverlayelements() must be strings │ │ - [ 23fb9] One argument expected to function celestia:mark │ │ - [ 23fe9] First arg to celestia:getdso must be a number │ │ - [ 24017] newframe: two objects required for lock frame │ │ - [ 24045] First argument for celestia:registereventhandler must be a string │ │ - [ 24087] Third argument to celestia:play must be a number (pan) │ │ - [ 240be] default │ │ - [ 240c6] celestia_keyboard_callback │ │ - [ 240e1] dt │ │ - [ 240e4] argument 6 to gl.Frustum must be a number │ │ - [ 2410e] argument 5 to gl.Ortho must be a number │ │ - [ 24136] phases │ │ - [ 2413d] Expected no or one argument to object:getposition │ │ - [ 2416f] No argument expected for observer:makeactiveview() │ │ - [ 241a2] addvector │ │ - [ 241ac] [Rotation] │ │ - [ 241b7] Script coroutine initialization failed │ │ - [ 241de] sprites │ │ - [ 241e6] Vertex position must be a float3\n │ │ - [ 24208] venus-jpl │ │ - [ 24212] rhea │ │ - [ 24217] iau-pan │ │ - [ 2421f] Couldn't find SPICE ID for {}\n │ │ - [ 2423e] Cen │ │ - [ 24242] Eri │ │ - [ 24246] Hor │ │ - [ 2424a] Mic │ │ - [ 2424e] Globular │ │ - [ 24257] models/Sb.png │ │ - [ 24265] GL_OES_texture_border_clamp │ │ - [ 24281] Mesa │ │ - [ 24286] Error compiling geometry shader:\n │ │ - [ 242a8] MA │ │ - [ 242ab] VA │ │ - [ 242ae] LC │ │ - [ 242b1] Skipping mesh with 0 primitive groups!\n │ │ - [ 242d9] Mesh index {} is higher than VBO count {}! │ │ - [ 24304] Object has incorrect FixedPosition syntax.\n │ │ - [ 24330] BoundingRadius │ │ - [ 2433f] SemiMajorAxis │ │ - [ 2434d] LongOfPericenter │ │ - [ 2435e] BaseFrame │ │ - [ 24368] {:.2f} │ │ - [ 2436f] Loading rotation model: {}\n │ │ - [ 2438b] shaders │ │ - [ 24393] {}_frag.glsl │ │ - [ 243a0] ***************************************************/\n │ │ - [ 243d6] cosNormalLightDir = dot(in_Normal, │ │ - [ 243fa] * max(0.0, t / dot( │ │ - [ 2440f] shadowTexGenT │ │ - [ 2441d] cloudShadowTex │ │ - [ 2442c] NL = max(0.0, NL);\n │ │ - [ 24440] .z * 8.0, 0.0, 1.0);\n │ │ - [ 24456] l = max(0.0, dot( │ │ - [ 24468] halfVector │ │ - [ 24473] = dot(position, │ │ - [ 24485] atmosphereRadius │ │ - [ 24496] attribute {} {};\n │ │ - [ 244a9] vec4 calc_vp(vec4 in_Position)\n │ │ + [ 22e8b] SPKSFS │ │ + [ 22e92] spkgeo_c │ │ + [ 22e9b] extra │ │ + [ 22ea1] SPKE15 │ │ + [ 22ea8] SPKE18 │ │ + [ 22eaf] KEPLEQ │ │ + [ 22eb6] SPICE(INSUFFICIENTANGLES) │ │ + [ 22ed0] bwcoef │ │ + [ 22ed7] PCKR03 │ │ + [ 22ede] TRCNAM: An invalid index was input. The value was: │ │ + [ 22f13] GPS │ │ + [ 22f17] <> │ │ + [ 22f1a] vout │ │ + [ 22f1f] invalid number │ │ + [ 22f2e] ZZBODINI │ │ + [ 22f37] Insufficient room to copy the stored body name-code mappings to the output arguments. Space required is #, but the caller supplied #. │ │ + [ 22fbe] ZZBODLST │ │ + [ 22fc7] Name to ID mappings. │ │ + [ 22fdc] zzdafgdr_ │ │ + [ 22fe6] Attempt to write file '#' failed. Value of IOSTAT was #. The file has been deleted. │ │ + [ 2303a] The maximum number of units are locked to handles. As such, there is no room to open the requested scratch file. │ │ + [ 230ac] ftbff │ │ + [ 230b2] # file $ is open for READ access. Attempt to close and delete file has failed. │ │ + [ 23103] SPICE(FILENOTCONNECTED) │ │ + [ 2311b] ZZDSKBSR │ │ + [ 23124] CONSTANT │ │ + [ 2312d] Kernel variable # was expected to be present in the kernel pool but was not found. The alternative form of kernel variable name FRAME_#_# was not searched for because this name has excessive length (# characters vs allowed maximum of #). One of these variables is needed to define the parameterized dynamic frame #. Usually this type of problem is due to a missing keyword assignment in a frame kernel. Another, less likely, possibility is that other errors in a frame kernel have confused the frame subsystem into wrongly deciding these variables are needed. │ │ + [ 23361] Delta abscissa value is zero; a non-zero value is required. │ │ + [ 2339d] orignl │ │ + [ 233a4] Cross product table index for left hand side of constraint # was #; valid range is 1:# │ │ + [ 233fb] ZZEKQORD │ │ + [ 23404] NAMES_RESOLVED │ │ + [ 23413] ZZEKRCMP │ │ + [ 2341c] The data type code # was not recognized. │ │ + [ 23445] Item # not found. │ │ + [ 23457] SPICE(INVALIDNAME) │ │ + [ 2346a] Segment number = #; valid range is 1:#. │ │ + [ 23492] ZZEKVADR │ │ + [ 2349b] SPICE(BADADDRESS) │ │ + [ 234ad] Data type mismatch for order-by column having index #; type for segment # = #; type for segment # is # │ │ + [ 23514] C2F_CreateStrArr_Sig │ │ + [ 23529] IAU_VENUS │ │ + [ 23533] IAU_URANUS │ │ + [ 2353e] IAU_NEPTUNE │ │ + [ 2354a] IAU_TITAN │ │ + [ 23554] IAU_BIANCA │ │ + [ 2355f] IAU_QUETA │ │ + [ 23569] MARS BARYCENTER │ │ + [ 23579] MIMAS │ │ + [ 2357f] HYPERION │ │ + [ 23588] PANDORA │ │ + [ 23590] FENRIR │ │ + [ 23597] SURTUR │ │ + [ 2359e] PLC │ │ + [ 235a2] PLANET-C │ │ + [ 235ab] BEAGLE2 │ │ + [ 235b3] GENESIS │ │ + [ 235bb] TGO │ │ + [ 235bf] MUSES-B │ │ + [ 235c7] NISAR │ │ + [ 235cd] LICIACUBE │ │ + [ 235d7] SELENE VRAD Satellite │ │ + [ 235ed] SHOEMAKER-LEVY 9-Q1 │ │ + [ 23601] BUS │ │ + [ 23605] 67P/CHURYUMOV-GERASIMENKO (1969 R1) │ │ + [ 23629] COMAS SOLA │ │ + [ 23634] TSUCHINSHAN 1 │ │ + [ 23642] VAN BIESBROECK │ │ + [ 23651] ORUS │ │ + [ 23656] Failure to find required CK data could be due to one or more CK files not having been loaded, or to the epoch shown above lying within a coverage gap or beyond the coverage bounds of the loaded CK files. It is also possible that no loaded CK file has required angular velocity data for the input epoch, even if a loaded CK does have attitude data for that epoch. You can use CKBRIEF with the -dump option to display coverage intervals of a CK file. │ │ + [ 23817] SPICE(CALLEDOUTOFORDER) │ │ + [ 2382f] lt │ │ + [ 23832] Z │ │ + [ 23834] _# │ │ + [ 23837] Item # has size # but output array has size #. │ │ + [ 23866] TDB │ │ + [ 2386b] TDT │ │ + [ 23870] YWD │ │ + [ 23875] ZZSPKLT0 │ │ + [ 2387e] basbeg │ │ + [ 23885] SPICE(BADDEFAULTVALUE) │ │ + [ 2389c] substring │ │ + [ 238a6] MONDAY │ │ + [ 238ad] The year associated with the calendar string "#" could not be identified. │ │ + [ 238f8] Yy*H*M │ │ + [ 238ff] Ymii:i │ │ + [ 23906] y*Y*H*M │ │ + [ 2390e] iidi:i:n │ │ + [ 23917] iimiin │ │ + [ 2391e] i-itn │ │ + [ 23924] i:ni/i/i │ │ + [ 2392d] i:ni-i-Y │ │ + [ 23936] Y-itnx │ │ + [ 2393d] Aberration correction specification # calls for relativistic corrections, which are not supported. │ │ + [ 239a0] RS │ │ + [ 239a3] YE │ │ + [ 239a6] as │ │ + [ 239a9] asa │ │ + [ 239ad] awa │ │ + [ 239b1] bal │ │ + [ 239b5] bi │ │ + [ 239b8] den │ │ + [ 239bc] eu │ │ + [ 239bf] gez │ │ + [ 239c3] kxv │ │ + [ 239c7] mua │ │ + [ 239cb] om │ │ + [ 239ce] osa │ │ + [ 239d2] sa │ │ + [ 239d5] shi │ │ + [ 239d9] tk │ │ + [ 239dc] tlh │ │ + [ 239e0] uz │ │ + [ 239e3] wae │ │ + [ 239e7] aar │ │ + [ 239eb] bos │ │ + [ 239ef] fij │ │ + [ 239f3] jav │ │ + [ 239f7] ltz │ │ + [ 239fb] nya │ │ + [ 239ff] oss │ │ + [ 23a03] tir │ │ + [ 23a07] tsn │ │ + [ 23a0b] FI │ │ + [ 23a0e] GT │ │ + [ 23a11] KR │ │ + [ 23a14] BHR │ │ + [ 23a18] BLM │ │ + [ 23a1c] BHS │ │ + [ 23a20] DMA │ │ + [ 23a24] LAO │ │ + [ 23a28] LUX │ │ + [ 23a2c] MDA │ │ + [ 23a30] MTQ │ │ + [ 23a34] SRB │ │ + [ 23a38] SYC │ │ + [ 23a3c] TUR │ │ + [ 23a40] VAT │ │ + [ 23a44] am_ET │ │ + [ 23a4a] Asia/Sakhalin │ │ + [ 23a58] Asia/Vladivostok │ │ + [ 23a69] Asia/Yerevan │ │ + [ 23a76] MSD │ │ + [ 23a7a] Africa/Algiers │ │ + [ 23a89] Europe/London │ │ + [ 23a97] ar_DZ │ │ + [ 23a9d] es_AR │ │ + [ 23aa3] fr_CD │ │ + [ 23aa9] mn_Mong_CN │ │ + [ 23ab4] sgn-ch-de │ │ + [ 23abe] zh-hakka │ │ + [ 23ac7] sgn-de │ │ + [ 23ace] nb nn │ │ + [ 23ad4] zoneinfo64 │ │ + [ 23adf] hebr │ │ + [ 23ae4] month-format-except-narrow │ │ + [ 23aff] zone-long │ │ + [ 23b09] ethiopic-amete-alem │ │ + [ 23b1d] M01 │ │ + [ 23b21] characters │ │ + [ 23b2c] Names │ │ + [ 23b32] standard │ │ + [ 23b3b] ubrk_swap(): RBBI Data header is invalid.\n │ │ + [ 23b66] out of memory swapping %u unames.icu tokens\n │ │ + [ 23b93] U_BAD_VARIABLE_DEFINITION │ │ + [ 23bad] U_DECIMAL_NUMBER_SYNTAX_ERROR │ │ + [ 23bcb] U_BRK_HEX_DIGITS_EXPECTED │ │ + [ 23be5] U_STRINGPREP_UNASSIGNED_ERROR │ │ + [ 23c03] U_IDNA_ZERO_LENGTH_LABEL_ERROR │ │ + [ 23c22] BYB │ │ + [ 23c26] CHF │ │ + [ 23c2a] CUC │ │ + [ 23c2e] HKD │ │ + [ 23c32] MXV │ │ + [ 23c36] XAF │ │ + [ 23c3a] XPT │ │ + [ 23c3e] NaN │ │ + [ 23c42] light │ │ + [ 23c48] megabyte │ │ + [ 23c51] kilocalorie │ │ + [ 23c5d] parsec │ │ + [ 23c64] solar-mass │ │ + [ 23c6f] millibar │ │ + [ 23c78] pow15- │ │ + [ 23c7f] deci │ │ + [ 23c84] weekOfMonth │ │ + [ 23c90] colReorder │ │ + [ 23c9b] normalizing the reset position │ │ + [ 23cba] item_per_mole │ │ + [ 23cc8] virtual void swappy::ChoreographerThread::postFrameCallbacks() │ │ + [ 23d07] (Ljava/lang/String;Ljava/lang/ClassLoader;)V │ │ + [ 23d34] SwappyDisplayManager │ │ + [ 23d49] getPresentationDeadlineNanos │ │ + [ 23d66] keydown │ │ + [ 23d6e] Star style: fuzzy points │ │ + [ 23d87] ~/.celestia/celestia.cfg │ │ + [ 23da0] Invalid URL │ │ + [ 23dac] spin vector │ │ + [ 23db8] terminator │ │ + [ 23dc3] LayoutDirection │ │ + [ 23dd3] parentFolder │ │ + [ 23de1] offset [ │ │ + [ 23deb] Real time │ │ + [ 23df5] {} �C │ │ + [ 23dfc] Default Capture Device │ │ + [ 23e13] LE │ │ + [ 23e16] Interrupted │ │ + [ 23e22] Bad address │ │ + [ 23e2e] Invalid message │ │ + [ 23e3e] Not connected │ │ + [ 23e4c] Invalid device config │ │ + [ 23e62] 0.6.38 │ │ + [ 23e69] OpenSL|ES │ │ + [ 23e73] AAudioStreamBuilder_setDirection │ │ + [ 23e94] ??? │ │ + [ 23e98] Loading character {:x} failed!\n │ │ + [ 23eb8] antiquewhite │ │ + [ 23ec5] linen │ │ + [ 23ecb] mediumspringgreen │ │ + [ 23edd] tomato │ │ + [ 23ee4] .xyz │ │ + [ 23eec] ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789+/ │ │ + [ 23f2d] arcus │ │ + [ 23f33] Selection │ │ + [ 23f3d] spacecraftorbits │ │ + [ 23f4e] texture │ │ + [ 23f56] color │ │ + [ 23f5c] Unknown {} flag: {}\n │ │ + [ 23f71] bottom │ │ + [ 23f78] left │ │ + [ 23f7d] fitscreen │ │ + [ 23f87] setminorbitsize │ │ + [ 23f97] geturl │ │ + [ 23f9e] Keys in table-argument to celestia:setoverlayelements() must be strings │ │ + [ 23fe6] One argument expected to function celestia:mark │ │ + [ 24016] First arg to celestia:getdso must be a number │ │ + [ 24044] newframe: two objects required for lock frame │ │ + [ 24072] First argument for celestia:registereventhandler must be a string │ │ + [ 240b4] Third argument to celestia:play must be a number (pan) │ │ + [ 240eb] default │ │ + [ 240f3] celestia_keyboard_callback │ │ + [ 2410e] dt │ │ + [ 24111] argument 6 to gl.Frustum must be a number │ │ + [ 2413b] argument 5 to gl.Ortho must be a number │ │ + [ 24163] phases │ │ + [ 2416a] Expected no or one argument to object:getposition │ │ + [ 2419c] No argument expected for observer:makeactiveview() │ │ + [ 241cf] addvector │ │ + [ 241d9] [Rotation] │ │ + [ 241e4] Script coroutine initialization failed │ │ + [ 2420b] sprites │ │ + [ 24213] Vertex position must be a float3\n │ │ + [ 24235] venus-jpl │ │ + [ 2423f] rhea │ │ + [ 24244] iau-pan │ │ + [ 2424c] Couldn't find SPICE ID for {}\n │ │ + [ 2426b] Cen │ │ + [ 2426f] Eri │ │ + [ 24273] Hor │ │ + [ 24277] Mic │ │ + [ 2427b] Globular │ │ + [ 24284] models/Sb.png │ │ + [ 24292] GL_OES_texture_border_clamp │ │ + [ 242ae] Mesa │ │ + [ 242b3] Error compiling geometry shader:\n │ │ + [ 242d5] MA │ │ + [ 242d8] VA │ │ + [ 242db] LC │ │ + [ 242de] Skipping mesh with 0 primitive groups!\n │ │ + [ 24306] Mesh index {} is higher than VBO count {}! │ │ + [ 24331] Object has incorrect FixedPosition syntax.\n │ │ + [ 2435d] BoundingRadius │ │ + [ 2436c] SemiMajorAxis │ │ + [ 2437a] LongOfPericenter │ │ + [ 2438b] BaseFrame │ │ + [ 24395] {:.2f} │ │ + [ 2439c] Loading rotation model: {}\n │ │ + [ 243b8] shaders │ │ + [ 243c0] {}_frag.glsl │ │ + [ 243cd] ***************************************************/\n │ │ + [ 24403] cosNormalLightDir = dot(in_Normal, │ │ + [ 24427] * max(0.0, t / dot( │ │ + [ 2443c] shadowTexGenT │ │ + [ 2444a] cloudShadowTex │ │ + [ 24459] NL = max(0.0, NL);\n │ │ + [ 2446d] .z * 8.0, 0.0, 1.0);\n │ │ + [ 24483] l = max(0.0, dot( │ │ + [ 24495] halfVector │ │ + [ 244a0] = dot(position, │ │ + [ 244b2] atmosphereRadius │ │ + [ 244c3] attribute {} {};\n │ │ + [ 244d6] vec4 calc_vp(vec4 in_Position)\n │ │ {\n │ │ return MVPMatrix * in_Position;\n │ │ }\n │ │ void set_vp(vec4 in_Position)\n │ │ {\n │ │ gl_Position = calc_vp(in_Position);\n │ │ }\n │ │ - [ 2453b] vec3 atmSamplePointSun = mix(atmEnter, atmLeave, 0.5);\n │ │ - [ 24577] Modify │ │ - [ 2457e] Error in .ssc file (line {}): {}\n │ │ - [ 245a0] Incorrect BondAlbedo value: {}\n │ │ - [ 245c0] OrbitBarycenter │ │ - [ 245d0] ignoring stellar coordinates in favor of OrbitBarycenter │ │ - [ 24609] Error in .stc file ({}): {}\n │ │ - [ 24626] DDS Format: {}\n │ │ - [ 24636] Read3DSFile: Wrong magic number in header\n │ │ - [ 24661] Processing MaterialName chunk\n │ │ - [ 24680] Unknown percentage {}\n │ │ - [ 24697] en │ │ - [ 2469a] null} │ │ - [ 246a0] Renderer │ │ - [ 246a9] No provider of %s found. Requires one of:\n │ │ - [ 246d5] jx │ │ - [ 246d8] Huffman code size table overflow │ │ - [ 246f9] Failed to create temporary file %s │ │ - [ 2471c] Unknown APP0 marker (not JFIF), length %u │ │ - [ 24746] Obtained EMS handle %u │ │ - [ 2475d] Corrupt JPEG data: found marker 0x%02x instead of RST%d │ │ - [ 24795] Invalid SOS parameters for sequential JPEG │ │ - [ 247c0] Application transferred too many scanlines │ │ - [ 247eb] font-format │ │ - [ 247f7] truetype │ │ - [ 24800] no-stem-darkening │ │ - [ 24812] FontType │ │ - [ 2481b] CIDFontName │ │ - [ 24827] Type 42 │ │ - [ 2482f] SUBSCRIPT_X │ │ - [ 2483b] _MULE_RELATIVE_COMPOSE │ │ - [ 24855] � � │ │ - [ 24861] � � │ │ - [ 2486a] EncodingScheme │ │ - [ 24879] EndKernPairs │ │ - [ 24886] cdata │ │ - [ 2488c] break │ │ - [ 24892] enum │ │ - [ 24897] too many upvalues │ │ - [ 248a9] LUA_PATH │ │ - [ 248b2] error loading module '%s' from file '%s':\n │ │ + [ 24568] vec3 atmSamplePointSun = mix(atmEnter, atmLeave, 0.5);\n │ │ + [ 245a4] Modify │ │ + [ 245ab] Error in .ssc file (line {}): {}\n │ │ + [ 245cd] Incorrect BondAlbedo value: {}\n │ │ + [ 245ed] OrbitBarycenter │ │ + [ 245fd] ignoring stellar coordinates in favor of OrbitBarycenter │ │ + [ 24636] Error in .stc file ({}): {}\n │ │ + [ 24653] DDS Format: {}\n │ │ + [ 24663] Read3DSFile: Wrong magic number in header\n │ │ + [ 2468e] Processing MaterialName chunk\n │ │ + [ 246ad] Unknown percentage {}\n │ │ + [ 246c4] en │ │ + [ 246c7] null} │ │ + [ 246cd] Renderer │ │ + [ 246d6] No provider of %s found. Requires one of:\n │ │ + [ 24702] jx │ │ + [ 24705] Huffman code size table overflow │ │ + [ 24726] Failed to create temporary file %s │ │ + [ 24749] Unknown APP0 marker (not JFIF), length %u │ │ + [ 24773] Obtained EMS handle %u │ │ + [ 2478a] Corrupt JPEG data: found marker 0x%02x instead of RST%d │ │ + [ 247c2] Invalid SOS parameters for sequential JPEG │ │ + [ 247ed] Application transferred too many scanlines │ │ + [ 24818] font-format │ │ + [ 24824] truetype │ │ + [ 2482d] no-stem-darkening │ │ + [ 2483f] FontType │ │ + [ 24848] CIDFontName │ │ + [ 24854] Type 42 │ │ + [ 2485c] SUBSCRIPT_X │ │ + [ 24868] _MULE_RELATIVE_COMPOSE │ │ + [ 24882] � � │ │ + [ 2488e] � � │ │ + [ 24897] EncodingScheme │ │ + [ 248a6] EndKernPairs │ │ + [ 248b3] cdata │ │ + [ 248b9] break │ │ + [ 248bf] enum │ │ + [ 248c4] too many upvalues │ │ + [ 248d6] LUA_PATH │ │ + [ 248df] error loading module '%s' from file '%s':\n │ │ %s │ │ - [ 248e0] C type │ │ - [ 248e7] string/number/__tostring │ │ - [ 24900] but running with │ │ - [ 24913] truncated │ │ - [ 2491d] unexpected 8-bit transformation │ │ - [ 2493d] CRC error │ │ - [ 24947] cHRM Red X │ │ - [ 24952] Memory allocation failed while processing sCAL │ │ - [ 24981] Z_OK on Z_FINISH with output space │ │ - [ 249a4] Can't write sCAL (buffer too small) │ │ - [ 249c8] option │ │ - [ 249cf] PATH_VALUES │ │ - [ 249db] ftnum │ │ - [ 249e1] itexp │ │ - [ 249e7] SPICE(BLANKFILETYPE) │ │ - [ 249fc] UNFORMATTED │ │ - [ 24a08] can't backspace file │ │ - [ 24a1d] bad namelist name │ │ - [ 24a2f] substring out of bounds │ │ - [ 24a47] unformatted │ │ - [ 24a53] FIND_TABLE │ │ - [ 24a5e] SPICE(COLDESCTABLEFULL) │ │ - [ 24a76] The EK file # could not be loaded; the column # in already loaded table # is not present in segment # in the EK file. │ │ - [ 24aec] SPICE(TABLENOTLOADED) │ │ - [ 24b02] seltab │ │ - [ 24b09] EKNELT │ │ - [ 24b10] rowvec │ │ - [ 24b17] prev │ │ - [ 24b1c] SPICE(UNRECOGNIZEDACTION) │ │ - [ 24b36] rngloc │ │ - [ 24b3d] DASCLS │ │ - [ 24b44] DASLLA │ │ - [ 24b4b] There is no room available for adding another numeric value to the kernel pool. │ │ - [ 24b9b] do_fio │ │ - [ 24ba2] E- │ │ - [ 24ba5] Could not read from #. │ │ - [ 24bbc] resvd │ │ - [ 24bc2] FIVE │ │ - [ 24bc7] IRFNAM │ │ - [ 24bce] CONVRT: Incompatible units. You are attempting to convert │ │ - [ 24c09] CKFROT │ │ - [ 24c10] SPICE(WRONGCKTYPE) │ │ - [ 24c23] CKR03 │ │ - [ 24c29] SCTYPE │ │ - [ 24c30] A traceback follows. The name of the highest level module is first. │ │ - [ 24c75] SIZEI │ │ - [ 24c7b] character │ │ - [ 24c85] The reference frame # has class #. This form of reference frame is not supported in version # of FRMGET. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ - [ 24d51] mxvg_ │ │ - [ 24d57] Storage for # double precision numbers is needed for an SPK data record and only # locations were available. Update the parameter MAXREC in the subroutine SPKPVN and notify the NAIF group of this problem. │ │ - [ 24e24] The semi-latus rectum supplied to the SPK type 15 evaluator was non-positive. This value must be positive. The value supplied was #. │ │ - [ 24eaa] SPICE(BADVECTOR) │ │ - [ 24ebb] SPICE(ECCOUTOFRANGE) │ │ - [ 24ed0] Attempt to set size of cell to invalid value. The value was #. │ │ - [ 24f10] TIPBOD │ │ - [ 24f17] tisbod_ │ │ - [ 24f1f] BODY#_CONSTS_REF_FRAME │ │ - [ 24f36] SPICE(COMPETINGFRAMESPEC) │ │ - [ 24f50] PCKR02 │ │ - [ 24f57] Axis numbers are #, #, #. │ │ - [ 24f74] The frame to which frame # is relatively defined is not recognized. The kernel pool specification of the relative frame is '#'. This is not a recognized frame. │ │ - [ 25016] #: The number of components of the kernel pool variable '#' is required to be divisible by #. However, the actual number of components is # which is not evenly divisible by #. │ │ - [ 250c8] CHKOUT: Caller is │ │ - [ 250dc] VALIDC │ │ - [ 250e3] Input matrix is not a rotation. │ │ - [ 25103] The number of rows in the matrix is not positive. The number of rows is #. │ │ - [ 2514e] kercod │ │ - [ 25155] ZZCKSPK │ │ - [ 2515d] ZZCVPOOL │ │ - [ 25166] The file, #, has a unidentified file architecture. Check that this file is a properly created binary SPICE kernel. │ │ - [ 251da] SPICE(DSKBOGUSENTRY) │ │ - [ 251ef] SPICE(BUFFEROVERFLOW) │ │ - [ 25205] SPICE(VARNAMETOOLONG) │ │ - [ 2521b] Definition of frame # specifies obliquity model #, which is not recognized. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 252c5] Dynamic frame family # (in definition of frame #) is not supported. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 25367] Ratio of length of axis #* to length of axis #* is *; this value may cause numeric overflow. │ │ - [ 253c4] ZZDYNVAC │ │ - [ 253cd] Kernel variable # was expected to be present in the kernel pool but was not found. The alternative form of kernel variable name FRAME_#_# was not searched for because this name has excessive length (# characters vs allowed maximum of #). One of these variables is needed to define the parameterized dynamic frame #. Usually this type of problem is due to an error in a frame definition provided in a frame kernel. │ │ - [ 2556e] The index type # is not supported. │ │ - [ 25591] ZZEKILLT │ │ - [ 2559a] ZZEKLLTD │ │ - [ 255a3] SEM_CHECKED │ │ - [ 255af] Record having pointer # not found in segment # of file # │ │ - [ 255e8] File # contains data; LASTC = #; LASTD = #; LASTI = #. │ │ - [ 2561f] Attempt to free non-existent INT page. Page number = #; valid range is 1:# │ │ - [ 2566a] DASUDD │ │ - [ 25671] IAU_PLUTO_BARYCENTER │ │ - [ 25686] IAU_BENNU │ │ - [ 25690] IAU_DIDYMOS │ │ - [ 2569c] EARTH BARYCENTER │ │ - [ 256ad] PLUTO BARYCENTER │ │ - [ 256be] MNEME │ │ - [ 256c4] MARGARET │ │ - [ 256cd] LARISSA │ │ - [ 256d5] VIKING 2 ORBITER │ │ - [ 256e6] MPF │ │ - [ 256ea] EDL DEMONSTRATOR MODULE │ │ - [ 25702] LUNAR TRAILBLAZER │ │ - [ 25714] MERCURY TRANSFER MODULE │ │ - [ 2572c] FINLAY │ │ - [ 25733] GEHRELS 1 │ │ - [ 2573d] GRIGG-SKJELLERUP │ │ - [ 2574e] KOHOUTEK │ │ - [ 25757] PSYCHE │ │ - [ 2575e] LUTETIA │ │ - [ 25766] GASPRA │ │ - [ 2576d] DONALDJOHANSON │ │ - [ 2577c] DSS-14 │ │ - [ 25783] There is a non-printing character embedded in line # of the text kernel file #. Non-printing characters are not allowed in kernel variable assignments. The non-printing character has ASCII code #. │ │ - [ 2584b] The kernel variable # has been set up as a string variable. However, the value that you are attempting to assign to this variable on line # of the kernel file '#' is not a string value. │ │ - [ 25907] The only type of time strings that are handled by TPARSE are 'JD', 'YMD' and 'YD' (year day-of-year). You've entered a string of the type #. │ │ - [ 25996] w. │ │ - [ 25999] tpartv_ │ │ - [ 259a1] meanng │ │ - [ 259a8] The input string uses the ISO "T" date/time delimiter but does not match any of the accepted ISO formats. │ │ - [ 25a14] *Y │ │ - [ 25a17] The substring "#" could not be resolved in the input string: ' │ │ - [ 25a57] DmH │ │ - [ 25a5b] kvtype │ │ - [ 25a62] lb │ │ - [ 25a65] Modulus count # does not match field count # for SCLK #. │ │ - [ 25a9e] YWDF │ │ - [ 25aa4] ZZSPKPA1 │ │ - [ 25aad] clsses │ │ - [ 25ab4] SPICE(FRAMENAMENOTFOUND) │ │ - [ 25acd] TIMDEF │ │ - [ 25ad4] Invalid data type code # seen │ │ - [ 25af2] SEPTEMBER │ │ - [ 25afc] A character at location #1 does not have ASCII value [32,126] for REP string. │ │ - [ 25b4a] AP │ │ - [ 25b4d] A minutes components of the time was identified in the time string "#", but the hours component could not be identified. │ │ - [ 25bc8] Yidi:i │ │ - [ 25bcf] Yiii:i:i │ │ - [ 25bd8] Yimn │ │ - [ 25bdd] iYdi:i:n │ │ - [ 25be6] iYdi:n │ │ - [ 25bed] i-iti │ │ - [ 25bf3] i-i-Yi:i:n │ │ - [ 25bfe] Y*m*D*H* │ │ - [ 25c07] CS │ │ - [ 25c0a] CW │ │ - [ 25c0d] iw │ │ - [ 25c10] ada │ │ - [ 25c14] af │ │ - [ 25c17] chm │ │ - [ 25c1b] cps │ │ - [ 25c1f] egl │ │ - [ 25c23] el │ │ - [ 25c26] enm │ │ - [ 25c2a] et │ │ - [ 25c2d] ext │ │ - [ 25c31] kcg │ │ - [ 25c35] krc │ │ - [ 25c39] ks │ │ - [ 25c3c] lv │ │ - [ 25c3f] mk │ │ - [ 25c42] ms │ │ - [ 25c45] mwv │ │ - [ 25c49] non │ │ - [ 25c4d] nus │ │ - [ 25c51] sei │ │ - [ 25c55] ty │ │ - [ 25c58] xmf │ │ - [ 25c5c] fin │ │ - [ 25c60] lat │ │ - [ 25c64] nep │ │ - [ 25c68] san │ │ - [ 25c6c] slv │ │ - [ 25c70] zho │ │ - [ 25c74] AO │ │ - [ 25c77] CU │ │ - [ 25c7a] GN │ │ - [ 25c7d] LS │ │ - [ 25c80] MP │ │ - [ 25c83] MT │ │ - [ 25c86] TF │ │ - [ 25c89] US │ │ - [ 25c8c] WF │ │ - [ 25c8f] DGA │ │ - [ 25c93] GBR │ │ - [ 25c97] GMB │ │ - [ 25c9b] MAF │ │ - [ 25c9f] SPM │ │ - [ 25ca3] SWE │ │ - [ 25ca7] SOM │ │ - [ 25cab] TON │ │ - [ 25caf] YEM │ │ - [ 25cb3] YUG │ │ - [ 25cb7] gl_ES │ │ - [ 25cbd] it_IT │ │ - [ 25cc3] posix/ │ │ - [ 25cca] CLT │ │ - [ 25cce] ar_YE │ │ - [ 25cd4] ckb_Arab │ │ - [ 25cdd] de_CH │ │ - [ 25ce3] en_CA │ │ - [ 25ce9] se_NO │ │ - [ 25cef] sma_NO │ │ - [ 25cf6] tn_BW │ │ - [ 25cfc] sgn-gr │ │ - [ 25d03] isg │ │ - [ 25d07] sgn-it │ │ - [ 25d0e] sgn-us │ │ - [ 25d15] zh-cmn-hant │ │ - [ 25d21] M09 │ │ - [ 25d25] Scripts%short │ │ - [ 25d33] Types │ │ - [ 25d39] lw │ │ - [ 25d3c] nfc │ │ - [ 25d40] AliasLocales │ │ - [ 25d4d] [BOGUS UErrorCode] │ │ - [ 25d60] U_INVALID_STATE_ERROR │ │ - [ 25d76] U_MULTIPLE_CURSORS │ │ - [ 25d89] U_UNEXPECTED_TOKEN │ │ - [ 25d9c] U_MF_VARIANT_KEY_MISMATCH_ERROR │ │ - [ 25dbc] U_BRK_RULE_EMPTY_SET │ │ - [ 25dd1] U_REGEX_OCTAL_TOO_BIG │ │ - [ 25de7] BDT │ │ - [ 25deb] BGN │ │ - [ 25def] BND │ │ - [ 25df3] ISJ │ │ - [ 25df7] KZT │ │ - [ 25dfb] MMK │ │ - [ 25dff] PAB │ │ - [ 25e03] -Infinity │ │ - [ 25e0d] M11L │ │ - [ 25e12] square-foot │ │ - [ 25e1e] square-yard │ │ - [ 25e2a] milligram-per-deciliter │ │ - [ 25e42] GHP │ │ - [ 25e46] kilobyte │ │ - [ 25e4f] megabit │ │ - [ 25e57] century │ │ - [ 25e5f] milliampere │ │ - [ 25e6b] earth-radius │ │ - [ 25e78] stone │ │ - [ 25e7e] newton-meter │ │ - [ 25e8b] pound-force-foot │ │ - [ 25e9c] dessert-spoon-imperial │ │ - [ 25eb3] pint-metric │ │ - [ 25ebf] nominative │ │ - [ 25eca] masculine │ │ - [ 25ed4] ther │ │ - [ 25ed9] per- │ │ - [ 25ede] -per- │ │ - [ 25ee4] NumberElements/minimumGroupingDigits │ │ - [ 25f09] dayOfYear │ │ - [ 25f13] idValidity │ │ - [ 25f1e] OrdinalRules │ │ - [ 25f2b] primary │ │ - [ 25f33] lower │ │ - [ 25f39] primary tailoring gap too small │ │ - [ 25f59] string contains U+FFFD, U+FFFE or U+FFFF │ │ - [ 25f82] first tertiary ignorable │ │ - [ 25f9b] first trailing │ │ - [ 25faa] metric_adjacent │ │ - [ 25fba] com/google/androidgamesdk/SwappyDisplayManager │ │ - [ 25fe9] static int swappy::SwappyGL::getSupportedRefreshPeriodsNS(uint64_t *, int) │ │ - [ 26034] eglGetFrameTimestampsANDROID │ │ - [ 26051] mousemove │ │ - [ 2605b] Markers enabled │ │ - [ 2606b] Time is paused │ │ - [ 2607a] Auto magnitude limit at 45 degrees: {:.2f} │ │ - [ 260a6] passthrough │ │ - [ 260b2] WN │ │ - [ 260b5] ly/s │ │ - [ 260ba] mi/s │ │ - [ 260bf] Luminosity: {}x Sun\n │ │ - [ 260d4] Pre Format Conversion: %s\n │ │ - [ 260f6] CHANNEL_AUX_6 │ │ - [ 26104] CHANNEL_AUX_11 │ │ - [ 26113] CHANNEL_AUX_16 │ │ - [ 26122] CHANNEL_AUX_26 │ │ - [ 26131] Socket type not supported │ │ - [ 2614b] Device not initialized │ │ - [ 26162] WinMM │ │ - [ 26168] AAudioStream_getFramesPerBurst │ │ - [ 26187] Target name: {} │ │ - [ 26197] UTC │ │ - [ 2619b] Mon │ │ - [ 2619f] Thu │ │ - [ 261a3] Font is not scalable: {}\n │ │ - [ 261bd] gainsboro │ │ - [ 261c7] green │ │ - [ 261cd] springgreen │ │ - [ 261d9] teal │ │ - [ 261de] yellow │ │ - [ 261e5] .mkv │ │ - [ 261ea] MU │ │ - [ 261ed] Delta │ │ - [ 261f3] Spacecraft │ │ - [ 261fe] Star │ │ - [ 26203] landingsite │ │ - [ 2620f] reticulum │ │ - [ 26219] macula │ │ - [ 26220] setframe │ │ - [ 26229] print │ │ - [ 2622f] value │ │ - [ 26235] observer │ │ - [ 2623e] nopause │ │ - [ 26246] yrot │ │ - [ 2624b] utc │ │ - [ 2624f] medium │ │ - [ 26256] symbol │ │ - [ 2625d] Unknown error loading script │ │ - [ 2627a] getobserver │ │ - [ 26286] getminorbitsize │ │ - [ 26296] getscripttime │ │ - [ 262a4] First argument to celestia:setlabelstyle() must be a string │ │ - [ 262e0] No arguments expected for celestia:getgalaxylightgain() │ │ - [ 26318] No arguments expected for celestia:getobserver() │ │ - [ 26349] No argument expected to function celestia:gettime │ │ - [ 2637b] No argument expected in celestia:setambient │ │ - [ 263a7] No argument expected in celestia:getstarcolor │ │ - [ 263d5] Second arg to celestia:utctotdb must be a number │ │ - [ 26406] Fifth argument to celestia:playaudio must be a number │ │ - [ 2643c] Seventh argument to celestia:playaudio must be a number(nopause) │ │ - [ 2647d] loadlib │ │ - [ 26485] __gc │ │ - [ 2648a] [Frame] │ │ - [ 26492] LineWidth │ │ - [ 2649c] Vertex │ │ - [ 264a3] argument 2 to gl.Color must be a number │ │ - [ 264cb] removefromcategory │ │ - [ 264de] lifespanEnd │ │ - [ 264ea] atmosphereHeight │ │ - [ 264fb] Third arg to object:mark must be a number │ │ - [ 26525] No arguments are expected for object:getmass() │ │ - [ 26554] One parameter expected to function object:setatmosphere │ │ - [ 2658c] Value of {} must be array of 3 numbers │ │ - [ 265b3] initialOrientation │ │ - [ 265c6] Fifth arg to observer:gotolonglat must be a number │ │ - [ 265f9] One argument expected to position:addvector() │ │ - [ 26627] Two arguments expected for rotation:setaxisangle() │ │ - [ 2665a] Need two operands for add │ │ - [ 26674] {} (line {}) │ │ - [ 26681] {} {} {} │ │ - [ 2668a] Mesh should contain just triangle lists\n │ │ - [ 266b3] jpl-venus-sun │ │ - [ 266c1] jpl-moon-emb │ │ - [ 266ce] europa │ │ - [ 266d5] Bad script orbit: valid range end < begin\n │ │ - [ 26700] starTex │ │ - [ 26708] CrA │ │ - [ 2670c] Gru │ │ - [ 26710] TrA │ │ - [ 26714] InfoURL │ │ - [ 2671c] file:///{}/{} │ │ - [ 2672a] GL_EXT_texture_filter_anisotropic │ │ - [ 2674c] RE │ │ - [ 2674f] FM │ │ - [ 26752] Failed to read mesh data\n │ │ - [ 2676c] ScriptedRotation │ │ - [ 2677d] PrecessingRotation │ │ - [ 26790] Invalid Source filename for SampledTrajectory\n │ │ - [ 267bf] Could not load sampled trajectory from '{}'\n │ │ - [ 267ec] Secondary │ │ - [ 267f6] Observer │ │ - [ 267ff] Observer object '{}' for topocentric frame not found.\n │ │ - [ 26836] rJ │ │ - [ 26839] float NV = dot(n, V);\n │ │ - [ 26850] position = in_Position.xyz * (ringRadius + ringWidth * in_TexCoord0.s);\n │ │ - [ 26899] Vertex shader source:\n │ │ - [ 268b0] h = max(0.0, length(atmSamplePoint) - atmosphereRadius.z);\n │ │ - [ 268f0] BumpMap │ │ - [ 268f8] Sorting stars into octree . . .\n │ │ - [ 26919] Loading cross index failed - unexpected EOF\n │ │ - [ 26946] hires │ │ - [ 2694c] .{:s} │ │ - [ 26952] Error parsing virtual texture\n │ │ - [ 26971] {:04x} │ │ - [ 26978] Content size {} too small to include point array with {} entries │ │ - [ 269b9] (J)V │ │ - [ 269be] {}_{} │ │ - [ 269c4] ] │ │ - [ 269c7] cannot use operator[] with a numeric argument with │ │ - [ 269fb] libGLESv2.so │ │ - [ 26a08] llo │ │ - [ 26a0c] LC_TIME │ │ - [ 26a14] Invalid memory pool code %d │ │ - [ 26a30] Write to XMS failed │ │ - [ 26a44] Adobe APP14 marker: version %d, flags 0x%04x 0x%04x, transform %d │ │ - [ 26a86] Opened temporary file %s │ │ - [ 26a9f] FREETYPE_PROPERTIES │ │ - [ 26ab3] kerning │ │ - [ 26abb] cff │ │ - [ 26abf] UnderlinePosition │ │ - [ 26ad1] ExpansionFactor │ │ - [ 26ae1] FAMILY_NAME │ │ - [ 26aed] SETWIDTH_NAME │ │ - [ 26afb] END_SPACE │ │ - [ 26b05] RAW_AVG_LOWERCASE_WIDTH │ │ - [ 26b1d] RAW_STRIKEOUT_ASCENT │ │ - [ 26b34] � │ │ - [ 26b3b] � │ │ - [ 26b44] spread │ │ - [ 26b4b] ] │ │ - [ 26b4d] at %p │ │ - [ 26b54] %c │ │ - [ 26b57] pop │ │ - [ 26b5b] suspended │ │ - [ 26b65] f │ │ - [ 26b67] cont\n │ │ - [ 26b6d] ffi │ │ - [ 26b71] Too many bytes for PNG signature │ │ - [ 26b92] Unknown freer parameter in png_data_freer │ │ - [ 26bbc] tag count too large │ │ - [ 26bd0] invalid signature │ │ - [ 26be2] png_image_read: out of memory │ │ - [ 26c00] palette color-map: too few entries │ │ - [ 26c23] unexpected alpha swap transformation │ │ - [ 26c48] rgb to gray red coefficient │ │ - [ 26c64] png_set_unknown_chunks now expects a valid location │ │ - [ 26c98] png_write_image: unsupported transformation │ │ - [ 26cc4] SPICE(FILEOPENFAILED) │ │ - [ 26cda] An Invalid Item Was Found in a List │ │ - [ 26cfe] SPICE(SETEXCESS) │ │ - [ 26d0f] filtyp │ │ - [ 26d16] SPICE(FILENAMETOOLONG) │ │ - [ 26d2d] The attempt to load "#" by the routine FURNSH failed. It # │ │ - [ 26d68] FORMATTED │ │ - [ 26d72] null file name │ │ - [ 26d81] bad logical input field │ │ - [ 26d99] subscript for scalar variable │ │ - [ 26db7] stsr │ │ - [ 26dbc] SPICE(RECORDNOTFOUND) │ │ - [ 26dd2] stprev │ │ - [ 26dd9] File record not found for file handle #1. Check if program code uses handle #2 for a read or write operation. │ │ - [ 26e47] ctnams │ │ - [ 26e4e] ctsizs │ │ - [ 26e55] cnstyp │ │ - [ 26e5c] tptvec │ │ - [ 26e63] The file name is blank. │ │ - [ 26e7c] DAS/ │ │ - [ 26e81] DAS file not open for writing. Handle = #, file = '#'. │ │ - [ 26eb8] SPICE(DASINVALIDACCESS) │ │ - [ 26ed0] DASSIH │ │ - [ 26ed7] DASWRI │ │ - [ 26ede] DASURD │ │ - [ 26ee5] HEAD was #. TAIL was #. Valid range is 1 to #. │ │ - [ 26f15] PDPOOL │ │ - [ 26f1c] knmids │ │ - [ 26f23] CCIFRM │ │ - [ 26f2a] REPSUB error: LEFT (#) must not exceed RIGHT+1 (# + 1). │ │ - [ 26f63] defs │ │ - [ 26f68] nor the output units │ │ - [ 26f7e] to │ │ - [ 26f83] CKPFS │ │ - [ 26f89] You are attempting to locate type * data in a type 5 data segment. │ │ - [ 26fcc] SPICE(NEGATIVETOL) │ │ - [ 26fdf] SCTK01 │ │ - [ 26fe6] Invalid SCLK rate. │ │ - [ 26ff9] TDT │ │ - [ 26ffd] SPICE(REQUESTOUTOFBOUNDS) │ │ - [ 27017] Input file # has file type #. The file must be a binary SPK file to be readable by this routine. If you expected the file to be a binary SPK file, the problem may be due to the file being an old non-native file lacking binary file format information. It's also possible the file has been corrupted. │ │ - [ 27142] newest │ │ - [ 27149] sbr0 │ │ - [ 2714e] SPKR03 │ │ - [ 27155] You are attempting to locate type 15 data in a type # data segment. │ │ - [ 27199] SPKR17 │ │ - [ 271a0] spkr18_ │ │ - [ 271a8] BADKPV │ │ - [ 271af] #: The kernel pool variable '#' is not currently present in the kernel pool. Possible reasons are that the appropriate text kernel file has not been loaded or that the kernel pool has been cleared after loading the appropriate text kernel file. │ │ - [ 272a5] No version found. │ │ - [ 272b7] SPICE(BADTIMETYPE) │ │ - [ 272ca] delta │ │ - [ 272d0] SPICE(BADBLOCKSIZE) │ │ - [ 272e4] SPICE(BLOCKSNOTEVEN) │ │ - [ 272f9] ZZBCTRCK │ │ - [ 27302] ZZDDHOPN │ │ - [ 2730b] The file '#' does not exist. │ │ - [ 27328] SPICE(FILEOPENCONFLICT) │ │ - [ 27340] SPICE(UNKNOWNBFF) │ │ - [ 27352] FREEZE_EPOCH │ │ - [ 2735f] Definition of frame # associates vector # with axis #. The only valid axis values are { X, -X, Y, -Y, Z, -Z }. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 2742d] In definition of frame #, vector # is defined by the near point on body # as seen from body #. The state of this near point was not found. See the routine DNEARP for an explanation. This situation MAY be caused by an error in a frame kernel in which the frame is defined. The problem also could be indicative of a SPICELIB bug. │ │ - [ 27577] itmcof │ │ - [ 2757e] err │ │ - [ 27582] TWOVEC │ │ - [ 27589] The definition indexes must lie in the range from 1 to 3. The value of INDEXA was #. The value of INDEXP was #. │ │ - [ 275fb] The values of INDEXA and INDEXP were the same, namely #. They are required to be different. │ │ - [ 27658] lhans │ │ - [ 2765e] EK = #; COLIDX = #; ROW = #; ELTIDX = #. Column entry element was not found. │ │ - [ 276ab] ZZEKPGFR │ │ - [ 276b4] zzektrlk_ │ │ - [ 276be] C2F_MapFixStrArr │ │ - [ 276cf] ZZFDAT │ │ - [ 276d6] IAU_NEPTUNE_BARYCENTER │ │ - [ 276ed] IAU_METIS │ │ - [ 276f7] IAU_ENCELADUS │ │ - [ 27705] IAU_ROSALIND │ │ - [ 27712] IAU_IOCASTE │ │ - [ 2771e] IAU_ITOKAWA │ │ - [ 2772a] RADII │ │ - [ 27730] UNUSED ITEM COUNT │ │ - [ 27742] SUN │ │ - [ 27746] HARPALYKE │ │ - [ 27750] HERMIPPE │ │ - [ 27759] EUPORIE │ │ - [ 27761] TETHYS │ │ - [ 27768] HELENE │ │ - [ 2776f] SUTTUNGR │ │ - [ 27778] ERRIAPUS │ │ - [ 27781] CRESSIDA │ │ - [ 2778a] BELINDA │ │ - [ 27792] GALATEA │ │ - [ 2779a] LUNAR PROSPECTOR │ │ - [ 277ab] MARCO-A │ │ - [ 277b3] MARS RECON ORBITER │ │ - [ 277c6] AXAF │ │ - [ 277cb] S1 │ │ - [ 277ce] SHOEMAKER-LEVY 9-T │ │ - [ 277e1] BOWELL-SKIFF │ │ - [ 277ee] WILD 1 │ │ - [ 277f5] LEVY │ │ - [ 277fa] output │ │ - [ 27801] No SCLK kernel for instrument or structure #, with corresponding SCLK ID #, is currently loaded. │ │ - [ 27862] PC │ │ - [ 27865] The kernel variable # has been set up as a numeric or time variable. However, the value that you are attempting to assign to this variable on line # of the kernel file '#' is not a numeric or time value. │ │ - [ 27933] At character # of line # in the text kernel file '#' the character '@' appears. This character is reserved for identifying time values in assignments to kernel pool variables. However it is not being used in this fashion for the variable '#'. │ │ - [ 27a2a] An unexpected delimiter ('#') was encountered in the input string. ' │ │ - [ 27a70] Siim> │ │ - [ 27a76] Ymi │ │ - [ 27a7a] SCLK01_OFFSETS_ │ │ - [ 27a8a] IROOM was #; must be in range #:#. IFREE was #; must be in range 1:#. │ │ - [ 27ad0] kvsize │ │ - [ 27ad7] Total number of double precision data values for SCLK # is #; this count exceeds the maximum supported count #. │ │ - [ 27b47] SCLD01 │ │ - [ 27b4e] SPICE(SUBORBITAL) │ │ - [ 27b60] YD.DF │ │ - [ 27b67] YMDF │ │ - [ 27b6d] zzspkgo1_ │ │ - [ 27b77] ZONE │ │ - [ 27b7c] timdef_ │ │ - [ 27b84] ZZTEME │ │ - [ 27b8b] Minute │ │ - [ 27b92] Y-i/ │ │ - [ 27b97] i-idi:i │ │ - [ 27b9f] i:imiY │ │ - [ 27ba6] imYi:i:i │ │ - [ 27baf] miiii │ │ - [ 27bb5] i:ii/i/i │ │ - [ 27bbe] Y-iti:i:nx │ │ - [ 27bc9] i-itnx │ │ - [ 27bd0] zztwovxf_ │ │ - [ 27bda] The caller specified that # integers are to be translated from binary format # to #. However there is only room to hold # integers in the output array. This error should never occur. │ │ - [ 27c93] TP │ │ - [ 27c96] VD │ │ - [ 27c99] root │ │ - [ 27c9e] yue │ │ - [ 27ca2] agq │ │ - [ 27ca6] arn │ │ - [ 27caa] bho │ │ - [ 27cae] cgg │ │ - [ 27cb2] dtp │ │ - [ 27cb6] dzg │ │ - [ 27cba] gba │ │ - [ 27cbe] gil │ │ - [ 27cc2] grc │ │ - [ 27cc6] gsw │ │ - [ 27cca] gv │ │ - [ 27ccd] haw │ │ - [ 27cd1] inh │ │ - [ 27cd5] kln │ │ - [ 27cd9] kr │ │ - [ 27cdc] mer │ │ - [ 27ce0] mga │ │ - [ 27ce4] qug │ │ - [ 27ce8] see │ │ - [ 27cec] sg │ │ - [ 27cef] tet │ │ - [ 27cf3] zu │ │ - [ 27cf6] sh │ │ - [ 27cf9] abk │ │ - [ 27cfd] deu │ │ - [ 27d01] ful │ │ - [ 27d05] hau │ │ - [ 27d09] hat │ │ - [ 27d0d] ind │ │ - [ 27d11] ipk │ │ - [ 27d15] kan │ │ - [ 27d19] lub │ │ - [ 27d1d] nld │ │ - [ 27d21] sag │ │ - [ 27d25] AG │ │ - [ 27d28] CI │ │ - [ 27d2b] GM │ │ - [ 27d2e] IR │ │ - [ 27d31] TG │ │ - [ 27d34] TJ │ │ - [ 27d37] EGY │ │ - [ 27d3b] GIB │ │ - [ 27d3f] GUM │ │ - [ 27d43] PRK │ │ - [ 27d47] LKA │ │ - [ 27d4b] MWI │ │ - [ 27d4f] PHL │ │ - [ 27d53] RUS │ │ - [ 27d57] TCA │ │ - [ 27d5b] TJK │ │ - [ 27d5f] az_AZ │ │ - [ 27d65] fi_FI │ │ - [ 27d6b] ko_KR │ │ - [ 27d71] posixrules │ │ - [ 27d7c] Australia/South │ │ - [ 27d8c] NDT │ │ - [ 27d90] Canada/Saskatchewan │ │ - [ 27da4] HAST │ │ - [ 27da9] bn_BD │ │ - [ 27daf] bo_CN │ │ - [ 27db5] ca_ES_VALENCIA │ │ - [ 27dc4] en_NZ │ │ - [ 27dca] en_GU │ │ - [ 27dd0] es_PA │ │ - [ 27dd6] sv_FI │ │ - [ 27ddc] syr_SY │ │ - [ 27de3] cmn │ │ - [ 27de7] swl │ │ - [ 27deb] ures_swap(): data format %02x.%02x.%02x.%02x (format version %02x.%02x) is not a resource bundle\n │ │ - [ 27e4d] ucol_swap(formatVersion=4): too few bytes (%d after header) for collation data\n │ │ - [ 27e9d] ucnv_clone │ │ - [ 27ea8] japanese │ │ - [ 27eb1] metazone-long │ │ - [ 27ebf] numbers │ │ - [ 27ec7] keyValue │ │ - [ 27ed0] grapheme │ │ - [ 27ed9] ubrk_swap(): too few bytes (%d after ICU Data header) for break data.\n │ │ - [ 27f20] nfkc_cf │ │ - [ 27f28] U_MF_UNSUPPORTED_STATEMENT_ERROR │ │ - [ 27f49] U_BRK_UNCLOSED_SET │ │ - [ 27f5c] U_REGEX_BAD_ESCAPE_SEQUENCE │ │ - [ 27f78] U_REGEX_INVALID_FLAG │ │ - [ 27f8d] U_IDNA_STD3_ASCII_RULES_ERROR │ │ - [ 27fab] U_PLUGIN_TOO_HIGH │ │ - [ 27fbd] ALK │ │ - [ 27fc1] EGP │ │ - [ 27fc5] GWP │ │ - [ 27fc9] IEP │ │ - [ 27fcd] JMD │ │ - [ 27fd1] LTT │ │ - [ 27fd5] PES │ │ - [ 27fd9] SEK │ │ - [ 27fdd] UGX │ │ - [ 27fe1] XBD │ │ - [ 27fe5] XUA │ │ - [ 27fe9] Multiple status │ │ - [ 27ff9] area │ │ - [ 27ffe] square-inch │ │ - [ 2800a] decade │ │ - [ 28011] kilowatt │ │ - [ 2801a] cup-metric │ │ - [ 28025] prepositional │ │ - [ 28033] units/ │ │ - [ 2803a] shifted │ │ - [ 28042] search │ │ - [ 28049] contractions ending with conjoining Jamo L or L+V not supported │ │ - [ 28089] reset without position │ │ - [ 280a0] range without end in starred-relation string │ │ - [ 280cd] first implicit │ │ - [ 280dc] quotationEnd │ │ - [ 280e9] fahrenhe │ │ - [ 280f2] terminate │ │ - [ 280fc] enableFramePacing │ │ - [ 2810e] getAppVsyncOffsetNanos │ │ - [ 28125] mousebuttondown │ │ - [ 28135] Star color: Classic │ │ - [ 28149] Using limit of knowledge surface textures. │ │ - [ 28174] Unknown projection mode {}\n │ │ - [ 28190] fahrenheit │ │ - [ 2819b] sun direction │ │ - [ 281a9] InitScript │ │ - [ 281b4] DestinationFile │ │ - [ 281c4] ScriptScreenshotDirectory │ │ - [ 281de] OrbitWindowEnd │ │ - [ 281ed] B │ │ - [ 281ef] Skipping unnamed destination\n │ │ - [ 2820e] parentFolder " │ │ - [ 2821f] Class: %s\n │ │ - [ 2822a] Radius: {} Rsun ({})\n │ │ - [ 28241] deep sky │ │ - [ 2824a] Skipping {} catalog: {}\n │ │ - [ 28263] INFO │ │ - [ 28268] NO │ │ - [ 2826b] CHANNEL_TOP_BACK_RIGHT │ │ - [ 28282] Not a directory │ │ - [ 28292] Deadlock │ │ - [ 2829b] Network unavailable │ │ - [ 282af] Device type not supported │ │ - [ 282c9] Unknown miniaudio session state {} │ │ - [ 282ec] Web Audio │ │ - [ 282f6] [OpenSL] Failed to realize audio recorder. │ │ - [ 28321] Cloning data buffer node failed because the source node was released. The source node must remain valid until the cloning has completed.\n │ │ - [ 283ab] select │ │ - [ 283b2] black │ │ - [ 283b8] firebrick │ │ - [ 283c2] lightcyan │ │ - [ 283cc] lightpink │ │ - [ 283d6] sandybrown │ │ - [ 283e1] .cms │ │ - [ 283e6] SIG │ │ - [ 283ea] Lambda │ │ - [ 283f1] Chi │ │ - [ 283fb] constellations │ │ - [ 2840a] nebulae │ │ - [ 28412] openclusters │ │ - [ 2841f] planum │ │ - [ 28426] astrum │ │ - [ 2842d] lobus │ │ - [ 28433] preloadtex │ │ - [ 2843e] volume │ │ - [ 28445] latitude │ │ - [ 2844e] path │ │ - [ 28453] disk │ │ - [ 28458] origin │ │ - [ 2845f] gain │ │ - [ 28464] MinOrbitSize │ │ - [ 28471] getchildren │ │ - [ 2847d] Fourth argument to celestia:setsafeareainsets() must be a number │ │ - [ 284be] stopaudio │ │ - [ 284c8] Fourth argument to celestia:print must be a number │ │ - [ 284fb] Three arguments expected for celestia:settextcolor() │ │ - [ 28530] sunwhite │ │ - [ 28539] invalid starcolor │ │ - [ 2854b] No argument expected in celestia:gettextureresolution │ │ - [ 28581] Second arg to celestia:tojulianday must be a number │ │ - [ 285b5] No arguments expected to function celestia:getdsocount │ │ - [ 285ec] One argument expected for celestia:runscript │ │ - [ 28619] First argument to celestia:log must be a string │ │ - [ 28649] One argument expected to celestia:getparamstring() │ │ - [ 2867c] key │ │ - [ 28680] No arguments expected for frame:getrefobject() │ │ - [ 286af] TEXTURE_2D │ │ - [ 286ba] No arguments expected for gl.PopMatrix() │ │ - [ 286e3] getmaxdescent │ │ - [ 286f1] [Image:{}x{}] │ │ - [ 286ff] One argument expected to object:setvisible() │ │ - [ 2872c] tag │ │ - [ 28730] No arguments expected to function object:getinfo │ │ - [ 28761] reflectivity │ │ - [ 2876e] Bad object! │ │ - [ 2877a] Fourth arg to observer:gotodistance must be a vector │ │ - [ 287af] One or two arguments expected for observer:splitview() │ │ - [ 287e6] First argument to observer:splitview() must be a string │ │ - [ 2881e] Need two operands for subtraction │ │ - [ 28840] Argument to rotation:transform() must be a vector │ │ - [ 28872] length │ │ - [ 28879] Invalid vertex attribute format '{}' │ │ - [ 2889e] emissive {} {} {}\n │ │ - [ 288b1] venus │ │ - [ 288b7] iau-atlas │ │ - [ 288c1] iau-pluto │ │ - [ 288cb] iau-helene │ │ - [ 288d6] iau-callisto │ │ - [ 288e3] AddonPath │ │ - [ 288ed] minimumFeatureSize │ │ - [ 28900] Lib │ │ - [ 28904] Axis │ │ - [ 28909] navi │ │ - [ 2890e] selpointer │ │ - [ 28919] FE │ │ - [ 2891c] VI │ │ - [ 2891f] Could not find custom orbit named '{}'\n │ │ - [ 28947] Object has incorrect elliptical orbit syntax.\n │ │ - [ 28976] Attempting to load orientation file '{}'\n │ │ - [ 289a0] Function │ │ - [ 289a9] cubic │ │ - [ 289af] Object has incorrect two-vector frame syntax.\n │ │ - [ 289de] No observer specified for topocentric frame.\n │ │ - [ 28a0c] {}_geom.glsl │ │ - [ 28a19] vec3 V = normalize(eyeDir);\n │ │ - [ 28a36] color += (phRayleigh * rayleighCoeff + phMie * mieCoeff) * invScatterCoeffSum * │ │ - [ 28a8b] * texture2D(diffTex, gl_PointCoord);\n │ │ - [ 28ab2] light{}_specular │ │ - [ 28ac3] sampler1DShadow │ │ - [ 28ad3] * (pow(NH, shininess) * NL);\n │ │ - [ 28af2] float qq = dot(eyePosition, eyePosition) - atmosphereRadius.y;\n │ │ - [ 28b36] Atmosphere │ │ - [ 28b41] CloudShadowDepth │ │ - [ 28b52] NightTexture │ │ - [ 28b5f] Ib │ │ - [ 28b62] DZ │ │ - [ 28b65] TYC │ │ - [ 28b6a] Error opening image file {}.\n │ │ - [ 28b88] Failed to read entry {} of texture coord array\n │ │ - [ 28bb8] Error reading FloatPercentage\n │ │ - [ 28bd7] "bytes": [ │ │ - [ 28be2] string pointer is null │ │ - [ 28bf9] Define Restart Interval %u │ │ - [ 28c14] Component %d: %dhx%dv q=%d │ │ - [ 28c33] Ss=%d, Se=%d, Ah=%d, Al=%d │ │ - [ 28c50] sfnt │ │ - [ 28c55] Regular │ │ - [ 28c5d] StandardEncoding │ │ - [ 28c6e] Supplement │ │ - [ 28c79] SubrCount │ │ - [ 28c83] PFR │ │ - [ 28c87] FONTBOUNDINGBOX │ │ - [ 28c97] RAW_SUPERSCRIPT_Y │ │ - [ 28ca9] RAW_UNDERLINE_POSITION │ │ - [ 28cc4] � │ │ - [ 28ccd] increase-x-height │ │ - [ 28cdf] StartFontMetrics │ │ - [ 28cf0] CapHeight │ │ - [ 28cfa] W │ │ - [ 28cfc] and │ │ - [ 28d00] while │ │ - [ 28d06] Application built with libpng- │ │ - [ 28d25] duplicate sRGB information ignored │ │ - [ 28d48] ICC profile tag start not a multiple of 4 │ │ - [ 28d72] Invalid bit depth in IHDR │ │ - [ 28d8c] invalid memory read │ │ - [ 28da0] invalid after png_start_read_image or png_read_update_info │ │ - [ 28ddb] Invalid palette │ │ - [ 28deb] ICC profile length invalid (not a multiple of 4) │ │ - [ 28e1c] No Further Symbols Can be Inserted; the Value Table is Full │ │ - [ 28e58] itlfs │ │ - [ 28e5e] stdcd │ │ - [ 28e64] sticd │ │ - [ 28e6a] stack │ │ - [ 28e70] WRITE │ │ - [ 28e76] incomprehensible list input │ │ - [ 28e92] Attempt to read descriptor record # of DAF '#' failed; record was not found. This condition may indicate a corrupted DAF. │ │ - [ 28f0c] SPICE(DAFNOSEARCH) │ │ - [ 28f1f] SPICE(DAFBADCRECLEN) │ │ - [ 28f34] SPICE(DAFCRNOTFOUND) │ │ - [ 28f49] tbflsz │ │ - [ 28f50] MAKE_TABLE_LIST_ENTRY │ │ - [ 28f66] NUM_ORDERBY_COLS │ │ - [ 28f77] ftacc │ │ - [ 28f7d] hnbufi │ │ - [ 28f84] hnbufc │ │ - [ 28f8b] DASURI │ │ - [ 28f92] Node PREV: node number = #; backward pointer = #; forward pointer = #. Node LIST: node number = #; backward pointer = #; forward pointer = #. ("FREE" is #) │ │ - [ 29030] LNKTL │ │ - [ 29036] (1X,3A) │ │ - [ 2903e] SWPOOL │ │ - [ 29045] MAXLIN │ │ - [ 2904c] OLD │ │ - [ 29050] rdtext_ │ │ - [ 29058] No free logical units are available. │ │ - [ 2907d] FRAMEX │ │ - [ 29084] SPICE(INVALIDDIMENSION) │ │ - [ 2909c] CIDFRM │ │ - [ 290a3] SPICE(INVALIDCASE) │ │ - [ 290b6] TWO │ │ - [ 290ba] class │ │ - [ 290c0] Negative value for BADDR address: # │ │ - [ 290e4] SPICE(DAFNEGADDR) │ │ - [ 290f6] ckr05_ │ │ - [ 290fd] Data type of the segment should be 4: Passed descriptor shows type = #. │ │ - [ 29145] cmpwid │ │ - [ 2914c] -- │ │ - [ 29151] SPKBSR │ │ - [ 29158] You are attempting to locate type 5 data in a type # data segment. │ │ - [ 2919b] SPKR15 │ │ - [ 291a2] Window size in type 18 segment was #; must be positive. │ │ - [ 291da] STMP03 │ │ - [ 291e1] brcoef │ │ - [ 291e8] = │ │ - [ 291ea] The frame specification "# = '#'" is not one of the recognized means of specifying a text-kernel constant offset frame. This may reflect a typographical error or may indicate that you need to consider updating your version of the SPICE toolkit. │ │ - [ 292e0] dnmidx │ │ - [ 292e7] ZZBODC2N │ │ - [ 292f0] NAME │ │ - [ 292f5] Could not read non-native DAS d.p. record into character array. File = # Record number = #. IOSTAT = #. │ │ - [ 2935d] SPICE(UTFULL) │ │ - [ 2936b] SPICE(FILARCMISMATCH) │ │ - [ 29381] ftamh │ │ - [ 29387] Unable to lock handle for file '#' to a logical unit. There are no rows available for locking in the unit table. │ │ - [ 293f9] ZZDDHF2H │ │ - [ 29402] TRUE_EQUATOR_AND_EQUINOX_OF_DATE │ │ - [ 29423] ROTATING │ │ - [ 2942c] EARTH_IAU_1976 │ │ - [ 2943b] SPICE(INVALIDAXIS) │ │ - [ 2944e] Dynamic frame style # (in definition of frame #) is not supported. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 294ef] Number tables in second join row set was #; valid range is 1:# │ │ - [ 2952e] Unrecognized data type # for first column. │ │ - [ 29559] nf │ │ - [ 2955c] svcp1 │ │ - [ 29562] ZZEKKEY │ │ - [ 2956a] File # has last int. address #; `top' = #. │ │ - [ 29595] Invalid string bounds #:# for table #. │ │ - [ 295bc] The relational operator # was not recognized. │ │ - [ 295ea] ZZEKPGST │ │ - [ 295f3] ZZEKSCA │ │ - [ 295fb] svbas │ │ - [ 29601] The number of join row sets in the union is # │ │ - [ 2962f] IAU_PUCK │ │ - [ 29638] IAU_ISONOE │ │ - [ 29643] UNUSED HEADNODE COUNT │ │ - [ 29659] SSB │ │ - [ 2965d] KORE │ │ - [ 29662] PROTEUS │ │ - [ 2966a] LAOMEDEIA │ │ - [ 29674] LUNAR POLAR HYDROGEN MAPPER │ │ - [ 29690] JNSA │ │ - [ 29695] EMIRATES MARS MISSION │ │ - [ 296ab] MCO │ │ - [ 296af] TERRA │ │ - [ 296b5] NOZOMI │ │ - [ 296bc] SIM │ │ - [ 296c0] SELENE Rstar │ │ - [ 296cd] CHERNYKH │ │ - [ 296d6] CIFFREO │ │ - [ 296de] DU TOIT 1 │ │ - [ 296e8] GEHRELS 2 │ │ - [ 296f2] TAYLOR │ │ - [ 296f9] WEST-KOHOUTEK-IKEMURA │ │ - [ 2970f] WILD 3 │ │ - [ 29716] HELIN │ │ - [ 2971c] SHOEMAKER-HOLT 1 │ │ - [ 2972d] HELIN-ROMAN-CROCKETT │ │ - [ 29742] DSS-63 │ │ - [ 29749] val │ │ - [ 2974d] LINUX │ │ - [ 29753] #4 │ │ - [ 29756] TPARSE does not support the AM/PM conventions for time strings. │ │ - [ 29797] JD │ │ - [ 2979a] B.C. │ │ - [ 2979f] A.D. │ │ - [ 297a4] i. │ │ - [ 297a7] A kernel variable was not properly formed on line # text buffer.Such an assignment should have the form: ' [+]= '. This line was '#'. │ │ - [ 29845] The first item following the assignment operator should be the value of a variable or a left parenthesis '(' followed by a value for a variable. This is not true on line # of the text buffer. │ │ - [ 29906] DP2000 │ │ - [ 2990e] SPICE(UNKNOWNFRAME2) │ │ - [ 29923] ZZSPKAS1 │ │ - [ 2992c] The input value for '#' is not a recognized calendar type. The recognized calendars are 'GREGORIAN', 'JULIAN', and 'MIXED'. │ │ - [ 299aa] SPICE(BADTIMEITEM) │ │ - [ 299bd] The action specified to TIMDEF was '#'. This is not a recognized action. The recognized actions are 'SET' and 'GET'. │ │ - [ 29a34] ISO Time Separator │ │ - [ 29a47] D+ │ │ - [ 29a4a] wksize │ │ - [ 29a51] ERA │ │ - [ 29a55] The input string contains an unrecognizable substring beginning at the character marked by <#>: " │ │ - [ 29ab7] Ymin │ │ - [ 29abc] DmYH*M*S │ │ - [ 29ac5] imii:i:i │ │ - [ 29ace] Y*m*D*H*M*S* │ │ - [ 29adb] i-iti:i:nx │ │ - [ 29ae6] jv │ │ - [ 29ae9] und │ │ - [ 29aed] ba │ │ - [ 29af0] bar │ │ - [ 29af4] bej │ │ - [ 29af8] ce │ │ - [ 29afb] hsb │ │ - [ 29aff] ibb │ │ - [ 29b03] lol │ │ - [ 29b07] mak │ │ - [ 29b0b] ng │ │ - [ 29b0e] sas │ │ - [ 29b12] sga │ │ - [ 29b16] shn │ │ - [ 29b1a] ta │ │ - [ 29b1d] th │ │ - [ 29b20] tum │ │ - [ 29b24] uga │ │ - [ 29b28] yrl │ │ - [ 29b2c] zea │ │ - [ 29b30] spa │ │ - [ 29b34] kaz │ │ - [ 29b38] lav │ │ - [ 29b3c] urd │ │ - [ 29b40] jaw │ │ - [ 29b44] BZ │ │ - [ 29b47] GY │ │ - [ 29b4a] JP │ │ - [ 29b4d] SH │ │ - [ 29b50] UZ │ │ - [ 29b53] XK │ │ - [ 29b56] COD │ │ - [ 29b5a] GGY │ │ - [ 29b5e] PER │ │ - [ 29b62] PRT │ │ - [ 29b66] VUT │ │ - [ 29b6a] ZAR │ │ - [ 29b6e] CHAST │ │ - [ 29b74] OMSST │ │ - [ 29b7a] SAMST │ │ - [ 29b80] Europe/Samara │ │ - [ 29b8e] IDT │ │ - [ 29b92] Africa/Casablanca │ │ - [ 29ba4] PMST │ │ - [ 29ba9] Zzzz │ │ - [ 29bae] paradigmnum │ │ - [ 29bba] de@collation=phonebook │ │ - [ 29bd1] iu_Cans │ │ - [ 29bd9] moh_CA │ │ - [ 29be0] tzm_Latn │ │ - [ 29be9] uz_Latn_UZ │ │ - [ 29bf4] ve_ZA │ │ - [ 29bfa] typeMap │ │ - [ 29c02] sgg │ │ - [ 29c06] ICUDATA │ │ - [ 29c0e] ucol_swapInverseUCA(): too few bytes (%d after header) for inverse UCA collation data\n │ │ - [ 29c65] bundle-open │ │ - [ 29c71] day-format-except-narrow │ │ - [ 29c8a] morning1 │ │ - [ 29c93] 001 │ │ - [ 29c97] islamic-tbla │ │ - [ 29ca4] U_ILLEGAL_ARGUMENT_ERROR │ │ - [ 29cbd] U_ENUM_OUT_OF_SYNC_ERROR │ │ - [ 29cd6] U_MALFORMED_RULE │ │ - [ 29ce7] U_VARIABLE_RANGE_EXHAUSTED │ │ - [ 29d02] tender │ │ - [ 29d09] DKK │ │ - [ 29d0d] ILS │ │ - [ 29d11] KRW │ │ - [ 29d15] NIO │ │ - [ 29d19] TZS │ │ - [ 29d1d] VEF │ │ - [ 29d21] XDR │ │ - [ 29d25] transPost32 │ │ - [ 29d31] accountingFormat │ │ - [ 29d42] @calendar=islamic-civil │ │ - [ 29d5a] @calendar=indian │ │ - [ 29d6b] acceleration │ │ - [ 29d78] micrometer │ │ - [ 29d83] pound │ │ - [ 29d89] kilometer-per-hour │ │ - [ 29d9c] ablative │ │ - [ 29da5] zero │ │ - [ 29daa] %1.15e │ │ - [ 29db1] peta │ │ - [ 29db6] identical │ │ - [ 29dc0] reset tertiary-before completely ignorable not possible │ │ - [ 29df8] reset-before strength differs from its first relation │ │ - [ 29e2e] missing option-terminating ']' after UnicodeSet pattern │ │ - [ 29e66] first secondary ignorable │ │ - [ 29e80] skeleton │ │ - [ 29e89] nOnChoreographer │ │ - [ 29e9a] nOnRefreshPeriodChanged │ │ - [ 29eb2] BufferStuffingFix │ │ - [ 29ec4] doWork │ │ - [ 29ecb] eglGetNextFrameIdANDROID │ │ - [ 29ee4] Failed to check directory existance for favorites file {}\n │ │ - [ 29f1f] C │ │ - [ 29f21] allow │ │ - [ 29f27] deny │ │ - [ 29f2c] Configuration │ │ - [ 29f3a] {}:{} 'Configuration' expected.\n │ │ - [ 29f5b] {} must be a property list.\n │ │ - [ 29f78] F │ │ - [ 29f7a] textures │ │ - [ 29f83] coordsys │ │ - [ 29f8c] / │ │ - [ 29f90] DEBUG │ │ - [ 29f96] CHANNEL_NONE │ │ - [ 29fa3] CHANNEL_TOP_CENTER │ │ - [ 29fb6] CHANNEL_AUX_18 │ │ - [ 29fc5] CHANNEL_AUX_21 │ │ - [ 29fd4] No space available │ │ - [ 29fe7] Protocol not available │ │ - [ 29ffe] 32-bit IEEE Floating Point │ │ - [ 2a019] AAudioStreamBuilder_setBufferCapacityInFrames │ │ - [ 2a047] ?x={}&y={}&z={} │ │ - [ 2a057] URL must contain only one body\n │ │ - [ 2a077] ow │ │ - [ 2a07a] goldenrod │ │ - [ 2a084] navy │ │ - [ 2a089] .cel │ │ - [ 2a08e] .xyzvbin │ │ - [ 2a097] LAM │ │ - [ 2a09b] Rho │ │ - [ 2a09f] Phi │ │ - [ 2a0ac] fadingorbits │ │ - [ 2a0b9] smoothlines │ │ - [ 2a0c5] corona │ │ - [ 2a0cc] cometorbits │ │ - [ 2a0d8] setlabelcolor │ │ - [ 2a0e6] seturl │ │ - [ 2a0ed] rotate │ │ - [ 2a0f4] constellationcolor │ │ - [ 2a107] setgalaxylightgain │ │ - [ 2a11a] velocity │ │ - [ 2a123] Error opening script file. │ │ - [ 2a13e] addobject │ │ - [ 2a148] getselection │ │ - [ 2a155] settime │ │ - [ 2a15d] playaudio │ │ - [ 2a167] setasterisms │ │ - [ 2a174] Argument to celestia:setscreendpi() must be a number │ │ - [ 2a1a9] Argument to celestia:setfaintestvisible() must be a number │ │ - [ 2a1e4] Argument to celestia:setambient must be a number │ │ - [ 2a215] Third arg to celestia:newvector must be a number │ │ - [ 2a246] First argument to celestia:loadtexture() must be a string │ │ - [ 2a280] Error loading script: │ │ - [ 2a297] table │ │ - [ 2a29d] glu │ │ - [ 2a2a1] argument 1 to gl.Disable must be a number │ │ - [ 2a2cb] Argument to object:setradius() must be a number │ │ - [ 2a2fb] opencluster │ │ - [ 2a307] Argument to celestia:setatmosphere() must be a table │ │ - [ 2a33c] height │ │ - [ 2a343] Expected one or two arguments for to observer:center │ │ - [ 2a378] No arguments expected to observer:gettrackedobject │ │ - [ 2a3ab] No arguments expected for observer:getframe() │ │ - [ 2a3d9] No argument expected for observer:deleteview() │ │ - [ 2a408] Values in table-argument to observer:setlocationflags() must be boolean │ │ - [ 2a450] [Phase] │ │ - [ 2a458] One argument expected to position:distanceto() │ │ - [ 2a487] Vector expected as argument to position:addvector │ │ - [ 2a4b9] No arguments expected for rotation_imag │ │ - [ 2a4e1] Invalid key in rotation-access │ │ - [ 2a500] Invalid key in vector-access │ │ - [ 2a51d] No arguments expected for vector:length │ │ - [ 2a545] Bad primitive group type: {} │ │ - [ 2a562] add\n │ │ - [ 2a567] -1 │ │ - [ 2a56b] jpl-mars-ssb │ │ - [ 2a578] pointWidth │ │ - [ 2a583] Error loading star "{}" for asterism "{}"\n │ │ - [ 2a5ae] Clickable │ │ - [ 2a5b8] models/SBc.png │ │ - [ 2a5c7] width │ │ - [ 2a5cd] PR │ │ - [ 2a5d0] Loading model: {}\n │ │ - [ 2a5e3] Object has incorrect syntax for precessing rotation.\n │ │ - [ 2a619] UniformRotation │ │ - [ 2a629] Ending │ │ - [ 2a630] Object has incorrect mean equator frame syntax.\n │ │ - [ 2a661] // buildVertexShader\n │ │ - [ 2a677] H = normalize(eyeDir_tan + │ │ - [ 2a693] float shadowMapCoeff = 1.0;\n │ │ - [ 2a6b0] diff.rgb += shadow * │ │ - [ 2a6c6] color.a *= pointFade;\n │ │ - [ 2a6e2] attribute vec4 in_Position;\n │ │ + [ 2490d] C type │ │ + [ 24914] string/number/__tostring │ │ + [ 2492d] but running with │ │ + [ 24940] truncated │ │ + [ 2494a] unexpected 8-bit transformation │ │ + [ 2496a] CRC error │ │ + [ 24974] cHRM Red X │ │ + [ 2497f] Memory allocation failed while processing sCAL │ │ + [ 249ae] Z_OK on Z_FINISH with output space │ │ + [ 249d1] Can't write sCAL (buffer too small) │ │ + [ 249f5] option │ │ + [ 249fc] PATH_VALUES │ │ + [ 24a08] ftnum │ │ + [ 24a0e] itexp │ │ + [ 24a14] SPICE(BLANKFILETYPE) │ │ + [ 24a29] UNFORMATTED │ │ + [ 24a35] can't backspace file │ │ + [ 24a4a] bad namelist name │ │ + [ 24a5c] substring out of bounds │ │ + [ 24a74] unformatted │ │ + [ 24a80] FIND_TABLE │ │ + [ 24a8b] SPICE(COLDESCTABLEFULL) │ │ + [ 24aa3] The EK file # could not be loaded; the column # in already loaded table # is not present in segment # in the EK file. │ │ + [ 24b19] SPICE(TABLENOTLOADED) │ │ + [ 24b2f] seltab │ │ + [ 24b36] EKNELT │ │ + [ 24b3d] rowvec │ │ + [ 24b44] prev │ │ + [ 24b49] SPICE(UNRECOGNIZEDACTION) │ │ + [ 24b63] rngloc │ │ + [ 24b6a] DASCLS │ │ + [ 24b71] DASLLA │ │ + [ 24b78] There is no room available for adding another numeric value to the kernel pool. │ │ + [ 24bc8] do_fio │ │ + [ 24bcf] E- │ │ + [ 24bd2] Could not read from #. │ │ + [ 24be9] resvd │ │ + [ 24bef] FIVE │ │ + [ 24bf4] IRFNAM │ │ + [ 24bfb] CONVRT: Incompatible units. You are attempting to convert │ │ + [ 24c36] CKFROT │ │ + [ 24c3d] SPICE(WRONGCKTYPE) │ │ + [ 24c50] CKR03 │ │ + [ 24c56] SCTYPE │ │ + [ 24c5d] A traceback follows. The name of the highest level module is first. │ │ + [ 24ca2] SIZEI │ │ + [ 24ca8] character │ │ + [ 24cb2] The reference frame # has class #. This form of reference frame is not supported in version # of FRMGET. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ + [ 24d7e] mxvg_ │ │ + [ 24d84] Storage for # double precision numbers is needed for an SPK data record and only # locations were available. Update the parameter MAXREC in the subroutine SPKPVN and notify the NAIF group of this problem. │ │ + [ 24e51] The semi-latus rectum supplied to the SPK type 15 evaluator was non-positive. This value must be positive. The value supplied was #. │ │ + [ 24ed7] SPICE(BADVECTOR) │ │ + [ 24ee8] SPICE(ECCOUTOFRANGE) │ │ + [ 24efd] Attempt to set size of cell to invalid value. The value was #. │ │ + [ 24f3d] TIPBOD │ │ + [ 24f44] tisbod_ │ │ + [ 24f4c] BODY#_CONSTS_REF_FRAME │ │ + [ 24f63] SPICE(COMPETINGFRAMESPEC) │ │ + [ 24f7d] PCKR02 │ │ + [ 24f84] Axis numbers are #, #, #. │ │ + [ 24fa1] The frame to which frame # is relatively defined is not recognized. The kernel pool specification of the relative frame is '#'. This is not a recognized frame. │ │ + [ 25043] #: The number of components of the kernel pool variable '#' is required to be divisible by #. However, the actual number of components is # which is not evenly divisible by #. │ │ + [ 250f5] CHKOUT: Caller is │ │ + [ 25109] VALIDC │ │ + [ 25110] Input matrix is not a rotation. │ │ + [ 25130] The number of rows in the matrix is not positive. The number of rows is #. │ │ + [ 2517b] kercod │ │ + [ 25182] ZZCKSPK │ │ + [ 2518a] ZZCVPOOL │ │ + [ 25193] The file, #, has a unidentified file architecture. Check that this file is a properly created binary SPICE kernel. │ │ + [ 25207] SPICE(DSKBOGUSENTRY) │ │ + [ 2521c] SPICE(BUFFEROVERFLOW) │ │ + [ 25232] SPICE(VARNAMETOOLONG) │ │ + [ 25248] Definition of frame # specifies obliquity model #, which is not recognized. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 252f2] Dynamic frame family # (in definition of frame #) is not supported. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 25394] Ratio of length of axis #* to length of axis #* is *; this value may cause numeric overflow. │ │ + [ 253f1] ZZDYNVAC │ │ + [ 253fa] Kernel variable # was expected to be present in the kernel pool but was not found. The alternative form of kernel variable name FRAME_#_# was not searched for because this name has excessive length (# characters vs allowed maximum of #). One of these variables is needed to define the parameterized dynamic frame #. Usually this type of problem is due to an error in a frame definition provided in a frame kernel. │ │ + [ 2559b] The index type # is not supported. │ │ + [ 255be] ZZEKILLT │ │ + [ 255c7] ZZEKLLTD │ │ + [ 255d0] SEM_CHECKED │ │ + [ 255dc] Record having pointer # not found in segment # of file # │ │ + [ 25615] File # contains data; LASTC = #; LASTD = #; LASTI = #. │ │ + [ 2564c] Attempt to free non-existent INT page. Page number = #; valid range is 1:# │ │ + [ 25697] DASUDD │ │ + [ 2569e] IAU_PLUTO_BARYCENTER │ │ + [ 256b3] IAU_BENNU │ │ + [ 256bd] IAU_DIDYMOS │ │ + [ 256c9] EARTH BARYCENTER │ │ + [ 256da] PLUTO BARYCENTER │ │ + [ 256eb] MNEME │ │ + [ 256f1] MARGARET │ │ + [ 256fa] LARISSA │ │ + [ 25702] VIKING 2 ORBITER │ │ + [ 25713] MPF │ │ + [ 25717] EDL DEMONSTRATOR MODULE │ │ + [ 2572f] LUNAR TRAILBLAZER │ │ + [ 25741] MERCURY TRANSFER MODULE │ │ + [ 25759] FINLAY │ │ + [ 25760] GEHRELS 1 │ │ + [ 2576a] GRIGG-SKJELLERUP │ │ + [ 2577b] KOHOUTEK │ │ + [ 25784] PSYCHE │ │ + [ 2578b] LUTETIA │ │ + [ 25793] GASPRA │ │ + [ 2579a] DONALDJOHANSON │ │ + [ 257a9] DSS-14 │ │ + [ 257b0] There is a non-printing character embedded in line # of the text kernel file #. Non-printing characters are not allowed in kernel variable assignments. The non-printing character has ASCII code #. │ │ + [ 25878] The kernel variable # has been set up as a string variable. However, the value that you are attempting to assign to this variable on line # of the kernel file '#' is not a string value. │ │ + [ 25934] The only type of time strings that are handled by TPARSE are 'JD', 'YMD' and 'YD' (year day-of-year). You've entered a string of the type #. │ │ + [ 259c3] w. │ │ + [ 259c6] tpartv_ │ │ + [ 259ce] meanng │ │ + [ 259d5] The input string uses the ISO "T" date/time delimiter but does not match any of the accepted ISO formats. │ │ + [ 25a41] *Y │ │ + [ 25a44] The substring "#" could not be resolved in the input string: ' │ │ + [ 25a84] DmH │ │ + [ 25a88] kvtype │ │ + [ 25a8f] lb │ │ + [ 25a92] Modulus count # does not match field count # for SCLK #. │ │ + [ 25acb] YWDF │ │ + [ 25ad1] ZZSPKPA1 │ │ + [ 25ada] clsses │ │ + [ 25ae1] SPICE(FRAMENAMENOTFOUND) │ │ + [ 25afa] TIMDEF │ │ + [ 25b01] Invalid data type code # seen │ │ + [ 25b1f] SEPTEMBER │ │ + [ 25b29] A character at location #1 does not have ASCII value [32,126] for REP string. │ │ + [ 25b77] AP │ │ + [ 25b7a] A minutes components of the time was identified in the time string "#", but the hours component could not be identified. │ │ + [ 25bf5] Yidi:i │ │ + [ 25bfc] Yiii:i:i │ │ + [ 25c05] Yimn │ │ + [ 25c0a] iYdi:i:n │ │ + [ 25c13] iYdi:n │ │ + [ 25c1a] i-iti │ │ + [ 25c20] i-i-Yi:i:n │ │ + [ 25c2b] Y*m*D*H* │ │ + [ 25c34] CS │ │ + [ 25c37] CW │ │ + [ 25c3a] iw │ │ + [ 25c3d] ada │ │ + [ 25c41] af │ │ + [ 25c44] chm │ │ + [ 25c48] cps │ │ + [ 25c4c] egl │ │ + [ 25c50] el │ │ + [ 25c53] enm │ │ + [ 25c57] et │ │ + [ 25c5a] ext │ │ + [ 25c5e] kcg │ │ + [ 25c62] krc │ │ + [ 25c66] ks │ │ + [ 25c69] lv │ │ + [ 25c6c] mk │ │ + [ 25c6f] ms │ │ + [ 25c72] mwv │ │ + [ 25c76] non │ │ + [ 25c7a] nus │ │ + [ 25c7e] sei │ │ + [ 25c82] ty │ │ + [ 25c85] xmf │ │ + [ 25c89] fin │ │ + [ 25c8d] lat │ │ + [ 25c91] nep │ │ + [ 25c95] san │ │ + [ 25c99] slv │ │ + [ 25c9d] zho │ │ + [ 25ca1] AO │ │ + [ 25ca4] CU │ │ + [ 25ca7] GN │ │ + [ 25caa] LS │ │ + [ 25cad] MP │ │ + [ 25cb0] MT │ │ + [ 25cb3] TF │ │ + [ 25cb6] US │ │ + [ 25cb9] WF │ │ + [ 25cbc] DGA │ │ + [ 25cc0] GBR │ │ + [ 25cc4] GMB │ │ + [ 25cc8] MAF │ │ + [ 25ccc] SPM │ │ + [ 25cd0] SWE │ │ + [ 25cd4] SOM │ │ + [ 25cd8] TON │ │ + [ 25cdc] YEM │ │ + [ 25ce0] YUG │ │ + [ 25ce4] gl_ES │ │ + [ 25cea] it_IT │ │ + [ 25cf0] posix/ │ │ + [ 25cf7] CLT │ │ + [ 25cfb] ar_YE │ │ + [ 25d01] ckb_Arab │ │ + [ 25d0a] de_CH │ │ + [ 25d10] en_CA │ │ + [ 25d16] se_NO │ │ + [ 25d1c] sma_NO │ │ + [ 25d23] tn_BW │ │ + [ 25d29] sgn-gr │ │ + [ 25d30] isg │ │ + [ 25d34] sgn-it │ │ + [ 25d3b] sgn-us │ │ + [ 25d42] zh-cmn-hant │ │ + [ 25d4e] M09 │ │ + [ 25d52] Scripts%short │ │ + [ 25d60] Types │ │ + [ 25d66] lw │ │ + [ 25d69] nfc │ │ + [ 25d6d] AliasLocales │ │ + [ 25d7a] [BOGUS UErrorCode] │ │ + [ 25d8d] U_INVALID_STATE_ERROR │ │ + [ 25da3] U_MULTIPLE_CURSORS │ │ + [ 25db6] U_UNEXPECTED_TOKEN │ │ + [ 25dc9] U_MF_VARIANT_KEY_MISMATCH_ERROR │ │ + [ 25de9] U_BRK_RULE_EMPTY_SET │ │ + [ 25dfe] U_REGEX_OCTAL_TOO_BIG │ │ + [ 25e14] BDT │ │ + [ 25e18] BGN │ │ + [ 25e1c] BND │ │ + [ 25e20] ISJ │ │ + [ 25e24] KZT │ │ + [ 25e28] MMK │ │ + [ 25e2c] PAB │ │ + [ 25e30] -Infinity │ │ + [ 25e3a] M11L │ │ + [ 25e3f] square-foot │ │ + [ 25e4b] square-yard │ │ + [ 25e57] milligram-per-deciliter │ │ + [ 25e6f] GHP │ │ + [ 25e73] kilobyte │ │ + [ 25e7c] megabit │ │ + [ 25e84] century │ │ + [ 25e8c] milliampere │ │ + [ 25e98] earth-radius │ │ + [ 25ea5] stone │ │ + [ 25eab] newton-meter │ │ + [ 25eb8] pound-force-foot │ │ + [ 25ec9] dessert-spoon-imperial │ │ + [ 25ee0] pint-metric │ │ + [ 25eec] nominative │ │ + [ 25ef7] masculine │ │ + [ 25f01] ther │ │ + [ 25f06] per- │ │ + [ 25f0b] -per- │ │ + [ 25f11] NumberElements/minimumGroupingDigits │ │ + [ 25f36] dayOfYear │ │ + [ 25f40] idValidity │ │ + [ 25f4b] OrdinalRules │ │ + [ 25f58] primary │ │ + [ 25f60] lower │ │ + [ 25f66] primary tailoring gap too small │ │ + [ 25f86] string contains U+FFFD, U+FFFE or U+FFFF │ │ + [ 25faf] first tertiary ignorable │ │ + [ 25fc8] first trailing │ │ + [ 25fd7] metric_adjacent │ │ + [ 25fe7] com/google/androidgamesdk/SwappyDisplayManager │ │ + [ 26016] static int swappy::SwappyGL::getSupportedRefreshPeriodsNS(uint64_t *, int) │ │ + [ 26061] eglGetFrameTimestampsANDROID │ │ + [ 2607e] mousemove │ │ + [ 26088] Markers enabled │ │ + [ 26098] Time is paused │ │ + [ 260a7] Auto magnitude limit at 45 degrees: {:.2f} │ │ + [ 260d3] passthrough │ │ + [ 260df] WN │ │ + [ 260e2] ly/s │ │ + [ 260e7] mi/s │ │ + [ 260ec] Luminosity: {}x Sun\n │ │ + [ 26101] Pre Format Conversion: %s\n │ │ + [ 26123] CHANNEL_AUX_6 │ │ + [ 26131] CHANNEL_AUX_11 │ │ + [ 26140] CHANNEL_AUX_16 │ │ + [ 2614f] CHANNEL_AUX_26 │ │ + [ 2615e] Socket type not supported │ │ + [ 26178] Device not initialized │ │ + [ 2618f] WinMM │ │ + [ 26195] AAudioStream_getFramesPerBurst │ │ + [ 261b4] Target name: {} │ │ + [ 261c4] UTC │ │ + [ 261c8] Mon │ │ + [ 261cc] Thu │ │ + [ 261d0] Font is not scalable: {}\n │ │ + [ 261ea] gainsboro │ │ + [ 261f4] green │ │ + [ 261fa] springgreen │ │ + [ 26206] teal │ │ + [ 2620b] yellow │ │ + [ 26212] .mkv │ │ + [ 26217] MU │ │ + [ 2621a] Delta │ │ + [ 26220] Spacecraft │ │ + [ 2622b] Star │ │ + [ 26230] landingsite │ │ + [ 2623c] reticulum │ │ + [ 26246] macula │ │ + [ 2624d] setframe │ │ + [ 26256] print │ │ + [ 2625c] value │ │ + [ 26262] observer │ │ + [ 2626b] nopause │ │ + [ 26273] yrot │ │ + [ 26278] utc │ │ + [ 2627c] medium │ │ + [ 26283] symbol │ │ + [ 2628a] Unknown error loading script │ │ + [ 262a7] getobserver │ │ + [ 262b3] getminorbitsize │ │ + [ 262c3] getscripttime │ │ + [ 262d1] First argument to celestia:setlabelstyle() must be a string │ │ + [ 2630d] No arguments expected for celestia:getgalaxylightgain() │ │ + [ 26345] No arguments expected for celestia:getobserver() │ │ + [ 26376] No argument expected to function celestia:gettime │ │ + [ 263a8] No argument expected in celestia:setambient │ │ + [ 263d4] No argument expected in celestia:getstarcolor │ │ + [ 26402] Second arg to celestia:utctotdb must be a number │ │ + [ 26433] Fifth argument to celestia:playaudio must be a number │ │ + [ 26469] Seventh argument to celestia:playaudio must be a number(nopause) │ │ + [ 264aa] loadlib │ │ + [ 264b2] __gc │ │ + [ 264b7] [Frame] │ │ + [ 264bf] LineWidth │ │ + [ 264c9] Vertex │ │ + [ 264d0] argument 2 to gl.Color must be a number │ │ + [ 264f8] removefromcategory │ │ + [ 2650b] lifespanEnd │ │ + [ 26517] atmosphereHeight │ │ + [ 26528] Third arg to object:mark must be a number │ │ + [ 26552] No arguments are expected for object:getmass() │ │ + [ 26581] One parameter expected to function object:setatmosphere │ │ + [ 265b9] Value of {} must be array of 3 numbers │ │ + [ 265e0] initialOrientation │ │ + [ 265f3] Fifth arg to observer:gotolonglat must be a number │ │ + [ 26626] One argument expected to position:addvector() │ │ + [ 26654] Two arguments expected for rotation:setaxisangle() │ │ + [ 26687] Need two operands for add │ │ + [ 266a1] {} (line {}) │ │ + [ 266ae] {} {} {} │ │ + [ 266b7] Mesh should contain just triangle lists\n │ │ + [ 266e0] jpl-venus-sun │ │ + [ 266ee] jpl-moon-emb │ │ + [ 266fb] europa │ │ + [ 26702] Bad script orbit: valid range end < begin\n │ │ + [ 2672d] starTex │ │ + [ 26735] CrA │ │ + [ 26739] Gru │ │ + [ 2673d] TrA │ │ + [ 26741] InfoURL │ │ + [ 26749] file:///{}/{} │ │ + [ 26757] GL_EXT_texture_filter_anisotropic │ │ + [ 26779] RE │ │ + [ 2677c] FM │ │ + [ 2677f] Failed to read mesh data\n │ │ + [ 26799] ScriptedRotation │ │ + [ 267aa] PrecessingRotation │ │ + [ 267bd] Invalid Source filename for SampledTrajectory\n │ │ + [ 267ec] Could not load sampled trajectory from '{}'\n │ │ + [ 26819] Secondary │ │ + [ 26823] Observer │ │ + [ 2682c] Observer object '{}' for topocentric frame not found.\n │ │ + [ 26863] rJ │ │ + [ 26866] float NV = dot(n, V);\n │ │ + [ 2687d] position = in_Position.xyz * (ringRadius + ringWidth * in_TexCoord0.s);\n │ │ + [ 268c6] Vertex shader source:\n │ │ + [ 268dd] h = max(0.0, length(atmSamplePoint) - atmosphereRadius.z);\n │ │ + [ 2691d] BumpMap │ │ + [ 26925] Sorting stars into octree . . .\n │ │ + [ 26946] Loading cross index failed - unexpected EOF\n │ │ + [ 26973] hires │ │ + [ 26979] .{:s} │ │ + [ 2697f] Error parsing virtual texture\n │ │ + [ 2699e] {:04x} │ │ + [ 269a5] Content size {} too small to include point array with {} entries │ │ + [ 269e6] (J)V │ │ + [ 269eb] {}_{} │ │ + [ 269f1] ] │ │ + [ 269f4] cannot use operator[] with a numeric argument with │ │ + [ 26a28] libGLESv2.so │ │ + [ 26a35] llo │ │ + [ 26a39] LC_TIME │ │ + [ 26a41] Invalid memory pool code %d │ │ + [ 26a5d] Write to XMS failed │ │ + [ 26a71] Adobe APP14 marker: version %d, flags 0x%04x 0x%04x, transform %d │ │ + [ 26ab3] Opened temporary file %s │ │ + [ 26acc] FREETYPE_PROPERTIES │ │ + [ 26ae0] kerning │ │ + [ 26ae8] cff │ │ + [ 26aec] UnderlinePosition │ │ + [ 26afe] ExpansionFactor │ │ + [ 26b0e] FAMILY_NAME │ │ + [ 26b1a] SETWIDTH_NAME │ │ + [ 26b28] END_SPACE │ │ + [ 26b32] RAW_AVG_LOWERCASE_WIDTH │ │ + [ 26b4a] RAW_STRIKEOUT_ASCENT │ │ + [ 26b61] � │ │ + [ 26b68] � │ │ + [ 26b71] spread │ │ + [ 26b78] ] │ │ + [ 26b7a] at %p │ │ + [ 26b81] %c │ │ + [ 26b84] pop │ │ + [ 26b88] suspended │ │ + [ 26b92] f │ │ + [ 26b94] cont\n │ │ + [ 26b9a] ffi │ │ + [ 26b9e] Too many bytes for PNG signature │ │ + [ 26bbf] Unknown freer parameter in png_data_freer │ │ + [ 26be9] tag count too large │ │ + [ 26bfd] invalid signature │ │ + [ 26c0f] png_image_read: out of memory │ │ + [ 26c2d] palette color-map: too few entries │ │ + [ 26c50] unexpected alpha swap transformation │ │ + [ 26c75] rgb to gray red coefficient │ │ + [ 26c91] png_set_unknown_chunks now expects a valid location │ │ + [ 26cc5] png_write_image: unsupported transformation │ │ + [ 26cf1] SPICE(FILEOPENFAILED) │ │ + [ 26d07] An Invalid Item Was Found in a List │ │ + [ 26d2b] SPICE(SETEXCESS) │ │ + [ 26d3c] filtyp │ │ + [ 26d43] SPICE(FILENAMETOOLONG) │ │ + [ 26d5a] The attempt to load "#" by the routine FURNSH failed. It # │ │ + [ 26d95] FORMATTED │ │ + [ 26d9f] null file name │ │ + [ 26dae] bad logical input field │ │ + [ 26dc6] subscript for scalar variable │ │ + [ 26de4] stsr │ │ + [ 26de9] SPICE(RECORDNOTFOUND) │ │ + [ 26dff] stprev │ │ + [ 26e06] File record not found for file handle #1. Check if program code uses handle #2 for a read or write operation. │ │ + [ 26e74] ctnams │ │ + [ 26e7b] ctsizs │ │ + [ 26e82] cnstyp │ │ + [ 26e89] tptvec │ │ + [ 26e90] The file name is blank. │ │ + [ 26ea9] DAS/ │ │ + [ 26eae] DAS file not open for writing. Handle = #, file = '#'. │ │ + [ 26ee5] SPICE(DASINVALIDACCESS) │ │ + [ 26efd] DASSIH │ │ + [ 26f04] DASWRI │ │ + [ 26f0b] DASURD │ │ + [ 26f12] HEAD was #. TAIL was #. Valid range is 1 to #. │ │ + [ 26f42] PDPOOL │ │ + [ 26f49] knmids │ │ + [ 26f50] CCIFRM │ │ + [ 26f57] REPSUB error: LEFT (#) must not exceed RIGHT+1 (# + 1). │ │ + [ 26f90] defs │ │ + [ 26f95] nor the output units │ │ + [ 26fab] to │ │ + [ 26fb0] CKPFS │ │ + [ 26fb6] You are attempting to locate type * data in a type 5 data segment. │ │ + [ 26ff9] SPICE(NEGATIVETOL) │ │ + [ 2700c] SCTK01 │ │ + [ 27013] Invalid SCLK rate. │ │ + [ 27026] TDT │ │ + [ 2702a] SPICE(REQUESTOUTOFBOUNDS) │ │ + [ 27044] Input file # has file type #. The file must be a binary SPK file to be readable by this routine. If you expected the file to be a binary SPK file, the problem may be due to the file being an old non-native file lacking binary file format information. It's also possible the file has been corrupted. │ │ + [ 2716f] newest │ │ + [ 27176] sbr0 │ │ + [ 2717b] SPKR03 │ │ + [ 27182] You are attempting to locate type 15 data in a type # data segment. │ │ + [ 271c6] SPKR17 │ │ + [ 271cd] spkr18_ │ │ + [ 271d5] BADKPV │ │ + [ 271dc] #: The kernel pool variable '#' is not currently present in the kernel pool. Possible reasons are that the appropriate text kernel file has not been loaded or that the kernel pool has been cleared after loading the appropriate text kernel file. │ │ + [ 272d2] No version found. │ │ + [ 272e4] SPICE(BADTIMETYPE) │ │ + [ 272f7] delta │ │ + [ 272fd] SPICE(BADBLOCKSIZE) │ │ + [ 27311] SPICE(BLOCKSNOTEVEN) │ │ + [ 27326] ZZBCTRCK │ │ + [ 2732f] ZZDDHOPN │ │ + [ 27338] The file '#' does not exist. │ │ + [ 27355] SPICE(FILEOPENCONFLICT) │ │ + [ 2736d] SPICE(UNKNOWNBFF) │ │ + [ 2737f] FREEZE_EPOCH │ │ + [ 2738c] Definition of frame # associates vector # with axis #. The only valid axis values are { X, -X, Y, -Y, Z, -Z }. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 2745a] In definition of frame #, vector # is defined by the near point on body # as seen from body #. The state of this near point was not found. See the routine DNEARP for an explanation. This situation MAY be caused by an error in a frame kernel in which the frame is defined. The problem also could be indicative of a SPICELIB bug. │ │ + [ 275a4] itmcof │ │ + [ 275ab] err │ │ + [ 275af] TWOVEC │ │ + [ 275b6] The definition indexes must lie in the range from 1 to 3. The value of INDEXA was #. The value of INDEXP was #. │ │ + [ 27628] The values of INDEXA and INDEXP were the same, namely #. They are required to be different. │ │ + [ 27685] lhans │ │ + [ 2768b] EK = #; COLIDX = #; ROW = #; ELTIDX = #. Column entry element was not found. │ │ + [ 276d8] ZZEKPGFR │ │ + [ 276e1] zzektrlk_ │ │ + [ 276eb] C2F_MapFixStrArr │ │ + [ 276fc] ZZFDAT │ │ + [ 27703] IAU_NEPTUNE_BARYCENTER │ │ + [ 2771a] IAU_METIS │ │ + [ 27724] IAU_ENCELADUS │ │ + [ 27732] IAU_ROSALIND │ │ + [ 2773f] IAU_IOCASTE │ │ + [ 2774b] IAU_ITOKAWA │ │ + [ 27757] RADII │ │ + [ 2775d] UNUSED ITEM COUNT │ │ + [ 2776f] SUN │ │ + [ 27773] HARPALYKE │ │ + [ 2777d] HERMIPPE │ │ + [ 27786] EUPORIE │ │ + [ 2778e] TETHYS │ │ + [ 27795] HELENE │ │ + [ 2779c] SUTTUNGR │ │ + [ 277a5] ERRIAPUS │ │ + [ 277ae] CRESSIDA │ │ + [ 277b7] BELINDA │ │ + [ 277bf] GALATEA │ │ + [ 277c7] LUNAR PROSPECTOR │ │ + [ 277d8] MARCO-A │ │ + [ 277e0] MARS RECON ORBITER │ │ + [ 277f3] AXAF │ │ + [ 277f8] S1 │ │ + [ 277fb] SHOEMAKER-LEVY 9-T │ │ + [ 2780e] BOWELL-SKIFF │ │ + [ 2781b] WILD 1 │ │ + [ 27822] LEVY │ │ + [ 27827] output │ │ + [ 2782e] No SCLK kernel for instrument or structure #, with corresponding SCLK ID #, is currently loaded. │ │ + [ 2788f] PC │ │ + [ 27892] The kernel variable # has been set up as a numeric or time variable. However, the value that you are attempting to assign to this variable on line # of the kernel file '#' is not a numeric or time value. │ │ + [ 27960] At character # of line # in the text kernel file '#' the character '@' appears. This character is reserved for identifying time values in assignments to kernel pool variables. However it is not being used in this fashion for the variable '#'. │ │ + [ 27a57] An unexpected delimiter ('#') was encountered in the input string. ' │ │ + [ 27a9d] Siim> │ │ + [ 27aa3] Ymi │ │ + [ 27aa7] SCLK01_OFFSETS_ │ │ + [ 27ab7] IROOM was #; must be in range #:#. IFREE was #; must be in range 1:#. │ │ + [ 27afd] kvsize │ │ + [ 27b04] Total number of double precision data values for SCLK # is #; this count exceeds the maximum supported count #. │ │ + [ 27b74] SCLD01 │ │ + [ 27b7b] SPICE(SUBORBITAL) │ │ + [ 27b8d] YD.DF │ │ + [ 27b94] YMDF │ │ + [ 27b9a] zzspkgo1_ │ │ + [ 27ba4] ZONE │ │ + [ 27ba9] timdef_ │ │ + [ 27bb1] ZZTEME │ │ + [ 27bb8] Minute │ │ + [ 27bbf] Y-i/ │ │ + [ 27bc4] i-idi:i │ │ + [ 27bcc] i:imiY │ │ + [ 27bd3] imYi:i:i │ │ + [ 27bdc] miiii │ │ + [ 27be2] i:ii/i/i │ │ + [ 27beb] Y-iti:i:nx │ │ + [ 27bf6] i-itnx │ │ + [ 27bfd] zztwovxf_ │ │ + [ 27c07] The caller specified that # integers are to be translated from binary format # to #. However there is only room to hold # integers in the output array. This error should never occur. │ │ + [ 27cc0] TP │ │ + [ 27cc3] VD │ │ + [ 27cc6] root │ │ + [ 27ccb] yue │ │ + [ 27ccf] agq │ │ + [ 27cd3] arn │ │ + [ 27cd7] bho │ │ + [ 27cdb] cgg │ │ + [ 27cdf] dtp │ │ + [ 27ce3] dzg │ │ + [ 27ce7] gba │ │ + [ 27ceb] gil │ │ + [ 27cef] grc │ │ + [ 27cf3] gsw │ │ + [ 27cf7] gv │ │ + [ 27cfa] haw │ │ + [ 27cfe] inh │ │ + [ 27d02] kln │ │ + [ 27d06] kr │ │ + [ 27d09] mer │ │ + [ 27d0d] mga │ │ + [ 27d11] qug │ │ + [ 27d15] see │ │ + [ 27d19] sg │ │ + [ 27d1c] tet │ │ + [ 27d20] zu │ │ + [ 27d23] sh │ │ + [ 27d26] abk │ │ + [ 27d2a] deu │ │ + [ 27d2e] ful │ │ + [ 27d32] hau │ │ + [ 27d36] hat │ │ + [ 27d3a] ind │ │ + [ 27d3e] ipk │ │ + [ 27d42] kan │ │ + [ 27d46] lub │ │ + [ 27d4a] nld │ │ + [ 27d4e] sag │ │ + [ 27d52] AG │ │ + [ 27d55] CI │ │ + [ 27d58] GM │ │ + [ 27d5b] IR │ │ + [ 27d5e] TG │ │ + [ 27d61] TJ │ │ + [ 27d64] EGY │ │ + [ 27d68] GIB │ │ + [ 27d6c] GUM │ │ + [ 27d70] PRK │ │ + [ 27d74] LKA │ │ + [ 27d78] MWI │ │ + [ 27d7c] PHL │ │ + [ 27d80] RUS │ │ + [ 27d84] TCA │ │ + [ 27d88] TJK │ │ + [ 27d8c] az_AZ │ │ + [ 27d92] fi_FI │ │ + [ 27d98] ko_KR │ │ + [ 27d9e] posixrules │ │ + [ 27da9] Australia/South │ │ + [ 27db9] NDT │ │ + [ 27dbd] Canada/Saskatchewan │ │ + [ 27dd1] HAST │ │ + [ 27dd6] bn_BD │ │ + [ 27ddc] bo_CN │ │ + [ 27de2] ca_ES_VALENCIA │ │ + [ 27df1] en_NZ │ │ + [ 27df7] en_GU │ │ + [ 27dfd] es_PA │ │ + [ 27e03] sv_FI │ │ + [ 27e09] syr_SY │ │ + [ 27e10] cmn │ │ + [ 27e14] swl │ │ + [ 27e18] ures_swap(): data format %02x.%02x.%02x.%02x (format version %02x.%02x) is not a resource bundle\n │ │ + [ 27e7a] ucol_swap(formatVersion=4): too few bytes (%d after header) for collation data\n │ │ + [ 27eca] ucnv_clone │ │ + [ 27ed5] japanese │ │ + [ 27ede] metazone-long │ │ + [ 27eec] numbers │ │ + [ 27ef4] keyValue │ │ + [ 27efd] grapheme │ │ + [ 27f06] ubrk_swap(): too few bytes (%d after ICU Data header) for break data.\n │ │ + [ 27f4d] nfkc_cf │ │ + [ 27f55] U_MF_UNSUPPORTED_STATEMENT_ERROR │ │ + [ 27f76] U_BRK_UNCLOSED_SET │ │ + [ 27f89] U_REGEX_BAD_ESCAPE_SEQUENCE │ │ + [ 27fa5] U_REGEX_INVALID_FLAG │ │ + [ 27fba] U_IDNA_STD3_ASCII_RULES_ERROR │ │ + [ 27fd8] U_PLUGIN_TOO_HIGH │ │ + [ 27fea] ALK │ │ + [ 27fee] EGP │ │ + [ 27ff2] GWP │ │ + [ 27ff6] IEP │ │ + [ 27ffa] JMD │ │ + [ 27ffe] LTT │ │ + [ 28002] PES │ │ + [ 28006] SEK │ │ + [ 2800a] UGX │ │ + [ 2800e] XBD │ │ + [ 28012] XUA │ │ + [ 28016] Multiple status │ │ + [ 28026] area │ │ + [ 2802b] square-inch │ │ + [ 28037] decade │ │ + [ 2803e] kilowatt │ │ + [ 28047] cup-metric │ │ + [ 28052] prepositional │ │ + [ 28060] units/ │ │ + [ 28067] shifted │ │ + [ 2806f] search │ │ + [ 28076] contractions ending with conjoining Jamo L or L+V not supported │ │ + [ 280b6] reset without position │ │ + [ 280cd] range without end in starred-relation string │ │ + [ 280fa] first implicit │ │ + [ 28109] quotationEnd │ │ + [ 28116] fahrenhe │ │ + [ 2811f] terminate │ │ + [ 28129] enableFramePacing │ │ + [ 2813b] getAppVsyncOffsetNanos │ │ + [ 28152] mousebuttondown │ │ + [ 28162] Star color: Classic │ │ + [ 28176] Using limit of knowledge surface textures. │ │ + [ 281a1] Unknown projection mode {}\n │ │ + [ 281bd] fahrenheit │ │ + [ 281c8] sun direction │ │ + [ 281d6] InitScript │ │ + [ 281e1] DestinationFile │ │ + [ 281f1] ScriptScreenshotDirectory │ │ + [ 2820b] OrbitWindowEnd │ │ + [ 2821a] B │ │ + [ 2821c] Skipping unnamed destination\n │ │ + [ 2823b] parentFolder " │ │ + [ 2824c] Class: %s\n │ │ + [ 28257] Radius: {} Rsun ({})\n │ │ + [ 2826e] deep sky │ │ + [ 28277] Skipping {} catalog: {}\n │ │ + [ 28290] INFO │ │ + [ 28295] NO │ │ + [ 28298] CHANNEL_TOP_BACK_RIGHT │ │ + [ 282af] Not a directory │ │ + [ 282bf] Deadlock │ │ + [ 282c8] Network unavailable │ │ + [ 282dc] Device type not supported │ │ + [ 282f6] Unknown miniaudio session state {} │ │ + [ 28319] Web Audio │ │ + [ 28323] [OpenSL] Failed to realize audio recorder. │ │ + [ 2834e] Cloning data buffer node failed because the source node was released. The source node must remain valid until the cloning has completed.\n │ │ + [ 283d8] select │ │ + [ 283df] black │ │ + [ 283e5] firebrick │ │ + [ 283ef] lightcyan │ │ + [ 283f9] lightpink │ │ + [ 28403] sandybrown │ │ + [ 2840e] .cms │ │ + [ 28413] SIG │ │ + [ 28417] Lambda │ │ + [ 2841e] Chi │ │ + [ 28428] constellations │ │ + [ 28437] nebulae │ │ + [ 2843f] openclusters │ │ + [ 2844c] planum │ │ + [ 28453] astrum │ │ + [ 2845a] lobus │ │ + [ 28460] preloadtex │ │ + [ 2846b] volume │ │ + [ 28472] latitude │ │ + [ 2847b] path │ │ + [ 28480] disk │ │ + [ 28485] origin │ │ + [ 2848c] gain │ │ + [ 28491] MinOrbitSize │ │ + [ 2849e] getchildren │ │ + [ 284aa] Fourth argument to celestia:setsafeareainsets() must be a number │ │ + [ 284eb] stopaudio │ │ + [ 284f5] Fourth argument to celestia:print must be a number │ │ + [ 28528] Three arguments expected for celestia:settextcolor() │ │ + [ 2855d] sunwhite │ │ + [ 28566] invalid starcolor │ │ + [ 28578] No argument expected in celestia:gettextureresolution │ │ + [ 285ae] Second arg to celestia:tojulianday must be a number │ │ + [ 285e2] No arguments expected to function celestia:getdsocount │ │ + [ 28619] One argument expected for celestia:runscript │ │ + [ 28646] First argument to celestia:log must be a string │ │ + [ 28676] One argument expected to celestia:getparamstring() │ │ + [ 286a9] key │ │ + [ 286ad] No arguments expected for frame:getrefobject() │ │ + [ 286dc] TEXTURE_2D │ │ + [ 286e7] No arguments expected for gl.PopMatrix() │ │ + [ 28710] getmaxdescent │ │ + [ 2871e] [Image:{}x{}] │ │ + [ 2872c] One argument expected to object:setvisible() │ │ + [ 28759] tag │ │ + [ 2875d] No arguments expected to function object:getinfo │ │ + [ 2878e] reflectivity │ │ + [ 2879b] Bad object! │ │ + [ 287a7] Fourth arg to observer:gotodistance must be a vector │ │ + [ 287dc] One or two arguments expected for observer:splitview() │ │ + [ 28813] First argument to observer:splitview() must be a string │ │ + [ 2884b] Need two operands for subtraction │ │ + [ 2886d] Argument to rotation:transform() must be a vector │ │ + [ 2889f] length │ │ + [ 288a6] Invalid vertex attribute format '{}' │ │ + [ 288cb] emissive {} {} {}\n │ │ + [ 288de] venus │ │ + [ 288e4] iau-atlas │ │ + [ 288ee] iau-pluto │ │ + [ 288f8] iau-helene │ │ + [ 28903] iau-callisto │ │ + [ 28910] AddonPath │ │ + [ 2891a] minimumFeatureSize │ │ + [ 2892d] Lib │ │ + [ 28931] Axis │ │ + [ 28936] navi │ │ + [ 2893b] selpointer │ │ + [ 28946] FE │ │ + [ 28949] VI │ │ + [ 2894c] Could not find custom orbit named '{}'\n │ │ + [ 28974] Object has incorrect elliptical orbit syntax.\n │ │ + [ 289a3] Attempting to load orientation file '{}'\n │ │ + [ 289cd] Function │ │ + [ 289d6] cubic │ │ + [ 289dc] Object has incorrect two-vector frame syntax.\n │ │ + [ 28a0b] No observer specified for topocentric frame.\n │ │ + [ 28a39] {}_geom.glsl │ │ + [ 28a46] vec3 V = normalize(eyeDir);\n │ │ + [ 28a63] color += (phRayleigh * rayleighCoeff + phMie * mieCoeff) * invScatterCoeffSum * │ │ + [ 28ab8] * texture2D(diffTex, gl_PointCoord);\n │ │ + [ 28adf] light{}_specular │ │ + [ 28af0] sampler1DShadow │ │ + [ 28b00] * (pow(NH, shininess) * NL);\n │ │ + [ 28b1f] float qq = dot(eyePosition, eyePosition) - atmosphereRadius.y;\n │ │ + [ 28b63] Atmosphere │ │ + [ 28b6e] CloudShadowDepth │ │ + [ 28b7f] NightTexture │ │ + [ 28b8c] Ib │ │ + [ 28b8f] DZ │ │ + [ 28b92] TYC │ │ + [ 28b97] Error opening image file {}.\n │ │ + [ 28bb5] Failed to read entry {} of texture coord array\n │ │ + [ 28be5] Error reading FloatPercentage\n │ │ + [ 28c04] "bytes": [ │ │ + [ 28c0f] string pointer is null │ │ + [ 28c26] Define Restart Interval %u │ │ + [ 28c41] Component %d: %dhx%dv q=%d │ │ + [ 28c60] Ss=%d, Se=%d, Ah=%d, Al=%d │ │ + [ 28c7d] sfnt │ │ + [ 28c82] Regular │ │ + [ 28c8a] StandardEncoding │ │ + [ 28c9b] Supplement │ │ + [ 28ca6] SubrCount │ │ + [ 28cb0] PFR │ │ + [ 28cb4] FONTBOUNDINGBOX │ │ + [ 28cc4] RAW_SUPERSCRIPT_Y │ │ + [ 28cd6] RAW_UNDERLINE_POSITION │ │ + [ 28cf1] � │ │ + [ 28cfa] increase-x-height │ │ + [ 28d0c] StartFontMetrics │ │ + [ 28d1d] CapHeight │ │ + [ 28d27] W │ │ + [ 28d29] and │ │ + [ 28d2d] while │ │ + [ 28d33] Application built with libpng- │ │ + [ 28d52] duplicate sRGB information ignored │ │ + [ 28d75] ICC profile tag start not a multiple of 4 │ │ + [ 28d9f] Invalid bit depth in IHDR │ │ + [ 28db9] invalid memory read │ │ + [ 28dcd] invalid after png_start_read_image or png_read_update_info │ │ + [ 28e08] Invalid palette │ │ + [ 28e18] ICC profile length invalid (not a multiple of 4) │ │ + [ 28e49] No Further Symbols Can be Inserted; the Value Table is Full │ │ + [ 28e85] itlfs │ │ + [ 28e8b] stdcd │ │ + [ 28e91] sticd │ │ + [ 28e97] stack │ │ + [ 28e9d] WRITE │ │ + [ 28ea3] incomprehensible list input │ │ + [ 28ebf] Attempt to read descriptor record # of DAF '#' failed; record was not found. This condition may indicate a corrupted DAF. │ │ + [ 28f39] SPICE(DAFNOSEARCH) │ │ + [ 28f4c] SPICE(DAFBADCRECLEN) │ │ + [ 28f61] SPICE(DAFCRNOTFOUND) │ │ + [ 28f76] tbflsz │ │ + [ 28f7d] MAKE_TABLE_LIST_ENTRY │ │ + [ 28f93] NUM_ORDERBY_COLS │ │ + [ 28fa4] ftacc │ │ + [ 28faa] hnbufi │ │ + [ 28fb1] hnbufc │ │ + [ 28fb8] DASURI │ │ + [ 28fbf] Node PREV: node number = #; backward pointer = #; forward pointer = #. Node LIST: node number = #; backward pointer = #; forward pointer = #. ("FREE" is #) │ │ + [ 2905d] LNKTL │ │ + [ 29063] (1X,3A) │ │ + [ 2906b] SWPOOL │ │ + [ 29072] MAXLIN │ │ + [ 29079] OLD │ │ + [ 2907d] rdtext_ │ │ + [ 29085] No free logical units are available. │ │ + [ 290aa] FRAMEX │ │ + [ 290b1] SPICE(INVALIDDIMENSION) │ │ + [ 290c9] CIDFRM │ │ + [ 290d0] SPICE(INVALIDCASE) │ │ + [ 290e3] TWO │ │ + [ 290e7] class │ │ + [ 290ed] Negative value for BADDR address: # │ │ + [ 29111] SPICE(DAFNEGADDR) │ │ + [ 29123] ckr05_ │ │ + [ 2912a] Data type of the segment should be 4: Passed descriptor shows type = #. │ │ + [ 29172] cmpwid │ │ + [ 29179] -- │ │ + [ 2917e] SPKBSR │ │ + [ 29185] You are attempting to locate type 5 data in a type # data segment. │ │ + [ 291c8] SPKR15 │ │ + [ 291cf] Window size in type 18 segment was #; must be positive. │ │ + [ 29207] STMP03 │ │ + [ 2920e] brcoef │ │ + [ 29215] = │ │ + [ 29217] The frame specification "# = '#'" is not one of the recognized means of specifying a text-kernel constant offset frame. This may reflect a typographical error or may indicate that you need to consider updating your version of the SPICE toolkit. │ │ + [ 2930d] dnmidx │ │ + [ 29314] ZZBODC2N │ │ + [ 2931d] NAME │ │ + [ 29322] Could not read non-native DAS d.p. record into character array. File = # Record number = #. IOSTAT = #. │ │ + [ 2938a] SPICE(UTFULL) │ │ + [ 29398] SPICE(FILARCMISMATCH) │ │ + [ 293ae] ftamh │ │ + [ 293b4] Unable to lock handle for file '#' to a logical unit. There are no rows available for locking in the unit table. │ │ + [ 29426] ZZDDHF2H │ │ + [ 2942f] TRUE_EQUATOR_AND_EQUINOX_OF_DATE │ │ + [ 29450] ROTATING │ │ + [ 29459] EARTH_IAU_1976 │ │ + [ 29468] SPICE(INVALIDAXIS) │ │ + [ 2947b] Dynamic frame style # (in definition of frame #) is not supported. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 2951c] Number tables in second join row set was #; valid range is 1:# │ │ + [ 2955b] Unrecognized data type # for first column. │ │ + [ 29586] nf │ │ + [ 29589] svcp1 │ │ + [ 2958f] ZZEKKEY │ │ + [ 29597] File # has last int. address #; `top' = #. │ │ + [ 295c2] Invalid string bounds #:# for table #. │ │ + [ 295e9] The relational operator # was not recognized. │ │ + [ 29617] ZZEKPGST │ │ + [ 29620] ZZEKSCA │ │ + [ 29628] svbas │ │ + [ 2962e] The number of join row sets in the union is # │ │ + [ 2965c] IAU_PUCK │ │ + [ 29665] IAU_ISONOE │ │ + [ 29670] UNUSED HEADNODE COUNT │ │ + [ 29686] SSB │ │ + [ 2968a] KORE │ │ + [ 2968f] PROTEUS │ │ + [ 29697] LAOMEDEIA │ │ + [ 296a1] LUNAR POLAR HYDROGEN MAPPER │ │ + [ 296bd] JNSA │ │ + [ 296c2] EMIRATES MARS MISSION │ │ + [ 296d8] MCO │ │ + [ 296dc] TERRA │ │ + [ 296e2] NOZOMI │ │ + [ 296e9] SIM │ │ + [ 296ed] SELENE Rstar │ │ + [ 296fa] CHERNYKH │ │ + [ 29703] CIFFREO │ │ + [ 2970b] DU TOIT 1 │ │ + [ 29715] GEHRELS 2 │ │ + [ 2971f] TAYLOR │ │ + [ 29726] WEST-KOHOUTEK-IKEMURA │ │ + [ 2973c] WILD 3 │ │ + [ 29743] HELIN │ │ + [ 29749] SHOEMAKER-HOLT 1 │ │ + [ 2975a] HELIN-ROMAN-CROCKETT │ │ + [ 2976f] DSS-63 │ │ + [ 29776] val │ │ + [ 2977a] LINUX │ │ + [ 29780] #4 │ │ + [ 29783] TPARSE does not support the AM/PM conventions for time strings. │ │ + [ 297c4] JD │ │ + [ 297c7] B.C. │ │ + [ 297cc] A.D. │ │ + [ 297d1] i. │ │ + [ 297d4] A kernel variable was not properly formed on line # text buffer.Such an assignment should have the form: ' [+]= '. This line was '#'. │ │ + [ 29872] The first item following the assignment operator should be the value of a variable or a left parenthesis '(' followed by a value for a variable. This is not true on line # of the text buffer. │ │ + [ 29933] DP2000 │ │ + [ 2993b] SPICE(UNKNOWNFRAME2) │ │ + [ 29950] ZZSPKAS1 │ │ + [ 29959] The input value for '#' is not a recognized calendar type. The recognized calendars are 'GREGORIAN', 'JULIAN', and 'MIXED'. │ │ + [ 299d7] SPICE(BADTIMEITEM) │ │ + [ 299ea] The action specified to TIMDEF was '#'. This is not a recognized action. The recognized actions are 'SET' and 'GET'. │ │ + [ 29a61] ISO Time Separator │ │ + [ 29a74] D+ │ │ + [ 29a77] wksize │ │ + [ 29a7e] ERA │ │ + [ 29a82] The input string contains an unrecognizable substring beginning at the character marked by <#>: " │ │ + [ 29ae4] Ymin │ │ + [ 29ae9] DmYH*M*S │ │ + [ 29af2] imii:i:i │ │ + [ 29afb] Y*m*D*H*M*S* │ │ + [ 29b08] i-iti:i:nx │ │ + [ 29b13] jv │ │ + [ 29b16] und │ │ + [ 29b1a] ba │ │ + [ 29b1d] bar │ │ + [ 29b21] bej │ │ + [ 29b25] ce │ │ + [ 29b28] hsb │ │ + [ 29b2c] ibb │ │ + [ 29b30] lol │ │ + [ 29b34] mak │ │ + [ 29b38] ng │ │ + [ 29b3b] sas │ │ + [ 29b3f] sga │ │ + [ 29b43] shn │ │ + [ 29b47] ta │ │ + [ 29b4a] th │ │ + [ 29b4d] tum │ │ + [ 29b51] uga │ │ + [ 29b55] yrl │ │ + [ 29b59] zea │ │ + [ 29b5d] spa │ │ + [ 29b61] kaz │ │ + [ 29b65] lav │ │ + [ 29b69] urd │ │ + [ 29b6d] jaw │ │ + [ 29b71] BZ │ │ + [ 29b74] GY │ │ + [ 29b77] JP │ │ + [ 29b7a] SH │ │ + [ 29b7d] UZ │ │ + [ 29b80] XK │ │ + [ 29b83] COD │ │ + [ 29b87] GGY │ │ + [ 29b8b] PER │ │ + [ 29b8f] PRT │ │ + [ 29b93] VUT │ │ + [ 29b97] ZAR │ │ + [ 29b9b] CHAST │ │ + [ 29ba1] OMSST │ │ + [ 29ba7] SAMST │ │ + [ 29bad] Europe/Samara │ │ + [ 29bbb] IDT │ │ + [ 29bbf] Africa/Casablanca │ │ + [ 29bd1] PMST │ │ + [ 29bd6] Zzzz │ │ + [ 29bdb] paradigmnum │ │ + [ 29be7] de@collation=phonebook │ │ + [ 29bfe] iu_Cans │ │ + [ 29c06] moh_CA │ │ + [ 29c0d] tzm_Latn │ │ + [ 29c16] uz_Latn_UZ │ │ + [ 29c21] ve_ZA │ │ + [ 29c27] typeMap │ │ + [ 29c2f] sgg │ │ + [ 29c33] ICUDATA │ │ + [ 29c3b] ucol_swapInverseUCA(): too few bytes (%d after header) for inverse UCA collation data\n │ │ + [ 29c92] bundle-open │ │ + [ 29c9e] day-format-except-narrow │ │ + [ 29cb7] morning1 │ │ + [ 29cc0] 001 │ │ + [ 29cc4] islamic-tbla │ │ + [ 29cd1] U_ILLEGAL_ARGUMENT_ERROR │ │ + [ 29cea] U_ENUM_OUT_OF_SYNC_ERROR │ │ + [ 29d03] U_MALFORMED_RULE │ │ + [ 29d14] U_VARIABLE_RANGE_EXHAUSTED │ │ + [ 29d2f] tender │ │ + [ 29d36] DKK │ │ + [ 29d3a] ILS │ │ + [ 29d3e] KRW │ │ + [ 29d42] NIO │ │ + [ 29d46] TZS │ │ + [ 29d4a] VEF │ │ + [ 29d4e] XDR │ │ + [ 29d52] transPost32 │ │ + [ 29d5e] accountingFormat │ │ + [ 29d6f] @calendar=islamic-civil │ │ + [ 29d87] @calendar=indian │ │ + [ 29d98] acceleration │ │ + [ 29da5] micrometer │ │ + [ 29db0] pound │ │ + [ 29db6] kilometer-per-hour │ │ + [ 29dc9] ablative │ │ + [ 29dd2] zero │ │ + [ 29dd7] %1.15e │ │ + [ 29dde] peta │ │ + [ 29de3] identical │ │ + [ 29ded] reset tertiary-before completely ignorable not possible │ │ + [ 29e25] reset-before strength differs from its first relation │ │ + [ 29e5b] missing option-terminating ']' after UnicodeSet pattern │ │ + [ 29e93] first secondary ignorable │ │ + [ 29ead] skeleton │ │ + [ 29eb6] nOnChoreographer │ │ + [ 29ec7] nOnRefreshPeriodChanged │ │ + [ 29edf] BufferStuffingFix │ │ + [ 29ef1] doWork │ │ + [ 29ef8] eglGetNextFrameIdANDROID │ │ + [ 29f11] Failed to check directory existance for favorites file {}\n │ │ + [ 29f4c] C │ │ + [ 29f4e] allow │ │ + [ 29f54] deny │ │ + [ 29f59] Configuration │ │ + [ 29f67] {}:{} 'Configuration' expected.\n │ │ + [ 29f88] {} must be a property list.\n │ │ + [ 29fa5] F │ │ + [ 29fa7] textures │ │ + [ 29fb0] coordsys │ │ + [ 29fb9] / │ │ + [ 29fbd] DEBUG │ │ + [ 29fc3] CHANNEL_NONE │ │ + [ 29fd0] CHANNEL_TOP_CENTER │ │ + [ 29fe3] CHANNEL_AUX_18 │ │ + [ 29ff2] CHANNEL_AUX_21 │ │ + [ 2a001] No space available │ │ + [ 2a014] Protocol not available │ │ + [ 2a02b] 32-bit IEEE Floating Point │ │ + [ 2a046] AAudioStreamBuilder_setBufferCapacityInFrames │ │ + [ 2a074] ?x={}&y={}&z={} │ │ + [ 2a084] URL must contain only one body\n │ │ + [ 2a0a4] ow │ │ + [ 2a0a7] goldenrod │ │ + [ 2a0b1] navy │ │ + [ 2a0b6] .cel │ │ + [ 2a0bb] .xyzvbin │ │ + [ 2a0c4] LAM │ │ + [ 2a0c8] Rho │ │ + [ 2a0cc] Phi │ │ + [ 2a0d9] fadingorbits │ │ + [ 2a0e6] smoothlines │ │ + [ 2a0f2] corona │ │ + [ 2a0f9] cometorbits │ │ + [ 2a105] setlabelcolor │ │ + [ 2a113] seturl │ │ + [ 2a11a] rotate │ │ + [ 2a121] constellationcolor │ │ + [ 2a134] setgalaxylightgain │ │ + [ 2a147] velocity │ │ + [ 2a150] Error opening script file. │ │ + [ 2a16b] addobject │ │ + [ 2a175] getselection │ │ + [ 2a182] settime │ │ + [ 2a18a] playaudio │ │ + [ 2a194] setasterisms │ │ + [ 2a1a1] Argument to celestia:setscreendpi() must be a number │ │ + [ 2a1d6] Argument to celestia:setfaintestvisible() must be a number │ │ + [ 2a211] Argument to celestia:setambient must be a number │ │ + [ 2a242] Third arg to celestia:newvector must be a number │ │ + [ 2a273] First argument to celestia:loadtexture() must be a string │ │ + [ 2a2ad] Error loading script: │ │ + [ 2a2c4] table │ │ + [ 2a2ca] glu │ │ + [ 2a2ce] argument 1 to gl.Disable must be a number │ │ + [ 2a2f8] Argument to object:setradius() must be a number │ │ + [ 2a328] opencluster │ │ + [ 2a334] Argument to celestia:setatmosphere() must be a table │ │ + [ 2a369] height │ │ + [ 2a370] Expected one or two arguments for to observer:center │ │ + [ 2a3a5] No arguments expected to observer:gettrackedobject │ │ + [ 2a3d8] No arguments expected for observer:getframe() │ │ + [ 2a406] No argument expected for observer:deleteview() │ │ + [ 2a435] Values in table-argument to observer:setlocationflags() must be boolean │ │ + [ 2a47d] [Phase] │ │ + [ 2a485] One argument expected to position:distanceto() │ │ + [ 2a4b4] Vector expected as argument to position:addvector │ │ + [ 2a4e6] No arguments expected for rotation_imag │ │ + [ 2a50e] Invalid key in rotation-access │ │ + [ 2a52d] Invalid key in vector-access │ │ + [ 2a54a] No arguments expected for vector:length │ │ + [ 2a572] Bad primitive group type: {} │ │ + [ 2a58f] add\n │ │ + [ 2a594] -1 │ │ + [ 2a598] jpl-mars-ssb │ │ + [ 2a5a5] pointWidth │ │ + [ 2a5b0] Error loading star "{}" for asterism "{}"\n │ │ + [ 2a5db] Clickable │ │ + [ 2a5e5] models/SBc.png │ │ + [ 2a5f4] width │ │ + [ 2a5fa] PR │ │ + [ 2a5fd] Loading model: {}\n │ │ + [ 2a610] Object has incorrect syntax for precessing rotation.\n │ │ + [ 2a646] UniformRotation │ │ + [ 2a656] Ending │ │ + [ 2a65d] Object has incorrect mean equator frame syntax.\n │ │ + [ 2a68e] // buildVertexShader\n │ │ + [ 2a6a4] H = normalize(eyeDir_tan + │ │ + [ 2a6c0] float shadowMapCoeff = 1.0;\n │ │ + [ 2a6dd] diff.rgb += shadow * │ │ + [ 2a6f3] color.a *= pointFade;\n │ │ + [ 2a70f] attribute vec4 in_Position;\n │ │ attribute vec3 in_Normal;\n │ │ attribute vec4 in_TexCoord0;\n │ │ attribute vec4 in_TexCoord1;\n │ │ attribute vec4 in_TexCoord2;\n │ │ attribute vec4 in_TexCoord3;\n │ │ attribute vec4 in_Color;\n │ │ - [ 2a7a6] sampler2DShadow │ │ - [ 2a7b6] vec3 atmLeave = nposition;\n │ │ - [ 2a7d6] d = sqrt(max(rq * rq - qq, 0.0));\n │ │ - [ 2a7fd] atmSamplePoint = mix(atmEnter, atmLeave, 0.667);\n │ │ - [ 2a833] Timeline │ │ - [ 2a83c] Error in timeline of '{}', phase {}.\n │ │ - [ 2a862] Reflectivity │ │ - [ 2a86f] Absorption │ │ - [ 2a87a] DA │ │ - [ 2a87d] ignoring SpectralType on Barycenter │ │ - [ 2a8a1] {} A │ │ - [ 2a8a6] Creating tiled texture. Width={}, max={}\n │ │ - [ 2a8d0] Read3DSFile: Error opening {}\n │ │ - [ 2a8ef] │ │ - [ 2a8f6] getObjectPointer │ │ - [ 2a907] cannot create object from initializer list │ │ - [ 2a932] eglGetCurrentDisplay │ │ - [ 2a947] Read failed on temporary file │ │ - [ 2a965] Write failed on temporary file --- out of disk space? │ │ - [ 2a99b] Virtual array controller messed up │ │ - [ 2a9be] Freed XMS handle %u │ │ - [ 2a9d2] RESOLUTION_X │ │ - [ 2a9df] SLANT │ │ - [ 2a9e5] STARTFONT │ │ - [ 2a9ef] CHARSET_COLLECTIONS │ │ - [ 2aa03] RAW_UNDERLINE_THICKNESS │ │ - [ 2aa1b] X_HEIGHT │ │ - [ 2aa27] � │ │ - [ 2aa2c] EndTrackKern │ │ - [ 2aa39] WY │ │ - [ 2aa3c] proto │ │ - [ 2aa42] for │ │ - [ 2aa46] not │ │ - [ 2aa4a] pairs │ │ - [ 2aa50] │ │ - [ 2aa5a] pragma │ │ - [ 2aa61] PANIC: unprotected error in call to Lua API ( │ │ - [ 2aa8f] new │ │ - [ 2aa93] loaders │ │ - [ 2aa9d] no file '%s' │ │ - [ 2aaaa] loop or previous error loading module '%s' │ │ - [ 2aad5] cdata<%s>: %d │ │ - [ 2aae3] buffer │ │ - [ 2aaea] +0000 │ │ - [ 2aaf1] Invalid filter method in IHDR │ │ - [ 2ab0f] known incorrect sRGB profile │ │ - [ 2ab2c] Out of Memory │ │ - [ 2ab3a] unexpected bit depth │ │ - [ 2ab4f] Palette is NULL in indexed image │ │ - [ 2ab70] NULL row buffer │ │ - [ 2ab80] error in user chunk │ │ - [ 2ab94] Write Error │ │ - [ 2aba0] png_image_write_to_memory: PNG too big │ │ - [ 2abc7] Invalid filter type specified │ │ - [ 2abe5] Invalid cell size. The size was #. │ │ - [ 2ac09] Input argument op had value: # Valid choices are GET or SET. │ │ - [ 2ac46] File Open Failed Because the File was Already Open │ │ - [ 2ac79] No More Logical Units are Available for Allocation │ │ - [ 2acac] SPICE(NOINTERVAL) │ │ - [ 2acbe] SPICE(NOTDISTINCT) │ │ - [ 2acd1] The Input or Output Units Were Not Recognized │ │ - [ 2acff] The routine KEEPER is an umbrella for a collection of entry points that manage the loading, tracking and unloading of SPICE kernels. KEEPER should not be called directly. It is likely that a programming error has been made. │ │ - [ 2ade1] types │ │ - [ 2ade7] META │ │ - [ 2adec] DIRECT │ │ - [ 2adf3] bad variable type │ │ - [ 2ae05] sequential │ │ - [ 2ae10] DAFARW │ │ - [ 2ae17] The EK file # could not be loaded; the maximum number of loaded segments has already been reached. │ │ - [ 2ae7a] cttyps │ │ - [ 2ae81] NUM_CONJUNCTIONS │ │ - [ 2ae92] EKOPR │ │ - [ 2ae98] ftsum │ │ - [ 2ae9e] Handle # is not attached to an open DAS file. │ │ - [ 2aecc] SPICE(UNALLOCATEDNODE) │ │ - [ 2aee3] btprvd │ │ - [ 2aeea] LDPOOL │ │ - [ 2aef1] This error is never supposed to occur. No data was available for the variable '#'. │ │ - [ 2af45] The input kernel pool variable name exceeds the maximum allowed length of #1. The length of the variable name is #2, the offending variable name: '#3'. │ │ - [ 2afdd] DWPOOL │ │ - [ 2afe4] Length of output cell is #. Length required to contain result is #. │ │ - [ 2b029] Too many files open already. │ │ - [ 2b046] CLTEXT │ │ - [ 2b04d] The number # is not a recognized id-code for a reference frame. │ │ - [ 2b08e] rot │ │ - [ 2b092] THIRD │ │ - [ 2b098] NINTH │ │ - [ 2b09e] THOUSAND │ │ - [ 2b0a7] CONVRT: Output units │ │ - [ 2b0bd] convrt_ │ │ - [ 2b0c5] spks │ │ - [ 2b0ca] SPICE(DAFBEGGTEND) │ │ - [ 2b0dd] SPICE(UNKNOWNMETAITEM) │ │ - [ 2b0f4] SPICE(TYPEMISMATCH) │ │ - [ 2b108] SPICE(INVALIDARCHTYPE) │ │ - [ 2b11f] NAIF │ │ - [ 2b124] months │ │ - [ 2b12b] The central body radius was negative. It must be zero or positive. The value supplied was #. │ │ - [ 2b18a] Expansion degree must be non-negative but was #. │ │ - [ 2b1bb] Window size in type 18 segment was #; must be even for subtype 1 (Lagrange, 6-element packets). │ │ - [ 2b21b] SSIZEC │ │ - [ 2b222] dcosth │ │ - [ 2b229] TKFRAME_ │ │ - [ 2b232] #: The comparison operator '#' is not a recognized value. The recognized values are '<', '<=', '=', '=>', '>'. │ │ - [ 2b2a3] to routines that clear the kernel pool. │ │ - [ 2b2cc] SIZED │ │ - [ 2b2d2] WRLINE: An error occurred while attempting to open │ │ - [ 2b305] list output start │ │ - [ 2b317] EUL2XF │ │ - [ 2b31e] | │ │ - [ 2b322] ZZDAFGDR │ │ - [ 2b32b] Unable to locate file associated with HANDLE, #. The most likely cause of this is the file that you are trying to read has been closed. │ │ - [ 2b3b3] The file '#' is already connected to unit #. │ │ - [ 2b3e0] ftarc │ │ - [ 2b3e6] ZZDSKBSS │ │ - [ 2b3ef] At least one DSK file must have been loaded by ZZDSKLSF before a search can be started. │ │ - [ 2b447] stdskd │ │ - [ 2b44e] FRAME │ │ - [ 2b454] itmspc │ │ - [ 2b45b] SURFNM │ │ - [ 2b462] Velocity components of observer were: dx/dt = *, dy/dt = *, dz/dt = *. │ │ - [ 2b4aa] The kernel variable # has used to define frame # was expected to have integer data type but in fact has character type. Usually this type of problem is due to an error in a frame definition provided in a frame kernel. │ │ - [ 2b585] Number of join constraints was #; valid range is 0:# │ │ - [ 2b5ba] ordvec │ │ - [ 2b5c1] Number of rows must be positive; was #. │ │ - [ 2b5e9] SPICE(NOTINDEXED) │ │ - [ 2b5fb] EK = #; COLIDX = #; ROW = #; ELTIDX = #.Column entry element was not found. │ │ - [ 2b648] Attempted to read uninitialized column entry. SEGNO = #; COLUMN = #; RECNO = #; EK = # │ │ - [ 2b6a0] Data pointer is corrupted. SEGNO = #; COLUMN = #; RECNO = #; EK = # │ │ - [ 2b6e5] SPICE(STRINGTRUNCATED) │ │ - [ 2b6fc] ZZEKRD07 │ │ - [ 2b705] zzeksca_ │ │ - [ 2b70e] Base address # was #; valid range is 1:# │ │ - [ 2b737] IAU_PHOBOS │ │ - [ 2b742] EARTH_FIXED │ │ - [ 2b74e] IAU_DAVIDA │ │ - [ 2b759] ZZHSI │ │ - [ 2b75f] SOLAR_SYSTEM_BARYCENTER │ │ - [ 2b777] ELARA │ │ - [ 2b77d] CARME │ │ - [ 2b783] CALLIRRHOE │ │ - [ 2b78e] ORTHOSIE │ │ - [ 2b797] PASITHEE │ │ - [ 2b7a0] EUKELADE │ │ - [ 2b7a9] CYLLENE │ │ - [ 2b7b1] PIONEER-7 │ │ - [ 2b7bb] NEO SURVEYOR │ │ - [ 2b7c8] MARS ODYSSEY │ │ - [ 2b7d5] CAS │ │ - [ 2b7d9] CH1 │ │ - [ 2b7dd] MARS GLOBAL SURVEYOR │ │ - [ 2b7f2] MARS POLAR LANDER │ │ - [ 2b804] MARS_ORBITER_MISSION_2 │ │ - [ 2b81b] LUNAR-A │ │ - [ 2b823] KPLO │ │ - [ 2b828] PLANET-B │ │ - [ 2b831] STV53 │ │ - [ 2b837] ROSETTA │ │ - [ 2b83f] STEREO BEHIND │ │ - [ 2b84d] M96 │ │ - [ 2b851] SHOEMAKER-LEVY 9-M │ │ - [ 2b864] D'ARREST │ │ - [ 2b86d] ENCKE │ │ - [ 2b873] HOLMES │ │ - [ 2b87a] KOJIMA │ │ - [ 2b881] NEUJMIN 1 │ │ - [ 2b88b] NEUJMIN 3 │ │ - [ 2b895] 52 EUROPA │ │ - [ 2b89f] EURYBATES │ │ - [ 2b8a9] TE1 │ │ - [ 2b8ad] SPICE(TYPE1TEXTEK) │ │ - [ 2b8c0] At epoch # TDB (# TDB), there is insufficient information available to transform from reference frame # (@) to reference frame # (@). │ │ - [ 2b946] Frame # could be transformed to frame # (@). │ │ - [ 2b973] The ZZHASH2 function calculated a negative value for string $1. Contact NAIF. │ │ - [ 2b9c1] zzpini_ │ │ - [ 2b9c9] zzprscor_ │ │ - [ 2b9d3] The kernel pool does not have room for any more variables. It filled up at line # of the kernel file #. │ │ - [ 2ba3d] There is no room available for adding another character value to the kernel pool. The character values buffer became full at line # of the text kernel file '#'. │ │ - [ 2bae0] *Z* │ │ - [ 2bae4] There is no room available for adding another character value to the kernel pool. The character values buffer became full at line # of the text buffer. │ │ - [ 2bb7e] SCLK01_MODULI_ │ │ - [ 2bb8d] SCLK_PARTITION_END_ │ │ - [ 2bba1] ZZSGP4 │ │ - [ 2bba8] Satellite has decayed. │ │ - [ 2bbbf] JDUTC │ │ - [ 2bbc6] Either the leapsecond epochs taken from the kernel pool are not properly ordered or the UTC - TAI offsets are completely out of range. │ │ - [ 2bc4e] ZZSPKSB1 │ │ - [ 2bc57] ZZSWFXFM │ │ - [ 2bc60] usetim │ │ - [ 2bc67] The seconds component of '#' is out of range. Leapseconds can occur during the year # of the Julian calendar only in the second that immediately follows the time #:#:59 on # # and # #.' │ │ - [ 2bd23] Era │ │ - [ 2bd27] MON │ │ - [ 2bd2b] " │ │ - [ 2bd2d] The meaning of the integer <#> could not be determined: ' │ │ - [ 2bd67] i-Y/ │ │ - [ 2bd6c] i-idi:i:n │ │ - [ 2bd76] yY*H*M │ │ - [ 2bd7d] imi:nY │ │ - [ 2bd84] imn │ │ - [ 2bd88] mDH*M*SY │ │ - [ 2bd91] miii:i │ │ - [ 2bd98] mni │ │ - [ 2bd9c] Y-itn │ │ - [ 2bda2] Y*y*H*M*S* │ │ - [ 2bdad] The native binary file format of this toolkit build, #, is not currently supported for translation of integers from non-native formats. │ │ - [ 2be35] zh_WUU │ │ - [ 2be3c] ast │ │ - [ 2be40] avk │ │ - [ 2be44] ay │ │ - [ 2be47] bax │ │ - [ 2be4b] bik │ │ - [ 2be4f] bpy │ │ - [ 2be53] frc │ │ - [ 2be57] gbz │ │ - [ 2be5b] guc │ │ - [ 2be5f] hmn │ │ - [ 2be63] lkt │ │ - [ 2be67] mus │ │ - [ 2be6b] nov │ │ - [ 2be6f] nzi │ │ - [ 2be73] ota │ │ - [ 2be77] pal │ │ - [ 2be7b] pam │ │ - [ 2be7f] rap │ │ - [ 2be83] trv │ │ - [ 2be87] tyv │ │ - [ 2be8b] aym │ │ - [ 2be8f] som │ │ - [ 2be93] tam │ │ - [ 2be97] tuk │ │ - [ 2be9b] AQ │ │ - [ 2be9e] FK │ │ - [ 2bea1] RO │ │ - [ 2bea4] BFA │ │ - [ 2bea8] DJI │ │ - [ 2beac] NRU │ │ - [ 2beb0] SHN │ │ - [ 2beb4] SWZ │ │ - [ 2beb8] USA │ │ - [ 2bebc] VGB │ │ - [ 2bec0] BUR │ │ - [ 2bec4] en_GB │ │ - [ 2beca] hy_AM │ │ - [ 2bed0] lv_LV │ │ - [ 2bed6] Asia/Magadan │ │ - [ 2bee3] SAKST │ │ - [ 2bee9] Asia/Irkutsk │ │ - [ 2bef6] CLST │ │ - [ 2befb] Atlantic/Stanley │ │ - [ 2bf0c] US/Alaska │ │ - [ 2bf16] attribute │ │ - [ 2bf20] ar_JO │ │ - [ 2bf26] fr_CG │ │ - [ 2bf2c] nl_BE │ │ - [ 2bf32] ru_MD │ │ - [ 2bf38] tg_Cyrl_TJ │ │ - [ 2bf43] zh_MO │ │ - [ 2bf49] keyMap │ │ - [ 2bf50] art-lojban │ │ - [ 2bf5b] zh-min-nan │ │ - [ 2bf66] bzs │ │ - [ 2bf6a] mfs │ │ - [ 2bf6e] file-open │ │ - [ 2bf78] currency symbol │ │ - [ 2bf88] U_COLLATOR_VERSION_MISMATCH │ │ - [ 2bfa4] U_MALFORMED_SET │ │ - [ 2bfb4] U_MULTIPLE_ANTE_CONTEXTS │ │ - [ 2bfcd] U_MF_FORMATTING_ERROR │ │ - [ 2bfe3] U_REGEX_INVALID_RANGE │ │ - [ 2bff9] AFA │ │ - [ 2bffd] BBD │ │ - [ 2c001] BMD │ │ - [ 2c005] COU │ │ - [ 2c009] HRK │ │ - [ 2c00d] MWK │ │ - [ 2c011] NOK │ │ - [ 2c015] SRG │ │ - [ 2c019] UAH │ │ - [ 2c01d] decNumber 3.61 │ │ - [ 2c02c] M01L │ │ - [ 2c031] none │ │ - [ 2c036] pressure │ │ - [ 2c03f] bit │ │ - [ 2c043] decimeter │ │ - [ 2c04d] microgram │ │ - [ 2c057] meter-per-second │ │ - [ 2c068] deciliter │ │ - [ 2c072] currencyDecimal │ │ - [ 2c082] rules/ │ │ - [ 2c089] /case/ │ │ - [ 2c090] CurrencyUnitPatterns │ │ - [ 2c0a5] listPattern │ │ - [ 2c0b1] codeMappings │ │ - [ 2c0be] last secondary ignorable │ │ - [ 2c0d7] first primary ignorable │ │ - [ 2c0ef] AChoreographer_postFrameCallbackDelayed │ │ - [ 2c117] ()Ljava/lang/ClassLoader; │ │ - [ 2c131] java/io/File │ │ - [ 2c13e] %d │ │ - [ 2c141] eglGetSyncAttribKHR │ │ - [ 2c155] _Unwind_VRS_Get_Internal │ │ - [ 2c16e] celestia.cfg │ │ - [ 2c17b] negative width │ │ - [ 2c18a] FavoritesFile │ │ - [ 2c198] DemoScript │ │ - [ 2c1a3] Description │ │ - [ 2c1af] geographic │ │ - [ 2c1ba] chase │ │ - [ 2c1c0] Max texture size: %s\n │ │ - [ 2c1d6] Sync Orbit %s\n │ │ - [ 2c1e5] FOV: {} ({:.2f}x)\n │ │ - [ 2c1f8] Neutron star │ │ - [ 2c205] Density: {} kg/m�\n │ │ - [ 2c219] RA: {}h {:02}m {:.1f}s\n │ │ - [ 2c231] CHANNEL_AUX_9 │ │ - [ 2c23f] CHANNEL_AUX_23 │ │ - [ 2c24e] Connection refused │ │ - [ 2c261] Device not started │ │ - [ 2c274] Failed to initialize data supply for "%s". %s.\n │ │ - [ 2c2a4] AAudioStreamBuilder_setDataCallback │ │ - [ 2c2c8] Failed to commit capture PCM frames to ring buffer. │ │ - [ 2c2fc] Saturday │ │ - [ 2c305] gold │ │ - [ 2c30a] lavender │ │ - [ 2c313] orchid │ │ - [ 2c31a] steelblue │ │ - [ 2c324] {:0<{}} │ │ - [ 2c32f] minormoons │ │ - [ 2c33a] equatorialgrid │ │ - [ 2c349] Moon │ │ - [ 2c34e] fossa │ │ - [ 2c354] lingula │ │ - [ 2c35c] colorbottomleft │ │ - [ 2c36c] [UserCategory:{}] │ │ - [ 2c37e] setaudionopause │ │ - [ 2c38e] Arguments to celestia:show() must be strings │ │ - [ 2c3bb] One argument expected for celestia:setlabelflags() │ │ - [ 2c3ee] Values in table-argument to celestia:setorbitflags() must be boolean │ │ - [ 2c433] No arguments expected for celestia:getobservers() │ │ - [ 2c465] One argument expected for celestia:windowbordersvisible │ │ - [ 2c49d] Fifth argument to celestia:play must be a string (filename) │ │ - [ 2c4d9] 1.7.0 │ │ - [ 2c4df] Argument to celestia:loadfont() must be a string │ │ - [ 2c510] Error setting metatable for │ │ - [ 2c52d] class_observer │ │ - [ 2c53c] gettargetobject │ │ - [ 2c54c] First argument to font:gettextwidth must be a string │ │ - [ 2c581] moon │ │ - [ 2c586] bolometricMagnitude │ │ - [ 2c59a] HD │ │ - [ 2c59d] Fifth arg to observer:goto must be a number │ │ - [ 2c5c9] Two or three arguments required for lookat │ │ - [ 2c5f4] One argument required for observer:setspeed() │ │ - [ 2c622] vectorto │ │ - [ 2c62b] Addition only defined for two rotations │ │ - [ 2c653] __pow │ │ - [ 2c659] Subtraction only defined for two vectors │ │ - [ 2c682] Could not read model header\n │ │ - [ 2c69f] specpower {}\n │ │ - [ 2c6ad] uranus-sun │ │ - [ 2c6b8] jpl-emb-sun │ │ - [ 2c6c4] jpl-moon-earth │ │ - [ 2c6d3] iau-phoebe │ │ - [ 2c6de] CMi │ │ - [ 2c6e2] Cam │ │ - [ 2c6e6] Cep │ │ - [ 2c6ea] Nor │ │ - [ 2c6ee] Peg │ │ - [ 2c6f2] UMi │ │ - [ 2c6f6] Loaded {} deep space objects\n │ │ - [ 2c714] E5 │ │ - [ 2c717] GL_EXT_geometry_shader │ │ - [ 2c72e] AA │ │ - [ 2c731] RI │ │ - [ 2c734] SA │ │ - [ 2c737] DO │ │ - [ 2c73a] Object has incorrect scripted orbit syntax.\n │ │ - [ 2c767] Bounding Radius missing from SPICE orbit\n │ │ - [ 2c791] SampledTrajectory is missing a source.\n │ │ - [ 2c7b9] Interpolation │ │ - [ 2c7c7] SemiMajorAxis/PericenterDistance missing from orbit definition.\n │ │ - [ 2c808] Function name missing from scripted rotation definition.\n │ │ - [ 2c842] Bad two-vector frame: axes for vectors are collinear.\n │ │ - [ 2c879] +y │ │ - [ 2c87c] shadowMapSize │ │ - [ 2c88a] RGB{}{}{} │ │ - [ 2c894] depth │ │ - [ 2c89a] shadowDepths │ │ - [ 2c8a7] shadowR │ │ - [ 2c8af] ));\n │ │ - [ 2c8b4] gl_FragColor = vec4(color.rgb * diff.rgb, opticalDepth);\n │ │ - [ 2c8ee] normal = in_Normal;\n │ │ - [ 2c907] // shadow count: │ │ - [ 2c919] light{}_{} │ │ - [ 2c924] shadowCenter.s = dot(vec4(position, 1.0), │ │ - [ 2c94f] in_Intensity │ │ - [ 2c95c] lines │ │ - [ 2c962] Replace │ │ - [ 2c96a] Orbit frame for '{}' is nested too deep (probably circular)\n │ │ - [ 2c9a7] DB │ │ - [ 2c9aa] VirtualTexture │ │ - [ 2c9b9] Failed to read texture coord array count\n │ │ - [ 2c9e3] space/celestia/celestia/Body │ │ - [ 2ca00] (I)V │ │ - [ 2ca05] Dwarf Planets │ │ - [ 2ca13] eglInitialize() returned error %d │ │ - [ 2ca35] unknown format specifier │ │ - [ 2ca4e] r │ │ - [ 2ca50] Bogus buffer control mode │ │ - [ 2ca6a] Input file read error │ │ - [ 2ca80] JPEG datastream contains no image │ │ - [ 2caa2] Caution: quantization tables are too coarse for baseline JPEG │ │ - [ 2cae0] JFIF APP0 marker: version %d.%02d, density %dx%d %d │ │ - [ 2cb15] Miscellaneous marker 0x%02x, length %u │ │ - [ 2cb3c] type42 │ │ - [ 2cb43] CIDMapOffset │ │ - [ 2cb50] CHARSET_REGISTRY │ │ - [ 2cb61] BDF │ │ - [ 2cb65] FONT │ │ - [ 2cb6a] SUPERSCRIPT_SIZE │ │ - [ 2cb7b] VVector │ │ - [ 2cb83] method │ │ - [ 2cb8a] "%s":%d │ │ - [ 2cb92] (binary) │ │ - [ 2cb9b] stdin │ │ - [ 2cba1] stderr │ │ - [ 2cba8] file (%p) │ │ - [ 2cbb2] *t │ │ - [ 2cbb5] ./?.so;/usr/local/lib/lua/5.1/?.so;/home/vagrant/build/apple-android/LuaJIT-87ae18af97fd4de790bb6c476b212e047689cc93/output/lib/lua/5.1/?.so;/usr/local/lib/lua/5.1/loadall.so │ │ - [ 2cc64] call │ │ - [ 2cc69] line │ │ - [ 2cc6e] arm │ │ - [ 2cc72] insufficient memory │ │ - [ 2cc86] Image height is zero in IHDR │ │ - [ 2cca3] too short │ │ - [ 2ccad] png_get_eXIf does not work; use png_get_eXIf_1 │ │ - [ 2ccdc] png_image_finish_read[color-map]: no color-map │ │ - [ 2cd0b] bad background index (internal error) │ │ - [ 2cd31] invalid screen gamma in png_set_gamma │ │ - [ 2cd57] invalid error action to rgb_to_gray │ │ - [ 2cd7b] invalid unit │ │ - [ 2cd88] Invalid sCAL height │ │ - [ 2cd9c] png_image_write_to_memory: invalid argument │ │ - [ 2cdc8] no color-map for color-mapped image │ │ - [ 2cdec] eqstr_c │ │ - [ 2cdf4] SPICE(DATEEXPECTED) │ │ - [ 2ce08] Invalid Cluster Number -- Cluster Numbers Must Exceed 1 │ │ - [ 2ce41] The Elements Must Be Distinct │ │ - [ 2ce5f] No Further Symbols Can be Inserted; the Pointer Table is Full │ │ - [ 2ce9d] SPICE(ZERORADIUS) │ │ - [ 2ceaf] itins │ │ - [ 2ceb5] itub │ │ - [ 2ceba] SUSPEND │ │ - [ 2cec2] DAFOPW │ │ - [ 2cec9] SPICE(DAFNORESV) │ │ - [ 2ceda] SPICE(DAFNOSUCHHANDLE) │ │ - [ 2cef1] DAF not open for write. Handle = #, file = '#' │ │ - [ 2cf21] can't stat file │ │ - [ 2cf31] out of free space │ │ - [ 2cf43] can't append to file │ │ - [ 2cf58] non-positive record number │ │ - [ 2cf73] (unnamed) %s\n │ │ - [ 2cf81] apparent state: internal I/O\n │ │ - [ 2cf9f] MAKE_SEGMENT_TABLE_ENTRY │ │ - [ 2cfb8] * │ │ - [ 2cfba] SPICE(BUG) │ │ - [ 2cfc5] cbegs │ │ - [ 2cfcb] otabs │ │ - [ 2cfd1] DASOPS │ │ - [ 2cfd8] DASLUH │ │ - [ 2cfdf] SPICE(DASFILEWRITEFAILED) │ │ - [ 2cff9] SPICE(OUTOFRANGE) │ │ - [ 2d00b] poolc │ │ - [ 2d011] ) │ │ - [ 2d014] SPICE(TOOMANYWATCHES) │ │ - [ 2d02a] CHGIRF │ │ - [ 2d031] An unexpected sign character was found in the input string. │ │ - [ 2d06e] nparsd_ │ │ - [ 2d076] CKE01 │ │ - [ 2d07c] ckr02_ │ │ - [ 2d083] Segment descriptor indicates angular velocity data are not available, but such data were requested. │ │ - [ 2d0e7] Output argument has declared length #; required length is #. Input tick value was #. │ │ - [ 2d13c] sigerr_c │ │ - [ 2d145] The file '#' is already open. │ │ - [ 2d163] ctarg │ │ - [ 2d169] trans2 │ │ - [ 2d170] dpbegl │ │ - [ 2d177] SPICE(SPKTYPENOTSUPP) │ │ - [ 2d18d] Step size was zero. │ │ - [ 2d1a1] You are attempting to locate type * data in a type 18 data segment. │ │ - [ 2d1e5] SPKR19 │ │ - [ 2d1ec] tipm │ │ - [ 2d1f1] xdtipm │ │ - [ 2d1f8] Storage for # double precision numbers is needed for a PCK data record and only # locations were available. Notify the NAIF group of this problem. │ │ - [ 2d28b] SPICE(BADFRAMESPEC2) │ │ - [ 2d2a0] _AXES │ │ - [ 2d2a6] UNIONC │ │ - [ 2d2ad] %#.*f │ │ - [ 2d2b3] xposbl_ │ │ - [ 2d2bb] ZZDASGRI │ │ - [ 2d2c4] zzddhman_ │ │ - [ 2d2ce] SPICE(FILEOPENFAIL) │ │ - [ 2d2e2] # SCRATCH FILE │ │ - [ 2d2f1] ZZDDHCLS │ │ - [ 2d2fa] ZZDDHPPF │ │ - [ 2d303] Must begin a search by calling ZZDSKBSS first. │ │ - [ 2d332] Kernel variable # was expected to be present in the kernel pool but was not found. The alternative form of kernel variable name FRAME_#_# was not searched for because this name has excessive length (# characters vs allowed maximum of #). One of these variables is needed to define the reference frame #. Usually this type of problem is due to a missing keyword assignment in a frame kernel. Another, less likely, possibility is that other errors in a frame kernel have confused the frame subsystem into wrongly deciding these variables are needed. │ │ - [ 2d55a] Definition of frame # specifies precession model #, which is not recognized. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 2d605] s2 │ │ - [ 2d608] Definition of product parameterized dynamic frame # has # "from" frames and # "to" frames. These counts must match. │ │ - [ 2d67c] PRSINT │ │ - [ 2d683] iorder │ │ - [ 2d68a] STLABX │ │ - [ 2d691] The number of constraints was #; valid range is 0:# │ │ - [ 2d6c5] ZZEKLLTI │ │ - [ 2d6ce] Table index # is out of valid range 1:#. │ │ - [ 2d6f7] ZZEKECMP │ │ - [ 2d700] DP page = #; valid range is [1:#] │ │ - [ 2d722] ZZEKSRD │ │ - [ 2d72a] IAU_PANDORA │ │ - [ 2d736] IAU_IDA │ │ - [ 2d73e] IAU_LUTETIA │ │ - [ 2d74a] IAU_EURYBATES_BARYCENTER │ │ - [ 2d763] MARS │ │ - [ 2d768] KALYKE │ │ - [ 2d76f] FORNJOT │ │ - [ 2d777] OPHELIA │ │ - [ 2d77f] ROSALIND │ │ - [ 2d788] VEGA 1 │ │ - [ 2d78f] SPITZER │ │ - [ 2d797] NEW HORIZONS │ │ - [ 2d7a4] MOM2 │ │ - [ 2d7a9] SELENE │ │ - [ 2d7b0] EURC │ │ - [ 2d7b5] CLUSTER 4 │ │ - [ 2d7bf] MMX │ │ - [ 2d7c3] BRORSEN-METCALF │ │ - [ 2d7d3] HARTLEY 1 │ │ - [ 2d7dd] NEUJMIN 2 │ │ - [ 2d7e7] ITOKAWA │ │ - [ 2d7ef] PATROCLUS_BARYCENTER │ │ - [ 2d804] DIDYMOS │ │ - [ 2d80c] USUDA │ │ - [ 2d812] DSS-26 │ │ - [ 2d819] DSS-49 │ │ - [ 2d820] DSS-55 │ │ - [ 2d827] Value of IOSTAT was *. │ │ - [ 2d83e] ZZHASH │ │ - [ 2d845] $1 │ │ - [ 2d848] ZZHASH2 │ │ - [ 2d850] zzrefch1_ │ │ - [ 2d85a] The month specified was #. The month must be an integer in the range from 1 to 12 (inclusive). │ │ - [ 2d8bb] Encountered '#' while attempting to parse a time on line # of the text buffer. │ │ - [ 2d90b] XXSGP4E │ │ - [ 2d913] baslst │ │ - [ 2d91a] SPICE(TIMECONFLICT) │ │ - [ 2d92e] +. │ │ - [ 2d931] BC │ │ - [ 2d934] CST │ │ - [ 2d938] The string possesses calendar components in addition to Julian Date specifier. │ │ - [ 2d988] Y-i/i:n │ │ - [ 2d990] Y-idi:i:n │ │ - [ 2d99a] Y-iti:i │ │ - [ 2d9a2] Yiii:i:n │ │ - [ 2d9ab] i-i/i:i:i │ │ - [ 2d9b5] i-it │ │ - [ 2d9ba] iidi:n │ │ - [ 2d9c1] mii:iY │ │ - [ 2d9c8] i/i/ii:i │ │ - [ 2d9d1] i:i:ni-i-Y │ │ - [ 2d9dc] i-i-Y │ │ - [ 2d9e2] yi │ │ - [ 2d9e5] anp │ │ - [ 2d9e9] ceb │ │ - [ 2d9ed] doi │ │ - [ 2d9f1] fy │ │ - [ 2d9f4] gmh │ │ - [ 2d9f8] hif │ │ - [ 2d9fc] hup │ │ - [ 2da00] lu │ │ - [ 2da03] maf │ │ - [ 2da07] no │ │ - [ 2da0a] phn │ │ - [ 2da0e] seh │ │ - [ 2da12] si │ │ - [ 2da15] sk │ │ - [ 2da18] sn │ │ - [ 2da1b] sr │ │ - [ 2da1e] vai │ │ - [ 2da22] xal │ │ - [ 2da26] xh │ │ - [ 2da29] fry │ │ - [ 2da2d] hrv │ │ - [ 2da31] lim │ │ - [ 2da35] sqi │ │ - [ 2da39] AT │ │ - [ 2da3c] GQ │ │ - [ 2da3f] TD │ │ - [ 2da42] ESP │ │ - [ 2da46] ITA │ │ - [ 2da4a] JOR │ │ - [ 2da4e] MRT │ │ - [ 2da52] NGA │ │ - [ 2da56] SDN │ │ - [ 2da5a] SMR │ │ - [ 2da5e] af_ZA │ │ - [ 2da64] id_ID │ │ - [ 2da6a] vi_VN │ │ - [ 2da70] NZDT │ │ - [ 2da75] IRKT │ │ - [ 2da7a] HOVT │ │ - [ 2da7f] NOVST │ │ - [ 2da85] AZST │ │ - [ 2da8a] IST │ │ - [ 2da8e] CET │ │ - [ 2da92] Africa/El_Aaiun │ │ - [ 2daa2] XA │ │ - [ 2daa5] XC │ │ - [ 2daa8] likely │ │ - [ 2daaf] en_UM │ │ - [ 2dab5] es_UY │ │ - [ 2dabb] bs_Latn │ │ - [ 2dac3] sr_Latn_RS │ │ - [ 2dace] pap_AN │ │ - [ 2dad5] ro_MD │ │ - [ 2dadb] gsg │ │ - [ 2dadf] metaZones │ │ - [ 2dae9] ucol_swap(formatVersion=4): unknown data at IX_RESERVED18_OFFSET\n │ │ - [ 2db2b] ucnv_close │ │ - [ 2db36] ucol_getLocale │ │ - [ 2db45] calendar │ │ - [ 2db4e] zone-short │ │ - [ 2db59] fw │ │ - [ 2db5c] loose │ │ - [ 2db62] modifier letter │ │ - [ 2db72] format │ │ - [ 2db79] private use area │ │ - [ 2db8a] dash punctuation │ │ - [ 2db9b] U_INVALID_FORMAT_ERROR │ │ - [ 2dbb2] U_MULTIPLE_PERCENT_SYMBOLS │ │ - [ 2dbcd] BZD │ │ - [ 2dbd1] LRD │ │ - [ 2dbd5] ROL │ │ - [ 2dbd9] STN │ │ - [ 2dbdd] USD │ │ - [ 2dbe1] YUM │ │ - [ 2dbe5] Rounded │ │ - [ 2dbed] @calendar=roc │ │ - [ 2dbfb] g-force │ │ - [ 2dc03] radian │ │ - [ 2dc0a] ampere │ │ - [ 2dc11] grain │ │ - [ 2dc17] exponential │ │ - [ 2dc23] Narrow │ │ - [ 2dc2a] Short │ │ - [ 2dc30] fields/day/relative │ │ - [ 2dc44] territoryContainment │ │ - [ 2dc59] fetching root CEs for tailored string │ │ - [ 2dc7f] reset-before strength followed by a stronger relation │ │ - [ 2dcb5] expected language tag in [import langTag] │ │ - [ 2dcdf] delimiters │ │ - [ 2dcea] com/google/androidgamesdk/ChoreographerCallback │ │ - [ 2dd1a] swappy.disable │ │ - [ 2dd29] DISPLAY │ │ - [ 2dd31] Star style: scaled discs │ │ - [ 2dd4a] Resume │ │ - [ 2dd51] Light travel time: {} min {:.1f} s │ │ - [ 2dd76] Light travel delay switched off │ │ - [ 2dd96] Ambient light level: {:.2f} │ │ - [ 2ddb3] perspective │ │ - [ 2ddbf] DejaVuSans.ttf,12 │ │ - [ 2ddd1] vector │ │ - [ 2ddd8] ViewportEffect │ │ - [ 2dde7] SkipExtras │ │ - [ 2ddf2] ecliptical │ │ - [ 2ddfd] invalid format specifier for char │ │ - [ 2de1f] km/s │ │ - [ 2de24] Radius: %s\n │ │ - [ 2de30] Error reading cross index {}\n │ │ - [ 2de4e] CHANNEL_FRONT_CENTER │ │ - [ 2de63] CHANNEL_TOP_FRONT_LEFT │ │ - [ 2de7a] No data available │ │ - [ 2de8c] Protocol not supported │ │ - [ 2dea3] 24-bit Signed Integer (Tightly Packed) │ │ - [ 2deca] Failed to init miniaudio context │ │ - [ 2deeb] DirectSound │ │ - [ 2def7] SL_IID_RECORD │ │ - [ 2df05] ds64 │ │ - [ 2df0a] URL must start with "{}"!\n │ │ - [ 2df25] {:04}-{:02}-{:02}T{:02}:{:02}:{:08.5f}Z │ │ - [ 2df4d] Tue │ │ - [ 2df51] Wed │ │ - [ 2df55] Wednesday │ │ - [ 2df5f] darkorange │ │ - [ 2df6a] darkorchid │ │ - [ 2df75] indianred │ │ - [ 2df7f] lightsalmon │ │ - [ 2df8b] moccasin │ │ - [ 2df94] navajowhite │ │ - [ 2dfa0] papayawhip │ │ - [ 2dfab] violet │ │ - [ 2dfb2] .dsc │ │ - [ 2dfb7] 0{}{:0<{}}{} │ │ - [ 2dfc4] NUL │ │ - [ 2dfc8] HOME │ │ - [ 2dfcd] Psi │ │ - [ 2dfd1] colles │ │ - [ 2dfd8] sinus │ │ - [ 2dfde] singleview │ │ - [ 2dfe9] pan │ │ - [ 2dfed] position │ │ - [ 2dff6] high │ │ - [ 2dffb] label │ │ - [ 2e001] top │ │ - [ 2e005] setscreendpi │ │ - [ 2e012] getsafeareainsets │ │ - [ 2e024] getoverlayelements │ │ - [ 2e037] getrootcategories │ │ - [ 2e049] First argument to celestia:print must be a string │ │ - [ 2e07b] No arguments expected for celestia:getaltazimuthmode() │ │ - [ 2e0b2] Argument to celestia:setlayoutdirection must be a string │ │ - [ 2e0eb] Argument to celestia:setoverlayelements() must be a table │ │ - [ 2e125] No arguments expected to celestia:getselection() │ │ - [ 2e156] Value passed to celestia:paused must be boolean │ │ - [ 2e186] invalid starstyle │ │ - [ 2e198] Fifth arg to celestia:tojulianday must be a number │ │ - [ 2e1cb] Wrong number of arguments to function celestia:fromjulianday │ │ - [ 2e208] No argument expected for celestia:requestsystemaccess() │ │ - [ 2e240] One argument expected for celestia:registereventhandler │ │ - [ 2e278] Fourth argument to celestia:playaudio must be a number │ │ - [ 2e2af] First argument for celestia:pauseaudio must be a number │ │ - [ 2e2e7] borderclamp │ │ - [ 2e2f3] Position or rotation expected as second argument to frame:to() │ │ - [ 2e332] argument 2 to gl.Frustum must be a number │ │ - [ 2e35c] Six arguments expected for gl.Ortho2D() │ │ - [ 2e384] getmaxascent │ │ - [ 2e391] addreferencemark │ │ - [ 2e3a2] addtocategory │ │ - [ 2e3b0] Invalid number of arguments in object:removereferencemark │ │ - [ 2e3ea] Argument to object:addtocategory() must be string or userdata │ │ - [ 2e428] One to five arguments expected to observer:goto │ │ - [ 2e458] Argument to goto must be a table │ │ - [ 2e479] Second arg to observer:center must be a number │ │ - [ 2e4a8] First argument to observer:chase must be an object │ │ - [ 2e4db] One argument required for phase:getorientation │ │ - [ 2e50a] gety │ │ - [ 2e50f] One argument expected to position:vectorto │ │ - [ 2e53a] transform │ │ - [ 2e544] Bad rotation multiplication! │ │ - [ 2e561] specular │ │ - [ 2e56a] vertices │ │ - [ 2e573] texture0 "{}"\n │ │ - [ 2e582] emissivemap "{}"\n │ │ - [ 2e594] position │ │ - [ 2e59e] color1 │ │ - [ 2e5a6] texcoord0 │ │ - [ 2e5b1] jpl-mars-sun │ │ - [ 2e5be] vsop87-saturn │ │ - [ 2e5cc] phoebe │ │ - [ 2e5d3] jpl-uranus-sun │ │ - [ 2e5e2] iau-uranus │ │ - [ 2e5ed] iau-saturn │ │ - [ 2e5f8] iau-amalthea │ │ - [ 2e605] Cap │ │ - [ 2e609] Cet │ │ - [ 2e60d] Her │ │ - [ 2e611] LMi │ │ - [ 2e615] Vul │ │ - [ 2e619] S0 │ │ - [ 2e61c] SBc │ │ - [ 2e620] x0 │ │ - [ 2e623] Model statistics: {} vertices, {} primitives, {} materials ({} unique)\n │ │ - [ 2e66e] Negative eccentricity is invalid.\n │ │ - [ 2e691] PericenterDistance │ │ - [ 2e6a4] Center object '{}' of reference frame not found.\n │ │ - [ 2e6d6] deg │ │ - [ 2e6da] shadowTexCoord0 = ShadowMatrix0 * vec4(in_Position.xyz, 1.0);\n │ │ - [ 2e719] ;\n │ │ - [ 2e71c] NL │ │ - [ 2e71f] gl_FragColor += texture2D(emissiveTex, │ │ - [ 2e747] diffTex │ │ - [ 2e74f] extinctionCoeff │ │ - [ 2e75f] light{}_brightness │ │ - [ 2e772] qq = dot(atmSamplePointSun, atmSamplePointSun) - atmosphereRadius.y;\n │ │ - [ 2e7bc] Failed to create error shader!\n │ │ - [ 2e7dc] lines_adjacency │ │ - [ 2e7ec] Add │ │ - [ 2e7f0] Error: Timeline must be an array\n │ │ - [ 2e812] OrbitFrame │ │ - [ 2e81d] Beginning time must be before Ending time.\n │ │ - [ 2e849] Error: missing orbit in timeline phase.\n │ │ - [ 2e872] Albedo │ │ - [ 2e879] Orientation │ │ - [ 2e885] 0 │ │ - [ 2e887] 7 │ │ - [ 2e889] invalid filename in Mesh │ │ - [ 2e8a2] BaseSplit in virtual texture missing or has bad value\n │ │ - [ 2e8d9] Failed to read entry {} of material group face array\n │ │ - [ 2e90f] Error reading ColorFloat RGB values │ │ - [ 2e933] space/celestia/celestia/Location │ │ - [ 2e954] ()I │ │ - [ 2e958] UTF-8 │ │ - [ 2e95e] Bogus JPEG colorspace │ │ - [ 2e974] Buffer passed to JPEG library is too small │ │ - [ 2e99f] Fractional sampling not implemented yet │ │ - [ 2e9c7] Maximum supported image dimension is %u pixels │ │ - [ 2e9f6] Premature end of input file │ │ - [ 2ea12] Quantization table 0x%02x was not defined │ │ - [ 2ea3c] Image too wide for this implementation │ │ - [ 2ea63] glyph-dict │ │ - [ 2ea6e] darkening-parameters │ │ - [ 2ea83] Slant │ │ - [ 2ea89] FSType │ │ - [ 2ea90] ForceBold │ │ - [ 2ea9a] Private │ │ - [ 2eaa2] RAW_MAX_SPACE │ │ - [ 2eab0] RAW_MIN_SPACE │ │ - [ 2eabe] SMALL_CAP_SIZE │ │ - [ 2ead0] � │ │ - [ 2ead8] � │ │ - [ 2eae0] � │ │ - [ 2eae5] autofitter │ │ - [ 2eaf0] bsdf │ │ - [ 2eaf5] overlaps │ │ - [ 2eafe] [builtin: │ │ - [ 2eb08] next │ │ - [ 2eb0d] luaJIT_BC_%s │ │ - [ 2eb1c] no field package.preload['%s'] │ │ - [ 2eb3b] cdata<%s>: %p │ │ - [ 2eb49] bad adaptive filter value │ │ - [ 2eb63] png_image_read: opaque pointer not NULL │ │ - [ 2eb8b] rgb[gray] color-map: too few entries │ │ - [ 2ebb0] Can't discard critical data on CRC error │ │ - [ 2ebd9] invalid window size (libpng) │ │ - [ 2ebf6] invalid gray level │ │ - [ 2ec09] invalid color │ │ - [ 2ec17] cHRM Green X │ │ - [ 2ec24] png_write_image: internal call error │ │ - [ 2ec49] Invalid cell cardinality; cardinality exceeds cell size. The cardinality was #. The size was #. │ │ - [ 2ecad] LONG │ │ - [ 2ecb2] A blank string was used as a module name │ │ - [ 2ecdb] An Attempt to Write a File Failed │ │ - [ 2ecfd] SPICE(INVALIDTIMESTRING) │ │ - [ 2ed16] ftlnk │ │ - [ 2ed1c] SPICE(DAFNOSUCHUNIT) │ │ - [ 2ed31] DAFHFN │ │ - [ 2ed38] DAFFPA │ │ - [ 2ed3f] SPICE(DAFILLEGWRITE) │ │ - [ 2ed54] frmtab │ │ - [ 2ed5b] rbas │ │ - [ 2ed60] activc │ │ - [ 2ed67] selctp │ │ - [ 2ed6e] DASOPR │ │ - [ 2ed75] btlb │ │ - [ 2ed7a] SPICE(AGENTLISTOVERFLOW) │ │ - [ 2ed93] GDPOOL │ │ - [ 2ed9a] PIPOOL │ │ - [ 2eda1] MAXAGT │ │ - [ 2eda8] INSLAC │ │ - [ 2edaf] kclsid │ │ - [ 2edb6] REPSUB error: RIGHT (#) must not exceed length of IN (#). │ │ - [ 2edf0] chgirf_ │ │ - [ 2edf8] bases │ │ - [ 2edfe] Array size must be positive; was #. │ │ - [ 2ee22] CKE03 │ │ - [ 2ee28] Unexpected CK type 6 subtype # found in type 06 segment within mini-segment #. │ │ - [ 2ee77] The range of packets requested extends beyond the available packet data. The packet data is available for indexes 1 to #. You've requested data from # to #. │ │ - [ 2ef17] sgfrvi_ │ │ - [ 2ef1f] The string supplied to specify the reference frame is blank. The most common cause for this kind of error is an uninitialized variable. │ │ - [ 2efa9] spkgeo_ │ │ - [ 2efb1] spke01_ │ │ - [ 2efb9] SPICE(BADRADIUS) │ │ - [ 2efca] SPICE(BADINITSTATE) │ │ - [ 2efde] spke18_ │ │ - [ 2efe6] body-fixed frame associated with the ID code │ │ - [ 2f013] _SPEC │ │ - [ 2f019] zzbodker_ │ │ - [ 2f023] Could not add name # to the hash. │ │ - [ 2f045] strbff │ │ - [ 2f04c] ZZDDHUNL │ │ - [ 2f055] The unit table is full and all entries are locked. This should never happen. Contact NAIF. │ │ - [ 2f0b1] Kernel variable FRAME_#_# has length #; kernel variable FRAME_#_# has length #; maximum allowed length is #. Neither variable could be searched for in the kernel pool due to these name length errors. │ │ - [ 2f17a] ABCORR │ │ - [ 2f181] itmtrg │ │ - [ 2f188] itmlat │ │ - [ 2f18f] MEAN_EQUATOR_AND_EQUINOX_OF_DATE │ │ - [ 2f1b0] Definition of frame #, which belongs to parameterized dynamic frame family #, contains neither # nor # keywords; frames in this family require exactly one of these in their frame definitions. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 2f2ce] EPOCH │ │ - [ 2f2d4] Product of length of scaled axis #* and size of corresponding scaled component of POSITN is > *; these values may cause numeric overflow. │ │ - [ 2f35e] bestpt │ │ - [ 2f365] Substring bounds must be in range [1,#]. Actual range [BPOS,EPOS] was [#,#]. │ │ - [ 2f3b2] locact │ │ - [ 2f3b9] NUM_CONSTRAINTS │ │ - [ 2f3c9] Class # from input column descriptor is not a supported character class. COLUMN = #; RECNO = #; SEGNO = #; EK = #. │ │ - [ 2f43d] ZZEKPGAN │ │ - [ 2f446] ZZEKPGWI │ │ - [ 2f44f] Column # is of type #; ZZEKRSI only works with integer columns. RECNO = #; SEGNO = #; EK = #. │ │ - [ 2f4ae] Number of join row sets was #; valid range is 1:# │ │ - [ 2f4e0] IAU_HIMALIA │ │ - [ 2f4ec] IAU_ANANKE │ │ - [ 2f4f7] IAU_DESDEMONA │ │ - [ 2f505] IAU_MEGACLITE │ │ - [ 2f513] ZZFRMCH1 │ │ - [ 2f51c] The reference frame # has class #. This form of reference frame is not supported in version # of ZZFRMGT1. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ - [ 2f5ea] ZZHSIINI │ │ - [ 2f5f3] OBERON │ │ - [ 2f5fa] THALASSA │ │ - [ 2f603] HYDRA │ │ - [ 2f609] PIONEER-6 │ │ - [ 2f613] VK2 │ │ - [ 2f617] NEOS │ │ - [ 2f61c] MERCURY MAGNETOSPHERIC ORBITER │ │ - [ 2f63b] MARS SCIENCE LABORATORY │ │ - [ 2f653] MARS CLIMATE ORBITER │ │ - [ 2f668] HAYABUSA │ │ - [ 2f671] M2020 │ │ - [ 2f677] JWST │ │ - [ 2f67c] JAMES WEBB SPACE TELESCOPE │ │ - [ 2f697] MAVEN │ │ - [ 2f69d] LICIA │ │ - [ 2f6a3] SHOEMAKER-LEVY 9-K │ │ - [ 2f6b6] SHOEMAKER 3 │ │ - [ 2f6c2] TEMPEL 1 │ │ - [ 2f6cb] SHOEMAKER-LEVY 9 │ │ - [ 2f6dc] DSS-33 │ │ - [ 2f6e3] DSS-46 │ │ - [ 2f6ea] ZZPINI │ │ - [ 2f6f1] conv │ │ - [ 2f6f6] m. │ │ - [ 2f6f9] [s] │ │ - [ 2f6fd] 'i │ │ - [ 2f700] ,/-:d. │ │ - [ 2f707] i:i:i:n │ │ - [ 2f70f] dinmon │ │ - [ 2f716] SPICE(UNKNOWNMODE) │ │ - [ 2f729] ZZSPKEZ0 │ │ - [ 2f732] zzspkez0_ │ │ - [ 2f73c] ZZSPKGO0 │ │ - [ 2f745] # is not a legitimate time zone specification. │ │ - [ 2f775] The output string is not long enough to accommodate a number formatted according to the supplied format picture. The output string has length #. The output picture '#' requires # characters. │ │ - [ 2f835] pbegs │ │ - [ 2f83b] "Year Abbreviation Mark" │ │ - [ 2f854] Right Parenthesis │ │ - [ 2f866] Wkd │ │ - [ 2f86a] ampm │ │ - [ 2f86f] Two substrings indicating a day of month were identified in the input time string <#> and <#>: " │ │ - [ 2f8d0] Yimi:i │ │ - [ 2f8d7] i:nmiY │ │ - [ 2f8de] mDYH │ │ - [ 2f8e3] imi:iY │ │ - [ 2f8ea] miYn │ │ - [ 2f8ef] ady │ │ - [ 2f8f3] cch │ │ - [ 2f8f7] chb │ │ - [ 2f8fb] dz │ │ - [ 2f8fe] ebu │ │ - [ 2f902] fa │ │ - [ 2f905] hit │ │ - [ 2f909] jam │ │ - [ 2f90d] kn │ │ - [ 2f910] mdf │ │ - [ 2f914] mos │ │ - [ 2f918] nqo │ │ - [ 2f91c] pag │ │ - [ 2f920] qu │ │ - [ 2f923] sba │ │ - [ 2f927] te │ │ - [ 2f92a] tem │ │ - [ 2f92e] tog │ │ - [ 2f932] vro │ │ - [ 2f936] ybb │ │ - [ 2f93a] za │ │ - [ 2f93d] bel │ │ - [ 2f941] bam │ │ - [ 2f945] bod │ │ - [ 2f949] uzb │ │ - [ 2f94d] wol │ │ - [ 2f951] IQ │ │ - [ 2f954] MR │ │ - [ 2f957] NE │ │ - [ 2f95a] NG │ │ - [ 2f95d] CZE │ │ - [ 2f961] FLK │ │ - [ 2f965] GAB │ │ - [ 2f969] HTI │ │ - [ 2f96d] IND │ │ - [ 2f971] MMR │ │ - [ 2f975] nb_NO │ │ - [ 2f97b] pt_BR │ │ - [ 2f981] ru_RU │ │ - [ 2f987] script │ │ - [ 2f98e] YAKT │ │ - [ 2f993] Europe/Moscow │ │ - [ 2f9a1] Europe/Dublin │ │ - [ 2f9af] UYT │ │ - [ 2f9b3] US/Mountain │ │ - [ 2f9bf] HADT │ │ - [ 2f9c4] ar_EG │ │ - [ 2f9ca] chr_US │ │ - [ 2f9d1] en_BZ │ │ - [ 2f9d7] sr_Latn_ME │ │ - [ 2f9e2] nn_NO │ │ - [ 2f9e8] oc_FR │ │ - [ 2f9ee] und-x- │ │ - [ 2f9f5] i-default │ │ - [ 2f9ff] sgn-co │ │ - [ 2fa06] private- │ │ - [ 2fa0f] ICUDATA- │ │ - [ 2fa18] timezoneTypes │ │ - [ 2fa26] ucol_swap(formatVersion=4): unknown data at IX_RESERVED8_OFFSET\n │ │ - [ 2fa67] 000000000000^P00 │ │ - [ 2fa78] ucnv_open │ │ - [ 2fa82] calendar/ │ │ - [ 2fa8c] era-name │ │ - [ 2fa95] midnight │ │ - [ 2fa9e] M08 │ │ - [ 2faa2] keyTypePattern │ │ - [ 2fab1] ubrk_swap(): data format %02x.%02x.%02x.%02x (format version %02x) is not recognized\n │ │ - [ 2fb07] uchar_swapNames(): too few bytes (%d after header) for unames.icu algorithmic range %u\n │ │ - [ 2fb5f] U_RESOURCE_TYPE_MISMATCH │ │ - [ 2fb78] U_REGEX_PATTERN_TOO_BIG │ │ - [ 2fb90] CLF │ │ - [ 2fb94] CNH │ │ - [ 2fb98] DEM │ │ - [ 2fb9c] MOP │ │ - [ 2fba0] SSP │ │ - [ 2fba4] TPE │ │ - [ 2fba8] XBC │ │ - [ 2fbac] XRE │ │ - [ 2fbb0] Inexact │ │ - [ 2fbb8] named │ │ - [ 2fbbe] pixel │ │ - [ 2fbc4] meter │ │ - [ 2fbca] jigger │ │ - [ 2fbd1] neuter │ │ - [ 2fbd8] perMille │ │ - [ 2fbe1] tebi │ │ - [ 2fbe6] dayperiod │ │ - [ 2fbf0] DurationRules │ │ - [ 2fbfe] tertiary │ │ - [ 2fc07] application of [suppressContractions [set]] failed │ │ - [ 2fc3a] quoted literal text missing terminating apostrophe │ │ - [ 2fc6d] AuxExemplarCharacters │ │ - [ 2fc83] measurementData │ │ - [ 2fc93] geq │ │ - [ 2fc97] postFrameCallback │ │ - [ 2fca9] (JJ)V │ │ - [ 2fcaf] java/lang/ClassLoader │ │ - [ 2fcc5] Unable to create a temporary file to store DEX with Java classes. │ │ - [ 2fd07] ATrace_beginSection │ │ - [ 2fd1b] enableBlockingWait │ │ - [ 2fd2e] Follow │ │ - [ 2fd35] Time: Forward │ │ - [ 2fd43] LeapSecondsFile │ │ - [ 2fd53] EclipseTextureSize │ │ - [ 2fd66] equatorial │ │ - [ 2fd71] Error reading stars file\n │ │ - [ 2fd8b] Sample Rate: %d -> %d\n │ │ - [ 2fda6] CHANNEL_BACK_RIGHT │ │ - [ 2fdb9] CHANNEL_AUX_2 │ │ - [ 2fdc7] CHANNEL_AUX_15 │ │ - [ 2fdd6] UNKNOWN │ │ - [ 2fdde] Device or resource busy │ │ - [ 2fdf6] Failed to open backend device │ │ - [ 2fe14] OSS │ │ - [ 2fe18] PulseAudio │ │ - [ 2fe23] AAudioStream_getChannelCount │ │ - [ 2fe40] [OpenSL] Failed to initialize OpenSL engine. │ │ - [ 2fe6d] ITRK │ │ - [ 2fe72] nrf │ │ - [ 2fe76] Tuesday │ │ - [ 2fe7e] Apr │ │ - [ 2fe82] atlasTex │ │ - [ 2fe8b] beige │ │ - [ 2fe91] honeydew │ │ - [ 2fe9a] lavenderblush │ │ - [ 2fea8] royalblue │ │ - [ 2feb2] - │ │ - [ 2feb4] UPS │ │ - [ 2feb8] Upsilon │ │ - [ 2fec4] planetrings │ │ - [ 2fed0] galacticgrid │ │ - [ 2fedd] i18nconstellations │ │ - [ 2fef0] Planet │ │ - [ 2fef7] patera │ │ - [ 2fefe] deleteview │ │ - [ 2ff09] name │ │ - [ 2ff0e] %d-%d-%dT%d:%d:%lf │ │ - [ 2ff21] low │ │ - [ 2ff25] fadeafter │ │ - [ 2ff2f] brightness │ │ - [ 2ff3a] No arguments expected for celestia:getscreendimension() │ │ - [ 2ff72] First argument to celestia:setsafeareainsets() must be a number │ │ - [ 2ffb2] setconstellationcolor │ │ - [ 2ffc8] getlabelcolor │ │ - [ 2ffd6] synchronizetime │ │ - [ 2ffe6] getdso │ │ - [ 2ffed] Second argument to celestia:setconstellationcolor() must be a number │ │ - [ 30032] Argument to celestia:getlinecolor() must be a string │ │ - [ 30067] One argument expected in celestia:settextureresolution │ │ - [ 3009e] class_image │ │ - [ 300aa] LINES │ │ - [ 300b0] SRC_ALPHA │ │ - [ 300ba] gl │ │ - [ 300bd] Four arguments expected for gl.Color() │ │ - [ 300e4] argument 1 to gl.Translate must be a number │ │ - [ 30110] argument 1 to gl.MatrixMode must be a number │ │ - [ 3013d] setorbitcoloroverridden │ │ - [ 30155] orbitframe │ │ - [ 30160] getdensity │ │ - [ 3016b] No arguments expected to function object:visible │ │ - [ 3019c] Arguments to object:removereferencemark() must be strings │ │ - [ 301d6] No arguments expected to function object:type │ │ - [ 30204] diffuse │ │ - [ 3020c] nebula │ │ - [ 30213] catalogNumber │ │ - [ 30221] temperature │ │ - [ 3022d] setlocationflags │ │ - [ 3023e] startInterpolation │ │ - [ 30251] First arg to observer:gotolonglat must be an object │ │ - [ 30285] One argument required for rotate │ │ - [ 302a6] One argument required for orbit │ │ - [ 302c6] First argument to observer:center must be an object │ │ - [ 302fa] getz │ │ - [ 302ff] __mul │ │ - [ 30305] hyperion │ │ - [ 3030e] Skipping out-of-order samples in {}.\n │ │ - [ 30334] Lep │ │ - [ 30338] UMa │ │ - [ 3033c] Vel │ │ - [ 30340] Sc │ │ - [ 30343] The galaxy template *** {} *** could not be loaded!\n │ │ - [ 30378] pixelSize │ │ - [ 30382] y0 │ │ - [ 30385] CA │ │ - [ 30388] LB │ │ - [ 3038b] Unsupported mesh type found: {}\n │ │ - [ 303ac] Object has incorrect spice rotation syntax.\n │ │ - [ 303d9] Invalid ending date specified for SPICE orbit.\n │ │ - [ 30409] linear │ │ - [ 30410] Parabolic orbits are not supported.\n │ │ - [ 30435] Period must be specified in EllipticalOrbit.\n │ │ - [ 30463] Inclination │ │ - [ 3046f] Topocentric │ │ - [ 3047b] Object │ │ - [ 30482] arcsec │ │ - [ 30489] /tmp/celestia-shaders.log │ │ - [ 304a3] color.a *= pointFade;\n │ │ - [ 304ba] diff.rgb += intensity * │ │ - [ 304d3] vec3 color = vec3(0.0);\n │ │ - [ 304ec] float h = max(0.0, length(atmSamplePoint) - atmosphereRadius.z);\n │ │ - [ 30532] scatteredColor{} │ │ - [ 30543] in_Normal │ │ - [ 3054d] MieScaleHeight │ │ - [ 3055c] CloudHeight │ │ - [ 30568] Invalid filename in NormalMap\n │ │ - [ 30587] CELSTARS │ │ - [ 30590] line {} │ │ - [ 30598] ctx │ │ - [ 3059c] Failed to decompress DDS texture file {}.\n │ │ - [ 305c7] array │ │ - [ 305cd] OpenGL ES │ │ - [ 305d8] " │ │ - [ 305da] Invalid scan script at entry %d │ │ - [ 305fa] Application transferred too few scanlines │ │ - [ 30624] Start Of Scan: %d components │ │ - [ 30641] Corrupt JPEG data: bad Huffman code │ │ - [ 30665] JSIMD_FORCENEON │ │ - [ 30675] psaux │ │ - [ 3067b] closefile │ │ - [ 30685] FontBBox │ │ - [ 3068e] NDV │ │ - [ 30692] CID │ │ - [ 30696] FDArray │ │ - [ 3069e] RESOLUTION_Y │ │ - [ 306ab] COMMENT │ │ - [ 306b3] FIGURE_WIDTH │ │ - [ 306c0] RAW_SMALL_CAP_SIZE │ │ - [ 306d3] RAW_SUPERSCRIPT_SIZE │ │ - [ 306e8] DWIDTH │ │ - [ 306f8] IsFixedPitch │ │ - [ 30705] (*vararg) │ │ - [ 3070f] /dev/urandom │ │ - [ 3071c] elseif │ │ - [ 30723] @%s │ │ - [ 30727] signal │ │ - [ 3072f] ctype^Gnumeric^Dtime^Gcollate^Hmonetary^A�^Call │ │ - [ 30759] module '%s' not found:%s │ │ - [ 30772] sRGB │ │ - [ 30777] out-of-date sRGB profile with no signature │ │ - [ 307a2] png_image_finish_read: invalid argument │ │ - [ 307ca] ga-alpha color-map: too few entries │ │ - [ 307ee] png_read_image: invalid transformations │ │ - [ 30816] invalid values │ │ - [ 30825] invalid data │ │ - [ 30832] invalid chunk type │ │ - [ 30845] Invalid palette length │ │ - [ 3085c] no rows for png_write_image to write │ │ - [ 30881] Invalid bit depth for paletted image │ │ - [ 308a6] Invalid number of histogram entries specified │ │ - [ 308d4] SPICE(NULLPOINTER) │ │ - [ 308e7] SPICE(REFNOTREC) │ │ - [ 308f8] EK │ │ - [ 308fb] OLD FILES │ │ - [ 30905] ADD TO END │ │ - [ 30910] PREPARE PARTIAL LIST │ │ - [ 30925] DAF/ │ │ - [ 3092a] SPICE(DAFWRITEFAIL) │ │ - [ 3093e] DAFSIH │ │ - [ 30945] stnseg │ │ - [ 3094c] DAFGH │ │ - [ 30952] COLUMN_NUMBER_MISMATCH │ │ - [ 30969] NEXT_SEGMENT │ │ - [ 30976] SPICE(EKCOLNUMMISMATCH) │ │ - [ 3098e] SPICE(BADATTRIBUTES) │ │ - [ 309a3] EKGC │ │ - [ 309a8] DASOPN │ │ - [ 309af] NAIF/DAS │ │ - [ 309b8] rcbufi │ │ - [ 309bf] DASIOC │ │ - [ 309c6] DASUDI │ │ - [ 309cd] btbod │ │ - [ 309d3] pnames │ │ - [ 309da] (1X,A) │ │ - [ 309e1] The amount of room specified as available for output in the output array was: #. The amount of room must be positive. │ │ - [ 30a59] MAXLEN │ │ - [ 30a60] unknown code in do_fio: %d\n │ │ + [ 2a7d3] sampler2DShadow │ │ + [ 2a7e3] vec3 atmLeave = nposition;\n │ │ + [ 2a803] d = sqrt(max(rq * rq - qq, 0.0));\n │ │ + [ 2a82a] atmSamplePoint = mix(atmEnter, atmLeave, 0.667);\n │ │ + [ 2a860] Timeline │ │ + [ 2a869] Error in timeline of '{}', phase {}.\n │ │ + [ 2a88f] Reflectivity │ │ + [ 2a89c] Absorption │ │ + [ 2a8a7] DA │ │ + [ 2a8aa] ignoring SpectralType on Barycenter │ │ + [ 2a8ce] {} A │ │ + [ 2a8d3] Creating tiled texture. Width={}, max={}\n │ │ + [ 2a8fd] Read3DSFile: Error opening {}\n │ │ + [ 2a91c] │ │ + [ 2a923] getObjectPointer │ │ + [ 2a934] cannot create object from initializer list │ │ + [ 2a95f] eglGetCurrentDisplay │ │ + [ 2a974] Read failed on temporary file │ │ + [ 2a992] Write failed on temporary file --- out of disk space? │ │ + [ 2a9c8] Virtual array controller messed up │ │ + [ 2a9eb] Freed XMS handle %u │ │ + [ 2a9ff] RESOLUTION_X │ │ + [ 2aa0c] SLANT │ │ + [ 2aa12] STARTFONT │ │ + [ 2aa1c] CHARSET_COLLECTIONS │ │ + [ 2aa30] RAW_UNDERLINE_THICKNESS │ │ + [ 2aa48] X_HEIGHT │ │ + [ 2aa54] � │ │ + [ 2aa59] EndTrackKern │ │ + [ 2aa66] WY │ │ + [ 2aa69] proto │ │ + [ 2aa6f] for │ │ + [ 2aa73] not │ │ + [ 2aa77] pairs │ │ + [ 2aa7d] │ │ + [ 2aa87] pragma │ │ + [ 2aa8e] PANIC: unprotected error in call to Lua API ( │ │ + [ 2aabc] new │ │ + [ 2aac0] loaders │ │ + [ 2aaca] no file '%s' │ │ + [ 2aad7] loop or previous error loading module '%s' │ │ + [ 2ab02] cdata<%s>: %d │ │ + [ 2ab10] buffer │ │ + [ 2ab17] +0000 │ │ + [ 2ab1e] Invalid filter method in IHDR │ │ + [ 2ab3c] known incorrect sRGB profile │ │ + [ 2ab59] Out of Memory │ │ + [ 2ab67] unexpected bit depth │ │ + [ 2ab7c] Palette is NULL in indexed image │ │ + [ 2ab9d] NULL row buffer │ │ + [ 2abad] error in user chunk │ │ + [ 2abc1] Write Error │ │ + [ 2abcd] png_image_write_to_memory: PNG too big │ │ + [ 2abf4] Invalid filter type specified │ │ + [ 2ac12] Invalid cell size. The size was #. │ │ + [ 2ac36] Input argument op had value: # Valid choices are GET or SET. │ │ + [ 2ac73] File Open Failed Because the File was Already Open │ │ + [ 2aca6] No More Logical Units are Available for Allocation │ │ + [ 2acd9] SPICE(NOINTERVAL) │ │ + [ 2aceb] SPICE(NOTDISTINCT) │ │ + [ 2acfe] The Input or Output Units Were Not Recognized │ │ + [ 2ad2c] The routine KEEPER is an umbrella for a collection of entry points that manage the loading, tracking and unloading of SPICE kernels. KEEPER should not be called directly. It is likely that a programming error has been made. │ │ + [ 2ae0e] types │ │ + [ 2ae14] META │ │ + [ 2ae19] DIRECT │ │ + [ 2ae20] bad variable type │ │ + [ 2ae32] sequential │ │ + [ 2ae3d] DAFARW │ │ + [ 2ae44] The EK file # could not be loaded; the maximum number of loaded segments has already been reached. │ │ + [ 2aea7] cttyps │ │ + [ 2aeae] NUM_CONJUNCTIONS │ │ + [ 2aebf] EKOPR │ │ + [ 2aec5] ftsum │ │ + [ 2aecb] Handle # is not attached to an open DAS file. │ │ + [ 2aef9] SPICE(UNALLOCATEDNODE) │ │ + [ 2af10] btprvd │ │ + [ 2af17] LDPOOL │ │ + [ 2af1e] This error is never supposed to occur. No data was available for the variable '#'. │ │ + [ 2af72] The input kernel pool variable name exceeds the maximum allowed length of #1. The length of the variable name is #2, the offending variable name: '#3'. │ │ + [ 2b00a] DWPOOL │ │ + [ 2b011] Length of output cell is #. Length required to contain result is #. │ │ + [ 2b056] Too many files open already. │ │ + [ 2b073] CLTEXT │ │ + [ 2b07a] The number # is not a recognized id-code for a reference frame. │ │ + [ 2b0bb] rot │ │ + [ 2b0bf] THIRD │ │ + [ 2b0c5] NINTH │ │ + [ 2b0cb] THOUSAND │ │ + [ 2b0d4] CONVRT: Output units │ │ + [ 2b0ea] convrt_ │ │ + [ 2b0f2] spks │ │ + [ 2b0f7] SPICE(DAFBEGGTEND) │ │ + [ 2b10a] SPICE(UNKNOWNMETAITEM) │ │ + [ 2b121] SPICE(TYPEMISMATCH) │ │ + [ 2b135] SPICE(INVALIDARCHTYPE) │ │ + [ 2b14c] NAIF │ │ + [ 2b151] months │ │ + [ 2b158] The central body radius was negative. It must be zero or positive. The value supplied was #. │ │ + [ 2b1b7] Expansion degree must be non-negative but was #. │ │ + [ 2b1e8] Window size in type 18 segment was #; must be even for subtype 1 (Lagrange, 6-element packets). │ │ + [ 2b248] SSIZEC │ │ + [ 2b24f] dcosth │ │ + [ 2b256] TKFRAME_ │ │ + [ 2b25f] #: The comparison operator '#' is not a recognized value. The recognized values are '<', '<=', '=', '=>', '>'. │ │ + [ 2b2d0] to routines that clear the kernel pool. │ │ + [ 2b2f9] SIZED │ │ + [ 2b2ff] WRLINE: An error occurred while attempting to open │ │ + [ 2b332] list output start │ │ + [ 2b344] EUL2XF │ │ + [ 2b34b] | │ │ + [ 2b34f] ZZDAFGDR │ │ + [ 2b358] Unable to locate file associated with HANDLE, #. The most likely cause of this is the file that you are trying to read has been closed. │ │ + [ 2b3e0] The file '#' is already connected to unit #. │ │ + [ 2b40d] ftarc │ │ + [ 2b413] ZZDSKBSS │ │ + [ 2b41c] At least one DSK file must have been loaded by ZZDSKLSF before a search can be started. │ │ + [ 2b474] stdskd │ │ + [ 2b47b] FRAME │ │ + [ 2b481] itmspc │ │ + [ 2b488] SURFNM │ │ + [ 2b48f] Velocity components of observer were: dx/dt = *, dy/dt = *, dz/dt = *. │ │ + [ 2b4d7] The kernel variable # has used to define frame # was expected to have integer data type but in fact has character type. Usually this type of problem is due to an error in a frame definition provided in a frame kernel. │ │ + [ 2b5b2] Number of join constraints was #; valid range is 0:# │ │ + [ 2b5e7] ordvec │ │ + [ 2b5ee] Number of rows must be positive; was #. │ │ + [ 2b616] SPICE(NOTINDEXED) │ │ + [ 2b628] EK = #; COLIDX = #; ROW = #; ELTIDX = #.Column entry element was not found. │ │ + [ 2b675] Attempted to read uninitialized column entry. SEGNO = #; COLUMN = #; RECNO = #; EK = # │ │ + [ 2b6cd] Data pointer is corrupted. SEGNO = #; COLUMN = #; RECNO = #; EK = # │ │ + [ 2b712] SPICE(STRINGTRUNCATED) │ │ + [ 2b729] ZZEKRD07 │ │ + [ 2b732] zzeksca_ │ │ + [ 2b73b] Base address # was #; valid range is 1:# │ │ + [ 2b764] IAU_PHOBOS │ │ + [ 2b76f] EARTH_FIXED │ │ + [ 2b77b] IAU_DAVIDA │ │ + [ 2b786] ZZHSI │ │ + [ 2b78c] SOLAR_SYSTEM_BARYCENTER │ │ + [ 2b7a4] ELARA │ │ + [ 2b7aa] CARME │ │ + [ 2b7b0] CALLIRRHOE │ │ + [ 2b7bb] ORTHOSIE │ │ + [ 2b7c4] PASITHEE │ │ + [ 2b7cd] EUKELADE │ │ + [ 2b7d6] CYLLENE │ │ + [ 2b7de] PIONEER-7 │ │ + [ 2b7e8] NEO SURVEYOR │ │ + [ 2b7f5] MARS ODYSSEY │ │ + [ 2b802] CAS │ │ + [ 2b806] CH1 │ │ + [ 2b80a] MARS GLOBAL SURVEYOR │ │ + [ 2b81f] MARS POLAR LANDER │ │ + [ 2b831] MARS_ORBITER_MISSION_2 │ │ + [ 2b848] LUNAR-A │ │ + [ 2b850] KPLO │ │ + [ 2b855] PLANET-B │ │ + [ 2b85e] STV53 │ │ + [ 2b864] ROSETTA │ │ + [ 2b86c] STEREO BEHIND │ │ + [ 2b87a] M96 │ │ + [ 2b87e] SHOEMAKER-LEVY 9-M │ │ + [ 2b891] D'ARREST │ │ + [ 2b89a] ENCKE │ │ + [ 2b8a0] HOLMES │ │ + [ 2b8a7] KOJIMA │ │ + [ 2b8ae] NEUJMIN 1 │ │ + [ 2b8b8] NEUJMIN 3 │ │ + [ 2b8c2] 52 EUROPA │ │ + [ 2b8cc] EURYBATES │ │ + [ 2b8d6] TE1 │ │ + [ 2b8da] SPICE(TYPE1TEXTEK) │ │ + [ 2b8ed] At epoch # TDB (# TDB), there is insufficient information available to transform from reference frame # (@) to reference frame # (@). │ │ + [ 2b973] Frame # could be transformed to frame # (@). │ │ + [ 2b9a0] The ZZHASH2 function calculated a negative value for string $1. Contact NAIF. │ │ + [ 2b9ee] zzpini_ │ │ + [ 2b9f6] zzprscor_ │ │ + [ 2ba00] The kernel pool does not have room for any more variables. It filled up at line # of the kernel file #. │ │ + [ 2ba6a] There is no room available for adding another character value to the kernel pool. The character values buffer became full at line # of the text kernel file '#'. │ │ + [ 2bb0d] *Z* │ │ + [ 2bb11] There is no room available for adding another character value to the kernel pool. The character values buffer became full at line # of the text buffer. │ │ + [ 2bbab] SCLK01_MODULI_ │ │ + [ 2bbba] SCLK_PARTITION_END_ │ │ + [ 2bbce] ZZSGP4 │ │ + [ 2bbd5] Satellite has decayed. │ │ + [ 2bbec] JDUTC │ │ + [ 2bbf3] Either the leapsecond epochs taken from the kernel pool are not properly ordered or the UTC - TAI offsets are completely out of range. │ │ + [ 2bc7b] ZZSPKSB1 │ │ + [ 2bc84] ZZSWFXFM │ │ + [ 2bc8d] usetim │ │ + [ 2bc94] The seconds component of '#' is out of range. Leapseconds can occur during the year # of the Julian calendar only in the second that immediately follows the time #:#:59 on # # and # #.' │ │ + [ 2bd50] Era │ │ + [ 2bd54] MON │ │ + [ 2bd58] " │ │ + [ 2bd5a] The meaning of the integer <#> could not be determined: ' │ │ + [ 2bd94] i-Y/ │ │ + [ 2bd99] i-idi:i:n │ │ + [ 2bda3] yY*H*M │ │ + [ 2bdaa] imi:nY │ │ + [ 2bdb1] imn │ │ + [ 2bdb5] mDH*M*SY │ │ + [ 2bdbe] miii:i │ │ + [ 2bdc5] mni │ │ + [ 2bdc9] Y-itn │ │ + [ 2bdcf] Y*y*H*M*S* │ │ + [ 2bdda] The native binary file format of this toolkit build, #, is not currently supported for translation of integers from non-native formats. │ │ + [ 2be62] zh_WUU │ │ + [ 2be69] ast │ │ + [ 2be6d] avk │ │ + [ 2be71] ay │ │ + [ 2be74] bax │ │ + [ 2be78] bik │ │ + [ 2be7c] bpy │ │ + [ 2be80] frc │ │ + [ 2be84] gbz │ │ + [ 2be88] guc │ │ + [ 2be8c] hmn │ │ + [ 2be90] lkt │ │ + [ 2be94] mus │ │ + [ 2be98] nov │ │ + [ 2be9c] nzi │ │ + [ 2bea0] ota │ │ + [ 2bea4] pal │ │ + [ 2bea8] pam │ │ + [ 2beac] rap │ │ + [ 2beb0] trv │ │ + [ 2beb4] tyv │ │ + [ 2beb8] aym │ │ + [ 2bebc] som │ │ + [ 2bec0] tam │ │ + [ 2bec4] tuk │ │ + [ 2bec8] AQ │ │ + [ 2becb] FK │ │ + [ 2bece] RO │ │ + [ 2bed1] BFA │ │ + [ 2bed5] DJI │ │ + [ 2bed9] NRU │ │ + [ 2bedd] SHN │ │ + [ 2bee1] SWZ │ │ + [ 2bee5] USA │ │ + [ 2bee9] VGB │ │ + [ 2beed] BUR │ │ + [ 2bef1] en_GB │ │ + [ 2bef7] hy_AM │ │ + [ 2befd] lv_LV │ │ + [ 2bf03] Asia/Magadan │ │ + [ 2bf10] SAKST │ │ + [ 2bf16] Asia/Irkutsk │ │ + [ 2bf23] CLST │ │ + [ 2bf28] Atlantic/Stanley │ │ + [ 2bf39] US/Alaska │ │ + [ 2bf43] attribute │ │ + [ 2bf4d] ar_JO │ │ + [ 2bf53] fr_CG │ │ + [ 2bf59] nl_BE │ │ + [ 2bf5f] ru_MD │ │ + [ 2bf65] tg_Cyrl_TJ │ │ + [ 2bf70] zh_MO │ │ + [ 2bf76] keyMap │ │ + [ 2bf7d] art-lojban │ │ + [ 2bf88] zh-min-nan │ │ + [ 2bf93] bzs │ │ + [ 2bf97] mfs │ │ + [ 2bf9b] file-open │ │ + [ 2bfa5] currency symbol │ │ + [ 2bfb5] U_COLLATOR_VERSION_MISMATCH │ │ + [ 2bfd1] U_MALFORMED_SET │ │ + [ 2bfe1] U_MULTIPLE_ANTE_CONTEXTS │ │ + [ 2bffa] U_MF_FORMATTING_ERROR │ │ + [ 2c010] U_REGEX_INVALID_RANGE │ │ + [ 2c026] AFA │ │ + [ 2c02a] BBD │ │ + [ 2c02e] BMD │ │ + [ 2c032] COU │ │ + [ 2c036] HRK │ │ + [ 2c03a] MWK │ │ + [ 2c03e] NOK │ │ + [ 2c042] SRG │ │ + [ 2c046] UAH │ │ + [ 2c04a] decNumber 3.61 │ │ + [ 2c059] M01L │ │ + [ 2c05e] none │ │ + [ 2c063] pressure │ │ + [ 2c06c] bit │ │ + [ 2c070] decimeter │ │ + [ 2c07a] microgram │ │ + [ 2c084] meter-per-second │ │ + [ 2c095] deciliter │ │ + [ 2c09f] currencyDecimal │ │ + [ 2c0af] rules/ │ │ + [ 2c0b6] /case/ │ │ + [ 2c0bd] CurrencyUnitPatterns │ │ + [ 2c0d2] listPattern │ │ + [ 2c0de] codeMappings │ │ + [ 2c0eb] last secondary ignorable │ │ + [ 2c104] first primary ignorable │ │ + [ 2c11c] AChoreographer_postFrameCallbackDelayed │ │ + [ 2c144] ()Ljava/lang/ClassLoader; │ │ + [ 2c15e] java/io/File │ │ + [ 2c16b] %d │ │ + [ 2c16e] eglGetSyncAttribKHR │ │ + [ 2c182] _Unwind_VRS_Get_Internal │ │ + [ 2c19b] celestia.cfg │ │ + [ 2c1a8] negative width │ │ + [ 2c1b7] FavoritesFile │ │ + [ 2c1c5] DemoScript │ │ + [ 2c1d0] Description │ │ + [ 2c1dc] geographic │ │ + [ 2c1e7] chase │ │ + [ 2c1ed] Max texture size: %s\n │ │ + [ 2c203] Sync Orbit %s\n │ │ + [ 2c212] FOV: {} ({:.2f}x)\n │ │ + [ 2c225] Neutron star │ │ + [ 2c232] Density: {} kg/m�\n │ │ + [ 2c246] RA: {}h {:02}m {:.1f}s\n │ │ + [ 2c25e] CHANNEL_AUX_9 │ │ + [ 2c26c] CHANNEL_AUX_23 │ │ + [ 2c27b] Connection refused │ │ + [ 2c28e] Device not started │ │ + [ 2c2a1] Failed to initialize data supply for "%s". %s.\n │ │ + [ 2c2d1] AAudioStreamBuilder_setDataCallback │ │ + [ 2c2f5] Failed to commit capture PCM frames to ring buffer. │ │ + [ 2c329] Saturday │ │ + [ 2c332] gold │ │ + [ 2c337] lavender │ │ + [ 2c340] orchid │ │ + [ 2c347] steelblue │ │ + [ 2c351] {:0<{}} │ │ + [ 2c35c] minormoons │ │ + [ 2c367] equatorialgrid │ │ + [ 2c376] Moon │ │ + [ 2c37b] fossa │ │ + [ 2c381] lingula │ │ + [ 2c389] colorbottomleft │ │ + [ 2c399] [UserCategory:{}] │ │ + [ 2c3ab] setaudionopause │ │ + [ 2c3bb] Arguments to celestia:show() must be strings │ │ + [ 2c3e8] One argument expected for celestia:setlabelflags() │ │ + [ 2c41b] Values in table-argument to celestia:setorbitflags() must be boolean │ │ + [ 2c460] No arguments expected for celestia:getobservers() │ │ + [ 2c492] One argument expected for celestia:windowbordersvisible │ │ + [ 2c4ca] Fifth argument to celestia:play must be a string (filename) │ │ + [ 2c506] 1.7.0 │ │ + [ 2c50c] Argument to celestia:loadfont() must be a string │ │ + [ 2c53d] Error setting metatable for │ │ + [ 2c55a] class_observer │ │ + [ 2c569] gettargetobject │ │ + [ 2c579] First argument to font:gettextwidth must be a string │ │ + [ 2c5ae] moon │ │ + [ 2c5b3] bolometricMagnitude │ │ + [ 2c5c7] HD │ │ + [ 2c5ca] Fifth arg to observer:goto must be a number │ │ + [ 2c5f6] Two or three arguments required for lookat │ │ + [ 2c621] One argument required for observer:setspeed() │ │ + [ 2c64f] vectorto │ │ + [ 2c658] Addition only defined for two rotations │ │ + [ 2c680] __pow │ │ + [ 2c686] Subtraction only defined for two vectors │ │ + [ 2c6af] Could not read model header\n │ │ + [ 2c6cc] specpower {}\n │ │ + [ 2c6da] uranus-sun │ │ + [ 2c6e5] jpl-emb-sun │ │ + [ 2c6f1] jpl-moon-earth │ │ + [ 2c700] iau-phoebe │ │ + [ 2c70b] CMi │ │ + [ 2c70f] Cam │ │ + [ 2c713] Cep │ │ + [ 2c717] Nor │ │ + [ 2c71b] Peg │ │ + [ 2c71f] UMi │ │ + [ 2c723] Loaded {} deep space objects\n │ │ + [ 2c741] E5 │ │ + [ 2c744] GL_EXT_geometry_shader │ │ + [ 2c75b] AA │ │ + [ 2c75e] RI │ │ + [ 2c761] SA │ │ + [ 2c764] DO │ │ + [ 2c767] Object has incorrect scripted orbit syntax.\n │ │ + [ 2c794] Bounding Radius missing from SPICE orbit\n │ │ + [ 2c7be] SampledTrajectory is missing a source.\n │ │ + [ 2c7e6] Interpolation │ │ + [ 2c7f4] SemiMajorAxis/PericenterDistance missing from orbit definition.\n │ │ + [ 2c835] Function name missing from scripted rotation definition.\n │ │ + [ 2c86f] Bad two-vector frame: axes for vectors are collinear.\n │ │ + [ 2c8a6] +y │ │ + [ 2c8a9] shadowMapSize │ │ + [ 2c8b7] RGB{}{}{} │ │ + [ 2c8c1] depth │ │ + [ 2c8c7] shadowDepths │ │ + [ 2c8d4] shadowR │ │ + [ 2c8dc] ));\n │ │ + [ 2c8e1] gl_FragColor = vec4(color.rgb * diff.rgb, opticalDepth);\n │ │ + [ 2c91b] normal = in_Normal;\n │ │ + [ 2c934] // shadow count: │ │ + [ 2c946] light{}_{} │ │ + [ 2c951] shadowCenter.s = dot(vec4(position, 1.0), │ │ + [ 2c97c] in_Intensity │ │ + [ 2c989] lines │ │ + [ 2c98f] Replace │ │ + [ 2c997] Orbit frame for '{}' is nested too deep (probably circular)\n │ │ + [ 2c9d4] DB │ │ + [ 2c9d7] VirtualTexture │ │ + [ 2c9e6] Failed to read texture coord array count\n │ │ + [ 2ca10] space/celestia/celestia/Body │ │ + [ 2ca2d] (I)V │ │ + [ 2ca32] Dwarf Planets │ │ + [ 2ca40] eglInitialize() returned error %d │ │ + [ 2ca62] unknown format specifier │ │ + [ 2ca7b] r │ │ + [ 2ca7d] Bogus buffer control mode │ │ + [ 2ca97] Input file read error │ │ + [ 2caad] JPEG datastream contains no image │ │ + [ 2cacf] Caution: quantization tables are too coarse for baseline JPEG │ │ + [ 2cb0d] JFIF APP0 marker: version %d.%02d, density %dx%d %d │ │ + [ 2cb42] Miscellaneous marker 0x%02x, length %u │ │ + [ 2cb69] type42 │ │ + [ 2cb70] CIDMapOffset │ │ + [ 2cb7d] CHARSET_REGISTRY │ │ + [ 2cb8e] BDF │ │ + [ 2cb92] FONT │ │ + [ 2cb97] SUPERSCRIPT_SIZE │ │ + [ 2cba8] VVector │ │ + [ 2cbb0] method │ │ + [ 2cbb7] "%s":%d │ │ + [ 2cbbf] (binary) │ │ + [ 2cbc8] stdin │ │ + [ 2cbce] stderr │ │ + [ 2cbd5] file (%p) │ │ + [ 2cbdf] *t │ │ + [ 2cbe2] ./?.so;/usr/local/lib/lua/5.1/?.so;/home/vagrant/build/apple-android/LuaJIT-87ae18af97fd4de790bb6c476b212e047689cc93/output/lib/lua/5.1/?.so;/usr/local/lib/lua/5.1/loadall.so │ │ + [ 2cc91] call │ │ + [ 2cc96] line │ │ + [ 2cc9b] arm │ │ + [ 2cc9f] insufficient memory │ │ + [ 2ccb3] Image height is zero in IHDR │ │ + [ 2ccd0] too short │ │ + [ 2ccda] png_get_eXIf does not work; use png_get_eXIf_1 │ │ + [ 2cd09] png_image_finish_read[color-map]: no color-map │ │ + [ 2cd38] bad background index (internal error) │ │ + [ 2cd5e] invalid screen gamma in png_set_gamma │ │ + [ 2cd84] invalid error action to rgb_to_gray │ │ + [ 2cda8] invalid unit │ │ + [ 2cdb5] Invalid sCAL height │ │ + [ 2cdc9] png_image_write_to_memory: invalid argument │ │ + [ 2cdf5] no color-map for color-mapped image │ │ + [ 2ce19] eqstr_c │ │ + [ 2ce21] SPICE(DATEEXPECTED) │ │ + [ 2ce35] Invalid Cluster Number -- Cluster Numbers Must Exceed 1 │ │ + [ 2ce6e] The Elements Must Be Distinct │ │ + [ 2ce8c] No Further Symbols Can be Inserted; the Pointer Table is Full │ │ + [ 2ceca] SPICE(ZERORADIUS) │ │ + [ 2cedc] itins │ │ + [ 2cee2] itub │ │ + [ 2cee7] SUSPEND │ │ + [ 2ceef] DAFOPW │ │ + [ 2cef6] SPICE(DAFNORESV) │ │ + [ 2cf07] SPICE(DAFNOSUCHHANDLE) │ │ + [ 2cf1e] DAF not open for write. Handle = #, file = '#' │ │ + [ 2cf4e] can't stat file │ │ + [ 2cf5e] out of free space │ │ + [ 2cf70] can't append to file │ │ + [ 2cf85] non-positive record number │ │ + [ 2cfa0] (unnamed) %s\n │ │ + [ 2cfae] apparent state: internal I/O\n │ │ + [ 2cfcc] MAKE_SEGMENT_TABLE_ENTRY │ │ + [ 2cfe5] * │ │ + [ 2cfe7] SPICE(BUG) │ │ + [ 2cff2] cbegs │ │ + [ 2cff8] otabs │ │ + [ 2cffe] DASOPS │ │ + [ 2d005] DASLUH │ │ + [ 2d00c] SPICE(DASFILEWRITEFAILED) │ │ + [ 2d026] SPICE(OUTOFRANGE) │ │ + [ 2d038] poolc │ │ + [ 2d03e] ) │ │ + [ 2d041] SPICE(TOOMANYWATCHES) │ │ + [ 2d057] CHGIRF │ │ + [ 2d05e] An unexpected sign character was found in the input string. │ │ + [ 2d09b] nparsd_ │ │ + [ 2d0a3] CKE01 │ │ + [ 2d0a9] ckr02_ │ │ + [ 2d0b0] Segment descriptor indicates angular velocity data are not available, but such data were requested. │ │ + [ 2d114] Output argument has declared length #; required length is #. Input tick value was #. │ │ + [ 2d169] sigerr_c │ │ + [ 2d172] The file '#' is already open. │ │ + [ 2d190] ctarg │ │ + [ 2d196] trans2 │ │ + [ 2d19d] dpbegl │ │ + [ 2d1a4] SPICE(SPKTYPENOTSUPP) │ │ + [ 2d1ba] Step size was zero. │ │ + [ 2d1ce] You are attempting to locate type * data in a type 18 data segment. │ │ + [ 2d212] SPKR19 │ │ + [ 2d219] tipm │ │ + [ 2d21e] xdtipm │ │ + [ 2d225] Storage for # double precision numbers is needed for a PCK data record and only # locations were available. Notify the NAIF group of this problem. │ │ + [ 2d2b8] SPICE(BADFRAMESPEC2) │ │ + [ 2d2cd] _AXES │ │ + [ 2d2d3] UNIONC │ │ + [ 2d2da] %#.*f │ │ + [ 2d2e0] xposbl_ │ │ + [ 2d2e8] ZZDASGRI │ │ + [ 2d2f1] zzddhman_ │ │ + [ 2d2fb] SPICE(FILEOPENFAIL) │ │ + [ 2d30f] # SCRATCH FILE │ │ + [ 2d31e] ZZDDHCLS │ │ + [ 2d327] ZZDDHPPF │ │ + [ 2d330] Must begin a search by calling ZZDSKBSS first. │ │ + [ 2d35f] Kernel variable # was expected to be present in the kernel pool but was not found. The alternative form of kernel variable name FRAME_#_# was not searched for because this name has excessive length (# characters vs allowed maximum of #). One of these variables is needed to define the reference frame #. Usually this type of problem is due to a missing keyword assignment in a frame kernel. Another, less likely, possibility is that other errors in a frame kernel have confused the frame subsystem into wrongly deciding these variables are needed. │ │ + [ 2d587] Definition of frame # specifies precession model #, which is not recognized. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 2d632] s2 │ │ + [ 2d635] Definition of product parameterized dynamic frame # has # "from" frames and # "to" frames. These counts must match. │ │ + [ 2d6a9] PRSINT │ │ + [ 2d6b0] iorder │ │ + [ 2d6b7] STLABX │ │ + [ 2d6be] The number of constraints was #; valid range is 0:# │ │ + [ 2d6f2] ZZEKLLTI │ │ + [ 2d6fb] Table index # is out of valid range 1:#. │ │ + [ 2d724] ZZEKECMP │ │ + [ 2d72d] DP page = #; valid range is [1:#] │ │ + [ 2d74f] ZZEKSRD │ │ + [ 2d757] IAU_PANDORA │ │ + [ 2d763] IAU_IDA │ │ + [ 2d76b] IAU_LUTETIA │ │ + [ 2d777] IAU_EURYBATES_BARYCENTER │ │ + [ 2d790] MARS │ │ + [ 2d795] KALYKE │ │ + [ 2d79c] FORNJOT │ │ + [ 2d7a4] OPHELIA │ │ + [ 2d7ac] ROSALIND │ │ + [ 2d7b5] VEGA 1 │ │ + [ 2d7bc] SPITZER │ │ + [ 2d7c4] NEW HORIZONS │ │ + [ 2d7d1] MOM2 │ │ + [ 2d7d6] SELENE │ │ + [ 2d7dd] EURC │ │ + [ 2d7e2] CLUSTER 4 │ │ + [ 2d7ec] MMX │ │ + [ 2d7f0] BRORSEN-METCALF │ │ + [ 2d800] HARTLEY 1 │ │ + [ 2d80a] NEUJMIN 2 │ │ + [ 2d814] ITOKAWA │ │ + [ 2d81c] PATROCLUS_BARYCENTER │ │ + [ 2d831] DIDYMOS │ │ + [ 2d839] USUDA │ │ + [ 2d83f] DSS-26 │ │ + [ 2d846] DSS-49 │ │ + [ 2d84d] DSS-55 │ │ + [ 2d854] Value of IOSTAT was *. │ │ + [ 2d86b] ZZHASH │ │ + [ 2d872] $1 │ │ + [ 2d875] ZZHASH2 │ │ + [ 2d87d] zzrefch1_ │ │ + [ 2d887] The month specified was #. The month must be an integer in the range from 1 to 12 (inclusive). │ │ + [ 2d8e8] Encountered '#' while attempting to parse a time on line # of the text buffer. │ │ + [ 2d938] XXSGP4E │ │ + [ 2d940] baslst │ │ + [ 2d947] SPICE(TIMECONFLICT) │ │ + [ 2d95b] +. │ │ + [ 2d95e] BC │ │ + [ 2d961] CST │ │ + [ 2d965] The string possesses calendar components in addition to Julian Date specifier. │ │ + [ 2d9b5] Y-i/i:n │ │ + [ 2d9bd] Y-idi:i:n │ │ + [ 2d9c7] Y-iti:i │ │ + [ 2d9cf] Yiii:i:n │ │ + [ 2d9d8] i-i/i:i:i │ │ + [ 2d9e2] i-it │ │ + [ 2d9e7] iidi:n │ │ + [ 2d9ee] mii:iY │ │ + [ 2d9f5] i/i/ii:i │ │ + [ 2d9fe] i:i:ni-i-Y │ │ + [ 2da09] i-i-Y │ │ + [ 2da0f] yi │ │ + [ 2da12] anp │ │ + [ 2da16] ceb │ │ + [ 2da1a] doi │ │ + [ 2da1e] fy │ │ + [ 2da21] gmh │ │ + [ 2da25] hif │ │ + [ 2da29] hup │ │ + [ 2da2d] lu │ │ + [ 2da30] maf │ │ + [ 2da34] no │ │ + [ 2da37] phn │ │ + [ 2da3b] seh │ │ + [ 2da3f] si │ │ + [ 2da42] sk │ │ + [ 2da45] sn │ │ + [ 2da48] sr │ │ + [ 2da4b] vai │ │ + [ 2da4f] xal │ │ + [ 2da53] xh │ │ + [ 2da56] fry │ │ + [ 2da5a] hrv │ │ + [ 2da5e] lim │ │ + [ 2da62] sqi │ │ + [ 2da66] AT │ │ + [ 2da69] GQ │ │ + [ 2da6c] TD │ │ + [ 2da6f] ESP │ │ + [ 2da73] ITA │ │ + [ 2da77] JOR │ │ + [ 2da7b] MRT │ │ + [ 2da7f] NGA │ │ + [ 2da83] SDN │ │ + [ 2da87] SMR │ │ + [ 2da8b] af_ZA │ │ + [ 2da91] id_ID │ │ + [ 2da97] vi_VN │ │ + [ 2da9d] NZDT │ │ + [ 2daa2] IRKT │ │ + [ 2daa7] HOVT │ │ + [ 2daac] NOVST │ │ + [ 2dab2] AZST │ │ + [ 2dab7] IST │ │ + [ 2dabb] CET │ │ + [ 2dabf] Africa/El_Aaiun │ │ + [ 2dacf] XA │ │ + [ 2dad2] XC │ │ + [ 2dad5] likely │ │ + [ 2dadc] en_UM │ │ + [ 2dae2] es_UY │ │ + [ 2dae8] bs_Latn │ │ + [ 2daf0] sr_Latn_RS │ │ + [ 2dafb] pap_AN │ │ + [ 2db02] ro_MD │ │ + [ 2db08] gsg │ │ + [ 2db0c] metaZones │ │ + [ 2db16] ucol_swap(formatVersion=4): unknown data at IX_RESERVED18_OFFSET\n │ │ + [ 2db58] ucnv_close │ │ + [ 2db63] ucol_getLocale │ │ + [ 2db72] calendar │ │ + [ 2db7b] zone-short │ │ + [ 2db86] fw │ │ + [ 2db89] loose │ │ + [ 2db8f] modifier letter │ │ + [ 2db9f] format │ │ + [ 2dba6] private use area │ │ + [ 2dbb7] dash punctuation │ │ + [ 2dbc8] U_INVALID_FORMAT_ERROR │ │ + [ 2dbdf] U_MULTIPLE_PERCENT_SYMBOLS │ │ + [ 2dbfa] BZD │ │ + [ 2dbfe] LRD │ │ + [ 2dc02] ROL │ │ + [ 2dc06] STN │ │ + [ 2dc0a] USD │ │ + [ 2dc0e] YUM │ │ + [ 2dc12] Rounded │ │ + [ 2dc1a] @calendar=roc │ │ + [ 2dc28] g-force │ │ + [ 2dc30] radian │ │ + [ 2dc37] ampere │ │ + [ 2dc3e] grain │ │ + [ 2dc44] exponential │ │ + [ 2dc50] Narrow │ │ + [ 2dc57] Short │ │ + [ 2dc5d] fields/day/relative │ │ + [ 2dc71] territoryContainment │ │ + [ 2dc86] fetching root CEs for tailored string │ │ + [ 2dcac] reset-before strength followed by a stronger relation │ │ + [ 2dce2] expected language tag in [import langTag] │ │ + [ 2dd0c] delimiters │ │ + [ 2dd17] com/google/androidgamesdk/ChoreographerCallback │ │ + [ 2dd47] swappy.disable │ │ + [ 2dd56] DISPLAY │ │ + [ 2dd5e] Star style: scaled discs │ │ + [ 2dd77] Resume │ │ + [ 2dd7e] Light travel time: {} min {:.1f} s │ │ + [ 2dda3] Light travel delay switched off │ │ + [ 2ddc3] Ambient light level: {:.2f} │ │ + [ 2dde0] perspective │ │ + [ 2ddec] DejaVuSans.ttf,12 │ │ + [ 2ddfe] vector │ │ + [ 2de05] ViewportEffect │ │ + [ 2de14] SkipExtras │ │ + [ 2de1f] ecliptical │ │ + [ 2de2a] invalid format specifier for char │ │ + [ 2de4c] km/s │ │ + [ 2de51] Radius: %s\n │ │ + [ 2de5d] Error reading cross index {}\n │ │ + [ 2de7b] CHANNEL_FRONT_CENTER │ │ + [ 2de90] CHANNEL_TOP_FRONT_LEFT │ │ + [ 2dea7] No data available │ │ + [ 2deb9] Protocol not supported │ │ + [ 2ded0] 24-bit Signed Integer (Tightly Packed) │ │ + [ 2def7] Failed to init miniaudio context │ │ + [ 2df18] DirectSound │ │ + [ 2df24] SL_IID_RECORD │ │ + [ 2df32] ds64 │ │ + [ 2df37] URL must start with "{}"!\n │ │ + [ 2df52] {:04}-{:02}-{:02}T{:02}:{:02}:{:08.5f}Z │ │ + [ 2df7a] Tue │ │ + [ 2df7e] Wed │ │ + [ 2df82] Wednesday │ │ + [ 2df8c] darkorange │ │ + [ 2df97] darkorchid │ │ + [ 2dfa2] indianred │ │ + [ 2dfac] lightsalmon │ │ + [ 2dfb8] moccasin │ │ + [ 2dfc1] navajowhite │ │ + [ 2dfcd] papayawhip │ │ + [ 2dfd8] violet │ │ + [ 2dfdf] .dsc │ │ + [ 2dfe4] 0{}{:0<{}}{} │ │ + [ 2dff1] NUL │ │ + [ 2dff5] HOME │ │ + [ 2dffa] Psi │ │ + [ 2dffe] colles │ │ + [ 2e005] sinus │ │ + [ 2e00b] singleview │ │ + [ 2e016] pan │ │ + [ 2e01a] position │ │ + [ 2e023] high │ │ + [ 2e028] label │ │ + [ 2e02e] top │ │ + [ 2e032] setscreendpi │ │ + [ 2e03f] getsafeareainsets │ │ + [ 2e051] getoverlayelements │ │ + [ 2e064] getrootcategories │ │ + [ 2e076] First argument to celestia:print must be a string │ │ + [ 2e0a8] No arguments expected for celestia:getaltazimuthmode() │ │ + [ 2e0df] Argument to celestia:setlayoutdirection must be a string │ │ + [ 2e118] Argument to celestia:setoverlayelements() must be a table │ │ + [ 2e152] No arguments expected to celestia:getselection() │ │ + [ 2e183] Value passed to celestia:paused must be boolean │ │ + [ 2e1b3] invalid starstyle │ │ + [ 2e1c5] Fifth arg to celestia:tojulianday must be a number │ │ + [ 2e1f8] Wrong number of arguments to function celestia:fromjulianday │ │ + [ 2e235] No argument expected for celestia:requestsystemaccess() │ │ + [ 2e26d] One argument expected for celestia:registereventhandler │ │ + [ 2e2a5] Fourth argument to celestia:playaudio must be a number │ │ + [ 2e2dc] First argument for celestia:pauseaudio must be a number │ │ + [ 2e314] borderclamp │ │ + [ 2e320] Position or rotation expected as second argument to frame:to() │ │ + [ 2e35f] argument 2 to gl.Frustum must be a number │ │ + [ 2e389] Six arguments expected for gl.Ortho2D() │ │ + [ 2e3b1] getmaxascent │ │ + [ 2e3be] addreferencemark │ │ + [ 2e3cf] addtocategory │ │ + [ 2e3dd] Invalid number of arguments in object:removereferencemark │ │ + [ 2e417] Argument to object:addtocategory() must be string or userdata │ │ + [ 2e455] One to five arguments expected to observer:goto │ │ + [ 2e485] Argument to goto must be a table │ │ + [ 2e4a6] Second arg to observer:center must be a number │ │ + [ 2e4d5] First argument to observer:chase must be an object │ │ + [ 2e508] One argument required for phase:getorientation │ │ + [ 2e537] gety │ │ + [ 2e53c] One argument expected to position:vectorto │ │ + [ 2e567] transform │ │ + [ 2e571] Bad rotation multiplication! │ │ + [ 2e58e] specular │ │ + [ 2e597] vertices │ │ + [ 2e5a0] texture0 "{}"\n │ │ + [ 2e5af] emissivemap "{}"\n │ │ + [ 2e5c1] position │ │ + [ 2e5cb] color1 │ │ + [ 2e5d3] texcoord0 │ │ + [ 2e5de] jpl-mars-sun │ │ + [ 2e5eb] vsop87-saturn │ │ + [ 2e5f9] phoebe │ │ + [ 2e600] jpl-uranus-sun │ │ + [ 2e60f] iau-uranus │ │ + [ 2e61a] iau-saturn │ │ + [ 2e625] iau-amalthea │ │ + [ 2e632] Cap │ │ + [ 2e636] Cet │ │ + [ 2e63a] Her │ │ + [ 2e63e] LMi │ │ + [ 2e642] Vul │ │ + [ 2e646] S0 │ │ + [ 2e649] SBc │ │ + [ 2e64d] x0 │ │ + [ 2e650] Model statistics: {} vertices, {} primitives, {} materials ({} unique)\n │ │ + [ 2e69b] Negative eccentricity is invalid.\n │ │ + [ 2e6be] PericenterDistance │ │ + [ 2e6d1] Center object '{}' of reference frame not found.\n │ │ + [ 2e703] deg │ │ + [ 2e707] shadowTexCoord0 = ShadowMatrix0 * vec4(in_Position.xyz, 1.0);\n │ │ + [ 2e746] ;\n │ │ + [ 2e749] NL │ │ + [ 2e74c] gl_FragColor += texture2D(emissiveTex, │ │ + [ 2e774] diffTex │ │ + [ 2e77c] extinctionCoeff │ │ + [ 2e78c] light{}_brightness │ │ + [ 2e79f] qq = dot(atmSamplePointSun, atmSamplePointSun) - atmosphereRadius.y;\n │ │ + [ 2e7e9] Failed to create error shader!\n │ │ + [ 2e809] lines_adjacency │ │ + [ 2e819] Add │ │ + [ 2e81d] Error: Timeline must be an array\n │ │ + [ 2e83f] OrbitFrame │ │ + [ 2e84a] Beginning time must be before Ending time.\n │ │ + [ 2e876] Error: missing orbit in timeline phase.\n │ │ + [ 2e89f] Albedo │ │ + [ 2e8a6] Orientation │ │ + [ 2e8b2] 0 │ │ + [ 2e8b4] 7 │ │ + [ 2e8b6] invalid filename in Mesh │ │ + [ 2e8cf] BaseSplit in virtual texture missing or has bad value\n │ │ + [ 2e906] Failed to read entry {} of material group face array\n │ │ + [ 2e93c] Error reading ColorFloat RGB values │ │ + [ 2e960] space/celestia/celestia/Location │ │ + [ 2e981] ()I │ │ + [ 2e985] UTF-8 │ │ + [ 2e98b] Bogus JPEG colorspace │ │ + [ 2e9a1] Buffer passed to JPEG library is too small │ │ + [ 2e9cc] Fractional sampling not implemented yet │ │ + [ 2e9f4] Maximum supported image dimension is %u pixels │ │ + [ 2ea23] Premature end of input file │ │ + [ 2ea3f] Quantization table 0x%02x was not defined │ │ + [ 2ea69] Image too wide for this implementation │ │ + [ 2ea90] glyph-dict │ │ + [ 2ea9b] darkening-parameters │ │ + [ 2eab0] Slant │ │ + [ 2eab6] FSType │ │ + [ 2eabd] ForceBold │ │ + [ 2eac7] Private │ │ + [ 2eacf] RAW_MAX_SPACE │ │ + [ 2eadd] RAW_MIN_SPACE │ │ + [ 2eaeb] SMALL_CAP_SIZE │ │ + [ 2eafd] � │ │ + [ 2eb05] � │ │ + [ 2eb0d] � │ │ + [ 2eb12] autofitter │ │ + [ 2eb1d] bsdf │ │ + [ 2eb22] overlaps │ │ + [ 2eb2b] [builtin: │ │ + [ 2eb35] next │ │ + [ 2eb3a] luaJIT_BC_%s │ │ + [ 2eb49] no field package.preload['%s'] │ │ + [ 2eb68] cdata<%s>: %p │ │ + [ 2eb76] bad adaptive filter value │ │ + [ 2eb90] png_image_read: opaque pointer not NULL │ │ + [ 2ebb8] rgb[gray] color-map: too few entries │ │ + [ 2ebdd] Can't discard critical data on CRC error │ │ + [ 2ec06] invalid window size (libpng) │ │ + [ 2ec23] invalid gray level │ │ + [ 2ec36] invalid color │ │ + [ 2ec44] cHRM Green X │ │ + [ 2ec51] png_write_image: internal call error │ │ + [ 2ec76] Invalid cell cardinality; cardinality exceeds cell size. The cardinality was #. The size was #. │ │ + [ 2ecda] LONG │ │ + [ 2ecdf] A blank string was used as a module name │ │ + [ 2ed08] An Attempt to Write a File Failed │ │ + [ 2ed2a] SPICE(INVALIDTIMESTRING) │ │ + [ 2ed43] ftlnk │ │ + [ 2ed49] SPICE(DAFNOSUCHUNIT) │ │ + [ 2ed5e] DAFHFN │ │ + [ 2ed65] DAFFPA │ │ + [ 2ed6c] SPICE(DAFILLEGWRITE) │ │ + [ 2ed81] frmtab │ │ + [ 2ed88] rbas │ │ + [ 2ed8d] activc │ │ + [ 2ed94] selctp │ │ + [ 2ed9b] DASOPR │ │ + [ 2eda2] btlb │ │ + [ 2eda7] SPICE(AGENTLISTOVERFLOW) │ │ + [ 2edc0] GDPOOL │ │ + [ 2edc7] PIPOOL │ │ + [ 2edce] MAXAGT │ │ + [ 2edd5] INSLAC │ │ + [ 2eddc] kclsid │ │ + [ 2ede3] REPSUB error: RIGHT (#) must not exceed length of IN (#). │ │ + [ 2ee1d] chgirf_ │ │ + [ 2ee25] bases │ │ + [ 2ee2b] Array size must be positive; was #. │ │ + [ 2ee4f] CKE03 │ │ + [ 2ee55] Unexpected CK type 6 subtype # found in type 06 segment within mini-segment #. │ │ + [ 2eea4] The range of packets requested extends beyond the available packet data. The packet data is available for indexes 1 to #. You've requested data from # to #. │ │ + [ 2ef44] sgfrvi_ │ │ + [ 2ef4c] The string supplied to specify the reference frame is blank. The most common cause for this kind of error is an uninitialized variable. │ │ + [ 2efd6] spkgeo_ │ │ + [ 2efde] spke01_ │ │ + [ 2efe6] SPICE(BADRADIUS) │ │ + [ 2eff7] SPICE(BADINITSTATE) │ │ + [ 2f00b] spke18_ │ │ + [ 2f013] body-fixed frame associated with the ID code │ │ + [ 2f040] _SPEC │ │ + [ 2f046] zzbodker_ │ │ + [ 2f050] Could not add name # to the hash. │ │ + [ 2f072] strbff │ │ + [ 2f079] ZZDDHUNL │ │ + [ 2f082] The unit table is full and all entries are locked. This should never happen. Contact NAIF. │ │ + [ 2f0de] Kernel variable FRAME_#_# has length #; kernel variable FRAME_#_# has length #; maximum allowed length is #. Neither variable could be searched for in the kernel pool due to these name length errors. │ │ + [ 2f1a7] ABCORR │ │ + [ 2f1ae] itmtrg │ │ + [ 2f1b5] itmlat │ │ + [ 2f1bc] MEAN_EQUATOR_AND_EQUINOX_OF_DATE │ │ + [ 2f1dd] Definition of frame #, which belongs to parameterized dynamic frame family #, contains neither # nor # keywords; frames in this family require exactly one of these in their frame definitions. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 2f2fb] EPOCH │ │ + [ 2f301] Product of length of scaled axis #* and size of corresponding scaled component of POSITN is > *; these values may cause numeric overflow. │ │ + [ 2f38b] bestpt │ │ + [ 2f392] Substring bounds must be in range [1,#]. Actual range [BPOS,EPOS] was [#,#]. │ │ + [ 2f3df] locact │ │ + [ 2f3e6] NUM_CONSTRAINTS │ │ + [ 2f3f6] Class # from input column descriptor is not a supported character class. COLUMN = #; RECNO = #; SEGNO = #; EK = #. │ │ + [ 2f46a] ZZEKPGAN │ │ + [ 2f473] ZZEKPGWI │ │ + [ 2f47c] Column # is of type #; ZZEKRSI only works with integer columns. RECNO = #; SEGNO = #; EK = #. │ │ + [ 2f4db] Number of join row sets was #; valid range is 1:# │ │ + [ 2f50d] IAU_HIMALIA │ │ + [ 2f519] IAU_ANANKE │ │ + [ 2f524] IAU_DESDEMONA │ │ + [ 2f532] IAU_MEGACLITE │ │ + [ 2f540] ZZFRMCH1 │ │ + [ 2f549] The reference frame # has class #. This form of reference frame is not supported in version # of ZZFRMGT1. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ + [ 2f617] ZZHSIINI │ │ + [ 2f620] OBERON │ │ + [ 2f627] THALASSA │ │ + [ 2f630] HYDRA │ │ + [ 2f636] PIONEER-6 │ │ + [ 2f640] VK2 │ │ + [ 2f644] NEOS │ │ + [ 2f649] MERCURY MAGNETOSPHERIC ORBITER │ │ + [ 2f668] MARS SCIENCE LABORATORY │ │ + [ 2f680] MARS CLIMATE ORBITER │ │ + [ 2f695] HAYABUSA │ │ + [ 2f69e] M2020 │ │ + [ 2f6a4] JWST │ │ + [ 2f6a9] JAMES WEBB SPACE TELESCOPE │ │ + [ 2f6c4] MAVEN │ │ + [ 2f6ca] LICIA │ │ + [ 2f6d0] SHOEMAKER-LEVY 9-K │ │ + [ 2f6e3] SHOEMAKER 3 │ │ + [ 2f6ef] TEMPEL 1 │ │ + [ 2f6f8] SHOEMAKER-LEVY 9 │ │ + [ 2f709] DSS-33 │ │ + [ 2f710] DSS-46 │ │ + [ 2f717] ZZPINI │ │ + [ 2f71e] conv │ │ + [ 2f723] m. │ │ + [ 2f726] [s] │ │ + [ 2f72a] 'i │ │ + [ 2f72d] ,/-:d. │ │ + [ 2f734] i:i:i:n │ │ + [ 2f73c] dinmon │ │ + [ 2f743] SPICE(UNKNOWNMODE) │ │ + [ 2f756] ZZSPKEZ0 │ │ + [ 2f75f] zzspkez0_ │ │ + [ 2f769] ZZSPKGO0 │ │ + [ 2f772] # is not a legitimate time zone specification. │ │ + [ 2f7a2] The output string is not long enough to accommodate a number formatted according to the supplied format picture. The output string has length #. The output picture '#' requires # characters. │ │ + [ 2f862] pbegs │ │ + [ 2f868] "Year Abbreviation Mark" │ │ + [ 2f881] Right Parenthesis │ │ + [ 2f893] Wkd │ │ + [ 2f897] ampm │ │ + [ 2f89c] Two substrings indicating a day of month were identified in the input time string <#> and <#>: " │ │ + [ 2f8fd] Yimi:i │ │ + [ 2f904] i:nmiY │ │ + [ 2f90b] mDYH │ │ + [ 2f910] imi:iY │ │ + [ 2f917] miYn │ │ + [ 2f91c] ady │ │ + [ 2f920] cch │ │ + [ 2f924] chb │ │ + [ 2f928] dz │ │ + [ 2f92b] ebu │ │ + [ 2f92f] fa │ │ + [ 2f932] hit │ │ + [ 2f936] jam │ │ + [ 2f93a] kn │ │ + [ 2f93d] mdf │ │ + [ 2f941] mos │ │ + [ 2f945] nqo │ │ + [ 2f949] pag │ │ + [ 2f94d] qu │ │ + [ 2f950] sba │ │ + [ 2f954] te │ │ + [ 2f957] tem │ │ + [ 2f95b] tog │ │ + [ 2f95f] vro │ │ + [ 2f963] ybb │ │ + [ 2f967] za │ │ + [ 2f96a] bel │ │ + [ 2f96e] bam │ │ + [ 2f972] bod │ │ + [ 2f976] uzb │ │ + [ 2f97a] wol │ │ + [ 2f97e] IQ │ │ + [ 2f981] MR │ │ + [ 2f984] NE │ │ + [ 2f987] NG │ │ + [ 2f98a] CZE │ │ + [ 2f98e] FLK │ │ + [ 2f992] GAB │ │ + [ 2f996] HTI │ │ + [ 2f99a] IND │ │ + [ 2f99e] MMR │ │ + [ 2f9a2] nb_NO │ │ + [ 2f9a8] pt_BR │ │ + [ 2f9ae] ru_RU │ │ + [ 2f9b4] script │ │ + [ 2f9bb] YAKT │ │ + [ 2f9c0] Europe/Moscow │ │ + [ 2f9ce] Europe/Dublin │ │ + [ 2f9dc] UYT │ │ + [ 2f9e0] US/Mountain │ │ + [ 2f9ec] HADT │ │ + [ 2f9f1] ar_EG │ │ + [ 2f9f7] chr_US │ │ + [ 2f9fe] en_BZ │ │ + [ 2fa04] sr_Latn_ME │ │ + [ 2fa0f] nn_NO │ │ + [ 2fa15] oc_FR │ │ + [ 2fa1b] und-x- │ │ + [ 2fa22] i-default │ │ + [ 2fa2c] sgn-co │ │ + [ 2fa33] private- │ │ + [ 2fa3c] ICUDATA- │ │ + [ 2fa45] timezoneTypes │ │ + [ 2fa53] ucol_swap(formatVersion=4): unknown data at IX_RESERVED8_OFFSET\n │ │ + [ 2fa94] 000000000000^P00 │ │ + [ 2faa5] ucnv_open │ │ + [ 2faaf] calendar/ │ │ + [ 2fab9] era-name │ │ + [ 2fac2] midnight │ │ + [ 2facb] M08 │ │ + [ 2facf] keyTypePattern │ │ + [ 2fade] ubrk_swap(): data format %02x.%02x.%02x.%02x (format version %02x) is not recognized\n │ │ + [ 2fb34] uchar_swapNames(): too few bytes (%d after header) for unames.icu algorithmic range %u\n │ │ + [ 2fb8c] U_RESOURCE_TYPE_MISMATCH │ │ + [ 2fba5] U_REGEX_PATTERN_TOO_BIG │ │ + [ 2fbbd] CLF │ │ + [ 2fbc1] CNH │ │ + [ 2fbc5] DEM │ │ + [ 2fbc9] MOP │ │ + [ 2fbcd] SSP │ │ + [ 2fbd1] TPE │ │ + [ 2fbd5] XBC │ │ + [ 2fbd9] XRE │ │ + [ 2fbdd] Inexact │ │ + [ 2fbe5] named │ │ + [ 2fbeb] pixel │ │ + [ 2fbf1] meter │ │ + [ 2fbf7] jigger │ │ + [ 2fbfe] neuter │ │ + [ 2fc05] perMille │ │ + [ 2fc0e] tebi │ │ + [ 2fc13] dayperiod │ │ + [ 2fc1d] DurationRules │ │ + [ 2fc2b] tertiary │ │ + [ 2fc34] application of [suppressContractions [set]] failed │ │ + [ 2fc67] quoted literal text missing terminating apostrophe │ │ + [ 2fc9a] AuxExemplarCharacters │ │ + [ 2fcb0] measurementData │ │ + [ 2fcc0] geq │ │ + [ 2fcc4] postFrameCallback │ │ + [ 2fcd6] (JJ)V │ │ + [ 2fcdc] java/lang/ClassLoader │ │ + [ 2fcf2] Unable to create a temporary file to store DEX with Java classes. │ │ + [ 2fd34] ATrace_beginSection │ │ + [ 2fd48] enableBlockingWait │ │ + [ 2fd5b] Follow │ │ + [ 2fd62] Time: Forward │ │ + [ 2fd70] LeapSecondsFile │ │ + [ 2fd80] EclipseTextureSize │ │ + [ 2fd93] equatorial │ │ + [ 2fd9e] Error reading stars file\n │ │ + [ 2fdb8] Sample Rate: %d -> %d\n │ │ + [ 2fdd3] CHANNEL_BACK_RIGHT │ │ + [ 2fde6] CHANNEL_AUX_2 │ │ + [ 2fdf4] CHANNEL_AUX_15 │ │ + [ 2fe03] UNKNOWN │ │ + [ 2fe0b] Device or resource busy │ │ + [ 2fe23] Failed to open backend device │ │ + [ 2fe41] OSS │ │ + [ 2fe45] PulseAudio │ │ + [ 2fe50] AAudioStream_getChannelCount │ │ + [ 2fe6d] [OpenSL] Failed to initialize OpenSL engine. │ │ + [ 2fe9a] ITRK │ │ + [ 2fe9f] nrf │ │ + [ 2fea3] Tuesday │ │ + [ 2feab] Apr │ │ + [ 2feaf] atlasTex │ │ + [ 2feb8] beige │ │ + [ 2febe] honeydew │ │ + [ 2fec7] lavenderblush │ │ + [ 2fed5] royalblue │ │ + [ 2fedf] - │ │ + [ 2fee1] UPS │ │ + [ 2fee5] Upsilon │ │ + [ 2fef1] planetrings │ │ + [ 2fefd] galacticgrid │ │ + [ 2ff0a] i18nconstellations │ │ + [ 2ff1d] Planet │ │ + [ 2ff24] patera │ │ + [ 2ff2b] deleteview │ │ + [ 2ff36] name │ │ + [ 2ff3b] %d-%d-%dT%d:%d:%lf │ │ + [ 2ff4e] low │ │ + [ 2ff52] fadeafter │ │ + [ 2ff5c] brightness │ │ + [ 2ff67] No arguments expected for celestia:getscreendimension() │ │ + [ 2ff9f] First argument to celestia:setsafeareainsets() must be a number │ │ + [ 2ffdf] setconstellationcolor │ │ + [ 2fff5] getlabelcolor │ │ + [ 30003] synchronizetime │ │ + [ 30013] getdso │ │ + [ 3001a] Second argument to celestia:setconstellationcolor() must be a number │ │ + [ 3005f] Argument to celestia:getlinecolor() must be a string │ │ + [ 30094] One argument expected in celestia:settextureresolution │ │ + [ 300cb] class_image │ │ + [ 300d7] LINES │ │ + [ 300dd] SRC_ALPHA │ │ + [ 300e7] gl │ │ + [ 300ea] Four arguments expected for gl.Color() │ │ + [ 30111] argument 1 to gl.Translate must be a number │ │ + [ 3013d] argument 1 to gl.MatrixMode must be a number │ │ + [ 3016a] setorbitcoloroverridden │ │ + [ 30182] orbitframe │ │ + [ 3018d] getdensity │ │ + [ 30198] No arguments expected to function object:visible │ │ + [ 301c9] Arguments to object:removereferencemark() must be strings │ │ + [ 30203] No arguments expected to function object:type │ │ + [ 30231] diffuse │ │ + [ 30239] nebula │ │ + [ 30240] catalogNumber │ │ + [ 3024e] temperature │ │ + [ 3025a] setlocationflags │ │ + [ 3026b] startInterpolation │ │ + [ 3027e] First arg to observer:gotolonglat must be an object │ │ + [ 302b2] One argument required for rotate │ │ + [ 302d3] One argument required for orbit │ │ + [ 302f3] First argument to observer:center must be an object │ │ + [ 30327] getz │ │ + [ 3032c] __mul │ │ + [ 30332] hyperion │ │ + [ 3033b] Skipping out-of-order samples in {}.\n │ │ + [ 30361] Lep │ │ + [ 30365] UMa │ │ + [ 30369] Vel │ │ + [ 3036d] Sc │ │ + [ 30370] The galaxy template *** {} *** could not be loaded!\n │ │ + [ 303a5] pixelSize │ │ + [ 303af] y0 │ │ + [ 303b2] CA │ │ + [ 303b5] LB │ │ + [ 303b8] Unsupported mesh type found: {}\n │ │ + [ 303d9] Object has incorrect spice rotation syntax.\n │ │ + [ 30406] Invalid ending date specified for SPICE orbit.\n │ │ + [ 30436] linear │ │ + [ 3043d] Parabolic orbits are not supported.\n │ │ + [ 30462] Period must be specified in EllipticalOrbit.\n │ │ + [ 30490] Inclination │ │ + [ 3049c] Topocentric │ │ + [ 304a8] Object │ │ + [ 304af] arcsec │ │ + [ 304b6] /tmp/celestia-shaders.log │ │ + [ 304d0] color.a *= pointFade;\n │ │ + [ 304e7] diff.rgb += intensity * │ │ + [ 30500] vec3 color = vec3(0.0);\n │ │ + [ 30519] float h = max(0.0, length(atmSamplePoint) - atmosphereRadius.z);\n │ │ + [ 3055f] scatteredColor{} │ │ + [ 30570] in_Normal │ │ + [ 3057a] MieScaleHeight │ │ + [ 30589] CloudHeight │ │ + [ 30595] Invalid filename in NormalMap\n │ │ + [ 305b4] CELSTARS │ │ + [ 305bd] line {} │ │ + [ 305c5] ctx │ │ + [ 305c9] Failed to decompress DDS texture file {}.\n │ │ + [ 305f4] array │ │ + [ 305fa] OpenGL ES │ │ + [ 30605] " │ │ + [ 30607] Invalid scan script at entry %d │ │ + [ 30627] Application transferred too few scanlines │ │ + [ 30651] Start Of Scan: %d components │ │ + [ 3066e] Corrupt JPEG data: bad Huffman code │ │ + [ 30692] JSIMD_FORCENEON │ │ + [ 306a2] psaux │ │ + [ 306a8] closefile │ │ + [ 306b2] FontBBox │ │ + [ 306bb] NDV │ │ + [ 306bf] CID │ │ + [ 306c3] FDArray │ │ + [ 306cb] RESOLUTION_Y │ │ + [ 306d8] COMMENT │ │ + [ 306e0] FIGURE_WIDTH │ │ + [ 306ed] RAW_SMALL_CAP_SIZE │ │ + [ 30700] RAW_SUPERSCRIPT_SIZE │ │ + [ 30715] DWIDTH │ │ + [ 30725] IsFixedPitch │ │ + [ 30732] (*vararg) │ │ + [ 3073c] /dev/urandom │ │ + [ 30749] elseif │ │ + [ 30750] @%s │ │ + [ 30754] signal │ │ + [ 3075c] ctype^Gnumeric^Dtime^Gcollate^Hmonetary^A�^Call │ │ + [ 30786] module '%s' not found:%s │ │ + [ 3079f] sRGB │ │ + [ 307a4] out-of-date sRGB profile with no signature │ │ + [ 307cf] png_image_finish_read: invalid argument │ │ + [ 307f7] ga-alpha color-map: too few entries │ │ + [ 3081b] png_read_image: invalid transformations │ │ + [ 30843] invalid values │ │ + [ 30852] invalid data │ │ + [ 3085f] invalid chunk type │ │ + [ 30872] Invalid palette length │ │ + [ 30889] no rows for png_write_image to write │ │ + [ 308ae] Invalid bit depth for paletted image │ │ + [ 308d3] Invalid number of histogram entries specified │ │ + [ 30901] SPICE(NULLPOINTER) │ │ + [ 30914] SPICE(REFNOTREC) │ │ + [ 30925] EK │ │ + [ 30928] OLD FILES │ │ + [ 30932] ADD TO END │ │ + [ 3093d] PREPARE PARTIAL LIST │ │ + [ 30952] DAF/ │ │ + [ 30957] SPICE(DAFWRITEFAIL) │ │ + [ 3096b] DAFSIH │ │ + [ 30972] stnseg │ │ + [ 30979] DAFGH │ │ + [ 3097f] COLUMN_NUMBER_MISMATCH │ │ + [ 30996] NEXT_SEGMENT │ │ + [ 309a3] SPICE(EKCOLNUMMISMATCH) │ │ + [ 309bb] SPICE(BADATTRIBUTES) │ │ + [ 309d0] EKGC │ │ + [ 309d5] DASOPN │ │ + [ 309dc] NAIF/DAS │ │ + [ 309e5] rcbufi │ │ + [ 309ec] DASIOC │ │ + [ 309f3] DASUDI │ │ + [ 309fa] btbod │ │ + [ 30a00] pnames │ │ + [ 30a07] (1X,A) │ │ + [ 30a0e] The amount of room specified as available for output in the output array was: #. The amount of room must be positive. │ │ + [ 30a86] MAXLEN │ │ + [ 30a8d] unknown code in do_fio: %d\n │ │ %s\n │ │ - [ 30a7f] E+00 │ │ - [ 30a84] PXFORM │ │ - [ 30a8b] bididx │ │ - [ 30a92] IAU_EARTH │ │ - [ 30a9c] NINE │ │ - [ 30aa1] TWELVE │ │ - [ 30aa8] HUNDRED │ │ - [ 30ab0] The data type # is not currently supported. │ │ - [ 30adc] cke05_ │ │ - [ 30ae3] The segment is not a type 3 segment. Type is # │ │ - [ 30b13] IVEIX = #. │ │ - [ 30b1e] CLKSTR is blank. │ │ - [ 30b2f] cmp │ │ - [ 30b33] SCET01 │ │ - [ 30b3a] The string supplied to specify the reference frame, ('#') contains non-printing characters. The two most common causes for this kind of error are: 1. an error in the call to SPKGEO; 2. an uninitialized variable. │ │ - [ 30c10] etcal_ │ │ - [ 30c17] PROP2B │ │ - [ 30c1e] SPICE(DTOUTOFRANGE) │ │ - [ 30c32] Unexpected SPK type 18 subtype found in type 18 record. │ │ - [ 30c6a] SPKE10 │ │ - [ 30c71] hrmesp_ │ │ - [ 30c79] POLE_RA │ │ - [ 30c81] bdc │ │ - [ 30c85] buffi │ │ - [ 30c8b] CHKOUT: An attempt to check out was made when no modules were checked in. │ │ - [ 30cd5] TAI │ │ - [ 30cd9] JED │ │ - [ 30cdd] Size of un-validated set is too small. Size is #, size required is #. │ │ - [ 30d25] CARDD │ │ - [ 30d2b] The block size does not evenly divide both the number of rows and the number of columns. The block size is #; the number of rows is #; the number of columns is #. │ │ - [ 30dcf] ZZBODN2C │ │ - [ 30dd8] knmidx │ │ - [ 30ddf] ZZCTR │ │ - [ 30de5] Attempt to open file, '#', for write access has failed. This file utilizes the non-native binary file format '#'. At this time only files of the native format, '#', are supported for write access. See the Convert User's Guide for details. │ │ - [ 30ed7] utcst │ │ - [ 30edd] MEAN_ECLIPTIC_AND_EQUINOX_OF_DATE │ │ - [ 30eff] LATITUDINAL │ │ - [ 30f0b] ANGLE_SEP_TOL │ │ - [ 30f19] SPICE(INPUTSTOOLARGE) │ │ - [ 30f2f] Denominator in expression for SPOINT(#) is #. │ │ - [ 30f5d] ZZEKJPRP │ │ - [ 30f66] svops │ │ - [ 30f6c] Column # is not indexed. │ │ - [ 30f85] Invalid string bounds #:# for the alias of table #. │ │ - [ 30fb9] Column # is of type #; ZZEKRSC only works with integer columns. RECNO = #; SEGNO = #; EK = #. │ │ - [ 31018] String begin index must be in the range #:# but was #. │ │ - [ 3104f] SPICE(INDICESOUTOFORDER) │ │ - [ 31068] DASADC │ │ - [ 3106f] Start address BEG was #; valid range is 1:# │ │ - [ 3109b] Join row set # has row count #; valid range is 0:# │ │ - [ 310ce] IAU_PHOEBE │ │ - [ 310d9] IAU_CALLIRRHOE │ │ - [ 310e8] IAU_POLYMELE │ │ - [ 310f5] ZZGPNM │ │ - [ 310fc] The kernel pool does not have room for any more variables. │ │ - [ 31137] VENUS │ │ - [ 3113d] PASIPHAE │ │ - [ 31146] THEMISTO │ │ - [ 3114f] ERINOME │ │ - [ 31157] AITNE │ │ - [ 3115d] DIA │ │ - [ 31161] TITAN │ │ - [ 31167] TITANIA │ │ - [ 3116f] BIANCA │ │ - [ 31176] PROSPERO │ │ - [ 3117f] TRITON │ │ - [ 31186] NESO │ │ - [ 3118b] SOHO │ │ - [ 31190] PLANET-A │ │ - [ 31199] ULYSSES │ │ - [ 311a1] CURIOSITY │ │ - [ 311ab] GALILEO ORBITER │ │ - [ 311bb] DEEP IMPACT FLYBY SPACECRAFT │ │ - [ 311d8] CHURYUMOV-GERASIMENKO │ │ - [ 311ee] HARTLEY 2 │ │ - [ 311f8] KOWAL-VAVROVA │ │ - [ 31206] TOUTATIS │ │ - [ 3120f] DACTYL │ │ - [ 31216] NEW NORCIA │ │ - [ 31221] DSS-54 │ │ - [ 31228] ZZROTGT0 │ │ - [ 31231] The reference frame # has class #. This form of reference frame is not supported in version # of ZZROTGT0. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ - [ 312ff] *s* │ │ - [ 31303] i:n │ │ - [ 31307] DmY │ │ - [ 3130b] A kernel variable was not properly formed on line # of the text buffer. Such an assignment should have the form: ' [+]= '. More specifically, the assignment operator did not have one of the expected forms: '=' or '+='. The line was '#'. │ │ - [ 31411] Encountered '#' while attempting to parse a number on line # of the text buffer │ │ - [ 31461] YDF │ │ - [ 31466] DELTET/DELTA_AT │ │ - [ 31476] ZZDSCM │ │ - [ 3147d] zzspkez1_ │ │ - [ 31487] ZZSTELAB │ │ - [ 31490] clsids │ │ - [ 31497] FRAME_#_CENTER │ │ - [ 314a6] Kernel variable #, which specifies base frame applicability # times, was not provided for the switch frame having frame ID #, while the kernel variable # specifying base frame applicability # times was provided. Switch frame applicability start and stop times are optional, but both must be provided if either is. │ │ - [ 315e0] The seconds component of time must be less than 60 for any calendar representation of #. │ │ - [ 3163a] Decimal Number │ │ - [ 31649] EST │ │ - [ 3164d] Y-i-iti:i │ │ - [ 31657] Y*y* │ │ - [ 3165c] Yidi:i:i │ │ - [ 31665] H*MmDY │ │ - [ 3166c] YDmHMS │ │ - [ 31673] imin │ │ - [ 31678] i-i-iti │ │ - [ 31680] i-i-itix │ │ - [ 31689] The definition indices must lie in the range from 1 to 3. The value of INDEXA was #. The value of INDEXP was #. │ │ - [ 316fb] ZR │ │ - [ 316fe] hy__AREVELA │ │ - [ 3170a] bua │ │ - [ 3170e] fat │ │ - [ 31712] gd │ │ - [ 31715] hr │ │ - [ 31718] kum │ │ - [ 3171c] pt │ │ - [ 3171f] rw │ │ - [ 31722] se │ │ - [ 31725] sgs │ │ - [ 31729] shu │ │ - [ 3172d] tmh │ │ - [ 31731] tr │ │ - [ 31734] yo │ │ - [ 31737] zen │ │ - [ 3173b] KM │ │ - [ 3173e] SV │ │ - [ 31741] TV │ │ - [ 31744] AIA │ │ - [ 31748] BEL │ │ - [ 3174c] BWA │ │ - [ 31750] HUN │ │ - [ 31754] KNA │ │ - [ 31758] SEN │ │ - [ 3175c] VIR │ │ - [ 31760] ca_ES │ │ - [ 31766] es_419 │ │ - [ 3176d] sr_Cyrl_RS │ │ - [ 31778] zh_Hans_CN │ │ - [ 31783] ULAST │ │ - [ 31789] KRAST │ │ - [ 3178f] UYST │ │ - [ 31794] WGST │ │ - [ 31799] ZZ │ │ - [ 3179c] ar_TN │ │ - [ 317a2] en_JM │ │ - [ 317a8] es_NI │ │ - [ 317ae] fy_NL │ │ - [ 317b4] sr_Cyrl_ME │ │ - [ 317bf] ks_Deva_IN │ │ - [ 317ca] sd_Deva_IN │ │ - [ 317d5] smj_SE │ │ - [ 317dc] smn_FI │ │ - [ 317e3] timezone │ │ - [ 317ec] zh-cmn │ │ - [ 317f3] ja-latn-hepburn-heploc │ │ - [ 3180a] [BOGUS Trace Function Number] │ │ - [ 31828] ucol_open │ │ - [ 31832] day-narrow │ │ - [ 3183d] night1 │ │ - [ 31844] morning2 │ │ - [ 3184d] roc │ │ - [ 31851] islamic-rgsa │ │ - [ 3185e] icudt75l-lang │ │ - [ 3186c] modifier symbol │ │ - [ 3187c] embeddings │ │ - [ 31887] model │ │ - [ 3188d] U_MALFORMED_SYMBOL_REFERENCE │ │ - [ 318aa] U_VARIABLE_RANGE_OVERLAP │ │ - [ 318c3] U_MF_UNKNOWN_FUNCTION_ERROR │ │ - [ 318df] codeMap │ │ - [ 318e7] AOA │ │ - [ 318eb] BEF │ │ - [ 318ef] FKP │ │ - [ 318f3] GYD │ │ - [ 318f7] HRD │ │ - [ 318fb] HTG │ │ - [ 318ff] LAK │ │ - [ 31903] LVR │ │ - [ 31907] PEN │ │ - [ 3190b] XAU │ │ - [ 3190f] XBA │ │ - [ 31913] infinity │ │ - [ 3191c] M08L │ │ - [ 31921] @calendar=persian │ │ - [ 31933] acre │ │ - [ 31938] permyriad │ │ - [ 31942] mile-per-gallon-imperial │ │ - [ 3195b] calorie │ │ - [ 31963] electronvolt │ │ - [ 31970] kilohertz │ │ - [ 3197a] percentSign │ │ - [ 31986] unitQuantities │ │ - [ 31995] pico │ │ - [ 3199a] icudt75l-unit │ │ - [ 319a8] standard-short │ │ - [ 319b7] unit-short │ │ - [ 319c2] /currencyFormat │ │ - [ 319d2] timeData │ │ - [ 319db] Day-Of-Week │ │ - [ 319e7] Timezone │ │ - [ 319f0] CollationBuilder fields initialization failed │ │ - [ 31a1e] missing starred-relation string │ │ - [ 31a3e] systems │ │ - [ 31a46] void swappy::SwappyCommon::waitUntil(int32_t) │ │ - [ 31a74] eglClientWaitSyncKHR │ │ - [ 31a89] idle frames: │ │ - [ 31aa6] basic_string │ │ - [ 31ab3] Sync Orbit │ │ - [ 31abe] Lock │ │ - [ 31ac3] ExtrasDirectories │ │ - [ 31ad5] ShadowMapSize │ │ - [ 31ae3] WD │ │ - [ 31ae6] Supported Extensions:\n │ │ - [ 31afd] (nil) │ │ - [ 31b03] m/s │ │ - [ 31b07] Absolute magnitude: {:.1f}\n │ │ - [ 31b23] CHANNEL_BACK_CENTER │ │ - [ 31b37] CHANNEL_AUX_13 │ │ - [ 31b46] Name too long │ │ - [ 31b54] Broken pipe │ │ - [ 31b60] Custom │ │ - [ 31b67] AAudioStreamBuilder_setSharingMode │ │ - [ 31b8a] [OpenSL] Failed to allocate memory for data buffer. │ │ - [ 31bbe] acid │ │ - [ 31bc3] ISFT │ │ - [ 31bc8] %d %u %u %u:%u │ │ - [ 31bd9] Jan │ │ - [ 31bdd] Jun │ │ - [ 31be1] April │ │ - [ 31be7] October │ │ - [ 31bef] blue │ │ - [ 31bf4] darkgray │ │ - [ 31bfd] ghostwhite │ │ - [ 31c08] lightcoral │ │ - [ 31c13] palevioletred │ │ - [ 31c21] CON │ │ - [ 31c25] dwarfplanets │ │ - [ 31c32] Asteroid │ │ - [ 31c3b] labyrinthus │ │ - [ 31c47] lacuna │ │ - [ 31c4e] normal │ │ - [ 31c55] setradius │ │ - [ 31c5f] setorientation │ │ - [ 31c6e] target │ │ - [ 31c75] type │ │ - [ 31c7a] triangle │ │ - [ 31c83] colortopleft │ │ - [ 31c90] png │ │ - [ 31c94] Unknown line style: {}\n │ │ - [ 31cac] showlabel │ │ - [ 31cb6] setfaintestvisible │ │ - [ 31cc9] seekaudio │ │ - [ 31cd3] No arguments expected for celestia:getscreendp() │ │ - [ 31d04] Invalid number of arguments in celestia:hidelabel │ │ - [ 31d36] Invalid starstyle │ │ - [ 31d48] vegawhite │ │ - [ 31d52] Argument to celestia:settextureresolution must be a number │ │ - [ 31d8d] First arg to celestia:fromjulianday must be a number │ │ - [ 31dc2] year │ │ - [ 31dc7] Wrong number of arguments to function celestia:tdbtoutc │ │ - [ 31dff] One argument expected to function celestia:getstar │ │ - [ 31e32] Need one arguments for celestia:requestkeyboard │ │ - [ 31e62] Argument to celestia:createcelscript() must be a string │ │ - [ 31e9a] Fourth argument to celestia:play must be a number (loop) │ │ - [ 31ed3] Function celestia:playaudio requires two to seven arguments │ │ - [ 31f0f] Need one argument for celestia:setasterisms() │ │ - [ 31f3d] class_object │ │ - [ 31f4a] argument 4 to gl.Color must be a number │ │ - [ 31f72] One argument expected for gl.Disable() │ │ - [ 31f99] setvisible │ │ - [ 31fa4] gotodistance │ │ - [ 31fb1] endInterpolation │ │ - [ 31fc2] Third arg to observer:gotolonglat must be a number │ │ - [ 31ff5] Expected one or two arguments to observer:gotolocation │ │ - [ 3202c] Argument to phase:getposition() must be number │ │ - [ 3205b] Bad position addition! │ │ - [ 32072] No arguments expected for position:getx() │ │ - [ 3209c] One argument expected for rotation:transform() │ │ - [ 320cb] texture0 │ │ - [ 320d4] {} (offset {}) │ │ - [ 320e3] premultiplied\n │ │ - [ 320f2] specularmap "{}"\n │ │ - [ 32104] end_material\n │ │ - [ 32112] vsop87-mars │ │ - [ 3211e] vsop87-neptune │ │ - [ 3212d] iau-venus │ │ - [ 32137] iau-deimos │ │ - [ 32142] Error reading header of {}.\n │ │ - [ 3215f] Unsupported digits number {}, expected {} in {}.\n │ │ - [ 32191] viewDir │ │ - [ 32199] Ara │ │ - [ 3219d] models │ │ - [ 321a4] Error linking shader program:\n │ │ - [ 321c3] PE │ │ - [ 321c6] Ring │ │ - [ 321cb] Cosmodrome │ │ - [ 321d6] Size │ │ - [ 321db] CustomOrbit │ │ - [ 321e7] SampledOrientation │ │ - [ 321fa] Primary │ │ - [ 32202] Bad two-vector frame: constant vector has length zero\n │ │ - [ 32239] d │ │ - [ 3223b] mJ │ │ - [ 3223e] position = in_Position.xyz;\n │ │ - [ 3225b] direction │ │ - [ 32265] , ringPlane.xyz));\n │ │ - [ 32279] │ │ - [ 3227e] vec3 n = texture2D(normTex, │ │ - [ 3229b] float l;\n │ │ - [ 322a5] .y * eyeDir.y);\n │ │ - [ 322b6] varying {} {};\n │ │ - [ 322c6] diff.rgb += {} * │ │ - [ 322d8] shadow *= 1.0 - texture2D(cloudShadowTex, │ │ - [ 32303] atmSamplePoint = mix(atmEnter, atmLeave, 0.333);\n │ │ - [ 32339] Invalid Oblateness value for object {}: {}\n │ │ - [ 32365] MieAsymmetry │ │ - [ 32372] Rayleigh │ │ - [ 3237b] Q │ │ - [ 3237d] no orbit specified for star with OrbitBarycenter │ │ - [ 323ae] Can't open screen capture file '{}'\n │ │ - [ 323d3] 3DS file, {} bytes\n │ │ - [ 323e7] Skipping {} bytes of unknown/unexpected chunk type {}\n │ │ - [ 3241e] space/celestia/celestia/Destination │ │ - [ 32442] onRequestContextMenu │ │ - [ 32457] zh_TW │ │ - [ 3245d] celestia_ui │ │ - [ 32469] ../src/dispatch_egl.c │ │ - [ 3247f] Invalid color quantization mode change │ │ - [ 324a6] Unsupported marker type 0x%02x │ │ - [ 324c5] Quantizing to %d colors │ │ - [ 324dd] Invalid crop request │ │ - [ 324f2] FamilyOtherBlues │ │ - [ 32503] Oblique │ │ - [ 3250b] FONTNAME_REGISTRY │ │ - [ 3251d] MIN_SPACE │ │ - [ 32527] o O 0 │ │ - [ 3252d] upvalue │ │ - [ 32537] %s: │ │ - [ 3253b] repeat │ │ - [ 32542] >= │ │ - [ 32545] flush │ │ - [ 3254b] lib%s │ │ - [ 32551] Potential overflow in png_zalloc() │ │ - [ 32574] bad color-map processing (internal error) │ │ - [ 3259e] unexpected compose │ │ - [ 325b1] malformed sPLT chunk │ │ - [ 325c6] Invalid format for pCAL parameter │ │ - [ 325e8] Insufficient memory to process iCCP chunk │ │ - [ 32612] invalid compression buffer size │ │ - [ 32632] Valid palette required for paletted images │ │ - [ 3265d] PNG_TRANSFORM_STRIP_FILLER: BEFORE+AFTER not supported │ │ - [ 32694] pCAL: invalid keyword │ │ - [ 326aa] The @ file '#' specified by KERNELS_TO_LOAD in the file @ # │ │ - [ 326e6] ckbsr_ │ │ - [ 326ed] CKBSS │ │ - [ 326f3] CHECK LIST │ │ - [ 326fe] stpool │ │ - [ 32705] DAFONW │ │ - [ 3270c] direct │ │ - [ 32713] element │ │ - [ 3271b] could not be accommodated in the output │ │ - [ 32743] due │ │ - [ 32747] stnext │ │ - [ 3274e] The EK file # could not be loaded; themaximum allowed number of loaded columns already been reached. │ │ - [ 327b3] The table # is not currently loaded. │ │ - [ 327d8] EKGD │ │ - [ 327dd] DASFM │ │ - [ 327e3] ENCHAR │ │ - [ 327ea] tbfast │ │ - [ 327f1] tbrdon │ │ - [ 327f8] ADDRSS was #; valid range for type # is # to #. File was # │ │ - [ 32834] SPICE(VALUEOUTOFRANGE) │ │ - [ 3284b] LNKXSL │ │ - [ 32852] stdes │ │ - [ 32858] RTPOOL │ │ - [ 3285f] GIPOOL │ │ - [ 32866] REPSUB │ │ - [ 3286d] trans │ │ - [ 32873] IRFDEF │ │ - [ 3287a] mout │ │ - [ 3287f] Tolerance must be non-negative but was actually *. │ │ - [ 328b2] XVALS(#) = XVALS(#) = # │ │ - [ 328ca] ckr03_ │ │ - [ 328d1] Negative value for SCLK ticks: # │ │ - [ 328f2] SCLK_DATA_TYPE_# │ │ - [ 32903] spkcov_c │ │ - [ 3290c] refvel │ │ - [ 32913] A value of zero was found at index # of the step size vector. │ │ - [ 32952] You are attempting to locate type 9 or type 13 data in a type # data segment. │ │ - [ 329a0] SPICE(TOOFEWSTATES) │ │ - [ 329b4] spkr19_ │ │ - [ 329bc] SSIZEI │ │ - [ 329c3] NUT_PREC_DEC │ │ - [ 329d0] SPICE(ARRAYTOOSMALL) │ │ - [ 329e5] SPICE(ZEROFRAMEID) │ │ - [ 329f8] undelimited character string │ │ - [ 32a15] SPICE(BUG1) │ │ - [ 32a21] BOTH │ │ - [ 32a26] Unable to locate file associated with HANDLE, #. The most likely cause of this is the file that you are trying to read has been closed. │ │ - [ 32aaf] The attempt to load the file has failed, because the filename is blank. │ │ - [ 32af7] ZZDDHMNM │ │ - [ 32b00] ZZDSKLSF │ │ - [ 32b09] FAMILY │ │ - [ 32b10] Definition of frame # contains both # and # keywords; at most one of these must be present in the frame definition. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 32be2] RA/DEC │ │ - [ 32be9] SPICE(BADFRAMECOUNT) │ │ - [ 32bfe] xftemp │ │ - [ 32c05] The kernel variable # has used to define frame # was expected to have character data type but in fact has numeric data type. Usually this type of problem is due to an error in a frame definition provided in a frame kernel. │ │ - [ 32ce5] svcp2 │ │ - [ 32ceb] ZZEKLLTC │ │ - [ 32cf4] SPICE(WRONGARCHITECTURE) │ │ - [ 32d0d] String value has length #; output string can hold only # characters. COLUMN = #; SEGNO = #; RECNO = #; EK = # │ │ - [ 32d7c] F2C_CreateStr_Sig │ │ - [ 32d8e] IAU_ADRASTEA │ │ - [ 32d9b] IAU_CORDELIA │ │ - [ 32da8] IAU_GASPRA │ │ - [ 32db3] IAU_DONALDJOHANSON │ │ - [ 32dc6] ZZFRMCH0 │ │ - [ 32dcf] ZZHSIINF │ │ - [ 32dd8] EARTH MOON BARYCENTER │ │ - [ 32dee] URANUS BARYCENTER │ │ - [ 32e00] FARBAUTI │ │ - [ 32e09] UMBRIEL │ │ - [ 32e11] DESDEMONA │ │ - [ 32e1b] PLUTO │ │ - [ 32e21] VG2 │ │ - [ 32e25] HYB2 │ │ - [ 32e2a] GNS │ │ - [ 32e2e] GLL │ │ - [ 32e32] SOLAR PROBE PLUS │ │ - [ 32e43] DRAGONFLY │ │ - [ 32e4d] ADIT │ │ - [ 32e52] LUNAR FLASHLIGHT │ │ - [ 32e63] EXOMARS_LARA │ │ - [ 32e70] CONTOUR │ │ - [ 32e78] STV52 │ │ - [ 32e7e] RADIATION BELT STORM PROBE A │ │ - [ 32e9b] REINMUTH 2 │ │ - [ 32ea6] SHOEMAKER-LEVY 2 │ │ - [ 32eb7] METCALF-BREWINGTON │ │ - [ 32eca] EROS │ │ - [ 32ecf] MENOETIUS │ │ - [ 32ed9] CANBERRA │ │ - [ 32ee2] DSS-24 │ │ - [ 32ee9] DSS-25 │ │ - [ 32ef0] ZZNOFCON │ │ - [ 32ef9] rel │ │ - [ 32efd] ends │ │ - [ 32f02] J │ │ - [ 32f04] imH │ │ - [ 32f08] ZZSCUP01 │ │ - [ 32f11] ZZSCAD01 │ │ - [ 32f1a] Coefficient count for # must be multiple of 3 but was #. │ │ - [ 32f53] TLE elements suborbital. │ │ - [ 32f6c] SPICE(BADLEAPSECONDS) │ │ - [ 32f82] ZZDSPC │ │ - [ 32f89] ZZSPKAS0 │ │ - [ 32f92] ZZSPKGP0 │ │ - [ 32f9b] SPICE(SPKINVALIDOPTION) │ │ - [ 32fb3] FRAME_#_CLASS │ │ - [ 32fc1] SPICE(PARTIALFRAMESPEC) │ │ - [ 32fd9] dash │ │ - [ 32fde] Time System specification │ │ - [ 32ff8] There is a non-printing, non-tab character (ASCII #) at position # of the time string: │ │ - [ 33050] i-iti:i:n │ │ - [ 3305a] imiiii │ │ - [ 33061] i/i/i │ │ - [ 33067] i:i:ii/i/Y │ │ - [ 33072] BJ │ │ - [ 33075] hak │ │ - [ 33079] ccp │ │ - [ 3307d] crh │ │ - [ 33081] cv │ │ - [ 33084] efi │ │ - [ 33088] fit │ │ - [ 3308c] kl │ │ - [ 3308f] nb │ │ - [ 33092] pl │ │ - [ 33095] rof │ │ - [ 33099] ses │ │ - [ 3309d] ben │ │ - [ 330a1] guj │ │ - [ 330a5] lin │ │ - [ 330a9] orm │ │ - [ 330ad] snd │ │ - [ 330b1] AI │ │ - [ 330b4] EC │ │ - [ 330b7] GR │ │ - [ 330ba] GS │ │ - [ 330bd] KG │ │ - [ 330c0] ML │ │ - [ 330c3] ARE │ │ - [ 330c7] DNK │ │ - [ 330cb] KOR │ │ - [ 330cf] NIC │ │ - [ 330d3] kn_IN │ │ - [ 330d9] ky_KG │ │ - [ 330df] or_IN │ │ - [ 330e5] yue_HK │ │ - [ 330ec] zu_ZA │ │ - [ 330f2] /etc/localtime │ │ - [ 33101] CHADT │ │ - [ 33107] SAKT │ │ - [ 3310c] YEKST │ │ - [ 33112] AMST │ │ - [ 33117] WAST │ │ - [ 3311c] America/Asuncion │ │ - [ 3312d] XB │ │ - [ 33130] distances │ │ - [ 3313a] es_CL │ │ - [ 33140] es_CR │ │ - [ 33146] gsw_FR │ │ - [ 3314d] ha_Latn_NG │ │ - [ 33158] mn_Mong_MN │ │ - [ 33163] gaz_ET │ │ - [ 3316a] quz_BO │ │ - [ 33171] rw_RW │ │ - [ 33177] ta_LK │ │ - [ 3317d] ug_Arab_CN │ │ - [ 33188] uz_Cyrl │ │ - [ 33190] ven_ZA │ │ - [ 33197] zh_Hant_MO │ │ - [ 331a2] i-lux │ │ - [ 331a8] i-tay │ │ - [ 331ae] zh-guoyu │ │ - [ 331b7] und-x-i-enochian │ │ - [ 331c8] sgn-ni │ │ - [ 331cf] cmn-hans │ │ - [ 331d8] InstalledLocales │ │ - [ 331e9] ures_swap(): too few indexes for a 1.1+ resource bundle\n │ │ - [ 33222] .dat │ │ - [ 33227] calendar/gregorian/DateTimePatterns │ │ - [ 3324b] month-standalone-except-narrow │ │ - [ 3326a] evening2 │ │ - [ 33273] Languages%short │ │ - [ 33283] U_USING_FALLBACK_WARNING │ │ - [ 3329c] U_STATE_OLD_WARNING │ │ - [ 332b0] U_UNDEFINED_KEYWORD │ │ - [ 332c4] U_REGEX_BAD_INTERVAL │ │ - [ 332d9] DOP │ │ - [ 332dd] ECS │ │ - [ 332e1] KES │ │ - [ 332e5] PKR │ │ - [ 332e9] SCR │ │ - [ 332ed] XFO │ │ - [ 332f1] finalYear │ │ - [ 332fb] Invalid context │ │ - [ 3330b] 2.302585092994045684017991454684364207601 │ │ - [ 33335] M13 │ │ - [ 33339] eras │ │ - [ 3333e] hectare │ │ - [ 33346] permille │ │ - [ 3334f] BGK │ │ - [ 33353] UYN │ │ - [ 33357] gigabit │ │ - [ 3335f] nanosecond │ │ - [ 3336a] pound-force-per-square-inch │ │ - [ 33386] vocative │ │ - [ 3338f] two │ │ - [ 33393] rules │ │ - [ 33399] quetta │ │ - [ 333a0] ronna │ │ - [ 333a6] prefix │ │ - [ 333ad] Quarter │ │ - [ 333b5] non-ignorable │ │ - [ 333c3] contractions starting with conjoining Jamo L or V not supported │ │ - [ 33403] dayPeriods │ │ - [ 3340e] uksystem │ │ - [ 33417] AChoreographerFrameCallbackData_getFrameTimelineExpectedPresentationTimeNanos │ │ - [ 33465] virtual void swappy::ChoreographerThread::onChoreographer(std::optional) │ │ - [ 334c8] loadClass │ │ - [ 334d2] Unable to find dalvik/system/PathClassLoader. │ │ - [ 33500] Unable to find %s class │ │ - [ 33518] Unable to load NDK tracing APIs │ │ - [ 33538] Hardware │ │ - [ 33541] (JLandroid/app/Activity;)V │ │ - [ 3355c] ExpectedLatency │ │ - [ 3356c] eglSwapBuffers │ │ - [ 3357b] favorites.cel │ │ - [ 33589] Error reading favorites file {}.\n │ │ - [ 335ab] Orientation: [{}, {}, {}], {:.1f}\n │ │ - [ 335ce] Star color: Blackbody D65 │ │ - [ 335e8] Light travel time: {:.4f} yr │ │ - [ 33606] Unable to capture a frame!\n │ │ - [ 33622] LogSize │ │ - [ 3362a] LabelFont │ │ - [ 33634] Point size range: %s - %s\n │ │ - [ 3364f] NAN │ │ - [ 33653] Unknown measurement system {}, fallback to Metric system │ │ - [ 3368c] FPS: {:.1f}\n │ │ - [ 33699] {:.6g} x slower │ │ - [ 336a9] Lock %s -> %s\n │ │ - [ 336b8] Speed: {} {}\n │ │ - [ 336c6] ro.build.version.sdk │ │ - [ 336db] System Architecture:\n │ │ - [ 336f1] Post Format Conversion: %s\n │ │ - [ 33713] Resampling: %s\n │ │ - [ 33735] Playback │ │ - [ 3373e] CHANNEL_AUX_28 │ │ - [ 3374d] CHANNEL_AUX_29 │ │ - [ 3375c] CHANNEL_AUX_30 │ │ - [ 3376b] CHANNEL_AUX_31 │ │ - [ 3377a] At end │ │ - [ 33781] Too many links │ │ - [ 33790] Share mode not supported │ │ - [ 337a9] libOpenSLES.so │ │ - [ 337b8] SL_IID_ENGINE │ │ - [ 337c6] [OpenSL] Failed to stop internal capture device. │ │ - [ 337f7] data │ │ - [ 337fc] smpl │ │ - [ 33801] IART │ │ - [ 33806] &track= │ │ - [ 3380e] Invalid URL version "{}"!\n │ │ - [ 33829] y │ │ - [ 3382b] PhaseLock │ │ - [ 33835] URL parameter must look like key=value\n │ │ - [ 3385d] %d-%u-%uT%u:%u:%lf │ │ - [ 33870] %d %u %u │ │ - [ 3387b] December │ │ - [ 33884] .xyzv │ │ - [ 3388a] NU │ │ - [ 3388d] Zeta │ │ - [ 33892] asteroids │ │ - [ 3389c] ringshadows │ │ - [ 338a8] catena │ │ - [ 338af] setringstexture │ │ - [ 338bf] changedistance │ │ - [ 338ce] distance │ │ - [ 338d7] right │ │ - [ 338dd] AmbientLightLevel │ │ - [ 338ef] StarDistanceLimit │ │ - [ 33901] Unknown label style: {}\n │ │ - [ 3391a] Bad celestia object! │ │ - [ 3392f] gettintsaturation │ │ - [ 33941] getstardistancelimit │ │ - [ 33956] setstardistancelimit │ │ - [ 3396b] setstarcolor │ │ - [ 33978] newvector │ │ - [ 33982] One or two arguments expected to function celestia:flash │ │ - [ 339bb] First argument to celestia:gettextwidth must be a string │ │ - [ 339f4] Values in table-argument to celestia:showconstellations() must be strings │ │ - [ 33a3e] Argument to celestia:mark must be an object │ │ - [ 33a6a] One argument expected in celestia:setminorbitsize │ │ - [ 33a9c] Second argument for celestia:registereventhandler must be a function or nil │ │ - [ 33ae8] One to Six arguments expected to function celestia:overlay │ │ - [ 33b23] First argument to celestia:overlay must be a number (duration) │ │ - [ 33b62] First argument for celestia:playaudio must be a number │ │ - [ 33b99] No arguments expected to function celestia:getfont │ │ - [ 33bcc] celestia-appcore │ │ - [ 33bdd] Unknown script error │ │ - [ 33bf2] Disable │ │ - [ 33bfa] argument 3 to gl.Ortho must be a number │ │ - [ 33c22] No arguments expected for gl.LoadIdentity() │ │ - [ 33c4e] No arguments expected for gl.PushMatrix() │ │ - [ 33c78] No arguments expected for font:getheight() │ │ - [ 33ca3] Error while parsing CEL-script: │ │ - [ 33cc4] getinfo │ │ - [ 33ccc] absmag │ │ - [ 33cd3] getposition │ │ - [ 33cdf] Argument 1 to object:setorbitcolor() must be a number │ │ - [ 33d15] asteroid │ │ - [ 33d1e] One or no arguments allowed for to object:bodyframe │ │ - [ 33d52] One argument required for phase:getposition │ │ - [ 33d7e] slerp: first argument must be a rotation │ │ - [ 33da7] texcoord0 │ │ - [ 33db1] titania │ │ - [ 33db9] vsop87-jupiter │ │ - [ 33dc8] iau-miranda │ │ - [ 33dd4] pointHeight │ │ - [ 33de0] Dra │ │ - [ 33de4] Ser │ │ - [ 33de8] FO │ │ - [ 33deb] FL │ │ - [ 33dee] Capital │ │ - [ 33df6] warp │ │ - [ 33dfb] Mesh │ │ - [ 33e00] SpiceOrbit │ │ - [ 33e0b] LongLat │ │ - [ 33e13] Object has incorrect scripted rotation syntax.\n │ │ - [ 33e43] Origin │ │ - [ 33e4a] Attempting to load sampled trajectory from source '{}'\n │ │ - [ 33e82] BodyFixed │ │ - [ 33e8c] rS │ │ - [ 33e8f] = vec2(diffTexCoord.x + cloudShadowTexOffset, diffTexCoord.y);\n │ │ - [ 33ed0] vec4 diff = vec4(1.0);\n │ │ - [ 33ee8] shadow = min(1.0, shadow + step(0.0, │ │ - [ 33f0e] v_TexCoord0 │ │ - [ 33f1a] {}{}{}{}{}\n │ │ - [ 33f26] layout({}) in;\n │ │ + [ 30aac] E+00 │ │ + [ 30ab1] PXFORM │ │ + [ 30ab8] bididx │ │ + [ 30abf] IAU_EARTH │ │ + [ 30ac9] NINE │ │ + [ 30ace] TWELVE │ │ + [ 30ad5] HUNDRED │ │ + [ 30add] The data type # is not currently supported. │ │ + [ 30b09] cke05_ │ │ + [ 30b10] The segment is not a type 3 segment. Type is # │ │ + [ 30b40] IVEIX = #. │ │ + [ 30b4b] CLKSTR is blank. │ │ + [ 30b5c] cmp │ │ + [ 30b60] SCET01 │ │ + [ 30b67] The string supplied to specify the reference frame, ('#') contains non-printing characters. The two most common causes for this kind of error are: 1. an error in the call to SPKGEO; 2. an uninitialized variable. │ │ + [ 30c3d] etcal_ │ │ + [ 30c44] PROP2B │ │ + [ 30c4b] SPICE(DTOUTOFRANGE) │ │ + [ 30c5f] Unexpected SPK type 18 subtype found in type 18 record. │ │ + [ 30c97] SPKE10 │ │ + [ 30c9e] hrmesp_ │ │ + [ 30ca6] POLE_RA │ │ + [ 30cae] bdc │ │ + [ 30cb2] buffi │ │ + [ 30cb8] CHKOUT: An attempt to check out was made when no modules were checked in. │ │ + [ 30d02] TAI │ │ + [ 30d06] JED │ │ + [ 30d0a] Size of un-validated set is too small. Size is #, size required is #. │ │ + [ 30d52] CARDD │ │ + [ 30d58] The block size does not evenly divide both the number of rows and the number of columns. The block size is #; the number of rows is #; the number of columns is #. │ │ + [ 30dfc] ZZBODN2C │ │ + [ 30e05] knmidx │ │ + [ 30e0c] ZZCTR │ │ + [ 30e12] Attempt to open file, '#', for write access has failed. This file utilizes the non-native binary file format '#'. At this time only files of the native format, '#', are supported for write access. See the Convert User's Guide for details. │ │ + [ 30f04] utcst │ │ + [ 30f0a] MEAN_ECLIPTIC_AND_EQUINOX_OF_DATE │ │ + [ 30f2c] LATITUDINAL │ │ + [ 30f38] ANGLE_SEP_TOL │ │ + [ 30f46] SPICE(INPUTSTOOLARGE) │ │ + [ 30f5c] Denominator in expression for SPOINT(#) is #. │ │ + [ 30f8a] ZZEKJPRP │ │ + [ 30f93] svops │ │ + [ 30f99] Column # is not indexed. │ │ + [ 30fb2] Invalid string bounds #:# for the alias of table #. │ │ + [ 30fe6] Column # is of type #; ZZEKRSC only works with integer columns. RECNO = #; SEGNO = #; EK = #. │ │ + [ 31045] String begin index must be in the range #:# but was #. │ │ + [ 3107c] SPICE(INDICESOUTOFORDER) │ │ + [ 31095] DASADC │ │ + [ 3109c] Start address BEG was #; valid range is 1:# │ │ + [ 310c8] Join row set # has row count #; valid range is 0:# │ │ + [ 310fb] IAU_PHOEBE │ │ + [ 31106] IAU_CALLIRRHOE │ │ + [ 31115] IAU_POLYMELE │ │ + [ 31122] ZZGPNM │ │ + [ 31129] The kernel pool does not have room for any more variables. │ │ + [ 31164] VENUS │ │ + [ 3116a] PASIPHAE │ │ + [ 31173] THEMISTO │ │ + [ 3117c] ERINOME │ │ + [ 31184] AITNE │ │ + [ 3118a] DIA │ │ + [ 3118e] TITAN │ │ + [ 31194] TITANIA │ │ + [ 3119c] BIANCA │ │ + [ 311a3] PROSPERO │ │ + [ 311ac] TRITON │ │ + [ 311b3] NESO │ │ + [ 311b8] SOHO │ │ + [ 311bd] PLANET-A │ │ + [ 311c6] ULYSSES │ │ + [ 311ce] CURIOSITY │ │ + [ 311d8] GALILEO ORBITER │ │ + [ 311e8] DEEP IMPACT FLYBY SPACECRAFT │ │ + [ 31205] CHURYUMOV-GERASIMENKO │ │ + [ 3121b] HARTLEY 2 │ │ + [ 31225] KOWAL-VAVROVA │ │ + [ 31233] TOUTATIS │ │ + [ 3123c] DACTYL │ │ + [ 31243] NEW NORCIA │ │ + [ 3124e] DSS-54 │ │ + [ 31255] ZZROTGT0 │ │ + [ 3125e] The reference frame # has class #. This form of reference frame is not supported in version # of ZZROTGT0. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ + [ 3132c] *s* │ │ + [ 31330] i:n │ │ + [ 31334] DmY │ │ + [ 31338] A kernel variable was not properly formed on line # of the text buffer. Such an assignment should have the form: ' [+]= '. More specifically, the assignment operator did not have one of the expected forms: '=' or '+='. The line was '#'. │ │ + [ 3143e] Encountered '#' while attempting to parse a number on line # of the text buffer │ │ + [ 3148e] YDF │ │ + [ 31493] DELTET/DELTA_AT │ │ + [ 314a3] ZZDSCM │ │ + [ 314aa] zzspkez1_ │ │ + [ 314b4] ZZSTELAB │ │ + [ 314bd] clsids │ │ + [ 314c4] FRAME_#_CENTER │ │ + [ 314d3] Kernel variable #, which specifies base frame applicability # times, was not provided for the switch frame having frame ID #, while the kernel variable # specifying base frame applicability # times was provided. Switch frame applicability start and stop times are optional, but both must be provided if either is. │ │ + [ 3160d] The seconds component of time must be less than 60 for any calendar representation of #. │ │ + [ 31667] Decimal Number │ │ + [ 31676] EST │ │ + [ 3167a] Y-i-iti:i │ │ + [ 31684] Y*y* │ │ + [ 31689] Yidi:i:i │ │ + [ 31692] H*MmDY │ │ + [ 31699] YDmHMS │ │ + [ 316a0] imin │ │ + [ 316a5] i-i-iti │ │ + [ 316ad] i-i-itix │ │ + [ 316b6] The definition indices must lie in the range from 1 to 3. The value of INDEXA was #. The value of INDEXP was #. │ │ + [ 31728] ZR │ │ + [ 3172b] hy__AREVELA │ │ + [ 31737] bua │ │ + [ 3173b] fat │ │ + [ 3173f] gd │ │ + [ 31742] hr │ │ + [ 31745] kum │ │ + [ 31749] pt │ │ + [ 3174c] rw │ │ + [ 3174f] se │ │ + [ 31752] sgs │ │ + [ 31756] shu │ │ + [ 3175a] tmh │ │ + [ 3175e] tr │ │ + [ 31761] yo │ │ + [ 31764] zen │ │ + [ 31768] KM │ │ + [ 3176b] SV │ │ + [ 3176e] TV │ │ + [ 31771] AIA │ │ + [ 31775] BEL │ │ + [ 31779] BWA │ │ + [ 3177d] HUN │ │ + [ 31781] KNA │ │ + [ 31785] SEN │ │ + [ 31789] VIR │ │ + [ 3178d] ca_ES │ │ + [ 31793] es_419 │ │ + [ 3179a] sr_Cyrl_RS │ │ + [ 317a5] zh_Hans_CN │ │ + [ 317b0] ULAST │ │ + [ 317b6] KRAST │ │ + [ 317bc] UYST │ │ + [ 317c1] WGST │ │ + [ 317c6] ZZ │ │ + [ 317c9] ar_TN │ │ + [ 317cf] en_JM │ │ + [ 317d5] es_NI │ │ + [ 317db] fy_NL │ │ + [ 317e1] sr_Cyrl_ME │ │ + [ 317ec] ks_Deva_IN │ │ + [ 317f7] sd_Deva_IN │ │ + [ 31802] smj_SE │ │ + [ 31809] smn_FI │ │ + [ 31810] timezone │ │ + [ 31819] zh-cmn │ │ + [ 31820] ja-latn-hepburn-heploc │ │ + [ 31837] [BOGUS Trace Function Number] │ │ + [ 31855] ucol_open │ │ + [ 3185f] day-narrow │ │ + [ 3186a] night1 │ │ + [ 31871] morning2 │ │ + [ 3187a] roc │ │ + [ 3187e] islamic-rgsa │ │ + [ 3188b] icudt75l-lang │ │ + [ 31899] modifier symbol │ │ + [ 318a9] embeddings │ │ + [ 318b4] model │ │ + [ 318ba] U_MALFORMED_SYMBOL_REFERENCE │ │ + [ 318d7] U_VARIABLE_RANGE_OVERLAP │ │ + [ 318f0] U_MF_UNKNOWN_FUNCTION_ERROR │ │ + [ 3190c] codeMap │ │ + [ 31914] AOA │ │ + [ 31918] BEF │ │ + [ 3191c] FKP │ │ + [ 31920] GYD │ │ + [ 31924] HRD │ │ + [ 31928] HTG │ │ + [ 3192c] LAK │ │ + [ 31930] LVR │ │ + [ 31934] PEN │ │ + [ 31938] XAU │ │ + [ 3193c] XBA │ │ + [ 31940] infinity │ │ + [ 31949] M08L │ │ + [ 3194e] @calendar=persian │ │ + [ 31960] acre │ │ + [ 31965] permyriad │ │ + [ 3196f] mile-per-gallon-imperial │ │ + [ 31988] calorie │ │ + [ 31990] electronvolt │ │ + [ 3199d] kilohertz │ │ + [ 319a7] percentSign │ │ + [ 319b3] unitQuantities │ │ + [ 319c2] pico │ │ + [ 319c7] icudt75l-unit │ │ + [ 319d5] standard-short │ │ + [ 319e4] unit-short │ │ + [ 319ef] /currencyFormat │ │ + [ 319ff] timeData │ │ + [ 31a08] Day-Of-Week │ │ + [ 31a14] Timezone │ │ + [ 31a1d] CollationBuilder fields initialization failed │ │ + [ 31a4b] missing starred-relation string │ │ + [ 31a6b] systems │ │ + [ 31a73] void swappy::SwappyCommon::waitUntil(int32_t) │ │ + [ 31aa1] eglClientWaitSyncKHR │ │ + [ 31ab6] idle frames: │ │ + [ 31ad3] basic_string │ │ + [ 31ae0] Sync Orbit │ │ + [ 31aeb] Lock │ │ + [ 31af0] ExtrasDirectories │ │ + [ 31b02] ShadowMapSize │ │ + [ 31b10] WD │ │ + [ 31b13] Supported Extensions:\n │ │ + [ 31b2a] (nil) │ │ + [ 31b30] m/s │ │ + [ 31b34] Absolute magnitude: {:.1f}\n │ │ + [ 31b50] CHANNEL_BACK_CENTER │ │ + [ 31b64] CHANNEL_AUX_13 │ │ + [ 31b73] Name too long │ │ + [ 31b81] Broken pipe │ │ + [ 31b8d] Custom │ │ + [ 31b94] AAudioStreamBuilder_setSharingMode │ │ + [ 31bb7] [OpenSL] Failed to allocate memory for data buffer. │ │ + [ 31beb] acid │ │ + [ 31bf0] ISFT │ │ + [ 31bf5] %d %u %u %u:%u │ │ + [ 31c06] Jan │ │ + [ 31c0a] Jun │ │ + [ 31c0e] April │ │ + [ 31c14] October │ │ + [ 31c1c] blue │ │ + [ 31c21] darkgray │ │ + [ 31c2a] ghostwhite │ │ + [ 31c35] lightcoral │ │ + [ 31c40] palevioletred │ │ + [ 31c4e] CON │ │ + [ 31c52] dwarfplanets │ │ + [ 31c5f] Asteroid │ │ + [ 31c68] labyrinthus │ │ + [ 31c74] lacuna │ │ + [ 31c7b] normal │ │ + [ 31c82] setradius │ │ + [ 31c8c] setorientation │ │ + [ 31c9b] target │ │ + [ 31ca2] type │ │ + [ 31ca7] triangle │ │ + [ 31cb0] colortopleft │ │ + [ 31cbd] png │ │ + [ 31cc1] Unknown line style: {}\n │ │ + [ 31cd9] showlabel │ │ + [ 31ce3] setfaintestvisible │ │ + [ 31cf6] seekaudio │ │ + [ 31d00] No arguments expected for celestia:getscreendp() │ │ + [ 31d31] Invalid number of arguments in celestia:hidelabel │ │ + [ 31d63] Invalid starstyle │ │ + [ 31d75] vegawhite │ │ + [ 31d7f] Argument to celestia:settextureresolution must be a number │ │ + [ 31dba] First arg to celestia:fromjulianday must be a number │ │ + [ 31def] year │ │ + [ 31df4] Wrong number of arguments to function celestia:tdbtoutc │ │ + [ 31e2c] One argument expected to function celestia:getstar │ │ + [ 31e5f] Need one arguments for celestia:requestkeyboard │ │ + [ 31e8f] Argument to celestia:createcelscript() must be a string │ │ + [ 31ec7] Fourth argument to celestia:play must be a number (loop) │ │ + [ 31f00] Function celestia:playaudio requires two to seven arguments │ │ + [ 31f3c] Need one argument for celestia:setasterisms() │ │ + [ 31f6a] class_object │ │ + [ 31f77] argument 4 to gl.Color must be a number │ │ + [ 31f9f] One argument expected for gl.Disable() │ │ + [ 31fc6] setvisible │ │ + [ 31fd1] gotodistance │ │ + [ 31fde] endInterpolation │ │ + [ 31fef] Third arg to observer:gotolonglat must be a number │ │ + [ 32022] Expected one or two arguments to observer:gotolocation │ │ + [ 32059] Argument to phase:getposition() must be number │ │ + [ 32088] Bad position addition! │ │ + [ 3209f] No arguments expected for position:getx() │ │ + [ 320c9] One argument expected for rotation:transform() │ │ + [ 320f8] texture0 │ │ + [ 32101] {} (offset {}) │ │ + [ 32110] premultiplied\n │ │ + [ 3211f] specularmap "{}"\n │ │ + [ 32131] end_material\n │ │ + [ 3213f] vsop87-mars │ │ + [ 3214b] vsop87-neptune │ │ + [ 3215a] iau-venus │ │ + [ 32164] iau-deimos │ │ + [ 3216f] Error reading header of {}.\n │ │ + [ 3218c] Unsupported digits number {}, expected {} in {}.\n │ │ + [ 321be] viewDir │ │ + [ 321c6] Ara │ │ + [ 321ca] models │ │ + [ 321d1] Error linking shader program:\n │ │ + [ 321f0] PE │ │ + [ 321f3] Ring │ │ + [ 321f8] Cosmodrome │ │ + [ 32203] Size │ │ + [ 32208] CustomOrbit │ │ + [ 32214] SampledOrientation │ │ + [ 32227] Primary │ │ + [ 3222f] Bad two-vector frame: constant vector has length zero\n │ │ + [ 32266] d │ │ + [ 32268] mJ │ │ + [ 3226b] position = in_Position.xyz;\n │ │ + [ 32288] direction │ │ + [ 32292] , ringPlane.xyz));\n │ │ + [ 322a6] │ │ + [ 322ab] vec3 n = texture2D(normTex, │ │ + [ 322c8] float l;\n │ │ + [ 322d2] .y * eyeDir.y);\n │ │ + [ 322e3] varying {} {};\n │ │ + [ 322f3] diff.rgb += {} * │ │ + [ 32305] shadow *= 1.0 - texture2D(cloudShadowTex, │ │ + [ 32330] atmSamplePoint = mix(atmEnter, atmLeave, 0.333);\n │ │ + [ 32366] Invalid Oblateness value for object {}: {}\n │ │ + [ 32392] MieAsymmetry │ │ + [ 3239f] Rayleigh │ │ + [ 323a8] Q │ │ + [ 323aa] no orbit specified for star with OrbitBarycenter │ │ + [ 323db] Can't open screen capture file '{}'\n │ │ + [ 32400] 3DS file, {} bytes\n │ │ + [ 32414] Skipping {} bytes of unknown/unexpected chunk type {}\n │ │ + [ 3244b] space/celestia/celestia/Destination │ │ + [ 3246f] onRequestContextMenu │ │ + [ 32484] zh_TW │ │ + [ 3248a] celestia_ui │ │ + [ 32496] ../src/dispatch_egl.c │ │ + [ 324ac] Invalid color quantization mode change │ │ + [ 324d3] Unsupported marker type 0x%02x │ │ + [ 324f2] Quantizing to %d colors │ │ + [ 3250a] Invalid crop request │ │ + [ 3251f] FamilyOtherBlues │ │ + [ 32530] Oblique │ │ + [ 32538] FONTNAME_REGISTRY │ │ + [ 3254a] MIN_SPACE │ │ + [ 32554] o O 0 │ │ + [ 3255a] upvalue │ │ + [ 32564] %s: │ │ + [ 32568] repeat │ │ + [ 3256f] >= │ │ + [ 32572] flush │ │ + [ 32578] lib%s │ │ + [ 3257e] Potential overflow in png_zalloc() │ │ + [ 325a1] bad color-map processing (internal error) │ │ + [ 325cb] unexpected compose │ │ + [ 325de] malformed sPLT chunk │ │ + [ 325f3] Invalid format for pCAL parameter │ │ + [ 32615] Insufficient memory to process iCCP chunk │ │ + [ 3263f] invalid compression buffer size │ │ + [ 3265f] Valid palette required for paletted images │ │ + [ 3268a] PNG_TRANSFORM_STRIP_FILLER: BEFORE+AFTER not supported │ │ + [ 326c1] pCAL: invalid keyword │ │ + [ 326d7] The @ file '#' specified by KERNELS_TO_LOAD in the file @ # │ │ + [ 32713] ckbsr_ │ │ + [ 3271a] CKBSS │ │ + [ 32720] CHECK LIST │ │ + [ 3272b] stpool │ │ + [ 32732] DAFONW │ │ + [ 32739] direct │ │ + [ 32740] element │ │ + [ 32748] could not be accommodated in the output │ │ + [ 32770] due │ │ + [ 32774] stnext │ │ + [ 3277b] The EK file # could not be loaded; themaximum allowed number of loaded columns already been reached. │ │ + [ 327e0] The table # is not currently loaded. │ │ + [ 32805] EKGD │ │ + [ 3280a] DASFM │ │ + [ 32810] ENCHAR │ │ + [ 32817] tbfast │ │ + [ 3281e] tbrdon │ │ + [ 32825] ADDRSS was #; valid range for type # is # to #. File was # │ │ + [ 32861] SPICE(VALUEOUTOFRANGE) │ │ + [ 32878] LNKXSL │ │ + [ 3287f] stdes │ │ + [ 32885] RTPOOL │ │ + [ 3288c] GIPOOL │ │ + [ 32893] REPSUB │ │ + [ 3289a] trans │ │ + [ 328a0] IRFDEF │ │ + [ 328a7] mout │ │ + [ 328ac] Tolerance must be non-negative but was actually *. │ │ + [ 328df] XVALS(#) = XVALS(#) = # │ │ + [ 328f7] ckr03_ │ │ + [ 328fe] Negative value for SCLK ticks: # │ │ + [ 3291f] SCLK_DATA_TYPE_# │ │ + [ 32930] spkcov_c │ │ + [ 32939] refvel │ │ + [ 32940] A value of zero was found at index # of the step size vector. │ │ + [ 3297f] You are attempting to locate type 9 or type 13 data in a type # data segment. │ │ + [ 329cd] SPICE(TOOFEWSTATES) │ │ + [ 329e1] spkr19_ │ │ + [ 329e9] SSIZEI │ │ + [ 329f0] NUT_PREC_DEC │ │ + [ 329fd] SPICE(ARRAYTOOSMALL) │ │ + [ 32a12] SPICE(ZEROFRAMEID) │ │ + [ 32a25] undelimited character string │ │ + [ 32a42] SPICE(BUG1) │ │ + [ 32a4e] BOTH │ │ + [ 32a53] Unable to locate file associated with HANDLE, #. The most likely cause of this is the file that you are trying to read has been closed. │ │ + [ 32adc] The attempt to load the file has failed, because the filename is blank. │ │ + [ 32b24] ZZDDHMNM │ │ + [ 32b2d] ZZDSKLSF │ │ + [ 32b36] FAMILY │ │ + [ 32b3d] Definition of frame # contains both # and # keywords; at most one of these must be present in the frame definition. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 32c0f] RA/DEC │ │ + [ 32c16] SPICE(BADFRAMECOUNT) │ │ + [ 32c2b] xftemp │ │ + [ 32c32] The kernel variable # has used to define frame # was expected to have character data type but in fact has numeric data type. Usually this type of problem is due to an error in a frame definition provided in a frame kernel. │ │ + [ 32d12] svcp2 │ │ + [ 32d18] ZZEKLLTC │ │ + [ 32d21] SPICE(WRONGARCHITECTURE) │ │ + [ 32d3a] String value has length #; output string can hold only # characters. COLUMN = #; SEGNO = #; RECNO = #; EK = # │ │ + [ 32da9] F2C_CreateStr_Sig │ │ + [ 32dbb] IAU_ADRASTEA │ │ + [ 32dc8] IAU_CORDELIA │ │ + [ 32dd5] IAU_GASPRA │ │ + [ 32de0] IAU_DONALDJOHANSON │ │ + [ 32df3] ZZFRMCH0 │ │ + [ 32dfc] ZZHSIINF │ │ + [ 32e05] EARTH MOON BARYCENTER │ │ + [ 32e1b] URANUS BARYCENTER │ │ + [ 32e2d] FARBAUTI │ │ + [ 32e36] UMBRIEL │ │ + [ 32e3e] DESDEMONA │ │ + [ 32e48] PLUTO │ │ + [ 32e4e] VG2 │ │ + [ 32e52] HYB2 │ │ + [ 32e57] GNS │ │ + [ 32e5b] GLL │ │ + [ 32e5f] SOLAR PROBE PLUS │ │ + [ 32e70] DRAGONFLY │ │ + [ 32e7a] ADIT │ │ + [ 32e7f] LUNAR FLASHLIGHT │ │ + [ 32e90] EXOMARS_LARA │ │ + [ 32e9d] CONTOUR │ │ + [ 32ea5] STV52 │ │ + [ 32eab] RADIATION BELT STORM PROBE A │ │ + [ 32ec8] REINMUTH 2 │ │ + [ 32ed3] SHOEMAKER-LEVY 2 │ │ + [ 32ee4] METCALF-BREWINGTON │ │ + [ 32ef7] EROS │ │ + [ 32efc] MENOETIUS │ │ + [ 32f06] CANBERRA │ │ + [ 32f0f] DSS-24 │ │ + [ 32f16] DSS-25 │ │ + [ 32f1d] ZZNOFCON │ │ + [ 32f26] rel │ │ + [ 32f2a] ends │ │ + [ 32f2f] J │ │ + [ 32f31] imH │ │ + [ 32f35] ZZSCUP01 │ │ + [ 32f3e] ZZSCAD01 │ │ + [ 32f47] Coefficient count for # must be multiple of 3 but was #. │ │ + [ 32f80] TLE elements suborbital. │ │ + [ 32f99] SPICE(BADLEAPSECONDS) │ │ + [ 32faf] ZZDSPC │ │ + [ 32fb6] ZZSPKAS0 │ │ + [ 32fbf] ZZSPKGP0 │ │ + [ 32fc8] SPICE(SPKINVALIDOPTION) │ │ + [ 32fe0] FRAME_#_CLASS │ │ + [ 32fee] SPICE(PARTIALFRAMESPEC) │ │ + [ 33006] dash │ │ + [ 3300b] Time System specification │ │ + [ 33025] There is a non-printing, non-tab character (ASCII #) at position # of the time string: │ │ + [ 3307d] i-iti:i:n │ │ + [ 33087] imiiii │ │ + [ 3308e] i/i/i │ │ + [ 33094] i:i:ii/i/Y │ │ + [ 3309f] BJ │ │ + [ 330a2] hak │ │ + [ 330a6] ccp │ │ + [ 330aa] crh │ │ + [ 330ae] cv │ │ + [ 330b1] efi │ │ + [ 330b5] fit │ │ + [ 330b9] kl │ │ + [ 330bc] nb │ │ + [ 330bf] pl │ │ + [ 330c2] rof │ │ + [ 330c6] ses │ │ + [ 330ca] ben │ │ + [ 330ce] guj │ │ + [ 330d2] lin │ │ + [ 330d6] orm │ │ + [ 330da] snd │ │ + [ 330de] AI │ │ + [ 330e1] EC │ │ + [ 330e4] GR │ │ + [ 330e7] GS │ │ + [ 330ea] KG │ │ + [ 330ed] ML │ │ + [ 330f0] ARE │ │ + [ 330f4] DNK │ │ + [ 330f8] KOR │ │ + [ 330fc] NIC │ │ + [ 33100] kn_IN │ │ + [ 33106] ky_KG │ │ + [ 3310c] or_IN │ │ + [ 33112] yue_HK │ │ + [ 33119] zu_ZA │ │ + [ 3311f] /etc/localtime │ │ + [ 3312e] CHADT │ │ + [ 33134] SAKT │ │ + [ 33139] YEKST │ │ + [ 3313f] AMST │ │ + [ 33144] WAST │ │ + [ 33149] America/Asuncion │ │ + [ 3315a] XB │ │ + [ 3315d] distances │ │ + [ 33167] es_CL │ │ + [ 3316d] es_CR │ │ + [ 33173] gsw_FR │ │ + [ 3317a] ha_Latn_NG │ │ + [ 33185] mn_Mong_MN │ │ + [ 33190] gaz_ET │ │ + [ 33197] quz_BO │ │ + [ 3319e] rw_RW │ │ + [ 331a4] ta_LK │ │ + [ 331aa] ug_Arab_CN │ │ + [ 331b5] uz_Cyrl │ │ + [ 331bd] ven_ZA │ │ + [ 331c4] zh_Hant_MO │ │ + [ 331cf] i-lux │ │ + [ 331d5] i-tay │ │ + [ 331db] zh-guoyu │ │ + [ 331e4] und-x-i-enochian │ │ + [ 331f5] sgn-ni │ │ + [ 331fc] cmn-hans │ │ + [ 33205] InstalledLocales │ │ + [ 33216] ures_swap(): too few indexes for a 1.1+ resource bundle\n │ │ + [ 3324f] .dat │ │ + [ 33254] calendar/gregorian/DateTimePatterns │ │ + [ 33278] month-standalone-except-narrow │ │ + [ 33297] evening2 │ │ + [ 332a0] Languages%short │ │ + [ 332b0] U_USING_FALLBACK_WARNING │ │ + [ 332c9] U_STATE_OLD_WARNING │ │ + [ 332dd] U_UNDEFINED_KEYWORD │ │ + [ 332f1] U_REGEX_BAD_INTERVAL │ │ + [ 33306] DOP │ │ + [ 3330a] ECS │ │ + [ 3330e] KES │ │ + [ 33312] PKR │ │ + [ 33316] SCR │ │ + [ 3331a] XFO │ │ + [ 3331e] finalYear │ │ + [ 33328] Invalid context │ │ + [ 33338] 2.302585092994045684017991454684364207601 │ │ + [ 33362] M13 │ │ + [ 33366] eras │ │ + [ 3336b] hectare │ │ + [ 33373] permille │ │ + [ 3337c] BGK │ │ + [ 33380] UYN │ │ + [ 33384] gigabit │ │ + [ 3338c] nanosecond │ │ + [ 33397] pound-force-per-square-inch │ │ + [ 333b3] vocative │ │ + [ 333bc] two │ │ + [ 333c0] rules │ │ + [ 333c6] quetta │ │ + [ 333cd] ronna │ │ + [ 333d3] prefix │ │ + [ 333da] Quarter │ │ + [ 333e2] non-ignorable │ │ + [ 333f0] contractions starting with conjoining Jamo L or V not supported │ │ + [ 33430] dayPeriods │ │ + [ 3343b] uksystem │ │ + [ 33444] AChoreographerFrameCallbackData_getFrameTimelineExpectedPresentationTimeNanos │ │ + [ 33492] virtual void swappy::ChoreographerThread::onChoreographer(std::optional) │ │ + [ 334f5] loadClass │ │ + [ 334ff] Unable to find dalvik/system/PathClassLoader. │ │ + [ 3352d] Unable to find %s class │ │ + [ 33545] Unable to load NDK tracing APIs │ │ + [ 33565] Hardware │ │ + [ 3356e] (JLandroid/app/Activity;)V │ │ + [ 33589] ExpectedLatency │ │ + [ 33599] eglSwapBuffers │ │ + [ 335a8] favorites.cel │ │ + [ 335b6] Error reading favorites file {}.\n │ │ + [ 335d8] Orientation: [{}, {}, {}], {:.1f}\n │ │ + [ 335fb] Star color: Blackbody D65 │ │ + [ 33615] Light travel time: {:.4f} yr │ │ + [ 33633] Unable to capture a frame!\n │ │ + [ 3364f] LogSize │ │ + [ 33657] LabelFont │ │ + [ 33661] Point size range: %s - %s\n │ │ + [ 3367c] NAN │ │ + [ 33680] Unknown measurement system {}, fallback to Metric system │ │ + [ 336b9] FPS: {:.1f}\n │ │ + [ 336c6] {:.6g} x slower │ │ + [ 336d6] Lock %s -> %s\n │ │ + [ 336e5] Speed: {} {}\n │ │ + [ 336f3] ro.build.version.sdk │ │ + [ 33708] System Architecture:\n │ │ + [ 3371e] Post Format Conversion: %s\n │ │ + [ 33740] Resampling: %s\n │ │ + [ 33762] Playback │ │ + [ 3376b] CHANNEL_AUX_28 │ │ + [ 3377a] CHANNEL_AUX_29 │ │ + [ 33789] CHANNEL_AUX_30 │ │ + [ 33798] CHANNEL_AUX_31 │ │ + [ 337a7] At end │ │ + [ 337ae] Too many links │ │ + [ 337bd] Share mode not supported │ │ + [ 337d6] libOpenSLES.so │ │ + [ 337e5] SL_IID_ENGINE │ │ + [ 337f3] [OpenSL] Failed to stop internal capture device. │ │ + [ 33824] data │ │ + [ 33829] smpl │ │ + [ 3382e] IART │ │ + [ 33833] &track= │ │ + [ 3383b] Invalid URL version "{}"!\n │ │ + [ 33856] y │ │ + [ 33858] PhaseLock │ │ + [ 33862] URL parameter must look like key=value\n │ │ + [ 3388a] %d-%u-%uT%u:%u:%lf │ │ + [ 3389d] %d %u %u │ │ + [ 338a8] December │ │ + [ 338b1] .xyzv │ │ + [ 338b7] NU │ │ + [ 338ba] Zeta │ │ + [ 338bf] asteroids │ │ + [ 338c9] ringshadows │ │ + [ 338d5] catena │ │ + [ 338dc] setringstexture │ │ + [ 338ec] changedistance │ │ + [ 338fb] distance │ │ + [ 33904] right │ │ + [ 3390a] AmbientLightLevel │ │ + [ 3391c] StarDistanceLimit │ │ + [ 3392e] Unknown label style: {}\n │ │ + [ 33947] Bad celestia object! │ │ + [ 3395c] gettintsaturation │ │ + [ 3396e] getstardistancelimit │ │ + [ 33983] setstardistancelimit │ │ + [ 33998] setstarcolor │ │ + [ 339a5] newvector │ │ + [ 339af] One or two arguments expected to function celestia:flash │ │ + [ 339e8] First argument to celestia:gettextwidth must be a string │ │ + [ 33a21] Values in table-argument to celestia:showconstellations() must be strings │ │ + [ 33a6b] Argument to celestia:mark must be an object │ │ + [ 33a97] One argument expected in celestia:setminorbitsize │ │ + [ 33ac9] Second argument for celestia:registereventhandler must be a function or nil │ │ + [ 33b15] One to Six arguments expected to function celestia:overlay │ │ + [ 33b50] First argument to celestia:overlay must be a number (duration) │ │ + [ 33b8f] First argument for celestia:playaudio must be a number │ │ + [ 33bc6] No arguments expected to function celestia:getfont │ │ + [ 33bf9] celestia-appcore │ │ + [ 33c0a] Unknown script error │ │ + [ 33c1f] Disable │ │ + [ 33c27] argument 3 to gl.Ortho must be a number │ │ + [ 33c4f] No arguments expected for gl.LoadIdentity() │ │ + [ 33c7b] No arguments expected for gl.PushMatrix() │ │ + [ 33ca5] No arguments expected for font:getheight() │ │ + [ 33cd0] Error while parsing CEL-script: │ │ + [ 33cf1] getinfo │ │ + [ 33cf9] absmag │ │ + [ 33d00] getposition │ │ + [ 33d0c] Argument 1 to object:setorbitcolor() must be a number │ │ + [ 33d42] asteroid │ │ + [ 33d4b] One or no arguments allowed for to object:bodyframe │ │ + [ 33d7f] One argument required for phase:getposition │ │ + [ 33dab] slerp: first argument must be a rotation │ │ + [ 33dd4] texcoord0 │ │ + [ 33dde] titania │ │ + [ 33de6] vsop87-jupiter │ │ + [ 33df5] iau-miranda │ │ + [ 33e01] pointHeight │ │ + [ 33e0d] Dra │ │ + [ 33e11] Ser │ │ + [ 33e15] FO │ │ + [ 33e18] FL │ │ + [ 33e1b] Capital │ │ + [ 33e23] warp │ │ + [ 33e28] Mesh │ │ + [ 33e2d] SpiceOrbit │ │ + [ 33e38] LongLat │ │ + [ 33e40] Object has incorrect scripted rotation syntax.\n │ │ + [ 33e70] Origin │ │ + [ 33e77] Attempting to load sampled trajectory from source '{}'\n │ │ + [ 33eaf] BodyFixed │ │ + [ 33eb9] rS │ │ + [ 33ebc] = vec2(diffTexCoord.x + cloudShadowTexOffset, diffTexCoord.y);\n │ │ + [ 33efd] vec4 diff = vec4(1.0);\n │ │ + [ 33f15] shadow = min(1.0, shadow + step(0.0, │ │ + [ 33f3b] v_TexCoord0 │ │ + [ 33f47] {}{}{}{}{}\n │ │ + [ 33f53] layout({}) in;\n │ │ layout({}, max_vertices = {}) out;\n │ │ - [ 33f59] float │ │ - [ 33f5f] NL = 1.0;\n │ │ - [ 33f6a] spec.rgb *= shadowMapCoeff; │ │ - [ 33f86] shadowCenter.t = dot(vec4(position, 1.0), │ │ - [ 33fb1] , 0.0, │ │ - [ 33fb9] #version 320 es\n │ │ - [ 33fca] HD {} │ │ - [ 33fd0] SemiAxes is ignored on Barycenters │ │ - [ 33ff3] incomplete set of coordinates RA/Dec/Distance specified │ │ - [ 3402b] tx_ │ │ - [ 3402f] Processing MaterialEntry chunk\n │ │ - [ 3404f] Processing MeshMaterialGroup chunk\n │ │ - [ 34073] (Ljava/lang/String;)V │ │ - [ 34089] eglGetConfigAttrib() returned error %d │ │ - [ 340b0] eglCreateContext() returned error %d │ │ - [ 340d5] ret == 2 │ │ - [ 340de] LC_CTYPE │ │ - [ 340e7] Sorry, arithmetic coding is not implemented │ │ - [ 34113] JPEG parameter struct mismatch: library thinks size is %u, caller expects %u │ │ - [ 34160] Didn't expect more than one scan │ │ - [ 34181] postscript-cmaps │ │ - [ 34192] PIXEL_SIZE │ │ - [ 3419d] DEVICE_FONT_NAME │ │ - [ 341ae] RAW_DESCENT │ │ - [ 341ba] RAW_SUPERSCRIPT_X │ │ - [ 341d3] � │ │ - [ 341df] � │ │ - [ 341e4] VV │ │ - [ 341e7] Lua │ │ - [ 341eb] end │ │ - [ 341ef] stop │ │ - [ 341f4] coroutine │ │ - [ 341fe] namewhat │ │ - [ 34207] dict │ │ - [ 3420c] Ignoring invalid time value │ │ - [ 34228] libpng version 1.6.44\n │ │ + [ 33f86] float │ │ + [ 33f8c] NL = 1.0;\n │ │ + [ 33f97] spec.rgb *= shadowMapCoeff; │ │ + [ 33fb3] shadowCenter.t = dot(vec4(position, 1.0), │ │ + [ 33fde] , 0.0, │ │ + [ 33fe6] #version 320 es\n │ │ + [ 33ff7] HD {} │ │ + [ 33ffd] SemiAxes is ignored on Barycenters │ │ + [ 34020] incomplete set of coordinates RA/Dec/Distance specified │ │ + [ 34058] tx_ │ │ + [ 3405c] Processing MaterialEntry chunk\n │ │ + [ 3407c] Processing MeshMaterialGroup chunk\n │ │ + [ 340a0] (Ljava/lang/String;)V │ │ + [ 340b6] eglGetConfigAttrib() returned error %d │ │ + [ 340dd] eglCreateContext() returned error %d │ │ + [ 34102] ret == 2 │ │ + [ 3410b] LC_CTYPE │ │ + [ 34114] Sorry, arithmetic coding is not implemented │ │ + [ 34140] JPEG parameter struct mismatch: library thinks size is %u, caller expects %u │ │ + [ 3418d] Didn't expect more than one scan │ │ + [ 341ae] postscript-cmaps │ │ + [ 341bf] PIXEL_SIZE │ │ + [ 341ca] DEVICE_FONT_NAME │ │ + [ 341db] RAW_DESCENT │ │ + [ 341e7] RAW_SUPERSCRIPT_X │ │ + [ 34200] � │ │ + [ 3420c] � │ │ + [ 34211] VV │ │ + [ 34214] Lua │ │ + [ 34218] end │ │ + [ 3421c] stop │ │ + [ 34221] coroutine │ │ + [ 3422b] namewhat │ │ + [ 34234] dict │ │ + [ 34239] Ignoring invalid time value │ │ + [ 34255] libpng version 1.6.44\n │ │ missing LZ dictionary │ │ - [ 34257] ASCII conversion buffer too small │ │ - [ 34279] sCAL height │ │ - [ 34285] Interlace handling should be turned on when using png_read_image │ │ - [ 342c6] rgb to gray green coefficient │ │ - [ 342e4] invalid index │ │ - [ 342f2] unknown chunk exceeds memory limits │ │ - [ 34316] Insufficient memory for pCAL units │ │ - [ 34339] Ignoring request to write a PLTE chunk in grayscale PNG │ │ - [ 34371] SPICE(STRINGTOOSHORT) │ │ - [ 34387] SPICE(CLUSTERWRITEERROR) │ │ - [ 343a0] Unrecognized Data Type Specification was Encountered │ │ - [ 343d5] The Value in the Kernel File was Expected to be a Number. │ │ - [ 3440f] An Attempt to write to a specified unit failed. │ │ - [ 3443f] In meta-kernel <#>, the path at index # in the PATH_SYMBOLS list has # characters and the file name at index # has # characters. The combined path and file name has # characters; the limit is # characters. │ │ - [ 3450d] PCK │ │ - [ 34511] BOGUS ENTRY │ │ - [ 3451d] itlb │ │ - [ 34522] SPICE(CALLCKBSSFIRST) │ │ - [ 34538] error in format │ │ - [ 34548] formatted │ │ - [ 34552] elements │ │ - [ 3455b] ELEMI │ │ - [ 34561] DAFCS │ │ - [ 34567] DAFRWD │ │ - [ 3456e] SPICE(UNSUPPORTEDBFF) │ │ - [ 34584] tbncol │ │ - [ 3458b] The EK file # could not be loaded; the problem "#" occurred while attempting to load the file. By way, there is a bug in EKLEF if you see this message. │ │ - [ 34624] EKCII │ │ - [ 3462a] NUM_SELECT_COLS │ │ - [ 3463a] The handle # does not designate a known DAS file │ │ - [ 3466c] tbfwrd │ │ - [ 34673] DASWRD │ │ - [ 3467a] DASADI │ │ - [ 34681] A linked list cannot have # nodes. │ │ - [ 346a4] PCKLOF │ │ - [ 346ab] There is not sufficient space available in the kernel pool to store the # items associated with the name #. There is room to store only # items. │ │ - [ 3473e] DVPOOL │ │ - [ 34745] RDKER │ │ - [ 3474b] INQUIRE iostat was #. │ │ - [ 34761] REMLAC │ │ - [ 34768] SECOND │ │ - [ 3476f] DEFAULT │ │ - [ 34777] The number represented by the input string is too large to be stored as a double precision number. │ │ - [ 347db] dpsign │ │ - [ 347e2] _SCLK │ │ - [ 347e8] Window size in type 05 segment was #; max allowed value is # for subtypes 0 and 2 (Hermite, 8 or 14-element packets). │ │ - [ 3485e] locrec │ │ - [ 34865] HRMINT │ │ - [ 3486c] SCE2C │ │ - [ 34872] SC01 │ │ - [ 34877] sgmeta_ │ │ - [ 3487f] PRTPKG: You have called an entry point which has no run-time function; this may indicate a program bug. Please check the PRTPKG documentation. │ │ - [ 34912] SPICE(INVALIDFILETYPE) │ │ - [ 34929] Epoch after │ │ - [ 34936] sf │ │ - [ 34939] The semi-major axis supplied to the SPK type 17 evaluator was non-positive. This value must be positive. The value supplied was #. │ │ - [ 349bd] SPICE(DIFFLINETOOLARGE) │ │ - [ 349d5] The last constant item requested, #, is before the first constant item requested, #. │ │ - [ 34a2a] Window size in type 18 segment was #; must be even for subtype 0 (Hermite, 12-element packets). │ │ - [ 34a8a] Also, a frame kernel defining the body-fixed frame associated with body # may need to be loaded. │ │ - [ 34aeb] bac │ │ - [ 34aef] BODVCD │ │ - [ 34af6] tkfram_ │ │ - [ 34afe] #: Unknown expected type of the kernel pool variable '#'. The expected type of the kernel pool variable must be either 'C' or 'N'. │ │ - [ 34b81] CHKIN: The trace storage is completely full. No further module names can be added. │ │ - [ 34bd6] The following variables, needed to convert between the input uniform time scales, were not found in the kernel pool: # Your program may have failed to load a leapseconds kernel. Other possible causes of this problem include loading an invalid leapseconds kernel---one that lacks an initial │ │ - [ 34cf9] wnfetd_c │ │ - [ 34d02] bad repetition count │ │ - [ 34d17] no star │ │ - [ 34d1f] SPICE(MISSINGKPV) │ │ - [ 34d31] SPICE(BADDIMENSIONS) │ │ - [ 34d46] SPICE(BUG2) │ │ - [ 34d52] SPICE(UNSUPPORTEDARCH) │ │ - [ 34d69] Attempt to open scratch file failed. IOSTAT was #. │ │ - [ 34d9c] Attempt to create new file, '$' failed. IOSTAT was #. │ │ - [ 34dd2] File successfully closed. Unable to delete file as requested. File not currently present in the UNIT table. │ │ - [ 34e41] SPICE(HLULOCKFAILED) │ │ - [ 34e56] SPICE(FTPXFERERROR) │ │ - [ 34e6a] Error reading a descriptor record from the binary DAF file '#'. IOSTAT = #. │ │ - [ 34eb7] ZZDSKUSF │ │ - [ 34ec0] ZZDSKSNS │ │ - [ 34ec9] DLABFS │ │ - [ 34ed0] DSKGD │ │ - [ 34ed6] Body name # could not be translated to an ID code. │ │ - [ 34f09] Definition of frame # specifies frame center # and precession model #. This precession model is not applicable to body #. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 34fe1] OBSERVER_TARGET_VELOCITY │ │ - [ 34ffa] Definition of two-vector parameterized dynamic frame # includes vector definition #, which is not supported. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ - [ 350c6] Angular separation of vectors defining two-vector parameterized dynamic frame # is # (radians); minimum allowed difference of separation from 0 or Pi is # radians. Evaluation epoch is #. Extreme loss of precision can occur when defining vectors are nearly linearly dependent. This type of error can be due to using a dynamic frame outside of the time range for which it is meant. It also can be due to a conceptual error pertaining to the frame's definition, or to an implementation error in the frame kernel containing the frame definition. However, if you wish to proceed with this computation, the # keyword can be used in the frame definition to adjust the separation limit. │ │ - [ 35370] DNEARP │ │ - [ 35377] npoint │ │ - [ 3537e] SPICE(DEPENDENTVECTORS) │ │ - [ 35396] lsdsc │ │ - [ 3539c] File # has architecture #, which is invalid for paged access. You are using EK software version #. │ │ - [ 35400] PARSED │ │ - [ 35407] N_D_FREE │ │ - [ 35410] EK stack pointer = #; call requests decrement by #. │ │ - [ 35445] ZZEKSUPD │ │ - [ 3544e] ZZEKVSET │ │ - [ 35457] Join row set # contains # tables; first join row set contains # tables. These counts are supposed to match. │ │ - [ 354c4] IAU_SATURN │ │ - [ 354cf] IAU_AMALTHEA │ │ - [ 354dc] IAU_JANUS │ │ - [ 354e6] IAU_JULIET │ │ - [ 354f1] zzfrmch1_ │ │ - [ 354fb] SPICE(HASHISFULL) │ │ - [ 3550d] USED HEADNODE COUNT │ │ - [ 35521] The input hash function divisor was not a positive number. It was #. │ │ - [ 35566] MERCURY_BARYCENTER │ │ - [ 35579] THEBE │ │ - [ 3557f] MEGACLITE │ │ - [ 35589] SPONDE │ │ - [ 35590] AEGIR │ │ - [ 35596] HALIMEDE │ │ - [ 3559f] STYX │ │ - [ 355a4] MS-T5 │ │ - [ 355aa] NEAR │ │ - [ 355af] PARKER SOLAR PROBE │ │ - [ 355c2] KLEMOLA │ │ - [ 355ca] SWIFT-GEHRELS │ │ - [ 355d8] TAKAMIZAWA │ │ - [ 355e3] GCC │ │ - [ 355e7] begs │ │ - [ 355ec] TPARSE does not support the specification of a time zone in a time string. The time zone '#' was specified. │ │ - [ 3565a] SYDm │ │ - [ 3565f] Yy* │ │ - [ 35663] kvname │ │ - [ 3566a] zzscad01_ │ │ - [ 35674] Kernel variable #, needed for specification of switch frame having frame ID #, was not found in the kernel pool. This can occur when a frame kernel providing the required switch frame specification has not been loaded, or if the specification is present but is incorrect. │ │ - [ 35784] SPICE(COUNTMISMATCH) │ │ - [ 35799] trnslt │ │ - [ 357a0] D- │ │ - [ 357a3] THURSDAY │ │ - [ 357ac] Y-idi:i:i │ │ - [ 357b6] Y-iti:n │ │ - [ 357be] Yimi:i:i │ │ - [ 357c7] iiYi │ │ - [ 357cc] iidi:i:i │ │ - [ 357d5] iimii │ │ - [ 357db] iimn │ │ - [ 357e0] imii:n │ │ - [ 357e7] mii:i:iY │ │ - [ 357f0] i-i-Yi:i │ │ - [ 357f9] i-iti:i:ix │ │ - [ 35804] afh │ │ - [ 35808] da │ │ - [ 3580b] ee │ │ - [ 3580e] gaa │ │ - [ 35812] hi │ │ - [ 35815] kos │ │ - [ 35819] kpe │ │ - [ 3581d] ksh │ │ - [ 35821] ln │ │ - [ 35824] lus │ │ - [ 35828] mdh │ │ - [ 3582c] nl │ │ - [ 3582f] syr │ │ - [ 35833] ti │ │ - [ 35836] tiv │ │ - [ 3583a] tw │ │ - [ 3583d] tl │ │ - [ 35840] chv │ │ - [ 35844] kir │ │ - [ 35848] pli │ │ - [ 3584c] vol │ │ - [ 35850] tgl │ │ - [ 35854] BN │ │ - [ 35857] BY │ │ - [ 3585a] CF │ │ - [ 3585d] CY │ │ - [ 35860] GE │ │ - [ 35863] GI │ │ - [ 35866] HN │ │ - [ 35869] MV │ │ - [ 3586c] UA │ │ - [ 3586f] VC │ │ - [ 35872] ATA │ │ - [ 35876] ABW │ │ - [ 3587a] FSM │ │ - [ 3587e] GNB │ │ - [ 35882] SGP │ │ - [ 35886] fa_IR │ │ - [ 3588c] hi_IN │ │ - [ 35892] hu_HU │ │ - [ 35898] ps_AF │ │ - [ 3589e] Asia/Kamchatka │ │ - [ 358ad] Australia/Eucla │ │ - [ 358bd] MSK │ │ - [ 358c1] Pacific/Pitcairn │ │ - [ 358d2] ar_LB │ │ - [ 358d8] de_DE@collation=phonebook │ │ - [ 358f2] fr_CH │ │ - [ 358f8] fr_SN │ │ - [ 358fe] sr_Latn_CS │ │ - [ 35909] iu_Cans_CA │ │ - [ 35914] tn_ZA │ │ - [ 3591a] tzm_Tfng_MA │ │ - [ 35926] zh_HK │ │ - [ 3592c] zh-xiang │ │ - [ 35935] ucol_swap(formatVersion=3): endianness %d or charset %d does not match the swapper\n │ │ - [ 35989] era-narrow │ │ - [ 35994] links │ │ - [ 3599a] phrase │ │ - [ 359a1] uemoji │ │ - [ 359a8] udict_swap(): unknown trie type!\n │ │ - [ 359ca] U_MISSING_RESOURCE_ERROR │ │ - [ 359e3] U_TRUNCATED_CHAR_FOUND │ │ - [ 359fa] U_MISPLACED_COMPOUND_FILTER │ │ - [ 35a16] U_NUMBER_ARG_OUTOFBOUNDS_ERROR │ │ - [ 35a35] U_MF_UNRESOLVED_VARIABLE_ERROR │ │ - [ 35a54] U_BRK_UNRECOGNIZED_OPTION │ │ - [ 35a6e] U_REGEX_STOPPED_BY_CALLER │ │ - [ 35a88] BEC │ │ - [ 35a8c] MGF │ │ - [ 35a90] MTP │ │ - [ 35a94] NZD │ │ - [ 35a98] RUB │ │ - [ 35a9c] XCD │ │ - [ 35aa0] ZWD │ │ - [ 35aa4] @calendar=hebrew │ │ - [ 35ab5] foot │ │ - [ 35aba] kilometer │ │ - [ 35ac4] light-year │ │ - [ 35acf] barrel │ │ - [ 35ad6] plurals │ │ - [ 35ade] pow13- │ │ - [ 35ae5] centi │ │ - [ 35aeb] yobi │ │ - [ 35af0] /compound/ │ │ - [ 35afb] nam │ │ - [ 35aff] preferred │ │ - [ 35b09] gravity │ │ - [ 35b11] AChoreographer_postVsyncCallback │ │ - [ 35b32] getClassLoader │ │ - [ 35b41] (Ljava/lang/String;Ljava/lang/String;Ljava/io/File;)Ljava/io/File; │ │ - [ 35b84] eglPresentationTimeANDROID │ │ - [ 35b9f] late frames: │ │ - [ 35bbc] system │ │ - [ 35bc3] 0123456789abcdef │ │ - [ 35bd4] N │ │ - [ 35bd6] Error parsing destination.\n │ │ - [ 35bf2] isFolder │ │ - [ 35bfb] offset │ │ - [ 35c03] axis [ │ │ - [ 35c0d] Vendor: %s\n │ │ - [ 35c19] nan │ │ - [ 35c1d] Apparent diameter: %s\n │ │ - [ 35c34] CHANNEL_FRONT_RIGHT │ │ - [ 35c48] CHANNEL_FRONT_LEFT_CENTER │ │ - [ 35c63] Failed to start miniaudio engine │ │ - [ 35c84] Failed to post MA_JOB_TYPE_RESOURCE_MANAGER_PAGE_DATA_BUFFER_NODE job. %s\n │ │ - [ 35ccf] [OpenSL] Could not find libOpenSLES.so │ │ - [ 35cf6] &select= │ │ - [ 35cff] Error creating view FBO.\n │ │ - [ 35d19] coral │ │ - [ 35d1f] plum │ │ - [ 35d24] silver │ │ - [ 35d2b] thistle │ │ - [ 35d33] .map │ │ - [ 35d38] PSI │ │ - [ 35d3c] Xi │ │ - [ 35d49] Invisible │ │ - [ 35d53] terra │ │ - [ 35d59] flexus │ │ - [ 35d60] historical │ │ - [ 35d6b] setfaintestautomag45deg │ │ - [ 35d83] setposition │ │ - [ 35d8f] plus │ │ - [ 35d94] setorbitflags │ │ - [ 35da2] getgalaxylightgain │ │ - [ 35db5] not found!\n │ │ - [ 35dc2] getfont │ │ - [ 35dca] deletecategory │ │ - [ 35dd9] Sixth argument to celestia:print must be a number │ │ - [ 35e0b] Arguments to celestia:hide() must be strings │ │ - [ 35e38] One argument expected in celestia:setlayoutdirection │ │ - [ 35e6d] Argument to find must be a string │ │ - [ 35e8f] First arg to celestia:settime must be a number │ │ - [ 35ebe] Sixth arg to celestia:utctotdb must be a number │ │ - [ 35eee] First arg to celestia:getstar must be a number │ │ - [ 35f1d] One argument expected to function celestia:getdso │ │ - [ 35f4f] Third argument to celestia:playaudio must be a number │ │ - [ 35f85] Function celestia:setaudiopan requires two arguments │ │ - [ 35fba] planetographic │ │ - [ 35fc9] Two or three arguments required for frame:to │ │ - [ 35ff6] Second arg to frame:to must be a number │ │ - [ 3601e] Two or three arguments required for frame:from │ │ - [ 3604d] End │ │ - [ 36051] ONE_MINUS_SRC_ALPHA │ │ - [ 36065] No arguments expected to object:orbitcoloroverridden │ │ - [ 3609a] atmosphereCloudSpeed │ │ - [ 360af] Fourth arg to object:mark must be a number │ │ - [ 360da] One or two arguments are expected for object:setringstexture() │ │ - [ 36119] Keys in table-argument to celestia:setatmosphere() must be strings │ │ - [ 3615c] uppercolor │ │ - [ 36167] Second arg to observer:gotolocation must be a number │ │ - [ 3619c] Wrong number of arguments for comparison! │ │ - [ 361c6] Invalid access of position-component │ │ - [ 361eb] jpl-earth-ssb │ │ - [ 361f9] vsop87-uranus │ │ - [ 36207] jupiter │ │ - [ 3620f] Loaded INPOP ephemeris. Valid from JD {:.8f} to JD {:.8f}\n │ │ - [ 3624a] iau-ariel │ │ - [ 36254] fadeFactor │ │ - [ 3625f] Category │ │ - [ 36268] CVn │ │ - [ 3626c] Oph │ │ - [ 36270] Galaxy │ │ - [ 36277] E0 │ │ - [ 3627a] E6 │ │ - [ 3627d] PL │ │ - [ 36280] TE │ │ - [ 36283] {}: Unrecognized mesh type {}.\n │ │ - [ 362a3] Invalid filename in SampledOrbit\n │ │ - [ 362c5] RotationEpoch │ │ - [ 362d3] Planetocentric │ │ - [ 362e2] Object has incorrect J2000 ecliptic frame syntax.\n │ │ - [ 36315] No target specified for topocentric frame.\n │ │ - [ 36341] Target object '{}' for topocentric frame not found.\n │ │ - [ 36376] OpenGL │ │ - [ 3637d] ringShadowProj = in_Position.xyz + │ │ - [ 363a1] ambientColor │ │ - [ 363ae] shadowMapTex0 │ │ - [ 363bc] Failed to get file size of {}.\n │ │ - [ 363dc] sampler3D │ │ - [ 363e7] vec4 thisPos = calc_vp(in_Position);\n │ │ + [ 34284] ASCII conversion buffer too small │ │ + [ 342a6] sCAL height │ │ + [ 342b2] Interlace handling should be turned on when using png_read_image │ │ + [ 342f3] rgb to gray green coefficient │ │ + [ 34311] invalid index │ │ + [ 3431f] unknown chunk exceeds memory limits │ │ + [ 34343] Insufficient memory for pCAL units │ │ + [ 34366] Ignoring request to write a PLTE chunk in grayscale PNG │ │ + [ 3439e] SPICE(STRINGTOOSHORT) │ │ + [ 343b4] SPICE(CLUSTERWRITEERROR) │ │ + [ 343cd] Unrecognized Data Type Specification was Encountered │ │ + [ 34402] The Value in the Kernel File was Expected to be a Number. │ │ + [ 3443c] An Attempt to write to a specified unit failed. │ │ + [ 3446c] In meta-kernel <#>, the path at index # in the PATH_SYMBOLS list has # characters and the file name at index # has # characters. The combined path and file name has # characters; the limit is # characters. │ │ + [ 3453a] PCK │ │ + [ 3453e] BOGUS ENTRY │ │ + [ 3454a] itlb │ │ + [ 3454f] SPICE(CALLCKBSSFIRST) │ │ + [ 34565] error in format │ │ + [ 34575] formatted │ │ + [ 3457f] elements │ │ + [ 34588] ELEMI │ │ + [ 3458e] DAFCS │ │ + [ 34594] DAFRWD │ │ + [ 3459b] SPICE(UNSUPPORTEDBFF) │ │ + [ 345b1] tbncol │ │ + [ 345b8] The EK file # could not be loaded; the problem "#" occurred while attempting to load the file. By way, there is a bug in EKLEF if you see this message. │ │ + [ 34651] EKCII │ │ + [ 34657] NUM_SELECT_COLS │ │ + [ 34667] The handle # does not designate a known DAS file │ │ + [ 34699] tbfwrd │ │ + [ 346a0] DASWRD │ │ + [ 346a7] DASADI │ │ + [ 346ae] A linked list cannot have # nodes. │ │ + [ 346d1] PCKLOF │ │ + [ 346d8] There is not sufficient space available in the kernel pool to store the # items associated with the name #. There is room to store only # items. │ │ + [ 3476b] DVPOOL │ │ + [ 34772] RDKER │ │ + [ 34778] INQUIRE iostat was #. │ │ + [ 3478e] REMLAC │ │ + [ 34795] SECOND │ │ + [ 3479c] DEFAULT │ │ + [ 347a4] The number represented by the input string is too large to be stored as a double precision number. │ │ + [ 34808] dpsign │ │ + [ 3480f] _SCLK │ │ + [ 34815] Window size in type 05 segment was #; max allowed value is # for subtypes 0 and 2 (Hermite, 8 or 14-element packets). │ │ + [ 3488b] locrec │ │ + [ 34892] HRMINT │ │ + [ 34899] SCE2C │ │ + [ 3489f] SC01 │ │ + [ 348a4] sgmeta_ │ │ + [ 348ac] PRTPKG: You have called an entry point which has no run-time function; this may indicate a program bug. Please check the PRTPKG documentation. │ │ + [ 3493f] SPICE(INVALIDFILETYPE) │ │ + [ 34956] Epoch after │ │ + [ 34963] sf │ │ + [ 34966] The semi-major axis supplied to the SPK type 17 evaluator was non-positive. This value must be positive. The value supplied was #. │ │ + [ 349ea] SPICE(DIFFLINETOOLARGE) │ │ + [ 34a02] The last constant item requested, #, is before the first constant item requested, #. │ │ + [ 34a57] Window size in type 18 segment was #; must be even for subtype 0 (Hermite, 12-element packets). │ │ + [ 34ab7] Also, a frame kernel defining the body-fixed frame associated with body # may need to be loaded. │ │ + [ 34b18] bac │ │ + [ 34b1c] BODVCD │ │ + [ 34b23] tkfram_ │ │ + [ 34b2b] #: Unknown expected type of the kernel pool variable '#'. The expected type of the kernel pool variable must be either 'C' or 'N'. │ │ + [ 34bae] CHKIN: The trace storage is completely full. No further module names can be added. │ │ + [ 34c03] The following variables, needed to convert between the input uniform time scales, were not found in the kernel pool: # Your program may have failed to load a leapseconds kernel. Other possible causes of this problem include loading an invalid leapseconds kernel---one that lacks an initial │ │ + [ 34d26] wnfetd_c │ │ + [ 34d2f] bad repetition count │ │ + [ 34d44] no star │ │ + [ 34d4c] SPICE(MISSINGKPV) │ │ + [ 34d5e] SPICE(BADDIMENSIONS) │ │ + [ 34d73] SPICE(BUG2) │ │ + [ 34d7f] SPICE(UNSUPPORTEDARCH) │ │ + [ 34d96] Attempt to open scratch file failed. IOSTAT was #. │ │ + [ 34dc9] Attempt to create new file, '$' failed. IOSTAT was #. │ │ + [ 34dff] File successfully closed. Unable to delete file as requested. File not currently present in the UNIT table. │ │ + [ 34e6e] SPICE(HLULOCKFAILED) │ │ + [ 34e83] SPICE(FTPXFERERROR) │ │ + [ 34e97] Error reading a descriptor record from the binary DAF file '#'. IOSTAT = #. │ │ + [ 34ee4] ZZDSKUSF │ │ + [ 34eed] ZZDSKSNS │ │ + [ 34ef6] DLABFS │ │ + [ 34efd] DSKGD │ │ + [ 34f03] Body name # could not be translated to an ID code. │ │ + [ 34f36] Definition of frame # specifies frame center # and precession model #. This precession model is not applicable to body #. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 3500e] OBSERVER_TARGET_VELOCITY │ │ + [ 35027] Definition of two-vector parameterized dynamic frame # includes vector definition #, which is not supported. This situation is usually caused by an error in a frame kernel in which the frame is defined. │ │ + [ 350f3] Angular separation of vectors defining two-vector parameterized dynamic frame # is # (radians); minimum allowed difference of separation from 0 or Pi is # radians. Evaluation epoch is #. Extreme loss of precision can occur when defining vectors are nearly linearly dependent. This type of error can be due to using a dynamic frame outside of the time range for which it is meant. It also can be due to a conceptual error pertaining to the frame's definition, or to an implementation error in the frame kernel containing the frame definition. However, if you wish to proceed with this computation, the # keyword can be used in the frame definition to adjust the separation limit. │ │ + [ 3539d] DNEARP │ │ + [ 353a4] npoint │ │ + [ 353ab] SPICE(DEPENDENTVECTORS) │ │ + [ 353c3] lsdsc │ │ + [ 353c9] File # has architecture #, which is invalid for paged access. You are using EK software version #. │ │ + [ 3542d] PARSED │ │ + [ 35434] N_D_FREE │ │ + [ 3543d] EK stack pointer = #; call requests decrement by #. │ │ + [ 35472] ZZEKSUPD │ │ + [ 3547b] ZZEKVSET │ │ + [ 35484] Join row set # contains # tables; first join row set contains # tables. These counts are supposed to match. │ │ + [ 354f1] IAU_SATURN │ │ + [ 354fc] IAU_AMALTHEA │ │ + [ 35509] IAU_JANUS │ │ + [ 35513] IAU_JULIET │ │ + [ 3551e] zzfrmch1_ │ │ + [ 35528] SPICE(HASHISFULL) │ │ + [ 3553a] USED HEADNODE COUNT │ │ + [ 3554e] The input hash function divisor was not a positive number. It was #. │ │ + [ 35593] MERCURY_BARYCENTER │ │ + [ 355a6] THEBE │ │ + [ 355ac] MEGACLITE │ │ + [ 355b6] SPONDE │ │ + [ 355bd] AEGIR │ │ + [ 355c3] HALIMEDE │ │ + [ 355cc] STYX │ │ + [ 355d1] MS-T5 │ │ + [ 355d7] NEAR │ │ + [ 355dc] PARKER SOLAR PROBE │ │ + [ 355ef] KLEMOLA │ │ + [ 355f7] SWIFT-GEHRELS │ │ + [ 35605] TAKAMIZAWA │ │ + [ 35610] GCC │ │ + [ 35614] begs │ │ + [ 35619] TPARSE does not support the specification of a time zone in a time string. The time zone '#' was specified. │ │ + [ 35687] SYDm │ │ + [ 3568c] Yy* │ │ + [ 35690] kvname │ │ + [ 35697] zzscad01_ │ │ + [ 356a1] Kernel variable #, needed for specification of switch frame having frame ID #, was not found in the kernel pool. This can occur when a frame kernel providing the required switch frame specification has not been loaded, or if the specification is present but is incorrect. │ │ + [ 357b1] SPICE(COUNTMISMATCH) │ │ + [ 357c6] trnslt │ │ + [ 357cd] D- │ │ + [ 357d0] THURSDAY │ │ + [ 357d9] Y-idi:i:i │ │ + [ 357e3] Y-iti:n │ │ + [ 357eb] Yimi:i:i │ │ + [ 357f4] iiYi │ │ + [ 357f9] iidi:i:i │ │ + [ 35802] iimii │ │ + [ 35808] iimn │ │ + [ 3580d] imii:n │ │ + [ 35814] mii:i:iY │ │ + [ 3581d] i-i-Yi:i │ │ + [ 35826] i-iti:i:ix │ │ + [ 35831] afh │ │ + [ 35835] da │ │ + [ 35838] ee │ │ + [ 3583b] gaa │ │ + [ 3583f] hi │ │ + [ 35842] kos │ │ + [ 35846] kpe │ │ + [ 3584a] ksh │ │ + [ 3584e] ln │ │ + [ 35851] lus │ │ + [ 35855] mdh │ │ + [ 35859] nl │ │ + [ 3585c] syr │ │ + [ 35860] ti │ │ + [ 35863] tiv │ │ + [ 35867] tw │ │ + [ 3586a] tl │ │ + [ 3586d] chv │ │ + [ 35871] kir │ │ + [ 35875] pli │ │ + [ 35879] vol │ │ + [ 3587d] tgl │ │ + [ 35881] BN │ │ + [ 35884] BY │ │ + [ 35887] CF │ │ + [ 3588a] CY │ │ + [ 3588d] GE │ │ + [ 35890] GI │ │ + [ 35893] HN │ │ + [ 35896] MV │ │ + [ 35899] UA │ │ + [ 3589c] VC │ │ + [ 3589f] ATA │ │ + [ 358a3] ABW │ │ + [ 358a7] FSM │ │ + [ 358ab] GNB │ │ + [ 358af] SGP │ │ + [ 358b3] fa_IR │ │ + [ 358b9] hi_IN │ │ + [ 358bf] hu_HU │ │ + [ 358c5] ps_AF │ │ + [ 358cb] Asia/Kamchatka │ │ + [ 358da] Australia/Eucla │ │ + [ 358ea] MSK │ │ + [ 358ee] Pacific/Pitcairn │ │ + [ 358ff] ar_LB │ │ + [ 35905] de_DE@collation=phonebook │ │ + [ 3591f] fr_CH │ │ + [ 35925] fr_SN │ │ + [ 3592b] sr_Latn_CS │ │ + [ 35936] iu_Cans_CA │ │ + [ 35941] tn_ZA │ │ + [ 35947] tzm_Tfng_MA │ │ + [ 35953] zh_HK │ │ + [ 35959] zh-xiang │ │ + [ 35962] ucol_swap(formatVersion=3): endianness %d or charset %d does not match the swapper\n │ │ + [ 359b6] era-narrow │ │ + [ 359c1] links │ │ + [ 359c7] phrase │ │ + [ 359ce] uemoji │ │ + [ 359d5] udict_swap(): unknown trie type!\n │ │ + [ 359f7] U_MISSING_RESOURCE_ERROR │ │ + [ 35a10] U_TRUNCATED_CHAR_FOUND │ │ + [ 35a27] U_MISPLACED_COMPOUND_FILTER │ │ + [ 35a43] U_NUMBER_ARG_OUTOFBOUNDS_ERROR │ │ + [ 35a62] U_MF_UNRESOLVED_VARIABLE_ERROR │ │ + [ 35a81] U_BRK_UNRECOGNIZED_OPTION │ │ + [ 35a9b] U_REGEX_STOPPED_BY_CALLER │ │ + [ 35ab5] BEC │ │ + [ 35ab9] MGF │ │ + [ 35abd] MTP │ │ + [ 35ac1] NZD │ │ + [ 35ac5] RUB │ │ + [ 35ac9] XCD │ │ + [ 35acd] ZWD │ │ + [ 35ad1] @calendar=hebrew │ │ + [ 35ae2] foot │ │ + [ 35ae7] kilometer │ │ + [ 35af1] light-year │ │ + [ 35afc] barrel │ │ + [ 35b03] plurals │ │ + [ 35b0b] pow13- │ │ + [ 35b12] centi │ │ + [ 35b18] yobi │ │ + [ 35b1d] /compound/ │ │ + [ 35b28] nam │ │ + [ 35b2c] preferred │ │ + [ 35b36] gravity │ │ + [ 35b3e] AChoreographer_postVsyncCallback │ │ + [ 35b5f] getClassLoader │ │ + [ 35b6e] (Ljava/lang/String;Ljava/lang/String;Ljava/io/File;)Ljava/io/File; │ │ + [ 35bb1] eglPresentationTimeANDROID │ │ + [ 35bcc] late frames: │ │ + [ 35be9] system │ │ + [ 35bf0] 0123456789abcdef │ │ + [ 35c01] N │ │ + [ 35c03] Error parsing destination.\n │ │ + [ 35c1f] isFolder │ │ + [ 35c28] offset │ │ + [ 35c30] axis [ │ │ + [ 35c3a] Vendor: %s\n │ │ + [ 35c46] nan │ │ + [ 35c4a] Apparent diameter: %s\n │ │ + [ 35c61] CHANNEL_FRONT_RIGHT │ │ + [ 35c75] CHANNEL_FRONT_LEFT_CENTER │ │ + [ 35c90] Failed to start miniaudio engine │ │ + [ 35cb1] Failed to post MA_JOB_TYPE_RESOURCE_MANAGER_PAGE_DATA_BUFFER_NODE job. %s\n │ │ + [ 35cfc] [OpenSL] Could not find libOpenSLES.so │ │ + [ 35d23] &select= │ │ + [ 35d2c] Error creating view FBO.\n │ │ + [ 35d46] coral │ │ + [ 35d4c] plum │ │ + [ 35d51] silver │ │ + [ 35d58] thistle │ │ + [ 35d60] .map │ │ + [ 35d65] PSI │ │ + [ 35d69] Xi │ │ + [ 35d76] Invisible │ │ + [ 35d80] terra │ │ + [ 35d86] flexus │ │ + [ 35d8d] historical │ │ + [ 35d98] setfaintestautomag45deg │ │ + [ 35db0] setposition │ │ + [ 35dbc] plus │ │ + [ 35dc1] setorbitflags │ │ + [ 35dcf] getgalaxylightgain │ │ + [ 35de2] not found!\n │ │ + [ 35def] getfont │ │ + [ 35df7] deletecategory │ │ + [ 35e06] Sixth argument to celestia:print must be a number │ │ + [ 35e38] Arguments to celestia:hide() must be strings │ │ + [ 35e65] One argument expected in celestia:setlayoutdirection │ │ + [ 35e9a] Argument to find must be a string │ │ + [ 35ebc] First arg to celestia:settime must be a number │ │ + [ 35eeb] Sixth arg to celestia:utctotdb must be a number │ │ + [ 35f1b] First arg to celestia:getstar must be a number │ │ + [ 35f4a] One argument expected to function celestia:getdso │ │ + [ 35f7c] Third argument to celestia:playaudio must be a number │ │ + [ 35fb2] Function celestia:setaudiopan requires two arguments │ │ + [ 35fe7] planetographic │ │ + [ 35ff6] Two or three arguments required for frame:to │ │ + [ 36023] Second arg to frame:to must be a number │ │ + [ 3604b] Two or three arguments required for frame:from │ │ + [ 3607a] End │ │ + [ 3607e] ONE_MINUS_SRC_ALPHA │ │ + [ 36092] No arguments expected to object:orbitcoloroverridden │ │ + [ 360c7] atmosphereCloudSpeed │ │ + [ 360dc] Fourth arg to object:mark must be a number │ │ + [ 36107] One or two arguments are expected for object:setringstexture() │ │ + [ 36146] Keys in table-argument to celestia:setatmosphere() must be strings │ │ + [ 36189] uppercolor │ │ + [ 36194] Second arg to observer:gotolocation must be a number │ │ + [ 361c9] Wrong number of arguments for comparison! │ │ + [ 361f3] Invalid access of position-component │ │ + [ 36218] jpl-earth-ssb │ │ + [ 36226] vsop87-uranus │ │ + [ 36234] jupiter │ │ + [ 3623c] Loaded INPOP ephemeris. Valid from JD {:.8f} to JD {:.8f}\n │ │ + [ 36277] iau-ariel │ │ + [ 36281] fadeFactor │ │ + [ 3628c] Category │ │ + [ 36295] CVn │ │ + [ 36299] Oph │ │ + [ 3629d] Galaxy │ │ + [ 362a4] E0 │ │ + [ 362a7] E6 │ │ + [ 362aa] PL │ │ + [ 362ad] TE │ │ + [ 362b0] {}: Unrecognized mesh type {}.\n │ │ + [ 362d0] Invalid filename in SampledOrbit\n │ │ + [ 362f2] RotationEpoch │ │ + [ 36300] Planetocentric │ │ + [ 3630f] Object has incorrect J2000 ecliptic frame syntax.\n │ │ + [ 36342] No target specified for topocentric frame.\n │ │ + [ 3636e] Target object '{}' for topocentric frame not found.\n │ │ + [ 363a3] OpenGL │ │ + [ 363aa] ringShadowProj = in_Position.xyz + │ │ + [ 363ce] ambientColor │ │ + [ 363db] shadowMapTex0 │ │ + [ 363e9] Failed to get file size of {}.\n │ │ + [ 36409] sampler3D │ │ + [ 36414] vec4 thisPos = calc_vp(in_Position);\n │ │ vec4 nextPos = calc_vp(in_PositionNext);\n │ │ thisPos.xy /= thisPos.w;\n │ │ nextPos.xy /= nextPos.w;\n │ │ vec2 transform = normalize(nextPos.xy - thisPos.xy);\n │ │ transform = vec2(transform.y * lineWidthX, -transform.x * lineWidthY) * in_ScaleFactor;\n │ │ gl_Position = vec4((thisPos.xy + transform) * thisPos.w, thisPos.zw);\n │ │ - [ 36557] float phRayleigh = 1.0;\n │ │ - [ 36574] SemiAxes │ │ - [ 3657d] Temperature │ │ - [ 36589] Texture │ │ - [ 36591] Invalid filename in NightTexture\n │ │ - [ 365b3] IV │ │ - [ 365b6] - HIP {} │ │ - [ 365c0] TileSize │ │ - [ 365c9] Unexpected EOF detected, stopping processing\n │ │ - [ 365f7] Failed to process inner chunk\n │ │ - [ 36616] Processing FloatPercentage chunk\n │ │ - [ 36638] (Ljava/lang/String;Ljava/lang/String;)V │ │ - [ 36660] │ │ - [ 3666c] libEGL.so │ │ - [ 36676] lld │ │ - [ 3667a] Bogus message code %d │ │ - [ 36690] ALIGN_TYPE is wrong, please fix │ │ - [ 366b0] Sampling factors too large for interleaved scan │ │ - [ 366e0] Bogus sampling factors │ │ - [ 366f7] tt-cmaps │ │ - [ 36700] properties │ │ - [ 3670b] Width │ │ - [ 36711] Italic │ │ - [ 36718] %!PS-AdobeFont │ │ - [ 36727] PCF │ │ - [ 3672b] NORM_SPACE │ │ - [ 36736] BITMAP │ │ - [ 36742] EscChar │ │ - [ 3674a] IsFixedV │ │ - [ 36753] psnames │ │ - [ 3675b] builtin:%s │ │ - [ 36766] <= │ │ - [ 36769] =(load) │ │ - [ 36771] too many nested functions │ │ - [ 3678b] FILE* │ │ - [ 36791] w │ │ - [ 36793] LOADLIB: %s │ │ - [ 3679f] _M │ │ - [ 367a2] nparams │ │ - [ 367aa] Too many IDATs found │ │ - [ 367bf] png_image_finish_read: image too large │ │ - [ 367e6] png_read_image: unsupported transformation │ │ - [ 36811] PNG file corrupted by ASCII conversion │ │ - [ 36838] cHRM White Y │ │ - [ 36845] png_set_eXIf does not work; use png_set_eXIf_1 │ │ - [ 36874] Invalid sCAL unit │ │ - [ 36886] Unknown row filter for method 0 │ │ - [ 368a6] Ignoring attempt to write tRNS chunk out-of-range for bit_depth │ │ - [ 368e6] Ignoring attempt to write 16-bit bKGD chunk when bit_depth is 8 │ │ - [ 36926] SPICE(INVALIDCARDINALITY) │ │ - [ 36940] SPICE(DEVICENAMETOOLONG) │ │ - [ 36959] SPICE(FILEWRITEFAILED) │ │ - [ 36970] SPICE(UNMATCHENDPTS) │ │ - [ 36985] KTOTAL │ │ - [ 3698c] itchkp │ │ - [ 36993] stidnt │ │ - [ 3699a] variable not in namelist │ │ - [ 369b3] 'new' file exists │ │ - [ 369c5] stcurr │ │ - [ 369cc] stnr │ │ - [ 369d1] EKLEF │ │ - [ 369d7] rcidx │ │ - [ 369dd] EKNSEG │ │ - [ 369e4] EKCLS │ │ - [ 369ea] REMOVI │ │ - [ 369f1] You are attempting to locate type * data in a type 6 data segment. │ │ - [ 36a34] s_cat │ │ - [ 36a3a] SPICE(SPKFILETABLEFULL) │ │ - [ 36a52] Data type of # is #; expected type is #. │ │ - [ 36a7b] # ( │ │ - [ 36a7f] fc │ │ - [ 36a82] The input delta time (DT) has a value of #. This is beyond the range of DT for which we can reliably propagate states. The limits for this GM and initial state are from # to #. │ │ - [ 36b35] The magnitude of the vector EVEC = ( #, # ) must be less than 1. However, the magnitude of this vector is #. │ │ - [ 36ba3] SPICE(ZEROSTEP) │ │ - [ 36bb3] SPKE14 │ │ - [ 36bba] xtipm │ │ - [ 36bc0] _UNITS │ │ - [ 36bc7] │ │ - [ 36be4] do_us │ │ - [ 36bea] ly loaded kernel pool variables via calls │ │ - [ 36c15] SPICE(TOOMANYPAIRS) │ │ - [ 36c29] ZZBODRST │ │ - [ 36c32] There is an inconsistency between the number of input bodies and the size of the output hashes. The number of input bodies was #. The size of the output hashes was #. │ │ - [ 36cd9] zzbodblt_ │ │ - [ 36ce3] Could not read DAS d.p. record. File = # Record number = #. IOSTAT = #. │ │ - [ 36d2b] READS_BFF │ │ - [ 36d35] SPICE(FRAMEDEFERROR) │ │ - [ 36d4a] eulang │ │ - [ 36d51] tframs │ │ - [ 36d58] zzekjsrt_ │ │ - [ 36d62] The data type # is not supported. │ │ - [ 36d84] Column # should be INT but has type #. │ │ - [ 36dab] Segment type # is not supported. SEGNO = #. File = #. │ │ - [ 36de2] ZZEKPGWC │ │ - [ 36deb] Class # from input column descriptor is not a supported d.p. class. COLUMN = #; RECNO = #; SEGNO = #; EK = #. │ │ - [ 36e5a] scrtch │ │ - [ 36e61] Data type code # not recognized. │ │ - [ 36e82] ZZEKSINF │ │ - [ 36e8b] IAU_MARS_BARYCENTER │ │ - [ 36e9f] IAU_LEDA │ │ - [ 36ea8] IAU_BELINDA │ │ - [ 36eb4] IAU_CHARON │ │ - [ 36ebf] IAU_RYUGU │ │ - [ 36ec9] ZZFRMGT0 │ │ - [ 36ed2] ZZHSCINF │ │ - [ 36edb] EMB │ │ - [ 36edf] EPIMETHEUS │ │ - [ 36eea] JULIET │ │ - [ 36ef1] TOPEX/POSEIDON │ │ - [ 36f00] ADITYA │ │ - [ 36f07] KEPLER │ │ - [ 36f0e] VENUS EXPRESS │ │ - [ 36f1c] HELIOS 2 │ │ - [ 36f25] Rstar │ │ - [ 36f2b] SHOEMAKER-LEVY 9-P2 │ │ - [ 36f3f] FORBES │ │ - [ 36f46] GIACOBINI-ZINNER │ │ - [ 36f57] WHIPPLE │ │ - [ 36f5f] URATA-NIIJIMA │ │ - [ 36f6d] MUELLER │ │ - [ 36f75] z:i │ │ - [ 36f79] H*M │ │ - [ 36f7d] iYd │ │ - [ 36f81] RMAINI │ │ - [ 36f88] There is no room available for adding another numeric value to the kernel pool. The numeric values buffer became full at line # of the text buffer. │ │ - [ 3701d] taitab │ │ - [ 37024] ZZSPKAC0 │ │ - [ 3702d] starts │ │ - [ 37034] FRAME_#_STOP │ │ - [ 37041] Input frame ID was #, but ID in frame specification from kernel pool was #. │ │ - [ 3708e] ZZSWFCLN │ │ - [ 37097] CALENDAR │ │ - [ 370a0] SPICE(BADACTION) │ │ - [ 370b1] - │ │ - [ 370b4] SSIZED │ │ - [ 370bb] YYYY │ │ - [ 370c0] YmDH*M │ │ - [ 370c7] Ymii:i:i │ │ - [ 370d0] i-Y/i:i:i │ │ - [ 370da] miiiin │ │ - [ 370e1] Y-itix │ │ - [ 370e8] i-itix │ │ - [ 370ef] HV │ │ - [ 370f2] zh │ │ - [ 370f5] aro │ │ - [ 370f9] co │ │ - [ 370fc] gwi │ │ - [ 37100] hz │ │ - [ 37103] kbd │ │ - [ 37107] kha │ │ - [ 3710b] kj │ │ - [ 3710e] ko │ │ - [ 37111] mye │ │ - [ 37115] oj │ │ - [ 37118] pa │ │ - [ 3711b] quc │ │ - [ 3711f] sma │ │ - [ 37123] snk │ │ - [ 37127] st │ │ - [ 3712a] sus │ │ - [ 3712e] tn │ │ - [ 37131] grn │ │ - [ 37135] hye │ │ - [ 37139] BR │ │ - [ 3713c] DJ │ │ - [ 3713f] GD │ │ - [ 37142] IT │ │ - [ 37145] KH │ │ - [ 37148] SS │ │ - [ 3714b] ALA │ │ - [ 3714f] HKG │ │ - [ 37153] LTU │ │ - [ 37157] NFK │ │ - [ 3715b] ATF │ │ - [ 3715f] be_BY │ │ - [ 37165] he_IL │ │ - [ 3716b] ja_JP │ │ - [ 37171] mk_MK │ │ - [ 37177] Australia/Sydney │ │ - [ 37188] IRKST │ │ - [ 3718e] AMT │ │ - [ 37192] az_Latn │ │ - [ 3719a] ff_Latn │ │ - [ 371a2] ig_NG │ │ - [ 371a8] quc_CO │ │ - [ 371af] se_SE │ │ - [ 371b5] tzm_Latn_DZ │ │ - [ 371c1] tzm_Arab_MA │ │ - [ 371cd] zh_Hant_HK │ │ - [ 371d8] zh@collation=stroke │ │ - [ 371ec] zh_Hans@collation=stroke │ │ - [ 37205] keyTypeData │ │ - [ 37211] %%ParentIsRoot │ │ - [ 37220] icudt75l- │ │ - [ 3722a] icudt75l-brkitr │ │ - [ 3723a] uchar_swapNames(): unknown type %u of algorithmic range %u\n │ │ - [ 37276] U_FILE_ACCESS_ERROR │ │ - [ 3728a] U_UNSUPPORTED_ESCAPE_SEQUENCE │ │ - [ 372a8] U_MISSING_SEGMENT_CLOSE │ │ - [ 372c0] U_NUMBER_SKELETON_SYNTAX_ERROR │ │ - [ 372df] AED │ │ - [ 372e3] AFN │ │ - [ 372e7] BUK │ │ - [ 372eb] ESA │ │ - [ 372ef] ILR │ │ - [ 372f3] IQD │ │ - [ 372f7] NLG │ │ - [ 372fb] PLZ │ │ - [ 372ff] SHP │ │ - [ 37303] UGS │ │ - [ 37307] VEB │ │ - [ 3730b] finalRaw │ │ - [ 37314] M09L │ │ - [ 37319] month-person │ │ - [ 37326] year-person │ │ - [ 37332] therm-us │ │ - [ 3733b] gigawatt │ │ - [ 37344] comitative │ │ - [ 3734f] mega │ │ - [ 37354] zebi │ │ - [ 37359] colCaseLevel │ │ - [ 37366] not a valid special reset position │ │ - [ 37389] ExemplarCharacters │ │ - [ 3739c] gal_imp_to_m3 │ │ - [ 373aa] libandroid.so │ │ - [ 373b8] AChoreographer_unregisterRefreshRateCallback │ │ - [ 373e5] (JJJJ)V │ │ - [ 373ed] unsupported register class │ │ - [ 37408] Star style: points │ │ - [ 3741b] ~/.celestia-1.7.cfg │ │ - [ 3742f] fisheye │ │ - [ 37437] Unknown measurement system {}\n │ │ - [ 37456] Unknown layout direction {}\n │ │ - [ 37473] {}: Bad configuration file.\n │ │ - [ 37490] NeutronStar │ │ - [ 3749c] ]\n │ │ - [ 374a0] mi │ │ - [ 374a3] Apparent magnitude: {:.1f}\n │ │ - [ 374bf] Mass: {} Mj\n │ │ - [ 374cc] CHANNEL_AUX_24 │ │ - [ 374db] Failed to seek to {} │ │ - [ 374f0] [AAudio] ERROR CALLBACK: error=%d, AAudioStream_getState()=%d\n │ │ - [ 3752f] AAudioStreamBuilder_setChannelCount │ │ - [ 37553] AAudioStream_getBufferCapacityInFrames │ │ - [ 3757a] ver │ │ - [ 3757e] cel:// │ │ - [ 37585] %d %u %u %u:%u:%lf │ │ - [ 3759a] Fri │ │ - [ 3759e] Dec │ │ - [ 375a2] Could not init freetype library\n │ │ - [ 375c3] blanchedalmond │ │ - [ 375d2] dodgerblue │ │ - [ 375dd] lawngreen │ │ - [ 375e7] magenta │ │ - [ 375ef] mediumblue │ │ - [ 375fa] mediumpurple │ │ - [ 37607] mintcream │ │ - [ 37611] saddlebrown │ │ - [ 3761d] slategray │ │ - [ 37627] .stc │ │ - [ 3762c] LPT │ │ - [ 37630] LANGUAGE │ │ - [ 37639] ETA │ │ - [ 3763d] IOT │ │ - [ 37641] Omega │ │ - [ 37647] chasma │ │ - [ 3764e] flumen │ │ - [ 37655] plume │ │ - [ 3765b] dwarfplanetorbits │ │ - [ 3766d] moonorbits │ │ - [ 37678] column │ │ - [ 3767f] getname │ │ - [ 37687] gettextwidth │ │ - [ 37694] getrenderflags │ │ - [ 376a3] settintsaturation │ │ - [ 376b5] First argument to celestia:flash must be a string │ │ - [ 376e7] Keys in table-argument to celestia:setrenderflags() must be strings │ │ - [ 3772b] Argument to celestia:setgalaxylightgain() must be a number │ │ - [ 37766] Argument to celestia:unmark must be an object │ │ - [ 37794] blackbody_d65 │ │ - [ 377a2] Expected 3 arguments for celestia:newposition │ │ - [ 377d0] script requested keyboard, but did not provide callback │ │ - [ 37808] Fifth argument to celestia:overlay must be a string (filename) │ │ - [ 37847] Second argument for celestia:setaudiopan must be a number │ │ - [ 37881] Argument for celestia:settimeslice must be a number │ │ - [ 378b5] __index │ │ - [ 378bd] LookAt │ │ - [ 378c4] argument 1 to gl.LineWidth must be a number │ │ - [ 378f0] Three arguments expected for gl.TexParameter() │ │ - [ 3791f] argument 2 to gl.Translate must be a number │ │ - [ 3794b] Argument to font:getwidth must be a string │ │ - [ 37976] visible region │ │ - [ 37985] One argument expected to object:setradius() │ │ - [ 379b1] lifespanStart │ │ - [ 379bf] One argument expected to object:catalognumber │ │ - [ 379ed] mie │ │ - [ 379f1] Argument to observer:setposition must be a position │ │ - [ 37a25] orientationto │ │ - [ 37a33] __add │ │ - [ 37a39] MVPMatrix │ │ - [ 37a43] u_tex │ │ - [ 37a49] lua hook load failed\n │ │ - [ 37a5f] Model file has invalid header.\n │ │ - [ 37a7f] blend │ │ - [ 37a85] premultiplied │ │ - [ 37a93] deimos │ │ - [ 37a9a] require │ │ - [ 37aa2] No Lua function named {} found.\n │ │ - [ 37ac3] orientation │ │ - [ 37acf] Couldn't find object {} in SPICE kernel pool.\n │ │ - [ 37afe] Pyx │ │ - [ 37b02] Sex │ │ - [ 37b06] Vir │ │ - [ 37b0a] Error parsing deep sky catalog file.\n │ │ - [ 37b30] Sorting DSOs into octree . . .\n │ │ - [ 37b50] Irr │ │ - [ 37b54] E1 │ │ - [ 37b57] GL_OES_geometry_shader │ │ - [ 37b6e] CO │ │ - [ 37b71] TH │ │ - [ 37b74] images │ │ - [ 37b7b] Frame definition does not have a valid frame type.\n │ │ - [ 37baf] Secondary axis missing from two-vector frame.\n │ │ - [ 37bde] Bad two-vector frame: missing axis label for vector.\n │ │ - [ 37c14] -z │ │ - [ 37c17] specTexCoord = │ │ - [ 37c27] vec3 eyeDir = normalize(eyePosition - position);\n │ │ - [ 37c59] litSide = 1.0 - step(0.0, │ │ - [ 37c74] diff.rgb += (shadow * intensity) * │ │ - [ 37c98] light0_diffuse │ │ - [ 37ca7] v_Color = in_Color * brightness;\n │ │ - [ 37ccd] emissiveTex │ │ - [ 37cd9] light{}_color │ │ - [ 37ce7] in_TexCoord{}.st │ │ - [ 37cf8] : │ │ - [ 37cfb] mix(NL, NL / (max(NV, 0.001) + NL), lunarLambert);\n │ │ - [ 37d30] * NL;\n │ │ - [ 37d38] (1.0 - exp(-scatterCoeffSum * density * distAtm)) │ │ - [ 37d6a] = sunColor * │ │ - [ 37d79] Body frame for '{}' is nested too deep (probably circular)\n │ │ - [ 37db5] Invalid filename in Texture\n │ │ - [ 37dd2] SpecularTexture │ │ - [ 37de2] sd{}{} │ │ - [ 37de9] II │ │ - [ 37dec] HIP {} │ │ - [ 37df3] {} stars total\n │ │ + [ 36584] float phRayleigh = 1.0;\n │ │ + [ 365a1] SemiAxes │ │ + [ 365aa] Temperature │ │ + [ 365b6] Texture │ │ + [ 365be] Invalid filename in NightTexture\n │ │ + [ 365e0] IV │ │ + [ 365e3] - HIP {} │ │ + [ 365ed] TileSize │ │ + [ 365f6] Unexpected EOF detected, stopping processing\n │ │ + [ 36624] Failed to process inner chunk\n │ │ + [ 36643] Processing FloatPercentage chunk\n │ │ + [ 36665] (Ljava/lang/String;Ljava/lang/String;)V │ │ + [ 3668d] │ │ + [ 36699] libEGL.so │ │ + [ 366a3] lld │ │ + [ 366a7] Bogus message code %d │ │ + [ 366bd] ALIGN_TYPE is wrong, please fix │ │ + [ 366dd] Sampling factors too large for interleaved scan │ │ + [ 3670d] Bogus sampling factors │ │ + [ 36724] tt-cmaps │ │ + [ 3672d] properties │ │ + [ 36738] Width │ │ + [ 3673e] Italic │ │ + [ 36745] %!PS-AdobeFont │ │ + [ 36754] PCF │ │ + [ 36758] NORM_SPACE │ │ + [ 36763] BITMAP │ │ + [ 3676f] EscChar │ │ + [ 36777] IsFixedV │ │ + [ 36780] psnames │ │ + [ 36788] builtin:%s │ │ + [ 36793] <= │ │ + [ 36796] =(load) │ │ + [ 3679e] too many nested functions │ │ + [ 367b8] FILE* │ │ + [ 367be] w │ │ + [ 367c0] LOADLIB: %s │ │ + [ 367cc] _M │ │ + [ 367cf] nparams │ │ + [ 367d7] Too many IDATs found │ │ + [ 367ec] png_image_finish_read: image too large │ │ + [ 36813] png_read_image: unsupported transformation │ │ + [ 3683e] PNG file corrupted by ASCII conversion │ │ + [ 36865] cHRM White Y │ │ + [ 36872] png_set_eXIf does not work; use png_set_eXIf_1 │ │ + [ 368a1] Invalid sCAL unit │ │ + [ 368b3] Unknown row filter for method 0 │ │ + [ 368d3] Ignoring attempt to write tRNS chunk out-of-range for bit_depth │ │ + [ 36913] Ignoring attempt to write 16-bit bKGD chunk when bit_depth is 8 │ │ + [ 36953] SPICE(INVALIDCARDINALITY) │ │ + [ 3696d] SPICE(DEVICENAMETOOLONG) │ │ + [ 36986] SPICE(FILEWRITEFAILED) │ │ + [ 3699d] SPICE(UNMATCHENDPTS) │ │ + [ 369b2] KTOTAL │ │ + [ 369b9] itchkp │ │ + [ 369c0] stidnt │ │ + [ 369c7] variable not in namelist │ │ + [ 369e0] 'new' file exists │ │ + [ 369f2] stcurr │ │ + [ 369f9] stnr │ │ + [ 369fe] EKLEF │ │ + [ 36a04] rcidx │ │ + [ 36a0a] EKNSEG │ │ + [ 36a11] EKCLS │ │ + [ 36a17] REMOVI │ │ + [ 36a1e] You are attempting to locate type * data in a type 6 data segment. │ │ + [ 36a61] s_cat │ │ + [ 36a67] SPICE(SPKFILETABLEFULL) │ │ + [ 36a7f] Data type of # is #; expected type is #. │ │ + [ 36aa8] # ( │ │ + [ 36aac] fc │ │ + [ 36aaf] The input delta time (DT) has a value of #. This is beyond the range of DT for which we can reliably propagate states. The limits for this GM and initial state are from # to #. │ │ + [ 36b62] The magnitude of the vector EVEC = ( #, # ) must be less than 1. However, the magnitude of this vector is #. │ │ + [ 36bd0] SPICE(ZEROSTEP) │ │ + [ 36be0] SPKE14 │ │ + [ 36be7] xtipm │ │ + [ 36bed] _UNITS │ │ + [ 36bf4] │ │ + [ 36c11] do_us │ │ + [ 36c17] ly loaded kernel pool variables via calls │ │ + [ 36c42] SPICE(TOOMANYPAIRS) │ │ + [ 36c56] ZZBODRST │ │ + [ 36c5f] There is an inconsistency between the number of input bodies and the size of the output hashes. The number of input bodies was #. The size of the output hashes was #. │ │ + [ 36d06] zzbodblt_ │ │ + [ 36d10] Could not read DAS d.p. record. File = # Record number = #. IOSTAT = #. │ │ + [ 36d58] READS_BFF │ │ + [ 36d62] SPICE(FRAMEDEFERROR) │ │ + [ 36d77] eulang │ │ + [ 36d7e] tframs │ │ + [ 36d85] zzekjsrt_ │ │ + [ 36d8f] The data type # is not supported. │ │ + [ 36db1] Column # should be INT but has type #. │ │ + [ 36dd8] Segment type # is not supported. SEGNO = #. File = #. │ │ + [ 36e0f] ZZEKPGWC │ │ + [ 36e18] Class # from input column descriptor is not a supported d.p. class. COLUMN = #; RECNO = #; SEGNO = #; EK = #. │ │ + [ 36e87] scrtch │ │ + [ 36e8e] Data type code # not recognized. │ │ + [ 36eaf] ZZEKSINF │ │ + [ 36eb8] IAU_MARS_BARYCENTER │ │ + [ 36ecc] IAU_LEDA │ │ + [ 36ed5] IAU_BELINDA │ │ + [ 36ee1] IAU_CHARON │ │ + [ 36eec] IAU_RYUGU │ │ + [ 36ef6] ZZFRMGT0 │ │ + [ 36eff] ZZHSCINF │ │ + [ 36f08] EMB │ │ + [ 36f0c] EPIMETHEUS │ │ + [ 36f17] JULIET │ │ + [ 36f1e] TOPEX/POSEIDON │ │ + [ 36f2d] ADITYA │ │ + [ 36f34] KEPLER │ │ + [ 36f3b] VENUS EXPRESS │ │ + [ 36f49] HELIOS 2 │ │ + [ 36f52] Rstar │ │ + [ 36f58] SHOEMAKER-LEVY 9-P2 │ │ + [ 36f6c] FORBES │ │ + [ 36f73] GIACOBINI-ZINNER │ │ + [ 36f84] WHIPPLE │ │ + [ 36f8c] URATA-NIIJIMA │ │ + [ 36f9a] MUELLER │ │ + [ 36fa2] z:i │ │ + [ 36fa6] H*M │ │ + [ 36faa] iYd │ │ + [ 36fae] RMAINI │ │ + [ 36fb5] There is no room available for adding another numeric value to the kernel pool. The numeric values buffer became full at line # of the text buffer. │ │ + [ 3704a] taitab │ │ + [ 37051] ZZSPKAC0 │ │ + [ 3705a] starts │ │ + [ 37061] FRAME_#_STOP │ │ + [ 3706e] Input frame ID was #, but ID in frame specification from kernel pool was #. │ │ + [ 370bb] ZZSWFCLN │ │ + [ 370c4] CALENDAR │ │ + [ 370cd] SPICE(BADACTION) │ │ + [ 370de] - │ │ + [ 370e1] SSIZED │ │ + [ 370e8] YYYY │ │ + [ 370ed] YmDH*M │ │ + [ 370f4] Ymii:i:i │ │ + [ 370fd] i-Y/i:i:i │ │ + [ 37107] miiiin │ │ + [ 3710e] Y-itix │ │ + [ 37115] i-itix │ │ + [ 3711c] HV │ │ + [ 3711f] zh │ │ + [ 37122] aro │ │ + [ 37126] co │ │ + [ 37129] gwi │ │ + [ 3712d] hz │ │ + [ 37130] kbd │ │ + [ 37134] kha │ │ + [ 37138] kj │ │ + [ 3713b] ko │ │ + [ 3713e] mye │ │ + [ 37142] oj │ │ + [ 37145] pa │ │ + [ 37148] quc │ │ + [ 3714c] sma │ │ + [ 37150] snk │ │ + [ 37154] st │ │ + [ 37157] sus │ │ + [ 3715b] tn │ │ + [ 3715e] grn │ │ + [ 37162] hye │ │ + [ 37166] BR │ │ + [ 37169] DJ │ │ + [ 3716c] GD │ │ + [ 3716f] IT │ │ + [ 37172] KH │ │ + [ 37175] SS │ │ + [ 37178] ALA │ │ + [ 3717c] HKG │ │ + [ 37180] LTU │ │ + [ 37184] NFK │ │ + [ 37188] ATF │ │ + [ 3718c] be_BY │ │ + [ 37192] he_IL │ │ + [ 37198] ja_JP │ │ + [ 3719e] mk_MK │ │ + [ 371a4] Australia/Sydney │ │ + [ 371b5] IRKST │ │ + [ 371bb] AMT │ │ + [ 371bf] az_Latn │ │ + [ 371c7] ff_Latn │ │ + [ 371cf] ig_NG │ │ + [ 371d5] quc_CO │ │ + [ 371dc] se_SE │ │ + [ 371e2] tzm_Latn_DZ │ │ + [ 371ee] tzm_Arab_MA │ │ + [ 371fa] zh_Hant_HK │ │ + [ 37205] zh@collation=stroke │ │ + [ 37219] zh_Hans@collation=stroke │ │ + [ 37232] keyTypeData │ │ + [ 3723e] %%ParentIsRoot │ │ + [ 3724d] icudt75l- │ │ + [ 37257] icudt75l-brkitr │ │ + [ 37267] uchar_swapNames(): unknown type %u of algorithmic range %u\n │ │ + [ 372a3] U_FILE_ACCESS_ERROR │ │ + [ 372b7] U_UNSUPPORTED_ESCAPE_SEQUENCE │ │ + [ 372d5] U_MISSING_SEGMENT_CLOSE │ │ + [ 372ed] U_NUMBER_SKELETON_SYNTAX_ERROR │ │ + [ 3730c] AED │ │ + [ 37310] AFN │ │ + [ 37314] BUK │ │ + [ 37318] ESA │ │ + [ 3731c] ILR │ │ + [ 37320] IQD │ │ + [ 37324] NLG │ │ + [ 37328] PLZ │ │ + [ 3732c] SHP │ │ + [ 37330] UGS │ │ + [ 37334] VEB │ │ + [ 37338] finalRaw │ │ + [ 37341] M09L │ │ + [ 37346] month-person │ │ + [ 37353] year-person │ │ + [ 3735f] therm-us │ │ + [ 37368] gigawatt │ │ + [ 37371] comitative │ │ + [ 3737c] mega │ │ + [ 37381] zebi │ │ + [ 37386] colCaseLevel │ │ + [ 37393] not a valid special reset position │ │ + [ 373b6] ExemplarCharacters │ │ + [ 373c9] gal_imp_to_m3 │ │ + [ 373d7] libandroid.so │ │ + [ 373e5] AChoreographer_unregisterRefreshRateCallback │ │ + [ 37412] (JJJJ)V │ │ + [ 3741a] unsupported register class │ │ + [ 37435] Star style: points │ │ + [ 37448] ~/.celestia-1.7.cfg │ │ + [ 3745c] fisheye │ │ + [ 37464] Unknown measurement system {}\n │ │ + [ 37483] Unknown layout direction {}\n │ │ + [ 374a0] {}: Bad configuration file.\n │ │ + [ 374bd] NeutronStar │ │ + [ 374c9] ]\n │ │ + [ 374cd] mi │ │ + [ 374d0] Apparent magnitude: {:.1f}\n │ │ + [ 374ec] Mass: {} Mj\n │ │ + [ 374f9] CHANNEL_AUX_24 │ │ + [ 37508] Failed to seek to {} │ │ + [ 3751d] [AAudio] ERROR CALLBACK: error=%d, AAudioStream_getState()=%d\n │ │ + [ 3755c] AAudioStreamBuilder_setChannelCount │ │ + [ 37580] AAudioStream_getBufferCapacityInFrames │ │ + [ 375a7] ver │ │ + [ 375ab] cel:// │ │ + [ 375b2] %d %u %u %u:%u:%lf │ │ + [ 375c7] Fri │ │ + [ 375cb] Dec │ │ + [ 375cf] Could not init freetype library\n │ │ + [ 375f0] blanchedalmond │ │ + [ 375ff] dodgerblue │ │ + [ 3760a] lawngreen │ │ + [ 37614] magenta │ │ + [ 3761c] mediumblue │ │ + [ 37627] mediumpurple │ │ + [ 37634] mintcream │ │ + [ 3763e] saddlebrown │ │ + [ 3764a] slategray │ │ + [ 37654] .stc │ │ + [ 37659] LPT │ │ + [ 3765d] LANGUAGE │ │ + [ 37666] ETA │ │ + [ 3766a] IOT │ │ + [ 3766e] Omega │ │ + [ 37674] chasma │ │ + [ 3767b] flumen │ │ + [ 37682] plume │ │ + [ 37688] dwarfplanetorbits │ │ + [ 3769a] moonorbits │ │ + [ 376a5] column │ │ + [ 376ac] getname │ │ + [ 376b4] gettextwidth │ │ + [ 376c1] getrenderflags │ │ + [ 376d0] settintsaturation │ │ + [ 376e2] First argument to celestia:flash must be a string │ │ + [ 37714] Keys in table-argument to celestia:setrenderflags() must be strings │ │ + [ 37758] Argument to celestia:setgalaxylightgain() must be a number │ │ + [ 37793] Argument to celestia:unmark must be an object │ │ + [ 377c1] blackbody_d65 │ │ + [ 377cf] Expected 3 arguments for celestia:newposition │ │ + [ 377fd] script requested keyboard, but did not provide callback │ │ + [ 37835] Fifth argument to celestia:overlay must be a string (filename) │ │ + [ 37874] Second argument for celestia:setaudiopan must be a number │ │ + [ 378ae] Argument for celestia:settimeslice must be a number │ │ + [ 378e2] __index │ │ + [ 378ea] LookAt │ │ + [ 378f1] argument 1 to gl.LineWidth must be a number │ │ + [ 3791d] Three arguments expected for gl.TexParameter() │ │ + [ 3794c] argument 2 to gl.Translate must be a number │ │ + [ 37978] Argument to font:getwidth must be a string │ │ + [ 379a3] visible region │ │ + [ 379b2] One argument expected to object:setradius() │ │ + [ 379de] lifespanStart │ │ + [ 379ec] One argument expected to object:catalognumber │ │ + [ 37a1a] mie │ │ + [ 37a1e] Argument to observer:setposition must be a position │ │ + [ 37a52] orientationto │ │ + [ 37a60] __add │ │ + [ 37a66] MVPMatrix │ │ + [ 37a70] u_tex │ │ + [ 37a76] lua hook load failed\n │ │ + [ 37a8c] Model file has invalid header.\n │ │ + [ 37aac] blend │ │ + [ 37ab2] premultiplied │ │ + [ 37ac0] deimos │ │ + [ 37ac7] require │ │ + [ 37acf] No Lua function named {} found.\n │ │ + [ 37af0] orientation │ │ + [ 37afc] Couldn't find object {} in SPICE kernel pool.\n │ │ + [ 37b2b] Pyx │ │ + [ 37b2f] Sex │ │ + [ 37b33] Vir │ │ + [ 37b37] Error parsing deep sky catalog file.\n │ │ + [ 37b5d] Sorting DSOs into octree . . .\n │ │ + [ 37b7d] Irr │ │ + [ 37b81] E1 │ │ + [ 37b84] GL_OES_geometry_shader │ │ + [ 37b9b] CO │ │ + [ 37b9e] TH │ │ + [ 37ba1] images │ │ + [ 37ba8] Frame definition does not have a valid frame type.\n │ │ + [ 37bdc] Secondary axis missing from two-vector frame.\n │ │ + [ 37c0b] Bad two-vector frame: missing axis label for vector.\n │ │ + [ 37c41] -z │ │ + [ 37c44] specTexCoord = │ │ + [ 37c54] vec3 eyeDir = normalize(eyePosition - position);\n │ │ + [ 37c86] litSide = 1.0 - step(0.0, │ │ + [ 37ca1] diff.rgb += (shadow * intensity) * │ │ + [ 37cc5] light0_diffuse │ │ + [ 37cd4] v_Color = in_Color * brightness;\n │ │ + [ 37cfa] emissiveTex │ │ + [ 37d06] light{}_color │ │ + [ 37d14] in_TexCoord{}.st │ │ + [ 37d25] : │ │ + [ 37d28] mix(NL, NL / (max(NV, 0.001) + NL), lunarLambert);\n │ │ + [ 37d5d] * NL;\n │ │ + [ 37d65] (1.0 - exp(-scatterCoeffSum * density * distAtm)) │ │ + [ 37d97] = sunColor * │ │ + [ 37da6] Body frame for '{}' is nested too deep (probably circular)\n │ │ + [ 37de2] Invalid filename in Texture\n │ │ + [ 37dff] SpecularTexture │ │ + [ 37e0f] sd{}{} │ │ + [ 37e16] II │ │ + [ 37e19] HIP {} │ │ + [ 37e20] {} stars total\n │ │ Octree has {} nodes and {} stars.\n │ │ - [ 37e25] AppMag ignored when AbsMag is supplied │ │ - [ 37e4c] Mesh is ignored on Barycenters │ │ - [ 37e6b] Radius is ignored on Barycenters │ │ - [ 37e8c] Loaded xindex in {} ms\n │ │ - [ 37ea4] HIP │ │ - [ 37ea9] Error: {} is not a PNG file.\n │ │ - [ 37ec7] Error reading PNG data │ │ - [ 37ede] Processing MeshTextureCoords chunk\n │ │ - [ 37f02] Content size {} too small to include face array with {} entries\n │ │ - [ 37f43] Content size {} too small to include mesh matrix\n │ │ - [ 37f75] (Ljava/lang/Object;Ljava/lang/Object;)Ljava/lang/Object; │ │ - [ 37fae] ji │ │ - [ 37fb1] GETTEXT_LOG_UNTRANSLATED │ │ - [ 37fcb] msgid_plural │ │ - [ 37fd9] IDCT output block size %d not supported │ │ - [ 38001] Unknown APP14 marker (not Adobe), length %u │ │ - [ 3802d] ot-svg │ │ - [ 38034] password │ │ - [ 3803d] Encoding │ │ - [ 38046] ExpertEncoding │ │ - [ 38055] CID Type 1 │ │ - [ 38060] pfr │ │ - [ 38064] 646.1991 │ │ - [ 3806d] CHARSET_ENCODING │ │ - [ 3807e] RAW_AVG_CAPITAL_WIDTH │ │ - [ 38094] RAW_QUAD_WIDTH │ │ - [ 380a3] UNDERLINE_POSITION │ │ - [ 380ba] � � │ │ - [ 380c7] � │ │ - [ 380ce] � � │ │ - [ 380d7] CharacterSet │ │ - [ 380e4] KPY │ │ - [ 380e8] _PRELOAD │ │ - [ 380f1] ERROR in finalizer: │ │ - [ 38106] module │ │ - [ 3810d] unexpected NamedColor ICC profile class │ │ - [ 38135] ': │ │ - [ 38139] png_image_begin_read_from_file: incorrect PNG_IMAGE_VERSION │ │ - [ 38175] png_image_read: alpha channel lost │ │ - [ 38198] out of memory │ │ - [ 381a6] sPLT chunk too long │ │ - [ 381ba] sPLT chunk requires too much memory │ │ - [ 381de] invalid with alpha channel │ │ - [ 381f9] Extra compressed data │ │ - [ 3820f] Row has too many bytes to allocate in memory │ │ - [ 3823c] invalid unknown chunk location │ │ - [ 3825b] invalid location in png_set_unknown_chunks │ │ - [ 38286] png_set_filler is invalid for low bit depth gray output │ │ - [ 382be] Unknown custom filter method │ │ - [ 382db] supplied row stride too small │ │ - [ 382f9] Invalid bit depth for RGB image │ │ - [ 38319] Invalid bit depth for RGBA image │ │ - [ 3833a] iTXt: invalid compression │ │ - [ 38354] Pointer "#" is null; a non-null pointer is required. │ │ - [ 38389] erract_ │ │ - [ 38391] SPICE(BADENDPOINTS) │ │ - [ 383a5] SPICE(BOGUSENTRY) │ │ - [ 383b7] Time String Could Not Be Parsed │ │ - [ 383d7] SPICE(INVALIDTIMEFORMAT) │ │ - [ 383f0] SPICE(NOFREELOGICALUNIT) │ │ - [ 38409] handls │ │ - [ 38410] ALL │ │ - [ 38414] fthan │ │ - [ 3841a] HOPELESS │ │ - [ 38423] Error reading the file record from the binary DAF file '#'. │ │ - [ 3845f] CARDI │ │ - [ 38465] stfh │ │ - [ 3846a] DAFRFR │ │ - [ 38471] DAFWDR │ │ - [ 38478] Double precision write failed. Value of IOSTAT was # │ │ - [ 384ad] Expected length of character record is 1000. Passed string has length # │ │ - [ 384f5] tbnams │ │ - [ 384fc] SPICE(EKMISSINGCOLUMN) │ │ - [ 38513] EKSRCH │ │ - [ 3851a] ltbidx │ │ - [ 38521] DASONW │ │ - [ 38528] SPICE(DASREADFAIL) │ │ - [ 3853b] APPNDC │ │ - [ 38542] Invalid data type: #. File was # │ │ - [ 38563] FIRST was #. LAST was #. Valid range is [1,#]. │ │ - [ 38592] wtvars │ │ - [ 38599] = │ │ - [ 3859c] Could not delete AGENT # from the watch symbol table because AGENT is associated with at least one updated kernel variable. │ │ - [ 38619] fmt │ │ - [ 3861d] format too complicated:\n │ │ - [ 38636] refchg_ │ │ - [ 3863e] NAMFRM │ │ - [ 38645] NPARSI: Value entered is beyond the bounds of representable integers. │ │ - [ 3868b] hrmint_ │ │ - [ 38693] RAXISA │ │ - [ 3869a] IVBIX = #. │ │ - [ 386a5] Window size in type 6 segment was #; must be in the range 2:# for subtype #. Mini-segment index is #. │ │ - [ 3870b] m1 │ │ - [ 3870e] Attempt to set cardinality of cell to invalid value #. Valid range is 0:#. │ │ - [ 3875a] sfe │ │ - [ 3875e] SPICE(REQUESTOUTOFORDER) │ │ - [ 38777] Toolkit version: │ │ - [ 38789] Attempt to open the file '#' failed. IOSTAT = #. │ │ - [ 387ba] The string supplied to specify the reference frame was '#'. This frame is not recognized. Possible causes for this error are: 1. failure to load the frame definition into the kernel pool; 2. An out-of-date edition of the toolkit. │ │ - [ 388a2] starg │ │ - [ 388a8] FRMGET │ │ - [ 388af] You are attempting to locate type * data in a type 19 data segment. │ │ - [ 388f3] Window size in type 19 segment was #; must be in the range 2:# for subtype #. Mini-segment index is #. │ │ - [ 3895a] SPICE(COMPETINGEPOCHSPEC) │ │ - [ 38974] PCKR20 │ │ - [ 3897b] SPICE(BADVARIABLETYPE) │ │ - [ 38992] CHKIN: An attempt to check in was made without supplying a module name. │ │ - [ 389db] ~ │ │ - [ 389dd] WNFETD │ │ - [ 389e4] stler │ │ - [ 389ea] recend │ │ - [ 389f1] %#.*E │ │ - [ 389f7] m2eul_ │ │ - [ 389fe] SPICE(BADROWCOUNT) │ │ - [ 38a11] ZZBODBLT │ │ - [ 38a1a] ZZDASRFR │ │ - [ 38a23] SPICE(IMPROPEROPEN) │ │ - [ 38a37] There is no file loaded with handle = # │ │ - [ 38a5f] METHOD │ │ - [ 38a66] itmobs │ │ - [ 38a6d] INERTIAL │ │ - [ 38a76] NEARPT │ │ - [ 38a7d] tlambd │ │ - [ 38a84] Encoded query has not yet been parsed. │ │ - [ 38aab] SPICE(INVALIDDATATYPE) │ │ - [ 38ac2] N_I_ALLOC │ │ - [ 38acc] ZZEKRD05 │ │ - [ 38ad5] ZZEKRSI │ │ - [ 38add] Join row set # has segment vector count #; count must be non-negative. │ │ - [ 38b24] C2F_CreateFixStrArr │ │ - [ 38b38] IAU_EROS │ │ - [ 38b41] IAU_ERINOME │ │ - [ 38b4d] IAU_ARROKOTH │ │ - [ 38b5a] IAU_DIMORPHOS │ │ - [ 38b68] IAU_ORUS │ │ - [ 38b71] JUPITER_BARYCENTER │ │ - [ 38b84] DEIMOS │ │ - [ 38b8b] PAALIAQ │ │ - [ 38b93] PUCK │ │ - [ 38b98] TRINCULO │ │ - [ 38ba1] NAIAD │ │ - [ 38ba7] PIONEER-10 │ │ - [ 38bb2] P11 │ │ - [ 38bb6] SPACE INFRARED TELESCOPE FACILITY │ │ - [ 38bd8] MERCURY PLANETARY ORBITER │ │ - [ 38bf2] MPO │ │ - [ 38bf6] MUSES-C │ │ - [ 38bfe] CASSINI PROBE │ │ - [ 38c0c] EXM SURFACE PLATFORM │ │ - [ 38c21] SMAP │ │ - [ 38c26] SPIRIT │ │ - [ 38c2d] HELIOS 1 │ │ - [ 38c36] SHOEMAKER-LEVY 9-D │ │ - [ 38c49] AREND-RIGAUX │ │ - [ 38c56] HARTLEY-IRAS │ │ - [ 38c63] HARTLEY 3 │ │ - [ 38c6d] WILD 4 │ │ - [ 38c74] EURYBATES BARYCENTER │ │ - [ 38c89] LEUCUS │ │ - [ 38c90] could not be located. │ │ - [ 38ca6] is a type 1 text E-kernel. These files are obsolete and cannot be loaded. │ │ - [ 38cf2] EXISTS │ │ - [ 38cf9] For a CK frame for which the corresponding SCLK kernel has been loaded, failure to find required CK data could be due to one or more CK files not having been loaded, or to the epoch shown above lying within a coverage gap or beyond the coverage bounds of the loaded CK files. It is also possible that no loaded CK file has required angular velocity data for the input epoch, even if a loaded CK does have attitude data for that epoch. You can use CKBRIEF with the -dump option to display coverage intervals of a CK file. │ │ - [ 38f02] The reference frame # has class #. This form of reference frame is not supported in version # of ZZROTGT1. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ - [ 38fd0] Encountered '#' while attempting to parse a number on line # of the text kernel file '#'. Error message: '#' │ │ - [ 3903e] I │ │ - [ 39040] ie │ │ - [ 39043] The '#' component of the date has a fractional component. This is allowed only if all components of lesser significance have value 0.0D0. However the '#' component has value #. │ │ - [ 390f6] JED │ │ - [ 390fb] STR2ET │ │ - [ 39102] NOVEMBER │ │ - [ 3910b] mnsize │ │ - [ 39112] YR │ │ - [ 39115] HR │ │ - [ 39118] Y-iti:i:n │ │ - [ 39122] Yiiii │ │ - [ 39128] Yin │ │ - [ 3912c] y*Y* │ │ - [ 39131] i-Y/i:i │ │ - [ 39139] i-i-it │ │ - [ 39140] iiYi:i:i │ │ - [ 39149] iiYi:i:n │ │ - [ 39152] iimi:n │ │ - [ 39159] m*D*YH*M*S │ │ - [ 39164] Y*m*D** │ │ - [ 3916c] Y-i-iti:i:ix │ │ - [ 39179] The input string that is to be translated from the binary format # to format # has a length that is not a multiple of 4 bytes. This error should never occur. │ │ - [ 39218] BU │ │ - [ 3921b] zh__XIANG │ │ - [ 39225] aln │ │ - [ 39229] am │ │ - [ 3922c] ban │ │ - [ 39230] bfq │ │ - [ 39234] chk │ │ - [ 39238] dyo │ │ - [ 3923c] ht │ │ - [ 3923f] jpr │ │ - [ 39243] kac │ │ - [ 39247] kbl │ │ - [ 3924b] man │ │ - [ 3924f] mul │ │ - [ 39253] nv │ │ - [ 39256] syc │ │ - [ 3925a] tvl │ │ - [ 3925e] ug │ │ - [ 39261] bul │ │ - [ 39265] dan │ │ - [ 39269] ell │ │ - [ 3926d] iku │ │ - [ 39271] nor │ │ - [ 39275] pol │ │ - [ 39279] zha │ │ - [ 3927d] HK │ │ - [ 39280] SZ │ │ - [ 39283] BTN │ │ - [ 39287] JAM │ │ - [ 3928b] LCA │ │ - [ 3928f] PSE │ │ - [ 39293] SUR │ │ - [ 39297] VCT │ │ - [ 3929b] bn_IN │ │ - [ 392a1] cy_GB │ │ - [ 392a7] uz_UZ │ │ - [ 392ad] PETT │ │ - [ 392b2] LHST │ │ - [ 392b7] Australia/Lord_Howe │ │ - [ 392cb] CWST │ │ - [ 392d0] CEST │ │ - [ 392d5] AZOT │ │ - [ 392da] ICU_DATA │ │ - [ 392e3] ar_MO │ │ - [ 392e9] arn_CL │ │ - [ 392f0] en_TT │ │ - [ 392f6] i-hak │ │ - [ 392fc] sgn-be-fr │ │ - [ 39306] i-mingo │ │ - [ 3930e] u_init │ │ - [ 39315] iso8601 │ │ - [ 3931d] M10 │ │ - [ 39321] Fallback │ │ - [ 3932a] Types%short │ │ - [ 39336] unorm2_swap(): too few bytes (%d after header) for all of Normalizer2 data\n │ │ - [ 39382] U_MEMORY_ALLOCATION_ERROR │ │ - [ 3939c] U_ILLEGAL_CHAR_FOUND │ │ - [ 393b1] U_PRIMARY_TOO_LONG_ERROR │ │ - [ 393ca] U_USING_DEFAULT_WARNING │ │ - [ 393e2] U_FORMAT_INEXACT_ERROR │ │ - [ 393f9] U_MF_DUPLICATE_OPTION_NAME_ERROR │ │ - [ 3941a] U_REGEX_STACK_OVERFLOW │ │ - [ 39431] U_STRINGPREP_CHECK_BIDI_ERROR │ │ - [ 3944f] BOP │ │ - [ 39453] GEK │ │ - [ 39457] STD │ │ - [ 3945b] TRL │ │ - [ 3945f] TTD │ │ - [ 39463] /patterns/ │ │ - [ 3946e] Underflow │ │ - [ 39478] -Zero │ │ - [ 3947e] @calendar=buddhist │ │ - [ 39491] energy │ │ - [ 39498] percent │ │ - [ 394a0] week │ │ - [ 394a5] hertz │ │ - [ 394ab] megahertz │ │ - [ 394b5] lux │ │ - [ 394b9] knot │ │ - [ 394be] mile-per-hour │ │ - [ 394cc] cubic-foot │ │ - [ 394d7] atto │ │ - [ 394dc] alias/unit/ │ │ - [ 394e8] -person │ │ - [ 394f0] /gender │ │ - [ 394f8] SpelloutRules │ │ - [ 39506] extension string adds too many collation elements (more than 31 total) │ │ - [ 3954d] missing relation string │ │ - [ 39565] after │ │ - [ 3956b] ExemplarCharactersPunctuation │ │ - [ 39589] quotationStart │ │ - [ 39598] ()Ljava/io/File; │ │ - [ 395a9] ags │ │ - [ 395ad] unique_lock::unlock: not locked │ │ - [ 395cd] /topology/physical_package_id │ │ - [ 395ec] [ │ │ - [ 395ee] Goto surface │ │ - [ 395fb] Auto-magnitude enabled │ │ - [ 39612] Light travel time: {} h {} min {:.1f} s │ │ - [ 3963d] Low res textures │ │ - [ 3964e] Added view │ │ - [ 39659] Error reading configuration file. │ │ - [ 3967b] DeepSkyCatalogs │ │ - [ 3968b] FaintestVisibleMagnitude │ │ - [ 396a4] selection │ │ - [ 396ae] Max cube map size: %s\n │ │ - [ 396c5] Surface temp: %s\n │ │ - [ 396d7] Dec: {:+d}{} {:02d}' {:.1f}"\n │ │ - [ 396f5] %s (%s)\n │ │ - [ 39700] API not found │ │ - [ 3970e] Failed to initialize connector for data buffer. %s.\n │ │ - [ 39743] [OpenSL] Failed to retrieve SL_IID_ANDROIDSIMPLEBUFFERQUEUE interface. │ │ - [ 3978a] [OpenSL] Failed to create output mix. │ │ - [ 397b0] [OpenSL] Failed to retrieve SL_IID_PLAY interface. │ │ - [ 397e3] Failed to post MA_JOB_TYPE_RESOURCE_MANAGER_LOAD_DATA_BUFFER job. %s.\n │ │ - [ 3982a] Unsupported URL mode "{}"!\n │ │ - [ 39846] URL must contain 2 bodies\n │ │ - [ 39861] z │ │ - [ 39863] Monday │ │ - [ 3986a] Feb │ │ - [ 3986e] aqua │ │ - [ 39873] chartreuse │ │ - [ 3987e] chocolate │ │ - [ 39888] darkgreen │ │ - [ 39892] lightskyblue │ │ - [ 3989f] RHO │ │ - [ 398a3] Omicron │ │ - [ 398ab] Pi │ │ - [ 398ae] nightmaps │ │ - [ 398b8] atmospheres │ │ - [ 398c4] lacus │ │ - [ 398ca] cosmodrome │ │ - [ 398d5] setvisibilitylimit │ │ - [ 398e8] orbitflags │ │ - [ 398f3] points │ │ - [ 398fa] size │ │ - [ 398ff] yoffset │ │ - [ 39907] colortop │ │ - [ 39910] __tostring │ │ - [ 3991b] gettime │ │ - [ 39923] pause │ │ - [ 39929] utctotdb │ │ - [ 39932] requestsystemaccess │ │ - [ 39946] resumeaudio │ │ - [ 39952] setaudiovolume │ │ - [ 39961] getparamstring │ │ - [ 39970] One to six arguments expected to function celestia:print │ │ - [ 399a9] Argument to celestia:setrenderflags() must be a table │ │ - [ 399df] Values in table-argument to celestia:hideconstellations() must be strings │ │ - [ 39a29] settextcolor: color values must be numbers │ │ - [ 39a54] Argument to celestia:synchronizetime must be a boolean │ │ - [ 39a8b] One argument expected to function celestia:settimescale │ │ - [ 39ac3] One argument expected in celestia:setambient │ │ - [ 39af0] Invalid starcolor │ │ - [ 39b02] Third arg to celestia:tojulianday must be a number │ │ - [ 39b35] No arguments expected to function celestia:getstarcount │ │ - [ 39b6d] First argument for celestia:requestkeyboard must be a boolean │ │ - [ 39bab] Argument to celestia:geteventhandler must be a string │ │ - [ 39be1] Second argument to celestia:overlay must be a number (xoffset) │ │ - [ 39c20] Second argument for celestia:setaudiovolume must be a number │ │ - [ 39c5d] First argument for celestia:setaudionopause must be a number │ │ - [ 39c9a] Need one to three arguments for celestia:loadtexture() │ │ - [ 39cd1] Argument to celestia:setasterisms() must be a string │ │ - [ 39d06] Error while executing keyboard callback: {}\n │ │ - [ 39d33] Unknown script system access policy {} │ │ - [ 39d5a] class_texture │ │ - [ 39d68] MatrixMode │ │ - [ 39d73] Six arguments expected for gl.Ortho() │ │ - [ 39d99] argument 6 to gl.Ortho must be a number │ │ - [ 39dc1] One argument expected for gl.Begin() │ │ - [ 39de6] First argument to font:render must be a string │ │ - [ 39e15] gettemperature │ │ - [ 39e24] Time expected as argument to object:orbitframe │ │ - [ 39e53] No argument expected for observer:getspeed() │ │ - [ 39e80] No arguments allowed for to phase:bodyframe │ │ - [ 39eac] No arguments expected for vector:getz │ │ - [ 39ed2] in_Position │ │ - [ 39ede] f2\n │ │ - [ 39ee2] {} {} {} {} │ │ - [ 39eee] float3 format vertex normal required\n │ │ - [ 39f14] vsop87-sun │ │ - [ 39f1f] earth │ │ - [ 39f25] mercury │ │ - [ 39f2d] RETURN │ │ - [ 39f34] No valid chains found for asterism "{}"\n │ │ - [ 39f5d] Sa │ │ - [ 39f60] GL_MESA_pack_invert │ │ - [ 39f74] CoreRadius │ │ - [ 39f7f] ME │ │ - [ 39f82] Error opening mesh file: {}\n │ │ - [ 39f9f] Kernel │ │ - [ 39fa6] EclipticJ2000 │ │ - [ 39fb4] Bad two-vector frame: unknown vector type\n │ │ - [ 39fdf] Center object '{}' for topocentric frame not found.\n │ │ - [ 3a014] kg │ │ - [ 3a017] float totalLight = 0.0;\n │ │ - [ 3a030] vec3 n;\n │ │ - [ 3a039] n.xy = texture2D(normTex, │ │ - [ 3a054] NH = max(0.0, dot(N, normalize( │ │ - [ 3a074] scatterColor │ │ - [ 3a081] float brightness = 1.0;\n │ │ - [ 3a09e] texCoordBase{} │ │ - [ 3a0ad] normTex │ │ - [ 3a0b5] Failed to open {}.\n │ │ - [ 3a0ca] void main(void)\n │ │ + [ 37e52] AppMag ignored when AbsMag is supplied │ │ + [ 37e79] Mesh is ignored on Barycenters │ │ + [ 37e98] Radius is ignored on Barycenters │ │ + [ 37eb9] Loaded xindex in {} ms\n │ │ + [ 37ed1] HIP │ │ + [ 37ed6] Error: {} is not a PNG file.\n │ │ + [ 37ef4] Error reading PNG data │ │ + [ 37f0b] Processing MeshTextureCoords chunk\n │ │ + [ 37f2f] Content size {} too small to include face array with {} entries\n │ │ + [ 37f70] Content size {} too small to include mesh matrix\n │ │ + [ 37fa2] (Ljava/lang/Object;Ljava/lang/Object;)Ljava/lang/Object; │ │ + [ 37fdb] ji │ │ + [ 37fde] GETTEXT_LOG_UNTRANSLATED │ │ + [ 37ff8] msgid_plural │ │ + [ 38006] IDCT output block size %d not supported │ │ + [ 3802e] Unknown APP14 marker (not Adobe), length %u │ │ + [ 3805a] ot-svg │ │ + [ 38061] password │ │ + [ 3806a] Encoding │ │ + [ 38073] ExpertEncoding │ │ + [ 38082] CID Type 1 │ │ + [ 3808d] pfr │ │ + [ 38091] 646.1991 │ │ + [ 3809a] CHARSET_ENCODING │ │ + [ 380ab] RAW_AVG_CAPITAL_WIDTH │ │ + [ 380c1] RAW_QUAD_WIDTH │ │ + [ 380d0] UNDERLINE_POSITION │ │ + [ 380e7] � � │ │ + [ 380f4] � │ │ + [ 380fb] � � │ │ + [ 38104] CharacterSet │ │ + [ 38111] KPY │ │ + [ 38115] _PRELOAD │ │ + [ 3811e] ERROR in finalizer: │ │ + [ 38133] module │ │ + [ 3813a] unexpected NamedColor ICC profile class │ │ + [ 38162] ': │ │ + [ 38166] png_image_begin_read_from_file: incorrect PNG_IMAGE_VERSION │ │ + [ 381a2] png_image_read: alpha channel lost │ │ + [ 381c5] out of memory │ │ + [ 381d3] sPLT chunk too long │ │ + [ 381e7] sPLT chunk requires too much memory │ │ + [ 3820b] invalid with alpha channel │ │ + [ 38226] Extra compressed data │ │ + [ 3823c] Row has too many bytes to allocate in memory │ │ + [ 38269] invalid unknown chunk location │ │ + [ 38288] invalid location in png_set_unknown_chunks │ │ + [ 382b3] png_set_filler is invalid for low bit depth gray output │ │ + [ 382eb] Unknown custom filter method │ │ + [ 38308] supplied row stride too small │ │ + [ 38326] Invalid bit depth for RGB image │ │ + [ 38346] Invalid bit depth for RGBA image │ │ + [ 38367] iTXt: invalid compression │ │ + [ 38381] Pointer "#" is null; a non-null pointer is required. │ │ + [ 383b6] erract_ │ │ + [ 383be] SPICE(BADENDPOINTS) │ │ + [ 383d2] SPICE(BOGUSENTRY) │ │ + [ 383e4] Time String Could Not Be Parsed │ │ + [ 38404] SPICE(INVALIDTIMEFORMAT) │ │ + [ 3841d] SPICE(NOFREELOGICALUNIT) │ │ + [ 38436] handls │ │ + [ 3843d] ALL │ │ + [ 38441] fthan │ │ + [ 38447] HOPELESS │ │ + [ 38450] Error reading the file record from the binary DAF file '#'. │ │ + [ 3848c] CARDI │ │ + [ 38492] stfh │ │ + [ 38497] DAFRFR │ │ + [ 3849e] DAFWDR │ │ + [ 384a5] Double precision write failed. Value of IOSTAT was # │ │ + [ 384da] Expected length of character record is 1000. Passed string has length # │ │ + [ 38522] tbnams │ │ + [ 38529] SPICE(EKMISSINGCOLUMN) │ │ + [ 38540] EKSRCH │ │ + [ 38547] ltbidx │ │ + [ 3854e] DASONW │ │ + [ 38555] SPICE(DASREADFAIL) │ │ + [ 38568] APPNDC │ │ + [ 3856f] Invalid data type: #. File was # │ │ + [ 38590] FIRST was #. LAST was #. Valid range is [1,#]. │ │ + [ 385bf] wtvars │ │ + [ 385c6] = │ │ + [ 385c9] Could not delete AGENT # from the watch symbol table because AGENT is associated with at least one updated kernel variable. │ │ + [ 38646] fmt │ │ + [ 3864a] format too complicated:\n │ │ + [ 38663] refchg_ │ │ + [ 3866b] NAMFRM │ │ + [ 38672] NPARSI: Value entered is beyond the bounds of representable integers. │ │ + [ 386b8] hrmint_ │ │ + [ 386c0] RAXISA │ │ + [ 386c7] IVBIX = #. │ │ + [ 386d2] Window size in type 6 segment was #; must be in the range 2:# for subtype #. Mini-segment index is #. │ │ + [ 38738] m1 │ │ + [ 3873b] Attempt to set cardinality of cell to invalid value #. Valid range is 0:#. │ │ + [ 38787] sfe │ │ + [ 3878b] SPICE(REQUESTOUTOFORDER) │ │ + [ 387a4] Toolkit version: │ │ + [ 387b6] Attempt to open the file '#' failed. IOSTAT = #. │ │ + [ 387e7] The string supplied to specify the reference frame was '#'. This frame is not recognized. Possible causes for this error are: 1. failure to load the frame definition into the kernel pool; 2. An out-of-date edition of the toolkit. │ │ + [ 388cf] starg │ │ + [ 388d5] FRMGET │ │ + [ 388dc] You are attempting to locate type * data in a type 19 data segment. │ │ + [ 38920] Window size in type 19 segment was #; must be in the range 2:# for subtype #. Mini-segment index is #. │ │ + [ 38987] SPICE(COMPETINGEPOCHSPEC) │ │ + [ 389a1] PCKR20 │ │ + [ 389a8] SPICE(BADVARIABLETYPE) │ │ + [ 389bf] CHKIN: An attempt to check in was made without supplying a module name. │ │ + [ 38a08] ~ │ │ + [ 38a0a] WNFETD │ │ + [ 38a11] stler │ │ + [ 38a17] recend │ │ + [ 38a1e] %#.*E │ │ + [ 38a24] m2eul_ │ │ + [ 38a2b] SPICE(BADROWCOUNT) │ │ + [ 38a3e] ZZBODBLT │ │ + [ 38a47] ZZDASRFR │ │ + [ 38a50] SPICE(IMPROPEROPEN) │ │ + [ 38a64] There is no file loaded with handle = # │ │ + [ 38a8c] METHOD │ │ + [ 38a93] itmobs │ │ + [ 38a9a] INERTIAL │ │ + [ 38aa3] NEARPT │ │ + [ 38aaa] tlambd │ │ + [ 38ab1] Encoded query has not yet been parsed. │ │ + [ 38ad8] SPICE(INVALIDDATATYPE) │ │ + [ 38aef] N_I_ALLOC │ │ + [ 38af9] ZZEKRD05 │ │ + [ 38b02] ZZEKRSI │ │ + [ 38b0a] Join row set # has segment vector count #; count must be non-negative. │ │ + [ 38b51] C2F_CreateFixStrArr │ │ + [ 38b65] IAU_EROS │ │ + [ 38b6e] IAU_ERINOME │ │ + [ 38b7a] IAU_ARROKOTH │ │ + [ 38b87] IAU_DIMORPHOS │ │ + [ 38b95] IAU_ORUS │ │ + [ 38b9e] JUPITER_BARYCENTER │ │ + [ 38bb1] DEIMOS │ │ + [ 38bb8] PAALIAQ │ │ + [ 38bc0] PUCK │ │ + [ 38bc5] TRINCULO │ │ + [ 38bce] NAIAD │ │ + [ 38bd4] PIONEER-10 │ │ + [ 38bdf] P11 │ │ + [ 38be3] SPACE INFRARED TELESCOPE FACILITY │ │ + [ 38c05] MERCURY PLANETARY ORBITER │ │ + [ 38c1f] MPO │ │ + [ 38c23] MUSES-C │ │ + [ 38c2b] CASSINI PROBE │ │ + [ 38c39] EXM SURFACE PLATFORM │ │ + [ 38c4e] SMAP │ │ + [ 38c53] SPIRIT │ │ + [ 38c5a] HELIOS 1 │ │ + [ 38c63] SHOEMAKER-LEVY 9-D │ │ + [ 38c76] AREND-RIGAUX │ │ + [ 38c83] HARTLEY-IRAS │ │ + [ 38c90] HARTLEY 3 │ │ + [ 38c9a] WILD 4 │ │ + [ 38ca1] EURYBATES BARYCENTER │ │ + [ 38cb6] LEUCUS │ │ + [ 38cbd] could not be located. │ │ + [ 38cd3] is a type 1 text E-kernel. These files are obsolete and cannot be loaded. │ │ + [ 38d1f] EXISTS │ │ + [ 38d26] For a CK frame for which the corresponding SCLK kernel has been loaded, failure to find required CK data could be due to one or more CK files not having been loaded, or to the epoch shown above lying within a coverage gap or beyond the coverage bounds of the loaded CK files. It is also possible that no loaded CK file has required angular velocity data for the input epoch, even if a loaded CK does have attitude data for that epoch. You can use CKBRIEF with the -dump option to display coverage intervals of a CK file. │ │ + [ 38f2f] The reference frame # has class #. This form of reference frame is not supported in version # of ZZROTGT1. You need to update your version of SPICELIB to the latest version in order to support this frame. │ │ + [ 38ffd] Encountered '#' while attempting to parse a number on line # of the text kernel file '#'. Error message: '#' │ │ + [ 3906b] I │ │ + [ 3906d] ie │ │ + [ 39070] The '#' component of the date has a fractional component. This is allowed only if all components of lesser significance have value 0.0D0. However the '#' component has value #. │ │ + [ 39123] JED │ │ + [ 39128] STR2ET │ │ + [ 3912f] NOVEMBER │ │ + [ 39138] mnsize │ │ + [ 3913f] YR │ │ + [ 39142] HR │ │ + [ 39145] Y-iti:i:n │ │ + [ 3914f] Yiiii │ │ + [ 39155] Yin │ │ + [ 39159] y*Y* │ │ + [ 3915e] i-Y/i:i │ │ + [ 39166] i-i-it │ │ + [ 3916d] iiYi:i:i │ │ + [ 39176] iiYi:i:n │ │ + [ 3917f] iimi:n │ │ + [ 39186] m*D*YH*M*S │ │ + [ 39191] Y*m*D** │ │ + [ 39199] Y-i-iti:i:ix │ │ + [ 391a6] The input string that is to be translated from the binary format # to format # has a length that is not a multiple of 4 bytes. This error should never occur. │ │ + [ 39245] BU │ │ + [ 39248] zh__XIANG │ │ + [ 39252] aln │ │ + [ 39256] am │ │ + [ 39259] ban │ │ + [ 3925d] bfq │ │ + [ 39261] chk │ │ + [ 39265] dyo │ │ + [ 39269] ht │ │ + [ 3926c] jpr │ │ + [ 39270] kac │ │ + [ 39274] kbl │ │ + [ 39278] man │ │ + [ 3927c] mul │ │ + [ 39280] nv │ │ + [ 39283] syc │ │ + [ 39287] tvl │ │ + [ 3928b] ug │ │ + [ 3928e] bul │ │ + [ 39292] dan │ │ + [ 39296] ell │ │ + [ 3929a] iku │ │ + [ 3929e] nor │ │ + [ 392a2] pol │ │ + [ 392a6] zha │ │ + [ 392aa] HK │ │ + [ 392ad] SZ │ │ + [ 392b0] BTN │ │ + [ 392b4] JAM │ │ + [ 392b8] LCA │ │ + [ 392bc] PSE │ │ + [ 392c0] SUR │ │ + [ 392c4] VCT │ │ + [ 392c8] bn_IN │ │ + [ 392ce] cy_GB │ │ + [ 392d4] uz_UZ │ │ + [ 392da] PETT │ │ + [ 392df] LHST │ │ + [ 392e4] Australia/Lord_Howe │ │ + [ 392f8] CWST │ │ + [ 392fd] CEST │ │ + [ 39302] AZOT │ │ + [ 39307] ICU_DATA │ │ + [ 39310] ar_MO │ │ + [ 39316] arn_CL │ │ + [ 3931d] en_TT │ │ + [ 39323] i-hak │ │ + [ 39329] sgn-be-fr │ │ + [ 39333] i-mingo │ │ + [ 3933b] u_init │ │ + [ 39342] iso8601 │ │ + [ 3934a] M10 │ │ + [ 3934e] Fallback │ │ + [ 39357] Types%short │ │ + [ 39363] unorm2_swap(): too few bytes (%d after header) for all of Normalizer2 data\n │ │ + [ 393af] U_MEMORY_ALLOCATION_ERROR │ │ + [ 393c9] U_ILLEGAL_CHAR_FOUND │ │ + [ 393de] U_PRIMARY_TOO_LONG_ERROR │ │ + [ 393f7] U_USING_DEFAULT_WARNING │ │ + [ 3940f] U_FORMAT_INEXACT_ERROR │ │ + [ 39426] U_MF_DUPLICATE_OPTION_NAME_ERROR │ │ + [ 39447] U_REGEX_STACK_OVERFLOW │ │ + [ 3945e] U_STRINGPREP_CHECK_BIDI_ERROR │ │ + [ 3947c] BOP │ │ + [ 39480] GEK │ │ + [ 39484] STD │ │ + [ 39488] TRL │ │ + [ 3948c] TTD │ │ + [ 39490] /patterns/ │ │ + [ 3949b] Underflow │ │ + [ 394a5] -Zero │ │ + [ 394ab] @calendar=buddhist │ │ + [ 394be] energy │ │ + [ 394c5] percent │ │ + [ 394cd] week │ │ + [ 394d2] hertz │ │ + [ 394d8] megahertz │ │ + [ 394e2] lux │ │ + [ 394e6] knot │ │ + [ 394eb] mile-per-hour │ │ + [ 394f9] cubic-foot │ │ + [ 39504] atto │ │ + [ 39509] alias/unit/ │ │ + [ 39515] -person │ │ + [ 3951d] /gender │ │ + [ 39525] SpelloutRules │ │ + [ 39533] extension string adds too many collation elements (more than 31 total) │ │ + [ 3957a] missing relation string │ │ + [ 39592] after │ │ + [ 39598] ExemplarCharactersPunctuation │ │ + [ 395b6] quotationStart │ │ + [ 395c5] ()Ljava/io/File; │ │ + [ 395d6] ags │ │ + [ 395da] unique_lock::unlock: not locked │ │ + [ 395fa] /topology/physical_package_id │ │ + [ 39619] [ │ │ + [ 3961b] Goto surface │ │ + [ 39628] Auto-magnitude enabled │ │ + [ 3963f] Light travel time: {} h {} min {:.1f} s │ │ + [ 3966a] Low res textures │ │ + [ 3967b] Added view │ │ + [ 39686] Error reading configuration file. │ │ + [ 396a8] DeepSkyCatalogs │ │ + [ 396b8] FaintestVisibleMagnitude │ │ + [ 396d1] selection │ │ + [ 396db] Max cube map size: %s\n │ │ + [ 396f2] Surface temp: %s\n │ │ + [ 39704] Dec: {:+d}{} {:02d}' {:.1f}"\n │ │ + [ 39722] %s (%s)\n │ │ + [ 3972d] API not found │ │ + [ 3973b] Failed to initialize connector for data buffer. %s.\n │ │ + [ 39770] [OpenSL] Failed to retrieve SL_IID_ANDROIDSIMPLEBUFFERQUEUE interface. │ │ + [ 397b7] [OpenSL] Failed to create output mix. │ │ + [ 397dd] [OpenSL] Failed to retrieve SL_IID_PLAY interface. │ │ + [ 39810] Failed to post MA_JOB_TYPE_RESOURCE_MANAGER_LOAD_DATA_BUFFER job. %s.\n │ │ + [ 39857] Unsupported URL mode "{}"!\n │ │ + [ 39873] URL must contain 2 bodies\n │ │ + [ 3988e] z │ │ + [ 39890] Monday │ │ + [ 39897] Feb │ │ + [ 3989b] aqua │ │ + [ 398a0] chartreuse │ │ + [ 398ab] chocolate │ │ + [ 398b5] darkgreen │ │ + [ 398bf] lightskyblue │ │ + [ 398cc] RHO │ │ + [ 398d0] Omicron │ │ + [ 398d8] Pi │ │ + [ 398db] nightmaps │ │ + [ 398e5] atmospheres │ │ + [ 398f1] lacus │ │ + [ 398f7] cosmodrome │ │ + [ 39902] setvisibilitylimit │ │ + [ 39915] orbitflags │ │ + [ 39920] points │ │ + [ 39927] size │ │ + [ 3992c] yoffset │ │ + [ 39934] colortop │ │ + [ 3993d] __tostring │ │ + [ 39948] gettime │ │ + [ 39950] pause │ │ + [ 39956] utctotdb │ │ + [ 3995f] requestsystemaccess │ │ + [ 39973] resumeaudio │ │ + [ 3997f] setaudiovolume │ │ + [ 3998e] getparamstring │ │ + [ 3999d] One to six arguments expected to function celestia:print │ │ + [ 399d6] Argument to celestia:setrenderflags() must be a table │ │ + [ 39a0c] Values in table-argument to celestia:hideconstellations() must be strings │ │ + [ 39a56] settextcolor: color values must be numbers │ │ + [ 39a81] Argument to celestia:synchronizetime must be a boolean │ │ + [ 39ab8] One argument expected to function celestia:settimescale │ │ + [ 39af0] One argument expected in celestia:setambient │ │ + [ 39b1d] Invalid starcolor │ │ + [ 39b2f] Third arg to celestia:tojulianday must be a number │ │ + [ 39b62] No arguments expected to function celestia:getstarcount │ │ + [ 39b9a] First argument for celestia:requestkeyboard must be a boolean │ │ + [ 39bd8] Argument to celestia:geteventhandler must be a string │ │ + [ 39c0e] Second argument to celestia:overlay must be a number (xoffset) │ │ + [ 39c4d] Second argument for celestia:setaudiovolume must be a number │ │ + [ 39c8a] First argument for celestia:setaudionopause must be a number │ │ + [ 39cc7] Need one to three arguments for celestia:loadtexture() │ │ + [ 39cfe] Argument to celestia:setasterisms() must be a string │ │ + [ 39d33] Error while executing keyboard callback: {}\n │ │ + [ 39d60] Unknown script system access policy {} │ │ + [ 39d87] class_texture │ │ + [ 39d95] MatrixMode │ │ + [ 39da0] Six arguments expected for gl.Ortho() │ │ + [ 39dc6] argument 6 to gl.Ortho must be a number │ │ + [ 39dee] One argument expected for gl.Begin() │ │ + [ 39e13] First argument to font:render must be a string │ │ + [ 39e42] gettemperature │ │ + [ 39e51] Time expected as argument to object:orbitframe │ │ + [ 39e80] No argument expected for observer:getspeed() │ │ + [ 39ead] No arguments allowed for to phase:bodyframe │ │ + [ 39ed9] No arguments expected for vector:getz │ │ + [ 39eff] in_Position │ │ + [ 39f0b] f2\n │ │ + [ 39f0f] {} {} {} {} │ │ + [ 39f1b] float3 format vertex normal required\n │ │ + [ 39f41] vsop87-sun │ │ + [ 39f4c] earth │ │ + [ 39f52] mercury │ │ + [ 39f5a] RETURN │ │ + [ 39f61] No valid chains found for asterism "{}"\n │ │ + [ 39f8a] Sa │ │ + [ 39f8d] GL_MESA_pack_invert │ │ + [ 39fa1] CoreRadius │ │ + [ 39fac] ME │ │ + [ 39faf] Error opening mesh file: {}\n │ │ + [ 39fcc] Kernel │ │ + [ 39fd3] EclipticJ2000 │ │ + [ 39fe1] Bad two-vector frame: unknown vector type\n │ │ + [ 3a00c] Center object '{}' for topocentric frame not found.\n │ │ + [ 3a041] kg │ │ + [ 3a044] float totalLight = 0.0;\n │ │ + [ 3a05d] vec3 n;\n │ │ + [ 3a066] n.xy = texture2D(normTex, │ │ + [ 3a081] NH = max(0.0, dot(N, normalize( │ │ + [ 3a0a1] scatterColor │ │ + [ 3a0ae] float brightness = 1.0;\n │ │ + [ 3a0cb] texCoordBase{} │ │ + [ 3a0da] normTex │ │ + [ 3a0e2] Failed to open {}.\n │ │ + [ 3a0f7] void main(void)\n │ │ {\n │ │ gl_FragColor = vec4(1.0, 0.0, 0.0, 1.0);\n │ │ }\n │ │ - [ 3a10b] lightDir_tan_{} │ │ - [ 3a11b] ).a;\n │ │ - [ 3a121] parent body '%s' of '%s' not found.\n │ │ - [ 3a146] Internal error creating TimelinePhase.\n │ │ - [ 3a16e] Incorrect GeomAlbedo value: {}\n │ │ - [ 3a18e] Incorrect Reflectivity value: {}\n │ │ - [ 3a1b0] Rings must be an associative array.\n │ │ - [ 3a1d5] Invalid filename in CloudMap\n │ │ - [ 3a1f3] BlendTexture │ │ - [ 3a200] Radius must be greater than zero │ │ - [ 3a221] SAO │ │ - [ 3a226] Bad version for cross index\n │ │ - [ 3a243] Failed reading data from DDS texture file {}.\n │ │ - [ 3a272] Error allocating info_ptr\n │ │ - [ 3a28d] Failed to read material group face array count\n │ │ - [ 3a2bd] Remaining content size {} too small to include material group face array with {} entries\n │ │ - [ 3a317] Error reading Color24 RGB values │ │ - [ 3a338] space/celestia/celestia/Vector │ │ - [ 3a357] [json.exception. │ │ - [ 3a368] \u%04x │ │ - [ 3a36f] eglChooseConfig() returned error %d │ │ - [ 3a393] eglMakeCurrent() returned error %d │ │ - [ 3a3b6] %d.%d │ │ - [ 3a3bc] POSIX │ │ - [ 3a3c2] libjpeg-turbo version 3.0.4 (build 20240926) │ │ + [ 3a138] lightDir_tan_{} │ │ + [ 3a148] ).a;\n │ │ + [ 3a14e] parent body '%s' of '%s' not found.\n │ │ + [ 3a173] Internal error creating TimelinePhase.\n │ │ + [ 3a19b] Incorrect GeomAlbedo value: {}\n │ │ + [ 3a1bb] Incorrect Reflectivity value: {}\n │ │ + [ 3a1dd] Rings must be an associative array.\n │ │ + [ 3a202] Invalid filename in CloudMap\n │ │ + [ 3a220] BlendTexture │ │ + [ 3a22d] Radius must be greater than zero │ │ + [ 3a24e] SAO │ │ + [ 3a253] Bad version for cross index\n │ │ + [ 3a270] Failed reading data from DDS texture file {}.\n │ │ + [ 3a29f] Error allocating info_ptr\n │ │ + [ 3a2ba] Failed to read material group face array count\n │ │ + [ 3a2ea] Remaining content size {} too small to include material group face array with {} entries\n │ │ + [ 3a344] Error reading Color24 RGB values │ │ + [ 3a365] space/celestia/celestia/Vector │ │ + [ 3a384] [json.exception. │ │ + [ 3a395] \u%04x │ │ + [ 3a39c] eglChooseConfig() returned error %d │ │ + [ 3a3c0] eglMakeCurrent() returned error %d │ │ + [ 3a3e3] %d.%d │ │ + [ 3a3e9] POSIX │ │ [ 3a3ef] MAX_ALLOC_CHUNK is wrong, please fix │ │ [ 3a414] Copyright (C) 1991-2024 The libjpeg-turbo Project and many others │ │ [ 3a456] JFIF extension marker: RGB thumbnail image, length %u │ │ [ 3a48c] metrics-variations │ │ [ 3a49f] UniqueID │ │ [ 3a4a8] BuildCharArray │ │ [ 3a4b7] cff-load │ │ @@ -4194297,8 +4194297,8 @@ │ │ [19665c6] } │ │ [19665c8] │ │ [19665dc] │ │ [19665ea] { │ │ [19665ec] 0 │ │ [19665ee] } │ │ [19665f0] │ │ -[ Too much input for diff (SHA256: 373fb91b14d3cb4d08885839534a79944cfc585bbfc4af508ec7a4559bea6797) ] │ │ +[ Too much input for diff (SHA256: b3a6bb9d5f07004195e16cd07a1c926fe4672d2bf2cdca4bf345389a7d05531c) ] │ ├── objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.text {} │ │ @@ -130,15 +130,15 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ add r4, pc, #392 @ (adr r4, 207d3d8 ) │ │ lsls r3, r5, #1 │ │ add r4, pc, #392 @ (adr r4, 207d3dc ) │ │ lsls r3, r5, #1 │ │ - bl 1dc1e8c │ │ + bl 1deee8c │ │ add r3, pc, #752 @ (adr r3, 207d54c <_ZNSt6__ndk112basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEE6appendB8ne180000IPKcTnNS_9enable_ifIXsr31__has_forward_iterator_categoryIT_EE5valueEiE4typeELi0EEERS5_SA_SA_@@Base+0x154>) │ │ lsls r3, r5, #1 │ │ │ │ 0207d25c : │ │ vmov s0, r1 │ │ vldr s2, [r0, #16] │ │ vcmp.f32 s2, s0 │ │ @@ -279,15 +279,15 @@ │ │ bl 207d398 │ │ bmi.n 207d342 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (207d3a4 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - str r4, [r0, #124] @ 0x7c │ │ + str r1, [r6, #124] @ 0x7c │ │ mrc2 5, 0, fp, cr12, cr0, {5} │ │ add r7, sp, #8 │ │ mov r5, r0 │ │ movs r0, #8 │ │ blx 26ffb90 │ │ mov r4, r0 │ │ mov r1, r5 │ │ @@ -1498,16 +1498,16 @@ │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ str r7, [sp, #208] @ 0xd0 │ │ lsls r3, r5, #1 │ │ - strb r7, [r0, #30] │ │ - mrc2 6, 0, r7, cr12, cr15, {4} │ │ + strb r4, [r6, #30] │ │ + cdp2 6, 1, cr7, cr12, cr12, {6} │ │ mrc2 6, 0, r9, cr12, cr6, {1} │ │ lsls r3, r5, #1 │ │ str r6, [sp, #104] @ 0x68 │ │ lsls r3, r5, #1 │ │ str r5, [sp, #640] @ 0x280 │ │ lsls r3, r5, #1 │ │ │ │ @@ -1879,16 +1879,16 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #48] @ 0x30 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ str r4, [sp, #480] @ 0x1e0 │ │ lsls r3, r5, #1 │ │ - strb r1, [r1, #19] │ │ - cdp2 13, 1, cr13, cr12, cr10, {1} │ │ + strb r6, [r6, #19] │ │ + mrc2 13, 0, sp, cr12, cr7, {2} │ │ cdp2 3, 1, cr9, cr11, cr4, {3} │ │ lsls r3, r5, #1 │ │ lsrs r3, r5, #29 │ │ cdp2 2, 1, cr9, cr13, cr6, {5} │ │ lsls r3, r5, #1 │ │ str r2, [sp, #200] @ 0xc8 │ │ lsls r3, r5, #1 │ │ @@ -2654,15 +2654,15 @@ │ │ blx 26ffae0 │ │ nop │ │ movs r0, r0 │ │ orrs r4, r6 │ │ vst3. {d3[0],d5[0],d7[0]}, [r3], r2 │ │ ldrh r4, [r6, #16] │ │ lsls r3, r5, #1 │ │ - ldr r5, [r1, #40] @ 0x28 │ │ + ldr r2, [r7, #40] @ 0x28 │ │ mrc2 9, 0, r8, cr12, cr4, {5} @ │ │ lsls r3, r5, #1 │ │ │ │ 0207ec34 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -2924,15 +2924,15 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldrh r2, [r0, #6] │ │ lsls r3, r5, #1 │ │ strh r2, [r4, #58] @ 0x3a │ │ lsls r3, r5, #1 │ │ - adds r6, #211 @ 0xd3 │ │ + adds r7, #0 │ │ Address 0x207eeaa is out of bounds. │ │ │ │ │ │ 0207eeac , std::__ndk1::allocator > const&, bool)@@Base>: │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #32 │ │ @@ -3133,15 +3133,15 @@ │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26fe80c │ │ add sp, #8 │ │ vpop {d8} │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - cbz r7, 207f0d2 │ │ + cbz r4, 207f0de │ │ Address 0x207f0ae is out of bounds. │ │ │ │ │ │ 0207f0b0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -3351,15 +3351,15 @@ │ │ addeq sp, #48 @ 0x30 │ │ vpopeq {d8-d10} │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ strh r6, [r6, #38] @ 0x26 │ │ lsls r3, r5, #1 │ │ - bl 218df36 > >, std::__ndk1::__unordered_map_hasher > >, std::__ndk1::hash, std::__ndk1::equal_to, true>, std::__ndk1::__unordered_map_equal > >, std::__ndk1::equal_to, std::__ndk1::hash, true>, std::__ndk1::allocator > > > >::__erase_unique(Selection const&)@@Base+0xf6> │ │ + bl 21baf36 │ │ strh r2, [r3, #22] │ │ lsls r3, r5, #1 │ │ │ │ 0207f308 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -3750,15 +3750,15 @@ │ │ movs r1, #8 │ │ ldr r2, [r0, #0] │ │ ldr r2, [r2, #8] │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ bx r2 │ │ nop │ │ - ldrh r3, [r1, #18] │ │ + ldrh r0, [r7, #18] │ │ Address 0x207f71e is out of bounds. │ │ │ │ │ │ 0207f720 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -4035,15 +4035,15 @@ │ │ b.n 2080034 │ │ nop │ │ nop │ │ lsls r0, r0, #4 │ │ lsls r2, r0, #12 │ │ lsrs r4, r1, #20 │ │ lsrs r6, r1, #28 │ │ - lsrs r1, r5, #14 │ │ + lsrs r6, r2, #15 │ │ cdp2 15, 1, cr11, cr11, cr0, {0} │ │ nop │ │ str r5, [r0, #28] │ │ ldr r7, [pc, #124] @ (207fb20 ) │ │ lsrs r7, r7, #13 │ │ adcs r2, r4 │ │ movs r0, r0 │ │ @@ -4887,15 +4887,15 @@ │ │ b.n 2080538 > const&, celestia::View const*)@@Base+0x1f4> │ │ add r0, sp, #52 @ 0x34 │ │ bl 2080308 │ │ blx 26ffaf0 │ │ nop │ │ strb r2, [r3, #9] │ │ lsls r3, r5, #1 │ │ - str r2, [r0, #16] │ │ + str r7, [r5, #16] │ │ mrc2 1, 0, r7, cr9, cr12, {1} │ │ lsls r3, r5, #1 │ │ strb r4, [r7, #2] │ │ lsls r3, r5, #1 │ │ bmi.n 2080500 > const&, celestia::View const*)@@Base+0x1bc> │ │ bmi.n 2080502 > const&, celestia::View const*)@@Base+0x1be> │ │ push {r4, r5, r6, r7, lr} │ │ @@ -5496,15 +5496,15 @@ │ │ blx r2 │ │ b.n 2080aaa │ │ nop │ │ ldr r1, [sp, #616] @ 0x268 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ldr r1, [sp, #612] @ 0x264 │ │ subs r7, #241 @ 0xf1 │ │ - strh r5, [r2, r6] │ │ + strh r2, [r0, r7] │ │ Address 0x2080c2a is out of bounds. │ │ │ │ │ │ 02080c2c : │ │ ldrb.w r0, [r0, #580] @ 0x244 │ │ bx lr │ │ │ │ @@ -5971,15 +5971,15 @@ │ │ ldr.w r0, [r5], #4 │ │ movs r2, #1 │ │ ldr r1, [r0, #0] │ │ ldr r3, [r1, #8] │ │ mov r1, r8 │ │ blx r3 │ │ b.n 2081094 │ │ - cbz r7, 20810ee │ │ + cbz r4, 20810fa │ │ cdp2 12, 1, cr12, cr9, cr13, {6} │ │ subs r5, #76 @ 0x4c │ │ ldmia r4!, {r0, r2, r3, r6, r7} │ │ pop {r2, r3, r6, pc} │ │ nop │ │ nop │ │ ldmia r4!, {r2, r3, r6, r7} │ │ @@ -6370,31 +6370,31 @@ │ │ b.n 2081528 │ │ ldrb.w r1, [r8, #60] @ 0x3c │ │ ldr.w r0, [r8, #20] │ │ eor.w r1, r1, #1 │ │ strb.w r1, [r8, #60] @ 0x3c │ │ blx 2700680 │ │ b.n 2080fec │ │ - add r5, pc, #256 @ (adr r5, 2081658 ) │ │ + add r5, pc, #436 @ (adr r5, 208170c ) │ │ mrc2 4, 0, r6, cr12, cr10, {2} │ │ lsls r3, r5, #1 │ │ ldmia r4!, {r0, r2, r3, r6, r7} │ │ bkpt 0x004c │ │ - strh r6, [r2, r4] │ │ + strh r3, [r0, r5] │ │ mrc2 3, 0, r6, cr9, cr0, {2} │ │ lsls r3, r5, #1 │ │ str r6, [r4, #100] @ 0x64 │ │ subs r7, #134 @ 0x86 │ │ - asrs r6, r5, #4 │ │ + asrs r3, r3, #5 │ │ cdp2 0, 1, cr0, cr10, cr0, {0} │ │ cmn r0, r1 │ │ str r2, [r3, #36] @ 0x24 │ │ lsls r3, r5, #1 │ │ - adds r1, #41 @ 0x29 │ │ - mrc2 0, 0, r1, cr10, cr4, {0} │ │ + adds r1, #86 @ 0x56 │ │ + cdp2 0, 1, cr1, cr10, cr1, {2} │ │ cdp2 1, 1, cr6, cr10, cr0, {2} │ │ lsls r3, r5, #1 │ │ mov r0, r8 │ │ blx 2700040 │ │ mov r0, r8 │ │ blx 27001a0 │ │ ldr.w r0, [r8, #56] @ 0x38 │ │ @@ -6715,21 +6715,21 @@ │ │ vmov.f64 d16, #112 @ 0x3f800000 1.0 │ │ vmov r2, r3, d16 │ │ mov r0, r8 │ │ mov r1, r4 │ │ blx 27000b0 │ │ b.w 2082b5e │ │ nop │ │ - cmp r7, #112 @ 0x70 │ │ - mrc2 7, 0, r4, cr10, cr15, {5} │ │ - cdp2 15, 1, cr6, cr11, cr13, {2} │ │ - mrc2 4, 0, r2, cr10, cr6, {0} │ │ - mrc2 15, 0, r9, cr12, cr15, {0} │ │ - cdp2 14, 1, cr9, cr12, cr10, {3} │ │ - mrc2 3, 0, r2, cr12, cr12, {7} │ │ + cmp r7, #157 @ 0x9d │ │ + cdp2 7, 1, cr4, cr10, cr12, {7} │ │ + mrc2 15, 0, r6, cr11, cr10, {3} │ │ + cdp2 4, 1, cr2, cr10, cr3, {2} │ │ + cdp2 15, 1, cr9, cr12, cr12, {2} │ │ + mrc2 14, 0, r9, cr12, cr7, {4} │ │ + cdp2 4, 1, cr2, cr12, cr9, {1} │ │ vcmla.f16 d6, d11, d2[0], #90 │ │ lsls r3, r5, #1 │ │ mov r0, r8 │ │ blx 27001a0 │ │ mov r0, r9 │ │ blx 2700760 │ │ ldr r1, [pc, #792] @ (2081cb4 ) │ │ @@ -6999,25 +6999,25 @@ │ │ lsls r3, r5, #1 │ │ str r2, [r1, #92] @ 0x5c │ │ lsls r3, r5, #1 │ │ adds r3, #51 @ 0x33 │ │ subs r7, #115 @ 0x73 │ │ ldmia r4!, {r0, r2, r3, r6, r7} │ │ subs r5, #76 @ 0x4c │ │ - ldr r2, [pc, #956] @ (2082070 ) │ │ - mrc2 12, 0, lr, cr10, cr15, {4} │ │ - cdp2 12, 1, cr14, cr9, cr15, {4} │ │ - mrc2 15, 0, r6, cr9, cr6, {1} │ │ + ldr r3, [pc, #112] @ (2081d24 ) │ │ + cdp2 12, 1, cr14, cr10, cr12, {6} │ │ + mrc2 12, 0, lr, cr9, cr12, {5} │ │ + cdp2 15, 1, cr6, cr9, cr3, {3} │ │ mrc2 10, 0, sp, cr9, cr12, {1} @ │ │ movs r2, #56 @ 0x38 │ │ adds r2, r5, #5 │ │ asrs r2, r2 │ │ - b.n 2082430 │ │ - mrc2 10, 0, r6, cr11, cr12, {4} @ │ │ - mrc2 10, 0, r3, cr10, cr8, {1} @ │ │ + b.n 208248a │ │ + @ instruction: 0xfe1b6ac9 │ │ + @ instruction: 0xfe1a3a65 │ │ cdp2 6, 1, cr6, cr12, cr6, {3} │ │ subs r7, #134 @ 0x86 │ │ mov r0, r8 │ │ blx 27001a0 │ │ mov r0, r9 │ │ blx 2700140 │ │ ldr.w r1, [r8, #20] │ │ @@ -7376,35 +7376,35 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #120] @ 0x78 │ │ blxne 26ffad0 │ │ ldr.w r0, [r8, #16] │ │ blx 2700650 │ │ b.w 2080fec │ │ - movs r3, #27 │ │ + movs r3, #72 @ 0x48 │ │ cdp2 12, 1, cr12, cr9, cr13, {6} │ │ subs r6, #76 @ 0x4c │ │ - @ instruction: 0x479a │ │ + @ instruction: 0x47c7 │ │ mrc2 7, 0, r5, cr9, cr4, {6} │ │ lsls r3, r5, #1 │ │ movs r0, r0 │ │ movs r6, #52 @ 0x34 │ │ ldr r5, [r6, #60] @ 0x3c │ │ orrs r4, r1 │ │ bcs.n 2082112 │ │ mrc2 5, 0, r5, cr12, cr2, {6} │ │ lsls r3, r5, #1 │ │ - subs r5, r1, r4 │ │ + subs r2, r7, r4 │ │ cdp2 15, 1, cr11, cr12, cr0, {0} │ │ nop │ │ ldrsb r6, [r2, r0] │ │ ldr r6, [sp, #924] @ 0x39c │ │ lsls r7, r5, #14 │ │ subs r4, #210 @ 0xd2 │ │ - stc2l 14, cr15, [ip], #108 @ 0x6c │ │ + ldc2 14, cr15, [r9, #-108] @ 0xffffff94 │ │ ldr.w r4, [r8, #20] │ │ mov.w r5, #1048576 @ 0x100000 │ │ cmp r6, #117 @ 0x75 │ │ it eq │ │ moveq r5, #4 │ │ mov r0, r4 │ │ blx 2700180 │ │ @@ -7793,35 +7793,35 @@ │ │ ldr r3, [r1, #8] │ │ mov r1, r8 │ │ blx r3 │ │ cmp r5, r4 │ │ bne.n 20825bc │ │ b.w 2080fec │ │ nop │ │ - b.n 20828ac │ │ + b.n 2082906 │ │ cdp2 0, 1, cr0, cr10, cr0, {0} │ │ movs r0, r0 │ │ - blt.n 208253c │ │ + blt.n 2082596 │ │ mrc2 3, 0, r5, cr11, cr14, {1} │ │ lsls r3, r5, #1 │ │ ldmia r4!, {r0, r2, r3, r6, r7} │ │ pop {r2, r3, r6, r7, pc} │ │ - ldrsh r2, [r0, r0] │ │ + ldrsh r7, [r5, r0] │ │ cdp2 2, 1, cr5, cr11, cr14, {5} │ │ lsls r3, r5, #1 │ │ - @ instruction: 0xfa69fe1b │ │ - @ instruction: 0xfbccfe1a │ │ - bkpt 0x006a │ │ - mrc2 9, 0, sp, cr9, cr6, {5} @ │ │ + qadd16 lr, r6, fp │ │ + @ instruction: 0xfbf9fe1a │ │ + bkpt 0x0097 │ │ + @ instruction: 0xfe19d9e3 │ │ cdp2 1, 1, cr5, cr11, cr6, {2} │ │ lsls r3, r5, #1 │ │ - strh r3, [r5, #12] │ │ - mrc2 12, 0, r7, cr9, cr11, {7} │ │ - cdp2 1, 1, cr9, cr11, cr9, {4} │ │ - mrc2 11, 0, r5, cr12, cr3, {4} @ │ │ + strh r0, [r3, #14] │ │ + cdp2 13, 1, cr7, cr9, cr8, {1} │ │ + mrc2 1, 0, r9, cr11, cr6, {5} │ │ + @ instruction: 0xfe1c5bc0 │ │ cdp2 12, 1, cr12, cr11, cr13, {6} │ │ subs r5, #204 @ 0xcc │ │ ldr.w r0, [r8, #20] │ │ blx 2700820 │ │ vmov.f32 s0, #40 @ 0x41400000 12.0 │ │ vmov s2, r0 │ │ vcmp.f32 s2, s0 │ │ @@ -8161,34 +8161,34 @@ │ │ ldr r3, [r1, #8] │ │ mov r1, r8 │ │ blx r3 │ │ cmp r5, r4 │ │ bne.n 20829dc │ │ b.w 2080fec │ │ nop │ │ - ldrh r2, [r3, r3] │ │ + ldrh r7, [r0, r4] │ │ cdp2 15, 1, cr4, cr11, cr6, {4} │ │ lsls r3, r5, #1 │ │ - ldrb r1, [r7, #29] │ │ - mrc2 15, 0, r2, cr9, cr6, {3} │ │ + ldrb r6, [r4, #30] │ │ + cdp2 15, 1, cr2, cr9, cr3, {5} │ │ mrc2 14, 0, r4, cr12, cr4, {5} │ │ lsls r3, r5, #1 │ │ lsrs r2, r3, #6 │ │ adcs.w r5, r1, #260096 @ 0x3f800 │ │ cmp r1, r4 │ │ ldr r6, [pc, #472] @ (2082bec ) │ │ lsls r3, r5, #1 │ │ - ldr r6, [r1, #76] @ 0x4c │ │ - mrc2 5, 0, sp, cr12, cr3, {6} │ │ - vfmsl.f16 , d11, d0[1] │ │ - mrc2 11, 0, r3, cr9, cr12, {6} @ │ │ + ldr r3, [r7, #76] @ 0x4c │ │ + cdp2 6, 1, cr13, cr12, cr0, {0} │ │ + vcmla.f16 d1, d27, d5[0], #90 │ │ + cdp2 12, 1, cr3, cr9, cr9, {0} │ │ mrc2 9, 0, ip, cr10, cr15, {7} @ │ │ mrc2 12, 0, r4, cr12, cr2, {7} │ │ lsls r3, r5, #1 │ │ - asrs r0, r2, #29 │ │ + asrs r5, r7, #29 │ │ vfmsl.f16 , d25, d0[1] │ │ movs r4, r2 │ │ movs r1, #2 │ │ blx 27007b0 │ │ ldr r0, [pc, #716] @ (2082d08 ) │ │ add r0, pc │ │ blx 26ffdd0 │ │ @@ -8441,21 +8441,21 @@ │ │ ldrb.w r0, [sp, #112] @ 0x70 │ │ lsls r0, r0, #31 │ │ bne.n 2082cee │ │ blx 26ffaf0 │ │ ldr r0, [sp, #120] @ 0x78 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ - bls.n 2082d02 │ │ - mrc2 9, 0, r3, cr10, cr9, {2} @ │ │ - cdp2 5, 1, cr5, cr10, cr9, {7} │ │ - cdp2 2, 1, cr13, cr11, cr12, {7} │ │ - mrc2 12, 0, r7, cr11, cr0, {1} │ │ - vcmla.f16 , , d13[0], #90 │ │ - mrc2 2, 0, sp, cr11, cr9, {4} │ │ + bls.n 2082d5c │ │ + vselvs.f16 s6, s21, s12 │ │ + mrc2 6, 0, r5, cr10, cr6, {0} │ │ + mrc2 3, 0, sp, cr11, cr9, {0} │ │ + mrc2 12, 0, r7, cr11, cr13, {2} │ │ + vfmsl.f16 , d9, d2[3] │ │ + cdp2 2, 1, cr13, cr11, cr6, {6} │ │ mrc2 10, 0, r4, cr11, cr4, {3} @ │ │ lsls r3, r5, #1 │ │ stmia r6!, {r0, r1, r3, r4, r5, r6, r7} │ │ Address 0x2082d1a is out of bounds. │ │ │ │ │ │ 02082d1c : │ │ @@ -8597,16 +8597,16 @@ │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ mov r0, r4 │ │ bl 207d398 │ │ ldr r0, [pc, #8] @ (2082e88 ) │ │ lsls r3, r5, #1 │ │ - cbz r5, 2082ee0 , std::__ndk1::allocator > const&, double)@@Base+0x28> │ │ - mrc2 14, 0, r0, cr10, cr0, {5} │ │ + cbz r2, 2082eec , std::__ndk1::allocator > const&, double)@@Base+0x34> │ │ + mrc2 14, 0, r0, cr10, cr13, {6} │ │ mrc2 7, 0, r4, cr11, cr12, {2} │ │ lsls r3, r5, #1 │ │ │ │ 02082e8c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -8892,18 +8892,18 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #16] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ cmp r2, r7 │ │ lsls r3, r5, #1 │ │ - strb r3, [r7, #17] │ │ + strb r0, [r5, #18] │ │ cdp2 4, 1, cr4, cr10, cr4, {2} │ │ lsls r3, r5, #1 │ │ - strh r0, [r7, #48] @ 0x30 │ │ + strh r5, [r4, #50] @ 0x32 │ │ Address 0x20831b6 is out of bounds. │ │ │ │ │ │ 020831b8 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r2, r1 │ │ @@ -9478,15 +9478,15 @@ │ │ b.n 208373c >)@@Base+0x118> │ │ add r0, sp, #16 │ │ blx 26ffd10 │ │ blx 26ffaf0 │ │ nop │ │ subs r7, #126 @ 0x7e │ │ lsls r3, r5, #1 │ │ - movs r7, #177 @ 0xb1 │ │ + movs r7, #222 @ 0xde │ │ mrc2 14, 0, r3, cr11, cr8, {5} │ │ lsls r3, r5, #1 │ │ │ │ 02083754 , std::__ndk1::allocator > const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -9576,15 +9576,15 @@ │ │ ittt eq │ │ addeq sp, #16 │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ subs r6, #84 @ 0x54 │ │ lsls r3, r5, #1 │ │ - add r2, sp, #856 @ 0x358 │ │ + add r3, sp, #12 │ │ mrc2 13, 0, r3, cr9, cr10, {4} │ │ lsls r3, r5, #1 │ │ │ │ 02083844 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ @@ -10646,15 +10646,15 @@ │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ adds r3, #51 @ 0x33 │ │ rors r3, r1 │ │ movs r0, r0 │ │ negs r4, r2 │ │ - bl 1ffb274 │ │ + bl 2028274 │ │ │ │ 02084640 : │ │ movs r0, #1 │ │ bx lr │ │ │ │ 02084644 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -10800,15 +10800,15 @@ │ │ movs r3, #34 @ 0x22 │ │ strd r5, r5, [sp] │ │ blx 26ffdf0 │ │ b.n 2084788 │ │ nop │ │ cmp r7, #100 @ 0x64 │ │ lsls r3, r5, #1 │ │ - bkpt 0x0076 │ │ + bkpt 0x00a3 │ │ cdp2 14, 1, cr2, cr9, cr12, {1} │ │ lsls r3, r5, #1 │ │ │ │ 020847e0 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ @@ -10833,15 +10833,15 @@ │ │ strd r1, lr, [sp, #8] │ │ add.w r1, r4, #24 │ │ strd ip, r5, [sp] │ │ blx 2700b60 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - bl 1d27460 │ │ + bl 1d54460 │ │ │ │ 0208482c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #8 │ │ mov r6, r0 │ │ @@ -10888,15 +10888,15 @@ │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ bx ip │ │ add sp, #8 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - strt pc, [r2, #24] │ │ + str??t pc, [pc, #-3608] @ 2083aa4 │ │ │ │ 020848bc : │ │ ldr.w ip, [sp] │ │ strd r1, r3, [r0, #32] │ │ strd r2, ip, [r0, #40] @ 0x28 │ │ bx lr │ │ │ │ @@ -11205,22 +11205,22 @@ │ │ ldr r1, [r1, #0] │ │ cmp r1, r0 │ │ itt eq │ │ addeq sp, #24 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ - cbnz r7, 2084bd4 > const&, ProgressNotifier*)@@Base+0x2c> │ │ + cbnz r4, 2084be0 > const&, ProgressNotifier*)@@Base+0x38> │ │ mrc2 10, 0, r2, cr9, cr8, {4} @ │ │ lsls r3, r5, #1 │ │ - cbnz r1, 2084bd8 > const&, ProgressNotifier*)@@Base+0x30> │ │ + cbnz r6, 2084be2 > const&, ProgressNotifier*)@@Base+0x3a> │ │ mrc2 10, 0, r2, cr9, cr12, {5} @ │ │ lsls r3, r5, #1 │ │ - subs r3, #30 │ │ - cdp2 4, 1, cr7, cr10, cr13, {3} │ │ + subs r3, #75 @ 0x4b │ │ + mrc2 4, 0, r7, cr10, cr10, {4} │ │ @ instruction: 0xfe1b2a44 │ │ lsls r3, r5, #1 │ │ │ │ 02084ba8 > const&, ProgressNotifier*)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -11640,33 +11640,33 @@ │ │ subs r2, #16 │ │ vld1.64 {d16-d17}, [r9] │ │ cmp r9, r5 │ │ vst1.64 {d16-d17}, [r2] │ │ bne.n 2085010 > const&, ProgressNotifier*)@@Base+0x468> │ │ ldr.w r9, [ip] │ │ b.n 208505e > const&, ProgressNotifier*)@@Base+0x4b6> │ │ - bl 1d47c5c │ │ + bl 1d74c5c │ │ cmp r1, #112 @ 0x70 │ │ lsls r3, r5, #1 │ │ - str r5, [sp, #480] @ 0x1e0 │ │ - mrc2 3, 0, pc, cr11, cr11, {7} │ │ - cdp2 7, 1, cr4, cr8, cr15, {5} │ │ - cdp2 0, 1, cr1, cr12, cr8, {4} │ │ - vselvs.f16 s12, s22, s26 │ │ + str r5, [sp, #660] @ 0x294 │ │ + cdp2 4, 1, cr15, cr11, cr8, {1} │ │ + mrc2 7, 0, r4, cr8, cr12, {6} │ │ + mrc2 0, 0, r1, cr12, cr5, {5} │ │ + mrc2 9, 0, r6, cr11, cr10, {1} @ │ │ mrc2 7, 0, r2, cr12, cr14, {1} │ │ lsls r3, r5, #1 │ │ movs r0, r0 │ │ movs r0, r0 │ │ adds r0, r0, r0 │ │ lsrs r5, r6 │ │ movs r0, r0 │ │ stmia r0!, {} │ │ ldr r6, [sp, #788] @ 0x314 │ │ adcs r2, r0 │ │ - ldrsb r5, [r3, r5] │ │ + ldrsb r2, [r1, r6] │ │ vselvs.f64 d9, d9, d11 │ │ add.w r0, r0, r4, lsl #4 │ │ add.w r4, r1, #16 │ │ cmp.w r9, #0 │ │ mov r6, r3 │ │ strd r2, r4, [r3, #1012] @ 0x3f4 │ │ str.w r0, [r3, #1020] @ 0x3fc │ │ @@ -12029,26 +12029,26 @@ │ │ ldr r2, [r1, #8] │ │ add r1, sp, #80 @ 0x50 │ │ blx r2 │ │ b.n 20854bc > const&, ProgressNotifier*)@@Base+0x914> │ │ nop │ │ movs r5, #62 @ 0x3e │ │ lsls r3, r5, #1 │ │ - ldrh r0, [r7, #58] @ 0x3a │ │ + ldrh r5, [r4, #60] @ 0x3c │ │ cdp2 4, 1, cr2, cr10, cr0, {2} │ │ lsls r3, r5, #1 │ │ movs r0, r0 │ │ orrs r4, r6 │ │ adds.w r0, sl, #15400960 @ 0xeb0000 │ │ adds.w r0, r4, #15400960 @ 0xeb0000 │ │ lsrs r3, r3, #31 │ │ eors r1, r1 │ │ - ldr r1, [r1, #100] @ 0x64 │ │ + ldr r6, [r6, #100] @ 0x64 │ │ mrc2 15, 0, r9, cr9, cr9, {1} │ │ - cdp2 1, 1, cr1, cr12, cr12, {6} │ │ + mrc2 1, 0, r1, cr12, cr9, {7} │ │ mrc2 2, 0, pc, cr9, cr10, {3} │ │ b.n 2084dc2 > const&, ProgressNotifier*)@@Base+0x21a> │ │ mov r4, r0 │ │ ldr r0, [r0, #8] │ │ cmp r0, #0 │ │ bmi.n 20854bc > const&, ProgressNotifier*)@@Base+0x914> │ │ ldrb.w r0, [sp, #80] @ 0x50 │ │ @@ -12435,22 +12435,22 @@ │ │ blx 2700fe0 │ │ b.n 2085926 > const&, ProgressNotifier*)@@Base+0xd7e> │ │ nop │ │ movs r0, #212 @ 0xd4 │ │ lsls r3, r5, #1 │ │ movs r0, #98 @ 0x62 │ │ lsls r3, r5, #1 │ │ - subs r7, #7 │ │ - vfmsl.f16 q5, d12, d1[0] │ │ - mrc2 11, 0, r4, cr11, cr14, {7} @ │ │ + subs r7, #52 @ 0x34 │ │ + vfmsl.f16 q5, d12, d6[3] │ │ + cdp2 12, 1, cr4, cr11, cr11, {1} │ │ mrc2 15, 0, r1, cr11, cr6, {5} │ │ lsls r3, r5, #1 │ │ subs r2, r6, #5 │ │ lsls r3, r5, #1 │ │ - cmp r2, #18 │ │ + cmp r2, #63 @ 0x3f │ │ mrc2 9, 0, r2, cr11, cr8, {7} @ │ │ lsls r3, r5, #1 │ │ ldrd r2, r1, [r0, #184] @ 0xb8 │ │ add r0, sp, #80 @ 0x50 │ │ bl 207d350 │ │ add r1, sp, #80 @ 0x50 │ │ mov r0, r4 │ │ @@ -12635,33 +12635,33 @@ │ │ blx 2700f90 │ │ b.n 2085b42 > const&, ProgressNotifier*)@@Base+0xf9a> │ │ movs r0, #0 │ │ b.n 2085b3e > const&, ProgressNotifier*)@@Base+0xf96> │ │ movs r0, #1 │ │ b.n 2085b3e > const&, ProgressNotifier*)@@Base+0xf96> │ │ nop │ │ - lsrs r2, r0, #25 │ │ - vselvs.f16 s28, s18, s5 │ │ + lsrs r7, r5, #25 │ │ + @ instruction: 0xfe19e94f │ │ mrc2 13, 0, r1, cr8, cr10, {4} │ │ lsls r3, r5, #1 │ │ ldrb r2, [r3, #29] │ │ - mrc2 0, 0, r3, cr12, cr1, {3} │ │ + mrc2 0, 0, r3, cr12, cr14, {4} │ │ mrc2 14, 0, r7, cr9, cr6, {5} │ │ - mrc2 10, 0, sl, cr12, cr1, {4} @ │ │ - mrc2 10, 0, sl, cr10, cr6, {3} @ │ │ - cdp2 2, 1, cr2, cr10, cr6, {7} │ │ - @ instruction: 0xfe1c3b4d │ │ - mrc2 12, 0, sl, cr12, cr7, {3} │ │ - mrc2 12, 0, r6, cr9, cr13, {6} │ │ - vfmsl.f16 d4, s20, s12[1] │ │ - cdp2 12, 1, cr4, cr11, cr6, {3} │ │ - cdp2 12, 1, cr4, cr9, cr4, {2} │ │ - mrc2 5, 0, r6, cr9, cr7, {1} │ │ - mrc2 5, 0, r6, cr11, cr9, {0} │ │ - mrc2 9, 0, r0, cr11, cr14, {4} @ │ │ + mrc2 10, 0, sl, cr12, cr14, {5} @ │ │ + vselvs.f32 s20, s21, s7 │ │ + mrc2 3, 0, r2, cr10, cr3, {0} │ │ + mrc2 11, 0, r3, cr12, cr10, {3} @ │ │ + cdp2 12, 1, cr10, cr12, cr4, {5} │ │ + cdp2 13, 1, cr6, cr9, cr10, {0} │ │ + vcmla.f16 q2, q5, d11[0], #90 │ │ + mrc2 12, 0, r4, cr11, cr3, {4} │ │ + mrc2 12, 0, r4, cr9, cr1, {3} │ │ + cdp2 5, 1, cr6, cr9, cr4, {3} │ │ + cdp2 5, 1, cr6, cr11, cr6, {2} │ │ + @ instruction: 0xfe1b09cb │ │ cdp2 0, 1, cr2, cr10, cr2, {0} │ │ str.w r0, [sl, #704] @ 0x2c0 │ │ ldr.w r3, [sl] │ │ ldrb.w r0, [r3, #776] @ 0x308 │ │ ldr.w r1, [r3, #780] @ 0x30c │ │ lsls r6, r0, #31 │ │ it eq │ │ @@ -12966,19 +12966,19 @@ │ │ add r0, sp, #80 @ 0x50 │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ bl 207de6a │ │ nop │ │ movs r2, #22 │ │ lsls r3, r5, #1 │ │ - @ instruction: 0xea00fe19 │ │ - cmp r5, #196 @ 0xc4 │ │ - mrc2 9, 0, r3, cr9, cr6, {3} @ │ │ - vfmsl.f16 q7, d28, d0[0] │ │ - cdp2 4, 1, cr14, cr9, cr9, {1} │ │ + @ instruction: 0xea2dfe19 │ │ + cmp r5, #241 @ 0xf1 │ │ + vselvs.f16 s6, s19, s7 │ │ + vfmsl.f16 q7, d28, d5[3] │ │ + mrc2 4, 0, lr, cr9, cr6, {2} │ │ Address 0x2085ea6 is out of bounds. │ │ │ │ │ │ 02085ea8 : │ │ mov r2, r1 │ │ ldr r1, [r0, #0] │ │ b.w 26fe884 │ │ @@ -13096,15 +13096,15 @@ │ │ b.n 2085fc6 │ │ b.n 2085fc6 │ │ add r0, sp, #20 │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ asrs r0, r7, #27 │ │ lsls r3, r5, #1 │ │ - stmia r5!, {r3, r5, r6, r7} │ │ + stmia r6!, {r0, r2, r4} │ │ cdp2 6, 1, cr1, cr9, cr10, {7} │ │ lsls r3, r5, #1 │ │ asrs r4, r0, #26 │ │ lsls r3, r5, #1 │ │ asrs r6, r2, #24 │ │ lsls r3, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -13777,19 +13777,19 @@ │ │ bl 208682a │ │ b.n 208668e │ │ add r0, sp, #72 @ 0x48 │ │ bl 20867f0 │ │ blx 26ffaf0 │ │ asrs r2, r0, #11 │ │ lsls r3, r5, #1 │ │ - bls.n 20866a0 │ │ + bls.n 20866fa │ │ cdp2 15, 1, cr0, cr10, cr8, {4} │ │ lsls r3, r5, #1 │ │ - ldr r2, [sp, #468] @ 0x1d4 │ │ - cdp2 12, 1, cr13, cr11, cr5, {3} │ │ + ldr r2, [sp, #648] @ 0x288 │ │ + mrc2 12, 0, sp, cr11, cr2, {4} │ │ cdp2 1, 1, cr1, cr8, cr2, {2} │ │ lsls r3, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #72 @ 0x48 │ │ mov r5, r0 │ │ @@ -13909,15 +13909,15 @@ │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ lsrs r2, r7, #27 │ │ lsls r3, r5, #1 │ │ lsrs r2, r6, #24 │ │ lsls r3, r5, #1 │ │ - ldr r5, [sp, #80] @ 0x50 │ │ + ldr r5, [sp, #260] @ 0x104 │ │ mrc2 5, 0, fp, cr10, cr0, {5} │ │ add r7, sp, #8 │ │ ldr r4, [r0, #4] │ │ cbz r4, 2086828 │ │ adds r1, r4, #4 │ │ dmb ish │ │ ldrex r2, [r1] │ │ @@ -14893,25 +14893,25 @@ │ │ cbz r0, 20870d0 , std::__ndk1::allocator > const&, Selection)@@Base+0x318> │ │ ldr r1, [r0, #0] │ │ ldr r1, [r1, #4] │ │ blx r1 │ │ blx 26ffaf0 │ │ lsls r2, r6, #31 │ │ lsls r3, r5, #1 │ │ - bcs.n 208707c , std::__ndk1::allocator > const&, Selection)@@Base+0x2c4> │ │ + bcs.n 20870d6 , std::__ndk1::allocator > const&, Selection)@@Base+0x31e> │ │ mrc2 5, 0, r0, cr8, cr2, {2} │ │ lsls r3, r5, #1 │ │ - subs r0, #18 │ │ - mrc2 3, 0, r3, cr9, cr1, {6} │ │ - mrc2 13, 0, ip, cr11, cr0, {6} │ │ - mrc2 15, 0, lr, cr10, cr11, {1} │ │ - mrc2 1, 0, r7, cr10, cr14, {7} │ │ - mrc2 5, 0, fp, cr10, cr0, {2} │ │ - cdp2 14, 1, cr14, cr9, cr9, {5} │ │ - cdp2 14, 1, cr14, cr10, cr11, {2} │ │ + subs r0, #63 @ 0x3f │ │ + mrc2 3, 0, r3, cr9, cr14, {7} │ │ + mrc2 13, 0, ip, cr11, cr13, {7} │ │ + cdp2 15, 1, cr14, cr10, cr8, {3} │ │ + cdp2 2, 1, cr7, cr10, cr11, {1} │ │ + mrc2 5, 0, fp, cr10, cr13, {3} │ │ + mrc2 14, 0, lr, cr9, cr6, {6} │ │ + mrc2 14, 0, lr, cr10, cr8, {3} │ │ mrc2 5, 0, fp, cr10, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ mov r4, r0 │ │ movs r0, #52 @ 0x34 │ │ mov r6, r1 │ │ blx 26ffb80 │ │ @@ -15320,15 +15320,15 @@ │ │ moveq r0, r4 │ │ addeq sp, #32 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ lsls r4, r0, #4 │ │ lsls r3, r5, #1 │ │ - b.n 20878ec │ │ + b.n 2087946 │ │ cdp2 0, 1, cr0, cr11, cr8, {5} │ │ lsls r3, r5, #1 │ │ │ │ 02087538 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -15447,18 +15447,18 @@ │ │ str r1, [sp, #44] @ 0x2c │ │ cmp r0, #0 │ │ it ne │ │ blxne 2701530 │ │ blx 26ffaf0 │ │ lsls r2, r6, #1 │ │ lsls r3, r5, #1 │ │ - asrs r2, r3, #14 │ │ + asrs r7, r0, #15 │ │ cdp2 0, 1, cr0, cr9, cr6, {1} │ │ lsls r3, r5, #1 │ │ - b.n 208780c │ │ + b.n 2087866 │ │ cdp2 15, 1, cr15, cr11, cr2, {4} │ │ lsls r2, r5, #1 │ │ │ │ 02087678 : │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr.w r3, [r1, #588] @ 0x24c │ │ @@ -16763,15 +16763,15 @@ │ │ bics.w r0, r0, #15335424 @ 0xea0000 │ │ @ instruction: 0xf3f8006a │ │ @ instruction: 0xf3a6006a │ │ @ instruction: 0xf38a006a │ │ @ instruction: 0xf35c006a │ │ @ instruction: 0xf32a006a │ │ eor.w r0, r6, #15335424 @ 0xea0000 │ │ - ldrsh r1, [r1, r7] │ │ + ldrsh r6, [r6, r7] │ │ mrc2 3, 0, pc, cr10, cr4, {0} │ │ lsls r2, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r4, [r0, #0] │ │ movs r1, #0 │ │ @@ -17587,18 +17587,18 @@ │ │ beq.n 2088b2e ::format_custom_arg >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x4e6> │ │ ldr r0, [pc, #12] @ (2088b54 ::format_custom_arg >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x50c>) │ │ add r0, pc │ │ bl 221a310 │ │ ldr r0, [pc, #16] @ (2088b60 ::format_custom_arg >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x518>) │ │ add r0, pc │ │ bl 221a310 │ │ - smmlsr lr, r7, r9, pc @ │ │ + @ instruction: 0xfb94fe19 │ │ str r5, [sp, #548] @ 0x224 │ │ - mrc2 10, 0, sp, cr8, cr10, {2} @ │ │ - mrc2 10, 0, sp, cr9, cr5, {4} @ │ │ + vselvs.f32 s26, s17, s14 │ │ + @ instruction: 0xfe19dac2 │ │ mrc2 5, 0, fp, cr8, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ ldr r5, [pc, #236] @ (2088c5c ::format_custom_arg >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x614>) │ │ add r5, pc │ │ ldr r5, [r5, #0] │ │ @@ -17692,19 +17692,19 @@ │ │ add r0, pc │ │ bl 221a310 │ │ ldr r0, [pc, #20] @ (2088c68 ::format_custom_arg >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x620>) │ │ add r0, pc │ │ bl 221a310 │ │ nop │ │ orr.w r0, ip, sl, asr #1 │ │ - ldrb r4, [r2, #10] │ │ + ldrb r1, [r0, #11] │ │ vselvs.f16 s28, s19, s20 │ │ lsls r2, r5, #1 │ │ - qadd8 lr, r4, r9 │ │ - strb r4, [r2, r4] │ │ + @ instruction: 0xfab1fe19 │ │ + strb r1, [r0, r5] │ │ mrc2 5, 0, fp, cr10, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldrb r3, [r0, #0] │ │ sub.w r6, r3, #48 @ 0x30 │ │ cmp r6, #9 │ │ bhi.n 2088c90 ::format_custom_arg >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x648> │ │ @@ -17797,16 +17797,16 @@ │ │ ldr r0, [pc, #20] @ (2088d80 ::format_custom_arg >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x738>) │ │ add r0, pc │ │ bl 221a310 │ │ ldr r0, [pc, #8] @ (2088d7c ::format_custom_arg >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x734>) │ │ add r0, pc │ │ bl 221a310 │ │ nop │ │ - asrs r4, r0, #31 │ │ - mrc2 3, 0, r5, cr10, cr4, {7} │ │ + asrs r1, r6, #31 │ │ + cdp2 4, 1, cr5, cr10, cr1, {1} │ │ Address 0x2088d82 is out of bounds. │ │ │ │ │ │ 02088d84 >, char, void>::format(std::__ndk1::basic_string_view >, fmt::v11::context&) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -17952,15 +17952,15 @@ │ │ ldr r0, [pc, #12] @ (2088efc >, char, void>::format(std::__ndk1::basic_string_view >, fmt::v11::context&) const@@Base+0x178>) │ │ add r0, pc │ │ bl 221a310 │ │ b.n 2088dc8 >, char, void>::format(std::__ndk1::basic_string_view >, fmt::v11::context&) const@@Base+0x44> │ │ lsls r2, r5, #1 │ │ b.n 2088cc8 ::format_custom_arg >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x680> │ │ lsls r2, r5, #1 │ │ - strh r3, [r2, r6] │ │ + strh r0, [r0, r7] │ │ mrc2 5, 0, fp, cr9, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #24 │ │ mov r6, r0 │ │ ldr r0, [pc, #160] @ (2088fb0 >, char, void>::format(std::__ndk1::basic_string_view >, fmt::v11::context&) const@@Base+0x22c>) │ │ cmp r1, #2 │ │ @@ -18026,15 +18026,15 @@ │ │ ldr r0, [pc, #12] @ (2088fb8 >, char, void>::format(std::__ndk1::basic_string_view >, fmt::v11::context&) const@@Base+0x234>) │ │ add r0, pc │ │ bl 221a310 │ │ b.n 2088d0c ::format_custom_arg >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x6c4> │ │ lsls r2, r5, #1 │ │ b.n 2088c0c ::format_custom_arg >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x5c4> │ │ lsls r2, r5, #1 │ │ - strh r7, [r2, r3] │ │ + strh r4, [r0, r4] │ │ mrc2 5, 0, fp, cr9, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #52 @ 0x34 │ │ mov r8, r0 │ │ ldr r0, [pc, #340] @ (2089120 >, char, void>::format(std::__ndk1::basic_string_view >, fmt::v11::context&) const@@Base+0x39c>) │ │ mov r4, r3 │ │ @@ -18763,18 +18763,18 @@ │ │ bne.n 20896f4 >, char, void>::format(std::__ndk1::basic_string_view >, fmt::v11::context&) const@@Base+0x970> │ │ add r0, lr │ │ sub.w r0, r0, ip │ │ b.n 2089654 >, char, void>::format(std::__ndk1::basic_string_view >, fmt::v11::context&) const@@Base+0x8d0> │ │ nop │ │ svc 140 @ 0x8c │ │ lsls r2, r5, #1 │ │ - b.n 2089322 >, char, void>::format(std::__ndk1::basic_string_view >, fmt::v11::context&) const@@Base+0x59e> │ │ - mrc2 5, 0, lr, cr11, cr13, {6} │ │ - mrc2 5, 0, lr, cr11, cr9, {5} │ │ - cdp2 5, 1, cr14, cr11, cr13, {4} │ │ + b.n 208937c >, char, void>::format(std::__ndk1::basic_string_view >, fmt::v11::context&) const@@Base+0x5f8> │ │ + cdp2 6, 1, cr14, cr11, cr10, {0} │ │ + cdp2 5, 1, cr14, cr11, cr6, {7} │ │ + mrc2 5, 0, lr, cr11, cr10, {5} │ │ cdp2 15, 1, cr13, cr11, cr4, {3} │ │ lsls r2, r5, #1 │ │ │ │ 02089730 )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -19553,15 +19553,15 @@ │ │ moveq r0, r4 │ │ addeq sp, #8 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ bvc.n 2089ff0 )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0x8c0> │ │ lsls r2, r5, #1 │ │ - ble.n 2089ede )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0x7ae> │ │ + udf #16 │ │ cdp2 6, 1, cr13, cr11, cr4, {6} │ │ lsls r2, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #8 │ │ mov r4, r0 │ │ @@ -19649,15 +19649,15 @@ │ │ moveq r0, r4 │ │ addeq sp, #8 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ bvs.n 2089f0c )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0x7dc> │ │ lsls r2, r5, #1 │ │ - ble.n 208a002 )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0x8d2> │ │ + ble.n 208a05c )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0x92c> │ │ cdp2 5, 1, cr13, cr11, cr8, {7} │ │ lsls r2, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ mov r4, r0 │ │ @@ -19746,15 +19746,15 @@ │ │ addeq sp, #16 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ bpl.n 208a034 )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0x904> │ │ lsls r2, r5, #1 │ │ - bgt.n 208a126 )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0x9f6> │ │ + bgt.n 208a180 )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0xa50> │ │ cdp2 5, 1, cr13, cr11, cr10, {0} │ │ lsls r2, r5, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ subs r2, #1 │ │ cmp r2, #14 │ │ bhi.n 208a11c )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0x9ec> │ │ @@ -19783,17 +19783,17 @@ │ │ pop {r7, pc} │ │ ldr r0, [pc, #16] @ (208a130 )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0xa00>) │ │ add r0, pc │ │ bl 221a310 │ │ ldr r0, [pc, #12] @ (208a134 )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0xa04>) │ │ add r0, pc │ │ bl 221a310 │ │ - asrs r7, r6 │ │ - mrc2 11, 0, r9, cr11, cr7, {5} @ │ │ - mrc2 5, 0, r6, cr10, cr14, {1} │ │ + adcs r4, r4 │ │ + @ instruction: 0xfe1b9be4 │ │ + cdp2 5, 1, cr6, cr10, cr11, {3} │ │ mrc2 5, 0, fp, cr9, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ strd r1, r0, [sp, #12] │ │ ldr r0, [r1, #4] │ │ lsls r1, r0, #1 │ │ @@ -19920,23 +19920,23 @@ │ │ pop {r7, pc} │ │ ldr r0, [pc, #16] @ (208a298 )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0xb68>) │ │ add r0, pc │ │ bl 221a310 │ │ ldr r0, [pc, #12] @ (208a29c )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0xb6c>) │ │ add r0, pc │ │ bl 221a310 │ │ - stmia r2!, {r1, r2, r3, r6} │ │ - cdp2 1, 1, cr6, cr9, cr5, {3} │ │ - mrc2 3, 0, r6, cr10, cr6, {6} │ │ + stmia r2!, {r0, r1, r3, r4, r5, r6} │ │ + mrc2 1, 0, r6, cr9, cr2, {4} │ │ + cdp2 4, 1, cr6, cr10, cr3, {0} │ │ cdp2 5, 1, cr11, cr9, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (208a2ac )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0xb7c>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldrh r7, [r4, r7] │ │ + ldrb r4, [r2, r0] │ │ mrc2 5, 0, fp, cr11, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #68 @ 0x44 │ │ str r3, [sp, #12] │ │ mov r5, r0 │ │ ldr.w r0, [pc, #2700] @ 208ad4c )#1}>(fmt::v11::basic_string_view, fmt::v11::detail::find_escape(char const*, char const*)::{lambda(unsigned int, fmt::v11::basic_string_view)#1})::{lambda(char const*, char const*)#1}::operator()(char const*, char const*) const@@Base+0x161c> │ │ @@ -21913,15 +21913,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ bmi.n 208b9ba │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (208ba1c ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - add r7, lr │ │ + add ip, r4 │ │ mrc2 5, 0, fp, cr11, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ mov r4, r3 │ │ mov r6, r1 │ │ mov r8, r0 │ │ cmp r1, r2 │ │ @@ -33422,15 +33422,15 @@ │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2093da4 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x13c>) │ │ add r0, pc │ │ bl 2093da8 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x140> │ │ - stc2l 14, cr15, [r4, #104] @ 0x68 │ │ + ldc2l 14, cr15, [r1, #104]! @ 0x68 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r5, r0 │ │ movs r0, #8 │ │ blx 26ffb90 │ │ mov r4, r0 │ │ mov r1, r5 │ │ @@ -33745,15 +33745,15 @@ │ │ ldr r1, [r4, #8] │ │ b.n 2094130 >::__push_back_slow_path(std::__ndk1::__fs::filesystem::path const&)@@Base+0x180> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (209415c >::__push_back_slow_path(std::__ndk1::__fs::filesystem::path const&)@@Base+0x1ac>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - pop {r0, r1, r2, r4, r5, pc} │ │ + pop {r2, r5, r6, pc} │ │ Address 0x209415e is out of bounds. │ │ │ │ │ │ 02094160 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -34755,15 +34755,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ bmi.n 2094b1e ::InfoType* std::__ndk1::vector::InfoType, std::__ndk1::allocator::InfoType> >::__emplace_back_slow_path(WarpMeshInfo const&)@@Base+0x1e6> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2094b80 ::InfoType* std::__ndk1::vector::InfoType, std::__ndk1::allocator::InfoType> >::__emplace_back_slow_path(WarpMeshInfo const&)@@Base+0x248>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - cbz r3, 2094bc8 ::InfoType* std::__ndk1::vector::InfoType, std::__ndk1::allocator::InfoType> >::__emplace_back_slow_path(WarpMeshInfo const&)@@Base+0x290> │ │ + cbz r0, 2094bd4 ::InfoType* std::__ndk1::vector::InfoType, std::__ndk1::allocator::InfoType> >::__emplace_back_slow_path(WarpMeshInfo const&)@@Base+0x29c> │ │ mrc2 5, 0, fp, cr10, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ mov sl, r0 │ │ ldr r0, [pc, #236] @ (2094c80 ::InfoType* std::__ndk1::vector::InfoType, std::__ndk1::allocator::InfoType> >::__emplace_back_slow_path(WarpMeshInfo const&)@@Base+0x348>) │ │ mov r9, r2 │ │ @@ -35016,15 +35016,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ bmi.n 2094dae │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2094e10 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - sub sp, #12 │ │ + sub sp, #192 @ 0xc0 │ │ Address 0x2094e12 is out of bounds. │ │ │ │ │ │ 02094e14 >::__emplace_back_slow_path(CelestiaCore*&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -35213,15 +35213,15 @@ │ │ pop {r4, r5, r7, pc} │ │ bmi.n 2094fde >::__emplace_back_slow_path(CelestiaCore*&&)@@Base+0x1ca> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2095040 >::__emplace_back_slow_path(CelestiaCore*&&)@@Base+0x22c>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - add r6, sp, #332 @ 0x14c │ │ + add r6, sp, #512 @ 0x200 │ │ Address 0x2095042 is out of bounds. │ │ │ │ │ │ 02095044 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -35326,15 +35326,15 @@ │ │ blx 26ffaf0 │ │ bmi.n 209512a │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (209518c ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - add r5, sp, #28 │ │ + add r5, sp, #208 @ 0xd0 │ │ Address 0x209518e is out of bounds. │ │ │ │ │ │ 02095190 >::~__shared_ptr_emplace()@@Base>: │ │ ldr r1, [pc, #12] @ (20951a0 >::~__shared_ptr_emplace()@@Base+0x10>) │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ @@ -36194,23 +36194,23 @@ │ │ itttt eq │ │ moveq r0, r8 │ │ addeq sp, #260 @ 0x104 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ - strd pc, lr, [r7], #-92 @ 0x5c │ │ + ldmia.w r4, {r0, r1, r2, r4, r9, sl, fp, ip, sp, lr, pc} │ │ adds r0, r1, #3 │ │ lsls r2, r5, #1 │ │ - @ instruction: 0xe857fe17 │ │ - str r6, [r3, #100] @ 0x64 │ │ - cdp2 6, 1, cr6, cr10, cr12, {2} │ │ + stmia.w r4, {r0, r1, r2, r4, r9, sl, fp, ip, sp, lr, pc} │ │ + str r3, [r1, #104] @ 0x68 │ │ + mrc2 6, 0, r6, cr10, cr9, {3} │ │ cdp2 12, 1, cr1, cr10, cr0, {2} │ │ lsls r2, r5, #1 │ │ - str r2, [r7, #96] @ 0x60 │ │ + str r7, [r4, #100] @ 0x64 │ │ mrc2 12, 0, r1, cr10, cr6, {0} │ │ lsls r2, r5, #1 │ │ add r0, sp, #32 │ │ add r1, sp, #28 │ │ blx 2701c40 │ │ ldrb.w r0, [sp, #32] │ │ ldr.w fp, [sp, #40] @ 0x28 │ │ @@ -36225,15 +36225,15 @@ │ │ ldr r2, [pc, #12] @ (2095a88 ) │ │ add r2, pc │ │ add r0, sp, #240 @ 0xf0 │ │ mov r1, fp │ │ movs r3, #12 │ │ blx 2701c50 │ │ b.n 2095a8c │ │ - ldr r5, [r6, #68] @ 0x44 │ │ + ldr r2, [r4, #72] @ 0x48 │ │ vfmsl.f16 d15, s19, s10[1] │ │ lsls r4, r7, #3 │ │ cbz r0, 2095ab0 │ │ add r1, sp, #240 @ 0xf0 │ │ mov r0, r6 │ │ blx 26ffab0 │ │ ldrb.w r0, [sp, #252] @ 0xfc │ │ @@ -36246,15 +36246,15 @@ │ │ ldr r2, [pc, #12] @ (2095ac0 ) │ │ add r2, pc │ │ add r0, sp, #240 @ 0xf0 │ │ mov r1, fp │ │ movs r3, #16 │ │ blx 2701c50 │ │ b.n 2095ac4 │ │ - strh r2, [r4, #62] @ 0x3e │ │ + ldrh r7, [r1, #0] │ │ vfmsl.f16 d15, s17, s10[1] │ │ lsls r4, r7, #3 │ │ cbz r0, 2095aea │ │ add.w r0, r6, #12 │ │ add r1, sp, #240 @ 0xf0 │ │ blx 26ffab0 │ │ ldrb.w r0, [sp, #252] @ 0xfc │ │ @@ -36267,59 +36267,59 @@ │ │ ldr r2, [pc, #16] @ (2095afc ) │ │ add r2, pc │ │ add.w r0, r6, #24 │ │ mov r1, fp │ │ movs r3, #19 │ │ bl 20965b4 │ │ b.n 2095b00 │ │ - ldmia r2!, {r4} │ │ + ldmia r2, {r0, r2, r3, r4, r5} │ │ vselvs.f32 s8, s16, s8 │ │ add r2, pc │ │ add.w r0, r6, #36 @ 0x24 │ │ mov r1, fp │ │ movs r3, #12 │ │ bl 20965b4 │ │ b.n 2095b18 │ │ nop │ │ - cmp r6, #107 @ 0x6b │ │ + cmp r6, #152 @ 0x98 │ │ vselvs.f32 s8, s16, s8 │ │ add r2, pc │ │ add.w r0, r6, #48 @ 0x30 │ │ mov r1, fp │ │ movs r3, #15 │ │ bl 20965b4 │ │ b.n 2095b30 │ │ nop │ │ - ldrb r5, [r3, r0] │ │ + ldrb r2, [r1, r1] │ │ vselvs.f32 s8, s22, s8 │ │ add r2, pc │ │ add.w r0, r6, #60 @ 0x3c │ │ mov r1, fp │ │ movs r3, #17 │ │ bl 20965b4 │ │ b.n 2095b48 │ │ nop │ │ - b.n 2095be2 │ │ + b.n 2095c3c │ │ vselvs.f32 s8, s20, s8 │ │ add r2, pc │ │ add.w r0, r6, #72 @ 0x48 │ │ mov r1, fp │ │ movs r3, #10 │ │ bl 20965b4 │ │ b.n 2095b60 │ │ nop │ │ - add r3, pc, #356 @ (adr r3, 2095cc4 ) │ │ + add r3, pc, #536 @ (adr r3, 2095d78 ) │ │ vselvs.f32 s8, s20, s6 │ │ add r2, pc │ │ add r0, sp, #240 @ 0xf0 │ │ mov r1, fp │ │ movs r3, #13 │ │ blx 2701c50 │ │ b.n 2095b74 │ │ - lsrs r7, r4, #5 │ │ + lsrs r4, r2, #6 │ │ vfmsl.f16 d15, s19, s10[1] │ │ lsls r4, r7, #3 │ │ cbz r0, 2095b9a │ │ add.w r0, r6, #84 @ 0x54 │ │ add r1, sp, #240 @ 0xf0 │ │ blx 26ffab0 │ │ ldrb.w r0, [sp, #252] @ 0xfc │ │ @@ -36333,15 +36333,15 @@ │ │ add r2, pc │ │ add r0, sp, #240 @ 0xf0 │ │ mov r1, fp │ │ movs r3, #14 │ │ blx 2701c50 │ │ b.n 2095bb0 │ │ nop │ │ - add r0, sp, #440 @ 0x1b8 │ │ + add r0, sp, #620 @ 0x26c │ │ vfmsl.f16 d15, s19, s10[1] │ │ lsls r4, r7, #3 │ │ cbz r0, 2095bd6 │ │ add.w r0, r6, #96 @ 0x60 │ │ add r1, sp, #240 @ 0xf0 │ │ blx 26ffab0 │ │ ldrb.w r0, [sp, #252] @ 0xfc │ │ @@ -36355,15 +36355,15 @@ │ │ add r2, pc │ │ add r0, sp, #240 @ 0xf0 │ │ mov r1, fp │ │ movs r3, #13 │ │ blx 2701c50 │ │ b.n 2095bec │ │ nop │ │ - strh r6, [r5, #50] @ 0x32 │ │ + strh r3, [r3, #52] @ 0x34 │ │ vfmsl.f16 d15, s21, s10[1] │ │ lsls r4, r7, #3 │ │ cbz r0, 2095c12 │ │ add.w r0, r6, #108 @ 0x6c │ │ add r1, sp, #240 @ 0xf0 │ │ blx 26ffab0 │ │ ldrb.w r0, [sp, #252] @ 0xfc │ │ @@ -36377,15 +36377,15 @@ │ │ add r2, pc │ │ add r0, sp, #240 @ 0xf0 │ │ mov r1, fp │ │ movs r3, #10 │ │ blx 2701c50 │ │ b.n 2095c28 │ │ nop │ │ - mov r1, sl │ │ + mov r6, pc │ │ vfmsl.f16 d15, s21, s10[1] │ │ lsls r4, r7, #3 │ │ cbz r0, 2095c4e │ │ add.w r0, r6, #120 @ 0x78 │ │ add r1, sp, #240 @ 0xf0 │ │ blx 26ffab0 │ │ ldrb.w r0, [sp, #252] @ 0xfc │ │ @@ -36399,15 +36399,15 @@ │ │ add r2, pc │ │ add r0, sp, #240 @ 0xf0 │ │ mov r1, fp │ │ movs r3, #10 │ │ blx 2701c50 │ │ b.n 2095c64 │ │ nop │ │ - strh r4, [r0, #48] @ 0x30 │ │ + strh r1, [r6, #48] @ 0x30 │ │ vfmsl.f16 d15, s21, s10[1] │ │ lsls r4, r7, #3 │ │ cbz r0, 2095c8a │ │ add.w r0, r6, #132 @ 0x84 │ │ add r1, sp, #240 @ 0xf0 │ │ blx 26ffab0 │ │ ldrb.w r0, [sp, #252] @ 0xfc │ │ @@ -36421,15 +36421,15 @@ │ │ add r2, pc │ │ add r0, sp, #240 @ 0xf0 │ │ mov r1, fp │ │ movs r3, #15 │ │ blx 2701c50 │ │ b.n 2095ca0 │ │ nop │ │ - cmp ip, ip │ │ + mov r1, r2 │ │ vfmsl.f16 d15, s21, s10[1] │ │ lsls r4, r7, #3 │ │ cbz r0, 2095cc6 │ │ add.w r0, r6, #144 @ 0x90 │ │ add r1, sp, #240 @ 0xf0 │ │ blx 26ffab0 │ │ ldrb.w r0, [sp, #252] @ 0xfc │ │ @@ -36756,38 +36756,38 @@ │ │ ldrb.w r0, [sp, #248] @ 0xf8 │ │ cmp r0, #0 │ │ beq.n 20960f8 │ │ vldr d16, [sp, #240] @ 0xf0 │ │ vcvt.f32.f64 s0, d16 │ │ vstr s0, [r6, #332] @ 0x14c │ │ b.n 20960fc │ │ - lsrs r7, r1, #32 │ │ - vselvs.f16 s20, s19, s18 │ │ - mrc2 7, 0, r0, cr8, cr4, {5} │ │ - mrc2 0, 0, ip, cr9, cr11, {4} │ │ - cdp2 4, 1, cr4, cr10, cr8, {7} │ │ - mrc2 9, 0, r6, cr10, cr0, {1} @ │ │ - mrc2 7, 0, r0, cr9, cr14, {7} │ │ - vfmsl.f16 d15, s17, s5[0] │ │ - mrc2 14, 0, sp, cr10, cr5, {4} │ │ - mrc2 2, 0, r8, cr9, cr10, {6} │ │ - vfmsl.f16 q3, d9, d0[0] │ │ + lsrs r4, r7, #32 │ │ + mrc2 9, 0, sl, cr9, cr6, {5} @ │ │ + cdp2 7, 1, cr0, cr8, cr1, {7} │ │ + cdp2 0, 1, cr12, cr9, cr8, {6} │ │ + mrc2 5, 0, r4, cr10, cr5, {0} │ │ + mrc2 9, 0, r6, cr10, cr13, {2} @ │ │ + vcmla.f16 d0, d9, d11[1], #90 │ │ + vfmsl.f16 , d24, d7[1] │ │ + cdp2 14, 1, cr13, cr10, cr2, {6} │ │ + cdp2 3, 1, cr8, cr9, cr7, {0} │ │ + vfmsl.f16 q3, d9, d5[3] │ │ @ instruction: 0xfe19796b │ │ - mrc2 7, 0, sl, cr11, cr15, {4} │ │ - cdp2 6, 1, cr14, cr8, cr2, {4} │ │ - cdp2 5, 1, cr0, cr8, cr13, {6} │ │ - mrc2 3, 0, r4, cr9, cr14, {2} │ │ - cdp2 6, 1, cr14, cr10, cr5, {2} │ │ - cdp2 3, 1, cr8, cr8, cr13, {1} │ │ - mrc2 7, 0, r5, cr8, cr1, {5} │ │ - cdp2 4, 1, cr10, cr11, cr3, {3} │ │ - mrc2 14, 0, fp, cr9, cr9, {1} │ │ - cdp2 2, 1, cr8, cr10, cr2, {6} │ │ - cdp2 6, 1, cr10, cr8, cr15, {4} │ │ - mrc2 3, 0, sl, cr8, cr5, {7} │ │ + cdp2 7, 1, cr10, cr11, cr12, {6} │ │ + cdp2 6, 1, cr14, cr8, cr15, {5} │ │ + mrc2 5, 0, r0, cr8, cr10, {7} │ │ + cdp2 3, 1, cr4, cr9, cr11, {4} │ │ + mrc2 6, 0, lr, cr10, cr2, {3} │ │ + mrc2 3, 0, r8, cr8, cr10, {2} │ │ + mrc2 7, 0, r5, cr8, cr14, {6} │ │ + mrc2 4, 0, sl, cr11, cr0, {4} │ │ + cdp2 14, 1, cr11, cr9, cr6, {3} │ │ + cdp2 2, 1, cr8, cr10, cr15, {7} │ │ + mrc2 6, 0, sl, cr8, cr12, {5} │ │ + cdp2 4, 1, cr10, cr8, cr2, {1} │ │ cdp2 2, 1, cr15, cr9, cr9, {3} │ │ b.n 2095dc2 │ │ mov r6, r0 │ │ ldr r0, [r0, #8] │ │ cmp r0, #0 │ │ bmi.w 20964b6 │ │ ldr r0, [pc, #712] @ (2096390 ) │ │ @@ -37052,20 +37052,20 @@ │ │ ldr r2, [pc, #524] @ (209658c ) │ │ add.w r0, r6, #352 @ 0x160 │ │ add r2, pc │ │ mov r1, r9 │ │ movs r3, #7 │ │ bl 2096a5c , std::__ndk1::allocator >* std::__ndk1::vector, std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__emplace_back_slow_path, std::__ndk1::allocator > const&>(std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0x1b0> │ │ b.n 20963cc │ │ - adds r4, #103 @ 0x67 │ │ + adds r4, #148 @ 0x94 │ │ cdp2 5, 1, cr1, cr11, cr2, {1} │ │ lsls r2, r5, #1 │ │ - adds r4, #87 @ 0x57 │ │ - @ instruction: 0xfe1bda6b │ │ - mrc2 5, 0, sl, cr10, cr3, {3} │ │ + adds r4, #132 @ 0x84 │ │ + mrc2 10, 0, sp, cr11, cr8, {4} @ │ │ + cdp2 5, 1, cr10, cr10, cr0, {5} │ │ cdp2 2, 1, cr15, cr8, cr9, {3} │ │ b.n 2095dc2 │ │ ldr r1, [r0, #8] │ │ cmp r1, #0 │ │ bmi.n 20963cc │ │ ldr r2, [pc, #392] @ (2096538 ) │ │ movs r1, #12 │ │ @@ -37208,48 +37208,48 @@ │ │ add r0, sp, #60 @ 0x3c │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ adds r6, r1, #3 │ │ lsls r2, r5, #1 │ │ subs r6, r4, r6 │ │ lsls r2, r5, #1 │ │ - ldrsh r2, [r0, r6] │ │ - mrc2 3, 0, r4, cr8, cr15, {4} │ │ - mrc2 4, 0, r2, cr9, cr9, {7} │ │ - cdp2 12, 1, cr5, cr9, cr1, {3} │ │ - @ instruction: 0xfe1adac7 │ │ - mrc2 0, 0, r4, cr9, cr9, {2} │ │ - mrc2 4, 0, r2, cr10, cr14, {5} │ │ - cdp2 13, 1, cr5, cr9, cr4, {6} │ │ - vselvs.f32 s26, s21, s18 │ │ - mrc2 3, 0, r0, cr9, cr3, {3} │ │ - mrc2 2, 0, ip, cr8, cr0, {3} │ │ - cdp2 2, 1, cr0, cr8, cr14, {2} │ │ - mrc2 2, 0, ip, cr9, cr2, {2} │ │ - @ instruction: 0xfe1819c0 │ │ - mrc2 6, 0, r2, cr11, cr10, {4} │ │ - mrc2 14, 0, r1, cr8, cr14, {3} │ │ - cdp2 3, 1, cr10, cr10, cr12, {6} │ │ + ldrsh r7, [r5, r6] │ │ + cdp2 3, 1, cr4, cr8, cr12, {6} │ │ + cdp2 5, 1, cr2, cr9, cr6, {1} │ │ + cdp2 12, 1, cr5, cr9, cr14, {4} │ │ + mrc2 10, 0, sp, cr10, cr4, {7} @ │ │ + cdp2 0, 1, cr4, cr9, cr6, {4} │ │ + cdp2 4, 1, cr2, cr10, cr11, {7} │ │ + mrc2 13, 0, r5, cr9, cr1, {7} │ │ + mrc2 10, 0, sp, cr10, cr6, {5} @ │ │ + cdp2 3, 1, cr0, cr9, cr0, {5} │ │ + mrc2 2, 0, ip, cr8, cr13, {4} │ │ + mrc2 2, 0, r0, cr8, cr11, {3} │ │ + mrc2 2, 0, ip, cr9, cr15, {3} │ │ + @ instruction: 0xfe1819ed │ │ + cdp2 6, 1, cr2, cr11, cr7, {6} │ │ + cdp2 14, 1, cr1, cr8, cr11, {5} │ │ + mrc2 3, 0, sl, cr10, cr9, {7} │ │ cdp2 5, 1, cr7, cr8, cr8, {2} │ │ - mrc2 3, 0, r6, cr11, cr7, {7} │ │ - mrc2 14, 0, sp, cr9, cr3, {4} │ │ - @ instruction: 0xfe17d9cb │ │ - cdp2 12, 1, cr5, cr9, cr11, {4} │ │ - vfmsl.f16 d13, s20, s15[1] │ │ - mrc2 1, 0, r3, cr10, cr12, {6} │ │ + cdp2 4, 1, cr6, cr11, cr4, {1} │ │ + cdp2 14, 1, cr13, cr9, cr0, {6} │ │ + mrc2 9, 0, sp, cr7, cr8, {7} @ │ │ + mrc2 12, 0, r5, cr9, cr8, {5} │ │ + vcmla.f16 , q5, d12[1], #90 │ │ + cdp2 2, 1, cr3, cr10, cr9, {0} │ │ mrc2 4, 0, r7, cr11, cr12, {6} │ │ - cdp2 2, 1, cr10, cr11, cr8, {5} │ │ - vselvs.f32 s18, s17, s29 │ │ + mrc2 2, 0, sl, cr11, cr5, {6} │ │ + mrc2 10, 0, r9, cr8, cr11, {6} @ │ │ mrc2 15, 0, r8, cr10, cr14, {0} │ │ - vfmsl.f16 , d27, d4[0] │ │ - cdp2 1, 1, cr14, cr9, cr14, {2} │ │ + vselvs.f16 s26, s22, s2 │ │ + mrc2 1, 0, lr, cr9, cr11, {3} │ │ cdp2 14, 1, cr8, cr8, cr9, {7} │ │ - mrc2 9, 0, pc, cr11, cr4, {7} @ │ │ - mrc2 13, 0, sp, cr9, cr4, {1} │ │ - mrc2 2, 0, pc, cr7, cr0, {2} │ │ + vselvs.f32 s30, s22, s3 │ │ + cdp2 13, 1, cr13, cr9, cr1, {3} │ │ + mrc2 2, 0, pc, cr7, cr13, {3} │ │ mrc2 5, 0, fp, cr10, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #60 @ 0x3c │ │ mov r4, r0 │ │ ldr r0, [pc, #464] @ (2096794 ) │ │ add r0, pc │ │ @@ -37433,15 +37433,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #32] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ lsrs r2, r7, #31 │ │ lsls r2, r5, #1 │ │ - ldrh r0, [r6, r1] │ │ + ldrh r5, [r3, r2] │ │ cdp2 1, 1, cr7, cr8, cr8, {1} │ │ cdp2 14, 1, cr0, cr11, cr10, {3} │ │ lsls r2, r5, #1 │ │ │ │ 020967a4 >::__emplace_back_slow_path(std::__ndk1::__fs::filesystem::path&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -37690,15 +37690,15 @@ │ │ ldr r1, [r4, #8] │ │ b.n 2096a2c , std::__ndk1::allocator >* std::__ndk1::vector, std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__emplace_back_slow_path, std::__ndk1::allocator > const&>(std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0x180> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2096a58 , std::__ndk1::allocator >* std::__ndk1::vector, std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__emplace_back_slow_path, std::__ndk1::allocator > const&>(std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0x1ac>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - str r4, [sp, #236] @ 0xec │ │ + str r4, [sp, #416] @ 0x1a0 │ │ mrc2 5, 0, fp, cr10, cr0, {6} │ │ add r7, sp, #8 │ │ sub sp, #32 │ │ mov r4, r0 │ │ ldr r0, [pc, #152] @ (2096b00 , std::__ndk1::allocator >* std::__ndk1::vector, std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__emplace_back_slow_path, std::__ndk1::allocator > const&>(std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0x254>) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ @@ -37755,15 +37755,15 @@ │ │ ldrbne.w r0, [sp, #12] │ │ movsne.w r0, r0, lsl #31 │ │ ldrne r0, [sp, #20] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ lsrs r6, r2, #13 │ │ lsls r2, r5, #1 │ │ - strb r4, [r6, r6] │ │ + strb r1, [r4, r7] │ │ mrc2 10, 0, r0, cr10, cr8, {7} @ │ │ lsls r2, r5, #1 │ │ bmi.n 2096ab8 , std::__ndk1::allocator >* std::__ndk1::vector, std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__emplace_back_slow_path, std::__ndk1::allocator > const&>(std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0x20c> │ │ bmi.n 2096aba , std::__ndk1::allocator >* std::__ndk1::vector, std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__emplace_back_slow_path, std::__ndk1::allocator > const&>(std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0x20e> │ │ │ │ 02096b10 >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -38120,16 +38120,16 @@ │ │ lsrs r2, r3, #6 │ │ adcs.w r5, r1, #260096 @ 0x3f800 │ │ cmp r1, r4 │ │ str r6, [r4, #100] @ 0x64 │ │ ldrb r6, [r4, r5] │ │ bpl.n 2096f9a >&)@@Base+0x48a> │ │ sbcs r1, r4 │ │ - asrs r2, r6, #2 │ │ - cdp2 0, 1, cr1, cr11, cr6, {5} │ │ + asrs r7, r3, #3 │ │ + mrc2 0, 0, r1, cr11, cr3, {6} │ │ cdp2 2, 1, cr15, cr11, cr8, {3} │ │ b.n 2096dc2 >&)@@Base+0x2b2> │ │ mov r5, r0 │ │ ldr r0, [r0, #8] │ │ cmp r0, #0 │ │ bmi.n 2096f18 >&)@@Base+0x408> │ │ ldr r0, [pc, #220] @ (2096fd4 >&)@@Base+0x4c4>) │ │ @@ -38216,36 +38216,36 @@ │ │ blx 2701730 │ │ b.n 2096fc6 >&)@@Base+0x4b6> │ │ add r0, sp, #44 @ 0x2c │ │ blx 2701c30 │ │ blx 26ffaf0 │ │ lsrs r0, r2, #10 │ │ lsls r2, r5, #1 │ │ - ldr r3, [r4, r0] │ │ - vfmsl.f16 d5, s18, s14[0] │ │ + ldr r0, [r2, r1] │ │ + vcmla.f16 , , d4[0], #90 │ │ mrc2 6, 0, r0, cr9, cr10, {1} │ │ lsls r2, r5, #1 │ │ - ldrh r7, [r4, r3] │ │ - cdp2 5, 1, cr3, cr9, cr7, {2} │ │ - mrc2 5, 0, r3, cr10, cr11, {1} │ │ - mrc2 9, 0, r3, cr10, cr14, {0} @ │ │ + ldrh r4, [r2, r4] │ │ + mrc2 5, 0, r3, cr9, cr4, {3} │ │ + cdp2 5, 1, cr3, cr10, cr8, {3} │ │ + @ instruction: 0xfe1a394b │ │ mrc2 10, 0, r6, cr9, cr2, {6} @ │ │ @ instruction: 0xfe1b6ac6 │ │ - cdp2 5, 1, cr7, cr11, cr15, {6} │ │ - mrc2 10, 0, r1, cr10, cr8, {3} @ │ │ + mrc2 5, 0, r7, cr11, cr12, {7} │ │ + vselvs.f32 s2, s21, s11 │ │ mrc2 4, 0, fp, cr9, cr4, {0} │ │ - mrc2 4, 0, sp, cr7, cr7, {6} │ │ - @ instruction: 0xfe1739cd │ │ - mrc2 9, 0, r1, cr8, cr11, {7} @ │ │ + cdp2 5, 1, cr13, cr7, cr4, {0} │ │ + mrc2 9, 0, r3, cr7, cr10, {7} @ │ │ + vselvs.f32 s2, s16, s17 │ │ cdp2 5, 1, cr11, cr9, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (209701c >&)@@Base+0x50c>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldrh r7, [r6, #50] @ 0x32 │ │ + ldrh r4, [r4, #52] @ 0x34 │ │ Address 0x209701e is out of bounds. │ │ │ │ │ │ 02097020 : │ │ strd r1, r2, [r0] │ │ bx lr │ │ bmi.n 2096fd2 >&)@@Base+0x4c2> │ │ @@ -38880,27 +38880,27 @@ │ │ lsls r2, r5, #1 │ │ cdp2 0, 7, cr0, cr14, cr9, {3} │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2097774 >&)@@Base+0x74c>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strh r7, [r3, #56] @ 0x38 │ │ + strh r4, [r1, #58] @ 0x3a │ │ cdp2 5, 1, cr11, cr10, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2097784 >&)@@Base+0x75c>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strh r7, [r1, #56] @ 0x38 │ │ + strh r4, [r7, #56] @ 0x38 │ │ cdp2 5, 1, cr11, cr10, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2097794 >&)@@Base+0x76c>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strh r7, [r7, #54] @ 0x36 │ │ + strh r4, [r5, #56] @ 0x38 │ │ mrc2 4, 0, sp, cr10, cr4, {6} │ │ bmi.n 2097746 >&)@@Base+0x71e> │ │ bmi.n 2097748 >&)@@Base+0x720> │ │ bmi.n 209774a >&)@@Base+0x722> │ │ │ │ 020977a0 >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -39323,20 +39323,20 @@ │ │ ldrd r0, r1, [r8, #4] │ │ cmp r0, r1 │ │ bcs.n 2097c78 >&)@@Base+0x4d8> │ │ ldr r1, [sp, #148] @ 0x94 │ │ str.w sl, [sp, #148] @ 0x94 │ │ str.w r1, [r0], #4 │ │ b.n 2097c80 >&)@@Base+0x4e0> │ │ - lsls r4, r2, #15 │ │ + lsls r1, r0, #16 │ │ mrc2 10, 0, r7, cr11, cr12, {0} @ │ │ mrc2 9, 0, r7, cr11, cr8, {7} @ │ │ - mrc2 4, 0, lr, cr11, cr6, {7} │ │ - cdp2 13, 1, cr0, cr9, cr8, {5} │ │ - mrc2 2, 0, r0, cr9, cr9, {6} │ │ + cdp2 5, 1, cr14, cr11, cr3, {1} │ │ + mrc2 13, 0, r0, cr9, cr5, {6} │ │ + cdp2 3, 1, cr0, cr9, cr6, {0} │ │ vselvs.f16 s20, s22, s11 │ │ mov r0, r8 │ │ blx 2701dc0 │ │ movs r6, #0 │ │ str.w r0, [r8, #4] │ │ mov r0, fp │ │ blx 2701730 │ │ @@ -39471,24 +39471,24 @@ │ │ asrs r6, r5 │ │ stc 0, cr10, [sp, #724] @ 0x2d4 │ │ stmia r6!, {r0, r1, r2, r4, r5, r6, r7} │ │ subs r6, #176 @ 0xb0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldc2l 0, cr0, [ip, #420]! @ 0x1a4 │ │ - cmp r0, #183 @ 0xb7 │ │ - vcmla.f16 d2, d25, d11[1], #90 │ │ + cmp r0, #228 @ 0xe4 │ │ + vfmsl.f16 q1, d25, d0[1] │ │ mrc2 5, 0, sl, cr9, cr14, {7} │ │ - @ instruction: 0xfe17e9c2 │ │ - cdp2 13, 1, cr0, cr8, cr1, {7} │ │ - mrc2 11, 0, r3, cr8, cr0, {4} @ │ │ - mrc2 4, 0, r4, cr11, cr3, {2} │ │ - mrc2 2, 0, r8, cr10, cr8, {4} │ │ - mrc2 1, 0, sl, cr10, cr14, {7} │ │ - mrc2 6, 0, r6, cr10, cr9, {1} │ │ + @ instruction: 0xfe17e9ef │ │ + cdp2 14, 1, cr0, cr8, cr14, {0} │ │ + mrc2 11, 0, r3, cr8, cr13, {5} @ │ │ + cdp2 4, 1, cr4, cr11, cr0, {4} │ │ + cdp2 2, 1, cr8, cr10, cr5, {6} │ │ + cdp2 2, 1, cr10, cr10, cr11, {1} │ │ + cdp2 6, 1, cr6, cr10, cr6, {3} │ │ vfmsl.f16 d15, s21, s0[0] │ │ lsls r1, r5, #1 │ │ bmi.n 2097dc0 >&)@@Base+0x620> │ │ bmi.n 2097dc2 >&)@@Base+0x622> │ │ │ │ 02097e18 >, std::__ndk1::allocator > > >&, std::__ndk1::basic_ostream >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -39842,16 +39842,16 @@ │ │ add r1, pc │ │ b.n 2097e6a >, std::__ndk1::allocator > > >&, std::__ndk1::basic_ostream >&)@@Base+0x52> │ │ nop │ │ nop │ │ stc 0, cr10, [sp, #724] @ 0x2d4 │ │ stmia r6!, {r0, r1, r2, r4, r5, r6, r7} │ │ subs r6, #176 @ 0xb0 │ │ - bkpt 0x00bb │ │ - vcmla.f16 q2, , d2[1], #90 │ │ + bkpt 0x00e8 │ │ + vselvs.f16 s8, s18, s30 │ │ vfmsl.f16 d9, s18, s3[0] │ │ ldr r1, [pc, #44] @ (2098238 >, std::__ndk1::allocator > > >&, std::__ndk1::basic_ostream >&)@@Base+0x420>) │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ ldr r1, [r1, #0] │ │ cmp r1, r0 │ │ itttt eq │ │ @@ -39859,39 +39859,39 @@ │ │ vpopeq {d8-d15} │ │ addeq sp, #4 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ - b.n 2097f6c >, std::__ndk1::allocator > > >&, std::__ndk1::basic_ostream >&)@@Base+0x154> │ │ - mrc2 3, 0, ip, cr8, cr4, {2} │ │ + b.n 2097fc6 >, std::__ndk1::allocator > > >&, std::__ndk1::basic_ostream >&)@@Base+0x1ae> │ │ + cdp2 3, 1, cr12, cr8, cr1, {4} │ │ cdp2 7, 1, cr15, cr7, cr14, {4} │ │ lsls r1, r5, #1 │ │ @ instruction: 0xf3b00069 │ │ - bx lr │ │ - mrc2 5, 0, ip, cr9, cr11, {6} │ │ - cdp2 2, 1, cr2, cr8, cr7, {7} │ │ - cdp2 5, 1, cr14, cr10, cr6, {0} │ │ + @ instruction: 0x47a3 │ │ + cdp2 6, 1, cr12, cr9, cr8, {0} │ │ + mrc2 3, 0, r2, cr8, cr4, {0} │ │ + mrc2 5, 0, lr, cr10, cr3, {1} │ │ cdp2 0, 1, cr10, cr8, cr15, {6} │ │ - cdp2 4, 1, cr1, cr7, cr10, {7} │ │ - mrc2 13, 0, sp, cr11, cr3, {7} │ │ - mrc2 11, 0, pc, cr9, cr0, {7} @ │ │ - mrc2 5, 0, r8, cr10, cr13, {5} │ │ - mrc2 11, 0, fp, cr8, cr8, {6} @ │ │ - mrc2 4, 0, ip, cr9, cr0, {2} │ │ - cdp2 15, 1, cr5, cr8, cr9, {7} │ │ - cdp2 15, 1, cr3, cr9, cr11, {7} │ │ - mrc2 12, 0, r7, cr8, cr14, {7} │ │ - mrc2 12, 0, r9, cr10, cr12, {2} │ │ - mrc2 0, 0, r6, cr10, cr5, {4} │ │ - cdp2 15, 1, cr3, cr10, cr11, {6} │ │ - cdp2 0, 1, cr6, cr8, cr10, {5} │ │ + mrc2 5, 0, r1, cr7, cr7, {0} │ │ + cdp2 14, 1, cr13, cr11, cr0, {1} │ │ + mrc2 12, 0, pc, cr9, cr13, {0} │ │ + cdp2 5, 1, cr8, cr10, cr10, {7} │ │ + cdp2 12, 1, cr11, cr8, cr5, {0} │ │ + mrc2 4, 0, ip, cr9, cr13, {3} │ │ + mrc2 0, 0, r6, cr8, cr6, {0} │ │ + mrc2 0, 0, r4, cr9, cr8, {0} │ │ + cdp2 13, 1, cr7, cr8, cr11, {1} │ │ + cdp2 12, 1, cr9, cr10, cr9, {4} │ │ + cdp2 0, 1, cr6, cr10, cr2, {6} │ │ + mrc2 15, 0, r3, cr10, cr8, {7} │ │ + mrc2 0, 0, r6, cr8, cr7, {6} │ │ mrc2 15, 0, r9, cr10, cr8, {1} │ │ - mrc2 3, 0, lr, cr7, cr12, {0} │ │ + cdp2 3, 1, cr14, cr7, cr9, {2} │ │ Address 0x209828a is out of bounds. │ │ │ │ │ │ 0209828c >* std::__ndk1::vector >, std::__ndk1::allocator > > >::__push_back_slow_path > >(std::__ndk1::unique_ptr >&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -40649,16 +40649,16 @@ │ │ str.w fp, [sp, #73] @ 0x49 │ │ strb.w r0, [sp, #72] @ 0x48 │ │ beq.w 2098ba2 │ │ mov r6, r8 │ │ b.n 2098a70 │ │ nop │ │ str r4, [sp, #656] @ 0x290 │ │ - mrc2 12, 0, r7, cr11, cr10, {5} │ │ - mrc2 3, 0, pc, cr9, cr11, {2} │ │ + cdp2 12, 1, cr7, cr11, cr7, {7} │ │ + cdp2 3, 1, cr15, cr9, cr8, {4} │ │ vfmsl.f16 d6, s20, s13[0] │ │ cmp r6, #0 │ │ beq.w 2098ba2 │ │ ldrb r0, [r6, #16] │ │ ldrd r5, r4, [r6, #20] │ │ ands.w r1, r0, #1 │ │ itt eq │ │ @@ -41035,16 +41035,16 @@ │ │ vld1.16 {d8}, [r1] │ │ movs r1, #0 │ │ vst1.8 {d9}, [r8] │ │ strb.w r1, [r8, #14] │ │ vst1.8 {d8}, [r0] │ │ b.n 2098e80 │ │ nop │ │ - ldrsb r4, [r5, r7] │ │ - mrc2 7, 0, r7, cr8, cr10, {7} │ │ + ldr r1, [r3, r0] │ │ + vcmla.f16 d7, d8, d7[1], #90 │ │ cdp2 13, 1, cr8, cr9, cr0, {6} │ │ @ instruction: 0xfe1b8b64 │ │ cdp2 0, 1, cr9, cr11, cr14, {7} │ │ cdp2 4, 1, cr3, cr11, cr4, {0} │ │ ldr r4, [r4, #0] │ │ cmp r4, #0 │ │ beq.w 2098fb4 │ │ @@ -41463,17 +41463,17 @@ │ │ mov.w r0, #0 │ │ strb.w r0, [fp, #12] │ │ vst1.8 {d8}, [fp] │ │ beq.w 209962e │ │ mov r6, sl │ │ b.n 20992dc │ │ nop │ │ - pldw [r9, #24] │ │ + str??t pc, [r6, #24] │ │ str r1, [sp, #536] @ 0x218 │ │ - cdp2 1, 1, cr5, cr11, cr7, {1} │ │ + mrc2 1, 0, r5, cr11, cr4, {2} │ │ vfmsl.f16 d6, s18, s13[0] │ │ cmp r6, #0 │ │ beq.w 209962e │ │ ldrb r0, [r6, #16] │ │ ldrd r5, r8, [r6, #20] │ │ ands.w r1, r0, #1 │ │ itt eq │ │ @@ -41605,15 +41605,15 @@ │ │ vldr d9, [r0] │ │ movs r0, #0 │ │ strb.w r0, [r8, #12] │ │ vst1.8 {d9}, [r8] │ │ b.n 2099460 │ │ vmla.i16 d0, d14, d1[3] │ │ ldrh r4, [r0, #38] @ 0x26 │ │ - mrc2 0, 0, r5, cr11, cr0, {5} │ │ + mrc2 0, 0, r5, cr11, cr13, {6} │ │ cdp2 15, 1, cr8, cr10, cr12, {0} │ │ mrc2 5, 0, r4, cr11, cr11, {1} │ │ mrc2 5, 0, r8, cr11, cr6, {6} │ │ cdp2 1, 1, cr15, cr11, cr10, {0} │ │ lsrs r4, r0, #8 │ │ ldr.w sl, [sl] │ │ cmp.w sl, #0 │ │ @@ -41873,15 +41873,15 @@ │ │ str.w r1, [r8, #8] │ │ vldr d9, [r0] │ │ movs r0, #0 │ │ strb.w r0, [r8, #12] │ │ vst1.8 {d9}, [r8] │ │ b.n 2099728 │ │ nop │ │ - stmia r2!, {r1, r2, r4} │ │ + stmia r2!, {r0, r1, r6} │ │ cdp2 6, 1, cr8, cr10, cr6, {1} │ │ mrc2 6, 0, r8, cr11, cr12, {2} │ │ cdp2 1, 1, cr15, cr11, cr10, {0} │ │ lsrs r4, r0, #8 │ │ ldr.w sl, [sl] │ │ cmp.w sl, #0 │ │ beq.w 20998f0 │ │ @@ -42278,18 +42278,18 @@ │ │ add r0, pc │ │ vld1.64 {d8-d9}, [r0] │ │ mov r0, r8 │ │ vst1.8 {d8-d9}, [r0]! │ │ strb r1, [r0, #0] │ │ b.n 2099b44 │ │ nop │ │ - ldmia r6, {r0, r1, r5, r6} │ │ + ldmia r6!, {r4, r7} │ │ cdp2 6, 1, cr8, cr7, cr4, {5} │ │ mrc2 6, 0, r8, cr11, cr14, {1} │ │ - cdp2 13, 1, cr1, cr11, cr0, {1} │ │ + cdp2 13, 1, cr1, cr11, cr13, {2} │ │ cdp2 2, 1, cr8, cr11, cr2, {2} │ │ cdp2 4, 1, cr3, cr11, cr4, {0} │ │ ldr r4, [r4, #0] │ │ cmp r4, #0 │ │ beq.w 2099c74 │ │ ldrb r0, [r4, #16] │ │ ldrd r6, sl, [r4, #20] │ │ @@ -42691,20 +42691,20 @@ │ │ blxne 26ffad0 │ │ ldrb.w r0, [sp, #56] @ 0x38 │ │ lsls r0, r0, #31 │ │ beq.w 2099d20 │ │ ldr r0, [sp, #64] @ 0x40 │ │ b.n 2099d1c │ │ nop │ │ - ldrh r0, [r3, #10] │ │ + ldrh r5, [r0, #12] │ │ vcmla.f16 d7, d24, d6[1], #90 │ │ - mrc2 5, 0, r0, cr11, cr7, {5} │ │ + cdp2 5, 1, cr0, cr11, cr4, {7} │ │ cdp2 0, 1, cr8, cr10, cr4, {2} │ │ - mrc2 7, 0, r0, cr11, cr10, {6} │ │ - vcmla.f16 d14, d25, d2[1], #90 │ │ + vcmla.f16 d0, d11, d7[0], #90 │ │ + vcmla.f16 q7, , d15[0], #90 │ │ @ instruction: 0xfe1849e0 │ │ add r1, pc │ │ ldr r0, [sp, #36] @ 0x24 │ │ blx 2701e60 │ │ add r2, sp, #56 @ 0x38 │ │ adds r0, r2, #1 │ │ str r0, [sp, #24] │ │ @@ -43041,16 +43041,16 @@ │ │ ldrne r0, [sp, #80] @ 0x50 │ │ blxne 26ffad0 │ │ b.n 209a332 │ │ b.n 209a39c │ │ b.n 209a39c │ │ b.n 209a39c │ │ b.n 209a30c │ │ - ldr r4, [sp, #144] @ 0x90 │ │ - cdp2 5, 1, cr0, cr10, cr6, {4} │ │ + ldr r4, [sp, #324] @ 0x144 │ │ + mrc2 5, 0, r0, cr10, cr3, {5} │ │ cdp2 0, 1, cr14, cr9, cr8, {2} │ │ b.n 209a344 │ │ ldrb.w r0, [sp, #72] @ 0x48 │ │ lsls r0, r0, #31 │ │ beq.n 209a344 │ │ ldr r0, [sp, #80] @ 0x50 │ │ b.n 209a33c │ │ @@ -43118,17 +43118,17 @@ │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r0, [r0, #8] │ │ blx 26ffad0 │ │ ldr r1, [sp, #88] @ 0x58 │ │ add r0, sp, #84 @ 0x54 │ │ bl 209a5b4 , std::__ndk1::allocator > fmt::v11::sprintf, std::__ndk1::allocator >, char>(char* const&, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0xe4> │ │ blx 26ffaf0 │ │ - lsls r2, r5, #19 │ │ - mrc2 4, 0, r0, cr9, cr10, {3} │ │ - cdp2 3, 1, cr0, cr9, cr10, {7} │ │ + lsls r7, r2, #20 │ │ + cdp2 4, 1, cr0, cr9, cr7, {5} │ │ + mrc2 4, 0, r0, cr9, cr7, {0} │ │ mrc2 3, 0, sp, cr9, cr14, {2} │ │ lsls r1, r5, #1 │ │ │ │ 0209a3c8 , std::__ndk1::allocator > fmt::v11::sprintf, std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, char>(char* const&, std::__ndk1::basic_string, std::__ndk1::allocator > const&, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -43757,15 +43757,15 @@ │ │ moveq r1, #0 │ │ ldrb r0, [r5, #0] │ │ sub.w r6, r0, #76 @ 0x4c │ │ cmp r6, #46 @ 0x2e │ │ bhi.n 209aac8 >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)@@Base+0x41c> │ │ addw r4, pc, #8 │ │ tbh [r4, r6, lsl #1] │ │ - str r4, [sp, #772] @ 0x304 │ │ + str r4, [sp, #952] @ 0x3b8 │ │ cdp2 1, 1, cr0, cr10, cr2, {2} │ │ lsls r0, r1, #1 │ │ lsls r0, r1, #1 │ │ lsls r0, r1, #1 │ │ lsls r0, r1, #1 │ │ lsls r0, r1, #1 │ │ lsls r0, r1, #1 │ │ @@ -44426,26 +44426,26 @@ │ │ add r0, pc │ │ bl 221a310 │ │ ldr r0, [pc, #12] @ (209b0dc >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)@@Base+0xa30>) │ │ add r0, pc │ │ bl 221a310 │ │ ldmia r6, {r4, r5, r6, r7} │ │ lsls r1, r5, #1 │ │ - adds r1, #227 @ 0xe3 │ │ - mrc2 5, 0, r5, cr8, cr6, {4} │ │ - cdp2 3, 1, cr5, cr8, cr5, {1} │ │ + adds r2, #16 │ │ + cdp2 5, 1, cr5, cr8, cr3, {6} │ │ + mrc2 3, 0, r5, cr8, cr2, {2} │ │ mrc2 7, 0, r7, cr9, cr8, {7} │ │ cdp2 6, 1, cr7, cr11, cr2, {6} │ │ cdp2 7, 1, cr7, cr11, cr0, {0} │ │ mrc2 7, 0, r7, cr11, cr2, {2} │ │ mrc2 5, 0, ip, cr11, cr14, {1} │ │ lsls r1, r5, #1 │ │ - bvs.n 209b130 >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)::{lambda(int)#1}>(char const*&, char const*, fmt::v11::format_specs&, fmt::v11::detail::vprintf >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)::{lambda(int)#1})@@Base+0x28> │ │ - cdp2 4, 1, cr15, cr8, cr2, {4} │ │ - mrc2 0, 0, r3, cr8, cr2, {5} │ │ + bvs.n 209b18a >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)::{lambda(int)#1}>(char const*&, char const*, fmt::v11::format_specs&, fmt::v11::detail::vprintf >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)::{lambda(int)#1})@@Base+0x82> │ │ + cdp2 4, 1, cr15, cr8, cr15, {5} │ │ + mrc2 0, 0, r3, cr8, cr15, {6} │ │ mrc2 0, 0, r7, cr9, cr11, {0} │ │ Address 0x209b106 is out of bounds. │ │ │ │ │ │ 0209b108 >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)::{lambda(int)#1}>(char const*&, char const*, fmt::v11::format_specs&, fmt::v11::detail::vprintf >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)::{lambda(int)#1})@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -44698,19 +44698,19 @@ │ │ bl 221a310 │ │ ldr r0, [pc, #24] @ (209b400 >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)::{lambda(int)#1}>(char const*&, char const*, fmt::v11::format_specs&, fmt::v11::detail::vprintf >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)::{lambda(int)#1})@@Base+0x2f8>) │ │ add r0, pc │ │ bl 221a310 │ │ ldr r0, [pc, #20] @ (209b404 >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)::{lambda(int)#1}>(char const*&, char const*, fmt::v11::format_specs&, fmt::v11::detail::vprintf >(fmt::v11::detail::buffer&, fmt::v11::basic_string_view, fmt::v11::basic_format_args >)::{lambda(int)#1})@@Base+0x2fc>) │ │ add r0, pc │ │ bl 221a310 │ │ - strh r6, [r1, r2] │ │ - cdp2 14, 1, cr2, cr8, cr3, {5} │ │ - cdp2 3, 1, cr5, cr8, cr8, {4} │ │ - vcmla.f16 q4, q12, d15[1], #90 │ │ - cdp2 2, 1, cr13, cr9, cr10, {7} │ │ + strh r3, [r7, r2] │ │ + mrc2 14, 0, r2, cr8, cr0, {6} │ │ + mrc2 3, 0, r5, cr8, cr5, {5} │ │ + mrc2 9, 0, r8, cr8, cr12, {0} @ │ │ + mrc2 3, 0, sp, cr9, cr7, {0} │ │ Address 0x209b406 is out of bounds. │ │ │ │ │ │ 0209b408 , char>(fmt::v11::basic_format_arg >&, char)@@Base>: │ │ ldr r2, [r0, #8] │ │ subs r2, #1 │ │ cmp r2, #7 │ │ @@ -45162,15 +45162,15 @@ │ │ b.n 209b802 ::operator()(char const*)@@Base+0xa2> │ │ nop │ │ bkpt 0x0050 │ │ lsls r1, r5, #1 │ │ pop {r3, r5, r7, pc} │ │ lsls r1, r5, #1 │ │ subs r3, #156 @ 0x9c │ │ - mrc2 3, 0, r8, cr11, cr1, {7} │ │ + mrc2 4, 0, r8, cr11, cr14, {0} │ │ cdp2 13, 1, cr11, cr10, cr12, {6} │ │ lsls r1, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #60 @ 0x3c │ │ mov r4, r0 │ │ @@ -45638,16 +45638,16 @@ │ │ ldrb r6, [r0, r6] │ │ strb r6, [r3, r2] │ │ sub.w r2, r2, #1 │ │ bne.n 209bd40 ::operator()(char const*)@@Base+0x5e0> │ │ b.n 209bda6 ::operator()(char const*)@@Base+0x646> │ │ pop {r1, r3, r7} │ │ lsls r1, r5, #1 │ │ - ldmia r6!, {r2, r3, r7} │ │ - cdp2 1, 1, cr12, cr7, cr7, {4} │ │ + ldmia r6!, {r0, r3, r4, r5, r7} │ │ + mrc2 1, 0, ip, cr7, cr4, {5} │ │ cdp2 2, 1, cr15, cr10, cr5, {2} │ │ str r6, [r2, r1] │ │ add r2, sp, #16 │ │ movt r0, #21845 @ 0x5555 │ │ movs r3, #6 │ │ umull r1, r0, r9, r0 │ │ movs r1, #0 │ │ @@ -45787,18 +45787,18 @@ │ │ addeq sp, #60 @ 0x3c │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ pop {r1, r2, r3, r4, r6, pc} │ │ lsls r1, r5, #1 │ │ - add r2, sp, #184 @ 0xb8 │ │ + add r2, sp, #364 @ 0x16c │ │ cdp2 6, 1, cr6, cr7, cr2, {4} │ │ - mrc2 15, 0, fp, cr11, cr5, {2} │ │ - cdp2 12, 1, cr12, cr10, cr14, {2} │ │ + cdp2 15, 1, cr11, cr11, cr2, {4} │ │ + mrc2 12, 0, ip, cr10, cr11, {3} │ │ mrc2 5, 0, r6, cr7, cr0, {0} │ │ mrc2 4, 0, r6, cr11, cr4, {5} │ │ cdp2 5, 1, cr6, cr11, cr6, {3} │ │ mrc2 6, 0, fp, cr11, cr6, {7} │ │ lsls r1, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -45959,16 +45959,16 @@ │ │ addeq sp, #16 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ @ instruction: 0xb60c │ │ lsls r1, r5, #1 │ │ - add r5, pc, #960 @ (adr r5, 209c460 ::operator()(char const*)@@Base+0xd00>) │ │ - mrc2 5, 0, sl, cr7, cr6, {5} │ │ + add r6, pc, #116 @ (adr r6, 209c114 ::operator()(char const*)@@Base+0x9b4>) │ │ + cdp2 5, 1, cr10, cr7, cr3, {7} │ │ mrc2 5, 0, fp, cr7, cr12, {1} │ │ lsls r1, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #16 │ │ mov r9, r0 │ │ @@ -46080,18 +46080,18 @@ │ │ addeq sp, #16 │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ push {r2, lr} │ │ lsls r1, r5, #1 │ │ - ldmia r0!, {r1, r2, r3, r4, r5} │ │ - mrc2 11, 0, fp, cr7, cr5, {1} @ │ │ - mrc2 11, 0, fp, cr10, cr5, {0} @ │ │ - vcmla.f16 d12, d10, d10[0], #90 │ │ + ldmia r0, {r0, r1, r3, r5, r6} │ │ + @ instruction: 0xfe17bb62 │ │ + @ instruction: 0xfe1abb42 │ │ + vfmsl.f16 d12, s20, s15[0] │ │ mrc2 4, 0, fp, cr7, cr10, {0} │ │ lsls r1, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ mov r8, r0 │ │ @@ -46917,16 +46917,16 @@ │ │ bl 209d068 ::operator()(char const*)@@Base+0x1908> │ │ b.n 209cc78 ::operator()(char const*)@@Base+0x1518> │ │ nop │ │ add r7, sp, #368 @ 0x170 │ │ lsls r1, r5, #1 │ │ add r7, sp, #432 @ 0x1b0 │ │ lsls r1, r5, #1 │ │ - stmia r1!, {r2, r3, r4, r5} │ │ - mrc2 4, 0, fp, cr7, cr3, {1} │ │ + stmia r1!, {r0, r3, r5, r6} │ │ + cdp2 4, 1, cr11, cr7, cr0, {3} │ │ mrc2 5, 0, r4, cr10, cr2, {4} │ │ itte lt │ │ addlt r4, r2 │ │ addlt.w r3, ip, r2 │ │ movge r4, #0 │ │ ldr r5, [pc, #620] @ (209ccbc ::operator()(char const*)@@Base+0x155c>) │ │ str r2, [sp, #56] @ 0x38 │ │ @@ -47152,18 +47152,18 @@ │ │ addeq sp, #100 @ 0x64 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add sp, #368 @ 0x170 │ │ lsls r1, r5, #1 │ │ - ldr r4, [sp, #736] @ 0x2e0 │ │ + ldr r4, [sp, #916] @ 0x394 │ │ mrc2 6, 0, r5, cr7, cr10, {7} │ │ - mrc2 0, 0, fp, cr11, cr9, {7} │ │ - mrc2 13, 0, fp, cr10, cr10, {7} │ │ + cdp2 1, 1, cr11, cr11, cr6, {1} │ │ + cdp2 14, 1, cr11, cr10, cr7, {1} │ │ vfmsl.f16 , d23, d2[0] │ │ vcmla.f16 , , d4[0], #90 │ │ @ instruction: 0xfe1b5946 │ │ vselvs.f16 s20, s22, s29 │ │ lsls r1, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -47272,16 +47272,16 @@ │ │ addeq sp, #36 @ 0x24 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r0, sp, #896 @ 0x380 │ │ lsls r1, r5, #1 │ │ - ldr r0, [sp, #680] @ 0x2a8 │ │ - vcmla.f16 , , d0[1], #90 │ │ + ldr r0, [sp, #860] @ 0x35c │ │ + vcmla.f16 d9, d23, d13[0], #90 │ │ cdp2 7, 1, cr10, cr7, cr4, {7} │ │ lsls r1, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #24 │ │ mov r8, r0 │ │ @@ -47401,18 +47401,18 @@ │ │ moveq r0, r4 │ │ addeq sp, #24 │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ add r7, pc, #688 @ (adr r7, 209d1e8 ::operator()(char const*)@@Base+0x1a88>) │ │ lsls r1, r5, #1 │ │ - revsh r0, r4 │ │ - mrc2 13, 0, sl, cr7, cr7, {6} │ │ - cdp2 13, 1, cr10, cr10, cr3, {5} │ │ - vselvs.f32 s22, s21, s9 │ │ + cbnz r5, 209cf7e ::operator()(char const*)@@Base+0x181e> │ │ + cdp2 14, 1, cr10, cr7, cr4, {0} │ │ + mrc2 13, 0, sl, cr10, cr0, {6} │ │ + mrc2 10, 0, fp, cr10, cr1, {6} @ │ │ cdp2 6, 1, cr10, cr7, cr0, {5} │ │ lsls r1, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #32 │ │ mov r8, r0 │ │ @@ -47713,15 +47713,15 @@ │ │ blx 26ffae0 │ │ add r4, pc, #40 @ (adr r4, 209d27c ::operator()(char const*)@@Base+0x1b1c>) │ │ lsls r1, r5, #1 │ │ strh r2, [r0, r6] │ │ cdp2 3, 1, cr10, cr11, cr2, {4} │ │ lsls r1, r5, #1 │ │ ldr r7, [pc, #216] @ (209d338 ::operator()(char const*)@@Base+0x1bd8>) │ │ - mrc2 15, 0, r0, cr7, cr6, {6} │ │ + cdp2 0, 1, cr1, cr7, cr3, {0} │ │ mrc2 5, 0, fp, cr9, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ mov r4, r0 │ │ ldr r0, [pc, #248] @ (209d36c ::operator()(char const*)@@Base+0x1c0c>) │ │ mov r5, r1 │ │ @@ -47901,15 +47901,15 @@ │ │ add r0, pc │ │ bl 221a310 │ │ add r2, pc, #256 @ (adr r2, 209d538 ::operator()(char const*)@@Base+0x1dd8>) │ │ lsls r1, r5, #1 │ │ add r1, pc, #664 @ (adr r1, 209d6d4 ::operator()(char const*)@@Base+0x1f74>) │ │ lsls r1, r5, #1 │ │ str r6, [r4, r6] │ │ - vselvs.f32 s4, s23, s22 │ │ + mrc2 10, 0, r2, cr11, cr8, {5} @ │ │ mrc2 5, 0, fp, cr10, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8} │ │ sub.w sp, sp, #568 @ 0x238 │ │ mov r8, r0 │ │ @@ -48152,23 +48152,23 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ movs r0, r0 │ │ ldrb r0, [r0, #30] │ │ add r1, pc, #360 @ (adr r1, 209d850 ::operator()(char const*)@@Base+0x20f0>) │ │ lsls r1, r5, #1 │ │ - strh r5, [r4, #10] │ │ - @ instruction: 0xfe1a49e2 │ │ - cdp2 7, 1, cr10, cr9, cr9, {1} │ │ - cdp2 0, 1, cr13, cr10, cr10, {1} │ │ + strh r2, [r2, #12] │ │ + vselvs.f32 s8, s20, s30 │ │ + mrc2 7, 0, sl, cr9, cr6, {2} │ │ + mrc2 0, 0, sp, cr10, cr7, {2} │ │ mrc2 15, 0, r9, cr8, cr12, {0} │ │ lsls r1, r5, #1 │ │ add r1, pc, #200 @ (adr r1, 209d7c8 ::operator()(char const*)@@Base+0x2068>) │ │ lsls r1, r5, #1 │ │ - cmp r7, #162 @ 0xa2 │ │ + cmp r7, #207 @ 0xcf │ │ mrc2 5, 0, fp, cr8, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #52 @ 0x34 │ │ ldr r2, [pc, #880] @ (209da80 ::operator()(char const*)@@Base+0x2320>) │ │ ldrh.w r9, [r7, #9] │ │ add r2, pc │ │ @@ -48505,20 +48505,20 @@ │ │ ittt eq │ │ addeq sp, #52 @ 0x34 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r6, [sp, #672] @ 0x2a0 │ │ lsls r1, r5, #1 │ │ - add r4, pc, #820 @ (adr r4, 209ddbc ::operator()(char const*)@@Base+0x265c>) │ │ - cdp2 1, 1, cr11, cr10, cr2, {6} │ │ + add r4, pc, #1000 @ (adr r4, 209de70 ::operator()(char const*)@@Base+0x2710>) │ │ + cdp2 1, 1, cr11, cr10, cr15, {7} │ │ mrc2 12, 0, r9, cr7, cr14, {3} │ │ lsls r1, r5, #1 │ │ - ldrh r4, [r0, #32] │ │ - @ instruction: 0xfe178bca │ │ + ldrh r1, [r6, #32] │ │ + mrc2 11, 0, r8, cr7, cr7, {7} @ │ │ mrc2 11, 0, r9, cr7, cr2, {2} @ │ │ lsls r1, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8} │ │ @@ -49054,15 +49054,15 @@ │ │ movs r0, #0 │ │ ldr.w r8, [r7, #8] │ │ str.w r0, [fp, #4] │ │ cmp.w sl, #2 │ │ bne.n 209e144 ::operator()(char const*)@@Base+0x29e4> │ │ b.n 209e17a ::operator()(char const*)@@Base+0x2a1a> │ │ nop │ │ - ldrh r4, [r6, #6] │ │ + ldrh r1, [r4, #8] │ │ vfmsl.f16 , d23, d3[1] │ │ movs r0, r0 │ │ movs r1, #48 @ 0x30 │ │ strb r1, [r0, r5] │ │ adds r5, #1 │ │ ldr.w r0, [fp, #8] │ │ cmp r0, r5 │ │ @@ -49167,15 +49167,15 @@ │ │ blx 26ffba0 │ │ mov r0, r4 │ │ blx 26ffbb0 │ │ blx 26ffaf0 │ │ nop │ │ ldr r3, [sp, #16] │ │ lsls r1, r5, #1 │ │ - movs r4, #164 @ 0xa4 │ │ + movs r4, #209 @ 0xd1 │ │ cdp2 4, 1, cr9, cr8, cr2, {5} │ │ lsls r1, r5, #1 │ │ str r4, [sp, #656] @ 0x290 │ │ lsls r1, r5, #1 │ │ mov ip, r2 │ │ cdp2 6, 1, cr4, cr11, cr2, {1} │ │ mrc2 4, 0, r9, cr11, cr12, {1} │ │ @@ -49532,18 +49532,18 @@ │ │ strh.w r1, [r0, #-2] │ │ b.n 209e568 ::operator()(char const*)@@Base+0x2e08> │ │ nop │ │ str r2, [sp, #8] │ │ lsls r1, r5, #1 │ │ str r1, [sp, #352] @ 0x160 │ │ lsls r1, r5, #1 │ │ - strh r4, [r3, #10] │ │ - mrc2 0, 0, r8, cr7, cr14, {3} │ │ - cdp2 1, 1, cr8, cr7, cr6, {0} │ │ - cdp2 0, 1, cr8, cr7, cr12, {6} │ │ + strh r1, [r1, #12] │ │ + cdp2 0, 1, cr8, cr7, cr11, {5} │ │ + mrc2 1, 0, r8, cr7, cr3, {1} │ │ + mrc2 0, 0, r8, cr7, cr9, {7} │ │ mrc2 0, 0, r9, cr7, cr0, {2} │ │ lsls r1, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ mov r9, r0 │ │ @@ -49713,18 +49713,18 @@ │ │ nop │ │ str r0, [sp, #472] @ 0x1d8 │ │ lsls r1, r5, #1 │ │ str r0, [sp, #528] @ 0x210 │ │ lsls r1, r5, #1 │ │ ldrh r4, [r6, #60] @ 0x3c │ │ lsls r1, r5, #1 │ │ - ldrb r4, [r4, #30] │ │ - cdp2 14, 1, cr7, cr7, cr6, {4} │ │ - cdp2 15, 1, cr7, cr7, cr4, {1} │ │ - cdp2 14, 1, cr7, cr7, cr0, {7} │ │ + ldrb r1, [r2, #31] │ │ + mrc2 14, 0, r7, cr7, cr3, {5} │ │ + mrc2 15, 0, r7, cr7, cr1, {2} │ │ + cdp2 15, 1, cr7, cr7, cr13, {0} │ │ cdp2 14, 1, cr8, cr7, cr2, {3} │ │ lsls r1, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub.w sp, sp, #716 @ 0x2cc │ │ mov r9, r1 │ │ @@ -51186,15 +51186,15 @@ │ │ cmp r0, r1 │ │ it ne │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldrh r6, [r2, #46] @ 0x2e │ │ lsls r1, r5, #1 │ │ - asrs r0, r3, #3 │ │ + asrs r5, r0, #4 │ │ cdp2 0, 1, cr8, cr8, cr2, {7} │ │ lsls r1, r5, #1 │ │ strh r2, [r2, #6] │ │ lsls r1, r5, #1 │ │ strh r2, [r2, #6] │ │ lsls r1, r5, #1 │ │ strh r4, [r2, #10] │ │ @@ -52758,15 +52758,15 @@ │ │ ldr r2, [r4, #0] │ │ str r1, [r4, #4] │ │ strb r5, [r2, r0] │ │ mov r0, r4 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - str r4, [r0, #12] │ │ + str r1, [r6, #12] │ │ mrc2 5, 0, fp, cr7, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ mov r5, r1 │ │ @@ -53921,23 +53921,23 @@ │ │ blx 26ffaf0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldrb r0, [r6, #31] │ │ str r0, [r0, #104] @ 0x68 │ │ lsls r1, r5, #1 │ │ - mov r9, r0 │ │ - mrc2 14, 0, r0, cr10, cr14, {7} │ │ - cdp2 12, 1, cr6, cr9, cr5, {2} │ │ - cdp2 5, 1, cr9, cr10, cr6, {2} │ │ + mov lr, r5 │ │ + cdp2 15, 1, cr0, cr10, cr11, {1} │ │ + mrc2 12, 0, r6, cr9, cr2, {3} │ │ + mrc2 5, 0, r9, cr10, cr3, {3} │ │ mrc2 4, 0, r6, cr8, cr10, {1} │ │ lsls r1, r5, #1 │ │ str r0, [r2, #100] @ 0x64 │ │ lsls r1, r5, #1 │ │ - bl 1d61e16 │ │ + bl 1d8ee16 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8} │ │ sub.w sp, sp, #576 @ 0x240 │ │ mov ip, r0 │ │ @@ -54180,23 +54180,23 @@ │ │ blx 26ffaf0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldrb r0, [r6, #31] │ │ str r0, [r7, #56] @ 0x38 │ │ lsls r1, r5, #1 │ │ - bics r1, r7 │ │ - mrc2 12, 0, r0, cr10, cr6, {1} │ │ - mrc2 9, 0, r6, cr9, cr13, {3} @ │ │ - mrc2 2, 0, r9, cr10, cr14, {3} │ │ + mvns r6, r4 │ │ + cdp2 12, 1, cr0, cr10, cr3, {3} │ │ + vselvs.f16 s12, s19, s21 │ │ + cdp2 2, 1, cr9, cr10, cr11, {5} │ │ mrc2 1, 0, r6, cr8, cr2, {3} │ │ lsls r1, r5, #1 │ │ str r0, [r1, #56] @ 0x38 │ │ lsls r1, r5, #1 │ │ - bl 229a0de │ │ + bl 22c70de │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ mov r5, r1 │ │ mov r4, r0 │ │ ldr r0, [pc, #304] @ (20a15f0 ::operator()(char const*)@@Base+0x5e90>) │ │ @@ -54322,16 +54322,16 @@ │ │ cmp sl, r9 │ │ bne.n 20a158c ::operator()(char const*)@@Base+0x5e2c> │ │ b.n 20a159a ::operator()(char const*)@@Base+0x5e3a> │ │ nop │ │ lsrs r6, r3, #25 │ │ mrc2 0, 0, r6, cr11, cr4, {7} │ │ lsls r1, r5, #1 │ │ - str r7, [r0, #112] @ 0x70 │ │ - mrc2 6, 0, r6, cr10, cr3, {5} │ │ + str r4, [r6, #112] @ 0x70 │ │ + cdp2 6, 1, cr6, cr10, cr0, {7} │ │ mrc2 0, 0, r6, cr10, cr14, {0} │ │ lsls r1, r5, #1 │ │ │ │ 020a1604 const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -54372,15 +54372,15 @@ │ │ str r0, [r4, #16] │ │ mov r0, r1 │ │ movs r1, #1 │ │ blx 2701f50 │ │ str r0, [r4, #24] │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - lsrs r0, r6, #26 │ │ + lsrs r5, r3, #27 │ │ Address 0x20a1676 is out of bounds. │ │ │ │ │ │ 020a1678 const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -54421,15 +54421,15 @@ │ │ str r0, [r4, #20] │ │ mov r0, r1 │ │ movs r1, #1 │ │ blx 2701f50 │ │ str r0, [r4, #28] │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - lsrs r4, r7, #24 │ │ + lsrs r1, r5, #25 │ │ mrc2 4, 0, sp, cr8, cr4, {6} │ │ bmi.n 20a169a const&)@@Base+0x22> │ │ │ │ 020a16f0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -54847,15 +54847,15 @@ │ │ movs r1, #1 │ │ blx 2701f50 │ │ movs r1, #0 │ │ str r0, [r4, #44] @ 0x2c │ │ str r1, [r4, #76] @ 0x4c │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - lsrs r4, r4, #8 │ │ + lsrs r1, r2, #9 │ │ Address 0x20a1b06 is out of bounds. │ │ │ │ │ │ 020a1b08 : │ │ adds r0, #28 │ │ bx lr │ │ │ │ @@ -54900,15 +54900,15 @@ │ │ str r0, [r4, #40] @ 0x28 │ │ mov r0, r1 │ │ movs r1, #1 │ │ blx 2701f50 │ │ str r0, [r4, #48] @ 0x30 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - lsrs r0, r5, #6 │ │ + lsrs r5, r2, #7 │ │ Address 0x20a1b7e is out of bounds. │ │ │ │ │ │ 020a1b80 : │ │ ldr r2, [r1, #40] @ 0x28 │ │ ldr r1, [r1, #48] @ 0x30 │ │ strd r1, r2, [r0] │ │ @@ -54982,16 +54982,16 @@ │ │ moveq r0, r4 │ │ addeq sp, #40 @ 0x28 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldrh r4, [r4, r0] │ │ lsls r1, r5, #1 │ │ - subs r3, #39 @ 0x27 │ │ - mrc2 5, 0, sl, cr10, cr9, {7} │ │ + subs r3, #84 @ 0x54 │ │ + cdp2 6, 1, cr10, cr10, cr6, {1} │ │ cdp2 12, 1, cr0, cr7, cr10, {3} │ │ vselvs.f16 s10, s23, s1 │ │ lsls r1, r5, #1 │ │ │ │ 020a1c48 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -55425,26 +55425,26 @@ │ │ ands r0, r0 │ │ mov r4, r3 │ │ movs r0, r0 │ │ add r2, pc │ │ cdp2 15, 15, cr3, cr12, cr13, {6} │ │ ldr r2, [r3, r5] │ │ lsls r1, r5, #1 │ │ - strh r3, [r7, #42] @ 0x2a │ │ - mrc2 9, 0, r3, cr9, cr12, {6} @ │ │ - cdp2 5, 1, cr8, cr10, cr5, {2} │ │ - cdp2 3, 1, cr6, cr9, cr9, {2} │ │ - vcmla.f16 d8, d25, d12[1], #90 │ │ - mrc2 4, 0, r0, cr7, cr7, {5} │ │ - cdp2 0, 1, cr6, cr8, cr6, {6} │ │ - cdp2 15, 1, cr1, cr9, cr11, {0} │ │ - cdp2 14, 1, cr13, cr9, cr1, {1} │ │ - mrc2 11, 0, r1, cr9, cr13, {0} @ │ │ - mrc2 9, 0, r3, cr10, cr4, {1} @ │ │ - mrc2 6, 0, lr, cr10, cr14, {7} │ │ + strh r0, [r5, #44] @ 0x2c │ │ + vselvs.f32 s6, s18, s18 │ │ + mrc2 5, 0, r8, cr10, cr2, {3} │ │ + mrc2 3, 0, r6, cr9, cr6, {3} │ │ + vfmsl.f16 q4, d25, d1[1] │ │ + cdp2 4, 1, cr0, cr7, cr4, {7} │ │ + mrc2 0, 0, r6, cr8, cr3, {7} │ │ + mrc2 15, 0, r1, cr9, cr8, {1} │ │ + cdp2 14, 1, cr13, cr9, cr14, {2} │ │ + @ instruction: 0xfe191b4a │ │ + @ instruction: 0xfe1a3961 │ │ + cdp2 7, 1, cr14, cr10, cr11, {1} │ │ cdp2 5, 1, cr5, cr7, cr6, {3} │ │ lsls r1, r5, #1 │ │ bmi.n 20a20e8 │ │ bmi.n 20a20ea │ │ │ │ 020a2140 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -55766,15 +55766,15 @@ │ │ ldr r7, [pc, #124] @ (20a2580 ) │ │ lsrs r7, r7, #13 │ │ adcs r2, r4 │ │ ldmia r4!, {r2, r3, r6, r7} │ │ ldmia r2, {r2, r3, r6} │ │ subs r0, r1, #6 │ │ tst r0, r3 │ │ - movs r3, #25 │ │ + movs r3, #70 @ 0x46 │ │ mrc2 6, 0, r4, cr8, cr0, {2} │ │ blx 2700630 │ │ vmov d16, r0, r1 │ │ vldr d17, [pc, #368] @ 20a2690 │ │ vabs.f64 d16, d16 │ │ vcmp.f64 d16, d17 │ │ vmrs APSR_nzcv, fpscr │ │ @@ -55906,21 +55906,21 @@ │ │ subs r6, #176 @ 0xb0 │ │ ldrsb r6, [r2, r0] │ │ ldr r6, [sp, #924] @ 0x39c │ │ lsls r7, r5, #14 │ │ subs r4, #210 @ 0xd2 │ │ strb r6, [r3, r1] │ │ lsls r1, r5, #1 │ │ - movs r1, #129 @ 0x81 │ │ - mrc2 14, 0, r7, cr8, cr13, {2} │ │ + movs r1, #174 @ 0xae │ │ + cdp2 14, 1, cr7, cr8, cr10, {4} │ │ mrc2 14, 0, ip, cr9, cr5, {4} │ │ - vselvs.f16 s6, s21, s1 │ │ - cdp2 0, 1, cr8, cr9, cr10, {5} │ │ - mrc2 14, 0, sp, cr8, cr12, {2} │ │ - cdp2 1, 1, cr3, cr8, cr15, {1} │ │ + @ instruction: 0xfe1a39cd │ │ + mrc2 0, 0, r8, cr9, cr7, {6} │ │ + cdp2 14, 1, cr13, cr8, cr9, {4} │ │ + mrc2 1, 0, r3, cr8, cr12, {2} │ │ mrc2 11, 0, pc, cr10, cr12, {4} @ │ │ cdp2 0, 1, cr5, cr6, cr10, {0} │ │ lsls r1, r5, #1 │ │ │ │ 020a26c0 (std::__ndk1::locale const&, std::__ndk1::basic_string_view >, float const&)@@Base>: │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ @@ -56353,22 +56353,22 @@ │ │ b.n 20a2c94 │ │ nop │ │ adds r3, #51 @ 0x33 │ │ rors r3, r1 │ │ str r6, [r4, #100] @ 0x64 │ │ subs r7, #166 @ 0xa6 │ │ ldr??.w pc, [r8, #3606] @ 0xe16 │ │ - ldrb r3, [r4, #10] │ │ - cdp2 12, 1, cr3, cr9, cr15, {6} │ │ - cdp2 4, 1, cr1, cr8, cr11, {4} │ │ - vselvs.f16 s2, s18, s4 │ │ + ldrb r0, [r2, #11] │ │ + mrc2 12, 0, r3, cr9, cr12, {7} │ │ + mrc2 4, 0, r1, cr8, cr8, {5} │ │ + vselvs.f16 s2, s18, s31 │ │ vselvs.f32 s24, s15, s17 │ │ - mrc2 9, 0, r7, cr10, cr7, {4} @ │ │ - mrc2 0, 0, r6, cr9, cr3, {0} │ │ - cdp2 4, 1, cr15, cr7, cr0, {2} │ │ + @ instruction: 0xfe1a79c4 │ │ + cdp2 0, 1, cr6, cr9, cr0, {2} │ │ + cdp2 4, 1, cr15, cr7, cr13, {3} │ │ @ instruction: 0xfe19c9c8 │ │ vfmsl.f16 d4, s21, s0[1] │ │ add r0, pc │ │ blx 26ffdd0 │ │ mov sl, r0 │ │ blx 26ffe30 │ │ add r4, sp, #72 @ 0x48 │ │ @@ -56592,27 +56592,27 @@ │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ movs r0, r0 │ │ orrs r4, r6 │ │ vst3. {d3[0],d5[0],d7[0]}, [r3], r2 │ │ ldr r6, [pc, #360] @ (20a2f2c const&)@@Base+0x12c>) │ │ lsls r1, r5, #1 │ │ - @ instruction: 0xb730 │ │ - mrc2 11, 0, r9, cr9, cr15, {5} @ │ │ + @ instruction: 0xb75d │ │ + @ instruction: 0xfe199bec │ │ cdp2 7, 1, cr12, cr8, cr6, {7} │ │ - mrc2 13, 0, r2, cr10, cr1, {2} │ │ - mrc2 1, 0, r1, cr10, cr12, {1} │ │ + mrc2 13, 0, r2, cr10, cr14, {3} │ │ + cdp2 1, 1, cr1, cr10, cr9, {3} │ │ mrc2 9, 0, ip, cr10, cr4, {1} @ │ │ vcmla.f16 q6, q13, d8[0], #90 │ │ - cdp2 12, 1, cr13, cr10, cr14, {1} │ │ - mrc2 9, 0, r1, cr7, cr4, {6} @ │ │ - cdp2 0, 1, cr1, cr8, cr14, {3} │ │ + mrc2 12, 0, sp, cr10, cr11, {2} │ │ + vselvs.f32 s2, s14, s2 │ │ + mrc2 0, 0, r1, cr8, cr11, {4} │ │ mrc2 7, 0, ip, cr9, cr2, {2} │ │ - cdp2 6, 1, cr7, cr10, cr11, {2} │ │ - mrc2 5, 0, fp, cr9, cr3, {6} │ │ + mrc2 6, 0, r7, cr10, cr8, {3} │ │ + cdp2 6, 1, cr11, cr9, cr0, {0} │ │ vcmla.f16 d4, d25, d2[0], #90 │ │ lsls r1, r5, #1 │ │ bmi.n 20a2da8 │ │ bmi.n 20a2daa │ │ │ │ 020a2e00 const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -57045,23 +57045,23 @@ │ │ mov r4, r9 │ │ b.n 20a3702 const&)@@Base+0x902> │ │ movs r0, #4 │ │ ldr.w r8, [sp, #60] @ 0x3c │ │ str r0, [sp, #36] @ 0x24 │ │ b.w 20a41a6 const&)@@Base+0x13a6> │ │ nop │ │ - strb r7, [r5, #12] │ │ - mrc2 4, 0, sp, cr9, cr4, {5} │ │ + strb r4, [r3, #13] │ │ + cdp2 4, 1, cr13, cr9, cr1, {7} │ │ cdp2 15, 1, cr11, cr8, cr0, {0} │ │ nop │ │ lsrs r2, r3, #6 │ │ adcs.w r5, r1, #260096 @ 0x3f800 │ │ cmp r1, r4 │ │ - str r1, [sp, #424] @ 0x1a8 │ │ - mrc2 15, 0, r8, cr7, cr12, {0} │ │ + str r1, [sp, #604] @ 0x25c │ │ + cdp2 15, 1, cr8, cr7, cr9, {2} │ │ cdp2 6, 1, cr4, cr9, cr11, {6} │ │ ldr r5, [sp, #112] @ 0x70 │ │ ldr.w r0, [r8, #52] @ 0x34 │ │ add.w r1, r8, #28 │ │ blx 2701fe0 │ │ ldr.w r0, [r8, #52] @ 0x34 │ │ ldrb.w r3, [r8, #168] @ 0xa8 │ │ @@ -57382,36 +57382,36 @@ │ │ blx 26ffe30 │ │ mov r2, r0 │ │ mov r0, fp │ │ mov r1, r4 │ │ blx 2702090 │ │ ldr.w r8, [sp, #48] @ 0x30 │ │ b.n 20a3c24 const&)@@Base+0xe24> │ │ - ldr r3, [r0, #124] @ 0x7c │ │ - mrc2 15, 0, r6, cr9, cr7, {1} │ │ - @ instruction: 0xfe19ebec │ │ - mrc2 0, 0, sp, cr8, cr10, {3} │ │ - vselvs.f32 s24, s17, s5 │ │ + ldr r0, [r6, #124] @ 0x7c │ │ + cdp2 15, 1, cr6, cr9, cr4, {3} │ │ + mrc2 12, 0, lr, cr9, cr9, {0} │ │ + cdp2 0, 1, cr13, cr8, cr7, {5} │ │ + @ instruction: 0xfe18cacf │ │ cdp2 0, 1, cr0, cr9, cr0, {0} │ │ stmia r4!, {r1, r3, r4, r5, r6} │ │ @ instruction: 0xb8bb │ │ lsls r5, r1, #26 │ │ ldr r6, [pc, #960] @ (20a3a98 const&)@@Base+0xc98>) │ │ eors r0, r0 │ │ pop {r1, r2, r4, r5, r6, pc} │ │ eors r0, r2 │ │ - str r3, [r5, #4] │ │ - cdp2 13, 1, cr6, cr10, cr1, {4} │ │ - mrc2 14, 0, ip, cr9, cr4, {7} │ │ - mrc2 7, 0, r0, cr8, cr2, {1} │ │ + str r0, [r3, #8] │ │ + cdp2 13, 1, cr6, cr10, cr14, {5} │ │ + cdp2 15, 1, cr12, cr9, cr1, {1} │ │ + mrc2 7, 0, r0, cr8, cr15, {2} │ │ mrc2 6, 0, lr, cr9, cr15, {7} │ │ cmp r6, #219 @ 0xdb │ │ - ldr r3, [pc, #196] @ (20a37b8 const&)@@Base+0x9b8>) │ │ - mrc2 12, 0, sl, cr9, cr14, {0} │ │ - cdp2 0, 1, cr13, cr9, cr13, {2} │ │ + ldr r3, [pc, #376] @ (20a386c const&)@@Base+0xa6c>) │ │ + cdp2 12, 1, cr10, cr9, cr11, {2} │ │ + mrc2 0, 0, sp, cr9, cr10, {3} │ │ cdp2 0, 1, cr15, cr7, cr15, {2} │ │ lsrs r2, r0, #12 │ │ mov r4, sl │ │ ldr.w r0, [r8, #52] @ 0x34 │ │ add.w r1, r8, #28 │ │ blx 2701fe0 │ │ ldr.w r0, [r8, #52] @ 0x34 │ │ @@ -57728,34 +57728,34 @@ │ │ vmrs APSR_nzcv, fpscr │ │ it mi │ │ movmi r0, #69 @ 0x45 │ │ strb.w r0, [sp, #128] @ 0x80 │ │ vstr d17, [sp, #144] @ 0x90 │ │ vstr d18, [sp, #160] @ 0xa0 │ │ b.n 20a3b50 const&)@@Base+0xd50> │ │ - ldr r5, [r3, #56] @ 0x38 │ │ - mrc2 12, 0, ip, cr9, cr0, {7} │ │ + ldr r2, [r1, #60] @ 0x3c │ │ + mrc2 13, 0, ip, cr9, cr13, {0} │ │ mrc2 9, 0, r0, cr8, cr10, {4} @ │ │ adcs.w r5, r1, #260096 @ 0x3f800 │ │ cmp r1, r4 │ │ - lsrs r2, r2, #7 │ │ + lsrs r7, r7, #7 │ │ cdp2 15, 1, cr11, cr7, cr0, {0} │ │ nop │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ push {r2, r3, r5} │ │ adcs r2, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ - lsls r7, r3, #10 │ │ - @ instruction: 0xfe1aebed │ │ - vselvs.f16 s12, s15, s22 │ │ - mrc2 13, 0, r7, cr9, cr5, {7} │ │ + lsls r4, r1, #11 │ │ + mrc2 12, 0, lr, cr10, cr10, {0} │ │ + mrc2 9, 0, r6, cr7, cr8, {5} @ │ │ + cdp2 14, 1, cr7, cr9, cr2, {1} │ │ mrc2 14, 0, lr, cr10, cr5, {5} │ │ add r3, sp, #256 @ 0x100 │ │ vmrs APSR_nzcv, fpscr │ │ ble.n 20a3b18 const&)@@Base+0xd18> │ │ movs r0, #69 @ 0x45 │ │ strb.w r0, [sp, #128] @ 0x80 │ │ vldr d16, [pc, #636] @ 20a3d98 const&)@@Base+0xf98> │ │ @@ -57970,15 +57970,15 @@ │ │ mov r0, r1 │ │ b.n 20a3d72 const&)@@Base+0xf72> │ │ blxns r2 │ │ lsls r1, r5, #1 │ │ @ instruction: 0xec004929 │ │ bvc.n 20a3da4 const&)@@Base+0xfa4> │ │ subs r4, #35 @ 0x23 │ │ - ldr r0, [r7, #12] │ │ + ldr r5, [r4, #16] │ │ cdp2 15, 1, cr11, cr9, cr0, {0} │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ eors r6, r4 │ │ ldmia r0, {r0, r1, r7} │ │ @@ -57986,17 +57986,17 @@ │ │ ldrsh r0, [r6, r4] │ │ subs r7, #212 @ 0xd4 │ │ movs r0, r0 │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ eors r6, r6 │ │ @ instruction: 0xb853 │ │ - cdp2 6, 1, cr0, cr10, cr6, {1} │ │ - mrc2 10, 0, r6, cr7, cr7, {4} @ │ │ - mrc2 5, 0, sl, cr7, cr1, {1} │ │ + mrc2 6, 0, r0, cr10, cr3, {2} │ │ + @ instruction: 0xfe176ac4 │ │ + mrc2 5, 0, sl, cr7, cr14, {2} │ │ cdp2 1, 1, cr6, cr8, cr5, {6} │ │ ldr r7, [pc, #124] @ (20a3e40 const&)@@Base+0x1040>) │ │ lsrs r7, r7, #13 │ │ adcs r2, r4 │ │ cmp r7, #182 @ 0xb6 │ │ asrs r7, r4, #12 │ │ stmia r2!, {r0, r1, r3, r4, r5, r6} │ │ @@ -58263,39 +58263,39 @@ │ │ movs r0, #3 │ │ strd r0, r0, [sp, #232] @ 0xe8 │ │ str r6, [sp, #224] @ 0xe0 │ │ vstr s16, [sp, #228] @ 0xe4 │ │ b.n 20a4140 const&)@@Base+0x1340> │ │ nop │ │ push {r1, r2, r6} │ │ - cdp2 6, 1, cr6, cr10, cr9, {4} │ │ + mrc2 6, 0, r6, cr10, cr6, {5} │ │ cdp2 2, 1, cr1, cr8, cr15, {3} │ │ subs r2, #131 @ 0x83 │ │ - movs r5, #44 @ 0x2c │ │ + movs r5, #89 @ 0x59 │ │ cdp2 0, 1, cr0, cr8, cr0, {0} │ │ negs r0, r1 │ │ - strb r3, [r4, r5] │ │ + strb r0, [r2, r6] │ │ vcmla.f16 , q5, d4[0], #90 │ │ - mrc2 6, 0, r6, cr10, cr5, {3} │ │ - cdp2 5, 1, cr0, cr7, cr2, {0} │ │ + cdp2 6, 1, cr6, cr10, cr2, {5} │ │ + cdp2 5, 1, cr0, cr7, cr15, {1} │ │ mrc2 5, 0, r2, cr8, cr0, {6} │ │ sbcs r0, r0 │ │ ldr r0, [pc, #28] @ (20a413c const&)@@Base+0x133c>) │ │ add r0, pc │ │ blx 26ffdd0 │ │ mov r4, r0 │ │ blx 26ffe30 │ │ mov r2, r0 │ │ movs r0, #3 │ │ strd r0, r0, [sp, #232] @ 0xe8 │ │ vstr s16, [sp, #228] @ 0xe4 │ │ str r6, [sp, #224] @ 0xe0 │ │ b.n 20a4140 const&)@@Base+0x1340> │ │ nop │ │ - add r1, pc, #652 @ (adr r1, 20a43cc const&)@@Base+0x15cc>) │ │ + add r1, pc, #832 @ (adr r1, 20a4480 const&)@@Base+0x1680>) │ │ mrc2 11, 0, sl, cr9, cr8, {1} @ │ │ mov r0, r9 │ │ mov r1, r4 │ │ blx 2702420 │ │ ldr r3, [sp, #48] @ 0x30 │ │ mov r0, sl │ │ mov r2, fp │ │ @@ -58319,15 +58319,15 @@ │ │ mov r0, r9 │ │ mov r1, r4 │ │ mov r2, r5 │ │ mov r3, r6 │ │ blx 2702240 │ │ b.n 20a4198 const&)@@Base+0x1398> │ │ nop │ │ - udf #90 @ 0x5a │ │ + udf #135 @ 0x87 │ │ vfmsl.f16 d15, s17, s10[1] │ │ lsls r0, r4, #3 │ │ lsls r0, r0, #31 │ │ beq.n 20a41a6 const&)@@Base+0x13a6> │ │ ldr r0, [sp, #232] @ 0xe8 │ │ blx 26ffad0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ @@ -58680,15 +58680,15 @@ │ │ lsls r0, r0, #31 │ │ beq.n 20a45d4 const&)@@Base+0x17d4> │ │ ldr r0, [sp, #72] @ 0x48 │ │ blx 26ffad0 │ │ b.n 20a45d4 const&)@@Base+0x17d4> │ │ b.n 20a45d4 const&)@@Base+0x17d4> │ │ b.n 20a45f6 const&)@@Base+0x17f6> │ │ - strh r2, [r1, #0] │ │ + strh r7, [r6, #0] │ │ vfmsl.f16 d15, s15, s10[1] │ │ lsls r0, r6, #2 │ │ lsls r0, r0, #31 │ │ beq.n 20a4644 const&)@@Base+0x1844> │ │ ldr r0, [sp, #184] @ 0xb8 │ │ b.n 20a4640 const&)@@Base+0x1840> │ │ b.n 20a45f6 const&)@@Base+0x17f6> │ │ @@ -58769,17 +58769,17 @@ │ │ strb r4, [r0, r1] │ │ movs r1, #251 @ 0xfb │ │ ittee │ │ cmp r5, #24 │ │ strb r4, [r0, r1] │ │ moval r1, #251 @ 0xfb │ │ subal r7, #249 @ 0xf9 │ │ - ldr r6, [sp, #204] @ 0xcc │ │ - mrc2 2, 0, r7, cr9, cr11, {3} │ │ - cdp2 0, 1, cr6, cr10, cr11, {5} │ │ + ldr r6, [sp, #384] @ 0x180 │ │ + cdp2 2, 1, cr7, cr9, cr8, {5} │ │ + mrc2 0, 0, r6, cr10, cr8, {6} │ │ cdp2 0, 1, cr3, cr8, cr4, {2} │ │ lsls r1, r5, #1 │ │ │ │ 020a46a8 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ @@ -59104,19 +59104,19 @@ │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ negs r0, r6 │ │ cmp r6, #4 │ │ lsls r1, r5, #1 │ │ - ldr r1, [sp, #116] @ 0x74 │ │ - mrc2 14, 0, r1, cr8, cr11, {1} │ │ - cdp2 0, 1, cr4, cr7, cr10, {7} │ │ - cdp2 13, 1, cr7, cr7, cr6, {6} │ │ - mrc2 13, 0, r3, cr8, cr10, {3} │ │ + ldr r1, [sp, #296] @ 0x128 │ │ + cdp2 14, 1, cr1, cr8, cr8, {3} │ │ + mrc2 1, 0, r4, cr7, cr7, {0} │ │ + mrc2 13, 0, r7, cr7, cr3, {7} │ │ + cdp2 13, 1, cr3, cr8, cr7, {5} │ │ vselvs.f64 d2, d24, d22 │ │ lsls r1, r5, #1 │ │ │ │ 020a4a70 (std::__ndk1::locale const&, std::__ndk1::basic_string_view >, double const&)@@Base>: │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #48 @ 0x30 │ │ @@ -59631,16 +59631,16 @@ │ │ itt eq │ │ addeq sp, #64 @ 0x40 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ movs r6, #210 @ 0xd2 │ │ lsls r1, r5, #1 │ │ add r4, pc, #312 @ (adr r4, 20a50d0 (std::__ndk1::locale const&, std::__ndk1::basic_string_view >, int const&, float const&)@@Base+0x88>) │ │ - cdp2 0, 1, cr13, cr10, cr4, {2} │ │ - cdp2 2, 1, cr7, cr8, cr15, {5} │ │ + mrc2 0, 0, sp, cr10, cr1, {3} │ │ + mrc2 2, 0, r7, cr8, cr12, {6} │ │ mrc2 6, 0, r2, cr7, cr14, {1} │ │ lsls r1, r5, #1 │ │ │ │ 020a4fa4 (std::__ndk1::locale const&, std::__ndk1::basic_string_view >, int const&, int const&, float const&, char* const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -59905,15 +59905,15 @@ │ │ mov r1, r2 │ │ b.w 26fe95c │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (20a5244 ::format_custom_arg, fmt::v11::formatter, char, void> >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x20>) │ │ add r0, pc │ │ blx 2702540 │ │ - ldr r4, [r0, #124] @ 0x7c │ │ + ldr r1, [r6, #124] @ 0x7c │ │ Address 0x20a5246 is out of bounds. │ │ │ │ │ │ 020a5248 : │ │ push {r7, lr} │ │ mov r7, sp │ │ bl 221a310 │ │ @@ -60018,18 +60018,18 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ movs r3, #228 @ 0xe4 │ │ lsls r1, r5, #1 │ │ movs r3, #86 @ 0x56 │ │ lsls r1, r5, #1 │ │ - cbz r4, 20a5378 , std::__ndk1::allocator > >(std::__ndk1::basic_string_view >, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0x14> │ │ - cdp2 1, 1, cr11, cr8, cr2, {4} │ │ - mrc2 1, 0, fp, cr8, cr14, {6} │ │ - cdp2 1, 1, cr11, cr8, cr12, {6} │ │ + cbz r1, 20a5384 , std::__ndk1::allocator > >(std::__ndk1::basic_string_view >, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0x20> │ │ + cdp2 1, 1, cr11, cr8, cr15, {5} │ │ + cdp2 2, 1, cr11, cr8, cr11, {0} │ │ + mrc2 1, 0, fp, cr8, cr9, {7} │ │ cdp2 2, 1, cr2, cr8, cr0, {5} │ │ lsls r1, r5, #1 │ │ │ │ 020a5364 , std::__ndk1::allocator > >(std::__ndk1::basic_string_view >, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -60302,23 +60302,23 @@ │ │ ldrsh.w r3, [r2, #3891] @ 0xf33 │ │ subs r0, #160 @ 0xa0 │ │ ldrb r0, [r0, #26] │ │ itttt le │ │ suble r7, #249 @ 0xf9 │ │ movle r1, #36 @ 0x24 │ │ lslle r1, r5, #1 │ │ - ldrle r1, [r1, #80] @ 0x50 │ │ - mrc2 10, 0, ip, cr7, cr10, {3} @ │ │ - mrc2 12, 0, lr, cr8, cr1, {4} │ │ - mrc2 1, 0, r5, cr6, cr13, {4} │ │ - mrc2 0, 0, r4, cr7, cr14, {2} │ │ - cdp2 12, 1, cr6, cr10, cr3, {3} │ │ - mrc2 1, 0, r3, cr7, cr9, {3} │ │ - mrc2 15, 0, ip, cr8, cr2, {3} │ │ - cdp2 15, 1, cr12, cr7, cr14, {7} │ │ + ldrle r6, [r6, #80] @ 0x50 │ │ + vselvs.f32 s24, s15, s15 │ │ + mrc2 12, 0, lr, cr8, cr14, {5} │ │ + cdp2 1, 1, cr5, cr6, cr10, {6} │ │ + cdp2 0, 1, cr4, cr7, cr11, {4} │ │ + mrc2 12, 0, r6, cr10, cr0, {4} │ │ + cdp2 1, 1, cr3, cr7, cr6, {5} │ │ + mrc2 15, 0, ip, cr8, cr15, {4} │ │ + mrc2 0, 0, sp, cr7, cr11, {0} │ │ cdp2 1, 1, cr2, cr7, cr12, {1} │ │ lsls r1, r5, #1 │ │ movs r0, #54 @ 0x36 │ │ lsls r1, r5, #1 │ │ │ │ 020a5668 (std::__ndk1::locale const&, std::__ndk1::basic_string_view >, float const&, float const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -60530,15 +60530,15 @@ │ │ eors r4, r4 │ │ pop {r0, r1, r2, r3, r4, r6, r7} │ │ ldrb r2, [r3, #2] │ │ adds r4, #86 @ 0x56 │ │ subs r7, #50 @ 0x32 │ │ subs r6, r1, #0 │ │ lsls r1, r5, #1 │ │ - movs r4, #217 @ 0xd9 │ │ + movs r5, #6 │ │ cdp2 13, 1, cr1, cr10, cr2, {4} │ │ lsls r1, r5, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #48 @ 0x30 │ │ ldr r3, [pc, #224] @ (20a597c >(std::__ndk1::locale const&, std::__ndk1::basic_string_view >, celestia::util::FormattedFloat const&)@@Base+0x280>) │ │ cmp r2, #2 │ │ @@ -60636,21 +60636,21 @@ │ │ stmia r3!, {r0, r2, r5, r6, r7} │ │ str r3, [sp, #204] @ 0xcc │ │ stmia r3!, {r3, r7} │ │ adds r6, r3, #4 │ │ lsls r1, r5, #1 │ │ adds r2, r1, #7 │ │ lsls r1, r5, #1 │ │ - lsls r4, r7, #22 │ │ + lsls r1, r5, #23 │ │ cdp2 13, 1, cr1, cr9, cr12, {4} │ │ lsls r1, r5, #1 │ │ - ldr r5, [r3, #100] @ 0x64 │ │ + ldr r2, [r1, #104] @ 0x68 │ │ mrc2 13, 0, r1, cr8, cr10, {2} │ │ lsls r1, r5, #1 │ │ - lsrs r7, r7, #22 │ │ + lsrs r4, r5, #23 │ │ cdp2 12, 1, cr1, cr7, cr0, {3} │ │ lsls r1, r5, #1 │ │ │ │ 020a599c , std::__ndk1::basic_string, std::__ndk1::allocator > >(std::__ndk1::basic_string_view >, celestia::util::FormattedFloat const&, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -60876,19 +60876,19 @@ │ │ eors r6, r1 │ │ ldr r7, [r2, #64] @ 0x40 │ │ asrs r1, r0, #27 │ │ stmia r1!, {r2, r3, r5, r6} │ │ subs r7, #70 @ 0x46 │ │ subs r4, r6, r2 │ │ lsls r1, r5, #1 │ │ - add r3, sp, #900 @ 0x384 │ │ + add r4, sp, #56 @ 0x38 │ │ cdp2 13, 1, cr7, cr7, cr6, {3} │ │ - cdp2 7, 1, cr8, cr10, cr0, {4} │ │ - mrc2 9, 0, r0, cr7, cr0, {5} @ │ │ - cdp2 7, 1, cr8, cr8, cr10, {3} │ │ + cdp2 7, 1, cr8, cr10, cr13, {5} │ │ + mrc2 9, 0, r0, cr7, cr13, {6} @ │ │ + mrc2 7, 0, r8, cr8, cr7, {4} │ │ mrc2 10, 0, r1, cr7, cr4, {0} @ │ │ lsls r1, r5, #1 │ │ │ │ 020a5bfc ::format_custom_arg, fmt::v11::formatter, char, void> >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base>: │ │ ldr r3, [r1, #4] │ │ cmp r3, #0 │ │ ittt ne │ │ @@ -60899,15 +60899,15 @@ │ │ mov r1, r2 │ │ b.w 26fe968 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (20a5c1c ::format_custom_arg, fmt::v11::formatter, char, void> >(void*, fmt::v11::basic_format_parse_context&, fmt::v11::context&)@@Base+0x20>) │ │ add r0, pc │ │ blx 2702540 │ │ - str r4, [r5, #92] @ 0x5c │ │ + str r1, [r3, #96] @ 0x60 │ │ Address 0x20a5c1e is out of bounds. │ │ │ │ │ │ 020a5c20 ::format(fmt::v11::context&) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -61009,18 +61009,18 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ subs r4, r2, r0 │ │ lsls r1, r5, #1 │ │ adds r6, r0, r6 │ │ lsls r1, r5, #1 │ │ - add r7, pc, #768 @ (adr r7, 20a602c , std::__ndk1::allocator > >(std::__ndk1::locale const&, std::__ndk1::basic_string_view >, double const&, char const&, double const&, char const&, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0x30>) │ │ - cdp2 7, 1, cr10, cr8, cr12, {5} │ │ - vcmla.f16 d10, d8, d14[0], #90 │ │ - mrc2 7, 0, sl, cr8, cr10, {7} │ │ + add r7, pc, #948 @ (adr r7, 20a60e0 (std::__ndk1::locale const&, std::__ndk1::basic_string_view >, int const&, int const&, double const&)@@Base+0x10>) │ │ + mrc2 7, 0, sl, cr8, cr9, {6} │ │ + vfmsl.f16 d10, s16, s7[1] │ │ + vcmla.f16 d10, d8, d7[1], #90 │ │ vcmla.f16 , q12, d8[0], #90 │ │ lsls r1, r5, #1 │ │ │ │ 020a5d3c , char const*>(std::__ndk1::basic_string_view >, celestia::util::FormattedFloat const&, char const* const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -61720,16 +61720,16 @@ │ │ blx 26ffad0 │ │ add r0, sp, #56 @ 0x38 │ │ bl 20a6a40 ::loadExtras(celestia::util::array_view)@@Base+0x2bc> │ │ blx 26ffaf0 │ │ nop │ │ asrs r0, r5, #12 │ │ lsls r1, r5, #1 │ │ - movs r4, #192 @ 0xc0 │ │ - mrc2 0, 0, r4, cr8, cr7, {0} │ │ + movs r4, #237 @ 0xed │ │ + cdp2 0, 1, cr4, cr8, cr4, {2} │ │ mrc2 1, 0, r1, cr9, cr12, {5} │ │ lsls r1, r5, #1 │ │ │ │ 020a6474 ::process(std::__ndk1::__fs::filesystem::path const&, std::__ndk1::__fs::filesystem::path const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -62003,23 +62003,23 @@ │ │ add r0, sp, #32 │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ bl 207de6a │ │ nop │ │ asrs r6, r6, #4 │ │ lsls r1, r5, #1 │ │ - subs r6, #20 │ │ + subs r6, #65 @ 0x41 │ │ cdp2 0, 1, cr1, cr9, cr10, {7} │ │ lsls r1, r5, #1 │ │ lsrs r4, r4, #26 │ │ lsls r1, r5, #1 │ │ cbnz r6, 20a67e8 ::loadExtras(celestia::util::array_view)@@Base+0x64> │ │ mrc2 0, 0, r1, cr6, cr6, {4} │ │ lsls r1, r5, #1 │ │ - mcr2 14, 5, pc, cr3, cr7, {0} @ │ │ + mrc2 14, 6, pc, cr0, cr7, {0} │ │ lsrs r6, r0, #29 │ │ lsls r1, r5, #1 │ │ lsrs r2, r2, #28 │ │ lsls r1, r5, #1 │ │ │ │ 020a6784 ::loadExtras(celestia::util::array_view)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -64158,16 +64158,16 @@ │ │ ldr r0, [sp, #24] │ │ blx 26ffad0 │ │ add r0, sp, #44 @ 0x2c │ │ bl 20a845c ::loadExtras(celestia::util::array_view)@@Base+0x2bc> │ │ blx 26ffaf0 │ │ nop │ │ ldr.w r0, [r6, #104] @ 0x68 │ │ - stmia r4!, {r1, r4, r6, r7} │ │ - cdp2 5, 1, cr6, cr6, cr4, {7} │ │ + stmia r4!, {r0, r1, r2, r3, r4, r5, r6, r7} │ │ + mrc2 6, 0, r6, cr6, cr1, {0} │ │ cdp2 7, 1, cr15, cr7, cr12, {4} │ │ lsls r0, r5, #1 │ │ │ │ 020a7e90 ::process(std::__ndk1::__fs::filesystem::path const&, std::__ndk1::__fs::filesystem::path const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -64440,22 +64440,22 @@ │ │ blx 26ffaf0 │ │ add r0, sp, #32 │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ bl 207de6a │ │ nop │ │ @ instruction: 0xf71a0068 │ │ - movs r3, #248 @ 0xf8 │ │ + movs r4, #37 @ 0x25 │ │ cdp2 6, 1, cr15, cr9, cr14, {6} │ │ lsls r0, r5, #1 │ │ eor.w r0, r8, #15204352 @ 0xe80000 │ │ add r1, pc, #744 @ (adr r1, 20a8478 ::loadExtras(celestia::util::array_view)@@Base+0x2d8>) │ │ mrc2 6, 0, pc, cr6, cr10, {3} │ │ lsls r0, r5, #1 │ │ - b.n 20a7aa6 &, std::__ndk1::__fs::filesystem::path*, false>(std::__ndk1::__fs::filesystem::path*, std::__ndk1::__fs::filesystem::path*, std::__ndk1::__less&, std::__ndk1::iterator_traits::difference_type, bool)@@Base+0xf8a> │ │ + b.n 20a7b00 &, std::__ndk1::__fs::filesystem::path*, false>(std::__ndk1::__fs::filesystem::path*, std::__ndk1::__fs::filesystem::path*, std::__ndk1::__less&, std::__ndk1::iterator_traits::difference_type, bool)@@Base+0xfe4> │ │ cdp2 5, 1, cr15, cr7, cr10, {1} │ │ lsls r0, r5, #1 │ │ @ instruction: 0xf4f60068 │ │ │ │ 020a81a0 ::loadExtras(celestia::util::array_view)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -65228,15 +65228,15 @@ │ │ lsls r0, r0, #31 │ │ beq.n 20a8a02 │ │ ldr r0, [sp, #120] @ 0x78 │ │ blx 26ffad0 │ │ b.n 20a8a02 │ │ b.n 20a89f4 │ │ b.n 20a89f4 │ │ - subs r4, #34 @ 0x22 │ │ + subs r4, #79 @ 0x4f │ │ mrc2 15, 0, lr, cr7, cr12, {6} │ │ lsls r0, r5, #1 │ │ vmla.i32 d0, d12, d8[1] │ │ b.n 20a8a02 │ │ b.n 20a89f4 │ │ b.n 20a89d8 │ │ add r0, sp, #112 @ 0x70 │ │ @@ -65262,27 +65262,27 @@ │ │ cbz r1, 20a8a02 │ │ add r0, sp, #20 │ │ bl 20a9150 ::loadExtras(celestia::util::array_view)@@Base+0x2bc> │ │ add r0, sp, #24 │ │ blx 2702720 │ │ blx 26ffaf0 │ │ eors.w r0, r4, #104 @ 0x68 │ │ - str r5, [sp, #124] @ 0x7c │ │ + str r5, [sp, #304] @ 0x130 │ │ mrc2 12, 0, lr, cr9, cr12, {5} │ │ lsls r0, r5, #1 │ │ mcrr 0, 6, r0, r2, cr8 │ │ - lsls r1, r1, #10 │ │ + lsls r6, r6, #10 │ │ cdp2 14, 1, cr14, cr7, cr0, {6} │ │ lsls r0, r5, #1 │ │ - subs r3, #124 @ 0x7c │ │ + subs r3, #169 @ 0xa9 │ │ mrc2 15, 0, lr, cr7, cr8, {1} │ │ lsls r0, r5, #1 │ │ cdp 0, 10, cr0, cr2, cr8, {3} │ │ ldr r4, [r3, #60] @ 0x3c │ │ - cdp2 15, 1, cr15, cr10, cr7, {5} │ │ + mrc2 15, 0, pc, cr10, cr4, {6} │ │ mrc2 5, 0, fp, cr7, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #216 @ 0xd8 │ │ mov r5, r2 │ │ ldr r2, [pc, #288] @ (20a8b68 ) │ │ add r2, pc │ │ @@ -65395,18 +65395,18 @@ │ │ mov r2, r8 │ │ blx 26ffdf0 │ │ b.n 20a8a80 │ │ add r0, sp, #20 │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ sbcs.w r0, r6, r8, asr #1 │ │ - strb r4, [r1, #15] │ │ + strb r1, [r7, #15] │ │ mrc2 10, 0, lr, cr9, cr12, {5} @ │ │ lsls r0, r5, #1 │ │ - bgt.n 20a8bb4 ::process(std::__ndk1::__fs::filesystem::path const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x30> │ │ + bgt.n 20a8c0e ::process(std::__ndk1::__fs::filesystem::path const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x8a> │ │ vselvs.f64 d14, d6, d2 │ │ lsls r0, r5, #1 │ │ sbcs.w r0, sl, r8, asr #1 │ │ add.w r0, ip, r8, asr #1 │ │ │ │ 020a8b84 ::process(std::__ndk1::__fs::filesystem::path const&, std::__ndk1::__fs::filesystem::path const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -65681,23 +65681,23 @@ │ │ blx 26ffaf0 │ │ add r0, sp, #32 │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ bl 207de6a │ │ nop │ │ bic.w r0, r6, r8, asr #1 │ │ - asrs r4, r0, #28 │ │ + asrs r1, r6, #28 │ │ mrc2 9, 0, lr, cr9, cr10, {6} @ │ │ lsls r0, r5, #1 │ │ b.n 20a8da8 ::process(std::__ndk1::__fs::filesystem::path const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x224> │ │ lsls r0, r5, #1 │ │ str r4, [sp, #792] @ 0x318 │ │ vselvs.f16 s28, s13, s12 │ │ lsls r0, r5, #1 │ │ - bvc.n 20a8db2 ::process(std::__ndk1::__fs::filesystem::path const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x22e> │ │ + bvc.n 20a8e0c ::process(std::__ndk1::__fs::filesystem::path const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x288> │ │ vfmsl.f16 d14, s14, s13[0] │ │ lsls r0, r5, #1 │ │ @ instruction: 0xe8020068 │ │ │ │ 020a8e94 ::loadExtras(celestia::util::array_view)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -66067,15 +66067,15 @@ │ │ ldr r2, [r2, #0] │ │ ldr r2, [r2, #0] │ │ cmp r2, r1 │ │ itt eq │ │ addeq sp, #104 @ 0x68 │ │ popeq {r7, pc} │ │ blx 26ffae0 │ │ - stmia r5!, {r1, r4, r5, r6} │ │ + stmia r5!, {r0, r1, r2, r3, r4, r7} │ │ cdp2 3, 1, cr14, cr9, cr10, {5} │ │ lsls r0, r5, #1 │ │ b.n 20a994c │ │ lsls r0, r5, #1 │ │ │ │ 020a9268 : │ │ cmp r0, #0 │ │ @@ -66094,15 +66094,15 @@ │ │ bmi.n 20a922e │ │ │ │ 020a9284 : │ │ ldr r0, [pc, #4] @ (20a928c ) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - bl 1db9ebe │ │ + bl 1de6ebe │ │ │ │ 020a9290 : │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #22 │ │ bxeq lr │ │ cmp r1, #0 │ │ @@ -66673,15 +66673,15 @@ │ │ add r1, pc │ │ ldr.w r0, [r1, r0, lsl #2] │ │ bx lr │ │ ldr r0, [pc, #4] @ (20a97b4 ) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - ldr r2, [pc, #208] @ (20a9888 ) │ │ + ldr r2, [pc, #388] @ (20a993c ) │ │ cdp2 3, 1, cr6, cr8, cr8, {0} │ │ lsls r7, r4, #1 │ │ │ │ 020a97bc : │ │ strd r1, r2, [r0] │ │ bx lr │ │ bmi.n 20a976e │ │ @@ -68920,16 +68920,16 @@ │ │ movs r1, #3 │ │ add r2, pc │ │ mov r3, r4 │ │ blx 27028c0 │ │ mov r0, r6 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - adds r4, #28 │ │ - cdp2 7, 1, cr11, cr8, cr12, {3} │ │ + adds r4, #73 @ 0x49 │ │ + mrc2 7, 0, fp, cr8, cr9, {4} │ │ Address 0x20aae02 is out of bounds. │ │ │ │ │ │ 020aae04 : │ │ mov r0, r1 │ │ b.w 26fe9d4 │ │ bmi.n 20aadb6 │ │ @@ -68959,16 +68959,16 @@ │ │ add r2, pc │ │ mov r3, r4 │ │ blx 27028c0 │ │ mov r0, r6 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - str r7, [sp, #820] @ 0x334 │ │ - mrc2 3, 0, r1, cr7, cr4, {7} │ │ + str r7, [sp, #1000] @ 0x3e8 │ │ + cdp2 4, 1, cr1, cr7, cr1, {1} │ │ Address 0x20aae56 is out of bounds. │ │ │ │ │ │ 020aae58 : │ │ cbz r0, 20aae86 │ │ ldr.w ip, [r0, #516] @ 0x204 │ │ cmp.w ip, #63 @ 0x3f │ │ @@ -69126,31 +69126,31 @@ │ │ cbz r4, 20aafc8 │ │ ldr r1, [pc, #16] @ (20aafd0 ) │ │ add r1, pc │ │ ldr.w r0, [r1, r0, lsl #3] │ │ str r0, [r4, #0] │ │ movs r0, #0 │ │ pop {r4, r5, r7, pc} │ │ - @ instruction: 0xb774 │ │ + @ instruction: 0xb7a1 │ │ mrc2 10, 0, r4, cr7, cr12, {1} @ │ │ lsls r7, r4, #1 │ │ - str r5, [r3, r3] │ │ - cdp2 3, 1, cr13, cr9, cr6, {2} │ │ - cdp2 1, 1, cr7, cr8, cr10, {0} │ │ - vcmla.f16 , q12, d14[0], #90 │ │ + str r2, [r1, r4] │ │ + mrc2 3, 0, sp, cr9, cr3, {3} │ │ + mrc2 1, 0, r7, cr8, cr7, {1} │ │ + vfmsl.f16 , d24, d3[3] │ │ mrc2 5, 0, r4, cr6, cr15, {1} │ │ - cdp2 15, 1, cr6, cr10, cr0, {6} │ │ - mrc2 15, 0, r6, cr9, cr6, {5} │ │ + cdp2 15, 1, cr6, cr10, cr13, {7} │ │ + cdp2 15, 1, cr6, cr9, cr3, {7} │ │ mrc2 9, 0, r2, cr9, cr9, {4} @ │ │ - mrc2 11, 0, sp, cr10, cr10, {3} @ │ │ + vselvs.f64 d13, d26, d23 │ │ vselvs.f16 s4, s13, s12 │ │ - cdp2 15, 1, cr10, cr10, cr10, {5} │ │ - cdp2 4, 1, cr15, cr8, cr14, {2} │ │ - mrc2 12, 0, r8, cr8, cr6, {5} │ │ - mrc2 2, 0, r9, cr9, cr1, {5} │ │ + mrc2 15, 0, sl, cr10, cr7, {6} │ │ + mrc2 4, 0, pc, cr8, cr11, {3} │ │ + cdp2 12, 1, cr8, cr8, cr3, {7} │ │ + mrc2 2, 0, r9, cr9, cr14, {6} │ │ Address 0x20ab00a is out of bounds. │ │ │ │ │ │ 020ab00c : │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #104 @ 0x68 │ │ @@ -69222,16 +69222,16 @@ │ │ cmp r2, r1 │ │ itt eq │ │ addeq sp, #104 @ 0x68 │ │ popeq {r7, pc} │ │ blx 26ffae0 │ │ stmia r5!, {r3, r5, r7} │ │ lsls r0, r5, #1 │ │ - add r7, pc, #248 @ (adr r7, 20ab1c8 ) │ │ - cdp2 7, 1, cr10, cr9, cr0, {0} │ │ + add r7, pc, #428 @ (adr r7, 20ab27c ) │ │ + cdp2 7, 1, cr10, cr9, cr13, {1} │ │ cdp2 5, 1, cr12, cr9, cr6, {0} │ │ lsls r0, r5, #1 │ │ │ │ 020ab0d8 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -69326,15 +69326,15 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ stmia r4!, {r1, r2, r3, r6, r7} │ │ lsls r0, r5, #1 │ │ - add r6, pc, #488 @ (adr r6, 20ab3c0 ) │ │ + add r6, pc, #668 @ (adr r6, 20ab474 ) │ │ cdp2 4, 1, cr12, cr9, cr12, {0} │ │ lsls r0, r5, #1 │ │ │ │ 020ab1dc : │ │ cmp r0, #14 │ │ itt hi │ │ movhi r0, #0 │ │ @@ -69793,17 +69793,17 @@ │ │ cmp r5, #0 │ │ beq.w 20ab4b2 │ │ mov r0, r8 │ │ mov r1, r5 │ │ blx 26fe344 │ │ b.n 20ab4b2 │ │ nop │ │ - str r2, [sp, #532] @ 0x214 │ │ - vselvs.f32 s20, s15, s10 │ │ - cdp2 2, 1, cr5, cr8, cr14, {6} │ │ + str r2, [sp, #712] @ 0x2c8 │ │ + mrc2 10, 0, sl, cr7, cr2, {5} @ │ │ + mrc2 2, 0, r5, cr8, cr11, {7} │ │ cdp2 15, 1, cr3, cr7, cr3, {4} │ │ cdp2 5, 1, cr15, cr10, cr13, {0} │ │ str r2, [r0, #12] │ │ movs r1, #0 │ │ mov r2, r5 │ │ blx 2702a10 │ │ cmp r0, #0 │ │ @@ -70966,44 +70966,44 @@ │ │ ldrh r5, [r0, r1] │ │ movs r1, r0 │ │ ldrh r1, [r2, r2] │ │ movs r1, r0 │ │ asrs r7, r6, #32 │ │ movs r0, r0 │ │ asrs r0, r4, #31 │ │ - mrc2 6, 0, r9, cr10, cr6, {5} │ │ + cdp2 6, 1, cr9, cr10, cr3, {7} │ │ cdp2 2, 1, cr0, cr9, cr15, {3} │ │ movs r0, r0 │ │ - str r6, [sp, #504] @ 0x1f8 │ │ + str r6, [sp, #684] @ 0x2ac │ │ mrc2 12, 0, r0, cr9, cr3, {1} │ │ movs r0, r0 │ │ subs r0, #126 @ 0x7e │ │ lsls r7, r4, #1 │ │ - strh r2, [r0, #36] @ 0x24 │ │ - mrc2 7, 0, ip, cr7, cr11, {4} │ │ - cdp2 3, 1, cr10, cr6, cr6, {1} │ │ - mrc2 5, 0, r9, cr7, cr13, {1} │ │ - cdp2 7, 1, cr12, cr9, cr0, {6} │ │ - mrc2 12, 0, r9, cr6, cr8, {1} │ │ - mrc2 10, 0, r7, cr8, cr10, {6} @ │ │ - cdp2 0, 1, cr14, cr8, cr10, {5} │ │ + strh r7, [r5, #36] @ 0x24 │ │ + cdp2 7, 1, cr12, cr7, cr8, {6} │ │ + mrc2 3, 0, sl, cr6, cr3, {2} │ │ + cdp2 5, 1, cr9, cr7, cr10, {3} │ │ + cdp2 7, 1, cr12, cr9, cr13, {7} │ │ + cdp2 12, 1, cr9, cr6, cr5, {3} │ │ + vselvs.f64 d7, d8, d7 │ │ + mrc2 0, 0, lr, cr8, cr7, {6} │ │ cdp2 6, 1, cr1, cr8, cr11, {1} │ │ - mrc2 0, 0, r2, cr10, cr1, {3} │ │ + mrc2 0, 0, r2, cr10, cr14, {4} │ │ mrc2 14, 0, r5, cr7, cr12, {4} │ │ cdp2 3, 1, cr11, cr6, cr12, {6} │ │ lsls r0, r5, #1 │ │ asrs r0, r5, #27 │ │ vcmla.f16 , q5, d0[0], #90 │ │ lsls r7, r4, #1 │ │ - lsls r0, r4, #22 │ │ + lsls r5, r1, #23 │ │ cdp2 6, 1, cr1, cr8, cr10, {5} │ │ - cdp2 4, 1, cr8, cr10, cr4, {4} │ │ + mrc2 4, 0, r8, cr10, cr1, {5} │ │ mrc2 9, 0, r3, cr7, cr12, {3} @ │ │ lsls r7, r4, #1 │ │ - strh r2, [r5, #44] @ 0x2c │ │ + strh r7, [r2, #46] @ 0x2e │ │ mrc2 5, 0, fp, cr7, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr.w r0, [pc, #2372] @ 20accbc │ │ mov r8, r2 │ │ @@ -71027,16 +71027,16 @@ │ │ movs r1, #0 │ │ mov.w r9, #0 │ │ blx 27029a0 │ │ cmp r0, #0 │ │ beq.w 20acc7c │ │ b.n 20ac3bc │ │ nop │ │ - subs r4, r2, #1 │ │ - cdp2 15, 1, cr1, cr8, cr7, {5} │ │ + subs r1, r0, #2 │ │ + mrc2 15, 0, r1, cr8, cr4, {6} │ │ vselvs.f32 s8, s14, s20 │ │ mov r6, r0 │ │ ldr r5, [pc, #40] @ (20ac3ec ) │ │ movs r1, #4 │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r5, pc │ │ @@ -71047,27 +71047,27 @@ │ │ mov r0, r6 │ │ mov r1, r5 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac40c │ │ b.n 20ac3f0 │ │ nop │ │ - strh r1, [r4, #16] │ │ - cdp2 6, 1, cr12, cr7, cr11, {7} │ │ + strh r6, [r1, #18] │ │ + mrc2 7, 0, ip, cr7, cr8, {0} │ │ vselvs.f32 s8, s12, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac408 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac40c │ │ nop │ │ - mrc2 14, 1, pc, cr10, cr6, {0} │ │ - stmia r6!, {r0, r1, r3, r4, r5, r7} │ │ + mcr2 14, 3, pc, cr7, cr6, {0} @ │ │ + stmia r6!, {r3, r5, r6, r7} │ │ vselvs.f32 s8, s12, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac43c ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71077,27 +71077,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac45c │ │ b.n 20ac440 │ │ - strh r3, [r2, #14] │ │ - mrc2 15, 0, r1, cr7, cr2, {1} │ │ + strh r0, [r0, #16] │ │ + mrc2 15, 0, r1, cr7, cr15, {2} │ │ vselvs.f32 s8, s14, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac458 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac45c │ │ nop │ │ - stc2l 14, cr15, [sl, #88]! @ 0x58 │ │ - subs r0, r0, #4 │ │ + mrc2 14, 0, pc, cr7, cr6, {0} │ │ + subs r5, r5, #4 │ │ vselvs.f32 s8, s14, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac48c ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71107,26 +71107,26 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac4ac │ │ b.n 20ac490 │ │ - strh r3, [r0, #12] │ │ + strh r0, [r6, #12] │ │ cdp2 4, 1, cr1, cr7, cr7, {3} │ │ vselvs.f32 s8, s20, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac4a8 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac4ac │ │ nop │ │ - ldc2 14, cr15, [sl, #88] @ 0x58 │ │ + stc2l 14, cr15, [r7, #88] @ 0x58 │ │ asrs r5, r6, #16 │ │ vselvs.f32 s8, s20, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac4dc ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ @@ -71137,27 +71137,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac4fc │ │ b.n 20ac4e0 │ │ - strh r3, [r6, #8] │ │ - @ instruction: 0xfe179a4a │ │ + strh r0, [r4, #10] │ │ + mrc2 10, 0, r9, cr7, cr7, {3} @ │ │ vselvs.f32 s8, s16, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac4f8 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac4fc │ │ nop │ │ - stc2l 14, cr15, [sl, #-88] @ 0xffffffa8 │ │ - ldr r2, [sp, #96] @ 0x60 │ │ + ldc2l 14, cr15, [r7, #-88]! @ 0xffffffa8 │ │ + ldr r2, [sp, #276] @ 0x114 │ │ vselvs.f32 s8, s16, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac52c ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71167,27 +71167,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac54c │ │ b.n 20ac530 │ │ - strh r3, [r4, #6] │ │ - mrc2 7, 0, r7, cr7, cr11, {0} │ │ + strh r0, [r2, #8] │ │ + cdp2 7, 1, cr7, cr7, cr8, {2} │ │ vselvs.f32 s8, s18, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac548 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac54c │ │ nop │ │ - ldc2l 14, cr15, [sl], #88 @ 0x58 │ │ - strb r1, [r5, #27] │ │ + stc2 14, cr15, [r7, #-88]! @ 0xffffffa8 │ │ + strb r6, [r2, #28] │ │ vselvs.f32 s8, s18, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac57c ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71197,27 +71197,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac59c │ │ b.n 20ac580 │ │ - strh r3, [r2, #4] │ │ - mrc2 1, 0, r8, cr7, cr10, {4} │ │ + strh r0, [r0, #6] │ │ + cdp2 1, 1, cr8, cr7, cr7, {6} │ │ vselvs.f32 s8, s14, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac598 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac59c │ │ nop │ │ - stc2 14, cr15, [sl], #88 @ 0x58 │ │ - strh r0, [r5, #10] │ │ + ldc2l 14, cr15, [r7], {22} │ │ + strh r5, [r2, #12] │ │ vselvs.f32 s8, s14, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac5cc ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71227,27 +71227,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac5ec │ │ b.n 20ac5d0 │ │ - strh r3, [r0, #2] │ │ - cdp2 0, 1, cr13, cr7, cr3, {2} │ │ + strh r0, [r6, #2] │ │ + mrc2 0, 0, sp, cr7, cr0, {3} │ │ vselvs.f32 s8, s18, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac5e8 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac5ec │ │ nop │ │ - mrrc2 14, 1, pc, sl, cr6 @ │ │ - beq.n 20ac60e │ │ + stc2 14, cr15, [r7], {22} │ │ + beq.n 20ac668 │ │ vselvs.f32 s8, s18, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac61c ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71257,27 +71257,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac63c │ │ b.n 20ac620 │ │ - ldrb r3, [r6, #31] │ │ - mrc2 1, 0, sl, cr7, cr2, {4} │ │ + strh r0, [r4, #0] │ │ + mrc2 1, 0, sl, cr7, cr15, {5} │ │ vselvs.f32 s8, s12, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac638 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac63c │ │ nop │ │ - stc2 14, cr15, [sl], {22} │ │ - add r1, pc, #384 @ (adr r1, 20ac7bc ) │ │ + ldc2 14, cr15, [r7], #-88 @ 0xffffffa8 │ │ + add r1, pc, #564 @ (adr r1, 20ac870 ) │ │ vselvs.f32 s8, s12, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac66c ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71287,27 +71287,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac68c │ │ b.n 20ac670 │ │ - ldrb r3, [r4, #30] │ │ - vselvs.f32 s30, s15, s26 │ │ + ldrb r0, [r2, #31] │ │ + mrc2 10, 0, pc, cr7, cr10, {5} @ │ │ vselvs.f32 s8, s16, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac688 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac68c │ │ nop │ │ - @ instruction: 0xfbbafe16 │ │ - @ instruction: 0xfa5bfe18 │ │ + @ instruction: 0xfbe7fe16 │ │ + qadd8 lr, r8, r8 │ │ ldr r2, [pc, #40] @ (20ac6b8 ) │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac6bc ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71317,27 +71317,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac6dc │ │ b.n 20ac6c0 │ │ - ldrb r3, [r2, #29] │ │ - mrc2 4, 0, ip, cr7, cr8, {1} │ │ + ldrb r0, [r0, #30] │ │ + cdp2 4, 1, cr12, cr7, cr5, {3} │ │ vselvs.f32 s8, s12, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac6d8 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac6dc │ │ nop │ │ - smmlsr lr, sl, r6, pc @ │ │ - stmia r4!, {r1, r2} │ │ + @ instruction: 0xfb97fe16 │ │ + stmia r4!, {r0, r1, r4, r5} │ │ vselvs.f32 s8, s12, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac70c ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71347,27 +71347,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac72c │ │ b.n 20ac710 │ │ - ldrb r3, [r0, #28] │ │ - mrc2 12, 0, r1, cr7, cr8, {3} │ │ + ldrb r0, [r6, #28] │ │ + cdp2 12, 1, cr1, cr7, cr5, {5} │ │ vselvs.f32 s8, s18, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac728 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac72c │ │ nop │ │ - smulbt lr, sl, r6 │ │ - adds r6, r0, #1 │ │ + smusdx lr, r7, r6 │ │ + adds r3, r6, #1 │ │ vselvs.f32 s8, s18, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac75c ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71377,27 +71377,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac77c │ │ b.n 20ac760 │ │ - ldrb r3, [r6, #26] │ │ - mrc2 0, 0, lr, cr7, cr0, {4} │ │ + ldrb r0, [r4, #27] │ │ + mrc2 0, 0, lr, cr7, cr13, {5} │ │ vselvs.f32 s8, s12, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac778 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac77c │ │ nop │ │ - qsub8 lr, sl, r6 │ │ - b.n 20ac838 │ │ + @ instruction: 0xfaf7fe16 │ │ + b.n 20ac892 │ │ vselvs.f32 s8, s12, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac7ac ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71407,27 +71407,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac7cc │ │ b.n 20ac7b0 │ │ - ldrb r3, [r4, #25] │ │ - mrc2 10, 0, r1, cr7, cr7, {5} @ │ │ + ldrb r0, [r2, #26] │ │ + @ instruction: 0xfe171ae4 │ │ vselvs.f32 s8, s16, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac7c8 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac7cc │ │ nop │ │ - @ instruction: 0xfa7afe16 │ │ - subs r5, r0, r2 │ │ + qasx lr, r7, r6 │ │ + subs r2, r6, r2 │ │ vselvs.f32 s8, s16, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac7fc ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71437,27 +71437,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac81c │ │ b.n 20ac800 │ │ - ldrb r3, [r2, #24] │ │ - mrc2 0, 0, lr, cr7, cr5, {0} │ │ + ldrb r0, [r0, #25] │ │ + cdp2 0, 1, cr14, cr7, cr2, {2} │ │ vselvs.f32 s8, s12, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac818 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac81c │ │ nop │ │ - @ instruction: 0xfa2afe16 │ │ - svc 227 @ 0xe3 │ │ + @ instruction: 0xfa57fe16 │ │ + b.n 20ac83c │ │ vselvs.f32 s8, s12, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac84c ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71467,27 +71467,27 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac86c │ │ b.n 20ac850 │ │ - ldrb r3, [r0, #23] │ │ - mrc2 15, 0, r3, cr7, cr0, {0} │ │ + ldrb r0, [r6, #23] │ │ + mrc2 15, 0, r3, cr7, cr13, {1} │ │ vselvs.f32 s8, s14, s8 │ │ mov r0, r9 │ │ ldr r3, [pc, #16] @ (20ac868 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ b.n 20ac86c │ │ nop │ │ - ldr??.w pc, [sl, #3606] @ 0xe16 │ │ - subs r6, #222 @ 0xde │ │ + @ instruction: 0xfa07fe16 │ │ + subs r7, #11 │ │ vselvs.f32 s8, s14, s20 │ │ movs r1, #4 │ │ ldr r6, [pc, #40] @ (20ac89c ) │ │ ldr.w r9, [r4, #56] @ 0x38 │ │ add r2, pc │ │ add r6, pc │ │ ldr.w sl, [r4, #168] @ 0xa8 │ │ @@ -71497,16 +71497,16 @@ │ │ blx 27028c0 │ │ mov r0, sl │ │ mov r1, r6 │ │ blx 27029d0 │ │ mov r5, r0 │ │ cbnz r0, 20ac8b0 │ │ b.n 20ac8a0 │ │ - ldrb r3, [r6, #21] │ │ - @ instruction: 0xfe171aed │ │ + ldrb r0, [r4, #22] │ │ + mrc2 11, 0, r1, cr7, cr10, {0} @ │ │ @ instruction: 0xfe174aee │ │ mov r0, r9 │ │ ldr r3, [pc, #952] @ (20acc60 ) │ │ movs r1, #2 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ @@ -71870,22 +71870,22 @@ │ │ mov r1, sl │ │ blx 2702970 │ │ ldr.w r0, [r4, #168] @ 0xa8 │ │ blx 27029b0 │ │ mov r0, r6 │ │ str.w r9, [r4, #168] @ 0xa8 │ │ b.n 20acc98 │ │ - vst3. @ instruction: 0xf98afe16 │ │ - subs r3, r7, r2 │ │ - cdp2 13, 1, cr7, cr7, cr15, {1} │ │ - vselvs.f16 s2, s15, s21 │ │ - mrc2 9, 0, pc, cr8, cr0, {2} @ │ │ - vselvs.f16 s2, s13, s4 │ │ - mrc2 12, 0, r7, cr8, cr5, {7} │ │ - mrc2 14, 0, r9, cr7, cr6, {5} │ │ + ldrsh.w pc, [r7, #3606] @ 0xe16 │ │ + subs r0, r5, r3 │ │ + mrc2 13, 0, r7, cr7, cr12, {2} │ │ + mrc2 9, 0, r1, cr7, cr7, {6} @ │ │ + mrc2 9, 0, pc, cr8, cr13, {3} @ │ │ + vselvs.f16 s2, s13, s31 │ │ + cdp2 13, 1, cr7, cr8, cr2, {1} │ │ + cdp2 14, 1, cr9, cr7, cr3, {7} │ │ mrc2 10, 0, r4, cr6, cr0, {0} @ │ │ mov r0, r6 │ │ ldr r3, [pc, #64] @ (20accc4 ) │ │ movs r1, #3 │ │ add r2, pc │ │ add r3, pc │ │ blx 27028c0 │ │ @@ -71905,62 +71905,62 @@ │ │ blx 26ffae0 │ │ movs r0, #1 │ │ str.w r0, [r4, #376] @ 0x178 │ │ movs r0, #0 │ │ b.n 20acc98 │ │ sxtb r0, r0 │ │ lsls r0, r5, #1 │ │ - ldr r0, [sp, #848] @ 0x350 │ │ - mrc2 6, 0, r1, cr7, cr7, {5} │ │ - mrc2 9, 0, pc, cr7, cr6, {0} @ │ │ - cdp2 14, 1, cr9, cr6, cr14, {4} │ │ - mrc2 12, 0, r7, cr6, cr11, {5} │ │ - mrc2 12, 0, r5, cr7, cr13, {2} │ │ - vfmsl.f16 , d23, d4[1] │ │ - mrc2 12, 0, r5, cr6, cr5, {1} │ │ - cdp2 12, 1, cr7, cr7, cr1, {4} │ │ - cdp2 13, 1, cr7, cr7, cr6, {5} │ │ - vcmla.f16 d15, d23, d2[1], #90 │ │ - mrc2 13, 0, r7, cr6, cr14, {3} │ │ - cdp2 12, 1, cr7, cr7, cr7, {2} │ │ - mrc2 14, 0, pc, cr7, cr2, {3} │ │ - vcmla.f16 , , d8[1], #90 │ │ - cdp2 14, 1, cr15, cr6, cr10, {2} │ │ - cdp2 12, 1, cr7, cr7, cr13, {0} │ │ - vfmsl.f16 , d23, d7[3] │ │ - vcmla.f16 d15, d6, d14[1], #90 │ │ - vfmsl.f16 , d22, d7[0] │ │ - mrc2 11, 0, r7, cr6, cr3, {6} @ │ │ - cdp2 4, 1, cr5, cr7, cr7, {6} │ │ - mrc2 7, 0, pc, cr9, cr4, {7} │ │ - mrc2 4, 0, r5, cr6, cr15, {4} │ │ - mrc2 11, 0, r7, cr9, cr9, {4} @ │ │ + ldr r1, [sp, #4] │ │ + cdp2 6, 1, cr1, cr7, cr4, {7} │ │ + @ instruction: 0xfe17f943 │ │ + mrc2 14, 0, r9, cr6, cr11, {5} │ │ + cdp2 12, 1, cr7, cr6, cr8, {7} │ │ + cdp2 12, 1, cr5, cr7, cr10, {4} │ │ + vselvs.f16 s30, s14, s18 │ │ + cdp2 12, 1, cr5, cr6, cr2, {3} │ │ + cdp2 12, 1, cr7, cr7, cr14, {5} │ │ + mrc2 13, 0, r7, cr7, cr3, {6} │ │ + vcmla.f16 , , d15[0], #90 │ │ + cdp2 13, 1, cr7, cr6, cr11, {5} │ │ + mrc2 12, 0, r7, cr7, cr4, {3} │ │ + mrc2 14, 0, pc, cr7, cr15, {4} │ │ + vfmsl.f16 d15, s15, s10[0] │ │ + mrc2 14, 0, pc, cr6, cr7, {3} │ │ + mrc2 12, 0, r7, cr7, cr10, {1} │ │ + vselvs.f16 s30, s14, s25 │ │ + vfmsl.f16 , d6, d3[1] │ │ + vselvs.f16 s30, s12, s8 │ │ + cdp2 12, 1, cr7, cr6, cr0, {0} │ │ + mrc2 4, 0, r5, cr7, cr4, {7} │ │ + vcmla.f16 d15, d9, d1[1], #90 │ │ + cdp2 4, 1, cr5, cr6, cr12, {6} │ │ + @ instruction: 0xfe197bc6 │ │ cdp2 7, 1, cr5, cr7, cr12, {2} │ │ - mrc2 7, 0, pc, cr6, cr10, {5} │ │ + cdp2 7, 1, cr15, cr6, cr7, {7} │ │ cdp2 7, 1, cr5, cr6, cr4, {1} │ │ - mrc2 11, 0, r7, cr6, cr15, {2} @ │ │ - vselvs.f64 d12, d23, d3 │ │ - cdp2 7, 1, cr15, cr9, cr0, {4} │ │ - mrc2 11, 0, ip, cr6, cr11, {2} @ │ │ - vselvs.f64 d7, d9, d21 │ │ + vselvs.f64 d7, d22, d12 │ │ + mrc2 11, 0, ip, cr7, cr0, {5} @ │ │ + cdp2 7, 1, cr15, cr9, cr13, {5} │ │ + vselvs.f64 d12, d22, d8 │ │ + mrc2 11, 0, r7, cr9, cr2, {2} @ │ │ mrc2 6, 0, r5, cr7, cr3, {7} │ │ - cdp2 7, 1, cr15, cr6, cr6, {2} │ │ + mrc2 7, 0, pc, cr6, cr3, {3} │ │ cdp2 6, 1, cr5, cr6, cr11, {6} │ │ - @ instruction: 0xfe167aeb │ │ - cdp2 7, 1, cr11, cr7, cr4, {1} │ │ - cdp2 7, 1, cr15, cr8, cr12, {0} │ │ - mrc2 6, 0, fp, cr6, cr12, {7} │ │ - mrc2 10, 0, r7, cr8, cr1, {5} @ │ │ - @ instruction: 0xfe175a66 │ │ - mrc2 6, 0, pc, cr7, cr2, {6} │ │ - mrc2 10, 0, r5, cr6, cr14, {1} @ │ │ - mrc2 10, 0, r7, cr7, cr7, {3} @ │ │ - mrc2 12, 0, r9, cr7, cr7, {2} │ │ - mrc2 6, 0, pc, cr6, cr8, {4} │ │ - cdp2 12, 1, cr9, cr6, cr15, {1} │ │ + mrc2 11, 0, r7, cr6, cr8, {0} @ │ │ + mrc2 7, 0, fp, cr7, cr1, {2} │ │ + mrc2 7, 0, pc, cr8, cr9, {1} │ │ + cdp2 7, 1, cr11, cr6, cr9, {1} │ │ + mrc2 10, 0, r7, cr8, cr14, {6} @ │ │ + mrc2 10, 0, r5, cr7, cr3, {4} @ │ │ + mrc2 6, 0, pc, cr7, cr15, {7} │ │ + @ instruction: 0xfe165a6b │ │ + vselvs.f32 s14, s15, s9 │ │ + cdp2 12, 1, cr9, cr7, cr4, {4} │ │ + cdp2 6, 1, cr15, cr6, cr5, {6} │ │ + mrc2 12, 0, r9, cr6, cr12, {2} │ │ cdp2 1, 1, cr0, cr6, cr13, {5} │ │ movs r4, r0 │ │ ldr.w r0, [r5, #3] │ │ strb.w r0, [fp, #3] │ │ @ instruction: 0xf7e70003 │ │ lsls r1, r2, #1 │ │ movs r4, r0 │ │ @@ -72216,36 +72216,36 @@ │ │ str.w r1, [r8, #40] @ 0x28 │ │ strd r5, r4, [r8, #8] │ │ strd r3, lr, [r8, #16] │ │ strd r2, ip, [r8, #24] │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - asrs r6, r3, #16 │ │ - mrc2 10, 0, r8, cr8, cr9, {4} @ │ │ - mrc2 6, 0, r9, cr9, cr0, {2} │ │ - mrc2 9, 0, r8, cr7, cr11, {2} @ │ │ - cdp2 14, 1, cr10, cr9, cr1, {3} │ │ - mrc2 7, 0, r7, cr9, cr9, {7} │ │ - vselvs.f32 s16, s15, s4 │ │ - mrc2 3, 0, pc, cr9, cr2, {2} │ │ - mrc2 9, 0, sp, cr6, cr10, {1} @ │ │ - cdp2 7, 1, cr7, cr6, cr13, {6} │ │ - vfmsl.f16 d9, s14, s10[0] │ │ - cdp2 7, 1, cr7, cr7, cr1, {5} │ │ - mrc2 9, 0, sp, cr7, cr12, {5} @ │ │ - mrc2 7, 0, r7, cr6, cr7, {3} │ │ - mrc2 1, 0, r3, cr7, cr11, {1} │ │ - cdp2 4, 1, cr15, cr9, cr0, {3} │ │ + asrs r3, r1, #17 │ │ + @ instruction: 0xfe188ac6 │ │ + mrc2 6, 0, r9, cr9, cr13, {3} │ │ + vselvs.f16 s16, s15, s16 │ │ + cdp2 14, 1, cr10, cr9, cr14, {4} │ │ + vcmla.f16 d7, d9, d6[1], #90 │ │ + vselvs.f32 s16, s15, s31 │ │ + mrc2 3, 0, pc, cr9, cr15, {3} │ │ + @ instruction: 0xfe16d967 │ │ + mrc2 7, 0, r7, cr6, cr10, {7} │ │ + vcmla.f16 , , d2[0], #90 │ │ + cdp2 7, 1, cr7, cr7, cr14, {6} │ │ + @ instruction: 0xfe17d9e9 │ │ + cdp2 7, 1, cr7, cr6, cr4, {5} │ │ + cdp2 1, 1, cr3, cr7, cr8, {3} │ │ + cdp2 4, 1, cr15, cr9, cr13, {4} │ │ @ instruction: 0xfe160a45 │ │ - mrc2 9, 0, fp, cr10, cr6, {1} @ │ │ - vfmsl.f16 , d23, d0[0] │ │ + @ instruction: 0xfe1ab963 │ │ + vfmsl.f16 , d23, d5[3] │ │ @ instruction: 0xfe170aee │ │ lsls r3, r5, #1 │ │ - ldr r7, [pc, #184] @ (20ad140 ) │ │ + ldr r7, [pc, #364] @ (20ad1f4 ) │ │ mrc2 13, 0, r0, cr9, cr1, {6} │ │ movs r4, r0 │ │ lsrs r1, r1, #10 │ │ movs r4, r0 │ │ lsls r7, r7, #11 │ │ movs r4, r0 │ │ lsls r7, r5, #6 │ │ @@ -72253,15 +72253,15 @@ │ │ lsls r1, r4, #3 │ │ movs r4, r0 │ │ lsls r7, r6, #1 │ │ movs r4, r0 │ │ lsrs r7, r7, #11 │ │ movs r4, r0 │ │ ldc2 15, cr15, [r9, #1020] @ 0x3fc │ │ - @ instruction: 0xb826 │ │ + @ instruction: 0xb853 │ │ mrc2 5, 0, fp, cr7, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ ldr r5, [pc, #72] @ (20ad100 ) │ │ mov.w ip, #0 │ │ ldr r0, [pc, #72] @ (20ad104 ) │ │ add r5, pc │ │ @@ -73325,34 +73325,34 @@ │ │ b.n 20adc4c │ │ nop │ │ lsrs r7, r1, #12 │ │ movs r0, r0 │ │ vacgt.f32 d31, d4, d9 │ │ movs r0, #254 @ 0xfe │ │ lsls r7, r4, #1 │ │ - str r6, [r2, #68] @ 0x44 │ │ + str r3, [r0, #72] @ 0x48 │ │ vfmsl.f16 d4, s16, s4[1] │ │ - vselvs.f32 s24, s12, s12 │ │ - mrc2 14, 0, sp, cr8, cr11, {2} │ │ - @ instruction: 0xfe194bee │ │ + mrc2 10, 0, ip, cr6, cr3, {1} @ │ │ + cdp2 14, 1, cr13, cr8, cr8, {4} │ │ + mrc2 12, 0, r4, cr9, cr11, {0} │ │ cdp2 1, 1, cr2, cr7, cr4, {2} │ │ lsls r7, r4, #1 │ │ - ldr r1, [r1, #4] │ │ + ldr r6, [r6, #4] │ │ mrc2 0, 0, r2, cr6, cr14, {6} │ │ lsls r7, r4, #1 │ │ - ldr r3, [r6, #0] │ │ - mrc2 3, 0, r6, cr6, cr6, {3} │ │ - vfmsl.f16 d14, s16, s11[1] │ │ - mrc2 4, 0, r4, cr6, cr7, {0} │ │ - cdp2 13, 1, cr10, cr9, cr14, {2} │ │ - vcmla.f16 d0, d23, d11[1], #90 │ │ - cdp2 7, 1, cr10, cr7, cr4, {0} │ │ - mrc2 12, 0, r7, cr8, cr13, {7} │ │ - vselvs.f64 d6, d25, d2 │ │ - mrc2 12, 0, r7, cr7, cr7, {6} │ │ + ldr r0, [r4, #4] │ │ + cdp2 3, 1, cr6, cr6, cr3, {5} │ │ + vcmla.f16 q7, q4, d10[1], #90 │ │ + cdp2 4, 1, cr4, cr6, cr4, {2} │ │ + mrc2 13, 0, sl, cr9, cr11, {3} │ │ + vfmsl.f16 q0, d23, d0[1] │ │ + mrc2 7, 0, sl, cr7, cr1, {1} │ │ + cdp2 13, 1, cr7, cr8, cr10, {1} │ │ + vselvs.f64 d6, d25, d31 │ │ + cdp2 13, 1, cr7, cr7, cr4, {0} │ │ vselvs.f16 s8, s19, s25 │ │ add r1, pc │ │ ldr r2, [pc, #692] @ (20adf04 ) │ │ str r1, [sp, #0] │ │ movs r1, #3 │ │ add r2, pc │ │ blx 27028c0 │ │ @@ -73586,37 +73586,37 @@ │ │ b.w 20ad518 │ │ add r1, pc, #144 @ (adr r1, 20adf64 ) │ │ lsls r0, r5, #1 │ │ add r0, pc, #624 @ (adr r0, 20ae148 ) │ │ lsls r0, r5, #1 │ │ ldr r2, [pc, #256] @ (20adfdc ) │ │ @ instruction: 0xfe1a49ca │ │ - @ instruction: 0xfe1a8ac0 │ │ - mrc2 9, 0, r2, cr7, cr4, {1} @ │ │ - mrc2 11, 0, ip, cr8, cr10, {4} @ │ │ - mrc2 11, 0, sp, cr6, cr15, {7} @ │ │ - mrc2 12, 0, r7, cr9, cr13, {1} │ │ - mrc2 6, 0, r6, cr9, cr13, {1} │ │ + @ instruction: 0xfe1a8aed │ │ + @ instruction: 0xfe172961 │ │ + @ instruction: 0xfe18cbc7 │ │ + cdp2 12, 1, cr13, cr6, cr12, {1} │ │ + cdp2 12, 1, cr7, cr9, cr10, {3} │ │ + cdp2 6, 1, cr6, cr9, cr10, {3} │ │ cdp2 14, 1, cr1, cr6, cr8, {7} │ │ lsls r7, r4, #1 │ │ - str r1, [r2, #92] @ 0x5c │ │ + str r6, [r7, #92] @ 0x5c │ │ mrc2 14, 0, r1, cr6, cr2, {6} │ │ lsls r7, r4, #1 │ │ - str r4, [r2, #16] │ │ - mrc2 5, 0, lr, cr8, cr11, {6} │ │ - mrc2 1, 0, r4, cr6, cr5, {5} │ │ - @ instruction: 0xfe19aaec │ │ - cdp2 6, 1, cr0, cr7, cr9, {2} │ │ - cdp2 4, 1, cr10, cr7, cr2, {5} │ │ - mrc2 10, 0, r7, cr8, cr11, {4} @ │ │ - vselvs.f16 s12, s18, s1 │ │ - mrc2 10, 0, r7, cr7, cr5, {3} @ │ │ - vfmsl.f16 q4, d9, d6[1] │ │ - mrc2 6, 0, r2, cr7, cr4, {6} │ │ - mrc2 9, 0, ip, cr8, cr8, {1} @ │ │ + str r1, [r0, #20] │ │ + cdp2 6, 1, cr14, cr8, cr8, {0} │ │ + cdp2 1, 1, cr4, cr6, cr2, {7} │ │ + mrc2 11, 0, sl, cr9, cr9, {0} @ │ │ + mrc2 6, 0, r0, cr7, cr6, {3} │ │ + cdp2 4, 1, cr10, cr7, cr15, {6} │ │ + @ instruction: 0xfe187ac8 │ │ + @ instruction: 0xfe19694d │ │ + vselvs.f32 s14, s15, s5 │ │ + vcmla.f16 d8, d25, d11[0], #90 │ │ + cdp2 7, 1, cr2, cr7, cr1, {0} │ │ + @ instruction: 0xfe18c965 │ │ mrc2 4, 0, sp, cr6, cr4, {6} │ │ bmi.n 20adee2 │ │ bmi.n 20adee4 │ │ bmi.n 20adee6 │ │ bmi.n 20adee8 │ │ bmi.n 20adeea │ │ │ │ @@ -74731,15 +74731,15 @@ │ │ ldr r1, [pc, #16] @ (20aeae4 ) │ │ add r1, pc │ │ ldr.w r0, [r1, r0, lsl #2] │ │ bx lr │ │ ldr r0, [pc, #4] @ (20aeae0 ) │ │ add r0, pc │ │ bx lr │ │ - ldrsb r7, [r7, r4] │ │ + ldrsb r4, [r5, r5] │ │ cdp2 15, 1, cr0, cr6, cr10, {7} │ │ lsls r7, r4, #1 │ │ │ │ 020aeae8 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -75701,15 +75701,15 @@ │ │ add r0, r2 │ │ cmp r0, #0 │ │ bne.w 20af2f6 │ │ b.n 20af272 │ │ nop │ │ strh r4, [r5, #44] @ 0x2c │ │ lsls r0, r5, #1 │ │ - bl 21a0140 , std::__ndk1::allocator >&&, Value&&)@@Base+0xa0> │ │ + bl 21cd140 &, Renderer::Annotation*, false>(Renderer::Annotation*, Renderer::Annotation*, std::__ndk1::__less&, std::__ndk1::iterator_traits::difference_type, bool)@@Base+0x734> │ │ strh r6, [r1, #44] @ 0x2c │ │ lsls r0, r5, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub.w sp, sp, #4128 @ 0x1020 │ │ sub sp, #12 │ │ @@ -100684,15 +100684,15 @@ │ │ ldr r1, [pc, #16] @ (20c07bc ) │ │ add r1, pc │ │ ldr.w r0, [r1, r0, lsl #2] │ │ bx lr │ │ ldr r0, [pc, #4] @ (20c07b8 ) │ │ add r0, pc │ │ bx lr │ │ - asrs r6, r3, #27 │ │ + asrs r3, r1, #28 │ │ cdp2 3, 1, cr15, cr8, cr10, {1} │ │ lsls r5, r4, #1 │ │ │ │ 020c07c0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -102854,79 +102854,79 @@ │ │ ldr r0, [pc, #28] @ (20c1c04 ) │ │ add r0, pc │ │ bx lr │ │ ldr r0, [pc, #28] @ (20c1c0c ) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - @ instruction: 0xeb58fe15 │ │ + @ instruction: 0xeb85fe15 │ │ lsls r4, r6, #26 │ │ - mrc2 10, 0, r2, cr5, cr10, {6} @ │ │ - mrc2 9, 0, lr, cr6, cr12, {0} @ │ │ - cdp2 14, 1, cr6, cr6, cr11, {3} │ │ - vselvs.f64 d8, d21, d0 │ │ - mrc2 9, 0, r0, cr5, cr3, {3} @ │ │ - mrc2 9, 0, r0, cr6, cr9, {6} @ │ │ - mrc2 12, 0, r6, cr6, cr5, {0} │ │ - vselvs.f64 d8, d22, d6 │ │ - @ instruction: 0xfe168be6 │ │ - cdp2 0, 1, cr2, cr5, cr4, {5} │ │ - vfmsl.f16 d8, s17, s1[1] │ │ + vselvs.f64 d2, d5, d7 │ │ + @ instruction: 0xfe16e949 │ │ + mrc2 14, 0, r6, cr6, cr8, {4} │ │ + vselvs.f64 d8, d21, d29 │ │ + vselvs.f16 s0, s11, s1 │ │ + vselvs.f32 s0, s12, s12 │ │ + cdp2 12, 1, cr6, cr6, cr2, {2} │ │ + mrc2 11, 0, r8, cr6, cr3, {5} @ │ │ + mrc2 12, 0, r8, cr6, cr3, {0} │ │ + mrc2 0, 0, r2, cr5, cr1, {6} │ │ + vcmla.f16 q4, q12, d5[1], #90 │ │ mrc2 5, 0, r0, cr7, cr8, {5} │ │ vcmla.f16 d13, d5, d6[0], #90 │ │ - mrc2 13, 0, r3, cr8, cr12, {5} │ │ - cdp2 6, 1, cr10, cr8, cr4, {0} │ │ - mrc2 3, 0, r0, cr7, cr10, {2} │ │ - mrc2 11, 0, sl, cr8, cr7, {5} @ │ │ - mrc2 3, 0, r4, cr6, cr9, {2} │ │ - cdp2 6, 1, cr2, cr7, cr12, {6} │ │ - mrc2 12, 0, sl, cr5, cr0, {7} │ │ - mrc2 4, 0, r4, cr6, cr13, {1} │ │ + cdp2 13, 1, cr3, cr8, cr9, {7} │ │ + mrc2 6, 0, sl, cr8, cr1, {1} │ │ + cdp2 3, 1, cr0, cr7, cr7, {4} │ │ + @ instruction: 0xfe18abe4 │ │ + cdp2 3, 1, cr4, cr6, cr6, {4} │ │ + mrc2 6, 0, r2, cr7, cr9, {7} │ │ + mrc2 13, 0, sl, cr5, cr13, {0} │ │ + cdp2 4, 1, cr4, cr6, cr10, {3} │ │ mrc2 5, 0, r0, cr7, cr7, {7} │ │ - cdp2 0, 1, cr2, cr5, cr2, {7} │ │ - vcmla.f16 q4, q4, d2[1], #90 │ │ - cdp2 13, 1, cr3, cr7, cr5, {5} │ │ - mrc2 10, 0, lr, cr8, cr1, {1} @ │ │ + cdp2 1, 1, cr2, cr5, cr15, {0} │ │ + vcmla.f16 d8, d24, d15[0], #90 │ │ + mrc2 13, 0, r3, cr7, cr2, {6} │ │ + mrc2 10, 0, lr, cr8, cr14, {2} @ │ │ vcmla.f16 d13, d22, d4[1], #90 │ │ - mrc2 4, 0, r4, cr8, cr9, {0} │ │ - cdp2 3, 1, cr14, cr7, cr6, {3} │ │ - mrc2 12, 0, sl, cr7, cr6, {1} │ │ - mrc2 2, 0, r2, cr6, cr10, {6} │ │ - vcmla.f16 q4, , d5[0], #90 │ │ + cdp2 4, 1, cr4, cr8, cr6, {2} │ │ + mrc2 3, 0, lr, cr7, cr3, {4} │ │ + cdp2 12, 1, cr10, cr7, cr3, {3} │ │ + cdp2 3, 1, cr2, cr6, cr7, {0} │ │ + vfmsl.f16 q4, d23, d2[2] │ │ vselvs.f16 s26, s14, s26 │ │ - cdp2 2, 1, cr2, cr8, cr0, {2} │ │ - mrc2 12, 0, r4, cr7, cr12, {1} │ │ + cdp2 2, 1, cr2, cr8, cr13, {3} │ │ + cdp2 12, 1, cr4, cr7, cr9, {3} │ │ vselvs.f16 s26, s10, s21 │ │ - mrc2 4, 0, sl, cr8, cr15, {6} │ │ - mrc2 4, 0, lr, cr7, cr14, {4} │ │ - cdp2 12, 1, cr8, cr7, cr8, {5} │ │ - mrc2 12, 0, sl, cr5, cr15, {3} │ │ - cdp2 7, 1, cr6, cr6, cr7, {0} │ │ - mrc2 12, 0, lr, cr7, cr7, {0} │ │ - mrc2 5, 0, r0, cr5, cr6, {0} │ │ - mrc2 3, 0, r4, cr7, cr11, {0} │ │ - cdp2 7, 1, cr12, cr7, cr8, {7} │ │ - cdp2 12, 1, cr4, cr7, cr7, {5} │ │ - mrc2 12, 0, sl, cr5, cr10, {2} │ │ - cdp2 12, 1, cr8, cr6, cr12, {0} │ │ - cdp2 12, 1, cr6, cr5, cr4, {3} │ │ - vselvs.f32 s8, s13, s23 │ │ - vfmsl.f16 d8, s13, s10[1] │ │ - mrc2 13, 0, r3, cr7, cr6, {1} │ │ - mrc2 9, 0, lr, cr8, cr7, {5} @ │ │ - cdp2 12, 1, cr8, cr6, cr2, {6} │ │ - cdp2 12, 1, cr9, cr5, cr0, {2} │ │ - mrc2 3, 0, r4, cr8, cr11, {7} │ │ - mrc2 7, 0, r6, cr7, cr3, {1} │ │ - vfmsl.f16 d12, s14, s14[1] │ │ - vselvs.f64 d2, d7, d26 │ │ - cdp2 3, 1, cr0, cr6, cr0, {3} │ │ - cdp2 6, 1, cr12, cr8, cr1, {7} │ │ - cdp2 12, 1, cr10, cr6, cr4, {6} │ │ - vfmsl.f16 d10, s12, s13[0] │ │ + cdp2 5, 1, cr10, cr8, cr12, {0} │ │ + cdp2 4, 1, cr14, cr7, cr11, {6} │ │ + mrc2 12, 0, r8, cr7, cr5, {6} │ │ + cdp2 12, 1, cr10, cr5, cr12, {5} │ │ + mrc2 7, 0, r6, cr6, cr4, {1} │ │ + cdp2 12, 1, cr14, cr7, cr4, {2} │ │ + cdp2 5, 1, cr0, cr5, cr3, {2} │ │ + cdp2 3, 1, cr4, cr7, cr8, {2} │ │ + vfmsl.f16 d12, s14, s10[0] │ │ + mrc2 12, 0, r4, cr7, cr4, {6} │ │ + cdp2 12, 1, cr10, cr5, cr7, {4} │ │ + mrc2 12, 0, r8, cr6, cr9, {1} │ │ + mrc2 12, 0, r6, cr5, cr1, {4} │ │ + mrc2 10, 0, r4, cr6, cr8, {6} @ │ │ + vcmla.f16 q4, q11, d10[0], #90 │ │ + cdp2 13, 1, cr3, cr7, cr3, {3} │ │ + @ instruction: 0xfe18e9e4 │ │ + cdp2 12, 1, cr8, cr6, cr15, {7} │ │ + cdp2 12, 1, cr9, cr5, cr13, {3} │ │ + cdp2 4, 1, cr4, cr8, cr8, {1} │ │ + cdp2 7, 1, cr6, cr7, cr0, {3} │ │ + vcmla.f16 q6, , d12[0], #90 │ │ + mrc2 11, 0, r2, cr7, cr7, {2} @ │ │ + cdp2 3, 1, cr0, cr6, cr13, {4} │ │ + cdp2 7, 1, cr12, cr8, cr14, {0} │ │ + mrc2 12, 0, sl, cr6, cr1, {7} │ │ + vcmla.f16 q5, q3, d3[1], #90 │ │ mrc2 2, 0, pc, cr5, cr12, {1} │ │ @ instruction: 0xb64e │ │ │ │ 020c1cfc : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ @@ -105966,16 +105966,16 @@ │ │ bl 20a9650 │ │ cmp r0, #0 │ │ it eq │ │ moveq.w r0, #4294967295 @ 0xffffffff │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ b.n 20c39b4 │ │ - @ instruction: 0xfe14ca4c │ │ - cdp2 14, 1, cr6, cr6, cr7, {0} │ │ + mrc2 10, 0, ip, cr4, cr9, {3} @ │ │ + mrc2 14, 0, r6, cr6, cr4, {1} │ │ mrc2 5, 0, fp, cr5, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #8 │ │ mov ip, r0 │ │ ldr r0, [pc, #112] @ (20c3b64 ) │ │ add r0, pc │ │ @@ -106271,16 +106271,16 @@ │ │ cmp r0, #0 │ │ it eq │ │ moveq.w r0, #4294967295 @ 0xffffffff │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ b.n 20c3720 │ │ - cdp2 7, 1, cr12, cr4, cr12, {4} │ │ - @ instruction: 0xfe166b47 │ │ + mrc2 7, 0, ip, cr4, cr9, {5} │ │ + mrc2 11, 0, r6, cr6, cr4, {3} @ │ │ Address 0x20c3dce is out of bounds. │ │ │ │ │ │ 020c3dd0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -106909,15 +106909,15 @@ │ │ mov r0, r8 │ │ blx 27018e0 │ │ mov r0, r4 │ │ b.n 20c426c │ │ nop │ │ adds r3, #254 @ 0xfe │ │ lsls r7, r4, #1 │ │ - stmia r2!, {r2, r3, r4, r6, r7} │ │ + stmia r3!, {r0, r3} │ │ mrc2 4, 0, lr, cr6, cr0, {1} │ │ cdp2 3, 1, cr3, cr8, cr12, {2} │ │ lsls r7, r4, #1 │ │ │ │ 020c4388 : │ │ push {r7, lr} │ │ mov r7, sp │ │ @@ -110919,15 +110919,15 @@ │ │ nop │ │ nop │ │ ... │ │ @ instruction: 0xffffffff │ │ @ instruction: 0xffffffff │ │ blt.n 20c6ea8 │ │ lsls r7, r4, #1 │ │ - str r7, [sp, #88] @ 0x58 │ │ + str r7, [sp, #268] @ 0x10c │ │ vfmsl.f16 , d22, d1[1] │ │ movs r1, r0 │ │ @ instruction: 0xb8df │ │ movs r1, r0 │ │ │ │ 020c6e40 : │ │ cmp r0, #0 │ │ @@ -110958,15 +110958,15 @@ │ │ pop {r4, r5, r7, pc} │ │ mov r0, r5 │ │ blx 2703030 │ │ movs r0, #0 │ │ add sp, #16 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - str r6, [sp, #608] @ 0x260 │ │ + str r6, [sp, #788] @ 0x314 │ │ vfmsl.f16 , d6, d3[1] │ │ movs r1, r0 │ │ @ instruction: 0xb861 │ │ movs r1, r0 │ │ bmi.n 20c6e40 │ │ bmi.n 20c6e42 │ │ bmi.n 20c6e44 │ │ @@ -119085,15 +119085,15 @@ │ │ nop │ │ nop │ │ ... │ │ @ instruction: 0xffffffff │ │ @ instruction: 0xffffffff │ │ ldrb r4, [r7, #10] │ │ lsls r7, r4, #1 │ │ - adds r6, #132 @ 0x84 │ │ + adds r6, #177 @ 0xb1 │ │ mrc2 13, 0, fp, cr6, cr11, {0} │ │ movs r1, r0 │ │ pop {r0, r5, pc} │ │ movs r1, r0 │ │ │ │ 020cced0 : │ │ cmp r1, #0 │ │ @@ -119127,15 +119127,15 @@ │ │ mov r0, r4 │ │ blx 2703030 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - adds r6, #0 │ │ + adds r6, #45 @ 0x2d │ │ mrc2 12, 0, fp, cr6, cr7, {4} │ │ movs r1, r0 │ │ pop {r0, r2, r3, r4, r7} │ │ movs r1, r0 │ │ bmi.n 20cced8 │ │ bmi.n 20cceda │ │ │ │ @@ -121903,15 +121903,15 @@ │ │ lsls r1, r0, #22 │ │ movs r0, r0 │ │ str r6, [r2, #20] │ │ lsls r7, r4, #1 │ │ adds r4, #217 @ 0xd9 │ │ vraddhn.i d19, , │ │ vsri.64 , , #1 │ │ - vdup.8 , d12[7] │ │ + vcvt.f16.u16 , , #1 │ │ mrc2 0, 0, r6, cr6, cr8, {3} │ │ lsls r7, r4, #1 │ │ str r4, [r5, #4] │ │ lsls r7, r4, #1 │ │ str r2, [r7, #4] │ │ lsls r7, r4, #1 │ │ subs r1, r2, #6 │ │ @@ -122076,33 +122076,33 @@ │ │ lsls r6, r4, #1 │ │ subs r7, r6, #0 │ │ movs r2, r0 │ │ subs r7, r6, #0 │ │ movs r2, r0 │ │ subs r3, r7, #0 │ │ movs r2, r0 │ │ - pop {r1, r3, r4, r6, r7, pc} │ │ + bkpt 0x0007 │ │ cdp2 15, 1, cr5, cr4, cr8, {2} │ │ lsls r7, r4, #1 │ │ subs r1, r1, #2 │ │ movs r2, r0 │ │ subs r1, r0, #2 │ │ movs r2, r0 │ │ subs r1, r1, #2 │ │ movs r2, r0 │ │ - bvc.n 20ced70 │ │ + bvc.n 20cebca │ │ cdp2 13, 1, cr5, cr4, cr4, {7} │ │ lsls r7, r4, #1 │ │ adds r1, r2, #4 │ │ movs r2, r0 │ │ adds r1, r1, #4 │ │ movs r2, r0 │ │ adds r1, r2, #4 │ │ movs r2, r0 │ │ - bl 1eff906 │ │ + bl 1f2c906 │ │ ldrb r2, [r5, r5] │ │ lsls r7, r4, #1 │ │ adds r3, r0, #2 │ │ movs r2, r0 │ │ adds r3, r7, #1 │ │ movs r2, r0 │ │ adds r3, r0, #2 │ │ @@ -123209,21 +123209,21 @@ │ │ vtbx.8 d18, {d31}, d17 │ │ vmls.i , , d28[0] │ │ lsls r7, r4, #1 │ │ strb r2, [r7, r2] │ │ lsls r7, r4, #1 │ │ strb r0, [r1, r3] │ │ lsls r7, r4, #1 │ │ - sxtb r4, r6 │ │ + uxth r1, r4 │ │ mrc2 3, 0, r5, cr4, cr14, {6} │ │ lsls r7, r4, #1 │ │ - ldmia r4, {r2, r4, r5, r6, r7} │ │ + ldmia r5, {r0, r5} │ │ mrc2 3, 0, r5, cr4, cr14, {3} │ │ lsls r7, r4, #1 │ │ - @ instruction: 0xebeafe15 │ │ + ldc 14, cr15, [r7], {21} │ │ strh r6, [r4, r1] │ │ lsls r7, r4, #1 │ │ strh r2, [r7, r3] │ │ lsls r7, r4, #1 │ │ strh r4, [r5, r3] │ │ lsls r7, r4, #1 │ │ strh r2, [r0, #10] │ │ @@ -125245,15 +125245,15 @@ │ │ b.n 20d0b66 │ │ nop │ │ ldr r6, [r6, #52] @ 0x34 │ │ lsls r6, r4, #1 │ │ asrs r7, r0, #9 │ │ vsra.u64 , , #1 │ │ vmlal.u , d15, d7[0] │ │ - @ instruction: 0xffff9d99 │ │ + vqrdmulh.s , , d6[0] │ │ mrc2 0, 0, r0, cr4, cr15, {5} │ │ movs r0, r0 │ │ lsls r3, r0, #5 │ │ movs r0, r0 │ │ mcr2 15, 0, pc, cr9, cr15, {7} @ │ │ ldc2l 15, cr15, [r9], {255} @ 0xff │ │ stc2l 15, cr15, [r1, #1020]! @ 0x3fc │ │ @@ -129674,16 +129674,16 @@ │ │ @ instruction: 0xffffffff │ │ subs r5, #90 @ 0x5a │ │ lsls r6, r4, #1 │ │ lsrs r0, r0, #31 │ │ lsls r7, r4, #1 │ │ bkpt 0x0052 │ │ lsls r4, r4, #1 │ │ - ldrb r3, [r5, #19] │ │ - vselvs.f32 s12, s14, s11 │ │ + ldrb r0, [r3, #20] │ │ + mrc2 10, 0, r6, cr7, cr2, {2} @ │ │ mrc2 9, 0, r3, cr5, cr12, {4} @ │ │ lsls r6, r4, #1 │ │ bmi.n 20d3c44 │ │ bmi.n 20d3c46 │ │ bmi.n 20d3c48 │ │ bmi.n 20d3c4a │ │ │ │ @@ -130356,16 +130356,16 @@ │ │ mov r1, fp │ │ b.n 20d424c │ │ mvn.w r0, #24 │ │ b.n 20d4302 │ │ nop │ │ adds r4, #182 @ 0xb6 │ │ lsls r6, r4, #1 │ │ - str r3, [r2, #72] @ 0x48 │ │ - mrc2 3, 0, r6, cr5, cr9, {3} │ │ + str r0, [r0, #76] @ 0x4c │ │ + cdp2 3, 1, cr6, cr5, cr6, {5} │ │ mrc2 2, 0, r3, cr5, cr6, {5} │ │ lsls r6, r4, #1 │ │ │ │ 020d43ac : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -130532,15 +130532,15 @@ │ │ bne.n 20d4528 │ │ movs r4, #0 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ movs r1, #0 │ │ mov r0, r8 │ │ b.n 20d4522 │ │ nop │ │ - str r3, [r2, #16] │ │ + str r0, [r0, #20] │ │ Address 0x20d455a is out of bounds. │ │ │ │ │ │ 020d455c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -130796,15 +130796,15 @@ │ │ cbz r2, 20d47ca │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ bx r2 │ │ mvn.w r2, #28 │ │ mov r0, r2 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - ldrsh r5, [r7, r1] │ │ + ldrsh r2, [r5, r2] │ │ Address 0x20d47d6 is out of bounds. │ │ │ │ │ │ 020d47d8 : │ │ cmp r0, #0 │ │ itt eq │ │ mvneq.w r0, #1 │ │ @@ -131502,16 +131502,16 @@ │ │ bne.w 20d4de2 │ │ b.n 20d4e66 │ │ nop │ │ cmp r5, #116 @ 0x74 │ │ lsls r6, r4, #1 │ │ add r5, sp, #640 @ 0x280 │ │ lsls r4, r4, #1 │ │ - bmi.n 20d4f76 │ │ - cdp2 6, 1, cr5, cr5, cr5, {0} │ │ + bmi.n 20d4fd0 │ │ + mrc2 6, 0, r5, cr5, cr2, {1} │ │ mrc2 7, 0, r2, cr6, cr6, {5} │ │ lsls r6, r4, #1 │ │ │ │ 020d4f48 : │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #24 │ │ @@ -131918,15 +131918,15 @@ │ │ beq.w 20d5240 │ │ adds.w r2, r1, #51 @ 0x33 │ │ bne.n 20d530c │ │ b.n 20d5240 │ │ nop │ │ movs r4, #188 @ 0xbc │ │ lsls r6, r4, #1 │ │ - @ instruction: 0xebfcfe15 │ │ + stc 14, cr15, [r9], #-84 @ 0xffffffac │ │ add r7, pc, #272 @ (adr r7, 20d5468 ) │ │ lsls r4, r4, #1 │ │ movs r3, #120 @ 0x78 │ │ lsls r6, r4, #1 │ │ bmi.n 20d5308 │ │ bmi.n 20d530a │ │ │ │ @@ -133890,15 +133890,15 @@ │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ mvn.w r0, #28 │ │ b.n 20d6818 │ │ lsrs r2, r7, #30 │ │ lsls r6, r4, #1 │ │ - subs r6, #37 @ 0x25 │ │ + subs r6, #82 @ 0x52 │ │ cdp2 13, 1, cr0, cr5, cr0, {5} │ │ lsls r6, r4, #1 │ │ │ │ 020d6844 : │ │ cbz r0, 20d6888 │ │ ldrb.w r3, [r0, #560] @ 0x230 │ │ lsls r3, r3, #31 │ │ @@ -134264,15 +134264,15 @@ │ │ cbz r2, 20d6c4a │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ bx r2 │ │ mvn.w r2, #28 │ │ mov r0, r2 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - subs r1, #253 @ 0xfd │ │ + subs r2, #42 @ 0x2a │ │ Address 0x20d6c56 is out of bounds. │ │ │ │ │ │ 020d6c58 : │ │ cmp r0, #0 │ │ itt eq │ │ mvneq.w r0, #1 │ │ @@ -145170,15 +145170,15 @@ │ │ bx lr │ │ │ │ 020ddd3c : │ │ ldr r0, [pc, #4] @ (20ddd44 ) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - ldrh r7, [r4, #16] │ │ + ldrh r4, [r2, #18] │ │ Address 0x20ddd46 is out of bounds. │ │ │ │ │ │ 020ddd48 : │ │ cmp r0, #0 │ │ itt eq │ │ moveq r0, #0 │ │ @@ -147693,25 +147693,25 @@ │ │ bne.n 20df72c │ │ mov r0, r4 │ │ bl 20f3524 │ │ add r5, r0 │ │ b.n 20df728 │ │ strh r6, [r3, #6] │ │ lsls r5, r4, #1 │ │ - bcc.n 20df87c │ │ + bcc.n 20df8d6 │ │ mrc2 10, 0, r3, cr4, cr0, {5} @ │ │ mrc2 10, 0, r3, cr7, cr14, {4} @ │ │ - mrc2 12, 0, r4, cr7, cr6, {4} │ │ - mrc2 13, 0, ip, cr3, cr0, {2} │ │ - mrc2 9, 0, r0, cr3, cr3, {7} @ │ │ - cdp2 7, 1, cr4, cr6, cr8, {7} │ │ + cdp2 12, 1, cr4, cr7, cr3, {6} │ │ + mrc2 13, 0, ip, cr3, cr13, {3} │ │ + vselvs.f32 s0, s6, s1 │ │ + vfmsl.f16 d4, s12, s10[0] │ │ mrc2 9, 0, r3, cr5, cr10, {5} @ │ │ - cdp2 1, 1, cr6, cr7, cr15, {3} │ │ + mrc2 1, 0, r6, cr7, cr12, {4} │ │ vcmla.f16 , q11, d4[1], #90 │ │ - mrc2 1, 0, r6, cr7, cr5, {1} │ │ + cdp2 1, 1, cr6, cr7, cr2, {3} │ │ cdp2 14, 1, cr7, cr6, cr0, {0} │ │ lsls r5, r4, #1 │ │ │ │ 020df81c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -147926,15 +147926,15 @@ │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r6 │ │ blx 2703030 │ │ movs r0, #0 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - lsrs r2, r4, #12 │ │ + lsrs r7, r1, #13 │ │ @ instruction: 0xfe150947 │ │ movs r0, r0 │ │ ldr r3, [pc, #300] @ (20dfb88 ) │ │ movs r1, r0 │ │ cmp r1, #175 @ 0xaf │ │ movs r1, r0 │ │ cmp r1, #169 @ 0xa9 │ │ @@ -148088,15 +148088,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r4 │ │ blx 2703030 │ │ movs r0, #0 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - lsrs r2, r3, #6 │ │ + lsrs r7, r0, #7 │ │ cdp2 7, 1, cr0, cr5, cr7, {6} │ │ movs r0, r0 │ │ ldr r1, [pc, #812] @ (20dff0c ) │ │ movs r1, r0 │ │ cmp r0, #47 @ 0x2f │ │ movs r1, r0 │ │ cmp r0, #41 @ 0x29 │ │ @@ -148231,15 +148231,15 @@ │ │ b.n 20dfd18 │ │ mov r0, r8 │ │ blx 2703030 │ │ movs r0, #0 │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - add r3, sp, #860 @ 0x35c │ │ + add r4, sp, #16 │ │ mrc2 6, 0, r0, cr3, cr5, {2} │ │ movs r0, r0 │ │ ldr r0, [pc, #308] @ (20dfe60 ) │ │ movs r1, r0 │ │ │ │ 020dfd2c : │ │ cmp r1, #0 │ │ @@ -148280,15 +148280,15 @@ │ │ b.n 20dfd88 │ │ mov r0, r6 │ │ blx 2703030 │ │ movs r0, #0 │ │ add sp, #16 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - add r3, sp, #412 @ 0x19c │ │ + add r3, sp, #592 @ 0x250 │ │ cdp2 5, 1, cr0, cr3, cr7, {7} │ │ movs r0, r0 │ │ @ instruction: 0x47e3 │ │ movs r1, r0 │ │ │ │ 020dfd9c : │ │ cmp r2, #0 │ │ @@ -148335,15 +148335,15 @@ │ │ mov r0, r8 │ │ blx 2703030 │ │ movs r0, #0 │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - add r2, sp, #964 @ 0x3c4 │ │ + add r3, sp, #120 @ 0x78 │ │ mrc2 5, 0, r0, cr3, cr1, {3} │ │ movs r0, r0 │ │ bx sp │ │ movs r1, r0 │ │ │ │ 020dfe1c : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -152392,15 +152392,15 @@ │ │ bx lr │ │ │ │ 020e26b4 : │ │ ldr r0, [pc, #4] @ (20e26bc ) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - pop {r0, r1, r2, r3, r4, r5, r6} │ │ + pop {r2, r3, r5, r7} │ │ cdp2 6, 1, cr4, cr3, cr3, {0} │ │ mov r0, r1 │ │ movs r1, #1 │ │ b.w 26feb48 │ │ push {r7, lr} │ │ mov r7, sp │ │ subs r2, #1 │ │ @@ -152443,15 +152443,15 @@ │ │ mov r0, r8 │ │ blx 2703030 │ │ movs r0, #0 │ │ add sp, #16 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - ble.n 20e2710 │ │ + udf #25 │ │ cdp2 15, 1, cr15, cr4, cr15, {5} │ │ @ instruction: 0xffffffb3 │ │ vsli.64 , q8, #63 @ 0x3f │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub.w sp, sp, #4800 @ 0x12c0 │ │ sub sp, #4 │ │ @@ -155466,15 +155466,15 @@ │ │ mov r0, r8 │ │ blx 2703030 │ │ movs r0, #0 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - pop {r2, r3, r5, r6, r7, pc} │ │ + bkpt 0x0019 │ │ cdp2 15, 1, cr13, cr4, cr15, {5} │ │ @ instruction: 0xffffdfb5 │ │ Address 0x20e4752 is out of bounds. │ │ │ │ │ │ 020e4754 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -155524,15 +155524,15 @@ │ │ mov r0, r8 │ │ blx 2703030 │ │ movs r0, #0 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - pop {r2, r5, r6, pc} │ │ + pop {r0, r4, r7, pc} │ │ cdp2 15, 1, cr13, cr4, cr7, {1} │ │ @ instruction: 0xffffdf2d │ │ Address 0x20e47da is out of bounds. │ │ │ │ │ │ 020e47dc : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -155582,15 +155582,15 @@ │ │ mov r0, r8 │ │ blx 2703030 │ │ movs r0, #0 │ │ add sp, #16 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - pop {r2, r3, r4, r6, r7} │ │ + pop {r0, r3, pc} │ │ mrc2 14, 0, sp, cr4, cr15, {4} │ │ @ instruction: 0xffffdea5 │ │ Address 0x20e4862 is out of bounds. │ │ │ │ │ │ 020e4864 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -155962,15 +155962,15 @@ │ │ bmi.n 20e4b92 │ │ │ │ 020e4be8 : │ │ ldr r0, [pc, #4] @ (20e4bf0 ) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - asrs r7, r0, #12 │ │ + asrs r4, r6, #12 │ │ Address 0x20e4bf2 is out of bounds. │ │ │ │ │ │ 020e4bf4 : │ │ movw r1, #6152 @ 0x1808 │ │ movs r2, #0 │ │ strb r2, [r0, r1] │ │ @@ -162668,15 +162668,15 @@ │ │ cmpne r2, #0 │ │ ldrne r1, [r5, #0] │ │ blxne r2 │ │ b.n 20e9956 │ │ nop │ │ bgt.n 20e9968 │ │ lsls r4, r4, #1 │ │ - ldr r2, [r6, #60] @ 0x3c │ │ + ldr r7, [r3, #64] @ 0x40 │ │ cdp2 2, 1, cr15, cr4, cr15, {3} │ │ vrshr.u32 , , #1 │ │ vsra.u64 d16, d29, #1 │ │ movs r0, r0 │ │ str r5, [r2, r7] │ │ movs r1, r0 │ │ lsls r5, r2, #7 │ │ @@ -162771,15 +162771,15 @@ │ │ cmpne r2, #0 │ │ ldrne r1, [r5, #0] │ │ blxne r2 │ │ b.n 20e9a5a │ │ nop │ │ blt.n 20e9a64 │ │ lsls r4, r4, #1 │ │ - ldr r6, [r5, #44] @ 0x2c │ │ + ldr r3, [r3, #48] @ 0x30 │ │ cdp2 1, 1, cr15, cr4, cr11, {3} │ │ vsra.u32 , , #1 │ │ vshr.u64 d16, d25, #1 │ │ movs r0, r0 │ │ str r1, [r2, r3] │ │ movs r1, r0 │ │ lsls r1, r2, #3 │ │ @@ -163358,19 +163358,19 @@ │ │ ldrex r1, [r5] │ │ strex r1, r0, [r5] │ │ cmp r1, #0 │ │ bne.n 20ea128 │ │ dmb ish │ │ b.n 20ea0f6 │ │ nop │ │ - lsls r5, r0, #23 │ │ - mrc2 7, 0, ip, cr5, cr5, {5} │ │ + lsls r2, r6, #23 │ │ + cdp2 7, 1, cr12, cr5, cr2, {7} │ │ mrc2 6, 0, sp, cr2, cr0, {1} │ │ lsls r4, r4, #1 │ │ - stmia r7!, {r0, r1, r5, r7} │ │ + stmia r7!, {r4, r6, r7} │ │ cdp2 0, 1, cr2, cr2, cr0, {0} │ │ movs r1, #0 │ │ ldr.w r2, [r4, #1404] @ 0x57c │ │ dmb ish │ │ cmp r2, #1 │ │ beq.n 20ea18c │ │ add.w r2, r4, #1408 @ 0x580 │ │ @@ -163567,22 +163567,22 @@ │ │ blx 26ffaf0 │ │ nop │ │ @ instruction: 0xffffffff │ │ @ instruction: 0xffffffff │ │ ... │ │ bhi.n 20ea2d0 │ │ lsls r4, r4, #1 │ │ - subs r3, r6, #7 │ │ + movs r0, #32 │ │ cdp2 3, 1, cr13, cr3, cr4, {1} │ │ lsls r4, r4, #1 │ │ - subs r1, r4, #7 │ │ - cdp2 15, 1, cr1, cr3, cr13, {5} │ │ + movs r0, #14 │ │ + mrc2 15, 0, r1, cr3, cr10, {6} │ │ mrc2 2, 0, sp, cr3, cr14, {6} │ │ lsls r4, r4, #1 │ │ - subs r3, r3, #6 │ │ + subs r0, r1, #7 │ │ mrc2 3, 0, sp, cr3, cr2, {7} │ │ lsls r4, r4, #1 │ │ │ │ 020ea3a0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -163704,16 +163704,16 @@ │ │ blx 26ffdf0 │ │ b.n 20ea4ec │ │ str.w r6, [r4, #2120] @ 0x848 │ │ mov r0, r5 │ │ b.n 20ea3c4 │ │ bcs.n 20ea50c │ │ lsls r4, r4, #1 │ │ - ldrh r6, [r1, r5] │ │ - vcmla.f16 , , d5[0], #90 │ │ + ldrh r3, [r7, r5] │ │ + vfmsl.f16 , d5, d2[2] │ │ mrc2 1, 0, sp, cr5, cr4, {7} │ │ lsls r4, r4, #1 │ │ │ │ 020ea500 : │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r1, [r0, #28] │ │ @@ -163838,15 +163838,15 @@ │ │ movs r3, #20 │ │ vstr d8, [sp, #16] │ │ blx 26ffdf0 │ │ movs r0, #0 │ │ b.n 20ea60e │ │ ldmia r7, {r3, r4, r5, r6, r7} │ │ lsls r4, r4, #1 │ │ - @ instruction: 0xef57fe15 │ │ + vmov.i8 d15, #69 @ 0x45 │ │ ldmia r7, {r1, r3, r5, r7} │ │ lsls r4, r4, #1 │ │ │ │ 020ea664 : │ │ ldr r1, [r0, #28] │ │ ldr.w r2, [r1, #2120] @ 0x848 │ │ cmp r2, #2 │ │ @@ -164255,17 +164255,17 @@ │ │ mov r0, r9 │ │ blx 27018e0 │ │ b.n 20ea874 │ │ ldmia r6!, {r1, r2, r4, r5} │ │ lsls r4, r4, #1 │ │ ldmia r5!, {r3, r6, r7} │ │ lsls r4, r4, #1 │ │ - subs r2, #202 @ 0xca │ │ - mrc2 2, 0, sp, cr5, cr12, {4} │ │ - mrc2 10, 0, r3, cr5, cr10, {1} @ │ │ + subs r2, #247 @ 0xf7 │ │ + cdp2 2, 1, cr13, cr5, cr9, {6} │ │ + @ instruction: 0xfe153a67 │ │ mrc2 11, 0, ip, cr4, cr14, {6} @ │ │ lsls r4, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ mov r4, r0 │ │ ldr r1, [r0, #16] │ │ @@ -164750,15 +164750,15 @@ │ │ movs r0, #0 │ │ b.n 20eae32 │ │ nop │ │ stmia r7!, {r1, r2, r3, r4, r5, r7} │ │ lsls r4, r4, #1 │ │ stmia r7!, {r1, r5, r6} │ │ lsls r4, r4, #1 │ │ - lsrs r0, r3, #3 │ │ + lsrs r5, r0, #4 │ │ cdp2 5, 1, cr12, cr6, cr14, {4} │ │ lsls r4, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r5, [r0, #24] │ │ mov r4, r0 │ │ @@ -165692,15 +165692,15 @@ │ │ ldr.w r0, [r9, #104] @ 0x68 │ │ str r0, [r6, #64] @ 0x40 │ │ movs r0, #2 │ │ b.n 20eb98a │ │ nop │ │ pop {r1, r4, r7, pc} │ │ lsls r4, r4, #1 │ │ - cmp r1, #76 @ 0x4c │ │ + cmp r1, #121 @ 0x79 │ │ cdp2 15, 1, cr6, cr4, cr8, {1} │ │ mrc2 11, 0, fp, cr6, cr14, {5} @ │ │ lsls r4, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #24 │ │ @@ -165754,15 +165754,15 @@ │ │ addeq sp, #24 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ cbnz r2, 20ebb66 │ │ lsls r4, r4, #1 │ │ - movs r7, #78 @ 0x4e │ │ + movs r7, #123 @ 0x7b │ │ mrc2 10, 0, fp, cr4, cr8, {5} @ │ │ lsls r4, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ mov r5, r0 │ │ ldr r0, [r1, #20] │ │ @@ -166020,15 +166020,15 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ cbnz r4, 20ebe0c │ │ lsls r4, r4, #1 │ │ ldr r6, [r5, #60] @ 0x3c │ │ mrc2 11, 0, r6, cr6, cr4, {5} @ │ │ - cdp2 13, 1, cr12, cr6, cr1, {5} │ │ + cdp2 13, 1, cr12, cr6, cr14, {6} │ │ mrc2 7, 0, fp, cr2, cr12, {7} │ │ lsls r4, r4, #1 │ │ bmi.n 20ebd98 │ │ bmi.n 20ebd9a │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -167079,15 +167079,15 @@ │ │ ittt eq │ │ addeq sp, #108 @ 0x6c │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ add r6, sp, #752 @ 0x2f0 │ │ lsls r4, r4, #1 │ │ - ldrh r6, [r2, #62] @ 0x3e │ │ + str r0, [sp, #12] │ │ cdp2 6, 1, cr9, cr5, cr10, {3} │ │ mrc2 0, 0, r0, cr6, cr7, {5} │ │ movs r0, r0 │ │ str r6, [sp, #368] @ 0x170 │ │ mrc2 0, 0, r0, cr6, cr15, {3} │ │ movs r0, r0 │ │ lsls r7, r4, #1 │ │ @@ -167183,16 +167183,16 @@ │ │ addeq sp, #104 @ 0x68 │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r4, sp, #280 @ 0x118 │ │ lsls r4, r4, #1 │ │ - ldmia r4, {r4} │ │ - cdp2 12, 1, cr7, cr5, cr15, {5} │ │ + ldmia r4, {r0, r2, r3, r4, r5} │ │ + mrc2 12, 0, r7, cr5, cr12, {6} │ │ mrc2 11, 0, sl, cr3, cr0, {5} @ │ │ lsls r4, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r2, [r0, #20] │ │ ldrd r1, r4, [r0] │ │ cbz r2, 20eca48 │ │ @@ -167369,15 +167369,15 @@ │ │ addweq sp, sp, #1556 @ 0x614 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ add r2, sp, #728 @ 0x2d8 │ │ lsls r4, r4, #1 │ │ cmp r0, #157 @ 0x9d │ │ - mrc2 2, 0, r9, cr6, cr1, {7} │ │ + mrc2 3, 0, r9, cr6, cr14, {0} │ │ @ instruction: 0xfe14a9ca │ │ lsls r4, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #16 │ │ mov r8, r0 │ │ @@ -167490,15 +167490,15 @@ │ │ mov r0, r1 │ │ ldr.w r2, [r8, #244] @ 0xf4 │ │ blx r2 │ │ movs r0, #0 │ │ b.n 20eccb6 │ │ add r1, sp, #568 @ 0x238 │ │ lsls r4, r4, #1 │ │ - str r2, [sp, #236] @ 0xec │ │ + str r2, [sp, #416] @ 0x1a0 │ │ mrc2 7, 0, r2, cr4, cr5, {3} │ │ vselvs.f16 s20, s12, s4 │ │ lsls r4, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ @@ -167693,15 +167693,15 @@ │ │ add.w r2, r6, r2, lsl #4 │ │ strd r1, r0, [r2, #8] │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ mvn.w r0, #2 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldrh r1, [r3, #62] @ 0x3e │ │ + str r0, [sp, #24] │ │ cdp2 5, 1, cr2, cr4, cr7, {0} │ │ mrc2 5, 0, fp, cr6, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ mov r8, r2 │ │ mov r5, r0 │ │ cmp r0, #0 │ │ @@ -167737,17 +167737,17 @@ │ │ mov r3, r4 │ │ add r2, pc │ │ blx 27028c0 │ │ mvn.w r0, #202 @ 0xca │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - strb r5, [r3, #25] │ │ - mrc2 2, 0, pc, cr3, cr10, {3} │ │ - vcmla.f16 , q1, d4[1], #90 │ │ + strb r2, [r1, #26] │ │ + cdp2 2, 1, cr15, cr3, cr7, {5} │ │ + vfmsl.f16 d13, s5, s2[0] │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r6, [pc, #132] @ (20ed074 ) │ │ mov r1, r0 │ │ add r6, pc │ │ @@ -167930,15 +167930,15 @@ │ │ blx 26ffae0 │ │ nop │ │ lsrs r4, r4, #5 │ │ lsls r7, r4, #1 │ │ add r4, pc, #728 @ (adr r4, 20ed484 ) │ │ lsls r4, r4, #1 │ │ movs r2, #147 @ 0x93 │ │ - cdp2 13, 1, cr8, cr6, cr3, {1} │ │ + mrc2 13, 0, r8, cr6, cr0, {2} │ │ mrc2 4, 0, sl, cr4, cr2, {1} │ │ lsls r4, r4, #1 │ │ ldr r0, [pc, #308] @ (20ed2f0 ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ cmp r0, #0 │ │ itt eq │ │ @@ -168047,15 +168047,15 @@ │ │ b.n 20ed2bc │ │ movs r0, #0 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ lsrs r6, r5, #2 │ │ lsls r7, r4, #1 │ │ movs r1, #217 @ 0xd9 │ │ - cdp2 12, 1, cr8, cr6, cr3, {4} │ │ + mrc2 12, 0, r8, cr6, cr0, {5} │ │ cdp2 6, 1, cr5, cr4, cr14, {2} │ │ mrc2 5, 0, fp, cr6, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #148 @ 0x94 │ │ ldr r4, [pc, #708] @ (20ed5d0 ) │ │ ldr.w r6, [pc, #1824] @ 20eda30 │ │ @@ -168339,25 +168339,25 @@ │ │ add r2, pc │ │ b.n 20ed4dc │ │ nop │ │ lsls r0, r3, #29 │ │ lsls r7, r4, #1 │ │ lsls r2, r3, #26 │ │ lsls r7, r4, #1 │ │ - bl 2489202 │ │ - ldmia r6, {r3, r4, r6, r7} │ │ + bl 24b6202 │ │ + ldmia r7!, {r0, r2} │ │ cdp2 15, 1, cr1, cr4, cr14, {2} │ │ vselvs.f32 s16, s12, s28 │ │ mrc2 15, 0, r1, cr6, cr4, {0} │ │ - mrc2 2, 0, lr, cr6, cr1, {3} │ │ + mrc2 2, 0, lr, cr6, cr14, {4} │ │ mrc2 14, 0, r1, cr5, cr14, {6} │ │ vselvs.f64 d0, d22, d19 │ │ movs r0, r0 │ │ - ldr r2, [pc, #228] @ (20ed6e0 ) │ │ - mrc2 2, 0, lr, cr4, cr5, {1} │ │ + ldr r2, [pc, #408] @ (20ed794 ) │ │ + cdp2 2, 1, cr14, cr4, cr2, {3} │ │ vcmla.f16 d9, d5, d4[0], #90 │ │ mov r1, sl │ │ ldrd r2, r3, [sp, #20] │ │ str r0, [sp, #0] │ │ add r0, sp, #88 @ 0x58 │ │ bl 20ee1d4 │ │ ldr r0, [sp, #40] @ 0x28 │ │ @@ -168802,33 +168802,33 @@ │ │ movs r0, r0 │ │ movs r4, #0 │ │ lsls r4, r6, #3 │ │ movs r0, r2 │ │ movs r0, r0 │ │ add r2, pc, #680 @ (adr r2, 20edcdc ) │ │ lsls r4, r4, #1 │ │ - mov pc, pc │ │ - mrc2 2, 0, r6, cr4, cr4, {7} │ │ - mrc2 1, 0, lr, cr5, cr6, {0} │ │ - mrc2 1, 0, sp, cr5, cr11, {1} │ │ - mrc2 12, 0, r2, cr2, cr5, {4} │ │ - cdp2 13, 1, cr2, cr4, cr3, {2} │ │ - mrc2 15, 0, lr, cr4, cr6, {4} │ │ - cdp2 0, 1, cr15, cr3, cr12, {0} │ │ - cdp2 12, 1, cr2, cr3, cr15, {4} │ │ + bxns r5 │ │ + cdp2 3, 1, cr6, cr4, cr1, {1} │ │ + cdp2 1, 1, cr14, cr5, cr3, {2} │ │ + cdp2 1, 1, cr13, cr5, cr8, {3} │ │ + cdp2 12, 1, cr2, cr2, cr2, {6} │ │ + mrc2 13, 0, r2, cr4, cr0, {3} │ │ + cdp2 15, 1, cr14, cr4, cr3, {6} │ │ + mrc2 0, 0, pc, cr3, cr9, {1} │ │ + mrc2 12, 0, r2, cr3, cr12, {5} │ │ vfmsl.f16 q2, d20, d3[1] │ │ vselvs.f16 s8, s4, s3 │ │ - cdp2 15, 1, cr13, cr2, cr4, {1} │ │ - mrc2 15, 0, sp, cr5, cr8, {3} │ │ - mrc2 14, 0, sp, cr5, cr5, {3} │ │ - mrc2 14, 0, sp, cr5, cr15, {5} │ │ + mrc2 15, 0, sp, cr2, cr1, {2} │ │ + cdp2 15, 1, cr13, cr5, cr5, {5} │ │ + cdp2 14, 1, cr13, cr5, cr2, {5} │ │ + cdp2 14, 1, cr13, cr5, cr12, {7} │ │ mrc2 9, 0, r0, cr5, cr15, {7} @ │ │ movs r0, r0 │ │ - cmp sp, pc │ │ - mrc2 6, 0, r4, cr4, cr9, {3} │ │ + mov r2, r5 │ │ + cdp2 6, 1, cr4, cr4, cr6, {5} │ │ mrc2 14, 0, r4, cr4, cr14, {3} │ │ mrc2 14, 0, r9, cr6, cr6, {2} │ │ lsls r4, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #128] @ (20edb0c ) │ │ @@ -169144,20 +169144,20 @@ │ │ mov r0, r8 │ │ blx 2702880 │ │ mov r0, r9 │ │ cmp.w r9, #16 │ │ bls.w 20edbfc │ │ b.n 20edcda │ │ vhadd.u8 q8, q6, q11 │ │ - ldr r2, [pc, #368] @ (20edf1c ) │ │ + ldr r2, [pc, #548] @ (20edfd0 ) │ │ cdp2 12, 1, cr4, cr3, cr6, {5} │ │ - @ instruction: 0xfe16cb67 │ │ + mrc2 11, 0, ip, cr6, cr4, {4} @ │ │ mrc2 7, 0, r1, cr2, cr15, {7} │ │ mrc2 12, 0, r4, cr6, cr12, {1} │ │ - mrc2 2, 0, r4, cr6, cr0, {6} │ │ + mrc2 2, 0, r4, cr6, cr13, {7} │ │ mrc2 3, 0, r8, cr4, cr14, {1} │ │ mrc2 5, 0, fp, cr6, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #32 │ │ mov r8, r0 │ │ ldr r0, [pc, #536] @ (20edfec ) │ │ @@ -169376,16 +169376,16 @@ │ │ addeq sp, #32 │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldc2 0, cr0, [r4], {102} @ 0x66 │ │ str r7, [sp, #920] @ 0x398 │ │ lsls r4, r4, #1 │ │ - ldrb r0, [r6, #7] │ │ - cdp2 7, 1, cr6, cr5, cr6, {4} │ │ + ldrb r5, [r3, #8] │ │ + mrc2 7, 0, r6, cr5, cr3, {5} │ │ mrc2 15, 0, r7, cr3, cr4, {7} │ │ cdp2 5, 1, cr9, cr6, cr6, {7} │ │ lsls r4, r4, #1 │ │ cmp r0, #16 │ │ itt hi │ │ movhi.w r0, #4294967295 @ 0xffffffff │ │ bxhi lr │ │ @@ -169829,16 +169829,16 @@ │ │ addeq.w sp, sp, #1552 @ 0x610 │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ str r1, [sp, #720] @ 0x2d0 │ │ lsls r4, r4, #1 │ │ - stmia r1!, {r2, r5, r6, r7} │ │ - cdp2 3, 1, cr8, cr3, cr6, {4} │ │ + stmia r2!, {r0, r4} │ │ + mrc2 3, 0, r8, cr3, cr3, {5} │ │ cdp2 1, 1, cr9, cr2, cr4, {2} │ │ lsls r4, r4, #1 │ │ cmp r2, #0 │ │ itt ne │ │ ldrne r0, [r2, #0] │ │ cmpne r0, #0 │ │ bne.n 20ee4e8 │ │ @@ -169862,16 +169862,16 @@ │ │ movs r0, #1 │ │ strd r0, r0, [r4, #512] @ 0x200 │ │ movs r0, #0 │ │ pop {r4, r6, r7, pc} │ │ mvn.w r0, #203 @ 0xcb │ │ bx lr │ │ nop │ │ - strh r0, [r5, #24] │ │ - mrc2 1, 0, ip, cr2, cr0, {2} │ │ + strh r5, [r2, #26] │ │ + mrc2 1, 0, ip, cr2, cr13, {3} │ │ mrc2 5, 0, fp, cr3, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ vmov.i32 q8, #0 @ 0x00000000 │ │ addw sl, r0, #2904 @ 0xb58 │ │ mov r9, r0 │ │ @@ -173667,15 +173667,15 @@ │ │ bne.n 20f0c50 │ │ movs r4, #0 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ movs r1, #0 │ │ mov r0, r8 │ │ b.n 20f0c4a │ │ nop │ │ - ldr r1, [sp, #940] @ 0x3ac │ │ + ldr r2, [sp, #96] @ 0x60 │ │ cdp2 5, 1, cr11, cr3, cr0, {4} │ │ mov r7, sp │ │ ldrd ip, lr, [r7, #8] │ │ strd ip, lr, [r7, #8] │ │ ldmia.w sp!, {r7, lr} │ │ b.w 26feaac │ │ mov ip, r0 │ │ @@ -173772,15 +173772,15 @@ │ │ cbz r2, 20f0d86 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ bx r2 │ │ mvn.w r2, #28 │ │ mov r0, r2 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - ldr r0, [sp, #772] @ 0x304 │ │ + ldr r0, [sp, #952] @ 0x3b8 │ │ cdp2 5, 1, cr11, cr3, cr0, {4} │ │ mov r7, sp │ │ add.w r2, r0, #96 @ 0x60 │ │ dmb ish │ │ ldrex r3, [r2] │ │ strex r3, r1, [r2] │ │ cmp r3, #0 │ │ @@ -173817,15 +173817,15 @@ │ │ moveq r0, #0 │ │ ldr r2, [pc, #12] @ (20f0e04 ) │ │ add r2, pc │ │ blx 27028c0 │ │ movs r0, #0 │ │ pop {r7, pc} │ │ nop │ │ - ldr r0, [sp, #180] @ 0xb4 │ │ + ldr r0, [sp, #360] @ 0x168 │ │ mrc2 5, 0, fp, cr3, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ mov r4, r0 │ │ blx 26ffe30 │ │ asrs r1, r0, #31 │ │ movw r8, #32768 @ 0x8000 │ │ @@ -178030,19 +178030,19 @@ │ │ b.n 20f3f1a │ │ addw r6, r6, #610 @ 0x262 │ │ cmp r0, #0 │ │ mov r1, r4 │ │ it ne │ │ addne r6, r0 │ │ b.n 20f3f12 │ │ - ldmia r6, {r0, r1, r4, r5, r6} │ │ - mrc2 0, 0, r9, cr3, cr7, {7} │ │ - mrc2 0, 0, r2, cr3, cr10, {5} │ │ - mrc2 12, 0, lr, cr5, cr6, {5} │ │ - mrc2 2, 0, r0, cr2, cr8, {7} │ │ + ldmia r6!, {r5, r7} │ │ + cdp2 1, 1, cr9, cr3, cr4, {1} │ │ + cdp2 0, 1, cr2, cr3, cr7, {7} │ │ + cdp2 12, 1, cr14, cr5, cr3, {7} │ │ + cdp2 3, 1, cr0, cr2, cr5, {1} │ │ cdp2 1, 1, cr15, cr5, cr6, {0} │ │ lsls r0, r5, #8 │ │ movs r0, #4 │ │ adds r6, r0, r2 │ │ cmp r1, #0 │ │ beq.n 20f3bb2 │ │ mov.w r9, #0 │ │ @@ -178796,16 +178796,16 @@ │ │ bgt.n 20f4260 │ │ cmp r2, #1 │ │ beq.n 20f4308 │ │ cmp r2, #64 @ 0x40 │ │ beq.n 20f426c │ │ b.n 20f423a │ │ nop │ │ - stmia r7!, {r0, r1, r2, r4, r6, r7} │ │ - mrc2 3, 0, r6, cr2, cr7, {3} │ │ + ldmia r0!, {r2} │ │ + cdp2 3, 1, cr6, cr2, cr4, {5} │ │ mrc2 5, 0, pc, cr4, cr2, {5} │ │ ldrb r0, [r0, #30] │ │ beq.w 20f4388 │ │ cmp r2, #128 @ 0x80 │ │ bne.n 20f423a │ │ ldr.w r0, [sl, #12] │ │ cmp r0, #0 │ │ @@ -178898,23 +178898,23 @@ │ │ mov r2, r9 │ │ blx r6 │ │ b.n 20f44f4 │ │ lsls r4, r0 │ │ lsls r4, r4, #1 │ │ eors r6, r5 │ │ lsls r4, r4, #1 │ │ - svc 35 @ 0x23 │ │ - vfmsl.f16 q4, d4, d0[2] │ │ - vfmsl.f16 d1, s7, s2[0] │ │ - mrc2 10, 0, r4, cr5, cr15, {5} @ │ │ - @ instruction: 0xfe12fbe7 │ │ - cdp2 1, 1, cr0, cr4, cr15, {4} │ │ - cdp2 1, 1, cr10, cr2, cr14, {7} │ │ - cdp2 5, 1, cr6, cr3, cr0, {6} │ │ - mrc2 4, 0, ip, cr3, cr4, {4} │ │ + svc 80 @ 0x50 │ │ + vfmsl.f16 d8, s9, s10[1] │ │ + vfmsl.f16 d1, s7, s13[1] │ │ + @ instruction: 0xfe154aec │ │ + mrc2 12, 0, pc, cr2, cr4, {0} │ │ + mrc2 1, 0, r0, cr4, cr12, {5} │ │ + mrc2 2, 0, sl, cr2, cr11, {0} │ │ + cdp2 5, 1, cr6, cr3, cr13, {7} │ │ + cdp2 4, 1, cr12, cr3, cr1, {6} │ │ vfmsl.f16 d9, s6, s4[0] │ │ cmp r0, #0 │ │ beq.w 20f44c4 │ │ strd r9, r4, [sp, #44] @ 0x2c │ │ movs r2, #4 │ │ ldr.w r0, [r8] │ │ ldr.w r3, [fp] │ │ @@ -179061,18 +179061,18 @@ │ │ blx r3 │ │ b.n 20f4526 │ │ movs r0, #1 │ │ ldr r4, [sp, #48] @ 0x30 │ │ add r6, r0 │ │ b.n 20f423a │ │ nop │ │ - stmia r5!, {r0, r3, r5, r6} │ │ - mrc2 14, 0, sp, cr2, cr9, {4} │ │ - cdp2 4, 1, cr0, cr3, cr12, {6} │ │ - cdp2 4, 1, cr0, cr3, cr11, {6} │ │ + stmia r5!, {r1, r2, r4, r7} │ │ + cdp2 14, 1, cr13, cr2, cr6, {6} │ │ + mrc2 4, 0, r0, cr3, cr9, {7} │ │ + mrc2 4, 0, r0, cr3, cr8, {7} │ │ cdp2 14, 1, cr13, cr3, cr11, {3} │ │ cdp2 5, 1, cr11, cr1, cr0, {4} │ │ mov r7, sp │ │ subs r2, #1 │ │ clz r2, r2 │ │ lsrs r2, r2, #5 │ │ blx 2703080 │ │ @@ -193458,15 +193458,15 @@ │ │ bl 20a6aa4 ::loadExtras(celestia::util::array_view)@@Base+0x320> │ │ mov r0, sl │ │ bl 20ff0d6 │ │ blx 26ffaf0 │ │ nop │ │ ldrh r6, [r1, #20] │ │ lsls r3, r4, #1 │ │ - adds r4, #196 @ 0xc4 │ │ + adds r4, #241 @ 0xf1 │ │ @ instruction: 0xfe1389e8 │ │ lsls r3, r4, #1 │ │ ldrh r4, [r1, #2] │ │ lsls r3, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -193726,19 +193726,19 @@ │ │ add r0, sp, #540 @ 0x21c │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ strh r0, [r4, #62] @ 0x3e │ │ lsls r3, r4, #1 │ │ strh r2, [r5, #52] @ 0x34 │ │ lsls r3, r4, #1 │ │ - bl 2350ca8 │ │ - ldrb r4, [r3, #0] │ │ - mrc2 6, 0, fp, cr1, cr13, {3} │ │ - cdp2 2, 1, cr15, cr2, cr9, {2} │ │ - mrc2 6, 0, fp, cr2, cr13, {2} │ │ + bl 237dca8 │ │ + ldrb r1, [r1, #1] │ │ + cdp2 6, 1, cr11, cr1, cr10, {5} │ │ + mrc2 2, 0, pc, cr2, cr6, {3} │ │ + cdp2 6, 1, cr11, cr2, cr10, {4} │ │ cdp2 7, 1, cr8, cr2, cr6, {7} │ │ lsls r3, r4, #1 │ │ strh r0, [r7, #58] @ 0x3a │ │ lsls r3, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r4, [r0, #4] │ │ @@ -193945,15 +193945,15 @@ │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ bmi.n 20ff27a >::__emplace_back_slow_path<>()@@Base+0xd4> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (20ff2dc >::__emplace_back_slow_path<>()@@Base+0x136>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - lsrs r7, r6, #14 │ │ + lsrs r4, r4, #15 │ │ Address 0x20ff2de is out of bounds. │ │ │ │ │ │ 020ff2e0 : │ │ push {r7, lr} │ │ mov r7, sp │ │ ldrb.w ip, [r1] │ │ @@ -194468,15 +194468,15 @@ │ │ adds r3, #255 @ 0xff │ │ adds r3, #51 @ 0x33 │ │ rors r3, r1 │ │ ldmia r4!, {r0, r2, r3, r6, r7} │ │ asrs r4, r2 │ │ ldrb r0, [r3, #28] │ │ lsls r3, r4, #1 │ │ - ldrh r5, [r7, #20] │ │ + ldrh r2, [r5, #22] │ │ cdp2 13, 1, cr7, cr3, cr8, {7} │ │ lsls r3, r4, #1 │ │ │ │ 020ff814 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -194643,17 +194643,17 @@ │ │ cmp.w r8, #3 │ │ mov r9, r4 │ │ mov r8, r0 │ │ bcc.w 20ff886 │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - add r2, sp, #348 @ 0x15c │ │ - vselvs.f16 s20, s7, s18 │ │ - vselvs.f16 s20, s6, s11 │ │ + add r2, sp, #528 @ 0x210 │ │ + mrc2 9, 0, sl, cr3, cr6, {5} @ │ │ + mrc2 9, 0, sl, cr3, cr2, {2} @ │ │ Address 0x20ffa0a is out of bounds. │ │ │ │ │ │ 020ffa0c : │ │ ldr r2, [r0, #0] │ │ orrs r1, r2 │ │ str r1, [r0, #0] │ │ @@ -195040,20 +195040,20 @@ │ │ b.n 20ffe38 │ │ ldrb r4, [r6, #5] │ │ lsls r3, r4, #1 │ │ ldrb r2, [r6, #5] │ │ lsls r3, r4, #1 │ │ ldrb r6, [r0, #4] │ │ lsls r3, r4, #1 │ │ - ldr r0, [sp, #592] @ 0x250 │ │ - cdp2 4, 1, cr14, cr4, cr9, {6} │ │ - mrc2 15, 0, r1, cr2, cr6, {7} │ │ + ldr r0, [sp, #772] @ 0x304 │ │ + mrc2 4, 0, lr, cr4, cr6, {7} │ │ + cdp2 0, 1, cr2, cr2, cr3, {1} │ │ mrc2 10, 0, sp, cr4, cr10, {2} @ │ │ - cdp2 14, 1, cr3, cr4, cr8, {4} │ │ - mrc2 2, 0, r2, cr3, cr8, {6} │ │ + mrc2 14, 0, r3, cr4, cr5, {5} │ │ + cdp2 3, 1, cr2, cr3, cr5, {0} │ │ @ instruction: 0xfe1349eb │ │ add r1, pc │ │ movs r2, #9 │ │ bl 2094b84 ::InfoType* std::__ndk1::vector::InfoType, std::__ndk1::allocator::InfoType> >::__emplace_back_slow_path(WarpMeshInfo const&)@@Base+0x24c> │ │ ldr r0, [r5, #0] │ │ cbz r0, 20ffe98 │ │ movs r0, #47 @ 0x2f │ │ @@ -195384,27 +195384,27 @@ │ │ ldrne.w r0, [sl, #184] @ 0xb8 │ │ blxne 26ffad0 │ │ mov r0, sl │ │ blx 27036f0 │ │ blx 26ffaf0 │ │ ldrb r2, [r7, #3] │ │ lsls r3, r4, #1 │ │ - ldrh r1, [r6, r2] │ │ - mrc2 1, 0, ip, cr4, cr11, {6} │ │ - cdp2 1, 1, cr12, cr3, cr13, {5} │ │ - mrc2 9, 0, sl, cr3, cr10, {0} @ │ │ - vselvs.f16 s20, s2, s28 │ │ - vfmsl.f16 , d17, d0[2] │ │ - cdp2 13, 1, cr7, cr4, cr12, {5} │ │ - mrc2 10, 0, r8, cr4, cr8, {6} @ │ │ - @ instruction: 0xfe118ac0 │ │ - cdp2 4, 1, cr0, cr1, cr1, {7} │ │ - mrc2 4, 0, r0, cr3, cr1, {5} │ │ - mrc2 6, 0, r0, cr3, cr4, {5} │ │ - mrc2 7, 0, r8, cr2, cr8, {3} │ │ + ldrh r6, [r3, r3] │ │ + cdp2 2, 1, cr12, cr4, cr8, {0} │ │ + mrc2 1, 0, ip, cr3, cr10, {6} │ │ + @ instruction: 0xfe13a947 │ │ + mrc2 9, 0, sl, cr1, cr11, {1} @ │ │ + mrc2 9, 0, r5, cr1, cr13, {0} @ │ │ + mrc2 13, 0, r7, cr4, cr9, {6} │ │ + vselvs.f64 d8, d4, d5 │ │ + @ instruction: 0xfe118aed │ │ + cdp2 5, 1, cr0, cr1, cr14, {0} │ │ + mrc2 4, 0, r0, cr3, cr14, {6} │ │ + cdp2 6, 1, cr0, cr3, cr1, {7} │ │ + cdp2 7, 1, cr8, cr2, cr5, {5} │ │ cdp2 4, 1, cr7, cr2, cr6, {4} │ │ lsls r3, r4, #1 │ │ │ │ 0210021c , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator > >(std::__ndk1::basic_ostream >&, fmt::v11::basic_format_string, std::__ndk1::allocator > >::type, fmt::v11::type_identity, std::__ndk1::allocator > >::type, fmt::v11::type_identity, std::__ndk1::allocator > >::type>, std::__ndk1::basic_string, std::__ndk1::allocator >&&, std::__ndk1::basic_string, std::__ndk1::allocator >&&, std::__ndk1::basic_string, std::__ndk1::allocator >&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -196585,15 +196585,15 @@ │ │ lsls r3, r4, #1 │ │ ldr r0, [r4, #32] │ │ lsls r3, r4, #1 │ │ ldr r4, [r6, #16] │ │ lsls r3, r4, #1 │ │ ldr r2, [r0, #28] │ │ lsls r3, r4, #1 │ │ - cbnz r5, 2100e86 >)@@Base+0x5e> │ │ + cbnz r2, 2100e92 >)@@Base+0x6a> │ │ cdp2 7, 1, cr6, cr2, cr6, {7} │ │ lsls r3, r4, #1 │ │ │ │ 02100e28 >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -196815,16 +196815,16 @@ │ │ beq.n 2101060 >)@@Base+0x238> │ │ ldr r0, [sp, #20] │ │ ldr r0, [r0, #8] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ str r2, [r0, #120] @ 0x78 │ │ lsls r3, r4, #1 │ │ - bcs.n 2101112 (std::__ndk1::basic_ostream >&, fmt::v11::basic_format_string::type>, unsigned char&)@@Base+0x9e> │ │ - cdp2 2, 1, cr3, cr2, cr2, {6} │ │ + bcs.n 2100f6c >)@@Base+0x144> │ │ + cdp2 2, 1, cr3, cr2, cr15, {7} │ │ mrc2 5, 0, r6, cr1, cr0, {4} │ │ lsls r3, r4, #1 │ │ │ │ 02101074 (std::__ndk1::basic_ostream >&, fmt::v11::basic_format_string::type>, unsigned char&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -197241,27 +197241,27 @@ │ │ mov r0, r4 │ │ movs r1, #0 │ │ mov r2, r5 │ │ blx 26ffdf0 │ │ mov.w r8, #0 │ │ b.n 2101cb8 >)@@Base+0xb88> │ │ nop │ │ - strh r6, [r5, #38] @ 0x26 │ │ - cdp2 14, 1, cr14, cr4, cr6, {0} │ │ - mrc2 4, 0, r9, cr3, cr8, {2} │ │ - mrc2 15, 0, ip, cr2, cr13, {6} │ │ + strh r3, [r3, #40] @ 0x28 │ │ + mrc2 14, 0, lr, cr4, cr3, {1} │ │ + cdp2 4, 1, cr9, cr3, cr5, {4} │ │ + cdp2 0, 1, cr13, cr2, cr10, {0} │ │ vcmla.f16 d14, d18, d10[0], #90 │ │ lsls r1, r4, #1 │ │ - lsrs r2, r1, #11 │ │ - mrc2 13, 0, r0, cr4, cr4, {5} │ │ - @ instruction: 0xfe13294e │ │ - mrc2 5, 0, r4, cr3, cr7, {4} │ │ - cdp2 5, 1, cr10, cr4, cr0, {4} │ │ - cdp2 12, 1, cr10, cr4, cr13, {5} │ │ - mrc2 4, 0, sl, cr3, cr6, {3} │ │ + lsrs r7, r6, #11 │ │ + cdp2 13, 1, cr0, cr4, cr1, {7} │ │ + mrc2 9, 0, r2, cr3, cr11, {3} @ │ │ + cdp2 5, 1, cr4, cr3, cr4, {6} │ │ + cdp2 5, 1, cr10, cr4, cr13, {5} │ │ + mrc2 12, 0, sl, cr4, cr10, {6} │ │ + cdp2 4, 1, cr10, cr3, cr3, {5} │ │ vselvs.f64 d14, d4, d4 │ │ lsrs r0, r0, #4 │ │ sub.w r6, fp, r0 │ │ cmp fp, r0 │ │ bls.n 2101516 >)@@Base+0x3e6> │ │ mov r0, r9 │ │ movs r1, #47 @ 0x2f │ │ @@ -198179,35 +198179,35 @@ │ │ bl 2102dcc (std::__ndk1::basic_string_view >, unsigned long long&)@@Base+0x238> │ │ add r0, sp, #136 @ 0x88 │ │ blx 27037a0 │ │ add r0, sp, #176 @ 0xb0 │ │ blx 27036f0 │ │ blx 26ffaf0 │ │ nop │ │ - subs r5, #247 @ 0xf7 │ │ + subs r6, #36 @ 0x24 │ │ cdp2 15, 1, cr11, cr4, cr0, {0} │ │ nop │ │ nop │ │ nop │ │ ... │ │ movs r0, r0 │ │ subs r7, #128 @ 0x80 │ │ str r4, [r5, #68] @ 0x44 │ │ lsls r3, r4, #1 │ │ str r0, [r6, #52] @ 0x34 │ │ lsls r3, r4, #1 │ │ - stmia r4!, {r0, r5, r7} │ │ - mrc2 4, 0, ip, cr2, cr9, {4} │ │ - mrc2 4, 0, ip, cr2, cr1, {4} │ │ - mrc2 10, 0, r7, cr2, cr10, {7} @ │ │ - mrc2 4, 0, ip, cr4, cr7, {5} │ │ - mrc2 10, 0, r7, cr2, cr6, {4} @ │ │ - mrc2 12, 0, r3, cr4, cr2, {4} │ │ - mrc2 9, 0, r0, cr4, cr9, {7} @ │ │ - cdp2 4, 1, cr12, cr2, cr15, {5} │ │ + stmia r4!, {r1, r2, r3, r6, r7} │ │ + cdp2 4, 1, cr12, cr2, cr6, {6} │ │ + mrc2 4, 0, ip, cr2, cr14, {5} │ │ + vselvs.f64 d7, d2, d23 │ │ + cdp2 4, 1, cr12, cr4, cr4, {7} │ │ + @ instruction: 0xfe127ac3 │ │ + mrc2 12, 0, r3, cr4, cr15, {5} │ │ + vselvs.f32 s0, s8, s13 │ │ + mrc2 4, 0, ip, cr2, cr12, {6} │ │ Address 0x2101eba is out of bounds. │ │ │ │ │ │ 02101ebc (char const*) const@@Base>: │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #32 │ │ @@ -198588,21 +198588,21 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #48] @ 0x30 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ strb r6, [r4, r3] │ │ lsls r3, r4, #1 │ │ - strh r4, [r4, #62] @ 0x3e │ │ - mrc2 7, 0, r8, cr1, cr4, {4} │ │ - cdp2 7, 1, cr8, cr1, cr3, {2} │ │ - cdp2 7, 1, cr8, cr1, cr5, {0} │ │ + ldrh r1, [r2, #0] │ │ + cdp2 7, 1, cr8, cr1, cr1, {6} │ │ + mrc2 7, 0, r8, cr1, cr0, {3} │ │ + mrc2 7, 0, r8, cr1, cr2, {1} │ │ mrc2 4, 0, r5, cr1, cr4, {1} │ │ lsls r3, r4, #1 │ │ - stc2l 14, cr15, [r6, #-76] @ 0xffffffb4 │ │ + ldc2l 14, cr15, [r3, #-76]! @ 0xffffffb4 │ │ strh r2, [r0, r6] │ │ lsls r3, r4, #1 │ │ │ │ 02102290 >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less > >, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > > const&, std::__ndk1::basic_string_view >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -199029,26 +199029,26 @@ │ │ cmp r4, #2 │ │ it hi │ │ movhi r9, r6 │ │ ldr r0, [pc, #52] @ (21026d0 >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less > >, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > > const&, std::__ndk1::basic_string_view >)@@Base+0x440>) │ │ add r0, pc │ │ str r0, [sp, #24] │ │ b.n 21026f4 >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less > >, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > > const&, std::__ndk1::basic_string_view >)@@Base+0x464> │ │ - stc2 14, cr15, [r0, #72]! @ 0x48 │ │ - stc2l 14, cr15, [r2, #-72] @ 0xffffffb8 │ │ - adds r5, #33 @ 0x21 │ │ - cdp2 4, 1, cr3, cr4, cr9, {6} │ │ - mrc2 4, 0, r9, cr4, cr13, {6} │ │ - cdp2 4, 1, cr9, cr4, cr11, {4} │ │ - @ instruction: 0xfe149bef │ │ - mrc2 11, 0, r9, cr3, cr11, {4} @ │ │ - mrc2 13, 0, fp, cr3, cr2, {6} │ │ - mrc2 13, 0, fp, cr1, cr12, {3} │ │ - mrc2 2, 0, r6, cr1, cr2, {0} │ │ - cdp2 1, 1, cr6, cr2, cr0, {6} │ │ + stc2l 14, cr15, [sp, #72] @ 0x48 │ │ + stc2l 14, cr15, [pc, #-72]! @ 2102660 >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less > >, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > > const&, std::__ndk1::basic_string_view >)@@Base+0x3d0> │ │ + adds r5, #78 @ 0x4e │ │ + mrc2 4, 0, r3, cr4, cr6, {7} │ │ + cdp2 5, 1, cr9, cr4, cr10, {0} │ │ + mrc2 4, 0, r9, cr4, cr8, {5} │ │ + mrc2 12, 0, r9, cr4, cr12, {0} │ │ + @ instruction: 0xfe139bc8 │ │ + mrc2 13, 0, fp, cr3, cr15, {7} │ │ + cdp2 13, 1, cr11, cr1, cr9, {5} │ │ + mrc2 2, 0, r6, cr1, cr15, {1} │ │ + cdp2 1, 1, cr6, cr2, cr13, {7} │ │ cdp2 14, 1, cr12, cr2, cr2, {2} │ │ cdp2 0, 1, cr15, cr4, cr15, {2} │ │ adds r0, #255 @ 0xff │ │ cmp r4, #1 │ │ it hi │ │ movhi r0, #1 │ │ cmp r0, #0 │ │ @@ -199450,24 +199450,24 @@ │ │ itt ne │ │ ldrne r0, [sp, #108] @ 0x6c │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ strh r0, [r3, r4] │ │ lsls r3, r4, #1 │ │ - ldrb r7, [r1, #17] │ │ - mrc2 10, 0, r9, cr3, cr11, {5} @ │ │ + ldrb r4, [r7, #17] │ │ + @ instruction: 0xfe139ae8 │ │ cdp2 12, 1, cr12, cr1, cr13, {3} │ │ @ instruction: 0xfe14f960 │ │ - mrc2 15, 0, r7, cr0, cr9, {6} │ │ - cdp2 1, 1, cr6, cr1, cr10, {7} │ │ - mrc2 5, 0, pc, cr1, cr12, {5} │ │ - cdp2 15, 1, cr7, cr3, cr8, {0} │ │ - mrc2 14, 0, r9, cr1, cr11, {2} │ │ - mrc2 12, 0, r7, cr2, cr15, {0} │ │ + cdp2 0, 1, cr8, cr0, cr6, {0} │ │ + mrc2 2, 0, r6, cr1, cr7, {0} │ │ + cdp2 5, 1, cr15, cr1, cr9, {7} │ │ + mrc2 15, 0, r7, cr3, cr5, {1} │ │ + cdp2 14, 1, cr9, cr1, cr8, {4} │ │ + cdp2 12, 1, cr7, cr2, cr12, {2} │ │ cdp2 13, 1, cr4, cr2, cr6, {6} │ │ lsls r3, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ mov r8, r0 │ │ ldr.w r0, [r8, #4]! │ │ @@ -200395,15 +200395,15 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ sbcs r2, r1 │ │ lsls r3, r4, #1 │ │ - ldr r1, [pc, #44] @ (2103524 ) │ │ + ldr r1, [pc, #224] @ (21035d8 ) │ │ cdp2 0, 1, cr4, cr4, cr12, {7} │ │ lsls r3, r4, #1 │ │ │ │ 021034fc : │ │ ldr r0, [r0, #36] @ 0x24 │ │ bx lr │ │ │ │ @@ -202744,15 +202744,15 @@ │ │ movs r7, #82 @ 0x52 │ │ ldr r1, [sp, #640] @ 0x280 │ │ ands r6, r7 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ eors r6, r1 │ │ - adds r3, #17 │ │ + adds r3, #62 @ 0x3e │ │ Address 0x2104ffa is out of bounds. │ │ │ │ │ │ 02104ffc : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -202860,20 +202860,20 @@ │ │ ittt eq │ │ addeq sp, #80 @ 0x50 │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ movs r5, #176 @ 0xb0 │ │ lsls r3, r4, #1 │ │ - add r7, sp, #708 @ 0x2c4 │ │ + add r7, sp, #888 @ 0x378 │ │ cdp2 6, 1, cr2, cr3, cr4, {0} │ │ lsls r3, r4, #1 │ │ - asrs r2, r4, #22 │ │ - cdp2 5, 1, cr1, cr2, cr0, {4} │ │ - cdp2 7, 1, cr5, cr2, cr0, {7} │ │ + asrs r7, r1, #23 │ │ + cdp2 5, 1, cr1, cr2, cr13, {5} │ │ + vcmla.f16 d5, d2, d13[0], #90 │ │ cdp2 4, 1, cr2, cr1, cr10, {5} │ │ lsls r3, r4, #1 │ │ bmi.n 21050f0 │ │ bmi.n 21050f2 │ │ │ │ 02105148 : │ │ push {r4, r5, r7, lr} │ │ @@ -203190,18 +203190,18 @@ │ │ b.n 21053e4 , std::__ndk1::allocator > const&, celestia::astro::Date&)@@Base+0xdc> │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ eors r6, r1 │ │ movs r2, #162 @ 0xa2 │ │ lsls r3, r4, #1 │ │ - lsls r7, r1, #23 │ │ - cdp2 2, 1, cr4, cr4, cr15, {6} │ │ - vfmsl.f16 q7, d20, d0[2] │ │ - mrc2 5, 0, r0, cr3, cr6, {3} │ │ + lsls r4, r7, #23 │ │ + mrc2 2, 0, r4, cr4, cr12, {7} │ │ + mrc2 9, 0, lr, cr4, cr13, {0} @ │ │ + cdp2 5, 1, cr0, cr3, cr3, {5} │ │ mrc2 1, 0, r2, cr4, cr4, {6} │ │ lsls r3, r4, #1 │ │ │ │ 021054b8 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ @@ -204311,15 +204311,15 @@ │ │ cmp r1, ip │ │ beq.n 21060c8 (char const*, char const*, fmt::v11::format_specs&)@@Base+0xcc> │ │ b.n 21060b2 (char const*, char const*, fmt::v11::format_specs&)@@Base+0xb6> │ │ ldr r0, [pc, #8] @ (2106114 (char const*, char const*, fmt::v11::format_specs&)@@Base+0x118>) │ │ add r0, pc │ │ bl 221a310 │ │ nop │ │ - lsls r7, r2, #19 │ │ + lsls r4, r0, #20 │ │ Address 0x2106116 is out of bounds. │ │ │ │ │ │ 02106118 (char const*, char const*, fmt::v11::detail::tm_format_checker&&)@@Base>: │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ cmp r0, r1 │ │ @@ -204613,26 +204613,26 @@ │ │ b.n 21063b2 (char const*, char const*, fmt::v11::detail::tm_format_checker&&)@@Base+0x29a> │ │ b.n 21063b2 (char const*, char const*, fmt::v11::detail::tm_format_checker&&)@@Base+0x29a> │ │ b.n 21063b2 (char const*, char const*, fmt::v11::detail::tm_format_checker&&)@@Base+0x29a> │ │ b.n 21063b2 (char const*, char const*, fmt::v11::detail::tm_format_checker&&)@@Base+0x29a> │ │ mov r0, r4 │ │ blx 26ffbb0 │ │ blx 26ffaf0 │ │ - ldrsh r4, [r6, r2] │ │ + ldrsh r1, [r4, r3] │ │ mrc2 3, 0, r1, cr1, cr6, {1} │ │ lsls r3, r4, #1 │ │ asrs r0, r7, #12 │ │ lsls r3, r4, #1 │ │ - ldrsh r0, [r5, r3] │ │ - mrc2 14, 0, r5, cr1, cr6, {6} │ │ - mrc2 14, 0, r5, cr1, cr8, {3} │ │ - mrc2 14, 0, r5, cr1, cr14, {7} │ │ - cdp2 14, 1, cr5, cr1, cr10, {4} │ │ - cdp2 14, 1, cr5, cr1, cr6, {3} │ │ - mrc2 14, 0, r5, cr1, cr12, {4} │ │ + ldrsh r5, [r2, r4] │ │ + cdp2 15, 1, cr5, cr1, cr3, {0} │ │ + cdp2 14, 1, cr5, cr1, cr5, {5} │ │ + cdp2 15, 1, cr5, cr1, cr11, {1} │ │ + mrc2 14, 0, r5, cr1, cr7, {5} │ │ + mrc2 14, 0, r5, cr1, cr3, {4} │ │ + cdp2 14, 1, cr5, cr1, cr9, {6} │ │ Address 0x21063e2 is out of bounds. │ │ │ │ │ │ 021063e4 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ movs r0, #8 │ │ @@ -204648,15 +204648,15 @@ │ │ ldr r1, [r0, #0] │ │ mov r0, r4 │ │ ldr r2, [r2, #0] │ │ blx 26ffba0 │ │ mov r0, r4 │ │ blx 26ffbb0 │ │ blx 26ffaf0 │ │ - str r4, [r5, #72] @ 0x48 │ │ + str r1, [r3, #76] @ 0x4c │ │ mrc2 2, 0, r1, cr2, cr0, {3} │ │ lsls r3, r4, #1 │ │ asrs r2, r6, #9 │ │ lsls r3, r4, #1 │ │ │ │ 02106420 ::do_format > >(tm const&, fmt::v11::context&, std::__ndk1::chrono::duration > const*) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -205647,18 +205647,18 @@ │ │ b.n 2106ee6 > >, char, std::__ndk1::chrono::duration > >&>(char const*, char const*, fmt::v11::detail::tm_writer > >, char, std::__ndk1::chrono::duration > >&)@@Base+0x92e> │ │ mov r0, r4 │ │ movs r1, #98 @ 0x62 │ │ b.n 2106eb6 > >, char, std::__ndk1::chrono::duration > >&>(char const*, char const*, fmt::v11::detail::tm_writer > >, char, std::__ndk1::chrono::duration > >&)@@Base+0x8fe> │ │ ldr r4, [pc, #12] @ (2106d74 > >, char, std::__ndk1::chrono::duration > >&>(char const*, char const*, fmt::v11::detail::tm_writer > >, char, std::__ndk1::chrono::duration > >&)@@Base+0x7bc>) │ │ add r4, pc │ │ b.n 2106ece > >, char, std::__ndk1::chrono::duration > >&>(char const*, char const*, fmt::v11::detail::tm_writer > >, char, std::__ndk1::chrono::duration > >&)@@Base+0x916> │ │ - mls lr, r2, r0, pc │ │ + smuadx lr, pc, r0 │ │ lsrs r0, r5, #8 │ │ lsls r3, r4, #1 │ │ - bl 22c299c │ │ + bl 22ef99c │ │ mov.w r1, r9, asr #31 │ │ strd r0, r1, [sp, #16] │ │ movw r0, #1900 @ 0x76c │ │ adds.w r5, r9, r0 │ │ str r5, [sp, #12] │ │ adc.w r4, r1, #0 │ │ str r4, [sp, #8] │ │ @@ -205994,29 +205994,29 @@ │ │ b.n 21070e2 > >, char, std::__ndk1::chrono::duration > >&>(char const*, char const*, fmt::v11::detail::tm_writer > >, char, std::__ndk1::chrono::duration > >&)@@Base+0xb2a> │ │ b.n 21070e2 > >, char, std::__ndk1::chrono::duration > >&>(char const*, char const*, fmt::v11::detail::tm_writer > >, char, std::__ndk1::chrono::duration > >&)@@Base+0xb2a> │ │ mov r0, r4 │ │ blx 26ffbb0 │ │ blx 26ffaf0 │ │ lsrs r2, r6, #31 │ │ lsls r3, r4, #1 │ │ - str r0, [r2, r6] │ │ + str r5, [r7, r6] │ │ mrc2 6, 0, r0, cr1, cr2, {0} │ │ lsls r3, r4, #1 │ │ lsls r4, r2, #24 │ │ lsls r3, r4, #1 │ │ - str r4, [r0, r7] │ │ - mrc2 1, 0, r5, cr1, cr2, {5} │ │ - cdp2 0, 1, cr15, cr1, cr3, {3} │ │ - mrc2 12, 0, r1, cr2, cr2, {2} │ │ - mrc2 12, 0, r1, cr1, cr8, {2} │ │ - cdp2 1, 1, cr5, cr1, cr12, {3} │ │ - cdp2 1, 1, cr5, cr1, cr8, {2} │ │ - mrc2 1, 0, r5, cr1, cr14, {3} │ │ - mrc2 1, 0, r5, cr1, cr6, {1} │ │ - mrc2 1, 0, r5, cr1, cr10, {2} │ │ + str r1, [r6, r7] │ │ + mrc2 1, 0, r5, cr1, cr15, {6} │ │ + mrc2 0, 0, pc, cr1, cr0, {4} │ │ + mrc2 12, 0, r1, cr2, cr15, {3} │ │ + cdp2 12, 1, cr1, cr1, cr5, {4} │ │ + mrc2 1, 0, r5, cr1, cr9, {4} │ │ + mrc2 1, 0, r5, cr1, cr5, {3} │ │ + cdp2 1, 1, cr5, cr1, cr11, {5} │ │ + cdp2 1, 1, cr5, cr1, cr3, {3} │ │ + cdp2 1, 1, cr5, cr1, cr7, {4} │ │ mrc2 15, 0, r0, cr1, cr10, {6} │ │ lsls r3, r4, #1 │ │ │ │ 02107128 > >, char, std::__ndk1::chrono::duration > >::on_year(fmt::v11::detail::numeric_system)@@Base>: │ │ cbz r1, 2107138 > >, char, std::__ndk1::chrono::duration > >::on_year(fmt::v11::detail::numeric_system)@@Base+0x10> │ │ ldrb r1, [r0, #4] │ │ cmp r1, #0 │ │ @@ -206093,15 +206093,15 @@ │ │ ldr r2, [r4, #0] │ │ str r1, [r4, #4] │ │ ldrb r1, [r5, #1] │ │ strb r1, [r2, r0] │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - bl 1d83e0c │ │ + bl 1db0e0c │ │ │ │ 021071ec > >, char, std::__ndk1::chrono::duration > >::on_century(fmt::v11::detail::numeric_system)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ mov r8, r0 │ │ cbz r1, 2107210 > >, char, std::__ndk1::chrono::duration > >::on_century(fmt::v11::detail::numeric_system)@@Base+0x24> │ │ @@ -206207,15 +206207,15 @@ │ │ ldr.w r0, [r8, #8] │ │ mov r3, r1 │ │ blx 2703d60 │ │ str.w r0, [r8, #8] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - bl 2471f34 │ │ + bl 249ef34 │ │ │ │ 02107314 > >, char, std::__ndk1::chrono::duration > >::on_iso_week_based_short_year()@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ mov r8, r0 │ │ @@ -206363,15 +206363,15 @@ │ │ str r1, [r4, #4] │ │ ldrb r1, [r6, #1] │ │ strb r1, [r2, r0] │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - bl 22ac0e8 │ │ + bl 22d90e8 │ │ │ │ 021074c8 > >, char, std::__ndk1::chrono::duration > >::on_dec0_weekday(fmt::v11::detail::numeric_system)@@Base>: │ │ cbz r1, 21074d8 > >, char, std::__ndk1::chrono::duration > >::on_dec0_weekday(fmt::v11::detail::numeric_system)@@Base+0x10> │ │ ldrb r1, [r0, #4] │ │ cmp r1, #0 │ │ ittt eq │ │ moveq r1, #119 @ 0x77 │ │ @@ -206494,15 +206494,15 @@ │ │ adds r1, r0, #1 │ │ ldr r2, [r4, #0] │ │ str r1, [r4, #4] │ │ ldrb r1, [r5, #1] │ │ strb r1, [r2, r0] │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - bl 217621c │ │ + bl 21a321c │ │ │ │ 021075fc > >, char, std::__ndk1::chrono::duration > >::on_dec0_week_of_year(fmt::v11::detail::numeric_system, fmt::v11::detail::pad_type)@@Base>: │ │ cbz r1, 210760c > >, char, std::__ndk1::chrono::duration > >::on_dec0_week_of_year(fmt::v11::detail::numeric_system, fmt::v11::detail::pad_type)@@Base+0x10> │ │ ldrb r1, [r0, #4] │ │ cmp r1, #0 │ │ ittt eq │ │ moveq r1, #85 @ 0x55 │ │ @@ -206629,15 +206629,15 @@ │ │ ldr r2, [r4, #0] │ │ str r1, [r4, #4] │ │ ldrb r1, [r6, #1] │ │ strb r1, [r2, r0] │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - @ instruction: 0xef16fe10 │ │ + @ instruction: 0xef43fe10 │ │ │ │ 02107754 > >, char, std::__ndk1::chrono::duration > >::on_day_of_month(fmt::v11::detail::numeric_system, fmt::v11::detail::pad_type)@@Base>: │ │ cbz r1, 2107764 > >, char, std::__ndk1::chrono::duration > >::on_day_of_month(fmt::v11::detail::numeric_system, fmt::v11::detail::pad_type)@@Base+0x10> │ │ ldrb r1, [r0, #4] │ │ cmp r1, #0 │ │ ittt eq │ │ moveq r1, #100 @ 0x64 │ │ @@ -206852,18 +206852,18 @@ │ │ mov.w r1, r0, asr #31 │ │ adc.w r3, r1, #0 │ │ mov r0, r4 │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26fec20 │ │ nop │ │ - b.n 2107756 > >, char, std::__ndk1::chrono::duration > >::on_day_of_month(fmt::v11::detail::numeric_system, fmt::v11::detail::pad_type)@@Base+0x2> │ │ + b.n 21077b0 > >, char, std::__ndk1::chrono::duration > >::on_minute(fmt::v11::detail::numeric_system, fmt::v11::detail::pad_type)@@Base+0x6> │ │ cdp2 14, 1, cr15, cr2, cr6, {6} │ │ lsls r2, r4, #1 │ │ - b.n 21076a6 > >, char, std::__ndk1::chrono::duration > >::on_day_of_year()@@Base+0x12> │ │ + b.n 2107700 > >, char, std::__ndk1::chrono::duration > >::on_day_of_year()@@Base+0x6c> │ │ mrc2 14, 0, pc, cr2, cr12, {2} │ │ lsls r2, r4, #1 │ │ │ │ 02107950 > >, char, std::__ndk1::chrono::duration > >::on_loc_date(fmt::v11::detail::numeric_system)@@Base>: │ │ mov r2, r1 │ │ ldrb r1, [r0, #4] │ │ cmp r1, #0 │ │ @@ -207133,15 +207133,15 @@ │ │ ittt eq │ │ addeq sp, #16 │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ @ instruction: 0xface0062 │ │ - @ instruction: 0xeb00fe10 │ │ + @ instruction: 0xeb2dfe10 │ │ vld1.8 {d0[3]}, [ip], r2 │ │ │ │ 02107c34 > >, char, std::__ndk1::chrono::duration > >::on_12_hour_time()@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #16 │ │ @@ -207410,15 +207410,15 @@ │ │ adds r1, r0, #1 │ │ ldr r2, [r4, #0] │ │ str r1, [r4, #4] │ │ ldrb r1, [r6, #1] │ │ strb r1, [r2, r0] │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - @ instruction: 0xe80afe10 │ │ + @ instruction: 0xe837fe10 │ │ │ │ 02107ed8 > >, char, std::__ndk1::chrono::duration > >::on_offset_year()@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ mov r4, r0 │ │ ldrb r0, [r0, #4] │ │ @@ -207476,15 +207476,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r4 │ │ movs r1, #121 @ 0x79 │ │ movs r2, #69 @ 0x45 │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26fec14 │ │ - b.n 2107d78 > >, char, std::__ndk1::chrono::duration > >::on_12_hour_time()@@Base+0x144> │ │ + b.n 2107dd2 > >, char, std::__ndk1::chrono::duration > >::on_12_hour_time()@@Base+0x19e> │ │ Address 0x2107f76 is out of bounds. │ │ │ │ │ │ 02107f78 > >, char, std::__ndk1::chrono::duration > >::write_year(long long)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -207566,15 +207566,15 @@ │ │ strb r1, [r2, r0] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r4 │ │ ldmia.w sp!, {r8, r9, sl} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26fec44 │ │ - b.n 2107d44 > >, char, std::__ndk1::chrono::duration > >::on_12_hour_time()@@Base+0x110> │ │ + b.n 2107d9e > >, char, std::__ndk1::chrono::duration > >::on_12_hour_time()@@Base+0x16a> │ │ Address 0x2108042 is out of bounds. │ │ │ │ │ │ 02108044 > >, char, std::__ndk1::chrono::duration > >::format_localized(char, char)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -207772,15 +207772,15 @@ │ │ addeq sp, #36 @ 0x24 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ @ instruction: 0xf4ce0062 │ │ adds.w r0, r8, #14811136 @ 0xe20000 │ │ @ instruction: 0xf5280062 │ │ - b.n 2107b00 > >, char, std::__ndk1::chrono::duration > >::on_iso_date()@@Base+0x28> │ │ + b.n 2107b5a > >, char, std::__ndk1::chrono::duration > >::on_iso_date()@@Base+0x82> │ │ cdp2 3, 1, cr15, cr0, cr6, {4} │ │ lsls r2, r4, #1 │ │ │ │ 02108260 > > fmt::v11::detail::copy_noinline > > >(char*, char*, std::__ndk1::back_insert_iterator > >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -207981,15 +207981,15 @@ │ │ add r0, sp, #104 @ 0x68 │ │ blx 26ffcf0 │ │ blx 26ffaf0 │ │ subw r0, lr, #98 @ 0x62 │ │ @ instruction: 0xf3a00062 │ │ @ instruction: 0xf3a00062 │ │ @ instruction: 0xf3260062 │ │ - movs r2, #156 @ 0x9c │ │ + movs r2, #201 @ 0xc9 │ │ cdp2 2, 1, cr15, cr2, cr12, {3} │ │ lsls r2, r4, #1 │ │ @ instruction: 0xf25c0062 │ │ @ instruction: 0xf25c0062 │ │ rsbs r0, sl, #98 @ 0x62 │ │ │ │ 02108474 > > fmt::v11::detail::write_encoded_tm_str > > >(std::__ndk1::back_insert_iterator > >, fmt::v11::basic_string_view, std::__ndk1::locale const&)@@Base>: │ │ @@ -208227,15 +208227,15 @@ │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ @ instruction: 0xf22a0062 │ │ @ instruction: 0xf12c0062 │ │ @ instruction: 0xf2120062 │ │ sbcs.w r0, ip, #98 @ 0x62 │ │ - movs r0, #40 @ 0x28 │ │ + movs r0, #85 @ 0x55 │ │ mrc2 15, 0, lr, cr2, cr8, {7} │ │ lsls r2, r4, #1 │ │ vmla.i32 d16, d8, d2[1] │ │ vmla.i32 d16, d8, d2[1] │ │ vmla.i d0, d4, d2[4] │ │ │ │ 021086e4 > >::~formatbuf()@@Base>: │ │ @@ -208390,15 +208390,15 @@ │ │ ldr r2, [r2, #0] │ │ blx 26ffba0 │ │ mov r0, r4 │ │ blx 26ffbb0 │ │ blx 26ffaf0 │ │ vhadd.s8 q0, q3, q9 │ │ stcl 0, cr0, [r6, #392]! @ 0x188 │ │ - subs r0, r6, #1 │ │ + subs r5, r3, #2 │ │ mrc2 14, 0, lr, cr2, cr4, {1} │ │ lsls r2, r4, #1 │ │ cdp 0, 3, cr0, cr6, cr2, {3} │ │ stc 0, cr0, [lr, #392]! @ 0x188 │ │ │ │ 02108868 >::grow(fmt::v11::detail::buffer&, unsigned int)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -208667,15 +208667,15 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ mcrr 0, 6, r0, r2, cr2 │ │ mrrc 0, 6, r0, ip, cr2 │ │ @ instruction: 0xeb8a0062 │ │ - blt.n 2108c30 > >, char, std::__ndk1::chrono::duration > >::write2(int, fmt::v11::detail::pad_type)@@Base+0x58> │ │ + blt.n 2108a8a <_ZN3fmt3v116detail5writeIcNSt6__ndk120back_insert_iteratorINS0_19basic_memory_bufferIcLj500ENS3_9allocatorIcEEEEEExTnNS3_9enable_ifIXaaaasr11is_integralIT1_EE5valuentsr3std7is_sameISB_bEE5valuentsr3std7is_sameISB_T_EE5valueEiE4typeELi0EEET0_SF_SB_@@Base+0xa2> │ │ vselvs.f32 s28, s1, s25 │ │ lsls r2, r4, #1 │ │ │ │ 02108b3c > > fmt::v11::detail::copy_noinline > > >(char const*, char const*, std::__ndk1::back_insert_iterator > >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -208816,15 +208816,15 @@ │ │ ldr r0, [r5, #4] │ │ adds r1, r0, #1 │ │ ldr r2, [r5, #0] │ │ str r1, [r5, #4] │ │ strb r4, [r2, r0] │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - bge.n 2108cd8 > >, char, std::__ndk1::chrono::duration > >::tm_iso_week_of_year() const@@Base+0x3c> │ │ + bge.n 2108d32 > >, char, std::__ndk1::chrono::duration > >::tm_iso_week_of_year() const@@Base+0x96> │ │ Address 0x2108c9a is out of bounds. │ │ │ │ │ │ 02108c9c > >, char, std::__ndk1::chrono::duration > >::tm_iso_week_of_year() const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -209114,15 +209114,15 @@ │ │ ldr r2, [r4, #0] │ │ str r1, [r4, #4] │ │ ldrb r1, [r6, #1] │ │ strb r1, [r2, r0] │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - bvc.n 2109040 │ │ + bvc.n 210909a │ │ Address 0x2108fca is out of bounds. │ │ │ │ │ │ 02108fcc : │ │ subs r1, #1 │ │ cmp r1, #9 │ │ bhi.n 210906c │ │ @@ -209619,15 +209619,15 @@ │ │ b.n 21093dc │ │ bl 210b1bc │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ b.n 2109a30 >, float, float)@@Base+0x1a0> │ │ lsls r2, r4, #1 │ │ b.n 2109a0c >, float, float)@@Base+0x17c> │ │ lsls r2, r4, #1 │ │ - ldmia r3, {r0, r1, r3, r4} │ │ + ldmia r3, {r3, r6} │ │ Address 0x2109532 is out of bounds. │ │ │ │ │ │ 02109534 : │ │ ldrd r3, r2, [r0, #36] @ 0x24 │ │ cmp r3, r2 │ │ beq.n 210959c │ │ @@ -209904,16 +209904,16 @@ │ │ add r0, sp, #36 @ 0x24 │ │ bl 2109814 │ │ blx 26ffaf0 │ │ svc 250 @ 0xfa │ │ lsls r2, r4, #1 │ │ b.n 21099fc >, float, float)@@Base+0x16c> │ │ lsls r2, r4, #1 │ │ - ldmia r0, {r0, r7} │ │ - vfmsl.f16 q6, d2, d1[2] │ │ + ldmia r0!, {r1, r2, r3, r5, r7} │ │ + vfmsl.f16 d12, s5, s12[1] │ │ mrc2 13, 0, sp, cr2, cr6, {7} │ │ lsls r2, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r4, [r0, #0] │ │ movs r1, #0 │ │ str r1, [r0, #0] │ │ @@ -211042,15 +211042,15 @@ │ │ blx 2703f40 │ │ mov r1, r0 │ │ str r0, [r4, #4] │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ mov r0, r1 │ │ bx lr │ │ nop │ │ - lsls r4, r7, #6 │ │ + lsls r1, r5, #7 │ │ Address 0x210a516 is out of bounds. │ │ │ │ │ │ 0210a518 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -211226,18 +211226,18 @@ │ │ ittt eq │ │ addeq sp, #8 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldmia r7, {r1, r4, r5, r7} │ │ lsls r2, r4, #1 │ │ - lsls r0, r3, #2 │ │ + lsls r5, r0, #3 │ │ cdp2 0, 1, cr13, cr2, cr12, {5} │ │ lsls r2, r4, #1 │ │ - ldrb r0, [r5, #3] │ │ + ldrb r5, [r2, #4] │ │ mrc2 15, 0, ip, cr3, cr10, {1} │ │ lsls r2, r4, #1 │ │ │ │ 0210a6ac const&, Eigen::Matrix const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -211287,15 +211287,15 @@ │ │ mov r1, r5 │ │ mov r2, r8 │ │ ldmia.w sp!, {r8, r9, fp} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26fec50 │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - vcvt.f32.u32 d15, d1, #28 │ │ + @ instruction: 0xffd1fe11 │ │ │ │ 0210a74c : │ │ ldr r0, [r0, #0] │ │ b.w 26fec5c │ │ │ │ 0210a752 : │ │ push {r4, r6, r7, lr} │ │ @@ -212123,26 +212123,26 @@ │ │ nop │ │ cmp r7, #188 @ 0xbc │ │ lsls r5, r4, #1 │ │ ldmia r1!, {r2, r4, r5, r6} │ │ lsls r2, r4, #1 │ │ cmp r7, #8 │ │ lsls r5, r4, #1 │ │ - strd pc, lr, [ip, #-76] @ 0x4c │ │ + ldrd pc, lr, [r9, #-76]! @ 0x4c │ │ cmp r7, #170 @ 0xaa │ │ lsls r5, r4, #1 │ │ ldmia r1, {r1, r4, r5, r6} │ │ lsls r2, r4, #1 │ │ ldmia r0!, {r2, r3, r4, r5} │ │ lsls r2, r4, #1 │ │ - asrs r4, r2, #21 │ │ + asrs r1, r0, #22 │ │ vcmla.f16 d12, d1, d6[0], #90 │ │ lsls r2, r4, #1 │ │ - bmi.n 210b0b2 │ │ - cdp2 12, 1, cr13, cr2, cr14, {7} │ │ + bmi.n 210af0c │ │ + mrc2 13, 0, sp, cr2, cr11, {0} │ │ vfmsl.f16 d12, s0, s8[0] │ │ lsls r2, r4, #1 │ │ stmia r7!, {r2, r3, r4} │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -212319,27 +212319,27 @@ │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ sxtb r4, r0 │ │ cdp2 5, 1, cr11, cr4, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (210b1c8 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldr r4, [pc, #812] @ (210b4f8 >, void*>*>, bool> std::__ndk1::__hash_table >, std::__ndk1::__unordered_map_hasher >, std::__ndk1::hash, std::__ndk1::equal_to, true>, std::__ndk1::__unordered_map_equal >, std::__ndk1::equal_to, std::__ndk1::hash, true>, std::__ndk1::allocator > > >::__emplace_unique_key_args, std::__ndk1::tuple<> >(FontCacheKey const&, std::__ndk1::piecewise_construct_t const&, std::__ndk1::tuple&&, std::__ndk1::tuple<>&&)@@Base+0x30c>) │ │ + ldr r4, [pc, #992] @ (210b5ac ::operator()(FontCacheKey const&) const@@Base+0x64>) │ │ cdp2 5, 1, cr11, cr3, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (210b1d8 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldr r4, [pc, #748] @ (210b4c8 >, void*>*>, bool> std::__ndk1::__hash_table >, std::__ndk1::__unordered_map_hasher >, std::__ndk1::hash, std::__ndk1::equal_to, true>, std::__ndk1::__unordered_map_equal >, std::__ndk1::equal_to, std::__ndk1::hash, true>, std::__ndk1::allocator > > >::__emplace_unique_key_args, std::__ndk1::tuple<> >(FontCacheKey const&, std::__ndk1::piecewise_construct_t const&, std::__ndk1::tuple&&, std::__ndk1::tuple<>&&)@@Base+0x2dc>) │ │ + ldr r4, [pc, #928] @ (210b57c ::operator()(FontCacheKey const&) const@@Base+0x34>) │ │ cdp2 5, 1, cr11, cr3, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (210b1e8 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldr r4, [pc, #684] @ (210b498 >, void*>*>, bool> std::__ndk1::__hash_table >, std::__ndk1::__unordered_map_hasher >, std::__ndk1::hash, std::__ndk1::equal_to, true>, std::__ndk1::__unordered_map_equal >, std::__ndk1::equal_to, std::__ndk1::hash, true>, std::__ndk1::allocator > > >::__emplace_unique_key_args, std::__ndk1::tuple<> >(FontCacheKey const&, std::__ndk1::piecewise_construct_t const&, std::__ndk1::tuple&&, std::__ndk1::tuple<>&&)@@Base+0x2ac>) │ │ + ldr r4, [pc, #864] @ (210b54c ::operator()(FontCacheKey const&) const@@Base+0x4>) │ │ Address 0x210b1ea is out of bounds. │ │ │ │ │ │ 0210b1ec >, void*>*>, bool> std::__ndk1::__hash_table >, std::__ndk1::__unordered_map_hasher >, std::__ndk1::hash, std::__ndk1::equal_to, true>, std::__ndk1::__unordered_map_equal >, std::__ndk1::equal_to, std::__ndk1::hash, true>, std::__ndk1::allocator > > >::__emplace_unique_key_args, std::__ndk1::tuple<> >(FontCacheKey const&, std::__ndk1::piecewise_construct_t const&, std::__ndk1::tuple&&, std::__ndk1::tuple<>&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -214772,15 +214772,15 @@ │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ bmi.n 210cbb6 , std::__ndk1::allocator >::__grow_by(unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int)@@Base+0x6c> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (210cc18 , std::__ndk1::allocator >::__grow_by(unsigned int, unsigned int, unsigned int, unsigned int, unsigned int, unsigned int)@@Base+0xce>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldr r0, [r2, #116] @ 0x74 │ │ + ldr r5, [r7, #116] @ 0x74 │ │ Address 0x210cc1a is out of bounds. │ │ │ │ │ │ 0210cc1c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -215196,37 +215196,37 @@ │ │ beq.n 210d082 │ │ ldr r0, [sp, #8] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ add r1, sp, #576 @ 0x240 │ │ lsls r2, r4, #1 │ │ - asrs r1, r0, #27 │ │ + asrs r6, r5, #27 │ │ mrc2 5, 0, r5, cr1, cr6, {1} │ │ - vfmsl.f16 , d0, d2[0] │ │ - cdp2 5, 1, cr7, cr2, cr12, {1} │ │ - mrc2 9, 0, r9, cr0, cr11, {1} @ │ │ - mrc2 9, 0, sp, cr1, cr10, {1} @ │ │ - cdp2 13, 1, cr11, cr1, cr10, {4} │ │ - vfmsl.f16 , d16, d3[3] │ │ - cdp2 6, 1, cr13, cr1, cr15, {4} │ │ - cdp2 4, 1, cr7, cr2, cr5, {3} │ │ - vfmsl.f16 d12, s1, s2[0] │ │ - mrc2 1, 0, r3, cr3, cr10, {7} │ │ - cdp2 4, 1, cr11, cr3, cr11, {0} │ │ - cdp2 4, 1, cr15, cr2, cr13, {4} │ │ - cdp2 2, 1, cr15, cr0, cr11, {3} │ │ - cdp2 4, 1, cr1, cr2, cr9, {6} │ │ - cdp2 4, 1, cr15, cr1, cr12, {1} │ │ - cdp2 4, 1, cr1, cr0, cr10, {4} │ │ - cdp2 3, 1, cr1, cr1, cr8, {4} │ │ - mrc2 15, 0, r8, cr2, cr1, {7} │ │ - mrc2 9, 0, r8, cr2, cr14, {4} @ │ │ - cdp2 14, 1, cr10, cr3, cr13, {1} │ │ - cdp2 1, 1, cr15, cr3, cr8, {3} │ │ + vfmsl.f16 , d0, d7[3] │ │ + mrc2 5, 0, r7, cr2, cr9, {2} │ │ + @ instruction: 0xfe109968 │ │ + @ instruction: 0xfe11d967 │ │ + mrc2 13, 0, fp, cr1, cr7, {5} │ │ + vselvs.f16 s26, s0, s17 │ │ + mrc2 6, 0, sp, cr1, cr12, {5} │ │ + mrc2 4, 0, r7, cr2, cr2, {4} │ │ + vfmsl.f16 d12, s1, s13[1] │ │ + cdp2 2, 1, cr3, cr3, cr7, {1} │ │ + mrc2 4, 0, fp, cr3, cr8, {1} │ │ + mrc2 4, 0, pc, cr2, cr10, {5} │ │ + mrc2 2, 0, pc, cr0, cr8, {4} │ │ + mrc2 4, 0, r1, cr2, cr6, {7} │ │ + mrc2 4, 0, pc, cr1, cr9, {2} │ │ + mrc2 4, 0, r1, cr0, cr7, {5} │ │ + mrc2 3, 0, r1, cr1, cr5, {5} │ │ + mrc2 0, 0, r9, cr2, cr14, {0} │ │ + @ instruction: 0xfe1289cb │ │ + mrc2 14, 0, sl, cr3, cr10, {2} │ │ + mrc2 1, 0, pc, cr3, cr5, {4} │ │ mrc2 5, 0, sl, cr2, cr2, {5} │ │ lsls r2, r4, #1 │ │ │ │ 0210d0ec : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -215603,20 +215603,20 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r0, [pc, #24] @ (210d4b0 , std::__ndk1::basic_string_view >, celestia::util::NumberFormat) const@@Base+0x148>) │ │ add r0, pc │ │ bl 2093da8 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x140> │ │ add r2, pc, #264 @ (adr r2, 210d5a8 , std::__ndk1::basic_string_view >, unsigned int) const@@Base+0xf4>) │ │ lsls r2, r4, #1 │ │ - ldr r3, [pc, #624] @ (210d714 , fmt::v11::basic_memory_buffer >&, celestia::util::NumberFormat) const@@Base+0x28>) │ │ - mrc2 4, 0, sp, cr3, cr5, {5} │ │ - cdp2 4, 1, cr11, cr0, cr14, {1} │ │ + ldr r3, [pc, #804] @ (210d7c8 , fmt::v11::basic_memory_buffer >&, celestia::util::NumberFormat) const@@Base+0xdc>) │ │ + cdp2 4, 1, cr13, cr3, cr2, {7} │ │ + mrc2 4, 0, fp, cr0, cr11, {2} │ │ cdp2 1, 1, cr10, cr1, cr0, {2} │ │ lsls r2, r4, #1 │ │ - lsrs r1, r0, #24 │ │ + lsrs r6, r5, #24 │ │ Address 0x210d4b2 is out of bounds. │ │ │ │ │ │ 0210d4b4 , std::__ndk1::basic_string_view >, unsigned int) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -215828,21 +215828,21 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ add r0, pc, #984 @ (adr r0, 210daa4 , fmt::v11::basic_memory_buffer >&, celestia::util::NumberFormat) const@@Base+0x3b8>) │ │ lsls r2, r4, #1 │ │ lsls r3, r4, #21 │ │ movs r0, r0 │ │ - bcc.n 210d5f2 , std::__ndk1::basic_string_view >, unsigned int) const@@Base+0x13e> │ │ + bcc.n 210d64c , std::__ndk1::basic_string_view >, unsigned int) const@@Base+0x198> │ │ mrc2 5, 0, r0, cr0, cr5, {4} │ │ movs r0, r0 │ │ - bcs.n 210d636 , std::__ndk1::basic_string_view >, unsigned int) const@@Base+0x182> │ │ - mrc2 3, 0, sp, cr0, cr11, {2} │ │ - mrc2 2, 0, fp, cr0, cr10, {5} │ │ - cdp2 2, 1, cr11, cr1, cr14, {1} │ │ + bcs.n 210d690 , std::__ndk1::basic_string_view >, unsigned int) const@@Base+0x1dc> │ │ + cdp2 3, 1, cr13, cr0, cr8, {4} │ │ + cdp2 2, 1, cr11, cr0, cr7, {7} │ │ + mrc2 2, 0, fp, cr1, cr11, {2} │ │ cdp2 15, 1, cr9, cr1, cr12, {0} │ │ lsls r2, r4, #1 │ │ │ │ 0210d6ec , fmt::v11::basic_memory_buffer >&, celestia::util::NumberFormat) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -216187,20 +216187,20 @@ │ │ blx 27041d0 │ │ mov fp, r0 │ │ b.n 210d774 , fmt::v11::basic_memory_buffer >&, celestia::util::NumberFormat) const@@Base+0x88> │ │ ldr r6, [sp, #776] @ 0x308 │ │ lsls r2, r4, #1 │ │ ldr r6, [sp, #0] │ │ lsls r2, r4, #1 │ │ - bx r4 │ │ - cdp2 7, 1, cr2, cr3, cr9, {4} │ │ - cdp2 13, 1, cr2, cr3, cr11, {2} │ │ - mrc2 0, 0, sp, cr1, cr3, {2} │ │ - cdp2 14, 1, cr10, cr0, cr8, {2} │ │ - vselvs.f32 s0, s3, s29 │ │ + bx r9 │ │ + mrc2 7, 0, r2, cr3, cr6, {5} │ │ + mrc2 13, 0, r2, cr3, cr8, {3} │ │ + cdp2 0, 1, cr13, cr1, cr0, {4} │ │ + mrc2 14, 0, sl, cr0, cr5, {3} │ │ + mrc2 10, 0, r0, cr1, cr11, {6} @ │ │ cdp2 14, 1, cr9, cr3, cr4, {2} │ │ lsls r2, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #48 @ 0x30 │ │ ldr r3, [pc, #176] @ (210db50 , fmt::v11::basic_memory_buffer >&, celestia::util::NumberFormat) const@@Base+0x464>) │ │ add r3, pc │ │ @@ -216273,21 +216273,21 @@ │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r0, [pc, #28] @ (210db68 , fmt::v11::basic_memory_buffer >&, celestia::util::NumberFormat) const@@Base+0x47c>) │ │ add r0, pc │ │ blx 2702540 │ │ ldr r3, [sp, #112] @ 0x70 │ │ lsls r2, r4, #1 │ │ - cmp r3, #67 @ 0x43 │ │ - vfmsl.f16 q0, d17, d2[1] │ │ - cdp2 13, 1, cr12, cr3, cr15, {5} │ │ - vselvs.f16 s0, s0, s12 │ │ + cmp r3, #112 @ 0x70 │ │ + vselvs.f16 s0, s2, s14 │ │ + mrc2 13, 0, ip, cr3, cr12, {6} │ │ + mrc2 9, 0, r0, cr0, cr3, {1} @ │ │ vselvs.f32 s18, s7, s12 │ │ lsls r2, r4, #1 │ │ - b.n 210d8dc , fmt::v11::basic_memory_buffer >&, celestia::util::NumberFormat) const@@Base+0x1f0> │ │ + b.n 210d936 , fmt::v11::basic_memory_buffer >&, celestia::util::NumberFormat) const@@Base+0x24a> │ │ Address 0x210db6a is out of bounds. │ │ │ │ │ │ 0210db6c >, bool)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -216549,22 +216549,22 @@ │ │ itt ne │ │ ldrne r0, [sp, #32] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldr r2, [sp, #264] @ 0x108 │ │ lsls r2, r4, #1 │ │ - add r4, sp, #732 @ 0x2dc │ │ - mrc2 0, 0, r6, cr1, cr9, {0} │ │ - cdp2 5, 1, cr6, cr3, cr4, {6} │ │ + add r4, sp, #912 @ 0x390 │ │ + cdp2 0, 1, cr6, cr1, cr6, {2} │ │ + mrc2 5, 0, r6, cr3, cr1, {7} │ │ mrc2 5, 0, r4, cr0, cr3, {3} │ │ - cdp2 3, 1, cr2, cr0, cr6, {4} │ │ - cdp2 6, 1, cr0, cr3, cr0, {6} │ │ - @ instruction: 0xfe11b9c6 │ │ - mrc2 6, 0, r0, cr3, cr12, {0} │ │ + mrc2 3, 0, r2, cr0, cr3, {5} │ │ + cdp2 6, 1, cr0, cr3, cr13, {7} │ │ + mrc2 9, 0, fp, cr1, cr3, {7} @ │ │ + cdp2 6, 1, cr0, cr3, cr9, {2} │ │ vselvs.f32 s18, s2, s9 │ │ lsls r2, r4, #1 │ │ │ │ 0210de34 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -216904,21 +216904,21 @@ │ │ ldr r0, [sp, #12] │ │ lsls r0, r0, #31 │ │ beq.n 210e1d2 │ │ ldr r0, [sp, #8] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - @ instruction: 0xb8a6 │ │ + @ instruction: 0xb8d3 │ │ mrc2 7, 0, r9, cr3, cr4, {3} │ │ lsls r2, r4, #1 │ │ str r4, [sp, #536] @ 0x218 │ │ lsls r2, r4, #1 │ │ - ldrsh r2, [r2, r4] │ │ - mrc2 13, 0, r5, cr2, cr6, {7} │ │ + ldrsh r7, [r7, r4] │ │ + cdp2 14, 1, cr5, cr2, cr3, {1} │ │ Address 0x210e1ea is out of bounds. │ │ │ │ │ │ 0210e1ec : │ │ vldr d16, [r1] │ │ movs r3, #0 │ │ ldr r2, [r1, #8] │ │ @@ -217092,15 +217092,15 @@ │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ bl 207de6a │ │ nop │ │ str r2, [sp, #704] @ 0x2c0 │ │ lsls r2, r4, #1 │ │ - subs r5, #104 @ 0x68 │ │ + subs r5, #149 @ 0x95 │ │ mrc2 2, 0, r9, cr2, cr0, {4} │ │ lsls r2, r4, #1 │ │ str r2, [sp, #216] @ 0xd8 │ │ lsls r2, r4, #1 │ │ │ │ 0210e3b4 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -217166,15 +217166,15 @@ │ │ ldrb r0, [r4, #0] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [r4, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - adds r4, r7, #2 │ │ + adds r1, r5, #3 │ │ mrc2 1, 0, r9, cr3, cr2, {7} │ │ lsls r2, r4, #1 │ │ str r1, [sp, #552] @ 0x228 │ │ lsls r2, r4, #1 │ │ │ │ 0210e46c : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -217281,19 +217281,19 @@ │ │ ldrb.w r0, [sp, #16] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - mrc2 14, 3, pc, cr6, cr1, {0} │ │ + mcr2 14, 5, pc, cr3, cr1, {0} @ │ │ str r1, [sp, #248] @ 0xf8 │ │ lsls r2, r4, #1 │ │ - udf #188 @ 0xbc │ │ - mrc2 15, 0, pc, cr0, cr4, {0} │ │ + udf #233 @ 0xe9 │ │ + cdp2 15, 1, cr15, cr0, cr1, {2} │ │ cdp2 0, 1, cr9, cr0, cr2, {4} │ │ lsls r2, r4, #1 │ │ │ │ 0210e5a4 >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -217454,15 +217454,15 @@ │ │ subs r4, r5, #1 │ │ lsls r1, r4, #1 │ │ subs r4, r2, #3 │ │ lsls r1, r4, #1 │ │ subs r6, r7, #5 │ │ lsls r1, r4, #1 │ │ ldr r1, [sp, #256] @ 0x100 │ │ - vselvs.f64 d15, d20, d7 │ │ + mrc2 11, 0, pc, cr4, cr4, {5} @ │ │ Address 0x210e742 is out of bounds. │ │ │ │ │ │ 0210e744 >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -217706,15 +217706,15 @@ │ │ adds r4, r3, #0 │ │ lsls r1, r4, #1 │ │ adds r6, r2, #3 │ │ lsls r1, r4, #1 │ │ adds r2, r3, #4 │ │ lsls r1, r4, #1 │ │ str r6, [sp, #880] @ 0x370 │ │ - mrc2 9, 0, pc, cr4, cr15, {0} @ │ │ + @ instruction: 0xfe14f94c │ │ Address 0x210e9aa is out of bounds. │ │ │ │ │ │ 0210e9ac : │ │ ldr r0, [pc, #8] @ (210e9b8 ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ @@ -221106,15 +221106,15 @@ │ │ itt ne │ │ ldrne.w r0, [r8, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldr r2, [r6, #0] │ │ lsls r2, r4, #1 │ │ - str r7, [r7, r5] │ │ + str r4, [r5, r6] │ │ cdp2 7, 1, cr6, cr2, cr10, {0} │ │ lsls r2, r4, #1 │ │ │ │ 02110eec >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -221270,15 +221270,15 @@ │ │ lsls r4, r4, #1 │ │ str r6, [r7, #104] @ 0x68 │ │ lsls r2, r4, #1 │ │ ldmia r4!, {r1, r2, r5, r7} │ │ lsls r4, r4, #1 │ │ ldmia r4!, {r1, r2, r3} │ │ lsls r4, r4, #1 │ │ - ldr r7, [pc, #100] @ (21110f8 >, std::__ndk1::basic_string_view >)@@Base+0x3a>) │ │ + ldr r7, [pc, #280] @ (21111ac >, std::__ndk1::basic_string_view >) const@@Base+0x10>) │ │ mrc2 12, 0, ip, cr2, cr4, {3} │ │ lsls r4, r4, #1 │ │ ldmia r5, {r1, r3, r4, r5} │ │ lsls r4, r4, #1 │ │ str r4, [r3, #88] @ 0x58 │ │ lsls r2, r4, #1 │ │ │ │ @@ -221989,15 +221989,15 @@ │ │ cmp r0, #0 │ │ it eq │ │ streq r5, [r4, #16] │ │ movs r0, #1 │ │ pop {r4, r5, r7, pc} │ │ movs r0, #0 │ │ pop {r4, r5, r7, pc} │ │ - lsls r4, r1, #31 │ │ + lsls r1, r7, #31 │ │ Address 0x21117c6 is out of bounds. │ │ │ │ │ │ 021117c8 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -222820,15 +222820,15 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #40] @ 0x28 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ ldrh r6, [r0, r3] │ │ lsls r2, r4, #1 │ │ - ldrd pc, lr, [r2], #68 @ 0x44 │ │ + ldmdb pc, {r0, r4, r9, sl, fp, ip, sp, lr, pc} │ │ b.n 2111e28 │ │ lsls r0, r4, #1 │ │ b.n 2111d54 │ │ lsls r0, r4, #1 │ │ ldrsb r0, [r6, r3] │ │ lsls r2, r4, #1 │ │ │ │ @@ -223959,15 +223959,15 @@ │ │ bx lr │ │ bmi.n 2112ae2 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2112b44 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bcc.n 2112be6 >, std::__ndk1::basic_string, std::__ndk1::allocator >&)@@Base+0x42> │ │ + bcc.n 2112c40 >, std::__ndk1::basic_string, std::__ndk1::allocator >&)@@Base+0x9c> │ │ Address 0x2112b46 is out of bounds. │ │ │ │ │ │ 02112b48 , std::__ndk1::allocator >&, int&)@@Base>: │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #56 @ 0x38 │ │ @@ -224585,15 +224585,15 @@ │ │ ldr r1, [pc, #16] @ (2113178 , std::__ndk1::allocator >&)@@Base+0xac>) │ │ mov r0, r4 │ │ add r1, pc │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26fec8c │ │ nop │ │ - bmi.n 21131f0 >, std::__ndk1::basic_string_view >)@@Base+0x74> │ │ + bmi.n 211324a >, std::__ndk1::basic_string_view >)@@Base+0xce> │ │ Address 0x211317a is out of bounds. │ │ │ │ │ │ 0211317c >, std::__ndk1::basic_string_view >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -225353,22 +225353,22 @@ │ │ strd r9, r8, [sp] │ │ blx 27044d0 │ │ ldr r0, [sp, #24] │ │ mov.w r1, #4194304 @ 0x400000 │ │ b.w 21138f4 >, unsigned long long, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned long long> > >&)@@Base+0x424> │ │ asrs r2, r6 │ │ lsls r2, r4, #1 │ │ - ldrsb r1, [r7, r1] │ │ - cdp2 12, 1, cr8, cr0, cr0, {2} │ │ - cdp2 2, 1, cr1, cr2, cr2, {2} │ │ - cdp2 15, 1, cr6, cr1, cr3, {2} │ │ + ldrsb r6, [r4, r2] │ │ + cdp2 12, 1, cr8, cr0, cr13, {3} │ │ + cdp2 2, 1, cr1, cr2, cr15, {3} │ │ + mrc2 15, 0, r6, cr1, cr0, {3} │ │ mrc2 15, 0, fp, cr2, cr0, {4} │ │ - mrc2 1, 0, sp, cr3, cr5, {6} │ │ + cdp2 2, 1, cr13, cr3, cr2, {0} │ │ cdp2 12, 1, cr14, cr0, cr6, {4} │ │ - mcr2 6, 0, r0, cr15, cr15, {6} │ │ + cdp2 7, 0, cr0, cr15, cr12, {0} │ │ cdp2 12, 1, cr14, cr3, cr6, {2} │ │ mcr2 6, 0, r4, cr15, cr2, {1} │ │ mov r3, r5 │ │ strd r1, sl, [r0, #24] │ │ mov r1, r4 │ │ ldr r0, [pc, #388] @ (2113a84 >, unsigned long long, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned long long> > >&)@@Base+0x5b4>) │ │ str r6, [sp, #20] │ │ @@ -225486,39 +225486,39 @@ │ │ ittt eq │ │ addeq sp, #36 @ 0x24 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ lsrs r6, r1 │ │ lsls r2, r4, #1 │ │ - add r5, sp, #612 @ 0x264 │ │ - mrc2 2, 0, r2, cr2, cr6, {6} │ │ + add r5, sp, #792 @ 0x318 │ │ + cdp2 3, 1, cr2, cr2, cr3, {0} │ │ cdp2 14, 1, cr11, cr3, cr13, {4} │ │ mrc2 11, 0, lr, cr3, cr0, {5} @ │ │ mcr2 2, 0, sl, cr15, cr14, {2} │ │ - mrc2 2, 0, r8, cr3, cr12, {2} │ │ + cdp2 2, 1, cr8, cr3, cr9, {4} │ │ cdp2 2, 1, cr10, cr3, cr2, {1} │ │ - vcmla.f16 d14, d3, d8[1], #90 │ │ - mrc2 1, 0, r2, cr2, cr12, {6} │ │ - @ instruction: 0xfe13e96f │ │ - mrc2 9, 0, lr, cr1, cr2, {2} @ │ │ - mrc2 11, 0, r8, cr1, cr13, {3} @ │ │ - cdp2 14, 1, cr14, cr0, cr11, {1} │ │ - mrc2 1, 0, r8, cr0, cr6, {1} │ │ - mrc2 15, 0, ip, cr3, cr1, {1} │ │ - @ instruction: 0xfe10ab6c │ │ - mrc2 6, 0, lr, cr2, cr10, {6} │ │ - mrc2 9, 0, r0, cr2, cr2, {5} @ │ │ - mrc2 5, 0, r0, cr0, cr6, {1} │ │ - vcmla.f16 d8, d2, d9[1], #90 │ │ + vfmsl.f16 q7, d3, d5[0] │ │ + cdp2 2, 1, cr2, cr2, cr9, {0} │ │ + mrc2 9, 0, lr, cr3, cr12, {4} @ │ │ + mrc2 9, 0, lr, cr1, cr15, {3} @ │ │ + vselvs.f64 d8, d17, d26 │ │ + mrc2 14, 0, lr, cr0, cr8, {2} │ │ + cdp2 1, 1, cr8, cr0, cr3, {3} │ │ + mrc2 15, 0, ip, cr3, cr14, {2} │ │ + mrc2 11, 0, sl, cr0, cr9, {4} @ │ │ + cdp2 7, 1, cr14, cr2, cr7, {0} │ │ + mrc2 9, 0, r0, cr2, cr15, {6} @ │ │ + cdp2 5, 1, cr0, cr0, cr3, {3} │ │ + vfmsl.f16 q4, d2, d6[0] │ │ vselvs.f16 s28, s4, s30 │ │ - mcr2 11, 0, r6, cr15, cr0, {1} @ │ │ - mrc2 11, 0, r6, cr2, cr4, {0} @ │ │ - vselvs.f16 s20, s4, s5 │ │ - cdp2 14, 1, cr4, cr1, cr2, {4} │ │ + mcr2 11, 0, r6, cr15, cr13, {2} @ │ │ + @ instruction: 0xfe126b41 │ │ + @ instruction: 0xfe12a94f │ │ + cdp2 14, 1, cr4, cr1, cr15, {5} │ │ mrc2 11, 0, r3, cr1, cr6, {4} @ │ │ lsls r2, r4, #1 │ │ │ │ 02113aa8 >, unsigned int, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned int> > >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -225753,28 +225753,28 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ subs r3, #92 @ 0x5c │ │ lsls r2, r4, #1 │ │ b.n 2113c4c >, unsigned int, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned int> > >&)@@Base+0x1a4> │ │ mcr2 10, 0, r3, cr15, cr8, {7} @ │ │ lsls r2, r4, #1 │ │ - lsls r1, r5, #7 │ │ + lsls r6, r2, #8 │ │ mrc2 7, 0, lr, cr3, cr2, {2} │ │ - vcmla.f16 d10, d31, d11[1], #0 │ │ + vfmal.f16 q5, d31, d0[1] │ │ mrc2 7, 0, lr, cr2, cr2, {0} │ │ - vdot.bf16 , , d8[0] │ │ + mcr2 13, 0, r1, cr15, cr5, {7} │ │ vselvs.f16 s22, s7, s14 │ │ - vcmla.f16 q3, , d11[1], #90 │ │ + mrc2 9, 0, r6, cr3, cr8, {0} @ │ │ mrc2 13, 0, r9, cr2, cr6, {2} │ │ mrc2 9, 0, fp, cr3, cr4, {0} @ │ │ - mrc2 11, 0, ip, cr3, cr13, {2} @ │ │ - cdp2 12, 1, cr2, cr0, cr1, {0} │ │ - vfmsl.f16 q3, d0, d0[0] │ │ - vfmsl.f16 d6, s4, s9[0] │ │ - mrc2 2, 0, lr, cr2, cr11, {6} │ │ + vselvs.f64 d12, d19, d10 │ │ + cdp2 12, 1, cr2, cr0, cr14, {1} │ │ + vfmsl.f16 q3, d0, d5[3] │ │ + vcmla.f16 q3, q1, d1[1], #90 │ │ + cdp2 3, 1, cr14, cr2, cr8, {0} │ │ vfmsl.f16 , d18, d6[1] │ │ lsls r2, r4, #1 │ │ │ │ 02113d3c >, BodyClassification, std::__ndk1::less > >, std::__ndk1::allocator > const, BodyClassification> > >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -225939,25 +225939,25 @@ │ │ addeq sp, #36 @ 0x24 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ subs r0, #200 @ 0xc8 │ │ lsls r2, r4, #1 │ │ - b.n 2114398 >, unsigned long long, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned long long> > >&)@@Base+0x488> │ │ + b.n 21143f2 >, unsigned long long, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned long long> > >&)@@Base+0x4e2> │ │ vcmla.f16 , q1, d4[1], #90 │ │ lsls r2, r4, #1 │ │ - ldmia r0!, {r1, r3, r4} │ │ - mrc2 6, 0, sl, cr1, cr5, {2} │ │ - vselvs.f32 s4, s5, s22 │ │ - mrc2 14, 0, pc, cr0, cr4, {7} │ │ - vcmla.f16 q3, q9, d1[1], #90 │ │ - cdp2 4, 1, cr4, cr1, cr15, {3} │ │ - cdp2 15, 1, cr3, cr2, cr7, {5} │ │ - mrc2 4, 0, r4, cr3, cr10, {1} │ │ + ldmia r0, {r0, r1, r2, r6} │ │ + cdp2 6, 1, cr10, cr1, cr2, {4} │ │ + mrc2 10, 0, r2, cr2, cr8, {5} @ │ │ + cdp2 15, 1, cr15, cr0, cr1, {1} │ │ + vselvs.f16 s12, s4, s28 │ │ + mrc2 4, 0, r4, cr1, cr12, {4} │ │ + mrc2 15, 0, r3, cr2, cr4, {6} │ │ + cdp2 4, 1, cr4, cr3, cr7, {3} │ │ mrc2 9, 0, r9, cr2, cr4, {5} @ │ │ mrc2 6, 0, r3, cr3, cr8, {7} │ │ lsls r2, r4, #1 │ │ │ │ 02113f10 >, unsigned long long, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned long long> > >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -226346,39 +226346,39 @@ │ │ mov r2, r6 │ │ mov r3, r5 │ │ strd r1, sl, [r0, #24] │ │ b.w 2114378 >, unsigned long long, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned long long> > >&)@@Base+0x468> │ │ adds r6, #242 @ 0xf2 │ │ lsls r2, r4, #1 │ │ b.n 21149ea >, unsigned int, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned int> > >&)@@Base+0x16> │ │ - mcr2 9, 0, r8, cr15, cr2, {4} @ │ │ - cdp2 3, 1, cr4, cr1, cr13, {1} │ │ - mrc2 11, 0, r4, cr2, cr0, {5} @ │ │ + mcr2 9, 0, r8, cr15, cr15, {5} @ │ │ + mrc2 3, 0, r4, cr1, cr10, {2} │ │ + mrc2 11, 0, r4, cr2, cr13, {6} @ │ │ vselvs.f16 s18, s1, s6 │ │ - cdp2 3, 1, cr10, cr3, cr15, {0} │ │ - mrc2 4, 0, r6, cr1, cr9, {5} │ │ - mrc2 6, 0, r5, cr2, cr15, {5} │ │ - cdp2 15, 1, cr13, cr3, cr13, {2} │ │ - mrc2 7, 0, ip, cr2, cr4, {0} │ │ - mrc2 13, 0, pc, cr0, cr11, {5} │ │ - mrc2 5, 0, lr, cr1, cr3, {3} │ │ - cdp2 6, 1, cr6, cr0, cr3, {0} │ │ - cdp2 4, 1, cr12, cr1, cr14, {4} │ │ - cdp2 12, 1, cr3, cr1, cr7, {6} │ │ - cdp2 4, 1, cr14, cr3, cr9, {7} │ │ - cdp2 3, 1, cr6, cr0, cr10, {2} │ │ - cdp2 15, 1, cr7, cr2, cr5, {6} │ │ + mrc2 3, 0, sl, cr3, cr12, {1} │ │ + cdp2 4, 1, cr6, cr1, cr6, {7} │ │ + cdp2 6, 1, cr5, cr2, cr12, {7} │ │ + mrc2 15, 0, sp, cr3, cr10, {3} │ │ + cdp2 7, 1, cr12, cr2, cr1, {2} │ │ + cdp2 13, 1, cr15, cr0, cr8, {7} │ │ + cdp2 5, 1, cr14, cr1, cr0, {5} │ │ + mrc2 6, 0, r6, cr0, cr0, {1} │ │ + mrc2 4, 0, ip, cr1, cr11, {5} │ │ + mrc2 12, 0, r3, cr1, cr4, {7} │ │ + mrc2 5, 0, lr, cr3, cr6, {0} │ │ + mrc2 3, 0, r6, cr0, cr7, {3} │ │ + mrc2 15, 0, r7, cr2, cr2, {7} │ │ mrc2 3, 0, fp, cr2, cr6, {2} │ │ - cdp2 2, 1, cr10, cr3, cr0, {0} │ │ - mrc2 7, 0, r1, cr2, cr6, {1} │ │ - mrc2 0, 0, sl, cr3, cr14, {5} │ │ - cdp2 6, 1, cr6, cr1, cr5, {5} │ │ - cdp2 5, 1, cr2, cr0, cr11, {6} │ │ - cdp2 6, 1, cr8, cr0, cr6, {2} │ │ - cdp2 15, 1, cr3, cr1, cr3, {7} │ │ + cdp2 2, 1, cr10, cr3, cr13, {1} │ │ + cdp2 7, 1, cr1, cr2, cr3, {3} │ │ + cdp2 0, 1, cr10, cr3, cr11, {7} │ │ + mrc2 6, 0, r6, cr1, cr2, {6} │ │ + mrc2 5, 0, r2, cr0, cr8, {7} │ │ + mrc2 6, 0, r8, cr0, cr3, {3} │ │ + mrc2 0, 0, r4, cr1, cr0, {0} │ │ cdp2 6, 1, cr4, cr2, cr1, {1} │ │ ldr r0, [pc, #1012] @ (2114770 >, unsigned long long, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned long long> > >&)@@Base+0x860>) │ │ str r6, [sp, #20] │ │ add r0, pc │ │ str r0, [sp, #8] │ │ movs r0, #8 │ │ strd r9, r8, [sp] │ │ @@ -226754,28 +226754,28 @@ │ │ str r6, [sp, #20] │ │ strd r9, r8, [sp] │ │ blx 27044d0 │ │ ldr r0, [sp, #24] │ │ mov.w r1, #1048576 @ 0x100000 │ │ b.w 21147a8 >, unsigned long long, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned long long> > >&)@@Base+0x898> │ │ nop │ │ - add r0, pc, #396 @ (adr r0, 2114900 >, unsigned long long, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned long long> > >&)@@Base+0x9f0>) │ │ - mrc2 15, 0, r9, cr0, cr4, {3} │ │ - mrc2 2, 0, lr, cr1, cr5, {4} │ │ - cdp2 15, 1, cr9, cr0, cr10, {1} │ │ - mrc2 4, 0, r4, cr1, cr7, {3} │ │ - cdp2 2, 1, cr14, cr1, cr9, {1} │ │ - mrc2 11, 0, r1, cr0, cr6, {2} @ │ │ - mrc2 1, 0, ip, cr2, cr0, {1} │ │ - mrc2 11, 0, fp, cr1, cr13, {6} @ │ │ - cdp2 2, 1, cr0, cr2, cr10, {6} │ │ - vselvs.f16 s6, s2, s3 │ │ - mrc2 1, 0, r5, cr3, cr4, {7} │ │ - cdp2 0, 1, cr12, cr3, cr6, {4} │ │ - mrc2 1, 0, r2, cr1, cr2, {3} │ │ + add r0, pc, #576 @ (adr r0, 21149b4 >, unsigned long long, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned long long> > >&)@@Base+0xaa4>) │ │ + cdp2 15, 1, cr9, cr0, cr1, {5} │ │ + cdp2 2, 1, cr14, cr1, cr2, {6} │ │ + mrc2 15, 0, r9, cr0, cr7, {2} │ │ + cdp2 4, 1, cr4, cr1, cr4, {5} │ │ + mrc2 2, 0, lr, cr1, cr6, {2} │ │ + vselvs.f64 d1, d16, d3 │ │ + mrc2 1, 0, ip, cr2, cr13, {2} │ │ + cdp2 12, 1, cr11, cr1, cr10, {0} │ │ + mrc2 2, 0, r0, cr2, cr7, {7} │ │ + @ instruction: 0xfe11394e │ │ + cdp2 2, 1, cr5, cr3, cr1, {1} │ │ + mrc2 0, 0, ip, cr3, cr3, {5} │ │ + mrc2 1, 0, r2, cr1, cr15, {4} │ │ mrc2 6, 0, r4, cr1, cr2, {1} │ │ mov r3, r5 │ │ strd sl, r1, [r0, #24] │ │ mov r1, r4 │ │ ldr r0, [pc, #496] @ (21149a4 >, unsigned long long, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned long long> > >&)@@Base+0xa94>) │ │ str r6, [sp, #20] │ │ add r0, pc │ │ @@ -226940,38 +226940,38 @@ │ │ ittt eq │ │ addeq sp, #36 @ 0x24 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ adds r6, #142 @ 0x8e │ │ lsls r2, r4, #1 │ │ - bl 2088598 >::~basic_teestream()@@Base+0x1a4> │ │ - bl 207059c │ │ - strb r2, [r6, #14] │ │ + bl 20b5598 │ │ + bl 209d59c ::operator()(char const*)@@Base+0x1e3c> │ │ + strb r7, [r3, #15] │ │ cdp2 15, 1, cr10, cr3, cr5, {2} │ │ - mrc2 13, 0, r9, cr3, cr0, {7} │ │ - cdp2 14, 1, cr5, cr2, cr5, {5} │ │ - cdp2 12, 1, cr3, cr2, cr11, {3} │ │ - cdp2 12, 1, cr7, cr2, cr11, {7} │ │ - cdp2 15, 1, cr11, cr0, cr11, {0} │ │ - mrc2 0, 0, r5, cr1, cr3, {1} │ │ - cdp2 4, 1, cr4, cr3, cr9, {3} │ │ - mrc2 4, 0, r4, cr0, cr0, {2} │ │ - mrc2 1, 0, r8, cr0, cr11, {5} │ │ - mrc2 3, 0, r4, cr1, cr0, {6} │ │ - vfmsl.f16 d11, s1, s1[1] │ │ - mrc2 0, 0, r4, cr2, cr0, {4} │ │ - cdp2 3, 1, cr4, cr1, cr2, {3} │ │ - cdp2 0, 1, cr6, cr0, cr14, {6} │ │ - vselvs.f64 d7, d0, d11 │ │ - cdp2 13, 1, cr13, cr0, cr12, {6} │ │ - cdp2 15, 1, cr1, cr0, cr9, {5} │ │ - mrc2 0, 0, r7, cr0, cr8, {4} │ │ - cdp2 13, 1, cr1, cr3, cr0, {6} │ │ - cdp2 4, 1, cr3, cr1, cr8, {7} │ │ + mrc2 14, 0, r9, cr3, cr13, {0} │ │ + mrc2 14, 0, r5, cr2, cr2, {6} │ │ + mrc2 12, 0, r3, cr2, cr8, {4} │ │ + mrc2 13, 0, r7, cr2, cr8, {0} │ │ + mrc2 15, 0, fp, cr0, cr8, {1} │ │ + cdp2 0, 1, cr5, cr1, cr0, {3} │ │ + mrc2 4, 0, r4, cr3, cr6, {4} │ │ + mrc2 4, 0, r4, cr0, cr13, {3} │ │ + cdp2 1, 1, cr8, cr0, cr8, {7} │ │ + mrc2 3, 0, r4, cr1, cr13, {7} │ │ + vcmla.f16 , q8, d5[1], #90 │ │ + mrc2 0, 0, r4, cr2, cr13, {5} │ │ + cdp2 3, 1, cr4, cr1, cr15, {4} │ │ + mrc2 0, 0, r6, cr0, cr11, {7} │ │ + mrc2 11, 0, r7, cr0, cr8, {1} @ │ │ + mrc2 13, 0, sp, cr0, cr9, {7} │ │ + mrc2 15, 0, r1, cr0, cr6, {6} │ │ + cdp2 0, 1, cr7, cr0, cr5, {6} │ │ + cdp2 13, 1, cr1, cr3, cr13, {7} │ │ + mrc2 5, 0, r3, cr1, cr5, {0} │ │ cdp2 12, 1, cr2, cr3, cr6, {3} │ │ lsls r2, r4, #1 │ │ │ │ 021149d4 >, unsigned int, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned int> > >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -227051,19 +227051,19 @@ │ │ ittt eq │ │ addeq sp, #36 @ 0x24 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ cmp r4, #48 @ 0x30 │ │ lsls r2, r4, #1 │ │ - adds r5, r5, #3 │ │ + adds r2, r3, #4 │ │ @ instruction: 0xfe112bcc │ │ lsls r2, r4, #1 │ │ - adcs r7, r5 │ │ - mrc2 5, 0, r1, cr0, cr8, {3} │ │ + sbcs r4, r3 │ │ + cdp2 5, 1, cr1, cr0, cr5, {5} │ │ mrc2 10, 0, sl, cr2, cr11, {6} @ │ │ mrc2 11, 0, r2, cr3, cr2, {1} @ │ │ lsls r2, r4, #1 │ │ │ │ 02114abc >, unsigned int, std::__ndk1::less > >, std::__ndk1::allocator > const, unsigned int> > >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -227132,19 +227132,19 @@ │ │ addeq sp, #40 @ 0x28 │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ cmp r3, #72 @ 0x48 │ │ lsls r2, r4, #1 │ │ - lsrs r6, r1 │ │ + lsrs r3, r7 │ │ @ instruction: 0xfe102ae4 │ │ lsls r2, r4, #1 │ │ - bl 2311798 │ │ - adds r1, r1, #5 │ │ + bl 233e798 │ │ + adds r6, r6, #5 │ │ mrc2 10, 0, r2, cr0, cr0, {3} @ │ │ lsls r2, r4, #1 │ │ │ │ 02114b7c >, Color*, std::__ndk1::less > >, std::__ndk1::allocator > const, Color*> > >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -227474,63 +227474,63 @@ │ │ vselvs.f32 s4, s6, s9 │ │ lsls r2, r4, #1 │ │ cmp r3, #62 @ 0x3e │ │ lsls r2, r4, #1 │ │ bvs.n 2114dcc >, Color*, std::__ndk1::less > >, std::__ndk1::allocator > const, Color*> > >&)@@Base+0x250> │ │ mcr2 11, 0, r2, cr15, cr12, {0} @ │ │ lsls r2, r4, #1 │ │ - bl 2202ac8 *& std::__ndk1::__tree > >, std::__ndk1::__map_value_compare > >, std::__ndk1::less, true>, std::__ndk1::allocator > > > >::__find_equal(std::__ndk1::__tree_const_iterator > >, std::__ndk1::__tree_node > >, void*>*, int>, std::__ndk1::__tree_end_node*>*&, std::__ndk1::__tree_node_base*&, unsigned int const&)@@Base+0xec> │ │ + bl 222fac8 │ │ cmp r2, #250 @ 0xfa │ │ lsls r2, r4, #1 │ │ bvs.n 2114f54 >, Color*, std::__ndk1::less > >, std::__ndk1::allocator > const, Color*> > >&)@@Base+0x28> │ │ mcr2 10, 0, r2, cr15, cr6, {6} @ │ │ lsls r2, r4, #1 │ │ - str r7, [sp, #676] @ 0x2a4 │ │ + str r7, [sp, #856] @ 0x358 │ │ mrc2 10, 0, r2, cr2, cr2, {5} @ │ │ lsls r2, r4, #1 │ │ - lsrs r4, r4, #19 │ │ + lsrs r1, r2, #20 │ │ mrc2 10, 0, r2, cr3, cr2, {4} @ │ │ lsls r2, r4, #1 │ │ add r0, sp, #644 @ 0x284 │ │ mrc2 10, 0, r2, cr3, cr0, {3} @ │ │ lsls r2, r4, #1 │ │ bpl.n 2114e4c >, Color*, std::__ndk1::less > >, std::__ndk1::allocator > const, Color*> > >&)@@Base+0x2d0> │ │ mcr2 10, 0, r2, cr15, cr0, {2} @ │ │ lsls r2, r4, #1 │ │ - subs r5, r7, r5 │ │ + subs r2, r5, r6 │ │ mrc2 10, 0, r2, cr0, cr0, {1} @ │ │ lsls r2, r4, #1 │ │ add r0, sp, #168 @ 0xa8 │ │ vselvs.f32 s4, s6, s28 │ │ lsls r2, r4, #1 │ │ - rev16 r5, r5 │ │ + hlt 0x001a │ │ @ instruction: 0xfe1029ee │ │ lsls r2, r4, #1 │ │ - ldrsb r0, [r0, r6] │ │ + ldrsb r5, [r5, r6] │ │ @ instruction: 0xfe1229c8 │ │ lsls r2, r4, #1 │ │ - ldrsb r6, [r3, r5] │ │ + ldrsb r3, [r1, r6] │ │ vselvs.f16 s4, s5, s9 │ │ lsls r2, r4, #1 │ │ - ldrsb r7, [r3, r4] │ │ + ldrsb r4, [r1, r5] │ │ vselvs.f16 s4, s5, s8 │ │ lsls r2, r4, #1 │ │ - str r6, [sp, #232] @ 0xe8 │ │ + str r6, [sp, #412] @ 0x19c │ │ @ instruction: 0xfe122964 │ │ lsls r2, r4, #1 │ │ - bne.n 2114e64 >, Color*, std::__ndk1::less > >, std::__ndk1::allocator > const, Color*> > >&)@@Base+0x2e8> │ │ + bne.n 2114ebe >, Color*, std::__ndk1::less > >, std::__ndk1::allocator > const, Color*> > >&)@@Base+0x342> │ │ @ instruction: 0xfe122944 │ │ lsls r2, r4, #1 │ │ - bl 1dc5b32 │ │ + bl 1df2b32 │ │ cmp r1, #36 @ 0x24 │ │ lsls r2, r4, #1 │ │ - bl 214db3e │ │ + bl 217ab3e >&, StarDatabase const&)@@Base+0x40a> │ │ cmp r1, #4 │ │ lsls r2, r4, #1 │ │ - str r5, [sp, #632] @ 0x278 │ │ + str r5, [sp, #812] @ 0x32c │ │ vcmla.f16 q1, q8, d4[1], #90 │ │ lsls r2, r4, #1 │ │ movs r7, #74 @ 0x4a │ │ lsls r2, r4, #1 │ │ │ │ 02114f2c >, Color*, std::__ndk1::less > >, std::__ndk1::allocator > const, Color*> > >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -227841,68 +227841,68 @@ │ │ addeq sp, #36 @ 0x24 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ movs r6, #216 @ 0xd8 │ │ lsls r2, r4, #1 │ │ - bl 2494e3a │ │ + bl 24c1e3a │ │ movs r6, #116 @ 0x74 │ │ lsls r2, r4, #1 │ │ movs r7, #218 @ 0xda │ │ lsls r2, r4, #1 │ │ - strb r3, [r1, #16] │ │ + strb r0, [r7, #16] │ │ mrc2 7, 0, r2, cr0, cr8, {5} │ │ lsls r2, r4, #1 │ │ - bx lr │ │ + blx r4 │ │ mrc2 7, 0, r2, cr3, cr6, {4} │ │ lsls r2, r4, #1 │ │ - bx fp │ │ + blxns r1 │ │ mrc2 7, 0, r2, cr3, cr6, {3} │ │ lsls r2, r4, #1 │ │ - adds r0, r2, r2 │ │ + adds r5, r7, r2 │ │ mrc2 7, 0, r2, cr0, cr0, {2} │ │ lsls r2, r4, #1 │ │ - bl 23c9e66 │ │ + bl 23f6e66 │ │ movs r7, #48 @ 0x30 │ │ lsls r2, r4, #1 │ │ - strb r4, [r1, #5] │ │ + strb r1, [r7, #5] │ │ cdp2 7, 1, cr2, cr2, cr14, {0} │ │ lsls r2, r4, #1 │ │ - lsrs r2, r5, #29 │ │ + lsrs r7, r2, #30 │ │ cdp2 6, 1, cr2, cr2, cr12, {7} │ │ lsls r2, r4, #1 │ │ - strb r7, [r5, r0] │ │ + strb r4, [r3, r1] │ │ cdp2 6, 1, cr2, cr2, cr12, {6} │ │ lsls r2, r4, #1 │ │ - beq.n 2115350 │ │ + beq.n 21151aa >, Color*, std::__ndk1::less > >, std::__ndk1::allocator > const, Color*> > >&)@@Base+0x27e> │ │ cdp2 6, 1, cr2, cr1, cr12, {5} │ │ lsls r2, r4, #1 │ │ - str r3, [sp, #152] @ 0x98 │ │ + str r3, [sp, #332] @ 0x14c │ │ cdp2 6, 1, cr2, cr2, cr8, {4} │ │ lsls r2, r4, #1 │ │ - ldmia r6!, {r2, r4, r7} │ │ + ldmia r6, {r0, r6, r7} │ │ cdp2 6, 1, cr2, cr2, cr8, {3} │ │ lsls r2, r4, #1 │ │ - bl 22ade9e │ │ + bl 22dae9e │ │ movs r6, #72 @ 0x48 │ │ lsls r2, r4, #1 │ │ - stc 14, cr15, [r0, #-68]! @ 0xffffffbc │ │ + stcl 14, cr15, [sp, #-68] @ 0xffffffbc │ │ movs r6, #40 @ 0x28 │ │ lsls r2, r4, #1 │ │ - str r2, [sp, #536] @ 0x218 │ │ + str r2, [sp, #716] @ 0x2cc │ │ cdp2 6, 1, cr2, cr0, cr6, {0} │ │ lsls r2, r4, #1 │ │ strh r4, [r3, #62] @ 0x3e │ │ cdp2 5, 1, cr2, cr3, cr4, {7} │ │ lsls r2, r4, #1 │ │ - adds r6, #214 @ 0xd6 │ │ + adds r7, #3 │ │ cdp2 5, 1, cr2, cr1, cr2, {6} │ │ lsls r2, r4, #1 │ │ - adds r6, #199 @ 0xc7 │ │ + adds r6, #244 @ 0xf4 │ │ cdp2 5, 1, cr2, cr1, cr2, {5} │ │ lsls r2, r4, #1 │ │ movs r3, #192 @ 0xc0 │ │ lsls r2, r4, #1 │ │ │ │ 021152b0 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -228059,17 +228059,17 @@ │ │ mov r0, r4 │ │ bl 20884bc >::~basic_teestream()@@Base+0xc8> │ │ blx 26ffaf0 │ │ movs r2, #250 @ 0xfa │ │ lsls r2, r4, #1 │ │ movs r2, #174 @ 0xae │ │ lsls r2, r4, #1 │ │ - subs r0, #50 @ 0x32 │ │ - @ instruction: 0xfe10e96e │ │ - mrc2 4, 0, r1, cr2, cr9, {5} │ │ + subs r0, #95 @ 0x5f │ │ + mrc2 9, 0, lr, cr0, cr11, {4} @ │ │ + cdp2 4, 1, cr1, cr2, cr6, {7} │ │ mrc2 1, 0, r2, cr0, cr0, {6} │ │ lsls r2, r4, #1 │ │ │ │ 02115460 >, unsigned long long>, std::__ndk1::__tree_node >, unsigned long long>, void*>*, int>, bool> std::__ndk1::__tree >, unsigned long long>, std::__ndk1::__map_value_compare >, std::__ndk1::__value_type >, unsigned long long>, std::__ndk1::less > >, true>, std::__ndk1::allocator >, unsigned long long> > >::__emplace_unique_key_args >, std::__ndk1::piecewise_construct_t const&, std::__ndk1::tuple >&&>, std::__ndk1::tuple<> >(std::__ndk1::basic_string_view > const&, std::__ndk1::piecewise_construct_t const&, std::__ndk1::tuple >&&>&&, std::__ndk1::tuple<>&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -229027,16 +229027,16 @@ │ │ subs r4, r1, r3 │ │ lsls r2, r4, #1 │ │ pop {r1, r2, r3, r7, pc} │ │ mrc2 4, 0, ip, cr3, cr14, {3} │ │ mrc2 3, 0, r3, cr3, cr1, {0} │ │ mrc2 14, 0, sl, cr4, cr14, {1} │ │ lsls r0, r4, #1 │ │ - strh r3, [r7, #58] @ 0x3a │ │ - mrc2 7, 0, r8, cr0, cr15, {2} │ │ + strh r0, [r5, #60] @ 0x3c │ │ + cdp2 7, 1, cr8, cr0, cr12, {4} │ │ cdp2 15, 1, cr10, cr0, cr14, {3} │ │ lsls r0, r4, #1 │ │ add r7, sp, #352 @ 0x160 │ │ lsls r0, r4, #1 │ │ adds r4, r5, r2 │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -229257,23 +229257,23 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ mov r0, r6 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - stmia r0!, {r0, r1, r3, r4, r5, r6, r7} │ │ + stmia r1!, {r3, r5} │ │ cdp2 6, 1, cr1, cr2, cr14, {7} │ │ lsls r2, r4, #1 │ │ cbnz r0, 21160b6 │ │ - cdp2 4, 1, cr2, cr3, cr5, {0} │ │ - mrc2 3, 0, r2, cr2, cr9, {2} │ │ - mrc2 3, 0, r6, cr2, cr1, {7} │ │ - @ instruction: 0xfe1059cd │ │ - vselvs.f16 s12, s6, s27 │ │ + mrc2 4, 0, r2, cr3, cr2, {1} │ │ + cdp2 3, 1, cr2, cr2, cr6, {4} │ │ + mrc2 4, 0, r6, cr2, cr14, {0} │ │ + mrc2 9, 0, r5, cr0, cr10, {7} @ │ │ + mrc2 9, 0, r6, cr3, cr10, {2} @ │ │ cdp2 6, 1, cr1, cr1, cr10, {2} │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ vpush {d8-d12} │ │ sub sp, #56 @ 0x38 │ │ @@ -229369,20 +229369,20 @@ │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ - cmp r1, #15 │ │ + cmp r1, #60 @ 0x3c │ │ cdp2 5, 1, cr1, cr0, cr10, {2} │ │ lsls r2, r4, #1 │ │ - ldr??.w pc, [sl, #3602] @ 0xe12 │ │ - stmia r0!, {r0, r3, r7} │ │ - mrc2 3, 0, r8, cr1, cr11, {1} │ │ + @ instruction: 0xf927fe12 │ │ + stmia r0!, {r1, r2, r4, r5, r7} │ │ + cdp2 3, 1, cr8, cr1, cr8, {3} │ │ mrc2 4, 0, r1, cr0, cr2, {3} │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8} │ │ @@ -229577,22 +229577,22 @@ │ │ ldrbne.w r0, [sp, #48] @ 0x30 │ │ movsne.w r0, r0, lsl #31 │ │ ldrne r0, [sp, #56] @ 0x38 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - @ instruction: 0x4796 │ │ + @ instruction: 0x47c3 │ │ mrc2 4, 0, r1, cr0, cr4, {0} │ │ lsls r2, r4, #1 │ │ - orrs r0, r4 │ │ - mrc2 14, 0, r9, cr2, cr11, {3} │ │ - cdp2 0, 1, cr2, cr2, cr14, {5} │ │ - cdp2 5, 1, cr10, cr2, cr5, {0} │ │ - mrc2 4, 0, r4, cr0, cr11, {1} │ │ + muls r5, r1 │ │ + cdp2 14, 1, cr9, cr2, cr8, {5} │ │ + mrc2 0, 0, r2, cr2, cr11, {6} │ │ + mrc2 5, 0, sl, cr2, cr2, {1} │ │ + cdp2 4, 1, cr4, cr0, cr8, {3} │ │ mrc2 2, 0, r1, cr1, cr2, {1} │ │ lsls r2, r4, #1 │ │ pop {r1, r3, r4, r5, pc} │ │ mrc2 5, 0, fp, cr3, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ @@ -229670,15 +229670,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - pop {r0, r3, r6, pc} │ │ + pop {r1, r2, r4, r5, r6, pc} │ │ mrc2 1, 0, r1, cr1, cr4, {5} │ │ lsls r2, r4, #1 │ │ cbz r0, 21164de │ │ cdp2 1, 1, cr1, cr3, cr6, {1} │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -230006,27 +230006,27 @@ │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ eors r6, r4 │ │ cmp r5, #24 │ │ strb r4, [r0, r1] │ │ movs r1, #251 @ 0xfb │ │ ands r1, r1 │ │ - movs r4, #135 @ 0x87 │ │ + movs r4, #180 @ 0xb4 │ │ cdp2 0, 1, cr1, cr0, cr2, {6} │ │ lsls r2, r4, #1 │ │ - ldr r3, [sp, #572] @ 0x23c │ │ - cdp2 3, 1, cr2, cr2, cr2, {3} │ │ - cdp2 13, 1, cr1, cr1, cr14, {3} │ │ - cdp2 3, 1, cr6, cr2, cr7, {4} │ │ - @ instruction: 0xfe11b9c8 │ │ - mrc2 1, 0, pc, cr1, cr13, {5} │ │ - cdp2 1, 1, cr5, cr2, cr7, {7} │ │ - @ instruction: 0xfe135969 │ │ - vselvs.f64 d7, d18, d24 │ │ - cdp2 0, 1, cr2, cr0, cr8, {2} │ │ + ldr r3, [sp, #752] @ 0x2f0 │ │ + cdp2 3, 1, cr2, cr2, cr15, {4} │ │ + mrc2 13, 0, r1, cr1, cr11, {4} │ │ + mrc2 3, 0, r6, cr2, cr4, {5} │ │ + mrc2 9, 0, fp, cr1, cr5, {7} @ │ │ + cdp2 1, 1, cr15, cr1, cr10, {7} │ │ + mrc2 2, 0, r5, cr2, cr4, {0} │ │ + mrc2 9, 0, r5, cr3, cr6, {4} @ │ │ + mrc2 11, 0, r7, cr2, cr5, {6} @ │ │ + mrc2 0, 0, r2, cr0, cr5, {3} │ │ cdp2 12, 1, cr8, cr1, cr12, {6} │ │ mrc2 13, 0, r0, cr3, cr14, {1} │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #16 │ │ @@ -230121,21 +230121,21 @@ │ │ cmp r1, r0 │ │ ittt eq │ │ addeq sp, #16 │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ - vmull.p8 , d6, d15 │ │ + @ instruction: 0xffb3fe0f │ │ lsrs r6, r4, #18 │ │ lsls r2, r4, #1 │ │ push {r3, r4, r6, r7} │ │ - mrc2 3, 0, sp, cr3, cr12, {7} │ │ + cdp2 4, 1, cr13, cr3, cr9, {1} │ │ mrc2 2, 0, fp, cr2, cr10, {7} │ │ - cdp2 7, 1, cr5, cr3, cr1, {0} │ │ + cdp2 7, 1, cr5, cr3, cr14, {1} │ │ mrc2 11, 0, r0, cr2, cr4, {6} @ │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ vpush {d8} │ │ sub sp, #24 │ │ @@ -230228,19 +230228,19 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ - @ instruction: 0xb71d │ │ + @ instruction: 0xb74a │ │ vselvs.f64 d0, d17, d6 │ │ lsls r2, r4, #1 │ │ add r3, sp, #720 @ 0x2d0 │ │ - mrc2 9, 0, r7, cr3, cr10, {6} @ │ │ + vselvs.f32 s14, s6, s14 │ │ @ instruction: 0xfe100acc │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ vpush {d8-d11} │ │ sub sp, #48 @ 0x30 │ │ @@ -230309,18 +230309,18 @@ │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldr r0, [r5, #116] @ 0x74 │ │ ldrh r1, [r7, #0] │ │ ldrsh r7, [r4, r6] │ │ subs r6, #124 @ 0x7c │ │ - ldr r3, [r5, r1] │ │ + ldr r0, [r3, r2] │ │ @ instruction: 0xfe100a6a │ │ lsls r2, r4, #1 │ │ - ldrsb r2, [r4, r1] │ │ + ldrsb r7, [r1, r2] │ │ @ instruction: 0xfe1209e2 │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d13} │ │ @@ -230444,21 +230444,21 @@ │ │ eors r6, r4 │ │ cmp r5, #24 │ │ strb r4, [r0, r1] │ │ movs r1, #251 @ 0xfb │ │ ands r1, r1 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - adds r5, r1, #5 │ │ + adds r2, r7, #5 │ │ vselvs.f16 s0, s1, s16 │ │ lsls r2, r4, #1 │ │ - ldc 14, cr15, [r8, #-72]! @ 0xffffffb8 │ │ - strb r5, [r7, #30] │ │ - @ instruction: 0xfe103a6a │ │ - vfmsl.f16 d3, s2, s7[0] │ │ + stcl 14, cr15, [r5, #-72]! @ 0xffffffb8 │ │ + strb r2, [r5, #31] │ │ + mrc2 10, 0, r3, cr0, cr7, {4} @ │ │ + vcmla.f16 , , d0[1], #90 │ │ vcmla.f16 q0, q1, d12[1], #90 │ │ lsls r2, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ movs r0, #4 │ │ blx 26ffb80 │ │ @@ -230663,21 +230663,21 @@ │ │ eors r6, r4 │ │ cmp r5, #24 │ │ strb r4, [r0, r1] │ │ movs r1, #251 @ 0xfb │ │ ands r1, r1 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - bl 2009c18 │ │ + bl 2036c18 │ │ lsls r2, r5, #30 │ │ lsls r2, r4, #1 │ │ uxth r4, r6 │ │ - mcr2 2, 0, r5, cr15, cr5, {6} │ │ - mrc2 5, 0, r7, cr2, cr4, {0} │ │ - mrc2 9, 0, r1, cr0, cr4, {5} @ │ │ + cdp2 3, 0, cr5, cr15, cr2, {0} │ │ + cdp2 5, 1, cr7, cr2, cr1, {2} │ │ + @ instruction: 0xfe1019e1 │ │ mrc2 6, 0, r8, cr1, cr12, {1} │ │ cdp2 6, 1, cr0, cr3, cr10, {0} │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #56 @ 0x38 │ │ @@ -230836,23 +230836,23 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ blx 26ffaf0 │ │ nop │ │ - cbz r1, 21171da │ │ + cbz r6, 21171e4 │ │ mrc2 5, 0, r0, cr1, cr2, {4} │ │ lsls r2, r4, #1 │ │ add r0, sp, #568 @ 0x238 │ │ mrc2 4, 0, r0, cr3, cr2, {1} │ │ lsls r2, r4, #1 │ │ - @ instruction: 0xef99fe11 │ │ + vmov.i8 d31, #97 @ 0x61 │ │ add r5, pc, #24 @ (adr r5, 21171fc ) │ │ - cdp2 4, 1, cr3, cr3, cr8, {4} │ │ + mrc2 4, 0, r3, cr3, cr5, {5} │ │ vselvs.f32 s20, s5, s28 │ │ mrc2 5, 0, fp, cr3, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ mov r2, r1 │ │ ldr r1, [pc, #200] @ (21172c4 ) │ │ @@ -230929,15 +230929,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - add r7, sp, #324 @ 0x144 │ │ + add r7, sp, #504 @ 0x1f8 │ │ mrc2 3, 0, r0, cr1, cr12, {5} │ │ lsls r2, r4, #1 │ │ add r1, sp, #600 @ 0x258 │ │ cdp2 3, 1, cr0, cr3, cr10, {1} │ │ lsls r2, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ @@ -231027,15 +231027,15 @@ │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - stc 14, cr15, [r3, #-68] @ 0xffffffbc │ │ + ldc 14, cr15, [r0, #-68]! @ 0xffffffbc │ │ lsls r0, r3, #11 │ │ lsls r2, r4, #1 │ │ lsls r4, r5, #7 │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -231183,15 +231183,15 @@ │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ str r2, [r4, #84] @ 0x54 │ │ cdp2 1, 1, cr0, cr3, cr6, {5} │ │ lsls r2, r4, #1 │ │ add r7, pc, #608 @ (adr r7, 2117824 ) │ │ - mrc2 11, 0, lr, cr3, cr7, {5} @ │ │ + @ instruction: 0xfe13ebe4 │ │ mrc2 0, 0, r0, cr1, cr12, {1} │ │ lsls r2, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #48 @ 0x30 │ │ mov r6, r1 │ │ @@ -231337,15 +231337,15 @@ │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ str r6, [r2, #56] @ 0x38 │ │ mrc2 15, 0, pc, cr3, cr10, {6} │ │ lsls r1, r4, #1 │ │ add r3, sp, #560 @ 0x230 │ │ - @ instruction: 0xfe13e9eb │ │ + mrc2 10, 0, lr, cr3, cr8, {0} @ │ │ mrc2 14, 0, pc, cr1, cr0, {3} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ vpush {d8} │ │ sub sp, #72 @ 0x48 │ │ @@ -231446,20 +231446,20 @@ │ │ lsls r0, r0, #31 │ │ beq.n 21178b4 │ │ ldr r0, [sp, #52] @ 0x34 │ │ b.n 21178b0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ - ldr r4, [pc, #80] @ (211790c ) │ │ + ldr r4, [pc, #260] @ (21179c0 ) │ │ cdp2 14, 1, cr15, cr0, cr10, {0} │ │ lsls r1, r4, #1 │ │ - lsrs r3, r6, #12 │ │ + lsrs r0, r4, #13 │ │ cdp2 5, 1, cr10, cr2, cr10, {0} │ │ - mrc2 7, 0, sl, cr3, cr8, {5} │ │ + cdp2 7, 1, cr10, cr3, cr5, {7} │ │ cdp2 13, 1, cr15, cr2, cr10, {3} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ sub sp, #24 │ │ ldr r2, [pc, #104] @ (2117944 ) │ │ @@ -231498,15 +231498,15 @@ │ │ vpopeq {d8} │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - asrs r3, r3, #2 │ │ + asrs r0, r1, #3 │ │ mrc2 12, 0, pc, cr0, cr8, {6} │ │ lsls r1, r4, #1 │ │ ldc2 0, cr0, [sl], {97} @ 0x61 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ ldr r2, [pc, #236] @ (2117a44 ) │ │ @@ -231594,19 +231594,19 @@ │ │ cmp r0, #0 │ │ itttt ne │ │ ldrbne.w r0, [sp, #20] │ │ movsne.w r0, r0, lsl #31 │ │ ldrne r0, [sp, #28] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - cmp r5, #183 @ 0xb7 │ │ + cmp r5, #228 @ 0xe4 │ │ mrc2 12, 0, pc, cr1, cr10, {2} │ │ lsls r1, r4, #1 │ │ add r7, pc, #512 @ (adr r7, 2117c50 ) │ │ - mrc2 3, 0, ip, cr3, cr3, {5} │ │ + cdp2 3, 1, cr12, cr3, cr0, {7} │ │ mrc2 11, 0, pc, cr2, cr4, {5} @ │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ sub sp, #24 │ │ ldr r2, [pc, #104] @ (2117acc ) │ │ @@ -231645,15 +231645,15 @@ │ │ vpopeq {d8} │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - ldcl 14, cr15, [r2], #-64 @ 0xffffffc0 │ │ + ldc 14, cr15, [pc], {16} │ │ @ instruction: 0xfb500061 │ │ @ instruction: 0xfb120061 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ sub sp, #24 │ │ ldr r2, [pc, #104] @ (2117b4c ) │ │ @@ -231762,18 +231762,18 @@ │ │ str.w r6, [r8] │ │ str.w r0, [r8, #12] │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r6 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ - asrs r7, r1, #1 │ │ - mrc2 4, 0, sl, cr0, cr5, {2} │ │ - cdp2 7, 1, cr0, cr2, cr5, {3} │ │ - mrc2 4, 0, r8, cr2, cr0, {7} │ │ + asrs r4, r7, #1 │ │ + cdp2 4, 1, cr10, cr0, cr2, {4} │ │ + mrc2 7, 0, r0, cr2, cr2, {4} │ │ + mrc2 5, 0, r8, cr2, cr13, {0} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ mov r2, r1 │ │ ldr r1, [pc, #200] @ (2117ce8 ) │ │ mov r4, r0 │ │ @@ -231849,15 +231849,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - add r3, pc, #652 @ (adr r3, 2117f78 ) │ │ + add r3, pc, #832 @ (adr r3, 211802c ) │ │ mrc2 9, 0, pc, cr2, cr8, {4} @ │ │ lsls r1, r4, #1 │ │ ldr r1, [sp, #208] @ 0xd0 │ │ vselvs.f16 s30, s6, s12 │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -231966,22 +231966,22 @@ │ │ ldrb.w r0, [sp, #8] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #16] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - ldmia r2, {r1, r2, r6, r7} │ │ + ldmia r2!, {r0, r1, r4, r5, r6, r7} │ │ vcmla.f16 d15, d16, d10[1], #90 │ │ lsls r1, r4, #1 │ │ - iteet │ │ - mrc2 3, 0, r8, cr2, cr3, {2} │ │ - cdp2al 7, 1, cr15, cr2, cr6, {7} │ │ - lslal r1, r4, #1 │ │ - push {r4, r5, r6, r7, lr} │ │ + stmia r0!, {r5} │ │ + cdp2 3, 1, cr8, cr2, cr0, {4} │ │ + cdp2 7, 1, cr15, cr2, cr6, {7} │ │ + lsls r1, r4, #1 │ │ + push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r5, r1 │ │ ldr r1, [pc, #112] @ (2117eb0 ) │ │ mov r6, r2 │ │ mov r4, r0 │ │ add r1, pc │ │ @@ -232023,17 +232023,17 @@ │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r6 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ add r4, pc, #336 @ (adr r4, 2118004 ) │ │ - mcr2 2, 0, r8, cr15, cr15, {2} │ │ - mrc2 0, 0, ip, cr2, cr4, {0} │ │ - mrc2 2, 0, r8, cr1, cr11, {1} │ │ + cdp2 2, 0, cr8, cr15, cr12, {4} │ │ + cdp2 0, 1, cr12, cr2, cr1, {2} │ │ + cdp2 2, 1, cr8, cr1, cr8, {3} │ │ mrc2 5, 0, fp, cr2, cr0, {5} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ sub sp, #24 │ │ ldr r2, [pc, #104] @ (2117f34 ) │ │ mov r4, r0 │ │ ldr r0, [pc, #104] @ (2117f38 ) │ │ @@ -232070,15 +232070,15 @@ │ │ vpopeq {d8} │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - add pc, ip │ │ + cmp r4, r2 │ │ cdp2 6, 1, cr15, cr0, cr8, {7} │ │ lsls r1, r4, #1 │ │ subw r0, sl, #2145 @ 0x861 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ @@ -232520,24 +232520,24 @@ │ │ bne.n 2118434 │ │ vldr d16, [r0] │ │ ldr r0, [r0, #8] │ │ str r0, [sp, #24] │ │ vstr d16, [sp, #16] │ │ b.n 211843e │ │ nop │ │ - add r0, pc, #980 @ (adr r0, 21187e8 ) │ │ - @ instruction: 0xfe113940 │ │ - mrc2 15, 0, sp, cr3, cr7, {2} │ │ + add r1, pc, #136 @ (adr r1, 211849c ) │ │ + @ instruction: 0xfe11396d │ │ + cdp2 15, 1, cr13, cr3, cr4, {4} │ │ mrc2 6, 0, r9, cr1, cr10, {5} │ │ cdp2 0, 1, cr0, cr3, cr0, {0} │ │ movs r0, r0 │ │ ldr r2, [r1, r2] │ │ cdp2 6, 1, cr6, cr3, cr6, {3} │ │ subs r7, #102 @ 0x66 │ │ - lsls r2, r7, #7 │ │ + lsls r7, r4, #8 │ │ mrc2 13, 0, pc, cr2, cr1, {3} │ │ muls r7, r7 │ │ ldrd r2, r1, [r0, #4] │ │ add r0, sp, #16 │ │ bl 207d350 │ │ add r0, sp, #32 │ │ add r1, sp, #16 │ │ @@ -232608,29 +232608,29 @@ │ │ blx 26ffaf0 │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ adcs.w r0, lr, #14745600 @ 0xe10000 │ │ adds.w r0, r4, #97 @ 0x61 │ │ ldrsb r0, [r5, r6] │ │ - mrc2 11, 0, fp, cr3, cr10, {1} @ │ │ - mrc2 15, 0, r9, cr2, cr10, {1} │ │ - cdp2 15, 1, cr9, cr1, cr1, {1} │ │ - @ instruction: 0xfe11fbeb │ │ - cdp2 14, 1, cr9, cr2, cr2, {3} │ │ - mrc2 6, 0, r4, cr1, cr12, {4} │ │ - mrc2 3, 0, r8, cr1, cr4, {0} │ │ + @ instruction: 0xfe13bb67 │ │ + cdp2 15, 1, cr9, cr2, cr7, {3} │ │ + cdp2 15, 1, cr9, cr1, cr14, {2} │ │ + mrc2 12, 0, pc, cr1, cr8, {0} │ │ + cdp2 14, 1, cr9, cr2, cr15, {4} │ │ + cdp2 6, 1, cr4, cr1, cr9, {6} │ │ + cdp2 3, 1, cr8, cr1, cr1, {2} │ │ cdp2 2, 1, cr7, cr1, cr4, {4} │ │ - cdp2 4, 1, cr2, cr3, cr12, {1} │ │ - mrc2 14, 0, r9, cr1, cr0, {2} │ │ - mrc2 1, 0, r2, cr1, cr11, {6} │ │ + mrc2 4, 0, r2, cr3, cr9, {2} │ │ + mrc2 14, 0, r9, cr1, cr13, {3} │ │ + cdp2 2, 1, cr2, cr1, cr8, {0} │ │ cdp2 2, 1, cr15, cr2, cr0, {3} │ │ lsls r1, r4, #1 │ │ - ldrb r1, [r1, #19] │ │ - cdp2 4, 1, cr14, cr2, cr6, {2} │ │ + ldrb r6, [r6, #19] │ │ + mrc2 4, 0, lr, cr2, cr3, {3} │ │ mcr2 5, 0, fp, cr15, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r2, r1 │ │ ldr r1, [pc, #76] @ (2118590 ) │ │ mov r4, r0 │ │ mov r0, r2 │ │ @@ -232657,15 +232657,15 @@ │ │ strb r5, [r0, #4] │ │ str.w r8, [r4, #12] │ │ str r0, [r4, #0] │ │ str r1, [r0, #0] │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - cbnz r6, 21185a2 │ │ + cbnz r3, 21185ae │ │ cdp2 2, 1, cr15, cr1, cr6, {2} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d13} │ │ @@ -232894,21 +232894,21 @@ │ │ ldrh r1, [r7, #0] │ │ ldrsh r7, [r4, r6] │ │ subs r6, #124 @ 0x7c │ │ movs r0, r0 │ │ movs r0, r0 │ │ strh r0, [r0, #36] @ 0x24 │ │ asrs r6, r5 │ │ - lsls r2, r7, #5 │ │ + lsls r7, r4, #6 │ │ cdp2 0, 1, cr15, cr1, cr6, {0} │ │ lsls r1, r4, #1 │ │ - bl 1fe6470 │ │ - ldr r2, [sp, #736] @ 0x2e0 │ │ - cdp2 2, 1, cr13, cr1, cr13, {5} │ │ - mrc2 2, 0, r3, cr2, cr7, {6} │ │ + bl 2013470 │ │ + ldr r2, [sp, #916] @ 0x394 │ │ + mrc2 2, 0, sp, cr1, cr10, {6} │ │ + cdp2 3, 1, cr3, cr2, cr4, {0} │ │ mrc2 15, 0, r8, cr3, cr6, {2} │ │ cdp2 14, 1, cr14, cr3, cr0, {2} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #24 │ │ @@ -232948,19 +232948,19 @@ │ │ addeq sp, #24 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ mov r0, r6 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ - ittt vs │ │ - cdp2vs 13, 1, cr14, cr0, cr8, {2} │ │ - lslvs r1, r4, #1 │ │ - stcvs 0, cr0, [ip, #-388] @ 0xfffffe7c │ │ - push {r4, r6, r7, lr} │ │ + iteee hi │ │ + cdp2hi 13, 1, cr14, cr0, cr8, {2} │ │ + lslls r1, r4, #1 │ │ + stcls 0, cr0, [ip, #-388] @ 0xfffffe7c │ │ + pushls {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ movs r0, #4 │ │ blx 26ffb80 │ │ ldr r1, [pc, #16] @ (21188fc ) │ │ movs r2, #0 │ │ str r2, [r4, #12] │ │ @@ -233186,32 +233186,32 @@ │ │ ldrne r0, [sp, #32] │ │ blxne 26ffad0 │ │ mov r0, r4 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ ldr r0, [r5, #48] @ 0x30 │ │ ldr r6, [pc, #440] @ (2118cf4 ) │ │ - adds r0, r4, #6 │ │ + adds r5, r1, #7 │ │ cdp2 12, 1, cr14, cr1, cr0, {5} │ │ lsls r1, r4, #1 │ │ str r5, [sp, #352] @ 0x160 │ │ - vselvs.f32 s6, s7, s10 │ │ - cdp2 13, 1, cr1, cr0, cr10, {5} │ │ - cdp2 13, 1, cr0, cr1, cr6, {4} │ │ - @ instruction: 0xfe131b44 │ │ - cdp2 7, 1, cr9, cr2, cr13, {1} │ │ + mrc2 10, 0, r3, cr3, cr2, {5} @ │ │ + mrc2 13, 0, r1, cr0, cr7, {6} │ │ + mrc2 13, 0, r0, cr1, cr3, {5} │ │ + mrc2 11, 0, r1, cr3, cr1, {3} @ │ │ + mrc2 7, 0, r9, cr2, cr10, {2} │ │ mrc2 2, 0, r8, cr1, cr8, {3} │ │ lsls r0, r4, #1 │ │ strh r2, [r3, #18] │ │ lsls r0, r4, #1 │ │ - ldmia r7!, {r0, r3, r5} │ │ - cdp2 5, 1, cr13, cr2, cr13, {4} │ │ + ldmia r7!, {r1, r2, r4, r6} │ │ + mrc2 5, 0, sp, cr2, cr10, {5} │ │ @ instruction: 0xfe11eac4 │ │ lsls r1, r4, #1 │ │ - ldrsb r7, [r7, r5] │ │ + ldrsb r4, [r5, r6] │ │ mrc2 5, 0, fp, cr1, cr0, {5} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ sub sp, #24 │ │ ldr r2, [pc, #104] @ (2118be8 ) │ │ mov r4, r0 │ │ ldr r0, [pc, #104] @ (2118bec ) │ │ @@ -233248,15 +233248,15 @@ │ │ vpopeq {d8} │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - blt.n 2118c98 │ │ + blt.n 2118af2 │ │ mrc2 10, 0, lr, cr0, cr4, {1} @ │ │ lsls r1, r4, #1 │ │ ldrd r0, r0, [r6, #388]! @ 0x184 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ vpush {d8-d11} │ │ @@ -233554,32 +233554,32 @@ │ │ vcvt.u32.f32 s4, s12 │ │ vcvt.u32.f32 s6, s8 │ │ vmov r3, s0 │ │ vmov r2, s2 │ │ vmov r1, s4 │ │ vmov r0, s6 │ │ b.n 2118ff8 │ │ - adds r7, #173 @ 0xad │ │ - mrc2 10, 0, r1, cr0, cr12, {7} @ │ │ + adds r7, #218 @ 0xda │ │ + vselvs.f64 d1, d0, d25 │ │ cdp2 0, 1, cr0, cr1, cr0, {0} │ │ movs r0, r0 │ │ - cmp r5, #95 @ 0x5f │ │ + cmp r5, #140 @ 0x8c │ │ cdp2 13, 1, cr4, cr3, cr0, {0} │ │ - vselvs.f32 s2, s7, s2 │ │ - cdp2 3, 1, cr13, cr1, cr2, {2} │ │ - cdp2 3, 1, cr13, cr1, cr8, {1} │ │ + vselvs.f32 s2, s7, s29 │ │ + cdp2 3, 1, cr13, cr1, cr15, {3} │ │ + mrc2 3, 0, sp, cr1, cr5, {2} │ │ cdp2 7, 1, cr8, cr1, cr8, {6} │ │ mrc2 3, 0, r9, cr3, cr12, {6} │ │ - mrc2 2, 0, sp, cr3, cr11, {3} │ │ + cdp2 2, 1, cr13, cr3, cr8, {5} │ │ vcmla.f16 d14, d17, d2[0], #90 │ │ lsls r1, r4, #1 │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ - cmp r3, #39 @ 0x27 │ │ + cmp r3, #84 @ 0x54 │ │ vcmla.f16 d9, d3, d8[0], #90 │ │ lsrs r3, r0, #24 │ │ lsrs r2, r0, #16 │ │ lsrs r1, r0, #8 │ │ uxtb r2, r2 │ │ lsls r3, r3, #24 │ │ orr.w r2, r3, r2, lsl #16 │ │ @@ -233837,17 +233837,17 @@ │ │ vcvt.u32.f32 s6, s8 │ │ vmov r2, s0 │ │ vmov r3, s2 │ │ vmov r1, s4 │ │ vmov r0, s6 │ │ b.n 2119390 │ │ nop │ │ - asrs r6, r5, #28 │ │ - cdp2 12, 1, cr10, cr1, cr1, {0} │ │ - mrc2 3, 0, r7, cr2, cr1, {3} │ │ + asrs r3, r3, #29 │ │ + cdp2 12, 1, cr10, cr1, cr14, {1} │ │ + mrc2 3, 0, r7, cr2, cr14, {4} │ │ vcmla.f16 d9, d1, d8[0], #90 │ │ lsrs r2, r0, #24 │ │ lsrs r3, r0, #16 │ │ lsrs r1, r0, #8 │ │ uxtb r3, r3 │ │ uxtb r1, r1 │ │ lsls r3, r3, #16 │ │ @@ -234106,17 +234106,17 @@ │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ @ instruction: 0xe9ac0061 │ │ - ldr r7, [pc, #660] @ (2119964 ) │ │ - cdp2 15, 1, cr4, cr1, cr6, {2} │ │ - @ instruction: 0xfe1289e3 │ │ + ldr r7, [pc, #840] @ (2119a18 ) │ │ + mrc2 15, 0, r4, cr1, cr3, {3} │ │ + mrc2 10, 0, r8, cr2, cr0, {0} @ │ │ mrc2 15, 0, sp, cr2, cr0, {2} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ mov r5, r0 │ │ movs r0, #20 │ │ @@ -234162,15 +234162,15 @@ │ │ mov r0, r4 │ │ blx r1 │ │ blx 26ffaf0 │ │ nop │ │ b.n 21198c0 │ │ lsls r1, r4, #1 │ │ ldrh r4, [r3, #28] │ │ - cdp2 7, 0, cr10, cr15, cr2, {3} │ │ + cdp2 7, 0, cr10, cr15, cr15, {4} │ │ mrc2 5, 0, fp, cr1, cr0, {6} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ movs r0, #4 │ │ blx 26ffb80 │ │ ldr r1, [pc, #16] @ (211977c ) │ │ movs r2, #0 │ │ @@ -234276,15 +234276,15 @@ │ │ eors r6, r4 │ │ cmp r5, #24 │ │ strb r4, [r0, r1] │ │ movs r1, #251 @ 0xfb │ │ ands r1, r1 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - cmp r4, #35 @ 0x23 │ │ + cmp r4, #80 @ 0x50 │ │ cdp2 14, 1, cr13, cr0, cr2, {1} │ │ lsls r1, r4, #1 │ │ rors r1, r0 │ │ mrc2 9, 0, r8, cr3, cr6, {0} @ │ │ vdot.bf16 , , d0[1] │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -234327,15 +234327,15 @@ │ │ addeq sp, #24 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ mov r0, r6 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ - asrs r0, r1, #2 │ │ + asrs r5, r6, #2 │ │ cdp2 13, 1, cr13, cr0, cr0, {0} │ │ lsls r1, r4, #1 │ │ bgt.n 21198ac │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -234430,19 +234430,19 @@ │ │ ldr r1, [r0, #4] │ │ mov r0, r4 │ │ blx r1 │ │ blx 26ffaf0 │ │ nop │ │ bgt.n 211992c │ │ lsls r1, r4, #1 │ │ - stmia r6!, {r0, r3, r4, r7} │ │ + stmia r6!, {r1, r2, r6, r7} │ │ cdp2 14, 1, cr13, cr1, cr6, {3} │ │ lsls r1, r4, #1 │ │ ldrh r0, [r5, #6] │ │ - mcr2 4, 0, sl, cr15, cr6, {5} │ │ + cdp2 4, 0, cr10, cr15, cr3, {7} │ │ @ instruction: 0xfe11dbcc │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ movs r0, #4 │ │ blx 26ffb80 │ │ @@ -234553,15 +234553,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - strh r5, [r0, #54] @ 0x36 │ │ + strh r2, [r6, #54] @ 0x36 │ │ mrc2 11, 0, sp, cr1, cr0, {1} @ │ │ lsls r1, r4, #1 │ │ ldrb r4, [r2, #27] │ │ vselvs.f32 s26, s7, s5 │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ @@ -234620,15 +234620,15 @@ │ │ addeq sp, #24 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ mov r0, r6 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ - add r4, sp, #264 @ 0x108 │ │ + add r4, sp, #444 @ 0x1bc │ │ vselvs.f32 s26, s0, s17 │ │ lsls r1, r4, #1 │ │ bls.n 2119bd4 │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ @@ -234687,15 +234687,15 @@ │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - strh r1, [r7, #28] │ │ + strh r6, [r4, #30] │ │ vselvs.f16 s26, s5, s16 │ │ lsls r1, r4, #1 │ │ bls.n 2119d38 │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ @@ -234754,15 +234754,15 @@ │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - lsrs r5, r0, #1 │ │ + lsrs r2, r6, #1 │ │ vcmla.f16 , q9, d4[1], #90 │ │ lsls r1, r4, #1 │ │ bhi.n 2119c94 │ │ lsls r1, r4, #1 │ │ bmi.n 2119cf0 │ │ bmi.n 2119cf2 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -234857,15 +234857,15 @@ │ │ eors r6, r4 │ │ cmp r5, #24 │ │ strb r4, [r0, r1] │ │ movs r1, #251 @ 0xfb │ │ ands r1, r1 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - movs r6, #91 @ 0x5b │ │ + movs r6, #136 @ 0x88 │ │ vfmsl.f16 , d0, d2[1] │ │ lsls r1, r4, #1 │ │ subs r3, #249 @ 0xf9 │ │ cdp2 3, 1, cr8, cr3, cr14, {2} │ │ mcr2 7, 0, sp, cr15, cr8, {4} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -234928,15 +234928,15 @@ │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ subs r2, #243 @ 0xf3 │ │ mrc2 7, 0, sp, cr3, cr2, {1} │ │ lsls r1, r4, #1 │ │ - movs r5, #17 │ │ + movs r5, #62 @ 0x3e │ │ cdp2 6, 1, cr13, cr0, cr4, {6} │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ movs r0, #4 │ │ blx 26ffb80 │ │ @@ -235021,17 +235021,17 @@ │ │ add sp, #8 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r4 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ strh r2, [r2, #24] │ │ - mcr2 9, 0, lr, cr15, cr1, {1} @ │ │ - cdp2 14, 1, cr9, cr0, cr14, {6} │ │ - vselvs.f16 s28, s2, s18 │ │ + mcr2 9, 0, lr, cr15, cr14, {2} @ │ │ + mrc2 14, 0, r9, cr0, cr11, {7} │ │ + mrc2 9, 0, lr, cr1, cr6, {1} @ │ │ mrc2 5, 0, fp, cr0, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r5, r1 │ │ ldr r1, [pc, #112] @ (211a08c ) │ │ mov r6, r2 │ │ mov r4, r0 │ │ @@ -235074,17 +235074,17 @@ │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r6 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ strh r0, [r7, #18] │ │ - vcmla.f16 d14, d31, d10[0], #0 │ │ - mrc2 14, 0, r9, cr0, cr8, {1} │ │ - vcmla.f16 q7, , d6[1], #90 │ │ + vfmal.f16 d14, s31, s15[0] │ │ + cdp2 14, 1, cr9, cr0, cr5, {3} │ │ + vfmsl.f16 d14, s3, s6[0] │ │ mrc2 5, 0, fp, cr0, cr0, {5} │ │ add r7, sp, #8 │ │ mov r5, r0 │ │ ldr r0, [pc, #164] @ (211a148 ) │ │ mov r4, r1 │ │ movs r1, #8 │ │ add r0, pc │ │ @@ -235155,22 +235155,22 @@ │ │ pop {r4, r5, r7, pc} │ │ movs r0, #1 │ │ pop {r4, r5, r7, pc} │ │ movs r0, #0 │ │ pop {r4, r5, r7, pc} │ │ movs r0, #5 │ │ pop {r4, r5, r7, pc} │ │ - b.n 211a5de │ │ + b.n 211a638 │ │ mrc2 4, 0, r5, cr1, cr6, {4} │ │ - mrc2 1, 0, r4, cr3, cr13, {4} │ │ - cdp2 13, 1, cr7, cr2, cr4, {2} │ │ - cdp2 13, 1, cr5, cr2, cr0, {6} │ │ + cdp2 1, 1, cr4, cr3, cr10, {6} │ │ + mrc2 13, 0, r7, cr2, cr1, {3} │ │ + cdp2 13, 1, cr5, cr2, cr13, {7} │ │ mrc2 15, 0, r7, cr2, cr10, {7} │ │ - mcr2 2, 0, r4, cr15, cr8, {1} │ │ - mrc2 1, 0, r4, cr1, cr8, {2} │ │ + cdp2 2, 0, cr4, cr15, cr5, {3} │ │ + cdp2 1, 1, cr4, cr1, cr5, {4} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #32 │ │ mov r8, r0 │ │ ldr r0, [pc, #196] @ (211a23c ) │ │ mov r5, r3 │ │ @@ -235620,15 +235620,15 @@ │ │ blx 2701c30 │ │ add r0, sp, #28 │ │ blx 2704880 │ │ blx 26ffaf0 │ │ nop │ │ bne.n 211a6dc , std::__ndk1::allocator >::~basic_istringstream()@@Base+0x8> │ │ lsls r1, r4, #1 │ │ - cbnz r1, 211a634 │ │ + cbnz r6, 211a63e │ │ mrc2 3, 0, sp, cr1, cr10, {2} │ │ lsls r1, r4, #1 │ │ bcs.n 211a634 │ │ lsls r1, r4, #1 │ │ bne.n 211a600 │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -236024,16 +236024,16 @@ │ │ blx 2701c30 │ │ add r0, sp, #20 │ │ blx 2704880 │ │ blx 26ffaf0 │ │ ldmia r4!, {r2, r3, r5, r6, r7} │ │ lsls r1, r4, #1 │ │ adds r0, #128 @ 0x80 │ │ - mrc2 9, 0, r9, cr3, cr10, {3} @ │ │ - @ instruction: 0xfe0f996e │ │ + vselvs.f16 s18, s7, s15 │ │ + mcr2 9, 0, r9, cr15, cr11, {4} @ │ │ cdp2 14, 0, cr12, cr15, cr0, {2} │ │ lsls r1, r4, #1 │ │ ldmia r5!, {r2} │ │ lsls r1, r4, #1 │ │ ldmia r3!, {r2, r5, r6, r7} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -236174,16 +236174,16 @@ │ │ blx 2701c30 │ │ add r0, sp, #20 │ │ blx 2704880 │ │ blx 26ffaf0 │ │ ldmia r3, {r3, r7} │ │ lsls r1, r4, #1 │ │ cmp r6, #240 @ 0xf0 │ │ - cdp2 7, 1, cr9, cr3, cr12, {7} │ │ - cdp2 7, 0, cr9, cr15, cr0, {7} │ │ + vfmsl.f16 d9, s6, s2[1] │ │ + vcmla.f16 d9, d15, d13[0], #0 │ │ mcr2 12, 0, ip, cr15, cr2, {5} │ │ lsls r1, r4, #1 │ │ ldmia r3!, {r1, r2, r4, r5, r6} │ │ lsls r1, r4, #1 │ │ ldmia r2, {r1, r2, r4, r6} │ │ lsls r1, r4, #1 │ │ │ │ @@ -236383,16 +236383,16 @@ │ │ blx 2701c30 │ │ add r0, sp, #36 @ 0x24 │ │ blx 2704880 │ │ blx 26ffaf0 │ │ nop │ │ ldmia r1!, {r2, r3, r5, r6, r7} │ │ lsls r1, r4, #1 │ │ - cbz r5, 211adf8 │ │ - cdp2 2, 1, cr11, cr1, cr9, {6} │ │ + cbz r2, 211ae04 │ │ + mrc2 2, 0, fp, cr1, cr6, {7} │ │ @ instruction: 0xfe11cbca │ │ lsls r1, r4, #1 │ │ ldmia r2, {r1, r2, r3, r7} │ │ lsls r1, r4, #1 │ │ ldmia r1, {r1, r4, r5, r6} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -236574,15 +236574,15 @@ │ │ blx 2701c30 │ │ add r0, sp, #28 │ │ blx 2704880 │ │ blx 26ffaf0 │ │ nop │ │ stmia r7!, {r3, r4, r5, r6, r7} │ │ lsls r1, r4, #1 │ │ - cbz r1, 211af94 │ │ + cbz r6, 211af9e │ │ mrc2 9, 0, ip, cr1, cr10, {6} @ │ │ lsls r1, r4, #1 │ │ ldmia r0!, {r1, r2, r3, r4, r7} │ │ lsls r1, r4, #1 │ │ stmia r7!, {r1, r7} │ │ lsls r1, r4, #1 │ │ ldr r1, [r2, #0] │ │ @@ -236741,15 +236741,15 @@ │ │ bl 211b10c >* std::__ndk1::vector >, std::__ndk1::allocator > > >::__emplace_back_slow_path > >(std::__ndk1::unique_ptr >&&)@@Base+0x12a> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (211b118 >* std::__ndk1::vector >, std::__ndk1::allocator > > >::__emplace_back_slow_path > >(std::__ndk1::unique_ptr >&&)@@Base+0x136>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldr r5, [pc, #492] @ (211b308 const&, ObserverFrame::CoordinateSystem)@@Base+0x10>) │ │ + ldr r5, [pc, #672] @ (211b3bc const&)@@Base+0x4>) │ │ Address 0x211b11a is out of bounds. │ │ │ │ │ │ 0211b11c , std::__ndk1::allocator >* std::__ndk1::vector, std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__emplace_back_slow_path, std::__ndk1::allocator > >(std::__ndk1::basic_string, std::__ndk1::allocator >&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -238469,19 +238469,19 @@ │ │ b.w 26fed94 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ movs r0, r0 │ │ orrs r4, r6 │ │ lsrs r3, r3, #31 │ │ eors r1, r1 │ │ - b.n 211bb84 │ │ - vselvs.f16 s18, s2, s19 │ │ - cdp2 2, 1, cr2, cr2, cr14, {6} │ │ - vfmsl.f16 , d17, d7[3] │ │ - mrc2 10, 0, ip, cr2, cr8, {7} @ │ │ + b.n 211bbde │ │ + mrc2 9, 0, r9, cr1, cr6, {2} @ │ │ + mrc2 2, 0, r2, cr2, cr11, {7} │ │ + vselvs.f16 s18, s2, s25 │ │ + vselvs.f64 d12, d2, d21 │ │ Address 0x211c1f6 is out of bounds. │ │ │ │ │ │ 0211c1f8 , std::__ndk1::allocator >, celestia::MarkerRepresentation, bool)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -238845,16 +238845,16 @@ │ │ mov r0, r5 │ │ blx r1 │ │ add.w r1, r4, #16 │ │ mov r2, r6 │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26fedac │ │ - str r0, [r2, #24] │ │ - vcmla.f16 , q0, d4[0], #90 │ │ + str r5, [r7, #24] │ │ + vfmsl.f16 , d0, d1[2] │ │ Address 0x211c542 is out of bounds. │ │ │ │ │ │ 0211c544 : │ │ ldr r2, [pc, #12] @ (211c554 ) │ │ add r2, pc │ │ ldr r2, [r2, #0] │ │ @@ -239404,15 +239404,15 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ add r4, sp, #504 @ 0x1f8 │ │ lsls r1, r4, #1 │ │ add r4, sp, #304 @ 0x130 │ │ lsls r1, r4, #1 │ │ - strb r6, [r7, #12] │ │ + strb r3, [r5, #13] │ │ vselvs.f64 d10, d18, d14 │ │ lsls r1, r4, #1 │ │ │ │ 0211ca54 , std::__ndk1::allocator >, Color const&)@@Base>: │ │ ldr r3, [pc, #32] @ (211ca78 , std::__ndk1::allocator >, Color const&)@@Base+0x24>) │ │ add r3, pc │ │ ldr r3, [r3, #0] │ │ @@ -239542,15 +239542,15 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r3, sp, #200 @ 0xc8 │ │ lsls r1, r4, #1 │ │ add r3, sp, #0 │ │ lsls r1, r4, #1 │ │ - ldrh r7, [r3, #50] @ 0x32 │ │ + ldrh r4, [r1, #52] @ 0x34 │ │ @ instruction: 0xfe12aa44 │ │ lsls r1, r4, #1 │ │ │ │ 0211cba0 : │ │ ldr r2, [pc, #12] @ (211cbb0 ) │ │ ldr r1, [r1, #0] │ │ add r2, pc │ │ @@ -241864,15 +241864,15 @@ │ │ ldr r1, [r4, #8] │ │ b.n 211e0a8 >::__emplace_back_slow_path, std::__ndk1::allocator >&, bool&>(std::__ndk1::basic_string, std::__ndk1::allocator >&, bool&)@@Base+0x18c> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (211e0d4 >::__emplace_back_slow_path, std::__ndk1::allocator >&, bool&>(std::__ndk1::basic_string, std::__ndk1::allocator >&, bool&)@@Base+0x1b8>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - adds r7, r7, #6 │ │ + adds r4, r5, #7 │ │ Address 0x211e0d6 is out of bounds. │ │ │ │ │ │ 0211e0d8 , std::__ndk1::allocator >* std::__ndk1::vector, std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__push_back_slow_path, std::__ndk1::allocator > const&>(std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -242379,15 +242379,15 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ str r0, [sp, #656] @ 0x290 │ │ lsls r1, r4, #1 │ │ - blt.n 211e5ba │ │ + bgt.n 211e614 │ │ mrc2 15, 0, r8, cr1, cr12, {7} │ │ lsls r1, r4, #1 │ │ │ │ 0211e614 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -242550,20 +242550,20 @@ │ │ blx r1 │ │ b.n 211e7ae │ │ add r0, sp, #12 │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ ldrh r4, [r2, #60] @ 0x3c │ │ lsls r1, r4, #1 │ │ - blt.n 211e6d6 │ │ + blt.n 211e730 │ │ cdp2 14, 1, cr8, cr1, cr8, {6} │ │ lsls r1, r4, #1 │ │ ldrh r2, [r3, #50] @ 0x32 │ │ lsls r1, r4, #1 │ │ - ldr r4, [sp, #124] @ 0x7c │ │ + ldr r4, [sp, #304] @ 0x130 │ │ Address 0x211e7ca is out of bounds. │ │ │ │ │ │ 0211e7cc : │ │ bx lr │ │ │ │ 0211e7ce : │ │ @@ -242771,36 +242771,36 @@ │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldrh r4, [r4, #36] @ 0x24 │ │ lsls r1, r4, #1 │ │ - beq.n 211e908 │ │ + beq.n 211e962 │ │ cdp2 0, 1, cr0, cr2, cr5, {7} │ │ movs r0, r0 │ │ - add r5, sp, #1004 @ 0x3ec │ │ + add r6, sp, #160 @ 0xa0 │ │ mrc2 1, 0, r0, cr2, cr3, {5} │ │ movs r0, r0 │ │ - pop {r2, r3, r4, r5, r6, r7, pc} │ │ + bkpt 0x0029 │ │ cdp2 2, 1, cr0, cr0, cr5, {2} │ │ movs r0, r0 │ │ - ldr r0, [r6, r6] │ │ + ldr r5, [r3, r7] │ │ mcr2 3, 0, r0, cr15, cr3, {7} │ │ movs r0, r0 │ │ - subs r6, r7, #0 │ │ + subs r3, r5, #1 │ │ cdp2 4, 1, cr0, cr0, cr1, {6} │ │ movs r0, r0 │ │ - cbnz r5, 211ea68 │ │ + cbnz r2, 211ea74 │ │ mrc2 5, 0, r0, cr1, cr11, {3} │ │ movs r0, r0 │ │ - bhi.n 211eaec │ │ + bhi.n 211e946 │ │ mrc2 6, 0, r0, cr1, cr5, {2} │ │ movs r0, r0 │ │ - ldr r4, [r0, r6] │ │ + ldr r1, [r6, r6] │ │ mcr2 6, 0, r0, cr15, cr7, {7} │ │ movs r0, r0 │ │ vcvt.f32.s32 d31, d2, #16 │ │ lsls r5, r0, #30 │ │ movs r0, r0 │ │ ldrh r4, [r0, #32] │ │ lsls r1, r4, #1 │ │ @@ -242881,17 +242881,17 @@ │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldrh r2, [r2, #28] │ │ lsls r1, r4, #1 │ │ - strb r0, [r2, r1] │ │ + strb r5, [r7, r1] │ │ cdp2 14, 1, cr10, cr1, cr6, {4} │ │ - mrc2 9, 0, pc, cr3, cr6, {5} @ │ │ + @ instruction: 0xfe13f9e3 │ │ vselvs.f64 d8, d1, d2 │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #132] @ (211eb88 ) │ │ @@ -242950,15 +242950,15 @@ │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldrh r2, [r7, #20] │ │ lsls r1, r4, #1 │ │ - strh r0, [r7, r5] │ │ + strh r5, [r4, r6] │ │ mrc2 13, 0, sl, cr1, cr0, {7} │ │ @ instruction: 0xfe138a48 │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #32 │ │ @@ -243120,19 +243120,19 @@ │ │ itt ne │ │ ldrne r0, [sp, #20] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldrh r6, [r2, #16] │ │ lsls r1, r4, #1 │ │ - strh r4, [r2, r3] │ │ + strh r1, [r0, r4] │ │ mrc2 13, 0, sl, cr1, cr14, {1} │ │ - mrc2 11, 0, r1, cr3, cr15, {6} @ │ │ - mrc2 11, 0, r1, cr0, cr5, {5} @ │ │ - vselvs.f32 s2, s0, s31 │ │ + cdp2 12, 1, cr1, cr3, cr12, {0} │ │ + @ instruction: 0xfe101be2 │ │ + mrc2 10, 0, r1, cr0, cr12, {2} @ │ │ @ instruction: 0xfe1089ec │ │ lsls r1, r4, #1 │ │ ldrh r6, [r1, #6] │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ @@ -243212,20 +243212,20 @@ │ │ cmp r2, r1 │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ ldrh r6, [r3, #2] │ │ lsls r1, r4, #1 │ │ - str r4, [r3, r4] │ │ + str r1, [r1, r5] │ │ vselvs.f64 d10, d17, d0 │ │ - mrc2 5, 0, pc, cr3, cr6, {6} │ │ + cdp2 6, 1, cr15, cr3, cr3, {0} │ │ vcmla.f16 q4, q8, d2[1], #90 │ │ lsls r1, r4, #1 │ │ - bl 1e8fa48 │ │ + bl 1ebca48 │ │ ldrh r2, [r6, #4] │ │ lsls r1, r4, #1 │ │ strh r6, [r7, #60] @ 0x3c │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ @@ -243298,18 +243298,18 @@ │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ strh r2, [r0, #60] @ 0x3c │ │ lsls r1, r4, #1 │ │ - str r0, [r0, r1] │ │ + str r5, [r5, r1] │ │ vselvs.f32 s20, s3, s9 │ │ - cdp2 3, 1, cr3, cr3, cr11, {0} │ │ - mrc2 2, 0, r3, cr1, cr7, {5} │ │ + mrc2 3, 0, r3, cr3, cr8, {1} │ │ + cdp2 2, 1, cr3, cr1, cr4, {7} │ │ vcmla.f16 d8, d1, d6[0], #90 │ │ lsls r1, r4, #1 │ │ strh r4, [r6, #54] @ 0x36 │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -243392,15 +243392,15 @@ │ │ ittt eq │ │ addeq sp, #16 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ strh r6, [r6, #52] @ 0x34 │ │ lsls r1, r4, #1 │ │ - ldr r7, [pc, #464] @ (211f1a4 (int, FatalErrors, char const*)@@Base+0xc>) │ │ + ldr r7, [pc, #644] @ (211f258 (lua_State*)@@Base+0x50>) │ │ mrc2 9, 0, sl, cr1, cr6, {6} @ │ │ vcmla.f16 q4, , d4[1], #90 │ │ lsls r1, r4, #1 │ │ strh r6, [r0, #48] @ 0x30 │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ @@ -243463,22 +243463,22 @@ │ │ blx 26ffae0 │ │ ldr r1, [pc, #32] @ (211f08c ) │ │ mov r0, sp │ │ add r1, pc │ │ blx 2704b50 │ │ strh r2, [r2, #46] @ 0x2e │ │ lsls r1, r4, #1 │ │ - ldr r6, [pc, #576] @ (211f2bc *> >(std::__ndk1::__hash_const_iterator*>, std::__ndk1::__hash_const_iterator*>)@@Base+0x18>) │ │ + ldr r6, [pc, #756] @ (211f370 (lua_State*)@@Base+0x34>) │ │ vcmla.f16 q5, , d8[1], #90 │ │ vselvs.f16 s28, s7, s22 │ │ mrc2 6, 0, r8, cr2, cr6, {2} │ │ lsls r1, r4, #1 │ │ strh r4, [r4, #42] @ 0x2a │ │ lsls r1, r4, #1 │ │ - ldrsb r3, [r5, r5] │ │ + ldrsb r0, [r3, r6] │ │ mrc2 5, 0, fp, cr0, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #120] @ (211f114 ) │ │ mov r5, sp │ │ add r0, pc │ │ @@ -243529,21 +243529,21 @@ │ │ blx 26ffae0 │ │ ldr r1, [pc, #28] @ (211f128 ) │ │ mov r0, sp │ │ add r1, pc │ │ blx 2704b50 │ │ strh r0, [r4, #40] @ 0x28 │ │ lsls r1, r4, #1 │ │ - ldr r5, [pc, #888] @ (211f494 ) │ │ + ldr r6, [pc, #44] @ (211f148 ) │ │ vfmsl.f16 q7, d17, d5[1] │ │ cdp2 5, 1, cr8, cr2, cr8, {5} │ │ lsls r1, r4, #1 │ │ strh r6, [r0, #38] @ 0x26 │ │ lsls r1, r4, #1 │ │ - ldrsb r3, [r1, r3] │ │ + ldrsb r0, [r7, r3] │ │ cdp2 5, 1, cr11, cr0, cr0, {4} │ │ mov r7, sp │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #80] @ (211f188 ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ @@ -243578,15 +243578,15 @@ │ │ cmp r2, r1 │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ blx 26ffae0 │ │ strh r6, [r0, #36] @ 0x24 │ │ lsls r1, r4, #1 │ │ - ldr r5, [pc, #272] @ (211f2a0 (lua_State*)@@Base+0x98>) │ │ + ldr r5, [pc, #452] @ (211f354 (lua_State*)@@Base+0x18>) │ │ cdp2 7, 1, cr10, cr1, cr10, {6} │ │ cdp2 4, 1, cr8, cr3, cr6, {2} │ │ lsls r1, r4, #1 │ │ │ │ 0211f198 (int, FatalErrors, char const*)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -243875,15 +243875,15 @@ │ │ ldr r1, [pc, #12] @ (211f43c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - str r6, [r4, #88] @ 0x58 │ │ + str r3, [r2, #92] @ 0x5c │ │ Address 0x211f43e is out of bounds. │ │ │ │ │ │ 0211f440 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ @@ -243941,18 +243941,18 @@ │ │ ldr r1, [r1, #0] │ │ cmp r1, r0 │ │ ittt eq │ │ moveq r0, #2 │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ - cmp r3, #168 @ 0xa8 │ │ + cmp r3, #213 @ 0xd5 │ │ cdp2 1, 1, cr8, cr2, cr10, {3} │ │ lsls r1, r4, #1 │ │ - str r6, [r3, #84] @ 0x54 │ │ + str r3, [r1, #88] @ 0x58 │ │ mrc2 0, 0, r8, cr2, cr8, {7} │ │ lsls r1, r4, #1 │ │ │ │ 0211f4e8 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ @@ -244008,15 +244008,15 @@ │ │ moveq r0, #2 │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ lsls r0, r6, #1 │ │ cdp2 0, 1, cr8, cr3, cr2, {6} │ │ lsls r1, r4, #1 │ │ - str r6, [r6, #72] @ 0x48 │ │ + str r3, [r4, #76] @ 0x4c │ │ mrc2 0, 0, r8, cr2, cr12, {2} │ │ lsls r1, r4, #1 │ │ │ │ 0211f584 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ @@ -244079,18 +244079,18 @@ │ │ ldr r1, [r1, #0] │ │ cmp r1, r0 │ │ ittt eq │ │ moveq r0, #4 │ │ addeq sp, #24 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ - cbz r6, 211f6a4 │ │ + cbz r3, 211f6b0 │ │ cdp2 0, 0, cr8, cr15, cr6, {1} │ │ lsls r1, r4, #1 │ │ - str r2, [r3, #64] @ 0x40 │ │ + str r7, [r0, #68] @ 0x44 │ │ mrc2 15, 0, r7, cr2, cr12, {4} │ │ lsls r1, r4, #1 │ │ │ │ 0211f644 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -244155,19 +244155,19 @@ │ │ vcvt.s32.f64 s0, d16 │ │ vstr s0, [sp] │ │ blx 2700c90 │ │ movs r0, #0 │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - strb r1, [r2, #9] │ │ - mcr2 9, 0, r2, cr15, cr12, {5} @ │ │ - cdp2 13, 1, cr14, cr2, cr3, {5} │ │ - cdp2 2, 0, cr7, cr15, cr0, {2} │ │ - cdp2 14, 0, cr10, cr15, cr3, {4} │ │ + strb r6, [r7, #9] │ │ + @ instruction: 0xfe0f29e9 │ │ + mrc2 13, 0, lr, cr2, cr0, {6} │ │ + cdp2 2, 0, cr7, cr15, cr13, {3} │ │ + mcr2 14, 0, sl, cr15, cr0, {5} │ │ Address 0x211f712 is out of bounds. │ │ │ │ │ │ 0211f714 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ movs r1, #0 │ │ @@ -244603,228 +244603,228 @@ │ │ add r1, pc │ │ add r2, pc │ │ blx 2704d90 │ │ ldr r1, [pc, #576] @ (211fd4c ) │ │ mov r0, r4 │ │ ldr r2, [pc, #576] @ (211fd50 ) │ │ b.w 211fd54 │ │ - stmia r2!, {r1, r2, r5, r7} │ │ + stmia r2!, {r0, r1, r4, r6, r7} │ │ mrc2 9, 0, r0, cr2, cr13, {6} @ │ │ movs r0, r0 │ │ - asrs r0, r6, #2 │ │ + asrs r5, r3, #3 │ │ @ instruction: 0xfe1009e3 │ │ movs r0, r0 │ │ - ldrh r3, [r4, #28] │ │ + ldrh r0, [r2, #30] │ │ vselvs.f64 d0, d1, d9 │ │ movs r0, r0 │ │ mcr2 14, 2, pc, cr14, cr2, {0} @ │ │ lsrs r3, r0, #17 │ │ movs r0, r0 │ │ - ldr r7, [sp, #916] @ 0x394 │ │ + add r0, pc, #72 @ (adr r0, 211fb80 ) │ │ cdp2 13, 1, cr0, cr2, cr13, {1} │ │ movs r0, r0 │ │ - bne.n 211faf0 │ │ + bcs.n 211fb4a │ │ mrc2 13, 0, r0, cr0, cr11, {4} │ │ movs r0, r0 │ │ - strb r6, [r4, #6] │ │ + strb r3, [r2, #7] │ │ cdp2 15, 0, cr0, cr15, cr9, {0} │ │ movs r0, r0 │ │ - ldr r6, [r3, #116] @ 0x74 │ │ + ldr r3, [r1, #120] @ 0x78 │ │ mrc2 15, 0, r0, cr0, cr11, {3} │ │ movs r0, r0 │ │ - ldcl 14, cr15, [sl], {15} │ │ + stc 14, cr15, [r7, #-60] @ 0xffffffc4 │ │ lsrs r5, r6, #30 │ │ movs r0, r0 │ │ - lsrs r5, r3, #4 │ │ + lsrs r2, r1, #5 │ │ mrc2 15, 0, r0, cr2, cr11, {7} │ │ movs r0, r0 │ │ - lsrs r7, r6, #24 │ │ + lsrs r4, r4, #25 │ │ cdp2 0, 1, cr1, cr1, cr9, {3} │ │ movs r0, r0 │ │ - ldr r7, [sp, #576] @ 0x240 │ │ + ldr r7, [sp, #756] @ 0x2f4 │ │ cdp2 1, 1, cr1, cr2, cr3, {7} │ │ movs r0, r0 │ │ ldc2l 14, cr15, [sp, #72] @ 0x48 │ │ asrs r1, r7, #10 │ │ movs r0, r0 │ │ strh r2, [r7, #4] │ │ lsls r1, r4, #1 │ │ - asrs r6, r1, #32 │ │ + asrs r3, r7, #32 │ │ cdp2 0, 1, cr8, cr0, cr14, {5} │ │ lsls r1, r4, #1 │ │ - @ instruction: 0xebb3fe10 │ │ + @ instruction: 0xebe0fe10 │ │ strh r2, [r4, #4] │ │ lsls r1, r4, #1 │ │ - lsrs r2, r2, #3 │ │ + lsrs r7, r7, #3 │ │ mrc2 0, 0, r8, cr2, cr6, {4} │ │ lsls r1, r4, #1 │ │ - bne.n 211fc16 │ │ - mrc2 3, 0, r9, cr0, cr0, {5} │ │ + bne.n 211fc70 │ │ + mrc2 3, 0, r9, cr0, cr13, {6} │ │ mcr2 4, 0, r1, cr15, cr7, {5} │ │ movs r0, r0 │ │ - mov r0, pc │ │ + mov sp, r4 │ │ mrc2 5, 0, r1, cr1, cr5, {0} │ │ movs r0, r0 │ │ - cmp r0, r6 │ │ + cmp r5, fp │ │ cdp2 6, 1, cr1, cr2, cr15, {2} │ │ movs r0, r0 │ │ - ldr r2, [r6, #104] @ 0x68 │ │ + ldr r7, [r3, #108] @ 0x6c │ │ cdp2 7, 1, cr1, cr0, cr13, {4} │ │ movs r0, r0 │ │ - stc 14, cr15, [r9], #-60 @ 0xffffffc4 │ │ + mrrc 14, 0, pc, r6, cr15 @ │ │ adds r7, r1, r3 │ │ movs r0, r0 │ │ - cbz r5, 211fbce │ │ + cbz r2, 211fbda │ │ @ instruction: 0xfe0f196d │ │ movs r0, r0 │ │ - ldc 14, cr15, [fp], {15} │ │ + mcrr 14, 0, pc, r8, cr15 @ │ │ subs r3, r4, r5 │ │ movs r0, r0 │ │ - strh r2, [r2, #46] @ 0x2e │ │ + strh r7, [r7, #46] @ 0x2e │ │ cdp2 12, 1, cr1, cr2, cr1, {0} │ │ movs r0, r0 │ │ - ldr r7, [pc, #384] @ (211fd60 ) │ │ + ldr r7, [pc, #564] @ (211fe14 ) │ │ cdp2 13, 1, cr1, cr0, cr7, {7} │ │ movs r0, r0 │ │ - ldr r7, [pc, #404] @ (211fd7c ) │ │ + ldr r7, [pc, #584] @ (211fe30 ) │ │ cdp2 15, 1, cr1, cr0, cr13, {0} │ │ movs r0, r0 │ │ - movs r7, #198 @ 0xc6 │ │ + movs r7, #243 @ 0xf3 │ │ mrc2 0, 0, r2, cr2, cr3, {1} │ │ movs r0, r0 │ │ - ldmia r0!, {r1, r2, r3, r4, r6, r7} │ │ + ldmia r1, {r0, r1, r3} │ │ mrc2 2, 0, r2, cr1, cr5, {3} │ │ movs r0, r0 │ │ - movs r7, #192 @ 0xc0 │ │ + movs r7, #237 @ 0xed │ │ cdp2 4, 1, cr2, cr2, cr7, {6} │ │ movs r0, r0 │ │ - @ instruction: 0xea67fe10 │ │ + @ instruction: 0xea94fe10 │ │ movs r6, #93 @ 0x5d │ │ movs r0, r0 │ │ - add r6, sp, #472 @ 0x1d8 │ │ + add r6, sp, #652 @ 0x28c │ │ vcmla.f16 d2, d16, d15[1], #90 │ │ movs r0, r0 │ │ - @ instruction: 0xea3efe10 │ │ + @ instruction: 0xea6bfe10 │ │ cmp r2, #73 @ 0x49 │ │ movs r0, r0 │ │ - @ instruction: 0xeb9dfe0f │ │ + @ instruction: 0xebcafe0f │ │ cmp r3, #195 @ 0xc3 │ │ movs r0, r0 │ │ - lsls r6, r2, #31 │ │ + lsrs r3, r0, #32 │ │ mrc2 12, 0, r2, cr2, cr13, {2} │ │ movs r0, r0 │ │ - ldr r6, [pc, #1000] @ (2120018 ) │ │ + ldr r7, [pc, #156] @ (211fccc ) │ │ mrc2 12, 0, r2, cr0, cr7, {7} │ │ movs r0, r0 │ │ - add r6, sp, #244 @ 0xf4 │ │ + add r6, sp, #424 @ 0x1a8 │ │ mrc2 14, 0, r2, cr0, cr5, {6} │ │ movs r0, r0 │ │ - add r6, r7 │ │ + add r3, sp │ │ mrc2 15, 0, r2, cr2, cr11, {1} │ │ movs r0, r0 │ │ - strh r4, [r3, #40] @ 0x28 │ │ + strh r1, [r1, #42] @ 0x2a │ │ mrc2 0, 0, r3, cr2, cr5, {0} │ │ movs r0, r0 │ │ - ldmia r0, {r0, r1, r4, r5, r6} │ │ + ldmia r0!, {r5, r7} │ │ mrc2 0, 0, r3, cr1, cr7, {1} │ │ movs r0, r0 │ │ - str r2, [sp, #516] @ 0x204 │ │ + str r2, [sp, #696] @ 0x2b8 │ │ mcr2 0, 0, r3, cr15, cr9, {4} │ │ movs r0, r0 │ │ - cmp r1, r9 │ │ + cmp r6, lr │ │ mrc2 1, 0, r3, cr1, cr3, {0} │ │ movs r0, r0 │ │ - ldrh r4, [r7, #12] │ │ + ldrh r1, [r5, #14] │ │ mrc2 1, 0, r3, cr1, cr13, {2} │ │ movs r0, r0 │ │ - cmp r0, #35 @ 0x23 │ │ + cmp r0, #80 @ 0x50 │ │ cdp2 1, 1, cr3, cr1, cr7, {5} │ │ movs r0, r0 │ │ - ldmia r0!, {r1, r2, r3, r5, r6} │ │ + ldmia r0, {r0, r1, r3, r4, r7} │ │ mrc2 2, 0, r3, cr1, cr13, {2} │ │ movs r0, r0 │ │ - cmp r4, #234 @ 0xea │ │ + cmp r5, #23 │ │ cdp2 2, 1, cr3, cr0, cr11, {6} │ │ movs r0, r0 │ │ - add r2, sp, #724 @ 0x2d4 │ │ + add r2, sp, #904 @ 0x388 │ │ mrc2 3, 0, r3, cr1, cr13, {3} │ │ movs r0, r0 │ │ cmp r0, #227 @ 0xe3 │ │ mcr2 3, 0, r3, cr15, cr7, {7} │ │ movs r0, r0 │ │ - ldr r5, [pc, #980] @ (212006c ) │ │ + ldr r6, [pc, #136] @ (211fd20 ) │ │ cdp2 4, 1, cr3, cr0, cr9, {7} │ │ movs r0, r0 │ │ - ldr r5, [pc, #952] @ (2120058 ) │ │ + ldr r6, [pc, #108] @ (211fd0c ) │ │ cdp2 5, 1, cr3, cr0, cr15, {2} │ │ movs r0, r0 │ │ - iteet al │ │ - cdp2al 5, 1, cr3, cr2, cr9, {4} │ │ - mov r0, r0 │ │ - ldmia r0, {r0, r3, r4} │ │ - cdp2al 5, 1, cr3, cr1, cr11, {6} │ │ + stmia r0!, {r1, r3, r4} │ │ + cdp2 5, 1, cr3, cr2, cr9, {4} │ │ movs r0, r0 │ │ - add r9, r8 │ │ + ldmia r0!, {r1, r2, r6} │ │ + cdp2 5, 1, cr3, cr1, cr11, {6} │ │ + movs r0, r0 │ │ + add lr, sp │ │ mrc2 6, 0, r3, cr1, cr1, {1} │ │ movs r0, r0 │ │ - itete gt │ │ - cdp2gt 6, 1, cr3, cr2, cr15, {3} │ │ - movle r0, r0 │ │ - movgt r6, #112 @ 0x70 │ │ - mrc2le 7, 0, r3, cr2, cr1, {0} │ │ + it │ │ + cdp2 6, 1, cr3, cr2, cr15, {3} │ │ + movs r0, r0 │ │ + movs r6, #157 @ 0x9d │ │ + mrc2 7, 0, r3, cr2, cr1, {0} │ │ movs r0, r0 │ │ @ instruction: 0xfb8afe12 │ │ adds r7, #107 @ 0x6b │ │ movs r0, r0 │ │ - str r1, [sp, #716] @ 0x2cc │ │ + str r1, [sp, #896] @ 0x380 │ │ cdp2 7, 0, cr3, cr15, cr9, {5} │ │ movs r0, r0 │ │ - ldmia r1!, {r0, r3, r4, r5, r6} │ │ + ldmia r1, {r1, r2, r5, r7} │ │ cdp2 7, 0, cr3, cr15, cr11, {7} │ │ movs r0, r0 │ │ - ldr r0, [pc, #812] @ (2120014 ) │ │ + ldr r0, [pc, #992] @ (21200c8 ) │ │ vfmal.f16 , d15, d1[0] │ │ movs r0, r0 │ │ - strd pc, lr, [sl, #-64] @ 0x40 │ │ + ldrd pc, lr, [r7, #-64]! @ 0x40 │ │ subs r0, #175 @ 0xaf │ │ movs r0, r0 │ │ - ldrsh r5, [r6, r5] │ │ + ldrsh r2, [r4, r6] │ │ @ instruction: 0xfe12394d │ │ movs r0, r0 │ │ - ldr r4, [sp, #876] @ 0x36c │ │ + ldr r5, [sp, #32] │ │ vselvs.f16 s6, s5, s23 │ │ movs r0, r0 │ │ - ldrh r0, [r6, #4] │ │ + ldrh r5, [r3, #6] │ │ @ instruction: 0xfe113a49 │ │ movs r0, r0 │ │ - str r6, [r6, #84] @ 0x54 │ │ + str r3, [r4, #88] @ 0x58 │ │ vselvs.f32 s6, s3, s15 │ │ movs r0, r0 │ │ - ldrsh r7, [r1, r5] │ │ + ldrsh r4, [r7, r5] │ │ mrc2 11, 0, r3, cr2, cr9, {1} @ │ │ movs r0, r0 │ │ - ldrsh r6, [r2, r5] │ │ + ldrsh r3, [r0, r6] │ │ mrc2 11, 0, r3, cr2, cr7, {4} @ │ │ movs r0, r0 │ │ - ldr r5, [pc, #364] @ (211fe94 ) │ │ + ldr r5, [pc, #544] @ (211ff48 ) │ │ mrc2 12, 0, r3, cr0, cr9, {0} │ │ movs r0, r0 │ │ - strd pc, lr, [r5], #64 @ 0x40 │ │ + ldmdb r2, {r4, r9, sl, fp, ip, sp, lr, pc} │ │ subs r4, #155 @ 0x9b │ │ movs r0, r0 │ │ - add r6, sp, #668 @ 0x29c │ │ + add r6, sp, #848 @ 0x350 │ │ mcr2 13, 0, r3, cr15, cr9, {3} │ │ movs r0, r0 │ │ - ldrsh r3, [r6, r4] │ │ + ldrsh r0, [r4, r5] │ │ cdp2 14, 1, cr3, cr2, cr7, {0} │ │ movs r0, r0 │ │ udf #176 @ 0xb0 │ │ cdp2 15, 1, cr3, cr2, cr13, {0} │ │ movs r0, r0 │ │ - movs r3, #222 @ 0xde │ │ + movs r4, #11 │ │ cdp2 13, 1, cr3, cr1, cr7, {1} │ │ movs r0, r0 │ │ add r1, pc │ │ add r2, pc │ │ blx 2704d90 │ │ ldr r1, [pc, #600] @ (211ffb8 ) │ │ mov r0, r4 │ │ @@ -245079,148 +245079,148 @@ │ │ add r2, pc │ │ blx 2704d90 │ │ mov r0, r4 │ │ mvn.w r1, #1 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ b.w 26fee3c │ │ nop │ │ - ldr r2, [pc, #832] @ (21202fc ) │ │ + ldr r2, [pc, #1012] @ (21203b0 ) │ │ mrc2 13, 0, r3, cr0, cr1, {5} │ │ movs r0, r0 │ │ - ldr r2, [r2, #24] │ │ + ldr r7, [r7, #24] │ │ cdp2 15, 1, cr3, cr0, cr11, {1} │ │ movs r0, r0 │ │ - pop {r0, r1, r2, r5, r6} │ │ + pop {r2, r4, r7} │ │ cdp2 0, 1, cr4, cr2, cr9, {3} │ │ movs r0, r0 │ │ - lsrs r1, r6, #9 │ │ + lsrs r6, r3, #10 │ │ cdp2 1, 1, cr4, cr0, cr3, {7} │ │ movs r0, r0 │ │ - add r1, sp, #880 @ 0x370 │ │ + add r2, sp, #36 @ 0x24 │ │ cdp2 3, 1, cr4, cr0, cr1, {1} │ │ movs r0, r0 │ │ - add r3, sp, #968 @ 0x3c8 │ │ + add r4, sp, #124 @ 0x7c │ │ cdp2 3, 0, cr4, cr15, cr15, {4} │ │ movs r0, r0 │ │ - stmia r6!, {r2, r3, r4} │ │ + stmia r6!, {r0, r3, r6} │ │ mcr2 3, 0, r4, cr15, cr1, {7} │ │ movs r0, r0 │ │ - ldr r2, [pc, #488] @ (21201dc ) │ │ + ldr r2, [pc, #668] @ (2120290 ) │ │ cdp2 4, 1, cr4, cr0, cr7, {2} │ │ movs r0, r0 │ │ - movs r2, #208 @ 0xd0 │ │ + movs r2, #253 @ 0xfd │ │ mrc2 4, 0, r4, cr2, cr9, {7} │ │ movs r0, r0 │ │ - cmp r0, sl │ │ + cmp r5, pc │ │ cdp2 5, 0, cr4, cr15, cr15, {5} │ │ movs r0, r0 │ │ - ldrb r6, [r0, r1] │ │ + ldrb r3, [r6, r1] │ │ mrc2 7, 0, r4, cr2, cr9, {1} │ │ movs r0, r0 │ │ - cmp r5, r7 │ │ + cmp r2, sp │ │ mcr2 7, 0, r4, cr15, cr11, {7} │ │ movs r0, r0 │ │ blt.n 211ff96 │ │ @ instruction: 0xfe124969 │ │ movs r0, r0 │ │ - strh r2, [r7, #40] @ 0x28 │ │ + strh r7, [r4, #42] @ 0x2a │ │ vselvs.f64 d4, d1, d3 │ │ movs r0, r0 │ │ - ldrh r2, [r5, #20] │ │ + ldrh r7, [r2, #22] │ │ @ instruction: 0xfe104b45 │ │ movs r0, r0 │ │ - stmia r5!, {r1, r3, r5, r7} │ │ + stmia r5!, {r0, r1, r2, r4, r6, r7} │ │ mcr2 11, 0, r4, cr15, cr15, {7} @ │ │ movs r0, r0 │ │ - stmia r5!, {r0, r1, r3, r5, r7} │ │ + stmia r5!, {r3, r4, r6, r7} │ │ mcr2 0, 0, r5, cr15, cr9, {0} │ │ movs r0, r0 │ │ - cbnz r6, 21200aa │ │ + cbnz r3, 21200b6 │ │ mrc2 0, 0, r5, cr2, cr15, {1} │ │ movs r0, r0 │ │ blt.n 2120136 │ │ mrc2 0, 0, r5, cr2, cr9, {3} │ │ movs r0, r0 │ │ - ldr r4, [r4, #8] │ │ + ldr r1, [r2, #12] │ │ cdp2 0, 1, cr5, cr0, cr3, {6} │ │ movs r0, r0 │ │ - add fp, r9 │ │ + add r8, pc │ │ cdp2 1, 0, cr5, cr15, cr9, {7} │ │ movs r0, r0 │ │ - b.n 211fca0 │ │ + b.n 211fcfa │ │ cdp2 2, 0, cr5, cr15, cr3, {4} │ │ movs r0, r0 │ │ bge.n 211ffd4 │ │ mrc2 2, 0, r5, cr2, cr5, {7} │ │ movs r0, r0 │ │ - ands r4, r5 │ │ + eors r1, r3 │ │ mrc2 3, 0, r5, cr1, cr7, {0} │ │ movs r0, r0 │ │ - b.n 211fc84 │ │ + b.n 211fcde │ │ mcr2 3, 0, r5, cr15, cr9, {1} │ │ movs r0, r0 │ │ - ldr r0, [pc, #940] @ (2120430 ) │ │ + ldr r1, [pc, #96] @ (21200e4 ) │ │ mrc2 3, 0, r5, cr0, cr3, {3} │ │ movs r0, r0 │ │ - stmia r2!, {r2, r4, r6, r7} │ │ + stmia r3!, {r0} │ │ cdp2 3, 1, cr5, cr1, cr5, {6} │ │ movs r0, r0 │ │ - str r2, [r1, #20] │ │ + str r7, [r6, #20] │ │ cdp2 4, 1, cr5, cr1, cr7, {2} │ │ movs r0, r0 │ │ - movs r7, #136 @ 0x88 │ │ + movs r7, #181 @ 0xb5 │ │ mrc2 5, 0, r5, cr0, cr9, {3} │ │ movs r0, r0 │ │ - ldr r6, [r2, #24] │ │ + ldr r3, [r0, #28] │ │ vcmla.f16 d5, d31, d15[0], #0 │ │ movs r0, r0 │ │ - ldrh r0, [r4, #36] @ 0x24 │ │ + ldrh r5, [r1, #38] @ 0x26 │ │ vfmal.f16 , d31, d1[2] │ │ movs r0, r0 │ │ - ldmia r2, {r0, r1, r2, r6} │ │ + ldmia r2, {r2, r4, r5, r6} │ │ vselvs.f64 d5, d16, d7 │ │ movs r0, r0 │ │ - stmia r2!, {r0, r1, r2, r4, r5, r6, r7} │ │ + stmia r3!, {r2, r5} │ │ cdp2 12, 1, cr5, cr1, cr13, {0} │ │ movs r0, r0 │ │ - revsh r2, r2 │ │ + revsh r7, r7 │ │ mrc2 14, 0, r5, cr2, cr15, {1} │ │ movs r0, r0 │ │ - add r4, r3 │ │ + add r1, r9 │ │ cdp2 14, 0, cr5, cr15, cr5, {6} │ │ movs r0, r0 │ │ - add r6, pc, #184 @ (adr r6, 212018c ) │ │ + add r6, pc, #364 @ (adr r6, 2120240 ) │ │ cdp2 15, 1, cr5, cr1, cr3, {2} │ │ movs r0, r0 │ │ - subs r6, #43 @ 0x2b │ │ + subs r6, #88 @ 0x58 │ │ cdp2 15, 1, cr5, cr2, cr1, {6} │ │ movs r0, r0 │ │ - hlt 0x0026 │ │ + revsh r3, r2 │ │ mrc2 0, 0, r6, cr2, cr11, {4} │ │ movs r0, r0 │ │ - stmia r4!, {r0, r1, r2, r7} │ │ + stmia r4!, {r2, r4, r5, r7} │ │ cdp2 1, 0, cr6, cr15, cr9, {4} │ │ movs r0, r0 │ │ - b.n 211fb82 │ │ + b.n 211fbdc │ │ cdp2 2, 0, cr6, cr15, cr15, {3} │ │ movs r0, r0 │ │ - b.n 211fa4c │ │ + b.n 211faa6 │ │ mrc2 3, 0, r6, cr1, cr1, {1} │ │ movs r0, r0 │ │ - lsls r6, r1, #25 │ │ + lsls r3, r7, #25 │ │ mrc2 3, 0, r6, cr1, cr3, {7} │ │ movs r0, r0 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r1, [pc, #8] @ (2120118 ) │ │ add r1, pc │ │ blx 2704b40 │ │ movs r0, #1 │ │ pop {r7, pc} │ │ - lsls r0, r5, #19 │ │ + lsls r5, r2, #20 │ │ mrc2 5, 0, fp, cr1, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ vpush {d8-d9} │ │ sub sp, #24 │ │ ldr r3, [pc, #268] @ (2120238 ) │ │ mov r6, r0 │ │ @@ -245321,20 +245321,20 @@ │ │ bl 207d398 │ │ ldrb.w r0, [sp, #8] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #16] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - ldr r4, [r1, r4] │ │ + ldr r1, [r7, r4] │ │ cdp2 4, 1, cr7, cr2, cr6, {4} │ │ lsls r1, r4, #1 │ │ - ldr r6, [r6, r1] │ │ - mrc2 5, 0, r9, cr2, cr15, {7} │ │ - cdp2 3, 1, cr14, cr2, cr4, {3} │ │ + ldr r3, [r4, r2] │ │ + cdp2 6, 1, cr9, cr2, cr12, {1} │ │ + mrc2 3, 0, lr, cr2, cr1, {4} │ │ mcr2 3, 0, r7, cr15, cr10, {5} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d13} │ │ @@ -245437,22 +245437,22 @@ │ │ blx 2700d40 │ │ movs r0, #0 │ │ add sp, #32 │ │ vpop {d8-d13} │ │ add sp, #4 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - @ instruction: 0xb7c4 │ │ - mrc2 7, 0, r5, cr2, cr0, {2} │ │ - cdp2 14, 1, cr15, cr2, cr13, {3} │ │ - cdp2 6, 1, cr6, cr1, cr10, {4} │ │ - mcr2 5, 0, r4, cr15, cr2, {4} │ │ - cdp2 2, 1, cr10, cr0, cr12, {5} │ │ + @ instruction: 0xb7f1 │ │ + mrc2 7, 0, r5, cr2, cr13, {3} │ │ + mrc2 14, 0, pc, cr2, cr10, {4} │ │ + mrc2 6, 0, r6, cr1, cr7, {5} │ │ + mcr2 5, 0, r4, cr15, cr15, {5} │ │ + mrc2 2, 0, sl, cr0, cr9, {6} │ │ cdp2 2, 1, cr15, cr1, cr1, {7} │ │ - mrc2 11, 0, r7, cr2, cr5, {4} @ │ │ + @ instruction: 0xfe127bc2 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ vpush {d8-d11} │ │ sub sp, #16 │ │ ldr r3, [pc, #208] @ (2120478 ) │ │ movs r1, #2 │ │ @@ -245526,20 +245526,20 @@ │ │ blx 2700d50 │ │ movs r0, #0 │ │ add sp, #16 │ │ vpop {d8-d11} │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - stmia r0!, {r0, r1, r3, r4, r6} │ │ - cdp2 6, 0, cr5, cr15, cr6, {0} │ │ - cdp2 13, 1, cr15, cr2, cr3, {1} │ │ - cdp2 5, 1, cr6, cr1, cr0, {2} │ │ - cdp2 4, 0, cr4, cr15, cr10, {2} │ │ - cdp2 1, 1, cr10, cr0, cr2, {3} │ │ + stmia r0!, {r3, r7} │ │ + mcr2 6, 0, r5, cr15, cr3, {1} │ │ + mrc2 13, 0, pc, cr2, cr0, {2} │ │ + cdp2 5, 1, cr6, cr1, cr13, {3} │ │ + mcr2 4, 0, r4, cr15, cr7, {3} │ │ + cdp2 1, 1, cr10, cr0, cr15, {4} │ │ mrc2 5, 0, fp, cr1, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r3, [pc, #100] @ (2120500 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -245576,17 +245576,17 @@ │ │ vcvt.f64.s32 d16, s0 │ │ vmov r2, r3, d16 │ │ blx 2704d40 │ │ movs r0, #1 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - movs r2, #0 │ │ - mrc2 5, 0, r5, cr0, cr8, {0} │ │ - cdp2 5, 1, cr5, cr2, cr9, {5} │ │ + movs r2, #45 @ 0x2d │ │ + cdp2 5, 1, cr5, cr0, cr5, {2} │ │ + mrc2 5, 0, r5, cr2, cr6, {6} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ ldr r3, [pc, #352] @ (2120678 ) │ │ movs r1, #1 │ │ mov.w r2, #1000 @ 0x3e8 │ │ @@ -245729,16 +245729,16 @@ │ │ cmp r5, r4 │ │ ldr r2, [sp, #24] │ │ it cc │ │ movcc r9, r2 │ │ ldr r4, [sp, #12] │ │ b.n 21205a8 │ │ adds r7, r2, #6 │ │ - mcr2 4, 0, r5, cr15, cr6, {4} │ │ - mrc2 14, 0, sp, cr2, cr0, {5} │ │ + cdp2 4, 0, cr5, cr15, cr3, {6} │ │ + mrc2 14, 0, sp, cr2, cr13, {6} │ │ cdp2 4, 1, cr13, cr1, cr15, {0} │ │ mrc2 5, 0, fp, cr2, cr0, {5} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #108] @ (21206fc ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -245779,17 +245779,17 @@ │ │ movs r0, #0 │ │ pop {r4, r5, r7, pc} │ │ ldr r1, [pc, #16] @ (2120704 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704d10 │ │ nop │ │ - udf #133 @ 0x85 │ │ + udf #178 @ 0xb2 │ │ mcr2 3, 0, sp, cr15, cr2, {0} │ │ - cdp2 2, 1, cr5, cr2, cr2, {7} │ │ + cdp2 3, 1, cr5, cr2, cr15, {0} │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #56] @ (2120748 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -245809,16 +245809,16 @@ │ │ blx 2704d10 │ │ blx 27009f0 │ │ mov r1, r0 │ │ mov r0, r4 │ │ blx 2704c20 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ - @ instruction: 0xfa23fe11 │ │ - strh r4, [r4, r2] │ │ + @ instruction: 0xfa50fe11 │ │ + strh r1, [r2, r3] │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #68] @ (212079c ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -245841,16 +245841,16 @@ │ │ mov r0, r4 │ │ vcvt.f64.s32 d16, s0 │ │ vmov r2, r3, d16 │ │ blx 2704d40 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - adds r6, #51 @ 0x33 │ │ - mrc2 2, 0, r5, cr2, cr12, {2} │ │ + adds r6, #96 @ 0x60 │ │ + cdp2 2, 1, cr5, cr2, cr9, {4} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r3, [pc, #100] @ (2120814 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -245888,17 +245888,17 @@ │ │ movle r1, #1 │ │ blx 2701280 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - bgt.n 2120840 │ │ - @ instruction: 0xfe10ba6a │ │ - cdp2 1, 1, cr5, cr1, cr10, {7} │ │ + bgt.n 212089a │ │ + mrc2 10, 0, fp, cr0, cr7, {4} @ │ │ + mrc2 2, 0, r5, cr1, cr7, {0} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ ldr r3, [pc, #364] @ (2120998 ) │ │ movs r1, #1 │ │ mov.w r2, #1000 @ 0x3e8 │ │ @@ -246043,17 +246043,17 @@ │ │ mov r0, r5 │ │ movs r1, #2 │ │ blx 2700920 │ │ movs r0, #0 │ │ add sp, #28 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - stmia r1!, {r1, r2, r4, r5} │ │ - cdp2 1, 1, cr5, cr0, cr2, {4} │ │ - cdp2 6, 1, cr7, cr2, cr5, {2} │ │ + stmia r1!, {r0, r1, r5, r6} │ │ + cdp2 1, 1, cr5, cr0, cr15, {5} │ │ + mrc2 6, 0, r7, cr2, cr2, {3} │ │ mrc2 1, 0, sp, cr2, cr15, {0} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ ldr r3, [pc, #204] @ (2120a80 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ @@ -246129,16 +246129,16 @@ │ │ blx 2704c20 │ │ mov r0, r4 │ │ mvn.w r1, #2 │ │ blx 2704de0 │ │ movs r0, #1 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - ldr r5, [sp, #816] @ 0x330 │ │ - mrc2 15, 0, r4, cr0, cr12, {7} │ │ + ldr r5, [sp, #996] @ 0x3e4 │ │ + cdp2 0, 1, cr5, cr0, cr9, {1} │ │ mrc2 15, 0, ip, cr2, cr3, {4} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #52 @ 0x34 │ │ ldr r3, [pc, #540] @ (2120cb4 ) │ │ mov fp, r0 │ │ @@ -246352,25 +246352,25 @@ │ │ blx 26ffae0 │ │ ldr r1, [pc, #36] @ (2120cd0 ) │ │ add r1, pc │ │ b.n 2120c6c │ │ ldr r1, [pc, #36] @ (2120cd4 ) │ │ add r1, pc │ │ b.n 2120c6c │ │ - strh r1, [r5, #10] │ │ + strh r6, [r2, #12] │ │ mcr2 11, 0, r6, cr15, cr10, {0} @ │ │ lsls r1, r4, #1 │ │ - ldr r7, [pc, #56] @ (2120cf8 ) │ │ - mrc2 13, 0, sl, cr2, cr11, {7} │ │ + ldr r7, [pc, #236] @ (2120dac ) │ │ + cdp2 14, 1, cr10, cr2, cr8, {1} │ │ cdp2 14, 1, cr12, cr2, cr1, {7} │ │ - mrc2 9, 0, sp, cr2, cr12, {3} @ │ │ + vselvs.f16 s26, s5, s19 │ │ vseleq.f16 s12, s30, s25 │ │ lsls r1, r4, #1 │ │ - ldrh r1, [r7, #22] │ │ - vcmla.f16 d13, d18, d6[1], #90 │ │ + ldrh r6, [r4, #24] │ │ + vfmsl.f16 , d18, d3[0] │ │ mcr2 5, 0, fp, cr15, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #80] @ (2120d30 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -246402,19 +246402,19 @@ │ │ add r3, pc │ │ it eq │ │ moveq r1, r3 │ │ blx 2704b40 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - pop {r0, r4, r5, r7} │ │ + pop {r1, r2, r3, r4, r6, r7} │ │ vcmla.f16 q7, q8, d15[1], #90 │ │ - mrc2 12, 0, r7, cr2, cr6, {1} │ │ - vcmla.f16 , , d4[0], #0 │ │ - mrc2 12, 0, r4, cr0, cr4, {6} │ │ + cdp2 12, 1, cr7, cr2, cr3, {3} │ │ + vfmal.f16 , d15, d1[2] │ │ + cdp2 13, 1, cr4, cr0, cr1, {0} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ ldr r3, [pc, #284] @ (2120e6c ) │ │ mov r9, r0 │ │ ldr r0, [pc, #284] @ (2120e70 ) │ │ @@ -246526,22 +246526,22 @@ │ │ bl 207d398 │ │ cmp r5, #0 │ │ itt ne │ │ ldrne r0, [sp, #12] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - strb r6, [r3, #6] │ │ + strb r3, [r1, #7] │ │ vcmla.f16 q3, q1, d2[1], #90 │ │ lsls r1, r4, #1 │ │ - ldr r4, [pc, #328] @ (2120fc0 ) │ │ - mrc2 3, 0, pc, cr2, cr8, {6} │ │ - cdp2 7, 1, cr3, cr1, cr2, {3} │ │ - mrc2 11, 0, r7, cr0, cr12, {1} @ │ │ - vseleq.f64 d11, d31, d31 │ │ + ldr r4, [pc, #508] @ (2121074 ) │ │ + cdp2 4, 1, cr15, cr2, cr5, {0} │ │ + cdp2 7, 1, cr3, cr1, cr15, {4} │ │ + @ instruction: 0xfe107b69 │ │ + mcr2 11, 0, fp, cr15, cr12, {6} @ │ │ mrc2 7, 0, r6, cr0, cr14, {3} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ ldr r3, [pc, #308] @ (2120fcc ) │ │ @@ -246664,17 +246664,17 @@ │ │ b.n 2120f1a │ │ cmp r4, sl │ │ it cc │ │ movcc r8, r9 │ │ ldr.w sl, [sp, #4] │ │ b.n 2120f1a │ │ nop │ │ - ldrb r5, [r1, #9] │ │ - mrc2 11, 0, r4, cr0, cr8, {0} @ │ │ - mrc2 5, 0, fp, cr2, cr10, {1} │ │ + ldrb r2, [r7, #9] │ │ + @ instruction: 0xfe104b45 │ │ + cdp2 5, 1, cr11, cr2, cr7, {3} │ │ mcr2 5, 0, fp, cr15, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ ldr r3, [pc, #312] @ (212111c ) │ │ movs r1, #1 │ │ mov.w r2, #1000 @ 0x3e8 │ │ @@ -246796,17 +246796,17 @@ │ │ mov r0, r6 │ │ movs r1, #1 │ │ blx 2700920 │ │ movs r0, #0 │ │ add sp, #20 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ - cmp r5, #212 @ 0xd4 │ │ - @ instruction: 0xfe1249cc │ │ - cdp2 4, 1, cr11, cr2, cr8, {2} │ │ + cmp r6, #1 │ │ + mrc2 9, 0, r4, cr2, cr9, {7} @ │ │ + mrc2 4, 0, fp, cr2, cr5, {3} │ │ mcr2 5, 0, fp, cr15, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldr r3, [pc, #152] @ (21211cc ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ @@ -246866,16 +246866,16 @@ │ │ cmp r1, r5 │ │ mov r5, r0 │ │ bne.n 21211b8 │ │ b.n 2121180 │ │ movs r0, #1 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - asrs r0, r4, #22 │ │ - vcmla.f16 d4, d16, d0[0], #90 │ │ + asrs r5, r1, #23 │ │ + vcmla.f16 d4, d16, d13[1], #90 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ ldr r3, [pc, #472] @ (21213b8 ) │ │ mov r8, r0 │ │ ldr r0, [pc, #472] @ (21213bc ) │ │ @@ -247058,24 +247058,24 @@ │ │ blx 26ffae0 │ │ ldr r1, [pc, #32] @ (21213d0 ) │ │ add r1, pc │ │ b.n 2121372 │ │ ldr r1, [pc, #32] @ (21213d4 ) │ │ add r1, pc │ │ b.n 2121372 │ │ - bcs.n 21212de │ │ + bcs.n 2121338 │ │ mrc2 3, 0, r6, cr1, cr2, {6} │ │ lsls r1, r4, #1 │ │ - @ instruction: 0x47c6 │ │ - mrc2 3, 0, r5, cr2, cr7, {5} │ │ - cdp2 2, 1, cr13, cr0, cr4, {2} │ │ + @ instruction: 0x47f3 │ │ + cdp2 3, 1, cr5, cr2, cr4, {7} │ │ + mrc2 2, 0, sp, cr0, cr1, {3} │ │ cdp2 2, 0, cr6, cr15, cr8, {1} │ │ lsls r1, r4, #1 │ │ - strh r6, [r5, r6] │ │ - vselvs.f64 d2, d0, d17 │ │ + strh r3, [r3, r7] │ │ + @ instruction: 0xfe102b4e │ │ mrc2 5, 0, fp, cr1, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldr r3, [pc, #152] @ (212147c ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ @@ -247135,16 +247135,16 @@ │ │ cmp r1, r5 │ │ mov r5, r0 │ │ bne.n 2121468 │ │ b.n 2121430 │ │ movs r0, #1 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - beq.n 21214a8 │ │ - mrc2 5, 0, r4, cr0, cr0, {6} │ │ + beq.n 2121502 │ │ + mrc2 5, 0, r4, cr0, cr13, {7} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ ldr r3, [pc, #456] @ (2121658 ) │ │ mov r8, r0 │ │ ldr r0, [pc, #456] @ (212165c ) │ │ @@ -247326,21 +247326,21 @@ │ │ ldr r1, [pc, #32] @ (2121674 ) │ │ add r1, pc │ │ b.n 212161a │ │ nop │ │ stmia r5!, {r2, r3, r4, r7} │ │ cdp2 1, 1, cr6, cr2, cr2, {1} │ │ lsls r1, r4, #1 │ │ - cmp r6, r2 │ │ + cmp r3, r8 │ │ cdp2 4, 1, cr12, cr2, cr13, {2} │ │ - mrc2 15, 0, ip, cr2, cr12, {4} │ │ + cdp2 15, 1, cr12, cr2, cr9, {6} │ │ cdp2 15, 0, cr5, cr15, cr10, {4} │ │ lsls r1, r4, #1 │ │ stmia r4!, {r1, r2, r3, r6} │ │ - mrc2 14, 0, ip, cr2, cr8, {2} │ │ + cdp2 14, 1, cr12, cr2, cr5, {4} │ │ mrc2 5, 0, fp, cr1, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ ldr r3, [pc, #276] @ (2121798 ) │ │ mov r9, r0 │ │ ldr r0, [pc, #276] @ (212179c ) │ │ @@ -247449,18 +247449,18 @@ │ │ addeq sp, #12 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ lsrs r0, r3, #17 │ │ cdp2 15, 0, cr5, cr15, cr14, {1} │ │ lsls r1, r4, #1 │ │ - ldmia r4!, {r0, r6, r7} │ │ + ldmia r4!, {r1, r2, r3, r5, r6, r7} │ │ mrc2 14, 0, r5, cr0, cr12, {1} │ │ lsls r1, r4, #1 │ │ - orrs r4, r7 │ │ + muls r1, r5 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ ldr r3, [pc, #276] @ (21218cc ) │ │ mov r9, r0 │ │ ldr r0, [pc, #276] @ (21218d0 ) │ │ @@ -247569,18 +247569,18 @@ │ │ addeq sp, #12 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ udf #93 @ 0x5d │ │ mrc2 13, 0, r5, cr2, cr10, {7} │ │ lsls r1, r4, #1 │ │ - add r4, sp, #48 @ 0x30 │ │ + add r4, sp, #228 @ 0xe4 │ │ vdot.bf16 d5, d15, d8[0] │ │ lsls r1, r4, #1 │ │ - add r1, pc, #972 @ (adr r1, 2121cac ) │ │ + add r2, pc, #128 @ (adr r2, 2121960 ) │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d9} │ │ sub sp, #24 │ │ ldr r3, [pc, #540] @ (2121b10 ) │ │ @@ -247768,22 +247768,22 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - lsrs r0, r0, #3 │ │ + lsrs r5, r5, #3 │ │ cdp2 12, 1, cr5, cr1, cr0, {6} │ │ lsls r1, r4, #1 │ │ - add r3, sp, #776 @ 0x308 │ │ - cdp2 7, 0, cr0, cr15, cr5, {3} │ │ - cdp2 5, 1, cr2, cr2, cr6, {6} │ │ - cdp2 15, 1, cr10, cr1, cr13, {0} │ │ - cdp2 14, 1, cr4, cr0, cr11, {4} │ │ + add r3, sp, #956 @ 0x3bc │ │ + mcr2 7, 0, r0, cr15, cr2, {4} │ │ + mrc2 5, 0, r2, cr2, cr3, {7} │ │ + mrc2 15, 0, sl, cr1, cr10, {1} │ │ + mrc2 14, 0, r4, cr0, cr8, {5} │ │ mcr2 10, 0, r5, cr15, cr6, {6} @ │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ ldr r3, [pc, #568] @ (2121d74 ) │ │ @@ -247991,23 +247991,23 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - ldrh r2, [r1, #52] @ 0x34 │ │ + ldrh r7, [r6, #52] @ 0x34 │ │ mcr2 10, 0, r5, cr15, cr6, {3} @ │ │ lsls r1, r4, #1 │ │ - str r2, [r1, #124] @ 0x7c │ │ - cdp2 13, 1, cr3, cr1, cr9, {4} │ │ - mrc2 9, 0, ip, cr2, cr5, {2} @ │ │ + str r7, [r6, #124] @ 0x7c │ │ + mrc2 13, 0, r3, cr1, cr6, {5} │ │ + vselvs.f16 s24, s5, s4 │ │ vcmla.f16 , , d8[1], #0 │ │ lsls r1, r4, #1 │ │ - subs r6, #74 @ 0x4a │ │ + subs r6, #119 @ 0x77 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8} │ │ sub sp, #32 │ │ ldr r3, [pc, #376] @ (2121f1c ) │ │ @@ -248155,22 +248155,22 @@ │ │ addeq sp, #4 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ - ldr r4, [pc, #40] @ (2121f48 ) │ │ + ldr r4, [pc, #220] @ (2121ffc ) │ │ vfmal.f16 d5, s30, s0[0] │ │ lsls r1, r4, #1 │ │ - cmp r2, #194 @ 0xc2 │ │ - mrc2 10, 0, r3, cr0, cr13, {6} @ │ │ + cmp r2, #239 @ 0xef │ │ + vselvs.f64 d3, d0, d10 │ │ cdp2 6, 1, cr5, cr2, cr2, {6} │ │ lsls r1, r4, #1 │ │ - subs r3, #234 @ 0xea │ │ + subs r4, #23 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ ldr r3, [pc, #568] @ (2122178 ) │ │ mov fp, r0 │ │ ldr r0, [pc, #568] @ (212217c ) │ │ @@ -248380,19 +248380,19 @@ │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ movs r0, r0 │ │ movs r0, r0 │ │ lsls r1, r3, #15 │ │ mcr2 6, 0, r5, cr15, cr2, {3} │ │ lsls r1, r4, #1 │ │ bvs.n 2122100 │ │ - mrc2 13, 0, r1, cr2, cr8, {0} │ │ - vfmsl.f16 q1, d2, d6[1] │ │ + cdp2 13, 1, cr1, cr2, cr5, {2} │ │ + vcmla.f16 d2, d18, d11[0], #90 │ │ cdp2 4, 1, cr5, cr0, cr4, {3} │ │ lsls r1, r4, #1 │ │ - subs r2, #70 @ 0x46 │ │ + subs r2, #115 @ 0x73 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8} │ │ sub sp, #32 │ │ ldr r3, [pc, #380] @ (2122324 ) │ │ @@ -248542,22 +248542,22 @@ │ │ addeq sp, #4 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ - b.n 2121fdc │ │ + b.n 2122036 │ │ cdp2 4, 0, cr5, cr15, cr12, {0} │ │ lsls r1, r4, #1 │ │ - vacgt.f32 d15, d8, d1 │ │ - subs r0, r5, r1 │ │ + vacge.f16 d31, d5, d1 │ │ + subs r5, r2, r2 │ │ mrc2 2, 0, r5, cr2, cr10, {5} │ │ lsls r1, r4, #1 │ │ - adds r7, #230 @ 0xe6 │ │ + subs r0, #19 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ vpush {d8-d9} │ │ sub sp, #16 │ │ ldr r3, [pc, #356] @ (21224b0 ) │ │ mov r5, r0 │ │ @@ -248675,19 +248675,19 @@ │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - strh r5, [r4, #18] │ │ + strh r2, [r2, #20] │ │ cdp2 2, 1, cr5, cr1, cr6, {3} │ │ lsls r1, r4, #1 │ │ - adds r6, #86 @ 0x56 │ │ - mrc2 7, 0, r9, cr2, cr1, {2} │ │ + adds r6, #131 @ 0x83 │ │ + mrc2 7, 0, r9, cr2, cr14, {3} │ │ mrc2 1, 0, r5, cr2, cr4, {1} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ ldr r3, [pc, #148] @ (2122564 ) │ │ movs r1, #1 │ │ @@ -248737,16 +248737,16 @@ │ │ blx 2704d40 │ │ movs r0, #3 │ │ vpop {d8} │ │ pop {r4, r5, r7, pc} │ │ nop │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ - ldrsh r0, [r1, r3] │ │ - cdp2 4, 1, cr3, cr1, cr4, {7} │ │ + ldrsh r5, [r6, r3] │ │ + mrc2 5, 0, r3, cr1, cr1, {0} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldr r3, [pc, #148] @ (212260c ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ @@ -248806,15 +248806,15 @@ │ │ mov r5, r0 │ │ bne.n 21225f8 │ │ b.n 21225c0 │ │ movs r0, #1 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ ldc2l 14, cr15, [r7, #56] @ 0x38 │ │ - adds r4, #60 @ 0x3c │ │ + adds r4, #105 @ 0x69 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ ldr r3, [pc, #448] @ (21227e0 ) │ │ mov r8, r0 │ │ ldr r0, [pc, #448] @ (21227e4 ) │ │ @@ -248991,24 +248991,24 @@ │ │ ldr r1, [pc, #36] @ (21227f8 ) │ │ add r1, pc │ │ b.n 21227a6 │ │ ldr r1, [pc, #32] @ (21227fc ) │ │ add r1, pc │ │ b.n 21227a6 │ │ nop │ │ - @ instruction: 0xfbd7fe10 │ │ + stc2 14, cr15, [r4], {16} │ │ ldr r7, [pc, #584] @ (2122a30 ) │ │ lsls r1, r4, #1 │ │ - adds r3, #134 @ 0x86 │ │ - vselvs.f32 s26, s4, s6 │ │ - mrc2 14, 0, fp, cr1, cr0, {0} │ │ + adds r3, #179 @ 0xb3 │ │ + mrc2 10, 0, sp, cr2, cr0, {1} @ │ │ + mrc2 14, 0, fp, cr1, cr13, {1} │ │ cdp2 14, 0, cr4, cr15, cr2, {0} │ │ lsls r1, r4, #1 │ │ - subs r0, #89 @ 0x59 │ │ - cdp2 1, 1, cr2, cr1, cr11, {0} │ │ + subs r0, #134 @ 0x86 │ │ + mrc2 1, 0, r2, cr1, cr8, {1} │ │ mrc2 5, 0, fp, cr0, cr0, {5} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #100] @ (212286c ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -249043,15 +249043,15 @@ │ │ mov r0, r4 │ │ vcvt.f64.f32 d16, s0 │ │ vmov r2, r3, d16 │ │ blx 2704d40 │ │ movs r0, #1 │ │ pop {r4, r5, r7, pc} │ │ usad8 lr, pc, lr │ │ - adds r1, #172 @ 0xac │ │ + adds r1, #217 @ 0xd9 │ │ mrc2 5, 0, fp, cr2, cr0, {5} │ │ add r7, sp, #8 │ │ vpush {d8-d9} │ │ sub sp, #8 │ │ ldr r3, [pc, #208] @ (2122950 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -249120,17 +249120,17 @@ │ │ blx 2700830 │ │ mov r0, r4 │ │ blx 27002b0 │ │ movs r0, #0 │ │ add sp, #8 │ │ vpop {d8-d9} │ │ pop {r4, r5, r7, pc} │ │ - ldrb r2, [r6, #28] │ │ - mrc2 1, 0, r3, cr0, cr2, {1} │ │ - vselvs.f16 s18, s5, s31 │ │ + ldrb r7, [r3, #29] │ │ + mrc2 1, 0, r3, cr0, cr15, {2} │ │ + mrc2 9, 0, r9, cr2, cr12, {6} @ │ │ mrc2 5, 0, fp, cr1, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #36] @ (2122988 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -249139,15 +249139,15 @@ │ │ vmov s0, r0 │ │ mov r0, r4 │ │ vcvt.f64.f32 d16, s0 │ │ vmov r2, r3, d16 │ │ blx 2704d40 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ - ldrh r4, [r6, r0] │ │ + ldrh r1, [r4, r1] │ │ mrc2 5, 0, fp, cr1, cr0, {6} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ ldr r3, [pc, #96] @ (21229f4 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -249177,16 +249177,16 @@ │ │ blx 2704960 │ │ movs r0, #0 │ │ add sp, #8 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ - subs r5, r2, #6 │ │ - mrc2 14, 0, r6, cr0, cr13, {1} │ │ + subs r2, r0, #7 │ │ + cdp2 14, 1, cr6, cr0, cr10, {3} │ │ mrc2 5, 0, fp, cr2, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ ldr r3, [pc, #116] @ (2122a78 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -249227,17 +249227,17 @@ │ │ mov r1, r4 │ │ blx 2704e00 │ │ movs r0, #0 │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ movs r0, r0 │ │ movs r0, r0 │ │ - udf #46 @ 0x2e │ │ - cdp2 15, 0, cr2, cr15, cr14, {5} │ │ - cdp2 5, 1, cr1, cr2, cr4, {1} │ │ + udf #91 @ 0x5b │ │ + mcr2 15, 0, r2, cr15, cr11, {6} │ │ + mrc2 5, 0, r1, cr2, cr1, {2} │ │ mrc2 5, 0, fp, cr1, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #72] @ (2122ad4 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -249261,16 +249261,16 @@ │ │ mov r0, r4 │ │ vcvt.f64.f32 d16, s0 │ │ vmov r2, r3, d16 │ │ blx 2704d40 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - cbnz r1, 2122b0e │ │ - cdp2 15, 1, cr2, cr0, cr8, {1} │ │ + rev r6, r0 │ │ + mrc2 15, 0, r2, cr0, cr5, {2} │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #72] @ (2122b2c ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -249296,16 +249296,16 @@ │ │ blx 2704e20 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ mov r0, r4 │ │ blx 2704be0 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ - ldr r4, [r5, r3] │ │ - mrc2 14, 0, r2, cr1, cr0, {6} │ │ + ldr r1, [r3, r4] │ │ + mrc2 14, 0, r2, cr1, cr13, {7} │ │ mrc2 5, 0, fp, cr2, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ ldr r3, [pc, #172] @ (2122be8 ) │ │ mov r4, r0 │ │ ldr r0, [pc, #172] @ (2122bec ) │ │ movs r1, #1 │ │ @@ -249372,18 +249372,18 @@ │ │ b.n 2122bd8 │ │ ldr r0, [sp, #0] │ │ cmp r0, #0 │ │ itt ne │ │ strne r0, [sp, #4] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - cbnz r5, 2122c16 │ │ + cbnz r2, 2122c22 │ │ mrc2 10, 0, r4, cr1, cr6, {3} @ │ │ lsls r1, r4, #1 │ │ - cmp r6, #106 @ 0x6a │ │ + cmp r6, #151 @ 0x97 │ │ mrc2 9, 0, r4, cr2, cr10, {7} @ │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ ldr r3, [pc, #100] @ (2122c64 ) │ │ mov r4, r0 │ │ @@ -249425,20 +249425,20 @@ │ │ ldr r1, [r1, #0] │ │ cmp r1, r0 │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ - bpl.n 2122c1e │ │ + bvs.n 2122c78 │ │ mrc2 9, 0, r4, cr1, cr2, {5} @ │ │ lsls r1, r4, #1 │ │ ldr r1, [pc, #432] @ (2122e20 ) │ │ lsls r1, r4, #1 │ │ - cmp r5, #166 @ 0xa6 │ │ + cmp r5, #211 @ 0xd3 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ ldr r3, [pc, #160] @ (2122d20 ) │ │ mov r4, r0 │ │ ldr r0, [pc, #160] @ (2122d24 ) │ │ @@ -249501,21 +249501,21 @@ │ │ ldr r2, [r2, #0] │ │ cmp r2, r1 │ │ ittt eq │ │ addeq sp, #16 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ - cbnz r3, 2122d38 │ │ + cbnz r0, 2122d44 │ │ mcr2 9, 0, r4, cr15, cr2, {1} @ │ │ lsls r1, r4, #1 │ │ - strh r5, [r4, r1] │ │ + strh r2, [r2, r2] │ │ vfmsl.f16 d4, s5, s5[0] │ │ lsls r1, r4, #1 │ │ - cmp r5, #28 │ │ + cmp r5, #73 @ 0x49 │ │ mrc2 5, 0, fp, cr2, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ ldr r3, [pc, #112] @ (2122dac ) │ │ mov r4, r0 │ │ ldr r0, [pc, #112] @ (2122db0 ) │ │ movs r1, #2 │ │ @@ -249560,20 +249560,20 @@ │ │ ldr r1, [r1, #0] │ │ cmp r1, r0 │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ - adds r5, r4, #0 │ │ + adds r2, r2, #1 │ │ vfmsl.f16 q2, d0, d6[2] │ │ lsls r1, r4, #1 │ │ ldr r0, [pc, #144] @ (2122e48 ) │ │ lsls r1, r4, #1 │ │ - cmp r4, #106 @ 0x6a │ │ + cmp r4, #151 @ 0x97 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #40 @ 0x28 │ │ ldr r3, [pc, #220] @ (2122ea4 ) │ │ mov r5, r0 │ │ ldr r0, [pc, #220] @ (2122ea8 ) │ │ @@ -249658,23 +249658,23 @@ │ │ ldrb.w r0, [sp, #24] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #32] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - adds r2, #167 @ 0xa7 │ │ + adds r2, #212 @ 0xd4 │ │ cdp2 7, 1, cr4, cr1, cr10, {7} │ │ lsls r1, r4, #1 │ │ @ instruction: 0x47ee │ │ lsls r1, r4, #1 │ │ - cmp r4, #140 @ 0x8c │ │ + cmp r4, #185 @ 0xb9 │ │ cdp2 7, 1, cr4, cr2, cr4, {2} │ │ lsls r1, r4, #1 │ │ - cmp r3, #222 @ 0xde │ │ + cmp r4, #11 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r3, [pc, #92] @ (2122f24 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -249709,17 +249709,17 @@ │ │ ldr r1, [pc, #20] @ (2122f28 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - asrs r1, r3, #18 │ │ - vseleq.f16 s12, s30, s24 │ │ - @ instruction: 0xfe122aec │ │ + asrs r6, r0, #19 │ │ + mcr2 9, 0, r6, cr15, cr9, {1} @ │ │ + mrc2 11, 0, r2, cr2, cr9, {0} @ │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #56] @ (2122f70 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -249739,15 +249739,15 @@ │ │ blx 2704d10 │ │ blx 2700d30 │ │ blx 26fff60 │ │ blx 2704990 │ │ movs r0, #0 │ │ pop {r4, r6, r7, pc} │ │ bl 1daab90 │ │ - cmp r2, #124 @ 0x7c │ │ + cmp r2, #169 @ 0xa9 │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #64] @ (2122fc0 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -249770,16 +249770,16 @@ │ │ mov r2, r0 │ │ mov r0, r4 │ │ mov r3, r1 │ │ blx 2704d40 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - strb r1, [r0, r2] │ │ - mrc2 10, 0, r2, cr1, cr4, {1} @ │ │ + strb r6, [r5, r2] │ │ + @ instruction: 0xfe112a61 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r3, [pc, #92] @ (2123030 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -249815,17 +249815,17 @@ │ │ mov r2, r4 │ │ mov r3, r6 │ │ blx 26ffea0 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - bl 2054c52 │ │ - cmp r1, #222 @ 0xde │ │ - cdp2 15, 1, cr4, cr2, cr1, {2} │ │ + bl 2081c52 │ │ + cmp r2, #11 │ │ + cdp2 15, 1, cr4, cr2, cr14, {3} │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #60] @ (2123080 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -249846,16 +249846,16 @@ │ │ blx 2700d30 │ │ blx 27000a0 │ │ mov r1, r0 │ │ mov r0, r4 │ │ blx 2704c20 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ - adds r3, r1, r5 │ │ - mrc2 9, 0, r2, cr0, cr0, {3} @ │ │ + adds r0, r7, r5 │ │ + mrc2 9, 0, r2, cr0, cr13, {4} @ │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldr r3, [pc, #152] @ (212312c ) │ │ movs r1, #1 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -249912,17 +249912,17 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - str r4, [sp, #592] @ 0x250 │ │ - vseleq.f16 s4, s30, s1 │ │ - mrc2 0, 0, sp, cr2, cr6, {7} │ │ + str r4, [sp, #772] @ 0x304 │ │ + @ instruction: 0xfe0f294d │ │ + cdp2 1, 1, cr13, cr2, cr3, {1} │ │ mrc2 5, 0, fp, cr1, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ ldr r3, [pc, #84] @ (2123194 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -249956,16 +249956,16 @@ │ │ mov r1, r4 │ │ blx 2704e80 │ │ movs r0, #0 │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ bl 23d5db4 │ │ - cmp r0, #114 @ 0x72 │ │ - mrc2 9, 0, r8, cr2, cr12, {4} @ │ │ + cmp r0, #159 @ 0x9f │ │ + @ instruction: 0xfe1289c9 │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #60] @ (21231e4 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -249986,16 +249986,16 @@ │ │ blx 2700d30 │ │ blx 2704e90 │ │ mov r1, r0 │ │ mov r0, r4 │ │ blx 2704c20 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ - adds r2, r3, r0 │ │ - vcmla.f16 d2, d0, d12[0], #90 │ │ + adds r7, r0, r1 │ │ + vfmsl.f16 d2, s0, s3[1] │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #64] @ (2123234 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -250018,16 +250018,16 @@ │ │ mov r2, r0 │ │ mov r0, r4 │ │ mov r3, r1 │ │ blx 2704d40 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - adds r3, r1, r0 │ │ - cdp2 7, 1, cr2, cr0, cr0, {6} │ │ + adds r0, r7, r0 │ │ + cdp2 7, 1, cr2, cr0, cr13, {7} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r3, [pc, #92] @ (21232a4 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -250063,17 +250063,17 @@ │ │ mov r2, r4 │ │ mov r3, r6 │ │ blx 2700640 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - ldrh r1, [r7, #6] │ │ - cdp2 7, 1, cr2, cr2, cr10, {3} │ │ - mrc2 7, 0, r1, cr2, cr12, {5} │ │ + ldrh r6, [r4, #8] │ │ + mrc2 7, 0, r2, cr2, cr7, {4} │ │ + cdp2 7, 1, cr1, cr2, cr9, {7} │ │ mrc2 5, 0, fp, cr0, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #88] @ (2123310 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -250104,17 +250104,17 @@ │ │ ldr r1, [pc, #16] @ (2123314 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - str r3, [r7, r5] │ │ - cdp2 3, 1, cr11, cr1, cr8, {0} │ │ - mcr2 6, 0, r2, cr15, cr12, {7} │ │ + str r0, [r5, r6] │ │ + mrc2 3, 0, fp, cr1, cr5, {1} │ │ + cdp2 7, 0, cr2, cr15, cr9, {1} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r3, [pc, #148] @ (21233bc ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -250166,17 +250166,17 @@ │ │ movs r1, #16 │ │ blx 2700920 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - ldrh r1, [r2, #2] │ │ - cdp2 6, 1, cr2, cr2, cr10, {4} │ │ - mrc2 15, 0, r8, cr2, cr14, {1} │ │ + ldrh r6, [r7, #2] │ │ + mrc2 6, 0, r2, cr2, cr7, {5} │ │ + cdp2 15, 1, cr8, cr2, cr11, {3} │ │ mrc2 5, 0, fp, cr1, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #88] @ (2123428 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -250207,17 +250207,17 @@ │ │ ldr r1, [pc, #16] @ (212342c ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - lsrs r3, r0, #31 │ │ - mcr2 1, 0, fp, cr15, cr0, {7} │ │ - cdp2 5, 0, cr2, cr15, cr4, {7} │ │ + lsrs r0, r6, #31 │ │ + mcr2 2, 0, fp, cr15, cr13, {0} │ │ + mcr2 6, 0, r2, cr15, cr1, {0} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r3, [pc, #148] @ (21234d4 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -250269,16 +250269,16 @@ │ │ mov.w r1, #2048 @ 0x800 │ │ blx 2700920 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ add r6, pc, #604 @ (adr r6, 2123734 ) │ │ - mrc2 5, 0, r2, cr2, cr2, {3} │ │ - cdp2 5, 1, cr3, cr2, cr11, {3} │ │ + mrc2 5, 0, r2, cr2, cr15, {4} │ │ + mrc2 5, 0, r3, cr2, cr8, {4} │ │ mcr2 5, 0, fp, cr15, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #88] @ (2123540 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -250310,16 +250310,16 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ add r6, pc, #148 @ (adr r6, 21235d8 ) │ │ - mrc2 0, 0, fp, cr2, cr8, {6} │ │ - cdp2 4, 0, cr2, cr15, cr12, {6} │ │ + cdp2 1, 1, cr11, cr2, cr5, {0} │ │ + mcr2 4, 0, r2, cr15, cr9, {7} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r3, [pc, #132] @ (21235dc ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -250367,18 +250367,18 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - movs r5, #200 @ 0xc8 │ │ - mrc2 4, 0, r2, cr2, cr10, {2} │ │ - cdp2 2, 1, cr13, cr2, cr1, {7} │ │ - cdp2 0, 0, cr11, cr15, cr0, {2} │ │ + movs r5, #245 @ 0xf5 │ │ + cdp2 4, 1, cr2, cr2, cr7, {4} │ │ + cdp2 3, 1, cr13, cr2, cr14, {0} │ │ + cdp2 0, 0, cr11, cr15, cr13, {3} │ │ mcr2 5, 0, fp, cr15, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #88] @ (212364c ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -250409,17 +250409,17 @@ │ │ ldr r1, [pc, #16] @ (2123650 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - bl 226a26e │ │ - add r7, sp, #816 @ 0x330 │ │ - cdp2 3, 0, cr2, cr15, cr0, {6} │ │ + bl 229726e │ │ + add r7, sp, #996 @ 0x3e4 │ │ + cdp2 3, 0, cr2, cr15, cr13, {7} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r3, [pc, #116] @ (21236d8 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -250464,17 +250464,17 @@ │ │ blx 2704d10 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ add r4, pc, #864 @ (adr r4, 2123a3c ) │ │ - cdp2 3, 1, cr2, cr2, cr14, {2} │ │ - cdp2 15, 1, cr12, cr2, cr7, {3} │ │ - cdp2 15, 1, cr10, cr0, cr6, {2} │ │ + mrc2 3, 0, r2, cr2, cr11, {3} │ │ + mrc2 15, 0, ip, cr2, cr4, {4} │ │ + mrc2 15, 0, sl, cr0, cr3, {3} │ │ mcr2 5, 0, fp, cr15, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #108] @ (212375c ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -250518,21 +250518,21 @@ │ │ ldr r1, [pc, #32] @ (2123770 ) │ │ add r1, pc │ │ mov r0, r4 │ │ blx 2704b40 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - asrs r3, r7, #13 │ │ - mrc2 14, 0, sl, cr0, cr6, {6} │ │ - mcr2 1, 0, r5, cr15, cr0, {6} │ │ - cdp2 14, 1, cr8, cr0, cr2, {1} │ │ - cdp2 14, 0, cr10, cr15, cr9, {7} │ │ - mcr2 10, 0, ip, cr15, cr4, {7} @ │ │ - cdp2 2, 1, cr2, cr1, cr4, {6} │ │ + asrs r0, r5, #14 │ │ + cdp2 15, 1, cr10, cr0, cr3, {0} │ │ + mcr2 1, 0, r5, cr15, cr13, {7} │ │ + cdp2 14, 1, cr8, cr0, cr15, {2} │ │ + mcr2 15, 0, sl, cr15, cr6, {0} │ │ + vseleq.f64 d12, d15, d17 │ │ + mrc2 2, 0, r2, cr1, cr1, {7} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ ldr r3, [pc, #196] @ (2123848 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -250608,21 +250608,21 @@ │ │ mov r0, r8 │ │ movs r1, #0 │ │ blx 27006a0 │ │ b.n 2123826 │ │ movs r1, #2 │ │ blx 27006a0 │ │ b.n 2123826 │ │ - ldmia r6!, {r1, r2, r4, r5, r7} │ │ - cdp2 2, 1, cr2, cr0, cr12, {1} │ │ - mrc2 0, 0, r7, cr2, cr4, {1} │ │ - cdp2 14, 1, cr10, cr0, cr6, {0} │ │ - mcr2 1, 0, r5, cr15, cr12, {0} │ │ - mrc2 13, 0, r8, cr0, cr4, {3} │ │ - mcr2 5, 0, r0, cr15, cr2, {6} │ │ + ldmia r6, {r0, r1, r5, r6, r7} │ │ + mrc2 2, 0, r2, cr0, cr9, {2} │ │ + cdp2 0, 1, cr7, cr2, cr1, {3} │ │ + mrc2 14, 0, sl, cr0, cr3, {1} │ │ + cdp2 1, 0, cr5, cr15, cr9, {2} │ │ + cdp2 13, 1, cr8, cr0, cr1, {5} │ │ + mcr2 5, 0, r0, cr15, cr15, {7} │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #116] @ (21238e0 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -250669,22 +250669,22 @@ │ │ ldr r1, [pc, #36] @ (21238f8 ) │ │ add r1, pc │ │ mov r0, r4 │ │ blx 2704b40 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - ldr r3, [pc, #972] @ (2123cb0 ) │ │ - mrc2 13, 0, sl, cr1, cr8, {2} │ │ - mcr2 15, 0, ip, cr15, cr11, {7} │ │ - cdp2 15, 0, cr5, cr15, cr4, {4} │ │ - cdp2 13, 1, cr6, cr2, cr12, {1} │ │ - mrc2 5, 0, r0, cr1, cr14, {1} │ │ - cdp2 13, 1, cr6, cr2, cr3, {1} │ │ - cdp2 1, 1, cr2, cr1, cr8, {2} │ │ + ldr r4, [pc, #128] @ (2123964 ) │ │ + cdp2 13, 1, cr10, cr1, cr5, {4} │ │ + cdp2 0, 0, cr13, cr15, cr8, {1} │ │ + mcr2 15, 0, r5, cr15, cr1, {5} │ │ + mrc2 13, 0, r6, cr2, cr9, {2} │ │ + cdp2 5, 1, cr0, cr1, cr11, {3} │ │ + mrc2 13, 0, r6, cr2, cr0, {2} │ │ + mrc2 1, 0, r2, cr1, cr5, {3} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ ldr r3, [pc, #228] @ (21239f0 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r5, r0 │ │ @@ -250776,22 +250776,22 @@ │ │ b.n 21239ca │ │ mov r0, r8 │ │ movs r1, #2 │ │ blx 27007b0 │ │ b.n 21239ca │ │ nop │ │ pop {r0, r1, r7, pc} │ │ - cdp2 0, 1, cr2, cr2, cr4, {5} │ │ - mrc2 1, 0, r1, cr2, cr9, {2} │ │ - cdp2 12, 1, cr10, cr0, cr8, {4} │ │ - cdp2 14, 0, cr5, cr15, cr2, {7} │ │ - mrc2 14, 0, ip, cr2, cr13, {7} │ │ - mcr2 12, 0, r6, cr15, cr4, {1} │ │ - mrc2 4, 0, r0, cr1, cr2, {3} │ │ - cdp2 1, 1, cr8, cr2, cr8, {7} │ │ + mrc2 0, 0, r2, cr2, cr1, {6} │ │ + cdp2 1, 1, cr1, cr2, cr6, {4} │ │ + mrc2 12, 0, sl, cr0, cr5, {5} │ │ + cdp2 15, 0, cr5, cr15, cr15, {0} │ │ + cdp2 15, 1, cr12, cr2, cr10, {1} │ │ + cdp2 12, 0, cr6, cr15, cr1, {3} │ │ + mrc2 4, 0, r0, cr1, cr15, {4} │ │ + mrc2 2, 0, r8, cr2, cr5, {0} │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #88] @ (2123a74 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -250822,17 +250822,17 @@ │ │ ldr r1, [pc, #16] @ (2123a78 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - ldr r7, [r4, #60] @ 0x3c │ │ - vselvs.f64 d10, d17, d20 │ │ - mcr2 15, 0, r1, cr15, cr8, {4} │ │ + ldr r4, [r2, #64] @ 0x40 │ │ + mrc2 11, 0, sl, cr1, cr1, {6} @ │ │ + cdp2 15, 0, cr1, cr15, cr5, {6} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r3, [pc, #124] @ (2123b08 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -250879,18 +250879,18 @@ │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - b.n 212382e │ │ - cdp2 15, 1, cr1, cr1, cr6, {1} │ │ - cdp2 3, 1, cr0, cr2, cr12, {2} │ │ - mrc2 11, 0, sl, cr2, cr6, {0} @ │ │ + b.n 2123888 │ │ + mrc2 15, 0, r1, cr1, cr3, {2} │ │ + mrc2 3, 0, r0, cr2, cr9, {3} │ │ + @ instruction: 0xfe12ab43 │ │ mcr2 5, 0, fp, cr15, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d10} │ │ sub sp, #64 @ 0x40 │ │ ldr r3, [pc, #332] @ (2123c78 ) │ │ @@ -251014,24 +251014,24 @@ │ │ blx 26ffae0 │ │ ldrb.w r0, [sp, #36] @ 0x24 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - cmp r4, #111 @ 0x6f │ │ + cmp r4, #156 @ 0x9c │ │ vselvs.f32 s6, s1, s16 │ │ lsls r1, r4, #1 │ │ - subs r4, r7, #1 │ │ - mrc2 14, 0, r2, cr2, cr5, {5} │ │ - @ instruction: 0xfe0f6ac1 │ │ - cdp2 0, 1, cr8, cr1, cr6, {1} │ │ - mrc2 6, 0, ip, cr2, cr8, {4} │ │ - mrc2 9, 0, r8, cr1, cr0, {5} @ │ │ - mcr2 14, 0, r6, cr15, cr11, {0} │ │ + subs r1, r5, #2 │ │ + cdp2 14, 1, cr2, cr2, cr2, {7} │ │ + @ instruction: 0xfe0f6aee │ │ + mrc2 0, 0, r8, cr1, cr3, {2} │ │ + cdp2 6, 1, cr12, cr2, cr5, {6} │ │ + mrc2 9, 0, r8, cr1, cr13, {6} @ │ │ + cdp2 14, 0, cr6, cr15, cr8, {2} │ │ mcr2 9, 0, r3, cr15, cr6, {3} @ │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #64 @ 0x40 │ │ ldr r3, [pc, #280] @ (2123dc0 ) │ │ mov r4, r0 │ │ @@ -251134,25 +251134,25 @@ │ │ ldrb.w r0, [sp, #36] @ 0x24 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - stmia r5!, {r0, r3, r4, r6, r7} │ │ + stmia r6!, {r1, r2} │ │ vselvs.f16 s6, s2, s20 │ │ lsls r1, r4, #1 │ │ - adds r6, r7, #3 │ │ - cdp2 1, 1, cr0, cr2, cr1, {3} │ │ - cdp2 1, 1, cr0, cr2, cr14, {3} │ │ + adds r3, r5, #4 │ │ + cdp2 1, 1, cr0, cr2, cr14, {4} │ │ + mrc2 1, 0, r0, cr2, cr11, {4} │ │ mrc2 9, 0, fp, cr2, cr12, {4} @ │ │ mrc2 14, 0, r9, cr2, cr13, {1} │ │ - mrc2 6, 0, r0, cr2, cr8, {3} │ │ + cdp2 6, 1, cr0, cr2, cr5, {5} │ │ @ instruction: 0xfe0fb960 │ │ - cdp2 7, 1, cr2, cr2, cr2, {5} │ │ + cdp2 7, 1, cr2, cr2, cr15, {6} │ │ vcmla.f16 d3, d0, d4[1], #90 │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d10} │ │ @@ -251278,24 +251278,24 @@ │ │ blx 26ffae0 │ │ ldrb.w r0, [sp, #36] @ 0x24 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - lsls r4, r2, #6 │ │ + lsls r1, r0, #7 │ │ mrc2 7, 0, r3, cr1, cr4, {5} │ │ lsls r1, r4, #1 │ │ - subs r0, r5, r6 │ │ - mrc2 7, 0, sl, cr2, cr10, {7} │ │ - cdp2 6, 0, cr4, cr15, cr1, {2} │ │ - @ instruction: 0xfe11296e │ │ - mrc2 7, 0, ip, cr0, cr13, {6} │ │ - vselvs.f64 d6, d16, d22 │ │ - cdp2 0, 0, cr4, cr15, cr0, {6} │ │ + subs r5, r2, r7 │ │ + vcmla.f16 d10, d2, d7[1], #90 │ │ + cdp2 6, 0, cr4, cr15, cr14, {3} │ │ + mrc2 9, 0, r2, cr1, cr11, {4} @ │ │ + vcmla.f16 d12, d0, d10[0], #90 │ │ + mrc2 11, 0, r6, cr0, cr3, {6} @ │ │ + cdp2 0, 0, cr4, cr15, cr13, {7} │ │ cdp2 6, 1, cr3, cr2, cr2, {5} │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #64 @ 0x40 │ │ ldr r3, [pc, #280] @ (2124094 ) │ │ mov r4, r0 │ │ @@ -251398,25 +251398,25 @@ │ │ ldrb.w r0, [sp, #36] @ 0x24 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - vacge.f32 d15, d1, d1 │ │ + vacgt.f32 d15, d14, d1 │ │ adds r6, #54 @ 0x36 │ │ lsls r1, r4, #1 │ │ - subs r2, r5, r0 │ │ - mrc2 10, 0, r2, cr2, cr4, {4} @ │ │ - mcr2 14, 0, pc, cr15, cr10, {4} @ │ │ + subs r7, r2, r1 │ │ + @ instruction: 0xfe122ac1 │ │ + cdp2 14, 0, cr15, cr15, cr7, {6} │ │ cdp2 6, 1, cr11, cr1, cr8, {6} │ │ @ instruction: 0xfe129b69 │ │ - cdp2 3, 1, cr0, cr2, cr4, {5} │ │ + mrc2 3, 0, r0, cr2, cr1, {6} │ │ cdp2 6, 0, cr11, cr15, cr12, {4} │ │ - cdp2 4, 1, cr2, cr2, cr14, {6} │ │ + mrc2 4, 0, r2, cr2, cr11, {7} │ │ mrc2 5, 0, r3, cr0, cr0, {2} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #56 @ 0x38 │ │ ldr r3, [pc, #104] @ (2124130 ) │ │ mov r4, r0 │ │ @@ -251457,15 +251457,15 @@ │ │ blx 26ffae0 │ │ ldrb.w r0, [sp, #28] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #36] @ 0x24 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - ldrh r7, [r2, #10] │ │ + ldrh r4, [r0, #12] │ │ cdp2 4, 1, cr3, cr0, cr10, {7} │ │ lsls r1, r4, #1 │ │ adds r4, #178 @ 0xb2 │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #96] @ (21241a4 ) │ │ @@ -251501,16 +251501,16 @@ │ │ mov r0, r4 │ │ vcvt.f64.u32 d16, s0 │ │ vmov r2, r3, d16 │ │ blx 2704d40 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - ldrb r1, [r5, #10] │ │ - vfmsl.f16 , d2, d0[2] │ │ + ldrb r6, [r2, #11] │ │ + vfmsl.f16 d1, s5, s10[1] │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #84] @ (2124208 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -251538,16 +251538,16 @@ │ │ vmov s0, r0 │ │ mov r0, r4 │ │ vcvt.f64.u32 d16, s0 │ │ vmov r2, r3, d16 │ │ blx 2704d40 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ - str r1, [r7, #72] @ 0x48 │ │ - vcmla.f16 d1, d1, d0[0], #90 │ │ + str r6, [r4, #76] @ 0x4c │ │ + vcmla.f16 d1, d1, d13[1], #90 │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #24 │ │ ldr r3, [pc, #160] @ (21242bc ) │ │ mov r4, r0 │ │ ldr r0, [pc, #160] @ (21242c0 ) │ │ @@ -251609,19 +251609,19 @@ │ │ cmp r1, r0 │ │ itttt eq │ │ moveq r0, #1 │ │ addeq sp, #24 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ - ldc2 14, cr15, [r9], {17} │ │ + stc2l 14, cr15, [r6], {17} │ │ adds r3, #150 @ 0x96 │ │ lsls r1, r4, #1 │ │ - asrs r2, r1, #30 │ │ - cdp2 13, 1, cr3, cr2, cr12, {2} │ │ + asrs r7, r6, #30 │ │ + mrc2 13, 0, r3, cr2, cr9, {3} │ │ mrc2 3, 0, r3, cr2, cr8, {0} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #24 │ │ ldr r3, [pc, #164] @ (2124380 ) │ │ @@ -251685,19 +251685,19 @@ │ │ itttt eq │ │ moveq r0, #1 │ │ addeq sp, #24 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ - subs r4, #247 @ 0xf7 │ │ + subs r5, #36 @ 0x24 │ │ mrc2 2, 0, r3, cr2, cr6, {6} │ │ lsls r1, r4, #1 │ │ - asrs r2, r1, #27 │ │ - cdp2 13, 1, cr1, cr2, cr7, {4} │ │ + asrs r7, r6, #27 │ │ + mrc2 13, 0, r1, cr2, cr4, {5} │ │ mrc2 2, 0, r3, cr1, cr6, {2} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #32 │ │ ldr r3, [pc, #368] @ (2124510 ) │ │ @@ -251851,18 +251851,18 @@ │ │ b.n 2124506 │ │ add r0, sp, #8 │ │ blx 27037a0 │ │ blx 26ffaf0 │ │ b.n 212462e │ │ mcr2 2, 0, r3, cr14, cr2, {0} │ │ lsls r1, r4, #1 │ │ - asrs r6, r7, #23 │ │ + asrs r3, r5, #24 │ │ cdp2 2, 1, cr11, cr2, cr9, {7} │ │ - cdp2 12, 1, cr1, cr2, cr5, {4} │ │ - mrc2 3, 0, r2, cr1, cr0, {3} │ │ + mrc2 12, 0, r1, cr2, cr2, {5} │ │ + mrc2 3, 0, r2, cr1, cr13, {4} │ │ mrc2 0, 0, r3, cr0, cr0, {6} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #40 @ 0x28 │ │ ldr r3, [pc, #168] @ (21245e0 ) │ │ @@ -251935,18 +251935,18 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ str r6, [sp, #252] @ 0xfc │ │ mrc2 0, 0, r3, cr2, cr10, {3} │ │ lsls r1, r4, #1 │ │ - asrs r6, r5, #17 │ │ - cdp2 2, 1, cr2, cr2, cr5, {6} │ │ - mrc2 0, 0, sl, cr0, cr12, {6} │ │ - mcr2 13, 0, r7, cr15, cr1, {1} │ │ + asrs r3, r3, #18 │ │ + mrc2 2, 0, r2, cr2, cr2, {7} │ │ + cdp2 1, 1, cr10, cr0, cr9, {0} │ │ + mcr2 13, 0, r7, cr15, cr14, {2} │ │ mrc2 15, 0, r2, cr1, cr6, {7} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ vpush {d8-d11} │ │ sub sp, #56 @ 0x38 │ │ @@ -252082,21 +252082,21 @@ │ │ cmp r2, r1 │ │ itttt eq │ │ addeq sp, #56 @ 0x38 │ │ vpopeq {d8-d11} │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ - strh r4, [r1, r1] │ │ + strh r1, [r7, r1] │ │ cdp2 15, 1, cr2, cr2, cr6, {5} │ │ lsls r1, r4, #1 │ │ - asrs r2, r3, #14 │ │ + asrs r7, r0, #15 │ │ mrc2 14, 0, r2, cr2, cr2, {3} │ │ lsls r1, r4, #1 │ │ - pld [r2, #3600] @ 0xe10 │ │ + pldw [pc, #3600] @ 2125588 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d10} │ │ sub sp, #80 @ 0x50 │ │ mov r4, sp │ │ @@ -252234,21 +252234,21 @@ │ │ ldr r1, [pc, #32] @ (2124918 ) │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ b.n 21248ce │ │ nop │ │ - ittet eq │ │ - cdp2eq 14, 1, cr2, cr0, cr0, {1} │ │ - lsleq r1, r4, #1 │ │ - asrne r4, r2, #8 │ │ - cdp2eq 2, 1, cr8, cr2, cr1, {4} │ │ - mrc2 2, 0, r2, cr0, cr0, {1} │ │ - mcr2 15, 0, fp, cr15, cr8, {5} │ │ + itee cc │ │ + cdp2cc 14, 1, cr2, cr0, cr0, {1} │ │ + lslcs r1, r4, #1 │ │ + asrcs r1, r0, #9 │ │ + cdp2 2, 1, cr8, cr2, cr14, {5} │ │ + mrc2 2, 0, r2, cr0, cr13, {2} │ │ + cdp2 15, 0, cr11, cr15, cr5, {7} │ │ cdp2 12, 0, cr2, cr15, cr10, {7} │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #64] @ (2124968 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ @@ -252273,16 +252273,16 @@ │ │ blx 2704f80 │ │ mov r2, r0 │ │ mov r0, r4 │ │ mov r3, r1 │ │ blx 2704d40 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ - movs r1, #141 @ 0x8d │ │ - cdp2 0, 0, cr1, cr15, cr12, {4} │ │ + movs r1, #186 @ 0xba │ │ + mcr2 0, 0, r1, cr15, cr9, {5} │ │ mrc2 5, 0, fp, cr2, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r3, [pc, #164] @ (2124a20 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -252343,20 +252343,20 @@ │ │ bic.w r1, r6, #2 │ │ mov r0, r5 │ │ blx 2700070 │ │ movs r0, #0 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - bl 1e93646 │ │ - asrs r0, r7, #32 │ │ - cdp2 2, 1, cr7, cr2, cr5, {1} │ │ + bl 1ec0646 │ │ + asrs r5, r4, #1 │ │ + mrc2 2, 0, r7, cr2, cr2, {2} │ │ mrc2 14, 0, r2, cr2, cr6, {6} │ │ lsls r1, r4, #1 │ │ - ldr r6, [pc, #648] @ (2124cbc ) │ │ + ldr r6, [pc, #828] @ (2124d70 ) │ │ mrc2 4, 0, sp, cr2, cr4, {6} │ │ bmi.n 21249e2 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8} │ │ @@ -252710,15 +252710,15 @@ │ │ beq.n 2124dfa │ │ ldr r0, [sp, #48] @ 0x30 │ │ b.n 2124df6 │ │ b.n 2124e08 │ │ b.n 2124dfa │ │ b.n 2124e08 │ │ nop │ │ - bkpt 0x008b │ │ + bkpt 0x00b8 │ │ vfmal.f16 d15, s31, s10[1] │ │ lsls r0, r1, #1 │ │ lsls r0, r0, #31 │ │ beq.n 2124dfa │ │ ldr r0, [sp, #80] @ 0x50 │ │ blx 26ffad0 │ │ ldrb.w r0, [sp, #88] @ 0x58 │ │ @@ -252739,24 +252739,24 @@ │ │ blx 26ffaf0 │ │ ldr r1, [sp, #616] @ 0x268 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ittee lt │ │ cmplt r3, #102 @ 0x66 │ │ lsllt r1, r4, #1 │ │ - lsrge r6, r2, #29 │ │ - mrc2ge 9, 0, r9, cr2, cr10, {7} @ │ │ - mrc2 9, 0, pc, cr0, cr11, {0} @ │ │ - mcr2 11, 0, fp, cr14, cr9, {3} @ │ │ - mcr2 2, 0, pc, cr15, cr8, {3} @ │ │ - cdp2 3, 1, cr13, cr1, cr14, {4} │ │ - mrc2 13, 0, r3, cr1, cr0, {0} │ │ - mrc2 12, 0, r3, cr0, cr12, {6} │ │ - cdp2 14, 1, cr1, cr0, cr10, {3} │ │ - cdp2 14, 0, cr1, cr15, cr6, {2} │ │ + lsrge r3, r0, #30 │ │ + vselvsge.f32 s18, s4, s15 @ │ │ + @ instruction: 0xfe10f948 │ │ + vseleq.f64 d11, d30, d22 │ │ + cdp2 2, 0, cr15, cr15, cr5, {5} │ │ + mrc2 3, 0, sp, cr1, cr11, {5} │ │ + mrc2 13, 0, r3, cr1, cr13, {1} │ │ + cdp2 13, 1, cr3, cr0, cr9, {0} │ │ + mrc2 14, 0, r1, cr0, cr7, {4} │ │ + mcr2 14, 0, r1, cr15, cr3, {3} │ │ vfmal.f16 d2, s30, s1[0] │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #36] @ (2124e8c ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -252769,16 +252769,16 @@ │ │ movs r2, #3 │ │ add r3, pc │ │ blx 2704da0 │ │ mov r1, r0 │ │ mov r0, r4 │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ b.w 26fee48 │ │ - @ instruction: 0xb860 │ │ - cdp2 0, 1, cr15, cr0, cr4, {5} │ │ + @ instruction: 0xb88d │ │ + mrc2 0, 0, pc, cr0, cr1, {6} │ │ mrc2 5, 0, fp, cr1, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #56] @ (2124ed4 ) │ │ movs r1, #1 │ │ movs r2, #2 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -252798,16 +252798,16 @@ │ │ blx 2704d10 │ │ mov r0, r4 │ │ blx 2704f70 │ │ blx 2704fc0 │ │ movs r0, #0 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - push {r2, r5} │ │ - mrc2 11, 0, r0, cr1, cr8, {0} @ │ │ + push {r0, r4, r6} │ │ + @ instruction: 0xfe110b45 │ │ mrc2 5, 0, fp, cr2, cr0, {6} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #68] @ (2124f28 ) │ │ movs r1, #1 │ │ movs r2, #1 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -252831,17 +252831,17 @@ │ │ blx 2704b40 │ │ movw r1, #55536 @ 0xd8f0 │ │ mov r0, r4 │ │ movt r1, #65535 @ 0xffff │ │ blx 2704fd0 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ - str r5, [sp, #972] @ 0x3cc │ │ - mrc2 10, 0, r0, cr0, cr0, {6} @ │ │ - mrc2 4, 0, pc, cr2, cr11, {7} │ │ + str r6, [sp, #128] @ 0x80 │ │ + mrc2 10, 0, r0, cr0, cr13, {7} @ │ │ + cdp2 5, 1, cr15, cr2, cr8, {1} │ │ mcr2 5, 0, fp, cr14, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #48 @ 0x30 │ │ ldr r3, [pc, #276] @ (2125054 ) │ │ mov r6, r0 │ │ ldr r0, [pc, #276] @ (2125058 ) │ │ @@ -252948,19 +252948,19 @@ │ │ b.n 2125042 │ │ ldrb.w r0, [sp, #32] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #40] @ 0x28 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - ldrsb r2, [r4, r5] │ │ + ldrsb r7, [r1, r6] │ │ mrc2 6, 0, r2, cr1, cr2, {3} │ │ lsls r1, r4, #1 │ │ - str r7, [sp, #224] @ 0xe0 │ │ - mcr2 10, 0, r0, cr15, cr0, {2} @ │ │ + str r7, [sp, #404] @ 0x194 │ │ + mcr2 10, 0, r0, cr15, cr13, {3} @ │ │ mrc2 5, 0, r2, cr2, cr6, {5} │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #140] @ (21250fc ) │ │ movs r1, #3 │ │ movs r2, #3 │ │ @@ -253014,20 +253014,20 @@ │ │ ldr r1, [pc, #28] @ (212510c ) │ │ add r1, pc │ │ mov r0, r4 │ │ blx 2704d10 │ │ movs r0, #0 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - @ instruction: 0xb89b │ │ - mcr2 0, 0, r1, cr15, cr9, {0} │ │ - mrc2 10, 0, r0, cr1, cr12, {5} @ │ │ + @ instruction: 0xb8c8 │ │ + cdp2 0, 0, cr1, cr15, cr6, {2} │ │ + @ instruction: 0xfe110ae9 │ │ vcmla.f16 d2, d2, d6[0], #90 │ │ lsls r1, r4, #1 │ │ - bl 2456d2c │ │ + bl 2483d2c │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #104] @ (2125180 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ add r3, pc │ │ @@ -253064,19 +253064,19 @@ │ │ ldr r1, [pc, #24] @ (212518c ) │ │ add r1, pc │ │ mov r0, r4 │ │ blx 2704d10 │ │ movs r0, #0 │ │ pop {r4, r6, r7, pc} │ │ nop │ │ - cbz r0, 21251bc │ │ - mrc2 10, 0, r6, cr1, cr11, {7} @ │ │ + sxth r5, r1 │ │ + vselvs.f64 d6, d1, d24 │ │ mrc2 7, 0, r2, cr2, cr10, {3} │ │ lsls r1, r4, #1 │ │ - bl 23d2dac │ │ + bl 23ffdac │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ movs r1, #1 │ │ mov r4, r0 │ │ blx 2704fe0 │ │ vmov.i32 d16, #0 @ 0x00000000 │ │ mov r0, r4 │ │ @@ -253134,16 +253134,16 @@ │ │ blx 2704d10 │ │ blx 2700d00 │ │ mov r1, r0 │ │ mov r0, r4 │ │ blx 2704c20 │ │ movs r0, #1 │ │ pop {r4, r6, r7, pc} │ │ - beq.n 21252a6 │ │ - mrc2 7, 0, r0, cr0, cr12, {5} │ │ + beq.n 2125300 │ │ + cdp2 7, 1, cr0, cr0, cr9, {7} │ │ mrc2 5, 0, fp, cr2, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ ldr r3, [pc, #76] @ (212528c ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -253173,17 +253173,17 @@ │ │ blx 2704e70 │ │ mov r1, r0 │ │ mov r0, r5 │ │ blx 2700d10 │ │ movs r0, #0 │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ - str r2, [sp, #876] @ 0x36c │ │ - mrc2 7, 0, r0, cr1, cr2, {3} │ │ - mrc2 5, 0, r1, cr2, cr8, {7} │ │ + str r3, [sp, #32] │ │ + mrc2 7, 0, r0, cr1, cr15, {4} │ │ + cdp2 6, 1, cr1, cr2, cr5, {1} │ │ mrc2 5, 0, fp, cr0, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r3, [pc, #120] @ (212531c ) │ │ movs r1, #2 │ │ movs r2, #3 │ │ mov r5, r0 │ │ @@ -253229,17 +253229,17 @@ │ │ mov r2, r0 │ │ mov r0, r4 │ │ mov r1, r6 │ │ blx 2700a90 │ │ movs r0, #0 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - strb r6, [r6, #11] │ │ - mcr2 7, 0, r0, cr15, cr0, {0} │ │ - cdp2 5, 1, cr5, cr2, cr13, {2} │ │ + strb r3, [r4, #12] │ │ + mcr2 7, 0, r0, cr15, cr13, {1} │ │ + mrc2 5, 0, r5, cr2, cr10, {3} │ │ mrc2 5, 0, fp, cr0, cr0, {5} │ │ add r7, sp, #8 │ │ sub.w sp, sp, #512 @ 0x200 │ │ mov r4, sp │ │ bfc r4, #0, #4 │ │ mov sp, r4 │ │ ldr r3, [pc, #284] @ (2125458 ) │ │ @@ -253350,18 +253350,18 @@ │ │ add r0, sp, #16 │ │ blx 26ffd10 │ │ b.n 212544e │ │ b.n 212544e │ │ add r0, sp, #320 @ 0x140 │ │ blx 27036f0 │ │ blx 26ffaf0 │ │ - ldrsb r5, [r4, r4] │ │ + ldrsb r2, [r2, r5] │ │ mcr2 2, 0, r2, cr15, cr8, {3} │ │ lsls r1, r4, #1 │ │ - lsls r4, r5, #25 │ │ + lsls r1, r3, #26 │ │ cdp2 1, 1, cr2, cr2, cr0, {5} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ vpush {d8-d11} │ │ sub sp, #32 │ │ @@ -253617,24 +253617,24 @@ │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - lsls r6, r4, #28 │ │ + lsls r3, r2, #29 │ │ mrc2 1, 0, r2, cr2, cr10, {1} │ │ lsls r1, r4, #1 │ │ - lsls r2, r5, #20 │ │ - mrc2 7, 0, r0, cr2, cr15, {0} │ │ - cdp2 1, 1, cr9, cr2, cr8, {7} │ │ - mcr2 5, 0, pc, cr15, cr6, {7} @ │ │ - mcr2 7, 0, r6, cr15, cr15, {5} │ │ - cdp2 3, 1, cr4, cr2, cr0, {5} │ │ - cdp2 6, 1, cr3, cr2, cr11, {7} │ │ + lsls r7, r2, #21 │ │ + cdp2 7, 1, cr0, cr2, cr12, {2} │ │ + mrc2 2, 0, r9, cr2, cr5, {0} │ │ + cdp2 6, 0, cr15, cr15, cr3, {1} │ │ + cdp2 7, 0, cr6, cr15, cr12, {7} │ │ + cdp2 3, 1, cr4, cr2, cr13, {6} │ │ + mrc2 7, 0, r3, cr2, cr8, {0} │ │ mcr2 0, 0, r2, cr15, cr10, {1} │ │ lsls r1, r4, #1 │ │ subs r4, r5, #2 │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ @@ -253671,17 +253671,17 @@ │ │ vcvt.s32.f64 s0, d16 │ │ vmov r1, s0 │ │ blx 2700800 │ │ movs r0, #0 │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - asrs r1, r2, #4 │ │ - mrc2 2, 0, r0, cr0, cr14, {0} │ │ - cdp2 13, 1, cr8, cr2, cr3, {2} │ │ + asrs r6, r7, #4 │ │ + cdp2 2, 1, cr0, cr0, cr11, {2} │ │ + mrc2 13, 0, r8, cr2, cr0, {3} │ │ mrc2 5, 0, fp, cr0, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d10} │ │ sub sp, #40 @ 0x28 │ │ ldr r3, [pc, #612] @ (2125a74 ) │ │ @@ -253899,25 +253899,25 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #32] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - @ instruction: 0xe800fe10 │ │ + @ instruction: 0xe82dfe10 │ │ adds r4, r4, #6 │ │ lsls r1, r4, #1 │ │ - b.n 2125a64 │ │ - vfmsl.f16 d14, s0, s4[0] │ │ - mrc2 1, 0, r0, cr0, cr6, {2} │ │ - mrc2 2, 0, pc, cr2, cr9, {3} │ │ - vfmal.f16 d0, s31, s2[1] │ │ - cdp2 6, 1, cr14, cr1, cr14, {2} │ │ - mrc2 12, 0, r8, cr1, cr15, {0} │ │ - cdp2 1, 1, cr7, cr1, cr0, {3} │ │ + @ instruction: 0xe81ffe10 │ │ + @ instruction: 0xe83ffe10 │ │ + lsls r3, r0, #6 │ │ + cdp2 2, 1, cr15, cr2, cr6, {5} │ │ + vcmla.f16 q0, , d6[0], #0 │ │ + mrc2 6, 0, lr, cr1, cr11, {3} │ │ + cdp2 12, 1, cr8, cr1, cr12, {2} │ │ + cdp2 1, 1, cr7, cr1, cr13, {4} │ │ vselvs.f64 d1, d16, d0 │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ ldr r3, [pc, #124] @ (2125b24 ) │ │ movs r1, #2 │ │ @@ -253966,17 +253966,17 @@ │ │ mov r0, r4 │ │ blx 2704c20 │ │ movs r0, #1 │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ strh r3, [r7, #6] │ │ - mrc2 13, 0, r0, cr2, cr8, {7} │ │ - mrc2 14, 0, r0, cr0, cr8, {0} │ │ - cdp2 14, 1, cr15, cr0, cr14, {6} │ │ + cdp2 14, 1, cr0, cr2, cr5, {1} │ │ + cdp2 14, 1, cr0, cr0, cr5, {2} │ │ + mrc2 14, 0, pc, cr0, cr11, {7} │ │ mrc2 5, 0, fp, cr1, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d13} │ │ sub sp, #40 @ 0x28 │ │ ldr r3, [pc, #508] @ (2125d44 ) │ │ @@ -254159,28 +254159,28 @@ │ │ itt ne │ │ ldrne r0, [sp, #32] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ - b.n 21255ce │ │ + b.n 2125628 │ │ @ instruction: 0xfe111a6c │ │ lsls r1, r4, #1 │ │ - lsls r4, r1, #2 │ │ - cdp2 0, 1, cr0, cr2, cr12, {5} │ │ - cdp2 13, 1, cr10, cr2, cr4, {5} │ │ + lsls r1, r7, #2 │ │ + mrc2 0, 0, r0, cr2, cr9, {6} │ │ + mrc2 13, 0, sl, cr2, cr1, {6} │ │ vfmal.f16 d1, s31, s5[0] │ │ lsls r1, r4, #1 │ │ - movs r4, #81 @ 0x51 │ │ - cdp2 7, 1, cr10, cr2, cr2, {3} │ │ - vfmsl.f16 q1, d17, d6[0] │ │ - vselvs.f16 s16, s2, s15 │ │ - vfmsl.f16 d2, s1, s8[0] │ │ - cdp2 13, 1, cr15, cr1, cr14, {1} │ │ + movs r4, #126 @ 0x7e │ │ + cdp2 7, 1, cr10, cr2, cr15, {4} │ │ + vselvs.f16 s4, s2, s6 │ │ + mrc2 9, 0, r8, cr1, cr4, {2} @ │ │ + vcmla.f16 q1, q8, d1[0], #90 │ │ + mrc2 13, 0, pc, cr1, cr11, {2} │ │ mrc2 5, 0, fp, cr1, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ ldr r3, [pc, #124] @ (2125df8 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -254226,18 +254226,18 @@ │ │ mov r1, r0 │ │ mov r0, r4 │ │ blx 2704c20 │ │ movs r0, #1 │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - b.n 2125b76 │ │ + b.n 2125bd0 │ │ mcr2 6, 0, ip, cr14, cr6, {5} │ │ mcr2 6, 0, ip, cr14, cr6, {6} │ │ - mcr2 11, 0, pc, cr14, cr10, {7} @ │ │ + cdp2 12, 0, cr15, cr14, cr7, {1} │ │ mrc2 5, 0, fp, cr1, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ ldr r3, [pc, #116] @ (2125e84 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -254280,18 +254280,18 @@ │ │ blx 2704d10 │ │ mov r1, r5 │ │ blx 27015a0 │ │ movs r0, #0 │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - stmia r4!, {r1, r2, r4, r6} │ │ - mrc2 5, 0, sl, cr0, cr11, {0} │ │ - mrc2 5, 0, sl, cr1, cr11, {1} │ │ - @ instruction: 0xfe11fb66 │ │ + stmia r4!, {r0, r1, r7} │ │ + cdp2 5, 1, cr10, cr0, cr8, {2} │ │ + cdp2 5, 1, cr10, cr1, cr8, {3} │ │ + mrc2 11, 0, pc, cr1, cr3, {4} @ │ │ mrc2 5, 0, fp, cr1, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ ldr r3, [pc, #116] @ (2125f10 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ mov r4, r0 │ │ @@ -254334,18 +254334,18 @@ │ │ blx 2704d10 │ │ mov r1, r5 │ │ blx 2701560 │ │ movs r0, #0 │ │ add sp, #8 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - b.n 21262cc │ │ - @ instruction: 0xfe100a40 │ │ - @ instruction: 0xfe100a60 │ │ - mrc2 10, 0, pc, cr0, cr10, {6} @ │ │ + b.n 2126326 │ │ + @ instruction: 0xfe100a6d │ │ + vselvs.f32 s0, s1, s26 │ │ + vselvs.f64 d15, d0, d7 │ │ mrc2 5, 0, fp, cr1, cr0, {5} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ sub sp, #8 │ │ ldr r3, [pc, #196] @ (2125ff0 ) │ │ movs r1, #3 │ │ movs r2, #3 │ │ @@ -254417,20 +254417,20 @@ │ │ mov r1, r0 │ │ mov r0, r4 │ │ blx 2704c20 │ │ movs r0, #1 │ │ add sp, #8 │ │ vpop {d8} │ │ pop {r4, r5, r7, pc} │ │ - ldr r1, [pc, #144] @ (2126084 ) │ │ - mrc2 11, 0, r6, cr0, cr11, {3} @ │ │ - mrc2 11, 0, r6, cr0, cr11, {4} @ │ │ + ldr r1, [pc, #324] @ (2126138 ) │ │ + vselvs.f64 d6, d16, d24 │ │ + @ instruction: 0xfe106bc8 │ │ cdp2 7, 1, cr9, cr0, cr15, {1} │ │ mrc2 7, 0, r9, cr2, cr1, {3} │ │ - mrc2 10, 0, pc, cr2, cr6, {0} @ │ │ + @ instruction: 0xfe12fa43 │ │ mrc2 5, 0, fp, cr1, cr0, {5} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ sub sp, #8 │ │ ldr r3, [pc, #216] @ (21260ec ) │ │ movs r1, #3 │ │ movs r2, #3 │ │ @@ -254507,20 +254507,20 @@ │ │ movs r0, #0 │ │ add sp, #8 │ │ vpop {d8} │ │ pop {r4, r5, r7, pc} │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ - strh r0, [r5, #42] @ 0x2a │ │ + strh r5, [r2, #44] @ 0x2c │ │ mrc2 6, 0, r9, cr0, cr13, {6} │ │ mrc2 6, 0, r9, cr2, cr13, {7} │ │ - mrc2 12, 0, r5, cr2, cr2, {0} │ │ - cdp2 12, 1, cr5, cr2, cr12, {3} │ │ - mrc2 9, 0, pc, cr2, cr6, {0} @ │ │ + mrc2 12, 0, r5, cr2, cr15, {1} │ │ + mrc2 12, 0, r5, cr2, cr9, {4} │ │ + @ instruction: 0xfe12f943 │ │ mrc2 5, 0, fp, cr1, cr0, {5} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ sub sp, #8 │ │ ldr r3, [pc, #208] @ (21261e0 ) │ │ movs r1, #3 │ │ movs r2, #3 │ │ @@ -254594,20 +254594,20 @@ │ │ vmov r2, s16 │ │ mov r1, r5 │ │ blx 27015d0 │ │ movs r0, #0 │ │ add sp, #8 │ │ vpop {d8} │ │ pop {r4, r5, r7, pc} │ │ - subs r3, r5, #4 │ │ - cdp2 15, 1, cr13, cr2, cr0, {3} │ │ - cdp2 15, 1, cr13, cr0, cr0, {4} │ │ - mrc2 7, 0, r3, cr0, cr15, {1} │ │ - mrc2 7, 0, r3, cr2, cr7, {4} │ │ - vfmsl.f16 d15, s4, s8[1] │ │ + subs r0, r3, #5 │ │ + cdp2 15, 1, cr13, cr2, cr13, {4} │ │ + cdp2 15, 1, cr13, cr0, cr13, {5} │ │ + cdp2 7, 1, cr3, cr0, cr12, {3} │ │ + cdp2 7, 1, cr3, cr2, cr4, {6} │ │ + vcmla.f16 , q1, d9[0], #90 │ │ mrc2 5, 0, fp, cr1, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r3, [pc, #172] @ (21262b0 ) │ │ movs r1, #3 │ │ movs r2, #3 │ │ @@ -254674,20 +254674,20 @@ │ │ mov r1, r5 │ │ mov r2, r6 │ │ blx 27015e0 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - strh r4, [r7, #38] @ 0x26 │ │ - cdp2 7, 0, cr0, cr15, cr15, {0} │ │ - cdp2 7, 1, cr0, cr0, cr15, {1} │ │ - mrc2 6, 0, r0, cr0, cr15, {7} │ │ - cdp2 7, 1, cr0, cr0, cr13, {1} │ │ - mrc2 7, 0, pc, cr0, cr2, {2} │ │ + strh r1, [r5, #40] @ 0x28 │ │ + mcr2 7, 0, r0, cr15, cr12, {1} │ │ + mrc2 7, 0, r0, cr0, cr12, {2} │ │ + cdp2 7, 1, cr0, cr0, cr12, {1} │ │ + mrc2 7, 0, r0, cr0, cr10, {2} │ │ + mrc2 7, 0, pc, cr0, cr15, {3} │ │ mrc2 5, 0, fp, cr1, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #8 │ │ ldr r3, [pc, #172] @ (2126380 ) │ │ movs r1, #3 │ │ movs r2, #3 │ │ @@ -254754,28 +254754,28 @@ │ │ mov r1, r5 │ │ mov r2, r6 │ │ blx 27015f0 │ │ movs r0, #0 │ │ add sp, #8 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - b.n 21266b6 │ │ - vseleq.f32 s10, s28, s10 │ │ - vselvs.f32 s10, s4, s11 │ │ - mrc2 4, 0, ip, cr2, cr6, {0} │ │ - cdp2 4, 0, cr12, cr15, cr4, {2} │ │ - cdp2 6, 0, cr15, cr15, cr2, {4} │ │ + b.n 2126710 │ │ + mcr2 10, 0, r5, cr14, cr2, {1} @ │ │ + mrc2 10, 0, r5, cr2, cr2, {2} @ │ │ + cdp2 4, 1, cr12, cr2, cr3, {2} │ │ + mcr2 4, 0, ip, cr15, cr1, {3} │ │ + cdp2 6, 0, cr15, cr15, cr15, {5} │ │ cdp2 5, 1, cr11, cr1, cr0, {4} │ │ mov r7, sp │ │ ldr r1, [pc, #8] @ (21263a8 ) │ │ add r1, pc │ │ blx 2704b40 │ │ movs r0, #1 │ │ pop {r7, pc} │ │ - strh r7, [r6, #14] │ │ + strh r4, [r4, #16] │ │ Address 0x21263aa is out of bounds. │ │ │ │ │ │ 021263ac : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ @@ -254956,59 +254956,59 @@ │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ asrs r4, r6, #6 │ │ lsls r1, r4, #1 │ │ asrs r2, r4, #6 │ │ lsls r1, r4, #1 │ │ - cmp r7, ip │ │ - mcr2 10, 0, r1, cr15, cr1, {0} @ │ │ + cmp ip, r2 │ │ + mcr2 10, 0, r1, cr15, cr14, {1} @ │ │ cdp2 1, 1, cr9, cr2, cr1, {3} │ │ mrc2 1, 0, r0, cr2, cr5, {3} │ │ movs r0, r0 │ │ - lsls r6, r3, #10 │ │ + lsls r3, r1, #11 │ │ cdp2 1, 1, cr0, cr0, cr7, {6} │ │ movs r0, r0 │ │ bkpt 0x0022 │ │ mcr2 2, 0, r0, cr14, cr5, {2} │ │ movs r0, r0 │ │ - strb r5, [r0, r6] │ │ + strb r2, [r6, r6] │ │ mrc2 2, 0, r0, cr2, cr3, {7} │ │ movs r0, r0 │ │ - adds r0, r3, r7 │ │ + subs r5, r0, r0 │ │ cdp2 3, 1, cr0, cr2, cr13, {4} │ │ movs r0, r0 │ │ - stmia r1!, {r0, r1, r2, r3, r4, r6, r7} │ │ + stmia r2!, {r2, r3} │ │ mcr2 4, 0, r0, cr15, cr3, {4} │ │ movs r0, r0 │ │ strb r7, [r3, #20] │ │ mrc2 5, 0, r0, cr2, cr9, {4} │ │ movs r0, r0 │ │ - movs r7, #46 @ 0x2e │ │ + movs r7, #91 @ 0x5b │ │ mcr2 7, 0, r0, cr15, cr15, {6} │ │ movs r0, r0 │ │ - b.n 2126c80 │ │ + b.n 2126cda │ │ vseleq.f16 s0, s30, s11 │ │ movs r0, r0 │ │ - movs r3, #244 @ 0xf4 │ │ + movs r4, #33 @ 0x21 │ │ @ instruction: 0xfe100acb │ │ movs r0, r0 │ │ - adds r4, r1, r6 │ │ + adds r1, r7, r6 │ │ mrc2 11, 0, r0, cr2, cr1, {3} @ │ │ movs r0, r0 │ │ - ldrb r0, [r2, #31] │ │ + ldrb r5, [r7, #31] │ │ mcr2 12, 0, r0, cr15, cr7, {0} │ │ movs r0, r0 │ │ - ldr r3, [sp, #884] @ 0x374 │ │ + ldr r4, [sp, #40] @ 0x28 │ │ mrc2 12, 0, r0, cr1, cr1, {2} │ │ movs r0, r0 │ │ - add sl, r2 │ │ + add pc, r7 │ │ cdp2 12, 0, cr0, cr15, cr11, {4} │ │ movs r0, r0 │ │ - ldrb r1, [r6, r3] │ │ + ldrb r6, [r3, r4] │ │ mrc2 12, 0, r0, cr1, cr1, {7} │ │ movs r0, r0 │ │ asrs r4, r6, #1 │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r3, [pc, #68] @ (2126634 ) │ │ @@ -255037,19 +255037,19 @@ │ │ add r1, pc │ │ bl 2094b84 ::InfoType* std::__ndk1::vector::InfoType, std::__ndk1::allocator::InfoType> >::__emplace_back_slow_path(WarpMeshInfo const&)@@Base+0x24c> │ │ mov r0, r5 │ │ blx 2705060 │ │ movs r0, #0 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - lsls r5, r2, #15 │ │ - mrc2 0, 0, r4, cr0, cr3, {6} │ │ + lsls r2, r0, #16 │ │ + cdp2 1, 1, cr4, cr0, cr0, {0} │ │ mrc2 15, 0, r0, cr1, cr12, {6} │ │ lsls r1, r4, #1 │ │ - subs r4, #183 @ 0xb7 │ │ + subs r4, #228 @ 0xe4 │ │ mrc2 4, 0, sp, cr1, cr4, {6} │ │ bmi.n 21265f2 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8} │ │ sub sp, #8 │ │ ldr r3, [pc, #132] @ (21266d8 ) │ │ @@ -255098,16 +255098,16 @@ │ │ vpop {d8} │ │ pop {r4, r6, r7, pc} │ │ nop │ │ ldr r1, [sp, #616] @ 0x268 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ldr r1, [sp, #612] @ 0x264 │ │ subs r7, #185 @ 0xb9 │ │ - add r3, pc, #148 @ (adr r3, 2126770 ) │ │ - mcr2 2, 0, r3, cr15, cr15, {3} │ │ + add r3, pc, #328 @ (adr r3, 2126824 ) │ │ + cdp2 2, 0, cr3, cr15, cr12, {5} │ │ mrc2 14, 0, fp, cr2, cr7, {1} │ │ mcr2 5, 0, fp, cr14, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r3, [pc, #148] @ (2126784 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -255163,16 +255163,16 @@ │ │ movw r1, #55536 @ 0xd8f0 │ │ mov r0, r4 │ │ movt r1, #65535 @ 0xffff │ │ blx 2704de0 │ │ movs r0, #0 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - ldrb r6, [r0, #27] │ │ - cdp2 2, 1, cr15, cr0, cr4, {6} │ │ + ldrb r3, [r6, #27] │ │ + mrc2 2, 0, pc, cr0, cr1, {7} │ │ cdp2 13, 1, cr11, cr1, cr10, {5} │ │ mcr2 5, 0, fp, cr14, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r3, [pc, #140] @ (2126828 ) │ │ movs r1, #2 │ │ movs r2, #2 │ │ @@ -255227,18 +255227,18 @@ │ │ mov r0, r4 │ │ add r1, pc │ │ blx 2704b40 │ │ movs r0, #1 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - subs r7, #101 @ 0x65 │ │ - mrc2 2, 0, pc, cr1, cr8, {0} │ │ - mrc2 9, 0, sp, cr1, cr11, {0} @ │ │ - cdp2 14, 1, cr9, cr0, cr1, {1} │ │ + subs r7, #146 @ 0x92 │ │ + cdp2 2, 1, cr15, cr1, cr5, {2} │ │ + @ instruction: 0xfe11d948 │ │ + cdp2 14, 1, cr9, cr0, cr14, {2} │ │ mcr2 5, 0, fp, cr15, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [pc, #252] @ (2126940 ) │ │ mov r1, r4 │ │ add r0, pc │ │ @@ -255338,15 +255338,15 @@ │ │ bl 20867f0 │ │ add r0, sp, #8 │ │ bl 20867f0 │ │ blx 26ffaf0 │ │ nop │ │ lsrs r0, r7, #21 │ │ lsls r1, r4, #1 │ │ - bl 252456a │ │ + bl 1d5156a │ │ lsrs r0, r5, #18 │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [pc, #252] @ (2126a54 ) │ │ @@ -255448,15 +255448,15 @@ │ │ bl 20867f0 │ │ add r0, sp, #8 │ │ bl 20867f0 │ │ blx 26ffaf0 │ │ nop │ │ lsrs r4, r4, #17 │ │ lsls r1, r4, #1 │ │ - cbnz r3, 2126a68 │ │ + cbnz r0, 2126a74 │ │ mrc2 11, 0, r0, cr0, cr4, {4} @ │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #60 @ 0x3c │ │ mov r4, r0 │ │ @@ -255674,23 +255674,23 @@ │ │ ldr r1, [r0, #0] │ │ ldr r1, [r1, #4] │ │ blx r1 │ │ b.n 2126c66 │ │ nop │ │ lsrs r2, r1, #13 │ │ lsls r1, r4, #1 │ │ - strh r4, [r1, r3] │ │ - vcmla.f16 , q1, d10[1], #90 │ │ - cdp2 12, 1, cr9, cr1, cr1, {2} │ │ - vfmsl.f16 d9, s1, s14[1] │ │ - mrc2 0, 0, lr, cr1, cr4, {2} │ │ - mcr2 9, 0, sp, cr15, cr8, {4} @ │ │ - mcr2 12, 0, r7, cr14, cr6, {0} │ │ - mcr2 6, 0, pc, cr15, cr10, {1} @ │ │ - cdp2 5, 1, cr13, cr0, cr2, {6} │ │ + strh r1, [r7, r3] │ │ + vfmsl.f16 d5, s5, s14[0] │ │ + cdp2 12, 1, cr9, cr1, cr14, {3} │ │ + vcmla.f16 , q8, d12[0], #90 │ │ + cdp2 0, 1, cr14, cr1, cr1, {4} │ │ + @ instruction: 0xfe0fd9c5 │ │ + cdp2 12, 0, cr7, cr14, cr3, {2} │ │ + cdp2 6, 0, cr15, cr15, cr7, {3} │ │ + cdp2 5, 1, cr13, cr0, cr15, {7} │ │ vselvs.f16 s0, s1, s17 │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #48 @ 0x30 │ │ mov r4, r0 │ │ @@ -255815,16 +255815,16 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ lsrs r6, r6, #3 │ │ lsls r1, r4, #1 │ │ - push {r0, r2, r3, r4, r5, r6, r7, lr} │ │ - vfmsl.f16 d7, s1, s7[0] │ │ + @ instruction: 0xb62a │ │ + vcmla.f16 , q8, d0[1], #90 │ │ mrc2 7, 0, r0, cr1, cr14, {7} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #88 @ 0x58 │ │ mov r1, r0 │ │ @@ -255983,15 +255983,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ lsls r6, r4, #30 │ │ lsls r1, r4, #1 │ │ add r3, sp, #872 @ 0x368 │ │ - mrc2 7, 0, r9, cr2, cr9, {5} │ │ + cdp2 7, 1, cr9, cr2, cr6, {7} │ │ mcr2 7, 0, r0, cr15, cr6, {3} │ │ lsls r1, r4, #1 │ │ lsls r0, r3, #25 │ │ lsls r1, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #64 @ 0x40 │ │ @@ -256252,15 +256252,15 @@ │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ lsls r4, r7, #15 │ │ lsls r1, r4, #1 │ │ cbz r2, 2127270 │ │ - vfmal.f16 d3, s29, s11[0] │ │ + vcmla.f16 , q15, d2[1], #0 │ │ mcr2 3, 0, r0, cr15, cr6, {5} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [pc, #148] @ (21272c8 ) │ │ @@ -256323,16 +256323,16 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ lsls r6, r0, #14 │ │ lsls r1, r4, #1 │ │ - ldmia r5!, {r0, r7} │ │ - mrc2 11, 0, r4, cr1, cr5, {1} @ │ │ + ldmia r5, {r1, r2, r3, r5, r7} │ │ + @ instruction: 0xfe114b62 │ │ mrc2 3, 0, r0, cr2, cr14, {0} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #144 @ 0x90 │ │ mov r8, r0 │ │ @@ -256424,15 +256424,15 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ lsls r2, r2, #11 │ │ lsls r1, r4, #1 │ │ - sxth r0, r2 │ │ + sxth r5, r7 │ │ cdp2 2, 0, cr0, cr15, cr0, {1} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #16 │ │ mov r4, r0 │ │ @@ -256517,15 +256517,15 @@ │ │ ittt eq │ │ addeq sp, #16 │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ lsls r0, r2, #7 │ │ lsls r1, r4, #1 │ │ - b.n 2127054 │ │ + b.n 21270ae │ │ mrc2 1, 0, r0, cr1, cr2, {0} │ │ lsls r1, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ vpush {d8} │ │ sub sp, #16 │ │ @@ -256606,15 +256606,15 @@ │ │ vpopeq {d8} │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ lsls r0, r3, #3 │ │ lsls r1, r4, #1 │ │ - b.n 2126f50 │ │ + b.n 2126faa │ │ cdp2 0, 1, cr0, cr1, cr12, {1} │ │ lsls r1, r4, #1 │ │ │ │ 021275b8 >(std::__ndk1::shared_ptr)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -256868,19 +256868,19 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldr r6, [sp, #848] @ 0x350 │ │ lsls r7, r3, #1 │ │ cdp2 0, 3, cr0, cr10, cr0, {3} │ │ cdp2 0, 2, cr0, cr0, cr0, {3} │ │ - adds r1, #229 @ 0xe5 │ │ - mcr2 6, 0, r0, cr15, cr11, {4} │ │ + adds r2, #18 │ │ + cdp2 6, 0, cr0, cr15, cr8, {6} │ │ mrc2 13, 0, pc, cr2, cr2, {7} │ │ lsls r0, r4, #1 │ │ - ldr r4, [r3, #92] @ 0x5c │ │ + ldr r1, [r1, #96] @ 0x60 │ │ cdp2 13, 1, cr15, cr1, cr8, {5} │ │ lsls r0, r4, #1 │ │ │ │ 0212784c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -256928,15 +256928,15 @@ │ │ mvn.w r1, #2 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26fee60 │ │ nop │ │ ldr r5, [sp, #968] @ 0x3c8 │ │ lsls r7, r3, #1 │ │ - movs r0, #189 @ 0xbd │ │ + movs r0, #234 @ 0xea │ │ Address 0x21278de is out of bounds. │ │ │ │ │ │ 021278e0 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r2 │ │ @@ -257007,15 +257007,15 @@ │ │ mov r0, r4 │ │ mvn.w r1, #1 │ │ blx 2704b00 │ │ mov r0, r6 │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mrrc2 0, 6, r0, lr, cr0 │ │ - str r2, [r3, r6] │ │ + str r7, [r0, r7] │ │ cdp2 13, 1, cr9, cr0, cr2, {0} │ │ lsls r7, r3, #1 │ │ │ │ 021279ac : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r1 │ │ @@ -257061,16 +257061,16 @@ │ │ mov r0, r4 │ │ mvn.w r1, #1 │ │ blx 2704b00 │ │ mov r0, r5 │ │ pop {r4, r5, r7, pc} │ │ movs r0, #0 │ │ pop {r4, r5, r7, pc} │ │ - b.n 2127f90 │ │ - mrc2 0, 0, pc, cr1, cr2, {7} │ │ + b.n 2127fea │ │ + mrc2 1, 0, pc, cr1, cr15, {0} │ │ Address 0x2127a2e is out of bounds. │ │ │ │ │ │ 02127a30 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -257244,20 +257244,20 @@ │ │ ittt eq │ │ addeq sp, #32 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ @ instruction: 0xfb0e0060 │ │ - b.n 2127f6c │ │ - mrc2 15, 0, r2, cr1, cr12, {6} │ │ - cdp2 15, 0, cr2, cr15, cr4, {5} │ │ + b.n 2127fc6 │ │ + cdp2 0, 1, cr3, cr1, cr9, {0} │ │ + mcr2 15, 0, r2, cr15, cr1, {6} │ │ vdot.bf16 , , d8[0] │ │ lsls r0, r4, #1 │ │ - ldr r7, [pc, #528] @ (2127e1c ) │ │ + ldr r7, [pc, #708] @ (2127ed0 ) │ │ @ instruction: 0xfe10f9e0 │ │ lsls r0, r4, #1 │ │ │ │ 02127c10 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ @@ -257388,25 +257388,25 @@ │ │ addeq sp, #32 │ │ vpopeq {d8} │ │ ldmiaeq.w sp!, {r4, r5, r7, lr} │ │ it eq │ │ beq.w 26fee90 │ │ b.n 2127d3a │ │ nop │ │ - ldmia r0!, {r3, r4, r5, r6} │ │ + ldmia r0, {r0, r2, r5, r7} │ │ mcr2 9, 0, pc, cr14, cr14, {1} @ │ │ lsls r0, r4, #1 │ │ - lsrs r0, r7, #17 │ │ - mrc2 12, 0, r8, cr0, cr13, {6} │ │ + lsrs r5, r4, #18 │ │ + cdp2 13, 1, cr8, cr0, cr10, {0} │ │ vfmal.f16 , d15, d0[2] │ │ lsls r0, r4, #1 │ │ @ instruction: 0xff83ffff │ │ - lsrs r4, r3, #17 │ │ - mrc2 13, 0, r2, cr0, cr14, {7} │ │ - cdp2 12, 0, cr0, cr15, cr2, {2} │ │ + lsrs r1, r1, #18 │ │ + cdp2 14, 1, cr2, cr0, cr11, {1} │ │ + cdp2 12, 0, cr0, cr15, cr15, {3} │ │ vfmsl.f16 d15, s1, s8[0] │ │ lsls r0, r4, #1 │ │ │ │ 02127d94 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -257759,34 +257759,34 @@ │ │ moveq r0, r5 │ │ addeq sp, #40 @ 0x28 │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ @ instruction: 0xf7440060 │ │ - bkpt 0x0053 │ │ - mrc2 14, 0, fp, cr0, cr15, {1} │ │ + bkpt 0x0080 │ │ + cdp2 14, 1, cr11, cr0, cr12, {3} │ │ vselvs.f16 s30, s0, s5 │ │ lsls r0, r4, #1 │ │ - stmia r1!, {r0, r2, r4, r7} │ │ + stmia r1!, {r1, r6, r7} │ │ vselvs.f16 s30, s0, s4 │ │ lsls r0, r4, #1 │ │ - ldr r3, [pc, #720] @ (212841c ) │ │ + ldr r3, [pc, #900] @ (21284d0 ) │ │ vcmla.f16 , q8, d2[1], #90 │ │ lsls r0, r4, #1 │ │ ldrh r4, [r7, r7] │ │ - cdp2 12, 1, cr13, cr2, cr14, {4} │ │ - mrc2 4, 0, ip, cr1, cr0, {0} │ │ - cdp2 5, 0, cr8, cr14, cr9, {7} │ │ - vseleq.f32 s4, s31, s0 │ │ - @ instruction: 0xfe0f2a48 │ │ - mcr2 7, 0, r2, cr15, cr7, {4} │ │ + mrc2 12, 0, sp, cr2, cr11, {5} │ │ + mrc2 4, 0, ip, cr1, cr13, {1} │ │ + mcr2 6, 0, r8, cr14, cr6, {0} │ │ + vseleq.f32 s4, s31, s27 │ │ + mcr2 10, 0, r2, cr15, cr5, {3} @ │ │ + cdp2 7, 0, cr2, cr15, cr4, {6} │ │ mrc2 9, 0, pc, cr0, cr6, {5} @ │ │ lsls r0, r4, #1 │ │ - lsrs r1, r7, #20 │ │ + lsrs r6, r4, #21 │ │ cdp2 4, 0, cr15, cr15, cr6, {5} │ │ lsls r0, r4, #1 │ │ │ │ 02128178 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -257937,23 +257937,23 @@ │ │ clz r0, r0 │ │ lsrs r5, r0, #5 │ │ ldr.w r0, [r9, #20] │ │ mvn.w r1, #1 │ │ blx 2704b00 │ │ mov r0, r5 │ │ b.n 21282f6 │ │ - bge.n 2128334 │ │ + blt.n 212838e │ │ mrc2 4, 0, pc, cr1, cr0, {1} │ │ lsls r0, r4, #1 │ │ movt r0, #51296 @ 0xc860 │ │ ldr r5, [r1, r4] │ │ mrc2 6, 0, pc, cr2, cr14, {5} │ │ lsls r0, r4, #1 │ │ - add r0, pc, #772 @ (adr r0, 2128650 ) │ │ - mrc2 11, 0, r3, cr0, cr6, {0} @ │ │ + add r0, pc, #952 @ (adr r0, 2128704 ) │ │ + @ instruction: 0xfe103b43 │ │ cdp2 2, 1, cr15, cr2, cr2, {6} │ │ lsls r0, r4, #1 │ │ │ │ 02128354 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -258143,26 +258143,26 @@ │ │ clz r0, r0 │ │ lsrs r5, r0, #5 │ │ ldr.w r0, [fp, #20] │ │ mvn.w r1, #1 │ │ blx 2704b00 │ │ mov r0, r5 │ │ b.n 212854e │ │ - bls.n 21285d0 │ │ + bls.n 212862a │ │ cdp2 2, 1, cr15, cr1, cr12, {2} │ │ lsls r0, r4, #1 │ │ @ instruction: 0xf4e60060 │ │ ldrsb r5, [r6, r2] │ │ mrc2 4, 0, pc, cr2, cr8, {6} │ │ lsls r0, r4, #1 │ │ @ instruction: 0xf4d80060 │ │ - pop {r0, r1, r3, r4, r5, r6, r7} │ │ - mrc2 12, 0, r9, cr0, cr8, {3} │ │ - mrc2 4, 0, sp, cr0, cr3, {2} │ │ - vfmsl.f16 d3, s3, s13[1] │ │ + pop {r3, r5, pc} │ │ + cdp2 12, 1, cr9, cr0, cr5, {5} │ │ + cdp2 4, 1, cr13, cr0, cr0, {4} │ │ + vcmla.f16 , , d11[1], #90 │ │ cdp2 0, 1, cr15, cr2, cr10, {3} │ │ lsls r0, r4, #1 │ │ │ │ 021285c0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -258321,22 +258321,22 @@ │ │ ldr r0, [r4, #20] │ │ mvn.w r1, #1 │ │ blx 2704b00 │ │ mov r0, r6 │ │ b.n 2128730 │ │ nop │ │ vmla.i32 d16, d14, d0[1] │ │ - bvs.n 21286b8 │ │ + bvs.n 2128712 │ │ mrc2 2, 0, pc, cr1, cr14, {3} │ │ lsls r0, r4, #1 │ │ strb r1, [r2, r3] │ │ cdp2 2, 1, cr15, cr2, cr0, {4} │ │ lsls r0, r4, #1 │ │ - blt.n 21287be >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x32> │ │ - mrc2 3, 0, lr, cr0, cr4, {0} │ │ + blt.n 2128818 >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x8c> │ │ + cdp2 3, 1, cr14, cr0, cr1, {2} │ │ cdp2 14, 0, cr14, cr15, cr8, {4} │ │ lsls r0, r4, #1 │ │ │ │ 0212878c >&, std::__ndk1::__fs::filesystem::path const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -258481,22 +258481,22 @@ │ │ ldrb.w r0, [sp] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - stmia r3!, {r4, r5, r7} │ │ + stmia r3!, {r0, r2, r3, r4, r6, r7} │ │ mcr2 14, 0, lr, cr15, cr8, {0} │ │ lsls r0, r4, #1 │ │ - pop {r0, r2, r3} │ │ + pop {r1, r3, r4, r5} │ │ cdp2 0, 0, cr0, cr14, cr15, {5} │ │ movs r0, r0 │ │ ldc 0, cr0, [r8, #-384]! @ 0xfffffe80 │ │ - subs r2, #146 @ 0x92 │ │ + subs r2, #191 @ 0xbf │ │ mrc2 12, 0, lr, cr1, cr6, {6} │ │ lsls r0, r4, #1 │ │ cmp r1, #0 │ │ itt eq │ │ moveq r0, #0 │ │ bxeq lr │ │ push {r4, r5, r7, lr} │ │ @@ -258602,15 +258602,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ add r0, sp, #16 │ │ blx 2704880 │ │ blx 26ffaf0 │ │ ldc 0, cr0, [r4], #-384 @ 0xfffffe80 │ │ - stmia r1!, {r2, r4, r5, r7} │ │ + stmia r1!, {r0, r5, r6, r7} │ │ cdp2 14, 0, cr14, cr15, cr8, {0} │ │ lsls r0, r4, #1 │ │ stcl 0, cr0, [ip], {96} @ 0x60 │ │ sub.w r0, lr, r0, asr #1 │ │ │ │ 02128a54 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -258793,17 +258793,17 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ adcs.w r0, sl, r0, asr #1 │ │ @ instruction: 0xeaae0060 │ │ - svc 220 @ 0xdc │ │ - mcr2 1, 0, sp, cr14, cr7, {2} │ │ - mrc2 1, 0, sp, cr1, cr12, {0} │ │ + b.n 2128c4e │ │ + cdp2 1, 0, cr13, cr14, cr4, {4} │ │ + cdp2 1, 1, cr13, cr1, cr9, {2} │ │ mrc2 11, 0, lr, cr1, cr6, {1} @ │ │ lsls r0, r4, #1 │ │ │ │ 02128c48 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -258876,16 +258876,16 @@ │ │ ldrb.w r0, [sp, #16] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ strd r0, r0, [r2, #-384]! @ 0x180 │ │ - ldc2 14, cr15, [r0], #60 @ 0x3c │ │ - ldrb r5, [r6, #20] │ │ + ldc2l 14, cr15, [sp], {15} │ │ + ldrb r2, [r4, #21] │ │ vcmla.f16 q7, , d0[1], #0 │ │ lsls r0, r4, #1 │ │ │ │ 02128d14 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -259071,20 +259071,20 @@ │ │ itttt eq │ │ addeq sp, #40 @ 0x28 │ │ vpopeq {d8} │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldmia.w r6, {r5, r6} │ │ - ldmia r7!, {r3, r6} │ │ - mrc2 6, 0, fp, cr1, cr12, {0} │ │ - vdot.bf16 , q7, d0[1] │ │ - vdot.bf16 , , d2[0] │ │ - mcr2 7, 0, r3, cr15, cr0, {6} │ │ - vcmla.f16 d5, d31, d4[1], #0 │ │ + ldmia r7!, {r0, r2, r4, r5, r6} │ │ + cdp2 6, 1, cr11, cr1, cr9, {2} │ │ + vdot.bf16 d1, d30, d13[0] │ │ + vdot.bf16 , , d15[1] │ │ + mcr2 7, 0, r3, cr15, cr13, {7} │ │ + vfmal.f16 , d31, d1[0] │ │ cdp2 6, 0, cr14, cr15, cr10, {5} │ │ lsls r0, r4, #1 │ │ │ │ 02128f4c : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #32 │ │ @@ -259186,22 +259186,22 @@ │ │ addeq sp, #32 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ b.n 2128d08 │ │ lsls r0, r4, #1 │ │ stmdb lr!, {r5, r6} │ │ - cbz r1, 212906c │ │ + cbz r6, 2129076 │ │ vselvs.f16 s28, s0, s28 │ │ lsls r0, r4, #1 │ │ - subs r3, #192 @ 0xc0 │ │ + subs r3, #237 @ 0xed │ │ vcmla.f16 q7, q8, d14[1], #90 │ │ lsls r0, r4, #1 │ │ ldr r4, [pc, #32] @ (2129074 ) │ │ - cdp2 13, 1, cr2, cr2, cr1, {7} │ │ + cdp2 14, 1, cr2, cr2, cr14, {0} │ │ mrc2 5, 0, lr, cr2, cr8, {4} │ │ lsls r0, r4, #1 │ │ │ │ 0212905c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -259297,21 +259297,21 @@ │ │ pop {r4, r5, r7, pc} │ │ movs r0, #200 @ 0xc8 │ │ pop {r4, r5, r7, pc} │ │ movs r0, #5 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ str r0, [sp, #368] @ 0x170 │ │ - mcr2 7, 0, pc, cr14, cr10, {6} @ │ │ - vdot.bf16 q4, , d6[1] │ │ + vcmla.f16 d15, d14, d7[0], #0 │ │ + mcr2 13, 0, r8, cr15, cr3, {4} │ │ cdp2 4, 1, cr6, cr1, cr8, {4} │ │ - mrc2 15, 0, lr, cr2, cr10, {4} │ │ - cdp2 2, 1, cr15, cr1, cr5, {0} │ │ - cdp2 2, 1, cr5, cr0, cr10, {2} │ │ - cdp2 1, 1, cr5, cr0, cr10, {3} │ │ + cdp2 15, 1, cr14, cr2, cr7, {6} │ │ + mrc2 2, 0, pc, cr1, cr2, {1} │ │ + mrc2 2, 0, r5, cr0, cr7, {3} │ │ + mrc2 1, 0, r5, cr0, cr7, {4} │ │ Address 0x2129156 is out of bounds. │ │ │ │ │ │ 02129158 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -259348,17 +259348,17 @@ │ │ ldr r1, [pc, #24] @ (21291cc ) │ │ add r1, pc │ │ mov r0, r4 │ │ blx 2704d10 │ │ movs r0, #0 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ - cbz r0, 212922a >&)@@Base+0x34> │ │ - vfmal.f16 d7, s28, s4[0] │ │ - mcr2 4, 0, r5, cr15, cr6, {1} │ │ + cbz r5, 2129234 >&)@@Base+0x3e> │ │ + vfmal.f16 d7, s28, s15[1] │ │ + cdp2 4, 0, cr5, cr15, cr3, {3} │ │ Address 0x21291ce is out of bounds. │ │ │ │ │ │ 021291d0 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr.w r0, [r0, #652] @ 0x28c │ │ @@ -259648,15 +259648,15 @@ │ │ ldreq.w r8, [sp], #4 │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ b.n 2129478 │ │ nop │ │ b.n 2129830 │ │ lsls r0, r4, #1 │ │ - @ instruction: 0xb71f │ │ + @ instruction: 0xb74c │ │ cdp2 1, 0, cr14, cr15, cr12, {1} │ │ lsls r0, r4, #1 │ │ b.n 212978c │ │ lsls r0, r4, #1 │ │ │ │ 021294c0 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -259726,15 +259726,15 @@ │ │ moveq r0, r4 │ │ addeq sp, #32 │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ b.n 2129744 │ │ lsls r0, r4, #1 │ │ - adds r1, #163 @ 0xa3 │ │ + adds r1, #208 @ 0xd0 │ │ mcr2 0, 0, lr, cr15, cr0, {3} │ │ lsls r0, r4, #1 │ │ │ │ 02129570 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -260025,39 +260025,39 @@ │ │ ldr r7, [pc, #124] @ (21298d0 ) │ │ lsrs r7, r7, #13 │ │ adcs r2, r4 │ │ b.n 2129e90 │ │ lsls r0, r4, #1 │ │ b.n 212986c │ │ lsls r0, r4, #1 │ │ - strb r1, [r5, #1] │ │ + strb r6, [r2, #2] │ │ cdp2 2, 0, cr14, cr15, cr10, {7} │ │ lsls r0, r4, #1 │ │ - str r7, [r3, r0] │ │ + str r4, [r1, r1] │ │ cdp2 2, 1, cr14, cr0, cr10, {6} │ │ lsls r0, r4, #1 │ │ - cmp r5, #59 @ 0x3b │ │ + cmp r5, #104 @ 0x68 │ │ cdp2 2, 1, cr14, cr1, cr10, {5} │ │ lsls r0, r4, #1 │ │ - push {r1, r2, r4, lr} │ │ + push {r0, r1, r6, lr} │ │ mcr2 2, 0, lr, cr15, cr14, {2} │ │ lsls r0, r4, #1 │ │ - add r2, sp, #836 @ 0x344 │ │ - cdp2 14, 1, cr14, cr0, cr7, {5} │ │ + add r2, sp, #1016 @ 0x3f8 │ │ + mrc2 14, 0, lr, cr0, cr4, {6} │ │ mrc2 1, 0, r8, cr0, cr14, {3} │ │ mrc2 14, 0, sp, cr2, cr8, {6} │ │ lsls r0, r4, #1 │ │ - bmi.n 21298b0 │ │ - mcr2 4, 0, sp, cr14, cr13, {0} │ │ + bmi.n 212990a │ │ + cdp2 4, 0, cr13, cr14, cr10, {2} │ │ cdp2 1, 0, cr14, cr14, cr6, {5} │ │ lsls r0, r4, #1 │ │ - bmi.n 21298c4 │ │ - mcr2 2, 0, sp, cr14, cr15, {2} │ │ - mcr2 4, 0, ip, cr15, cr12, {5} │ │ - cdp2 13, 1, cr10, cr1, cr12, {0} │ │ + bmi.n 212991e │ │ + cdp2 2, 0, cr13, cr14, cr12, {4} │ │ + cdp2 4, 0, cr12, cr15, cr9, {7} │ │ + mrc2 13, 0, sl, cr1, cr9, {1} │ │ cdp2 0, 0, cr14, cr14, cr8, {5} │ │ lsls r0, r4, #1 │ │ ble.n 21297e4 │ │ lsls r0, r4, #1 │ │ │ │ 021298b4 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -260096,16 +260096,16 @@ │ │ mvn.w r1, #1 │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26fee3c │ │ nop │ │ svc 236 @ 0xec │ │ lsls r0, r4, #1 │ │ - add r0, sp, #380 @ 0x17c │ │ - mrc2 12, 0, lr, cr0, cr7, {1} │ │ + add r0, sp, #560 @ 0x230 │ │ + cdp2 12, 1, cr14, cr0, cr4, {3} │ │ Address 0x2129926 is out of bounds. │ │ │ │ │ │ 02129928 , std::__ndk1::allocator > const&)@@Base>: │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r2, [pc, #64] @ (2129970 , std::__ndk1::allocator > const&)@@Base+0x48>) │ │ @@ -260129,16 +260129,16 @@ │ │ add r2, pc │ │ blx 2705300 │ │ ldr r0, [r4, #16] │ │ mvn.w r1, #1 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ b.w 26fee3c │ │ nop │ │ - add r7, pc, #996 @ (adr r7, 2129d58 ) │ │ - mrc2 11, 0, r0, cr0, cr0, {5} @ │ │ + add r0, sp, #152 @ 0x98 │ │ + mrc2 11, 0, r0, cr0, cr13, {6} @ │ │ Address 0x2129976 is out of bounds. │ │ │ │ │ │ 02129978 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ @@ -260188,18 +260188,18 @@ │ │ movs r2, #0 │ │ blx 2705230 │ │ movs r0, #4 │ │ str r0, [r4, #40] @ 0x28 │ │ pop {r4, r5, r7, pc} │ │ svc 44 @ 0x2c │ │ lsls r0, r4, #1 │ │ - add r7, pc, #636 @ (adr r7, 2129c74 ) │ │ + add r7, pc, #816 @ (adr r7, 2129d28 ) │ │ cdp2 15, 1, cr13, cr0, cr12, {0} │ │ lsls r0, r4, #1 │ │ - adds r1, #190 @ 0xbe │ │ + adds r1, #235 @ 0xeb │ │ cdp2 14, 1, cr13, cr0, cr12, {7} │ │ lsls r0, r4, #1 │ │ tst r6, r0 │ │ Address 0x2129a06 is out of bounds. │ │ │ │ │ │ 02129a08 : │ │ @@ -261625,16 +261625,16 @@ │ │ mvn.w r1, #1 │ │ blx 2704b00 │ │ mov r0, r5 │ │ pop {r4, r5, r7, pc} │ │ movs r0, #0 │ │ pop {r4, r5, r7, pc} │ │ nop │ │ - push {r2, r5, r6} │ │ - cdp2 2, 1, cr12, cr1, cr4, {5} │ │ + push {r0, r4, r7} │ │ + mrc2 2, 0, ip, cr1, cr1, {6} │ │ Address 0x212a87e is out of bounds. │ │ │ │ │ │ 0212a880 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r5, r0 │ │ @@ -261670,17 +261670,17 @@ │ │ add r1, pc │ │ b.n 212a8dc │ │ ldr r1, [pc, #16] @ (212a8ec ) │ │ add r1, pc │ │ blx 2704d10 │ │ movs r0, #0 │ │ pop {r4, r5, r7, pc} │ │ - ldr r4, [sp, #392] @ 0x188 │ │ - cdp2 0, 0, cr6, cr14, cr12, {7} │ │ - mcr2 13, 0, r3, cr15, cr0, {0} │ │ + ldr r4, [sp, #572] @ 0x23c │ │ + mcr2 1, 0, r6, cr14, cr9, {0} │ │ + mcr2 13, 0, r3, cr15, cr13, {1} │ │ Address 0x212a8ee is out of bounds. │ │ │ │ │ │ 0212a8f0 >::__push_back_slow_path(Value&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -261748,15 +261748,15 @@ │ │ bl 212a9a8 >::__push_back_slow_path(Value&&)@@Base+0xb8> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (212a9b4 >::__push_back_slow_path(Value&&)@@Base+0xc4>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strb r7, [r3, r3] │ │ + strb r4, [r1, r4] │ │ Address 0x212a9b6 is out of bounds. │ │ │ │ │ │ 0212a9b8 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -261897,33 +261897,33 @@ │ │ cmp r1, r0 │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ ldmia r3, {r1, r3, r4, r6} │ │ lsls r0, r4, #1 │ │ - lsrs r0, r2, #29 │ │ + lsrs r5, r7, #29 │ │ mrc2 0, 0, r0, cr2, cr7, {5} │ │ movs r0, r0 │ │ - bge.n 212aa76 │ │ + bge.n 212aad0 │ │ mrc2 0, 0, r0, cr0, cr1, {7} │ │ movs r0, r0 │ │ - svc 15 │ │ + svc 60 @ 0x3c │ │ cdp2 1, 0, cr0, cr15, cr11, {3} │ │ movs r0, r0 │ │ - ldrsh r1, [r5, r6] │ │ + ldrsh r6, [r2, r7] │ │ mcr2 2, 0, r0, cr15, cr13, {4} │ │ movs r0, r0 │ │ adds r1, #122 @ 0x7a │ │ cdp2 3, 1, cr0, cr2, cr15, {6} │ │ movs r0, r0 │ │ - ldrsh r2, [r2, r6] │ │ + ldrsh r7, [r7, r6] │ │ cdp2 4, 0, cr0, cr15, cr1, {7} │ │ movs r0, r0 │ │ - subs r3, #40 @ 0x28 │ │ + subs r3, #85 @ 0x55 │ │ mrc2 5, 0, r0, cr1, cr3, {3} │ │ movs r0, r0 │ │ ldmia r2, {r1, r2, r4, r6, r7} │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ @@ -261949,15 +261949,15 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldmia r2!, {r1, r3, r4, r5, r6} │ │ lsls r0, r4, #1 │ │ - bls.n 212ab60 │ │ + bge.n 212abba │ │ mrc2 10, 0, ip, cr0, cr14, {2} @ │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #112] @ (212abfc ) │ │ @@ -262006,15 +262006,15 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ ldmia r2!, {r4, r5} │ │ lsls r0, r4, #1 │ │ - subs r5, r0, #7 │ │ + subs r2, r6, #7 │ │ mrc2 9, 0, ip, cr0, cr4, {6} @ │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #72 @ 0x48 │ │ mov r4, sp │ │ @@ -262129,18 +262129,18 @@ │ │ moveq sp, r4 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldmia r1!, {r2, r3, r4, r7} │ │ lsls r0, r4, #1 │ │ - bmi.n 212adda │ │ - mrc2 15, 0, r1, cr1, cr13, {0} │ │ - cdp2 6, 1, cr5, cr0, cr3, {6} │ │ - mrc2 3, 0, sp, cr1, cr12, {7} │ │ + bmi.n 212ae34 │ │ + cdp2 15, 1, cr1, cr1, cr10, {2} │ │ + mrc2 6, 0, r5, cr0, cr0, {7} │ │ + cdp2 4, 1, cr13, cr1, cr9, {1} │ │ vcmla.f16 d12, d17, d8[1], #90 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #72 @ 0x48 │ │ mov r4, sp │ │ @@ -262255,18 +262255,18 @@ │ │ moveq sp, r4 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldmia r0!, {r2, r3, r4, r6} │ │ lsls r0, r4, #1 │ │ - bcc.n 212af44 │ │ - mrc2 13, 0, r1, cr1, cr13, {6} │ │ - mrc2 11, 0, sp, cr0, cr14, {3} @ │ │ - mcr2 7, 0, r9, cr15, cr15, {0} │ │ + bcc.n 212ad9e │ │ + cdp2 14, 1, cr1, cr1, cr10, {0} │ │ + vselvs.f64 d13, d16, d27 │ │ + cdp2 7, 0, cr9, cr15, cr12, {2} │ │ cdp2 7, 0, cr12, cr14, cr8, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [pc, #228] @ (212af78 ) │ │ @@ -262364,23 +262364,23 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ stmia r7!, {r3, r5} │ │ lsls r0, r4, #1 │ │ - lsr.w lr, r5, pc @ │ │ - adds r1, r5, #2 │ │ - cdp2 3, 1, cr13, cr0, cr13, {7} │ │ + asrs.w lr, r2, pc @ │ │ + adds r6, r2, #3 │ │ + mrc2 4, 0, sp, cr0, cr10, {0} │ │ cdp2 2, 1, cr7, cr0, cr14, {0} │ │ - vseleq.f16 s26, s29, s24 │ │ - mcr2 15, 0, r6, cr15, cr2, {0} │ │ + mcr2 9, 0, sp, cr14, cr9, {5} @ │ │ + mcr2 15, 0, r6, cr15, cr15, {1} │ │ mrc2 6, 0, r4, cr1, cr8, {1} │ │ - cdp2 4, 1, cr3, cr2, cr4, {1} │ │ - cdp2 3, 1, cr3, cr0, cr0, {3} │ │ + mrc2 4, 0, r3, cr2, cr1, {2} │ │ + cdp2 3, 1, cr3, cr0, cr13, {4} │ │ mrc2 13, 0, r2, cr1, cr8, {1} │ │ cdp2 6, 1, cr12, cr2, cr12, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #32 │ │ mov r4, r0 │ │ @@ -262439,16 +262439,16 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #32 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ stmia r6!, {r3} │ │ lsls r0, r4, #1 │ │ - bl 209fc60 ::operator()(char const*)@@Base+0x4500> │ │ - subs r1, r1, r6 │ │ + bl 20ccc60 │ │ + subs r6, r6, r6 │ │ mrc2 5, 0, ip, cr0, cr8, {4} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [pc, #128] @ (212b0d4 ) │ │ @@ -262505,15 +262505,15 @@ │ │ addeq sp, #24 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ stmia r5!, {r3, r5, r6} │ │ lsls r0, r4, #1 │ │ cmp r3, #226 @ 0xe2 │ │ - @ instruction: 0xfe121ae9 │ │ + mrc2 11, 0, r1, cr2, cr6, {0} @ │ │ mrc2 4, 0, ip, cr0, cr14, {7} │ │ lsls r0, r4, #1 │ │ │ │ 0212b0e4 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -262771,90 +262771,90 @@ │ │ addeq sp, #8 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ stmia r4!, {r1, r2, r6, r7} │ │ lsls r0, r4, #1 │ │ - bhi.n 212b32a │ │ + bls.n 212b384 │ │ cdp2 3, 0, cr0, cr15, cr7, {2} │ │ movs r0, r0 │ │ - rev r2, r7 │ │ + rev16 r7, r4 │ │ mcr2 4, 0, r0, cr14, cr5, {3} │ │ movs r0, r0 │ │ - ldr r2, [sp, #464] @ 0x1d0 │ │ + ldr r2, [sp, #644] @ 0x284 │ │ cdp2 5, 0, cr0, cr15, cr3, {5} │ │ movs r0, r0 │ │ - bmi.n 212b3b4 │ │ + bmi.n 212b40e │ │ cdp2 6, 1, cr0, cr0, cr9, {4} │ │ movs r0, r0 │ │ - adds r4, #204 @ 0xcc │ │ + adds r4, #249 @ 0xf9 │ │ mrc2 6, 0, r0, cr0, cr11, {7} │ │ movs r0, r0 │ │ - rev r0, r1 │ │ + rev r5, r6 │ │ mcr2 7, 0, r0, cr14, cr1, {4} │ │ movs r0, r0 │ │ - bcc.n 212b38c │ │ + bmi.n 212b3e6 │ │ vcmla.f16 q0, q0, d7[1], #90 │ │ movs r0, r0 │ │ - ldr r2, [sp, #208] @ 0xd0 │ │ + ldr r2, [sp, #388] @ 0x184 │ │ vfmal.f16 q0, d31, d5[3] │ │ movs r0, r0 │ │ mov r5, r1 │ │ mrc2 9, 0, r0, cr2, cr3, {4} @ │ │ movs r0, r0 │ │ - bl 209cfe2 ::operator()(char const*)@@Base+0x1882> │ │ + bl 20c9fe2 │ │ lsrs r5, r6, #8 │ │ movs r0, r0 │ │ - ldmia r7!, {r0, r3, r5, r6} │ │ + ldmia r7, {r1, r2, r4, r7} │ │ mrc2 10, 0, r0, cr1, cr11, {4} @ │ │ movs r0, r0 │ │ - ldr r3, [r6, r2] │ │ + ldr r0, [r4, r3] │ │ mcr2 10, 0, r0, cr15, cr9, {6} @ │ │ movs r0, r0 │ │ - add r2, sp, #968 @ 0x3c8 │ │ + add r3, sp, #124 @ 0x7c │ │ mrc2 11, 0, r0, cr1, cr15, {1} @ │ │ movs r0, r0 │ │ - lsrs r2, r3, #17 │ │ + lsrs r7, r0, #18 │ │ vselvs.f64 d0, d18, d21 │ │ movs r0, r0 │ │ cmp r2, #158 @ 0x9e │ │ cdp2 12, 1, cr0, cr2, cr11, {0} │ │ movs r0, r0 │ │ - strb r7, [r5, #4] │ │ + strb r4, [r3, #5] │ │ cdp2 12, 1, cr0, cr0, cr9, {2} │ │ movs r0, r0 │ │ - asrs r3, r5, #19 │ │ + asrs r0, r3, #20 │ │ cdp2 12, 0, cr0, cr15, cr7, {4} │ │ movs r0, r0 │ │ - asrs r4, r4, #19 │ │ - mcr2 9, 0, fp, cr15, cr9, {2} @ │ │ - cdp2 15, 0, cr8, cr14, cr14, {1} │ │ - mrc2 15, 0, r6, cr0, cr6, {1} │ │ + asrs r1, r2, #20 │ │ + vseleq.f16 s22, s31, s12 │ │ + mcr2 15, 0, r8, cr14, cr11, {2} │ │ + cdp2 15, 1, cr6, cr0, cr3, {3} │ │ cdp2 3, 1, cr7, cr1, cr5, {1} │ │ - cdp2 5, 0, cr5, cr14, cr11, {0} │ │ - mrc2 14, 0, r8, cr0, cr9, {7} │ │ - mrc2 7, 0, fp, cr0, cr10, {5} │ │ - mcr2 14, 0, r8, cr15, cr15, {6} │ │ - cdp2 5, 1, cr3, cr0, cr15, {4} │ │ - cdp2 4, 0, cr15, cr15, cr7, {6} │ │ - cdp2 2, 1, cr9, cr0, cr11, {4} │ │ - cdp2 6, 0, cr15, cr14, cr3, {2} │ │ - vcmla.f16 d11, d31, d0[1], #0 │ │ - mcr2 5, 0, r3, cr14, cr15, {1} │ │ - mcr2 14, 0, r6, cr15, cr2, {3} │ │ - cdp2 14, 1, cr12, cr1, cr1, {0} │ │ - mrc2 14, 0, r6, cr1, cr8, {2} │ │ - cdp2 6, 1, cr14, cr1, cr3, {2} │ │ + mcr2 5, 0, r5, cr14, cr8, {1} │ │ + cdp2 15, 1, cr8, cr0, cr6, {1} │ │ + cdp2 7, 1, cr11, cr0, cr7, {7} │ │ + cdp2 15, 0, cr8, cr15, cr12, {0} │ │ + mrc2 5, 0, r3, cr0, cr12, {5} │ │ + mcr2 4, 0, pc, cr15, cr4, {7} @ │ │ + mrc2 2, 0, r9, cr0, cr8, {5} │ │ + mcr2 6, 0, pc, cr14, cr0, {3} @ │ │ + vcmla.f16 , , d13[0], #0 │ │ + cdp2 5, 0, cr3, cr14, cr12, {3} │ │ + mcr2 14, 0, r6, cr15, cr15, {4} │ │ + cdp2 14, 1, cr12, cr1, cr14, {1} │ │ + cdp2 14, 1, cr6, cr1, cr5, {4} │ │ + mrc2 6, 0, lr, cr1, cr0, {3} │ │ mrc2 11, 0, r0, cr1, cr1, {4} @ │ │ movs r0, r0 │ │ add r7, sl │ │ mrc2 13, 0, r0, cr2, cr11, {1} │ │ movs r0, r0 │ │ - asrs r7, r0, #32 │ │ + asrs r4, r6, #32 │ │ cdp2 2, 1, cr12, cr1, cr0, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ vpush {d8-d10} │ │ sub sp, #16 │ │ @@ -262953,21 +262953,21 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ stmia r1!, {r3, r6} │ │ lsls r0, r4, #1 │ │ - strh r5, [r3, r3] │ │ - mrc2 2, 0, r5, cr0, cr7, {7} │ │ - cdp2 15, 1, cr4, cr0, cr4, {2} │ │ + strh r2, [r1, r4] │ │ + cdp2 3, 1, cr5, cr0, cr4, {1} │ │ + mrc2 15, 0, r4, cr0, cr1, {3} │ │ cdp2 2, 1, cr4, cr1, cr1, {7} │ │ - cdp2 4, 1, cr15, cr2, cr4, {2} │ │ - mcr2 3, 0, r3, cr15, cr9, {1} │ │ - mcr2 12, 0, sl, cr15, cr2, {4} │ │ + mrc2 4, 0, pc, cr2, cr1, {3} │ │ + cdp2 3, 0, cr3, cr15, cr6, {3} │ │ + mcr2 12, 0, sl, cr15, cr15, {5} │ │ cdp2 0, 1, cr12, cr0, cr4, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ vpush {d8-d10} │ │ sub sp, #16 │ │ @@ -263066,21 +263066,21 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ stmia r0!, {r2, r3} │ │ lsls r0, r4, #1 │ │ - lsrs r3, r5, #1 │ │ - cdp2 6, 1, cr13, cr2, cr2, {7} │ │ - mcr2 5, 0, fp, cr14, cr9, {4} │ │ - mcr2 6, 0, sl, cr14, cr8, {5} │ │ - mrc2 5, 0, fp, cr1, cr3, {4} │ │ - mcr2 11, 0, sl, cr14, cr8, {4} @ │ │ - vcmla.f16 d0, d0, d11[0], #90 │ │ + lsrs r0, r3, #2 │ │ + cdp2 7, 1, cr13, cr2, cr15, {0} │ │ + cdp2 5, 0, cr11, cr14, cr6, {6} │ │ + cdp2 6, 0, cr10, cr14, cr5, {7} │ │ + cdp2 5, 1, cr11, cr1, cr0, {6} │ │ + @ instruction: 0xfe0eabc5 │ │ + vfmsl.f16 d0, s0, s1[1] │ │ cdp2 15, 1, cr11, cr2, cr8, {1} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ vpush {d8-d10} │ │ sub sp, #16 │ │ @@ -263156,19 +263156,19 @@ │ │ vpopeq {d8-d10} │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ bkpt 0x00ce │ │ lsls r0, r4, #1 │ │ - ldr r7, [r6, #36] @ 0x24 │ │ - mrc2 3, 0, r5, cr1, cr8, {2} │ │ - mcr2 14, 0, ip, cr15, cr11, {1} │ │ - vcmla.f16 q4, q8, d10[0], #90 │ │ - vselvs.f32 s16, s2, s19 │ │ + ldr r4, [r4, #40] @ 0x28 │ │ + cdp2 3, 1, cr5, cr1, cr5, {4} │ │ + cdp2 14, 0, cr12, cr15, cr8, {3} │ │ + vfmsl.f16 q4, d16, d7[2] │ │ + mrc2 10, 0, r8, cr1, cr6, {2} @ │ │ cdp2 14, 1, cr11, cr0, cr10, {1} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r1, r0 │ │ ldr r0, [pc, #96] @ (212b838 ) │ │ @@ -263210,16 +263210,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ pop {r2, r5, r6, r7, pc} │ │ lsls r0, r4, #1 │ │ - str r3, [sp, #800] @ 0x320 │ │ - cdp2 1, 0, cr14, cr15, cr4, {4} │ │ + str r3, [sp, #980] @ 0x3d4 │ │ + mcr2 1, 0, lr, cr15, cr1, {5} │ │ cdp2 0, 1, cr12, cr1, cr14, {6} │ │ lsls r0, r4, #1 │ │ pop {r1, r3, r4, r7, pc} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -263273,17 +263273,17 @@ │ │ addeq sp, #16 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ pop {r1, r2, r3, r4, r6, pc} │ │ lsls r0, r4, #1 │ │ - lsrs r6, r7, #25 │ │ - mcr2 15, 0, r2, cr15, cr9, {6} │ │ - mcr2 15, 0, r6, cr15, cr15, {0} │ │ + lsrs r3, r5, #26 │ │ + cdp2 0, 0, cr3, cr15, cr6, {0} │ │ + cdp2 15, 0, cr6, cr15, cr12, {2} │ │ mcr2 12, 0, fp, cr15, cr10, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ vpush {d8-d9} │ │ sub sp, #16 │ │ @@ -263354,18 +263354,18 @@ │ │ vpopeq {d8-d9} │ │ ldreq.w r8, [sp], #4 │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ pop {r1, r2, r4, r5, r7} │ │ lsls r0, r4, #1 │ │ - b.n 212bae4 │ │ - cdp2 0, 1, cr13, cr1, cr11, {6} │ │ - cdp2 0, 0, cr13, cr15, cr6, {7} │ │ - cdp2 3, 0, cr13, cr15, cr8, {4} │ │ + b.n 212bb3e │ │ + mrc2 0, 0, sp, cr1, cr8, {7} │ │ + mcr2 1, 0, sp, cr15, cr3, {0} │ │ + mcr2 3, 0, sp, cr15, cr5, {5} │ │ mcr2 15, 0, fp, cr14, cr6, {3} │ │ lsls r0, r4, #1 │ │ pop {r1, r5} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -263420,16 +263420,16 @@ │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ cbnz r6, 212badc │ │ lsls r0, r4, #1 │ │ ldr r3, [r6, #52] @ 0x34 │ │ - mcr2 15, 0, lr, cr14, cr14, {1} │ │ - cdp2 0, 0, cr15, cr15, cr10, {7} │ │ + cdp2 15, 0, cr14, cr14, cr11, {3} │ │ + mcr2 1, 0, pc, cr15, cr7, {0} @ │ │ mcr2 11, 0, fp, cr14, cr2, {3} @ │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ mov r1, r0 │ │ @@ -263482,16 +263482,16 @@ │ │ addeq sp, #16 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ cbnz r2, 212bb58 │ │ lsls r0, r4, #1 │ │ subs r5, #47 @ 0x2f │ │ - mrc2 6, 0, r6, cr2, cr4, {7} │ │ - mrc2 15, 0, sp, cr1, cr11, {0} │ │ + cdp2 7, 1, cr6, cr2, cr1, {1} │ │ + cdp2 15, 1, cr13, cr1, cr8, {2} │ │ @ instruction: 0xfe11bacc │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ mov r1, r0 │ │ @@ -263548,17 +263548,17 @@ │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ hlt 0x000e │ │ lsls r0, r4, #1 │ │ - strh r7, [r1, #50] @ 0x32 │ │ - cdp2 15, 1, cr12, cr0, cr1, {0} │ │ - cdp2 0, 0, cr1, cr15, cr5, {1} │ │ + strh r4, [r7, #50] @ 0x32 │ │ + cdp2 15, 1, cr12, cr0, cr14, {1} │ │ + mcr2 0, 0, r1, cr15, cr2, {2} │ │ cdp2 13, 1, cr11, cr0, cr6, {3} │ │ lsls r0, r4, #1 │ │ rev r0, r4 │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ @@ -263598,16 +263598,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ cbnz r4, 212bc6c │ │ lsls r0, r4, #1 │ │ - lsls r1, r2, #10 │ │ - mrc2 15, 0, lr, cr2, cr3, {1} │ │ + lsls r6, r7, #10 │ │ + cdp2 15, 1, cr14, cr2, cr0, {3} │ │ vseleq.f16 s22, s29, s5 │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #52] @ (212bc80 ) │ │ @@ -263632,15 +263632,15 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ blx 26ffae0 │ │ cbnz r2, 212bca0 │ │ lsls r0, r4, #1 │ │ - @ instruction: 0xeb18fe10 │ │ + @ instruction: 0xeb45fe10 │ │ cbnz r0, 212bca0 │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r1, r0 │ │ ldr r0, [pc, #88] @ (212bcf0 ) │ │ @@ -263678,16 +263678,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ cbnz r4, 212bcfc │ │ lsls r0, r4, #1 │ │ - add r7, sp, #140 @ 0x8c │ │ - cdp2 0, 0, cr13, cr14, cr15, {2} │ │ + add r7, sp, #320 @ 0x140 │ │ + mcr2 0, 0, sp, cr14, cr12, {3} │ │ vcmla.f16 , q15, d2[1], #0 │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r1, r0 │ │ ldr r0, [pc, #88] @ (212bd64 ) │ │ @@ -263725,16 +263725,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ @ instruction: 0xb8b0 │ │ lsls r0, r4, #1 │ │ - strh r6, [r1, #24] │ │ - cdp2 6, 1, cr0, cr1, cr13, {1} │ │ + strh r3, [r7, #24] │ │ + mrc2 6, 0, r0, cr1, cr10, {2} │ │ vcmla.f16 , , d14[1], #90 │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r1, r0 │ │ ldr r0, [pc, #88] @ (212bdd8 ) │ │ @@ -263772,16 +263772,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ @ instruction: 0xb83c │ │ lsls r0, r4, #1 │ │ - ldr r2, [r1, #36] @ 0x24 │ │ - cdp2 4, 0, cr6, cr15, cr8, {1} │ │ + ldr r7, [r6, #36] @ 0x24 │ │ + mcr2 4, 0, r6, cr15, cr5, {2} │ │ mrc2 7, 0, fp, cr1, cr10, {7} │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #52] @ (212be28 ) │ │ @@ -263806,15 +263806,15 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ blx 26ffae0 │ │ @ instruction: 0xb7ca │ │ lsls r0, r4, #1 │ │ - ldrd pc, lr, [r0, #-64]! @ 0x40 │ │ + @ instruction: 0xe99dfe10 │ │ @ instruction: 0xb7a8 │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #52] @ (212be74 ) │ │ @@ -263839,15 +263839,15 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ blx 26ffae0 │ │ @ instruction: 0xb77e │ │ lsls r0, r4, #1 │ │ - ldr r6, [sp, #560] @ 0x230 │ │ + ldr r6, [sp, #740] @ 0x2e4 │ │ mrc2 7, 0, fp, cr1, cr12, {2} │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #52] @ (212bec0 ) │ │ @@ -263872,15 +263872,15 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ blx 26ffae0 │ │ @ instruction: 0xb732 │ │ lsls r0, r4, #1 │ │ - ldr r6, [sp, #432] @ 0x1b0 │ │ + ldr r6, [sp, #612] @ 0x264 │ │ mrc2 7, 0, fp, cr1, cr0, {0} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d14} │ │ @@ -264016,21 +264016,21 @@ │ │ addeq sp, #4 │ │ itt eq │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ @ instruction: 0xb6d8 │ │ lsls r0, r4, #1 │ │ - strh r2, [r3, #50] @ 0x32 │ │ - vcmla.f16 d4, d30, d5[0], #0 │ │ - cdp2 4, 1, cr4, cr0, cr10, {6} │ │ + strh r7, [r0, #52] @ 0x34 │ │ + vfmal.f16 d4, s29, s5[0] │ │ + mrc2 4, 0, r4, cr0, cr7, {7} │ │ vcmla.f16 , , d9[1], #90 │ │ - @ instruction: 0xfe12e9cc │ │ - vcmla.f16 q1, , d7[0], #0 │ │ - cdp2 2, 0, cr10, cr15, cr2, {1} │ │ + mrc2 9, 0, lr, cr2, cr9, {7} @ │ │ + vfmal.f16 q1, d31, d4[2] │ │ + cdp2 2, 0, cr10, cr15, cr15, {2} │ │ mrc2 5, 0, fp, cr0, cr12, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ vpush {d8-d10} │ │ sub sp, #16 │ │ @@ -264111,19 +264111,19 @@ │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ push {r1, r5, lr} │ │ lsls r0, r4, #1 │ │ - muls r2, r5 │ │ - mrc2 11, 0, ip, cr1, cr8, {7} @ │ │ - vseleq.f32 s20, s29, s31 │ │ - mcr2 10, 0, sl, cr14, cr15, {5} @ │ │ - @ instruction: 0xfe0e9bca │ │ + bics r7, r2 │ │ + cdp2 12, 1, cr12, cr1, cr5, {1} │ │ + mcr2 10, 0, sl, cr14, cr12, {6} @ │ │ + @ instruction: 0xfe0eaaec │ │ + mcr2 11, 0, r9, cr14, cr7, {7} @ │ │ mrc2 4, 0, fp, cr1, cr0, {3} │ │ lsls r0, r4, #1 │ │ │ │ 0212c188 : │ │ movs r0, #8 │ │ bx lr │ │ │ │ @@ -264337,16 +264337,16 @@ │ │ mov r0, r6 │ │ blx r1 │ │ add r0, sp, #28 │ │ blx 2704880 │ │ blx 26ffaf0 │ │ push {r1, r2, r3, r4} │ │ lsls r0, r4, #1 │ │ - stmia r6!, {r5, r6, r7} │ │ - cdp2 7, 0, cr4, cr15, cr1, {3} │ │ + stmia r7!, {r0, r2, r3} │ │ + cdp2 7, 0, cr4, cr15, cr14, {4} │ │ mcr2 4, 0, fp, cr15, cr2, {6} │ │ lsls r0, r4, #1 │ │ cbz r6, 212c428 │ │ lsls r0, r4, #1 │ │ sxtb r4, r5 │ │ lsls r0, r4, #1 │ │ │ │ @@ -264395,33 +264395,33 @@ │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ cbz r0, 212c472 │ │ lsls r0, r4, #1 │ │ - bl 1f0b05e │ │ + bl 1f3805e │ │ lsls r1, r4, #1 │ │ movs r0, r0 │ │ ldrb r0, [r0, r3] │ │ cdp2 0, 0, cr0, cr14, cr7, {3} │ │ movs r0, r0 │ │ - stmia r1!, {r0, r1, r2, r4, r5} │ │ + stmia r1!, {r2, r5, r6} │ │ cdp2 0, 1, cr0, cr0, cr5, {7} │ │ movs r0, r0 │ │ cbz r4, 212c47a │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r1, [pc, #8] @ (212c464 ) │ │ add r1, pc │ │ blx 2704b40 │ │ movs r0, #1 │ │ pop {r7, pc} │ │ - mov r1, r9 │ │ + mov r6, lr │ │ mcr2 5, 0, fp, cr15, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #116] @ (212c4e8 ) │ │ mov r4, sp │ │ add r0, pc │ │ @@ -264464,15 +264464,15 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ cbz r0, 212c4fe │ │ lsls r0, r4, #1 │ │ - ldrb r6, [r0, #8] │ │ + ldrb r3, [r6, #8] │ │ cdp2 0, 1, cr11, cr0, cr8, {7} │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #60] @ (212c53c ) │ │ @@ -264502,15 +264502,15 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ blx 26ffae0 │ │ sub sp, #248 @ 0xf8 │ │ lsls r0, r4, #1 │ │ - ldrb r4, [r7, #5] │ │ + ldrb r1, [r5, #6] │ │ mrc2 0, 0, fp, cr0, cr4, {4} │ │ lsls r0, r4, #1 │ │ │ │ 0212c548 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ @@ -264596,42 +264596,42 @@ │ │ cmp r1, r0 │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ add sp, #416 @ 0x1a0 │ │ lsls r0, r4, #1 │ │ - bl 1d8b23e │ │ + bl 1db823e │ │ lsls r1, r7, #3 │ │ movs r0, r0 │ │ - ittet gt │ │ - mrc2gt 1, 0, r0, cr0, cr3, {1} │ │ - movgt r0, r0 │ │ - tstle r5, r5 │ │ - mrc2gt 1, 0, r0, cr0, cr9, {4} │ │ + itee │ │ + mrc2 1, 0, r0, cr0, cr3, {1} │ │ + moval r0, r0 │ │ + negal r2, r3 │ │ + mrc2 1, 0, r0, cr0, cr9, {4} │ │ movs r0, r0 │ │ - stmia r3!, {r0, r4, r5} │ │ + stmia r3!, {r1, r2, r3, r4, r6} │ │ cdp2 1, 0, cr0, cr15, cr15, {7} │ │ movs r0, r0 │ │ - ldrb r5, [r2, #31] │ │ + strh r2, [r0, #0] │ │ cdp2 3, 0, cr0, cr14, cr5, {0} │ │ movs r0, r0 │ │ - add ip, fp │ │ + cmp r1, r1 │ │ mcr2 3, 0, r0, cr15, cr11, {2} │ │ movs r0, r0 │ │ - add pc, sl │ │ + cmp r4, r0 │ │ mcr2 3, 0, r0, cr15, cr9, {6} │ │ movs r0, r0 │ │ - subs r6, #112 @ 0x70 │ │ + subs r6, #157 @ 0x9d │ │ cdp2 4, 1, cr0, cr1, cr3, {2} │ │ movs r0, r0 │ │ - b.n 212c9de │ │ + b.n 212ca38 │ │ cdp2 4, 1, cr0, cr0, cr13, {5} │ │ movs r0, r0 │ │ - bne.n 212c712 │ │ + bne.n 212c56c │ │ mrc2 5, 0, r0, cr1, cr7, {0} │ │ movs r0, r0 │ │ add r7, sp, #744 @ 0x2e8 │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ @@ -264657,15 +264657,15 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r7, sp, #280 @ 0x118 │ │ lsls r0, r4, #1 │ │ - stmia r6!, {r2, r3, r5, r7} │ │ + stmia r6!, {r0, r3, r4, r6, r7} │ │ cdp2 15, 0, cr10, cr14, cr10, {1} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #92] @ (212c71c ) │ │ @@ -264706,15 +264706,15 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ add r6, sp, #1016 @ 0x3f8 │ │ lsls r0, r4, #1 │ │ - strb r4, [r7, #30] │ │ + strb r1, [r5, #31] │ │ mrc2 14, 0, sl, cr0, cr4, {5} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #72] @ (212c77c ) │ │ @@ -264748,16 +264748,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r6, sp, #544 @ 0x220 │ │ lsls r0, r4, #1 │ │ - add r2, pc, #948 @ (adr r2, 212cb38 ) │ │ - mcr2 7, 0, r7, cr15, cr8, {1} │ │ + add r3, pc, #104 @ (adr r3, 212c7ec ) │ │ + cdp2 7, 0, cr7, cr15, cr5, {3} │ │ mrc2 14, 0, sl, cr0, cr6, {2} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #352 @ 0x160 │ │ mov r4, sp │ │ bfc r4, #0, #4 │ │ @@ -264859,17 +264859,17 @@ │ │ b.n 212c890 │ │ add r0, sp, #16 │ │ blx 2705800 │ │ blx 26ffaf0 │ │ nop │ │ add r6, sp, #112 @ 0x70 │ │ lsls r0, r4, #1 │ │ - str r4, [r2, #4] │ │ - cdp2 6, 0, cr15, cr15, cr0, {7} │ │ - mrc2 6, 0, r7, cr1, cr14, {5} │ │ + str r1, [r0, #8] │ │ + cdp2 7, 0, cr15, cr15, cr13, {0} │ │ + cdp2 6, 1, cr7, cr1, cr11, {7} │ │ cdp2 13, 1, cr10, cr0, cr6, {2} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #72] @ (212c904 ) │ │ @@ -264903,16 +264903,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r5, sp, #0 │ │ lsls r0, r4, #1 │ │ - strh r5, [r1, #24] │ │ - mcr2 5, 0, r7, cr15, cr0, {5} │ │ + strh r2, [r7, #24] │ │ + mcr2 5, 0, r7, cr15, cr13, {6} │ │ cdp2 12, 1, cr10, cr0, cr14, {6} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #108] @ (212c98c ) │ │ @@ -264962,16 +264962,16 @@ │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r4, sp, #624 @ 0x270 │ │ lsls r0, r4, #1 │ │ cmp r6, #195 @ 0xc3 │ │ - cdp2 0, 1, cr13, cr2, cr5, {6} │ │ - mrc2 5, 0, r7, cr1, cr14, {1} │ │ + mrc2 0, 0, sp, cr2, cr2, {7} │ │ + cdp2 5, 1, cr7, cr1, cr11, {3} │ │ cdp2 12, 1, cr10, cr0, cr6, {2} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #92] @ (212ca08 ) │ │ @@ -265011,16 +265011,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r4, sp, #56 @ 0x38 │ │ lsls r0, r4, #1 │ │ - str r3, [sp, #456] @ 0x1c8 │ │ - mrc2 4, 0, r7, cr1, cr14, {5} │ │ + str r3, [sp, #636] @ 0x27c │ │ + cdp2 4, 1, cr7, cr1, cr11, {7} │ │ @ instruction: 0xfe10abca │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #92] @ (212ca80 ) │ │ @@ -265060,16 +265060,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r3, sp, #600 @ 0x258 │ │ lsls r0, r4, #1 │ │ - add r0, pc, #132 @ (adr r0, 212cb0c ) │ │ - cdp2 4, 0, cr7, cr15, cr6, {2} │ │ + add r0, pc, #312 @ (adr r0, 212cbc0 ) │ │ + mcr2 4, 0, r7, cr15, cr3, {3} │ │ mrc2 11, 0, sl, cr0, cr2, {2} @ │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #92] @ (212caf8 ) │ │ @@ -265109,16 +265109,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r3, sp, #120 @ 0x78 │ │ lsls r0, r4, #1 │ │ - subs r7, #253 @ 0xfd │ │ - cdp2 3, 0, cr7, cr15, cr14, {6} │ │ + ands r2, r5 │ │ + mcr2 3, 0, r7, cr15, cr11, {7} │ │ mrc2 10, 0, sl, cr0, cr10, {6} @ │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #8 │ │ mov r4, r0 │ │ @@ -265172,17 +265172,17 @@ │ │ addeq sp, #8 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r2, sp, #648 @ 0x288 │ │ lsls r0, r4, #1 │ │ - umlal pc, lr, r9, lr @ │ │ - strb r0, [r2, #13] │ │ - mrc2 10, 0, r1, cr0, cr12, {5} @ │ │ + ldc2 14, cr15, [r6], {14} │ │ + strb r5, [r7, #13] │ │ + @ instruction: 0xfe101ae9 │ │ @ instruction: 0xfe11aa42 │ │ lsls r0, r4, #1 │ │ │ │ 0212cba8 : │ │ movs r0, #10 │ │ bx lr │ │ │ │ @@ -265231,21 +265231,21 @@ │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r2, sp, #16 │ │ lsls r0, r4, #1 │ │ - ldcl 14, cr15, [sl, #68]! @ 0x44 │ │ + mcr 14, 1, pc, cr7, cr1, {0} @ │ │ lsls r1, r4, #1 │ │ movs r0, r0 │ │ - subs r6, #185 @ 0xb9 │ │ + subs r6, #230 @ 0xe6 │ │ cdp2 1, 0, cr0, cr15, cr3, {0} │ │ movs r0, r0 │ │ - subs r6, #162 @ 0xa2 │ │ + subs r6, #207 @ 0xcf │ │ cdp2 1, 0, cr0, cr15, cr1, {3} │ │ movs r0, r0 │ │ add r1, sp, #736 @ 0x2e0 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #56 @ 0x38 │ │ @@ -265308,16 +265308,16 @@ │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ add r1, sp, #488 @ 0x1e8 │ │ lsls r0, r4, #1 │ │ - strb r0, [r7, #8] │ │ - mrc2 11, 0, sp, cr0, cr5, {1} @ │ │ + strb r5, [r4, #9] │ │ + @ instruction: 0xfe10db62 │ │ vselvs.f16 s20, s0, s24 │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #80] @ (212cd44 ) │ │ @@ -265354,16 +265354,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r0, sp, #800 @ 0x320 │ │ lsls r0, r4, #1 │ │ - subs r4, r7, r5 │ │ - mcr2 1, 0, r7, cr15, cr8, {3} │ │ + subs r1, r5, r6 │ │ + cdp2 1, 0, cr7, cr15, cr5, {5} │ │ vcmla.f16 d10, d16, d14[0], #90 │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #80] @ (212cdb0 ) │ │ @@ -265400,16 +265400,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r0, sp, #368 @ 0x170 │ │ lsls r0, r4, #1 │ │ - ldrh r2, [r7, r2] │ │ - cdp2 1, 0, cr7, cr15, cr12, {0} │ │ + ldrh r7, [r4, r3] │ │ + mcr2 1, 0, r7, cr15, cr9, {1} │ │ vcmla.f16 d10, d0, d2[1], #90 │ │ lsls r0, r4, #1 │ │ │ │ 0212cdc0 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ @@ -265459,24 +265459,24 @@ │ │ cmp r1, r0 │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ add r7, pc, #960 @ (adr r7, 212d1fc (int, FatalErrors, char const*)@@Base+0x14>) │ │ lsls r0, r4, #1 │ │ - @ instruction: 0xebe6fe11 │ │ + ldc 14, cr15, [r3], {17} │ │ lsls r5, r6, #1 │ │ movs r0, r0 │ │ - subs r4, #165 @ 0xa5 │ │ + subs r4, #210 @ 0xd2 │ │ mcr2 1, 0, r0, cr15, cr7, {0} │ │ movs r0, r0 │ │ - subs r4, #142 @ 0x8e │ │ + subs r4, #187 @ 0xbb │ │ mcr2 1, 0, r0, cr15, cr5, {3} │ │ movs r0, r0 │ │ - subs r1, #167 @ 0xa7 │ │ + subs r1, #212 @ 0xd4 │ │ mrc2 1, 0, r0, cr0, cr3, {6} │ │ movs r0, r0 │ │ add r7, pc, #600 @ (adr r7, 212d0b8 (int, FatalErrors, char const*)@@Base+0x6c>) │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #56 @ 0x38 │ │ @@ -265539,16 +265539,16 @@ │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ add r7, pc, #328 @ (adr r7, 212d04c (int, FatalErrors, char const*)@@Base>) │ │ lsls r0, r4, #1 │ │ - strb r0, [r2, #0] │ │ - cdp2 7, 1, cr1, cr0, cr1, {4} │ │ + strb r5, [r7, #0] │ │ + cdp2 7, 1, cr1, cr0, cr14, {5} │ │ cdp2 6, 1, cr10, cr0, cr4, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #80] @ (212cf6c ) │ │ @@ -265585,16 +265585,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r6, pc, #640 @ (adr r6, 212d1f0 (int, FatalErrors, char const*)@@Base+0x8>) │ │ lsls r0, r4, #1 │ │ - strh r2, [r6, r7] │ │ - mrc2 15, 0, r6, cr0, cr0, {2} │ │ + strb r7, [r3, r0] │ │ + mrc2 15, 0, r6, cr0, cr13, {3} │ │ cdp2 6, 1, cr10, cr0, cr6, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #80] @ (212cfd8 ) │ │ @@ -265631,16 +265631,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r6, pc, #208 @ (adr r6, 212d0ac (int, FatalErrors, char const*)@@Base+0x60>) │ │ lsls r0, r4, #1 │ │ - asrs r5, r2, #26 │ │ - cdp2 14, 1, cr6, cr0, cr4, {7} │ │ + asrs r2, r0, #27 │ │ + mrc2 15, 0, r6, cr0, cr1, {0} │ │ mrc2 5, 0, sl, cr0, cr10, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #72] @ (212d03c ) │ │ @@ -265675,16 +265675,16 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ add r5, pc, #800 @ (adr r5, 212d360 >&)@@Base+0x108>) │ │ lsls r0, r4, #1 │ │ - blt.n 212d0e2 * CelxLua::safeGetClass >(int, FatalErrors, char const*)@@Base+0x26> │ │ - mcr2 14, 0, r6, cr14, cr8, {3} │ │ + blt.n 212d13c │ │ + cdp2 14, 0, cr6, cr14, cr5, {5} │ │ mrc2 5, 0, sl, cr0, cr4, {4} │ │ lsls r0, r4, #1 │ │ │ │ 0212d04c (int, FatalErrors, char const*)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -266061,16 +266061,16 @@ │ │ mov r0, r8 │ │ bl 211e394 │ │ blx 26ffaf0 │ │ add r6, pc, #504 @ (adr r6, 212d5c8 ) │ │ lsls r0, r4, #1 │ │ add r3, pc, #304 @ (adr r3, 212d504 >, int, int, int, int, double)@@Base+0x18>) │ │ lsls r0, r4, #1 │ │ - ldrh r1, [r0, #18] │ │ - vcmla.f16 , , d1[0], #90 │ │ + ldrh r6, [r5, #18] │ │ + vcmla.f16 , , d14[1], #90 │ │ mcr2 2, 0, sl, cr15, cr12, {1} │ │ lsls r0, r4, #1 │ │ │ │ 0212d3e0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -266503,129 +266503,129 @@ │ │ cmp r1, r0 │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ ldr r7, [sp, #1000] @ 0x3e8 │ │ lsls r0, r4, #1 │ │ - b.n 212dfc8 │ │ + b.n 212d022 │ │ mrc2 3, 0, r0, cr1, cr15, {0} │ │ movs r0, r0 │ │ - ldr r4, [r3, #8] │ │ + ldr r1, [r1, #12] │ │ cdp2 3, 1, cr0, cr0, cr5, {1} │ │ movs r0, r0 │ │ - ldr r5, [r3, #36] @ 0x24 │ │ + ldr r2, [r1, #40] @ 0x28 │ │ mrc2 3, 0, r0, cr1, cr11, {4} │ │ movs r0, r0 │ │ movs r2, #25 │ │ mrc2 4, 0, r0, cr2, cr5, {1} │ │ movs r0, r0 │ │ - ldr r3, [pc, #916] @ (212db9c ) │ │ + ldr r4, [pc, #72] @ (212d850 ) │ │ mrc2 4, 0, r0, cr1, cr11, {5} │ │ movs r0, r0 │ │ - asrs r6, r1, #10 │ │ + asrs r3, r7, #10 │ │ mcr2 5, 0, r0, cr15, cr1, {2} │ │ movs r0, r0 │ │ - strh r1, [r5, r0] │ │ + strh r6, [r2, r1] │ │ cdp2 6, 0, cr0, cr15, cr15, {7} │ │ movs r0, r0 │ │ - str r4, [sp, #300] @ 0x12c │ │ + str r4, [sp, #480] @ 0x1e0 │ │ mcr2 7, 0, r0, cr15, cr1, {4} │ │ movs r0, r0 │ │ - cmp r6, #1 │ │ + cmp r6, #46 @ 0x2e │ │ @ instruction: 0xfe110963 │ │ movs r0, r0 │ │ - push {r0, r1, r5} │ │ + push {r4, r6} │ │ cdp2 1, 0, cr1, cr15, cr9, {7} │ │ movs r0, r0 │ │ - lsrs r0, r0, #23 │ │ + lsrs r5, r5, #23 │ │ cdp2 2, 0, cr1, cr15, cr15, {5} │ │ movs r0, r0 │ │ - str r3, [r3, #104] @ 0x68 │ │ + str r0, [r1, #108] @ 0x6c │ │ cdp2 3, 1, cr1, cr1, cr9, {1} │ │ movs r0, r0 │ │ - str r5, [r5, #104] @ 0x68 │ │ + str r2, [r3, #108] @ 0x6c │ │ cdp2 4, 1, cr1, cr1, cr3, {1} │ │ movs r0, r0 │ │ - asrs r4, r5, #8 │ │ + asrs r1, r3, #9 │ │ mcr2 5, 0, r1, cr15, cr5, {5} │ │ movs r0, r0 │ │ - strh r0, [r4, #54] @ 0x36 │ │ + strh r5, [r1, #56] @ 0x38 │ │ cdp2 6, 1, cr1, cr1, cr11, {2} │ │ movs r0, r0 │ │ - bcs.n 212d7e2 │ │ + bcs.n 212d83c │ │ mcr2 15, 0, r1, cr15, cr13, {0} │ │ movs r0, r0 │ │ - strh r4, [r1, #54] @ 0x36 │ │ + strh r1, [r7, #54] @ 0x36 │ │ cdp2 0, 1, cr2, cr1, cr15, {3} │ │ movs r0, r0 │ │ - ldr r0, [pc, #1004] @ (212dc5c ) │ │ + ldr r1, [pc, #160] @ (212d910 ) │ │ mrc2 0, 0, r2, cr1, cr9, {7} │ │ movs r0, r0 │ │ - ldr r2, [r5, #104] @ 0x68 │ │ + ldr r7, [r2, #108] @ 0x6c │ │ mcr2 2, 0, r2, cr14, cr7, {2} │ │ movs r0, r0 │ │ ldr r3, [pc, #756] @ (212db74 ) │ │ mcr2 3, 0, r2, cr14, cr5, {5} │ │ movs r0, r0 │ │ - strb r7, [r1, #3] │ │ + strb r4, [r7, #3] │ │ vseleq.f16 s4, s31, s15 │ │ movs r0, r0 │ │ - strh r5, [r1, #52] @ 0x34 │ │ + strh r2, [r7, #52] @ 0x34 │ │ vselvs.f32 s4, s2, s11 │ │ movs r0, r0 │ │ - ldmia r6!, {r0, r2, r3, r4} │ │ + ldmia r6, {r1, r3, r6} │ │ mrc2 10, 0, r2, cr0, cr3, {6} @ │ │ movs r0, r0 │ │ - str r1, [sp, #220] @ 0xdc │ │ + str r1, [sp, #400] @ 0x190 │ │ mcr2 12, 0, r2, cr14, cr1, {2} │ │ movs r0, r0 │ │ - str r4, [sp, #804] @ 0x324 │ │ + str r4, [sp, #984] @ 0x3d8 │ │ cdp2 12, 0, cr2, cr14, cr3, {5} │ │ movs r0, r0 │ │ - str r4, [sp, #808] @ 0x328 │ │ + str r4, [sp, #988] @ 0x3dc │ │ mcr2 13, 0, r2, cr14, cr13, {2} │ │ movs r0, r0 │ │ - ldr r2, [pc, #804] @ (212dbdc ) │ │ + ldr r2, [pc, #984] @ (212dc90 ) │ │ mrc2 14, 0, r2, cr1, cr7, {0} │ │ movs r0, r0 │ │ - cbz r3, 212d90e │ │ + cbz r0, 212d91a │ │ cdp2 15, 0, cr2, cr15, cr13, {1} │ │ movs r0, r0 │ │ - ldr r0, [r5, #96] @ 0x60 │ │ + ldr r5, [r2, #100] @ 0x64 │ │ cdp2 0, 0, cr3, cr14, cr3, {2} │ │ movs r0, r0 │ │ - ldrh r0, [r0, #20] │ │ + ldrh r5, [r5, #20] │ │ mrc2 1, 0, r3, cr0, cr1, {0} │ │ movs r0, r0 │ │ - ldr r5, [r2, #96] @ 0x60 │ │ + ldr r2, [r0, #100] @ 0x64 │ │ cdp2 1, 0, cr3, cr14, cr3, {3} │ │ movs r0, r0 │ │ - strh r5, [r3, #14] │ │ + strh r2, [r1, #16] │ │ cdp2 2, 1, cr3, cr1, cr13, {2} │ │ movs r0, r0 │ │ - b.n 212d752 │ │ + b.n 212d7ac │ │ cdp2 3, 1, cr3, cr1, cr11, {5} │ │ movs r0, r0 │ │ - ldr r3, [pc, #664] @ (212db88 ) │ │ + ldr r3, [pc, #844] @ (212dc3c ) │ │ cdp2 4, 1, cr3, cr0, cr13, {3} │ │ movs r0, r0 │ │ - ldr r2, [pc, #400] @ (212da88 ) │ │ + ldr r2, [pc, #580] @ (212db3c ) │ │ mrc2 4, 0, r3, cr1, cr7, {7} │ │ movs r0, r0 │ │ ldr r5, [sp, #952] @ 0x3b8 │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r1, [pc, #8] @ (212d910 ) │ │ add r1, pc │ │ blx 2704b40 │ │ movs r0, #1 │ │ pop {r7, pc} │ │ - str r3, [sp, #56] @ 0x38 │ │ + str r3, [sp, #236] @ 0xec │ │ mcr2 5, 0, fp, cr14, cr0, {5} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #104] @ (212d988 ) │ │ mov r1, r4 │ │ add r0, pc │ │ @@ -266669,16 +266669,16 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ ldr r4, [sp, #624] @ 0x270 │ │ lsls r0, r4, #1 │ │ - ldr r0, [pc, #972] @ (212dd5c ) │ │ - cdp2 2, 1, cr13, cr1, cr6, {1} │ │ + ldr r1, [pc, #128] @ (212da10 ) │ │ + mrc2 2, 0, sp, cr1, cr3, {2} │ │ cdp2 12, 0, cr9, cr14, cr8, {2} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [pc, #136] @ (212da2c ) │ │ @@ -266738,17 +266738,17 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #24 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r4, [sp, #96] @ 0x60 │ │ lsls r0, r4, #1 │ │ - ldmia r6!, {r0, r1} │ │ - cdp2 1, 1, cr13, cr0, cr2, {5} │ │ - cdp2 1, 0, cr13, cr14, cr9, {5} │ │ + ldmia r6!, {r4, r5} │ │ + cdp2 1, 1, cr13, cr0, cr15, {6} │ │ + mcr2 1, 0, sp, cr14, cr6, {6} │ │ vseleq.f64 d9, d30, d20 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #120] @ (212dac4 ) │ │ @@ -266801,16 +266801,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldr r3, [sp, #448] @ 0x1c0 │ │ lsls r0, r4, #1 │ │ - add r6, pc, #772 @ (adr r6, 212ddd0 ) │ │ - mrc2 0, 0, sp, cr1, cr10, {7} │ │ + add r6, pc, #952 @ (adr r6, 212de84 ) │ │ + cdp2 1, 1, cr13, cr1, cr7, {1} │ │ vseleq.f64 d9, d14, d14 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [pc, #132] @ (212db64 ) │ │ @@ -266869,16 +266869,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #24 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldr r2, [sp, #880] @ 0x370 │ │ lsls r0, r4, #1 │ │ - beq.n 212db12 │ │ - cdp2 0, 0, cr13, cr14, cr6, {3} │ │ + bne.n 212db6c │ │ + mcr2 0, 0, sp, cr14, cr3, {4} │ │ @ instruction: 0xfe0e4a6c │ │ @ instruction: 0xfe0e9a6e │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ vpush {d8-d9} │ │ @@ -267011,18 +267011,18 @@ │ │ blx 26ffae0 │ │ nop │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldr r2, [sp, #192] @ 0xc0 │ │ lsls r0, r4, #1 │ │ - str r0, [sp, #500] @ 0x1f4 │ │ - mcr2 15, 0, ip, cr14, cr10, {5} │ │ - cdp2 1, 0, cr8, cr14, cr7, {6} │ │ - mrc2 11, 0, lr, cr1, cr11, {2} @ │ │ + str r0, [sp, #680] @ 0x2a8 │ │ + cdp2 15, 0, cr12, cr14, cr7, {7} │ │ + mcr2 1, 0, r8, cr14, cr4, {7} │ │ + vselvs.f64 d14, d17, d8 │ │ mcr2 0, 0, r0, cr14, cr0, {4} │ │ vfmsl.f16 , d18, d4[1] │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ @@ -267084,19 +267084,19 @@ │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldr r0, [sp, #560] @ 0x230 │ │ lsls r0, r4, #1 │ │ - ldrh r0, [r3, #42] @ 0x2a │ │ - mcr2 14, 0, ip, cr15, cr6, {0} │ │ - mcr2 15, 0, r5, cr14, cr6, {4} │ │ - mrc2 14, 0, sl, cr1, cr10, {0} │ │ - @ instruction: 0xfe0e8ae7 │ │ + ldrh r5, [r0, #44] @ 0x2c │ │ + cdp2 14, 0, cr12, cr15, cr3, {2} │ │ + cdp2 15, 0, cr5, cr14, cr3, {6} │ │ + cdp2 14, 1, cr10, cr1, cr7, {2} │ │ + mcr2 11, 0, r8, cr14, cr4, {0} @ │ │ vfmal.f16 d9, s28, s4[1] │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #68 @ 0x44 │ │ mov r4, r0 │ │ @@ -267271,23 +267271,23 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #40] @ 0x28 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ str r7, [sp, #864] @ 0x360 │ │ lsls r0, r4, #1 │ │ - ldmia r5!, {r0, r1, r2, r3, r6, r7} │ │ - mcr2 14, 0, r6, cr14, cr9, {0} │ │ - vdot.bf16 q6, , d14[0] │ │ + ldmia r5, {r2, r3, r4, r5, r6, r7} │ │ + cdp2 14, 0, cr6, cr14, cr6, {2} │ │ + mcr2 13, 0, ip, cr15, cr11, {3} │ │ mcr2 7, 0, r9, cr14, cr10, {1} │ │ lsls r0, r4, #1 │ │ str r6, [sp, #352] @ 0x160 │ │ lsls r0, r4, #1 │ │ - ldr r6, [r1, #84] @ 0x54 │ │ - vdot.bf16 d6, d15, d12[1] │ │ + ldr r3, [r7, #84] @ 0x54 │ │ + mcr2 13, 0, r6, cr15, cr9, {2} │ │ mcr2 5, 0, fp, cr15, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d9} │ │ sub sp, #56 @ 0x38 │ │ mov r4, r0 │ │ @@ -267655,30 +267655,30 @@ │ │ cmp r5, #0 │ │ strb.w r0, [sp, #32] │ │ add r0, sp, #32 │ │ add.w r4, r0, #1 │ │ bne.w 212e4b2 │ │ b.n 212e4bc │ │ ldc2l 14, cr15, [r6], {17} │ │ - @ instruction: 0xebbffe0f │ │ - ldmia r3!, {r2, r5, r6} │ │ - vdot.bf16 d5, d14, d7[0] │ │ - mrc2 5, 0, r2, cr1, cr7, {7} │ │ - mcr2 9, 0, sp, cr15, cr8, {2} @ │ │ - cdp2 12, 1, cr10, cr1, cr15, {4} │ │ - cdp2 15, 0, cr7, cr14, cr7, {0} │ │ - cdp2 6, 1, cr12, cr0, cr10, {6} │ │ - cdp2 5, 1, cr2, cr0, cr5, {0} │ │ - @ instruction: 0xfe0f5be2 │ │ - mrc2 15, 0, r5, cr1, cr12, {2} │ │ - cdp2 4, 0, cr12, cr14, cr12, {7} │ │ - cdp2 0, 0, cr12, cr14, cr1, {3} │ │ - mrc2 10, 0, r5, cr0, cr0, {5} @ │ │ - mrc2 12, 0, r7, cr0, cr1, {0} │ │ - mrc2 5, 0, lr, cr0, cr15, {1} │ │ + @ instruction: 0xebecfe0f │ │ + ldmia r3!, {r0, r4, r7} │ │ + mcr2 13, 0, r5, cr14, cr4, {1} │ │ + cdp2 6, 1, cr2, cr1, cr4, {1} │ │ + vseleq.f16 s26, s31, s10 │ │ + mrc2 12, 0, sl, cr1, cr12, {5} │ │ + mcr2 15, 0, r7, cr14, cr4, {1} │ │ + mrc2 6, 0, ip, cr0, cr7, {7} │ │ + mrc2 5, 0, r2, cr0, cr2, {1} │ │ + cdp2 12, 0, cr5, cr15, cr15, {0} │ │ + cdp2 15, 1, cr5, cr1, cr9, {4} │ │ + mcr2 5, 0, ip, cr14, cr9, {0} │ │ + cdp2 0, 0, cr12, cr14, cr14, {4} │ │ + mrc2 10, 0, r5, cr0, cr13, {6} @ │ │ + mrc2 12, 0, r7, cr0, cr14, {1} │ │ + cdp2 5, 1, cr14, cr0, cr12, {3} │ │ cdp2 0, 0, cr15, cr14, cr5, {2} │ │ movs r7, r1 │ │ mov r8, r6 │ │ adds r6, r0, #1 │ │ mov r0, r6 │ │ blx 26ffb80 │ │ mov r4, r0 │ │ @@ -268096,16 +268096,16 @@ │ │ blx r1 │ │ blx 26ffaf0 │ │ nop │ │ str r5, [sp, #960] @ 0x3c0 │ │ lsls r0, r4, #1 │ │ ldrh r6, [r3, #50] @ 0x32 │ │ lsls r0, r4, #1 │ │ - push {r3, r5, r6, r7} │ │ - cdp2 14, 1, cr3, cr1, cr4, {1} │ │ + push {r0, r2, r4, lr} │ │ + mrc2 14, 0, r3, cr1, cr1, {2} │ │ mcr2 5, 0, fp, cr15, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ mov r4, r0 │ │ ldr r0, [pc, #176] @ (212e908 ) │ │ mov r1, r4 │ │ @@ -268177,17 +268177,17 @@ │ │ moveq r0, #0 │ │ addeq sp, #20 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldrh r4, [r4, #42] @ 0x2a │ │ lsls r0, r4, #1 │ │ - subs r6, r7, r7 │ │ - cdp2 2, 1, cr12, cr1, cr12, {7} │ │ - mcr2 9, 0, r3, cr14, cr2, {4} @ │ │ + adds r3, r5, #0 │ │ + mrc2 3, 0, ip, cr1, cr9, {0} │ │ + mcr2 9, 0, r3, cr14, cr15, {5} @ │ │ cdp2 12, 1, cr8, cr1, cr12, {6} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #108] @ (212e994 ) │ │ @@ -268235,16 +268235,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldrh r4, [r2, #36] @ 0x24 │ │ lsls r0, r4, #1 │ │ - movs r1, #162 @ 0xa2 │ │ - mcr2 2, 0, ip, cr15, cr14, {0} │ │ + movs r1, #207 @ 0xcf │ │ + cdp2 2, 0, cr12, cr15, cr11, {2} │ │ mcr2 12, 0, r8, cr14, cr14, {1} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ vpush {d8-d9} │ │ sub sp, #48 @ 0x30 │ │ @@ -268332,17 +268332,17 @@ │ │ vpopeq {d8-d9} │ │ ldreq.w r8, [sp], #4 │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldrh r4, [r0, #32] │ │ lsls r0, r4, #1 │ │ - add sp, #468 @ 0x1d4 │ │ - cdp2 1, 1, cr12, cr1, cr10, {4} │ │ - @ instruction: 0xfe0ed96f │ │ + sub sp, #136 @ 0x88 │ │ + mrc2 1, 0, ip, cr1, cr7, {5} │ │ + mcr2 9, 0, sp, cr14, cr12, {4} @ │ │ @ instruction: 0xfe108b42 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #316] @ (212ebf4 ) │ │ @@ -268485,33 +268485,33 @@ │ │ b.n 212eb78 │ │ ldr r1, [pc, #64] @ (212ec30 ) │ │ add r1, pc │ │ b.n 212eb78 │ │ nop │ │ ldrh r4, [r0, #24] │ │ lsls r0, r4, #1 │ │ - adds r7, #198 @ 0xc6 │ │ - cdp2 0, 1, cr12, cr1, cr14, {4} │ │ - mcr2 12, 0, r9, cr14, cr1, {4} │ │ - mcr2 0, 0, ip, cr15, cr3, {6} │ │ + adds r7, #243 @ 0xf3 │ │ + mrc2 0, 0, ip, cr1, cr11, {5} │ │ + mcr2 12, 0, r9, cr14, cr14, {5} │ │ + cdp2 1, 0, cr12, cr15, cr0, {0} │ │ mcr2 12, 0, r0, cr14, cr6, {3} │ │ - mrc2 7, 0, r3, cr2, cr4, {0} │ │ - mrc2 14, 0, r9, cr1, cr6, {6} │ │ - @ instruction: 0xfe0ffae9 │ │ - cdp2 0, 1, cr8, cr0, cr2, {4} │ │ - cdp2 2, 0, cr7, cr14, cr1, {0} │ │ - mrc2 5, 0, r5, cr1, cr1, {7} │ │ + cdp2 7, 1, cr3, cr2, cr1, {2} │ │ + cdp2 15, 1, cr9, cr1, cr3, {0} │ │ + mcr2 11, 0, pc, cr15, cr6, {0} @ │ │ + cdp2 0, 1, cr8, cr0, cr15, {5} │ │ + cdp2 2, 0, cr7, cr14, cr14, {1} │ │ + mrc2 6, 0, r5, cr1, cr14, {0} │ │ mrc2 6, 0, r3, cr0, cr0, {5} │ │ - cdp2 0, 0, cr6, cr14, cr13, {5} │ │ - mcr2 10, 0, pc, cr15, cr6, {3} @ │ │ - cdp2 15, 0, cr1, cr15, cr0, {1} │ │ - mcr2 15, 0, r1, cr15, cr8, {4} │ │ - mcr2 15, 0, r9, cr15, cr5, {4} │ │ - mcr2 13, 0, r3, cr15, cr11, {2} │ │ - mcr2 15, 0, r1, cr15, cr14, {4} │ │ + mcr2 0, 0, r6, cr14, cr10, {6} │ │ + vseleq.f32 s30, s31, s7 │ │ + cdp2 15, 0, cr1, cr15, cr13, {2} │ │ + cdp2 15, 0, cr1, cr15, cr5, {6} │ │ + cdp2 15, 0, cr9, cr15, cr2, {6} │ │ + vdot.bf16 d3, d31, d8[0] │ │ + cdp2 15, 0, cr1, cr15, cr11, {6} │ │ vseleq.f64 d2, d31, d10 │ │ lsls r7, r3, #1 │ │ ldrh r2, [r7, #16] │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #32 │ │ @@ -268572,16 +268572,16 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #32 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ ldrh r4, [r4, #10] │ │ lsls r0, r4, #1 │ │ - strh r2, [r0, #0] │ │ - cdp2 14, 0, cr11, cr14, cr14, {7} │ │ + strh r7, [r5, #0] │ │ + mcr2 15, 0, fp, cr14, cr11, {0} │ │ vfmal.f16 q4, d30, d0[2] │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ mov fp, r0 │ │ @@ -268929,40 +268929,40 @@ │ │ ldr r1, [r3, #8] │ │ ldr r2, [r1, #0] │ │ cmp r2, r3 │ │ mov r3, r1 │ │ bne.n 212f072 │ │ b.n 212f050 │ │ nop │ │ - revsh r6, r2 │ │ - mrc2 14, 0, fp, cr0, cr6, {1} │ │ - cdp2 15, 0, cr4, cr14, cr11, {6} │ │ - vselvs.f32 s18, s2, s15 │ │ - mcr2 2, 0, r3, cr15, cr13, {0} │ │ - cdp2 5, 1, cr3, cr1, cr3, {0} │ │ - cdp2 14, 1, cr5, cr1, cr13, {5} │ │ - cdp2 14, 0, cr5, cr15, cr8, {5} │ │ - mcr2 13, 0, sp, cr15, cr13, {6} │ │ - mcr2 5, 0, pc, cr15, cr14, {7} @ │ │ - mcr2 4, 0, r3, cr14, cr11, {4} │ │ - mrc2 12, 0, r1, cr1, cr8, {5} │ │ - cdp2 7, 0, cr15, cr15, cr12, {6} │ │ - mrc2 13, 0, sp, cr0, cr14, {2} │ │ - mcr2 12, 0, r9, cr15, cr2, {0} │ │ - vdot.bf16 d11, d15, d3[0] │ │ - mcr2 6, 0, pc, cr14, cr9, {7} @ │ │ + cbnz r3, 212f0c4 │ │ + cdp2 14, 1, cr11, cr0, cr3, {3} │ │ + mcr2 15, 0, r4, cr14, cr8, {7} │ │ + mrc2 10, 0, r9, cr1, cr4, {2} @ │ │ + cdp2 2, 0, cr3, cr15, cr10, {2} │ │ + mrc2 5, 0, r3, cr1, cr0, {1} │ │ + mrc2 14, 0, r5, cr1, cr10, {6} │ │ + mcr2 14, 0, r5, cr15, cr5, {6} │ │ + cdp2 14, 0, cr13, cr15, cr10, {0} │ │ + cdp2 6, 0, cr15, cr15, cr11, {1} │ │ + cdp2 4, 0, cr3, cr14, cr8, {6} │ │ + cdp2 12, 1, cr1, cr1, cr5, {7} │ │ + mcr2 7, 0, pc, cr15, cr9, {7} @ │ │ + cdp2 13, 1, cr13, cr0, cr11, {4} │ │ + mcr2 12, 0, r9, cr15, cr15, {1} │ │ + mcr2 13, 0, fp, cr15, cr0, {1} │ │ + cdp2 7, 0, cr15, cr14, cr6, {1} │ │ mrc2 7, 0, r2, cr0, cr2, {4} │ │ lsls r7, r3, #1 │ │ - ldr r5, [pc, #732] @ (212f3a8 ) │ │ - vselvs.f64 d9, d1, d27 │ │ - cdp2 0, 0, cr3, cr15, cr3, {1} │ │ - mrc2 9, 0, ip, cr1, cr10, {7} @ │ │ - cdp2 7, 1, cr1, cr1, cr4, {7} │ │ - cdp2 13, 1, cr9, cr0, cr15, {2} │ │ - mcr2 6, 0, pc, cr14, cr2, {1} @ │ │ + ldr r5, [pc, #912] @ (212f45c ) │ │ + mrc2 11, 0, r9, cr1, cr8, {2} @ │ │ + mcr2 0, 0, r3, cr15, cr0, {2} │ │ + vselvs.f32 s24, s2, s15 │ │ + vfmsl.f16 d1, s2, s2[0] │ │ + mrc2 13, 0, r9, cr0, cr12, {3} │ │ + mcr2 6, 0, pc, cr14, cr15, {2} @ │ │ mcr2 5, 0, pc, cr15, cr0, {5} @ │ │ ldr r0, [r0, #112] @ 0x70 │ │ blt.n 212f1ce │ │ beq.w 212f246 │ │ cmp.w r0, #4096 @ 0x1000 │ │ beq.w 212f240 │ │ cmp.w r0, #8192 @ 0x2000 │ │ @@ -269241,20 +269241,20 @@ │ │ movs r1, #8 │ │ blx 2704bc0 │ │ movs r1, #2 │ │ strd r1, r6, [r0] │ │ mov r0, r4 │ │ b.n 212f42e │ │ nop │ │ - adds r1, #192 @ 0xc0 │ │ - cdp2 12, 1, cr4, cr1, cr7, {1} │ │ - mrc2 7, 0, r3, cr1, cr13, {2} │ │ - mcr2 9, 0, r1, cr15, cr8, {7} @ │ │ - mcr2 12, 0, r4, cr15, cr3, {0} │ │ - cdp2 14, 1, cr2, cr1, cr15, {3} │ │ + adds r1, #237 @ 0xed │ │ + mrc2 12, 0, r4, cr1, cr4, {2} │ │ + cdp2 7, 1, cr3, cr1, cr10, {4} │ │ + vseleq.f32 s2, s30, s11 │ │ + cdp2 12, 0, cr4, cr15, cr0, {2} │ │ + mrc2 14, 0, r2, cr1, cr12, {4} │ │ vcmla.f16 d6, d1, d6[0], #90 │ │ mov r0, fp │ │ blx 2704b40 │ │ add r4, sp, #24 │ │ mov r1, fp │ │ mov r0, r4 │ │ blx 2704ad0 │ │ @@ -269363,52 +269363,52 @@ │ │ b.n 212f526 │ │ ldrb.w r0, [sp, #28] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #36] @ 0x24 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - adds r1, #87 @ 0x57 │ │ + adds r1, #132 @ 0x84 │ │ cdp2 4, 1, cr3, cr1, cr13, {2} │ │ - @ instruction: 0xfe0eba6a │ │ - @ instruction: 0xfe0e5ae6 │ │ - mcr2 2, 0, pc, cr15, cr14, {2} @ │ │ - cdp2 4, 0, cr15, cr14, cr2, {4} │ │ + mcr2 10, 0, fp, cr14, cr7, {4} @ │ │ + mcr2 11, 0, r5, cr14, cr3, {0} @ │ │ + cdp2 2, 0, cr15, cr15, cr11, {4} │ │ + cdp2 4, 0, cr15, cr14, cr15, {5} │ │ mcr2 6, 0, lr, cr15, cr0, {3} │ │ vfmsl.f16 d8, s3, s5[1] │ │ lsls r0, r4, #1 │ │ lsls r0, r3, #25 │ │ - vfmsl.f16 , d2, d6[2] │ │ - vseleq.f32 s14, s30, s5 │ │ - vseleq.f64 d6, d30, d17 │ │ - mrc2 15, 0, r4, cr1, cr1, {4} │ │ + vcmla.f16 d9, d18, d3[1], #90 │ │ + @ instruction: 0xfe0f7a4f │ │ + @ instruction: 0xfe0e6bce │ │ + mrc2 15, 0, r4, cr1, cr14, {5} │ │ mrc2 0, 0, r3, cr0, cr0, {2} │ │ - @ instruction: 0xfe0e5a4d │ │ - mcr2 4, 0, pc, cr15, cr6, {0} @ │ │ - vcmla.f16 , , d0[0], #0 │ │ - mcr2 10, 0, r4, cr15, cr13, {6} @ │ │ - cdp2 13, 1, cr2, cr1, cr15, {2} │ │ - mrc2 0, 0, r3, cr1, cr10, {5} │ │ - cdp2 3, 1, cr3, cr0, cr9, {5} │ │ - vcmla.f16 , , d13[0], #0 │ │ + mcr2 10, 0, r5, cr14, cr10, {3} @ │ │ + cdp2 4, 0, cr15, cr15, cr3, {2} │ │ + vcmla.f16 , , d13[1], #0 │ │ + vseleq.f64 d4, d15, d10 │ │ + mrc2 13, 0, r2, cr1, cr12, {3} │ │ + cdp2 0, 1, cr3, cr1, cr7, {7} │ │ + mrc2 3, 0, r3, cr0, cr6, {6} │ │ + vfmal.f16 , d15, d2[3] │ │ cdp2 2, 0, cr3, cr15, cr6, {7} │ │ - cdp2 5, 0, cr11, cr14, cr13, {0} │ │ - mrc2 10, 0, r9, cr0, cr7, {0} @ │ │ - cdp2 0, 0, cr15, cr14, cr2, {7} │ │ - mcr2 7, 0, r1, cr14, cr6, {5} │ │ - cdp2 6, 0, cr10, cr15, cr11, {6} │ │ - cdp2 1, 1, cr9, cr1, cr6, {7} │ │ - mrc2 6, 0, r9, cr0, cr10, {7} │ │ - vcmla.f16 , , d6[1], #0 │ │ - cdp2 6, 0, cr1, cr15, cr8, {4} │ │ - cdp2 7, 0, cr13, cr15, cr8, {2} │ │ - mcr2 0, 0, r9, cr15, cr8, {6} │ │ - cdp2 5, 1, cr7, cr0, cr8, {7} │ │ - mcr2 12, 0, r8, cr15, cr14, {2} │ │ - vfmsl.f16 d9, s3, s13[1] │ │ + mcr2 5, 0, fp, cr14, cr10, {1} │ │ + @ instruction: 0xfe109a44 │ │ + cdp2 1, 0, cr15, cr14, cr15, {0} │ │ + cdp2 7, 0, cr1, cr14, cr3, {7} │ │ + mcr2 6, 0, sl, cr15, cr8, {7} │ │ + mrc2 2, 0, r9, cr1, cr3, {0} │ │ + cdp2 7, 1, cr9, cr0, cr7, {1} │ │ + vfmal.f16 d5, s31, s6[0] │ │ + mcr2 6, 0, r1, cr15, cr5, {5} │ │ + mcr2 7, 0, sp, cr15, cr5, {3} │ │ + cdp2 1, 0, cr9, cr15, cr5, {0} │ │ + mrc2 6, 0, r7, cr0, cr5, {0} │ │ + cdp2 12, 0, cr8, cr15, cr11, {4} │ │ + vcmla.f16 , , d11[1], #90 │ │ mcr2 0, 0, r8, cr15, cr4, {5} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #16 │ │ mov r4, r0 │ │ @@ -269534,20 +269534,20 @@ │ │ vcvt.f64.u32 d16, s0 │ │ vmov r2, r3, d16 │ │ blx 2704d40 │ │ b.n 212f6be │ │ nop │ │ ldrb r2, [r3, #31] │ │ lsls r0, r4, #1 │ │ - add r4, pc, #532 @ (adr r4, 212f92c ) │ │ - mrc2 5, 0, fp, cr1, cr10, {2} │ │ - mcr2 4, 0, r9, cr14, cr1, {4} │ │ - cdp2 0, 0, cr15, cr15, cr12, {0} │ │ - cdp2 1, 1, cr1, cr0, cr5, {3} │ │ - cdp2 15, 1, cr4, cr0, cr12, {1} │ │ + add r4, pc, #712 @ (adr r4, 212f9e0 ) │ │ + cdp2 5, 1, cr11, cr1, cr7, {4} │ │ + mcr2 4, 0, r9, cr14, cr14, {5} │ │ + mcr2 0, 0, pc, cr15, cr9, {1} @ │ │ + mrc2 1, 0, r1, cr0, cr2, {4} │ │ + mrc2 15, 0, r4, cr0, cr9, {2} │ │ mcr2 14, 0, r7, cr14, cr10, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #124] @ (212f7b8 ) │ │ @@ -269601,15 +269601,15 @@ │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ ldrb r0, [r0, #26] │ │ lsls r0, r4, #1 │ │ b.n 212f304 │ │ - cdp2 4, 1, cr11, cr1, cr10, {0} │ │ + mrc2 4, 0, fp, cr1, cr7, {1} │ │ mcr2 14, 0, r7, cr14, cr8, {0} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #24 │ │ mov r4, r0 │ │ @@ -269742,17 +269742,17 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldrb r4, [r4, #23] │ │ lsls r0, r4, #1 │ │ - ldr r5, [pc, #752] @ (212fc18 ) │ │ - cdp2 3, 0, cr11, cr14, cr12, {3} │ │ - mcr2 2, 0, r9, cr14, cr10, {1} │ │ + ldr r5, [pc, #932] @ (212fccc ) │ │ + mcr2 3, 0, fp, cr14, cr9, {4} │ │ + cdp2 2, 0, cr9, cr14, cr7, {3} │ │ cdp2 12, 0, cr7, cr14, cr12, {6} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #24 │ │ mov r4, r0 │ │ @@ -269885,17 +269885,17 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldrb r0, [r7, #17] │ │ lsls r0, r4, #1 │ │ - ldc 14, cr15, [ip, #-60] @ 0xffffffc4 │ │ - sxth r0, r0 │ │ - cdp2 0, 0, cr9, cr14, cr14, {6} │ │ + stcl 14, cr15, [r9, #-60] @ 0xffffffc4 │ │ + sxth r5, r5 │ │ + mcr2 0, 0, r9, cr14, cr11, {7} │ │ @ instruction: 0xfe0e7b60 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d10} │ │ @@ -270151,25 +270151,25 @@ │ │ movs r1, #7 │ │ b.n 212fd82 │ │ movs r1, #8 │ │ b.n 212fd82 │ │ movs r1, #9 │ │ b.n 212fd82 │ │ cmp r3, #25 │ │ - cdp2 0, 0, cr11, cr14, cr10, {4} │ │ + mcr2 0, 0, fp, cr14, cr7, {5} │ │ mcr2 13, 0, pc, cr14, cr3, {1} @ │ │ - cdp2 0, 1, cr1, cr1, cr5, {0} │ │ + mrc2 0, 0, r1, cr1, cr2, {1} │ │ mcr2 13, 0, sp, cr15, cr8, {6} │ │ - cdp2 1, 1, cr4, cr1, cr8, {3} │ │ - cdp2 5, 1, cr2, cr1, cr6, {3} │ │ - cdp2 5, 1, cr2, cr0, cr11, {2} │ │ - mrc2 2, 0, r8, cr0, cr7, {0} │ │ - cdp2 4, 1, cr2, cr1, cr14, {4} │ │ - cdp2 12, 1, cr12, cr0, cr6, {6} │ │ - mcr2 9, 0, r0, cr15, cr12, {1} @ │ │ + mrc2 1, 0, r4, cr1, cr5, {4} │ │ + mrc2 5, 0, r2, cr1, cr3, {4} │ │ + mrc2 5, 0, r2, cr0, cr8, {3} │ │ + cdp2 2, 1, cr8, cr0, cr4, {2} │ │ + mrc2 4, 0, r2, cr1, cr11, {5} │ │ + mrc2 12, 0, ip, cr0, cr3, {7} │ │ + @ instruction: 0xfe0f0969 │ │ vcmla.f16 d15, d16, d10[1], #90 │ │ cdp2 1, 1, cr2, cr1, cr10, {0} │ │ ldrb.w r0, [sp, #48] @ 0x30 │ │ mov r4, r1 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #56] @ 0x38 │ │ @@ -270420,24 +270420,24 @@ │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ ldrb r4, [r0, #12] │ │ lsls r0, r4, #1 │ │ - add r2, sp, #336 @ 0x150 │ │ - mcr2 4, 0, r2, cr15, cr8, {3} │ │ - mrc2 7, 0, sl, cr0, cr13, {7} │ │ - vfmsl.f16 d8, s0, s2[1] │ │ - cdp2 3, 1, cr8, cr0, cr13, {5} │ │ + add r2, sp, #516 @ 0x204 │ │ + cdp2 4, 0, cr2, cr15, cr5, {5} │ │ + vcmla.f16 d10, d0, d10[1], #90 │ │ + vcmla.f16 q4, q0, d6[0], #90 │ │ + mrc2 3, 0, r8, cr0, cr10, {6} │ │ vcmla.f16 d7, d1, d10[0], #90 │ │ lsls r0, r4, #1 │ │ movs r7, #249 @ 0xf9 │ │ - cdp2 12, 0, cr6, cr14, cr14, {5} │ │ - cdp2 7, 0, cr0, cr15, cr15, {6} │ │ + mcr2 12, 0, r6, cr14, cr11, {6} │ │ + mcr2 7, 0, r0, cr15, cr12, {7} │ │ mcr2 5, 0, r7, cr15, cr4, {5} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #112] @ (213011c ) │ │ @@ -270485,16 +270485,16 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ strb r0, [r2, #20] │ │ lsls r0, r4, #1 │ │ - lsls r3, r1, #28 │ │ - mrc2 10, 0, sl, cr0, cr10, {4} @ │ │ + lsls r0, r7, #28 │ │ + @ instruction: 0xfe10aac7 │ │ mcr2 4, 0, r7, cr14, cr4, {5} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #72 @ 0x48 │ │ mov r4, r0 │ │ @@ -270559,17 +270559,17 @@ │ │ addeq sp, #72 @ 0x48 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ strb r0, [r0, #18] │ │ lsls r0, r4, #1 │ │ - str r1, [r5, #8] │ │ - vselvs.f32 s20, s0, s20 │ │ - cdp2 5, 0, cr14, cr14, cr15, {0} │ │ + str r6, [r2, #12] │ │ + mrc2 10, 0, sl, cr0, cr7, {1} @ │ │ + mcr2 5, 0, lr, cr14, cr12, {1} │ │ cdp2 4, 0, cr7, cr15, cr2, {0} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #16 │ │ mov r9, r0 │ │ @@ -270713,16 +270713,16 @@ │ │ ldrd r0, r1, [r5, #8] │ │ subs r1, r1, r0 │ │ cmp.w r6, r1, asr #2 │ │ blt.n 213031e │ │ b.n 21302f8 │ │ strb r4, [r0, #15] │ │ lsls r0, r4, #1 │ │ - mvns r2, r1 │ │ - @ instruction: 0xfe0ea94e │ │ + mvns r7, r6 │ │ + mcr2 9, 0, sl, cr14, cr11, {3} @ │ │ cdp2 2, 0, cr7, cr14, cr0, {6} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #72] @ (21303c8 ) │ │ @@ -270835,16 +270835,16 @@ │ │ blx 26ffae0 │ │ add r0, sp, #12 │ │ blx 27037a0 │ │ blx 26ffaf0 │ │ nop │ │ strb r4, [r3, #7] │ │ lsls r0, r4, #1 │ │ - b.n 212fe42 │ │ - cdp2 7, 0, cr10, cr14, cr6, {3} │ │ + b.n 212fe9c │ │ + mcr2 7, 0, sl, cr14, cr3, {4} │ │ mcr2 1, 0, r7, cr14, cr0, {2} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ mov r4, r0 │ │ ldr r0, [pc, #172] @ (2130554 ) │ │ @@ -270916,16 +270916,16 @@ │ │ blx 26ffae0 │ │ add r0, sp, #12 │ │ blx 27037a0 │ │ blx 26ffaf0 │ │ nop │ │ strb r4, [r2, #4] │ │ lsls r0, r4, #1 │ │ - stmia r7!, {r1, r2, r6} │ │ - mcr2 6, 0, sl, cr15, cr14, {4} │ │ + stmia r7!, {r0, r1, r4, r5, r6} │ │ + cdp2 6, 0, cr10, cr15, cr11, {6} │ │ cdp2 0, 0, cr7, cr14, cr8, {4} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ mov r4, r0 │ │ ldr r0, [pc, #260] @ (2130674 ) │ │ @@ -271031,17 +271031,17 @@ │ │ b.n 2130668 │ │ add r0, sp, #8 │ │ blx 27037a0 │ │ blx 26ffaf0 │ │ nop │ │ strb r4, [r1, #1] │ │ lsls r0, r4, #1 │ │ - b.n 2130d68 │ │ - mcr2 5, 0, sl, cr14, cr6, {6} │ │ - mcr2 9, 0, fp, cr14, cr4, {0} @ │ │ + b.n 2130dc2 │ │ + cdp2 6, 0, cr10, cr14, cr3, {0} │ │ + @ instruction: 0xfe0eb941 │ │ cdp2 15, 1, cr6, cr1, cr10, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ mov r4, r0 │ │ ldr r0, [pc, #260] @ (2130798 ) │ │ @@ -271147,17 +271147,17 @@ │ │ b.n 213078c │ │ add r0, sp, #8 │ │ blx 27037a0 │ │ blx 26ffaf0 │ │ nop │ │ ldr r0, [r5, #112] @ 0x70 │ │ lsls r0, r4, #1 │ │ - ldrsb r2, [r6, r4] │ │ - mrc2 4, 0, sl, cr1, cr2, {5} │ │ - mcr2 7, 0, fp, cr14, cr0, {7} │ │ + ldrsb r7, [r3, r5] │ │ + mrc2 4, 0, sl, cr1, cr15, {6} │ │ + vfmal.f16 d11, s28, s10[1] │ │ cdp2 14, 1, cr6, cr1, cr6, {2} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #24 │ │ mov r4, r0 │ │ @@ -271236,16 +271236,16 @@ │ │ addeq sp, #24 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r0, [r0, #96] @ 0x60 │ │ lsls r0, r4, #1 │ │ bl 21d349e >, std::__ndk1::__unordered_map_hasher >, celestia::util::PathHasher, std::__ndk1::equal_to, true>, std::__ndk1::__unordered_map_equal >, std::__ndk1::equal_to, celestia::util::PathHasher, true>, std::__ndk1::allocator > > >::__do_rehash(unsigned int)@@Base+0x4> │ │ - add r3, pc, #552 @ (adr r3, 2130aa8 ) │ │ - mcr2 4, 0, r4, cr14, cr13, {4} │ │ + add r3, pc, #732 @ (adr r3, 2130b5c ) │ │ + cdp2 4, 0, cr4, cr14, cr10, {6} │ │ vdot.bf16 q3, , d0[1] │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #72] @ (21308dc ) │ │ @@ -271372,16 +271372,16 @@ │ │ nop │ │ ldr r1, [sp, #616] @ 0x268 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ittee lt │ │ ldrlt r6, [r7, #72] @ 0x48 │ │ lsllt r0, r4, #1 │ │ - strhge r1, [r7, #32] │ │ - mcr2ge 2, 0, sl, cr14, cr10, {1} │ │ + strhge r6, [r4, #34] @ 0x22 │ │ + cdp2ge 2, 0, cr10, cr14, cr7, {3} │ │ mcr2 12, 0, r6, cr14, cr6, {0} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #48 @ 0x30 │ │ mov r4, r0 │ │ @@ -271512,22 +271512,22 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ ldr r4, [r1, #60] @ 0x3c │ │ lsls r0, r4, #1 │ │ - strb r2, [r2, #30] │ │ - mrc2 1, 0, sl, cr1, cr6, {2} │ │ - mcr2 1, 0, sl, cr14, cr15, {5} │ │ - mcr2 12, 0, fp, cr14, cr4, {5} │ │ + strb r7, [r7, #30] │ │ + cdp2 1, 1, cr10, cr1, cr3, {4} │ │ + cdp2 1, 0, cr10, cr14, cr12, {7} │ │ + cdp2 12, 0, cr11, cr14, cr1, {7} │ │ @ instruction: 0xfe0e6acc │ │ lsls r0, r4, #1 │ │ - add r1, pc, #668 @ (adr r1, 2130de4 ) │ │ - mcr2 11, 0, pc, cr14, cr3, {5} @ │ │ + add r1, pc, #848 @ (adr r1, 2130e98 ) │ │ + @ instruction: 0xfe0efbe0 │ │ mcr2 5, 0, fp, cr14, cr0, {6} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #180] @ (2130c0c ) │ │ mov r1, r4 │ │ add r0, pc │ │ @@ -271598,16 +271598,16 @@ │ │ cmp r2, r1 │ │ itt eq │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r4, [r4, #36] @ 0x24 │ │ lsls r0, r4, #1 │ │ - adds r2, r0, #4 │ │ - cdp2 15, 0, cr9, cr15, cr14, {7} │ │ + adds r7, r5, #4 │ │ + mcr2 0, 0, sl, cr15, cr11, {0} │ │ @ instruction: 0xfe0e69c2 │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #124] @ (2130ca4 ) │ │ @@ -271660,16 +271660,16 @@ │ │ cmp r2, r1 │ │ itt eq │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r4, [r2, #24] │ │ lsls r0, r4, #1 │ │ - ldrb r5, [r4, #6] │ │ - mrc2 15, 0, r9, cr0, cr14, {0} │ │ + ldrb r2, [r2, #7] │ │ + cdp2 15, 1, cr9, cr0, cr11, {2} │ │ vseleq.f16 s12, s28, s21 │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #124] @ (2130d3c ) │ │ @@ -271722,16 +271722,16 @@ │ │ cmp r2, r1 │ │ itt eq │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r4, [r7, #12] │ │ lsls r0, r4, #1 │ │ - subs r2, r3, r6 │ │ - cdp2 14, 0, cr9, cr15, cr6, {4} │ │ + subs r7, r0, r7 │ │ + mcr2 14, 0, r9, cr15, cr3, {5} │ │ vfmal.f16 d6, s29, s4[0] │ │ lsls r0, r4, #1 │ │ │ │ 02130d4c : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ @@ -271811,26 +271811,26 @@ │ │ addeq sp, #16 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r4, [r4, #4] │ │ lsls r0, r4, #1 │ │ ldr r2, [r2, #4] │ │ lsls r0, r4, #1 │ │ - ldr r4, [sp, #92] @ 0x5c │ │ - cdp2 0, 0, cr7, cr14, cr1, {6} │ │ - mrc2 12, 0, r7, cr1, cr15, {6} │ │ + ldr r4, [sp, #272] @ 0x110 │ │ + cdp2 0, 0, cr7, cr14, cr14, {7} │ │ + cdp2 13, 1, cr7, cr1, cr12, {0} │ │ cdp2 0, 0, cr0, cr15, cr1, {4} │ │ movs r0, r0 │ │ - bvc.n 2130e44 │ │ + bvc.n 2130e9e │ │ cdp2 4, 0, cr0, cr14, cr7, {4} │ │ movs r0, r0 │ │ - bl 1fb5a54 │ │ + bl 1fe2a54 │ │ lsls r5, r5, #21 │ │ movs r0, r0 │ │ - strb r7, [r3, #30] │ │ + strb r4, [r1, #31] │ │ cdp2 6, 1, cr0, cr0, cr7, {1} │ │ movs r0, r0 │ │ str r6, [r7, #120] @ 0x78 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -272184,32 +272184,32 @@ │ │ b.n 2130f24 │ │ nop │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ movs r0, r0 │ │ movs r0, r0 │ │ str r2, [r4, #116] @ 0x74 │ │ lsls r0, r4, #1 │ │ - strb r2, [r4, #30] │ │ - cdp2 4, 1, cr11, cr0, cr1, {5} │ │ - cdp2 12, 1, cr9, cr0, cr0, {7} │ │ - cdp2 5, 0, cr11, cr14, cr10, {0} │ │ - mrc2 11, 0, r8, cr0, cr5, {5} @ │ │ - cdp2 13, 1, cr9, cr1, cr12, {1} │ │ - cdp2 7, 0, cr3, cr14, cr1, {0} │ │ - mcr2 9, 0, r1, cr14, cr4, {4} @ │ │ + strb r7, [r1, #31] │ │ + cdp2 4, 1, cr11, cr0, cr14, {6} │ │ + cdp2 13, 1, cr9, cr0, cr13, {0} │ │ + mcr2 5, 0, fp, cr14, cr7, {1} │ │ + @ instruction: 0xfe108be2 │ │ + mrc2 13, 0, r9, cr1, cr9, {2} │ │ + cdp2 7, 0, cr3, cr14, cr14, {1} │ │ + @ instruction: 0xfe0e19c1 │ │ cdp2 7, 0, cr1, cr15, cr12, {1} │ │ - mcr2 12, 0, pc, cr14, cr7, {2} @ │ │ - mcr2 2, 0, r7, cr14, cr14, {7} │ │ - mrc2 15, 0, r6, cr1, cr11, {6} │ │ - cdp2 0, 1, cr7, cr1, cr6, {3} │ │ - vselvs.f64 d5, d1, d0 │ │ - mcr2 9, 0, r5, cr15, cr14, {1} @ │ │ - vcmla.f16 d1, d31, d7[0], #0 │ │ - vfmal.f16 , d15, d7[2] │ │ - cdp2 6, 0, cr13, cr15, cr6, {2} │ │ + cdp2 12, 0, cr15, cr14, cr4, {4} │ │ + cdp2 3, 0, cr7, cr14, cr11, {1} │ │ + cdp2 0, 1, cr7, cr1, cr8, {0} │ │ + mrc2 0, 0, r7, cr1, cr3, {4} │ │ + vselvs.f64 d5, d1, d29 │ │ + @ instruction: 0xfe0f596b │ │ + vfmal.f16 d1, s31, s9[0] │ │ + vcmla.f16 d1, d31, d4[1], #0 │ │ + mcr2 6, 0, sp, cr15, cr3, {3} │ │ cdp2 6, 0, cr6, cr14, cr14, {4} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ mov r1, r0 │ │ @@ -272294,16 +272294,16 @@ │ │ ittt eq │ │ addeq sp, #16 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ str r6, [r2, #52] @ 0x34 │ │ lsls r0, r4, #1 │ │ - cmp r4, #20 │ │ - cdp2 5, 1, cr11, cr0, cr14, {0} │ │ + cmp r4, #65 @ 0x41 │ │ + mrc2 5, 0, fp, cr0, cr11, {1} │ │ cdp2 4, 0, cr6, cr14, cr0, {0} │ │ lsls r0, r4, #1 │ │ str r4, [r7, #84] @ 0x54 │ │ lsls r0, r4, #1 │ │ str r6, [r3, #40] @ 0x28 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ @@ -272378,19 +272378,19 @@ │ │ blx 26ffae0 │ │ ldr r0, [sp, #0] │ │ movs r1, #0 │ │ b.n 21313d4 │ │ nop │ │ str r2, [r4, #36] @ 0x24 │ │ lsls r0, r4, #1 │ │ - cmp r3, #32 │ │ - mrc2 4, 0, fp, cr0, cr6, {1} │ │ + cmp r3, #77 @ 0x4d │ │ + cdp2 4, 1, cr11, cr0, cr3, {3} │ │ cdp2 3, 0, cr6, cr14, cr2, {0} │ │ lsls r0, r4, #1 │ │ - bl 222c030 │ │ + bl 2259030 │ │ str r6, [r3, #28] │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #8 │ │ mov r1, r0 │ │ @@ -272461,19 +272461,19 @@ │ │ blx 26ffae0 │ │ ldr r0, [sp, #0] │ │ movs r1, #0 │ │ b.n 213149c │ │ nop │ │ str r2, [r3, #24] │ │ lsls r0, r4, #1 │ │ - cmp r2, #88 @ 0x58 │ │ - cdp2 3, 1, cr11, cr0, cr14, {3} │ │ + cmp r2, #133 @ 0x85 │ │ + mrc2 3, 0, fp, cr0, cr11, {4} │ │ mcr2 2, 0, r6, cr14, cr10, {1} │ │ lsls r0, r4, #1 │ │ - bl 21640f8 , bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&)>(std::__ndk1::basic_istream >&, std::__ndk1::__fs::filesystem::path const&, std::__ndk1::vector >&, std::__ndk1::vector, std::__ndk1::allocator > >&, bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&))@@Base+0x11a0> │ │ + bl 21910f8 const&, double, double, Eigen::Matrix const*, double, double, double, Eigen::Matrix const&, double, double) const@@Base+0x7ec> │ │ str r6, [r2, #16] │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r8, r0 │ │ movs r0, #36 @ 0x24 │ │ @@ -272663,15 +272663,15 @@ │ │ b.n 21316e0 <_ZNSt6__ndk112basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEEC2INS_17basic_string_viewIcS2_EETnNS_9enable_ifIXaasr33__can_be_converted_to_string_viewIcS2_T_EE5valuentsr17__is_same_uncvrefISA_S5_EE5valueEiE4typeELi0EEERKSA_@@Base+0x1d2> │ │ mov r0, sl │ │ blx 2704be0 │ │ movs r0, #1 │ │ b.n 2131642 <_ZNSt6__ndk112basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEEC2INS_17basic_string_viewIcS2_EETnNS_9enable_ifIXaasr33__can_be_converted_to_string_viewIcS2_T_EE5valuentsr17__is_same_uncvrefISA_S5_EE5valueEiE4typeELi0EEERKSA_@@Base+0x134> │ │ str r4, [r0, #4] │ │ lsls r0, r4, #1 │ │ - str r1, [sp, #960] @ 0x3c0 │ │ + str r2, [sp, #116] @ 0x74 │ │ mrc2 15, 0, r5, cr0, cr6, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #16 │ │ mov r4, r0 │ │ @@ -272745,15 +272745,15 @@ │ │ ittt eq │ │ addeq sp, #16 │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldrsh r4, [r7, r2] │ │ lsls r0, r4, #1 │ │ - str r0, [sp, #592] @ 0x250 │ │ + str r0, [sp, #772] @ 0x304 │ │ mrc2 14, 0, r5, cr0, cr10, {0} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #48 @ 0x30 │ │ mov r5, r0 │ │ @@ -272820,15 +272820,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #28] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldrb r4, [r4, r7] │ │ lsls r0, r4, #1 │ │ - strh r3, [r1, r4] │ │ + strh r0, [r7, r4] │ │ mcr2 13, 0, r5, cr15, cr0, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #48 @ 0x30 │ │ mov r4, r0 │ │ @@ -272931,15 +272931,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #28] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldrb r4, [r4, r4] │ │ lsls r0, r4, #1 │ │ - ldr r4, [r7, #76] @ 0x4c │ │ + ldr r1, [r5, #80] @ 0x50 │ │ mrc2 12, 0, r5, cr0, cr6, {1} │ │ lsls r0, r4, #1 │ │ │ │ 021319bc const&)@@Base>: │ │ vmov.f32 s0, #112 @ 0x3f800000 1.0 │ │ vldr s2, [r1] │ │ vldr s6, [r1, #8] │ │ @@ -273453,145 +273453,145 @@ │ │ ittt eq │ │ addeq sp, #8 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r2, [r4, r6] │ │ lsls r0, r4, #1 │ │ - ldr r5, [sp, #608] @ 0x260 │ │ + ldr r5, [sp, #788] @ 0x314 │ │ cdp2 3, 1, cr0, cr1, cr3, {5} │ │ movs r0, r0 │ │ - ldr r6, [pc, #976] @ (2132270 ) │ │ + ldr r7, [pc, #132] @ (2131f24 ) │ │ cdp2 3, 0, cr0, cr15, cr9, {5} │ │ movs r0, r0 │ │ - ldrd pc, lr, [fp, #-60]! @ 0x3c │ │ + @ instruction: 0xe9a8fe0f │ │ lsls r3, r5, #16 │ │ movs r0, r0 │ │ - movs r5, #97 @ 0x61 │ │ - mrc2 15, 0, r6, cr0, cr15, {1} │ │ + movs r5, #142 @ 0x8e │ │ + cdp2 15, 1, cr6, cr0, cr12, {3} │ │ @ instruction: 0xfe0e0a6b │ │ movs r0, r0 │ │ lsrs r3, r1, #7 │ │ mcr2 11, 0, r0, cr14, cr1, {7} @ │ │ movs r0, r0 │ │ - movs r3, #216 @ 0xd8 │ │ + movs r4, #5 │ │ mrc2 12, 0, r0, cr1, cr15, {5} │ │ movs r0, r0 │ │ - add r7, sp, #636 @ 0x27c │ │ + add r7, sp, #816 @ 0x330 │ │ mcr2 13, 0, r0, cr15, cr5, {6} │ │ movs r0, r0 │ │ - add r7, sp, #628 @ 0x274 │ │ + add r7, sp, #808 @ 0x328 │ │ mcr2 14, 0, r0, cr15, cr3, {3} │ │ movs r0, r0 │ │ - str r5, [r1, #24] │ │ + str r2, [r7, #24] │ │ mrc2 14, 0, r0, cr1, cr9, {5} │ │ movs r0, r0 │ │ - cmp r1, #82 @ 0x52 │ │ + cmp r1, #127 @ 0x7f │ │ cdp2 15, 0, cr0, cr14, cr3, {1} │ │ movs r0, r0 │ │ - movs r0, #77 @ 0x4d │ │ + movs r0, #122 @ 0x7a │ │ cdp2 2, 1, cr1, cr1, cr13, {1} │ │ movs r0, r0 │ │ - add r7, sp, #448 @ 0x1c0 │ │ + add r7, sp, #628 @ 0x274 │ │ mcr2 2, 0, r1, cr15, cr7, {4} │ │ movs r0, r0 │ │ - lsls r3, r6, #25 │ │ + lsls r0, r4, #26 │ │ mrc2 2, 0, r1, cr0, cr9, {7} │ │ movs r0, r0 │ │ lsrs r2, r3, #5 │ │ cdp2 3, 0, cr1, cr14, cr3, {3} │ │ movs r0, r0 │ │ - add r7, sp, #340 @ 0x154 │ │ + add r7, sp, #520 @ 0x208 │ │ cdp2 3, 0, cr1, cr15, cr5, {7} │ │ movs r0, r0 │ │ - cmp r7, #206 @ 0xce │ │ + cmp r7, #251 @ 0xfb │ │ mcr2 4, 0, r1, cr15, cr15, {1} │ │ movs r0, r0 │ │ - add r4, pc, #540 @ (adr r4, 2132138 ) │ │ + add r4, pc, #720 @ (adr r4, 21321ec ) │ │ cdp2 4, 1, cr1, cr0, cr9, {7} │ │ movs r0, r0 │ │ - ldr r6, [r1, #56] @ 0x38 │ │ + ldr r3, [r7, #56] @ 0x38 │ │ cdp2 5, 0, cr1, cr15, cr3, {4} │ │ movs r0, r0 │ │ - lsls r5, r5, #15 │ │ + lsls r2, r3, #16 │ │ cdp2 6, 1, cr1, cr0, cr5, {1} │ │ movs r0, r0 │ │ - ldmia r1, {r0, r1, r3, r7} │ │ + ldmia r1!, {r3, r4, r5, r7} │ │ cdp2 6, 0, cr1, cr15, cr15, {5} │ │ movs r0, r0 │ │ - stmia r5!, {r0, r1, r3, r6, r7} │ │ + stmia r5!, {r3, r4, r5, r6, r7} │ │ mcr2 7, 0, r1, cr15, cr9, {1} │ │ movs r0, r0 │ │ - ldrh r1, [r4, #12] │ │ + ldrh r6, [r1, #14] │ │ cdp2 7, 0, cr1, cr15, cr3, {5} │ │ movs r0, r0 │ │ - stmia r5!, {} │ │ + stmia r5!, {r0, r2, r3, r5} │ │ vcmla.f16 d1, d0, d13[0], #90 │ │ movs r0, r0 │ │ - stmia r5!, {r1, r6, r7} │ │ + stmia r5!, {r0, r1, r2, r3, r5, r6, r7} │ │ vfmal.f16 , d15, d7[2] │ │ movs r0, r0 │ │ - add r5, pc, #460 @ (adr r5, 2132128 ) │ │ + add r5, pc, #640 @ (adr r5, 21321dc ) │ │ vcmla.f16 , q15, d1[1], #0 │ │ movs r0, r0 │ │ - ldmia r3, {r0, r1, r2, r3, r7} │ │ + ldmia r3, {r2, r3, r4, r5, r7} │ │ mcr2 9, 0, r1, cr14, cr11, {2} @ │ │ movs r0, r0 │ │ - lsrs r7, r0, #12 │ │ + lsrs r4, r6, #12 │ │ mcr2 9, 0, r1, cr15, cr1, {5} @ │ │ movs r0, r0 │ │ - ldr r3, [r7, #80] @ 0x50 │ │ + ldr r0, [r5, #84] @ 0x54 │ │ vseleq.f32 s2, s30, s14 │ │ movs r0, r0 │ │ - str r2, [r2, #80] @ 0x50 │ │ + str r7, [r7, #80] @ 0x50 │ │ vselvs.f32 s2, s1, s3 │ │ movs r0, r0 │ │ - ldr r3, [sp, #1020] @ 0x3fc │ │ + ldr r4, [sp, #176] @ 0xb0 │ │ mrc2 11, 0, r1, cr1, cr11, {5} @ │ │ movs r0, r0 │ │ - subs r7, #169 @ 0xa9 │ │ + subs r7, #214 @ 0xd6 │ │ cdp2 12, 1, cr1, cr1, cr13, {0} │ │ movs r0, r0 │ │ - ldrh r5, [r0, #50] @ 0x32 │ │ + ldrh r2, [r6, #50] @ 0x32 │ │ cdp2 12, 0, cr1, cr14, cr3, {3} │ │ movs r0, r0 │ │ - movs r0, #115 @ 0x73 │ │ + movs r0, #160 @ 0xa0 │ │ mrc2 12, 0, r1, cr0, cr9, {5} │ │ movs r0, r0 │ │ - stmia r6!, {r0, r1, r3} │ │ + stmia r6!, {r3, r4, r5} │ │ mcr2 13, 0, r1, cr14, cr11, {4} │ │ movs r0, r0 │ │ - lsls r4, r3, #6 │ │ + lsls r1, r1, #7 │ │ mrc2 14, 0, r1, cr1, cr5, {4} │ │ movs r0, r0 │ │ - b.n 2132490 │ │ + b.n 21324ea │ │ mrc2 14, 0, r1, cr0, cr3, {7} │ │ movs r0, r0 │ │ - ldr r6, [r0, #76] @ 0x4c │ │ + ldr r3, [r6, #76] @ 0x4c │ │ mcr2 15, 0, r1, cr15, cr1, {2} │ │ movs r0, r0 │ │ - movs r7, #209 @ 0xd1 │ │ + movs r7, #254 @ 0xfe │ │ cdp2 15, 0, cr1, cr14, cr15, {5} │ │ movs r0, r0 │ │ - lsls r3, r2, #18 │ │ + lsls r0, r0, #19 │ │ mrc2 0, 0, r2, cr1, cr13, {6} │ │ movs r0, r0 │ │ - lsrs r4, r3, #9 │ │ + lsrs r1, r1, #10 │ │ cdp2 3, 0, cr2, cr15, cr11, {2} │ │ movs r0, r0 │ │ ldrsb r2, [r0, r5] │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r1, [pc, #8] @ (2131fec ) │ │ add r1, pc │ │ blx 2704b40 │ │ movs r0, #1 │ │ pop {r7, pc} │ │ - @ instruction: 0xeb94fe0e │ │ + @ instruction: 0xebc1fe0e │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #112] @ (2132070 ) │ │ mov r1, r4 │ │ @@ -273640,15 +273640,15 @@ │ │ addeq sp, #16 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ strb r4, [r7, r6] │ │ lsls r0, r4, #1 │ │ - lsrs r1, r6, #2 │ │ + lsrs r6, r3, #3 │ │ cdp2 5, 0, cr5, cr15, cr6, {3} │ │ lsls r0, r4, #1 │ │ bmi.n 2132028 │ │ bmi.n 213202a │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -273696,15 +273696,15 @@ │ │ nop │ │ bvc.n 2132096 │ │ vselvs.f16 s8, s2, s4 │ │ mov r0, r5 │ │ add r1, pc │ │ blx 2704b40 │ │ b.n 2132108 │ │ - b.n 2131938 <_ZNSt6__ndk112basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEEC2INS_17basic_string_viewIcS2_EETnNS_9enable_ifIXaasr33__can_be_converted_to_string_viewIcS2_T_EE5valuentsr17__is_same_uncvrefISA_S5_EE5valueEiE4typeELi0EEERKSA_@@Base+0x42a> │ │ + b.n 2131992 <_ZNSt6__ndk112basic_stringIcNS_11char_traitsIcEENS_9allocatorIcEEEC2INS_17basic_string_viewIcS2_EETnNS_9enable_ifIXaasr33__can_be_converted_to_string_viewIcS2_T_EE5valuentsr17__is_same_uncvrefISA_S5_EE5valueEiE4typeELi0EEERKSA_@@Base+0x484> │ │ cdp2 14, 1, cr10, cr0, cr0, {1} │ │ movs r2, #0 │ │ add.w fp, r6, #16 │ │ movs r3, #0 │ │ mov r0, fp │ │ blx 26fff10 │ │ add.w r0, r6, #32 │ │ @@ -274054,18 +274054,18 @@ │ │ bne.n 2132544 │ │ ldr r1, [pc, #412] @ (21326c4 ) │ │ add r0, sp, #60 @ 0x3c │ │ add r1, pc │ │ blx 2704b50 │ │ b.n 2132658 │ │ nop │ │ - add r1, pc, #764 @ (adr r1, 2132834 ) │ │ - cdp2 4, 0, cr14, cr14, cr11, {0} │ │ - vcmla.f16 d14, d14, d5[0], #0 │ │ - mcr2 7, 0, r6, cr14, cr15, {0} │ │ + add r1, pc, #944 @ (adr r1, 21328e8 ) │ │ + mcr2 4, 0, lr, cr14, cr8, {1} │ │ + vfmal.f16 d14, s28, s5[0] │ │ + cdp2 7, 0, cr6, cr14, cr12, {2} │ │ cdp2 6, 0, cr9, cr15, cr14, {0} │ │ vmov.f64 d16, #20 @ 0x40a00000 5.0 │ │ str r0, [sp, #44] @ 0x2c │ │ add r4, sp, #60 @ 0x3c │ │ ldr r3, [pc, #376] @ (21326c8 ) │ │ movs r1, #3 │ │ mov r0, r4 │ │ @@ -274172,40 +274172,40 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ b.n 2132682 │ │ add r0, sp, #80 @ 0x50 │ │ bl 209589c │ │ blx 26ffaf0 │ │ - str r3, [r5, #56] @ 0x38 │ │ + str r0, [r3, #60] @ 0x3c │ │ cdp2 0, 1, cr0, cr0, cr0, {0} │ │ movs r0, r0 │ │ movs r0, r0 │ │ subs r7, #208 @ 0xd0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ subs r7, #232 @ 0xe8 │ │ ldr r1, [sp, #616] @ 0x268 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ldr r1, [sp, #612] @ 0x264 │ │ subs r7, #185 @ 0xb9 │ │ strb r4, [r3, r4] │ │ lsls r0, r4, #1 │ │ - add r1, sp, #360 @ 0x168 │ │ - cdp2 15, 0, cr15, cr15, cr14, {5} │ │ - mrc2 2, 0, lr, cr0, cr5, {6} │ │ - cdp2 12, 0, cr1, cr14, cr5, {7} │ │ - vselvs.f16 s4, s2, s31 │ │ - cdp2 15, 0, cr13, cr15, cr6, {7} │ │ - mrc2 4, 0, r8, cr0, cr12, {2} │ │ - cdp2 1, 0, cr12, cr15, cr13, {4} │ │ - mcr2 6, 0, r8, cr15, cr8, {6} │ │ - cdp2 1, 0, cr12, cr14, cr8, {5} │ │ - cdp2 0, 0, cr12, cr15, cr5, {7} │ │ + add r1, sp, #540 @ 0x21c │ │ + mcr2 15, 0, pc, cr15, cr11, {6} @ │ │ + cdp2 3, 1, cr14, cr0, cr2, {0} │ │ + mcr2 13, 0, r1, cr14, cr2, {0} │ │ + mrc2 9, 0, r2, cr1, cr12, {2} @ │ │ + mcr2 0, 0, lr, cr15, cr3, {0} │ │ + cdp2 4, 1, cr8, cr0, cr9, {4} │ │ + mcr2 1, 0, ip, cr15, cr10, {5} │ │ + cdp2 7, 0, cr8, cr15, cr5, {0} │ │ + mcr2 1, 0, ip, cr14, cr5, {6} │ │ + mcr2 1, 0, ip, cr15, cr2, {0} │ │ cdp2 15, 1, cr4, cr0, cr0, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d9} │ │ @@ -274339,21 +274339,21 @@ │ │ itt eq │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldr r6, [pc, #800] @ (2132b70 ) │ │ lsls r0, r4, #1 │ │ - b.n 2132146 │ │ - mcr2 10, 0, pc, cr14, cr5, {7} @ │ │ - cdp2 0, 1, cr14, cr0, cr7, {6} │ │ + b.n 21321a0 │ │ + vseleq.f64 d15, d14, d18 │ │ + mrc2 0, 0, lr, cr0, cr4, {7} │ │ mcr2 1, 0, sp, cr15, cr0, {3} │ │ - cdp2 15, 1, cr5, cr1, cr4, {1} │ │ - mrc2 9, 0, r1, cr0, cr0, {0} @ │ │ - cdp2 15, 1, cr11, cr1, cr10, {1} │ │ + mrc2 15, 0, r5, cr1, cr1, {2} │ │ + mrc2 9, 0, r1, cr0, cr13, {1} @ │ │ + mrc2 15, 0, fp, cr1, cr7, {2} │ │ mcr2 13, 0, r4, cr15, cr2, {4} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ vpush {d8} │ │ sub sp, #64 @ 0x40 │ │ @@ -274427,17 +274427,17 @@ │ │ itt eq │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldr r5, [pc, #184] @ (21329f4 ) │ │ lsls r0, r4, #1 │ │ - adds r7, r1, r0 │ │ - @ instruction: 0xfe11596b │ │ - mrc2 3, 0, r4, cr1, cr10, {4} │ │ + adds r4, r7, r0 │ │ + mrc2 9, 0, r5, cr1, cr8, {4} @ │ │ + cdp2 3, 1, cr4, cr1, cr7, {6} │ │ cdp2 12, 0, cr4, cr14, cr8, {5} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ mov r6, r0 │ │ @@ -274535,18 +274535,18 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldr r4, [pc, #376] @ (2132bd0 ) │ │ lsls r0, r4, #1 │ │ stc2l 14, cr15, [r9], #52 @ 0x34 │ │ - pop {r3, r4, r6, pc} │ │ - cdp2 0, 0, cr8, cr15, cr2, {1} │ │ - vseleq.f16 s30, s31, s25 │ │ - cdp2 14, 0, cr7, cr15, cr8, {0} │ │ + pop {r0, r2, r7, pc} │ │ + cdp2 0, 0, cr8, cr15, cr15, {2} │ │ + mcr2 9, 0, pc, cr15, cr9, {6} @ │ │ + mcr2 14, 0, r7, cr15, cr5, {1} │ │ vselvs.f64 d4, d16, d2 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ mov r4, r0 │ │ @@ -274606,17 +274606,17 @@ │ │ addeq sp, #16 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldr r3, [pc, #232] @ (2132bf4 ) │ │ lsls r0, r4, #1 │ │ - ldr r5, [sp, #340] @ 0x154 │ │ + ldr r5, [sp, #520] @ 0x208 │ │ mcr2 14, 0, ip, cr14, cr12, {0} │ │ - mrc2 1, 0, sl, cr1, cr11, {5} │ │ + cdp2 1, 1, cr10, cr1, cr8, {7} │ │ @ instruction: 0xfe0f4ace │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #60] @ (2132b64 ) │ │ @@ -274644,15 +274644,15 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r2, [pc, #592] @ (2132db8 ) │ │ lsls r0, r4, #1 │ │ - ldrt pc, [lr, #15] │ │ + strb.w pc, [fp, #3599] @ 0xe0f │ │ ldr r2, [pc, #432] @ (2132d20 ) │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #92] @ (2132bd8 ) │ │ @@ -274694,16 +274694,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldr r2, [pc, #248] @ (2132cd4 ) │ │ lsls r0, r4, #1 │ │ - asrs r2, r7, #24 │ │ - mrc2 14, 0, r6, cr0, cr5, {7} │ │ + asrs r7, r4, #25 │ │ + cdp2 15, 1, cr6, cr0, cr2, {1} │ │ mrc2 9, 0, r4, cr1, cr10, {7} @ │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d9} │ │ @@ -274953,18 +274953,18 @@ │ │ nop │ │ str r5, [r0, #28] │ │ ldr r7, [pc, #124] @ (2132f60 ) │ │ lsrs r7, r7, #13 │ │ adcs r2, r4 │ │ ldr r1, [pc, #728] @ (21331c4 ) │ │ lsls r0, r4, #1 │ │ - rev16 r3, r5 │ │ + hlt 0x0018 │ │ vcmla.f16 , q0, d3[0], #90 │ │ - @ instruction: 0xfe0dfbee │ │ - mcr2 12, 0, r3, cr14, cr4, {7} │ │ + mcr2 12, 0, pc, cr13, cr11, {0} @ │ │ + vdot.bf16 d3, d14, d1[1] │ │ cdp2 7, 0, cr4, cr15, cr6, {0} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #92] @ (2132f68 ) │ │ @@ -275006,16 +275006,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ mov lr, r5 │ │ lsls r0, r4, #1 │ │ - ldr r0, [sp, #1020] @ 0x3fc │ │ - mcr2 9, 0, fp, cr14, cr8, {7} @ │ │ + ldr r1, [sp, #176] @ 0xb0 │ │ + vseleq.f32 s22, s28, s11 │ │ cdp2 6, 0, cr4, cr14, cr10, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #64 @ 0x40 │ │ mov r4, sp │ │ bfc r4, #0, #4 │ │ @@ -275054,15 +275054,15 @@ │ │ moveq r0, #1 │ │ subeq.w r4, r7, #8 │ │ moveq sp, r4 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ mov r6, r5 │ │ lsls r0, r4, #1 │ │ - asrs r0, r1, #26 │ │ + asrs r5, r6, #26 │ │ mcr2 5, 0, r4, cr14, cr8, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #92] @ (2133050 ) │ │ @@ -275100,15 +275100,15 @@ │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldrh r3, [r7, r7] │ │ ldr r3, [pc, #64] @ (2133090 ) │ │ cmp r8, r9 │ │ lsls r0, r4, #1 │ │ - ldrh r7, [r0, #56] @ 0x38 │ │ + ldrh r4, [r6, #56] @ 0x38 │ │ cdp2 5, 1, cr4, cr1, cr6, {4} │ │ lsls r0, r4, #1 │ │ bmi.n 2133008 │ │ bmi.n 213300a │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ @@ -275159,16 +275159,16 @@ │ │ nop │ │ str r5, [r0, #28] │ │ ldr r7, [pc, #124] @ (2133158 ) │ │ lsrs r7, r7, #13 │ │ adcs r2, r4 │ │ cmp r6, r9 │ │ lsls r0, r4, #1 │ │ - @ instruction: 0xb62e │ │ - cdp2 12, 1, cr3, cr0, cr4, {2} │ │ + @ instruction: 0xb65b │ │ + mrc2 12, 0, r3, cr0, cr1, {3} │ │ mcr2 4, 0, r4, cr14, cr10, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #80] @ (213314c ) │ │ @@ -275202,15 +275202,15 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ add r8, r8 │ │ lsls r0, r4, #1 │ │ - @ instruction: 0xb6a2 │ │ + @ instruction: 0xb6cf │ │ cdp2 4, 0, cr4, cr15, cr6, {4} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #156] @ (2133200 ) │ │ @@ -275273,15 +275273,15 @@ │ │ subs r6, #242 @ 0xf2 │ │ strb r5, [r4, #13] │ │ subs r0, #45 @ 0x2d │ │ stmia r1!, {r1, r4, r6} │ │ ands r0, r0 │ │ add r6, sl │ │ lsls r0, r4, #1 │ │ - bvs.n 2133172 │ │ + bvs.n 21331cc │ │ mcr2 11, 0, sl, cr15, cr4, {4} @ │ │ cdp2 3, 1, cr4, cr1, cr2, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #48 @ 0x30 │ │ mov r4, sp │ │ @@ -275337,16 +275337,16 @@ │ │ subeq.w r4, r7, #8 │ │ moveq sp, r4 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ bics r6, r2 │ │ lsls r0, r4, #1 │ │ - bl 223aed0 │ │ - strb r3, [r6, #29] │ │ + bl 2267ed0 │ │ + strb r0, [r4, #30] │ │ cdp2 3, 0, cr4, cr15, cr14, {1} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #48 @ 0x30 │ │ mov r4, sp │ │ bfc r4, #0, #4 │ │ @@ -275404,16 +275404,16 @@ │ │ subeq.w r4, r7, #8 │ │ moveq sp, r4 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ cmn r6, r5 │ │ lsls r0, r4, #1 │ │ - bl 21b3f80 │ │ - adds r4, r7, r7 │ │ + bl 21e0f80 const&, Eigen::Quaternion const&)@@Base+0x1f0> │ │ + subs r1, r5, r0 │ │ mcr2 2, 0, r4, cr15, cr14, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #120] @ (21333ec ) │ │ @@ -275466,17 +275466,17 @@ │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ negs r6, r0 │ │ lsls r0, r4, #1 │ │ - str r0, [sp, #468] @ 0x1d4 │ │ - mrc2 15, 0, lr, cr0, cr6, {5} │ │ - cdp2 1, 1, cr13, cr0, cr9, {4} │ │ + str r0, [sp, #648] @ 0x288 │ │ + cdp2 15, 1, cr14, cr0, cr3, {7} │ │ + mrc2 1, 0, sp, cr0, cr6, {5} │ │ cdp2 1, 1, cr4, cr0, cr6, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #120] @ (2133484 ) │ │ @@ -275529,17 +275529,17 @@ │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ sbcs r6, r5 │ │ lsls r0, r4, #1 │ │ - ldrh r5, [r3, #62] @ 0x3e │ │ - vcmla.f16 , q0, d3[0], #90 │ │ - mcr2 2, 0, r1, cr15, cr9, {0} │ │ + str r0, [sp, #40] @ 0x28 │ │ + vfmsl.f16 , d0, d0[2] │ │ + cdp2 2, 0, cr1, cr15, cr6, {2} │ │ cdp2 1, 0, cr4, cr14, cr14, {2} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #92] @ (2133500 ) │ │ @@ -275581,16 +275581,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ asrs r6, r2 │ │ lsls r0, r4, #1 │ │ - ldr r7, [r7, r2] │ │ - mcr2 2, 0, fp, cr14, cr12, {7} │ │ + ldr r4, [r5, r3] │ │ + cdp2 3, 0, cr11, cr14, cr9, {1} │ │ mcr2 0, 0, r4, cr15, cr2, {6} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #92] @ (2133578 ) │ │ @@ -275632,16 +275632,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ lsls r6, r3 │ │ lsls r0, r4, #1 │ │ - lsrs r3, r7, #18 │ │ - cdp2 6, 1, cr13, cr0, cr0, {3} │ │ + lsrs r0, r5, #19 │ │ + cdp2 6, 1, cr13, cr0, cr13, {4} │ │ mcr2 0, 0, r4, cr14, cr10, {2} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #92] @ (21335f0 ) │ │ @@ -275683,16 +275683,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ands r6, r4 │ │ lsls r0, r4, #1 │ │ - strb r5, [r1, #27] │ │ - mcr2 15, 0, ip, cr14, cr4, {4} │ │ + strb r2, [r7, #27] │ │ + cdp2 15, 0, cr12, cr14, cr1, {6} │ │ cdp2 15, 1, cr3, cr0, cr2, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #92] @ (2133668 ) │ │ @@ -275734,16 +275734,16 @@ │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ subs r7, #174 @ 0xae │ │ lsls r0, r4, #1 │ │ - lsrs r2, r7, #15 │ │ - cdp2 6, 1, cr3, cr0, cr7, {6} │ │ + lsrs r7, r4, #16 │ │ + mrc2 6, 0, r3, cr0, cr4, {7} │ │ cdp2 15, 0, cr3, cr14, cr10, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r5, r0 │ │ ldr r0, [pc, #108] @ (21336f0 ) │ │ @@ -275791,16 +275791,16 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ subs r7, #56 @ 0x38 │ │ lsls r0, r4, #1 │ │ - lsrs r4, r5, #14 │ │ - mrc2 12, 0, lr, cr0, cr0, {5} │ │ + lsrs r1, r3, #15 │ │ + mrc2 12, 0, lr, cr0, cr13, {6} │ │ cdp2 14, 1, cr3, cr0, cr0, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #76] @ (2133758 ) │ │ @@ -275835,15 +275835,15 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ subs r6, #174 @ 0xae │ │ lsls r0, r4, #1 │ │ - ldrh r2, [r2, #40] @ 0x28 │ │ + ldrh r7, [r7, #40] @ 0x28 │ │ mrc2 14, 0, r3, cr0, cr8, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #76] @ (21337bc ) │ │ @@ -275877,15 +275877,15 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ subs r6, #76 @ 0x4c │ │ lsls r0, r4, #1 │ │ - lsrs r5, r1, #28 │ │ + lsrs r2, r7, #28 │ │ mcr2 14, 0, r3, cr14, cr6, {0} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #144] @ (2133864 ) │ │ @@ -275943,15 +275943,15 @@ │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ mov r0, sp │ │ bl 209589c │ │ blx 26ffaf0 │ │ subs r5, #232 @ 0xe8 │ │ lsls r0, r4, #1 │ │ - ldrh r7, [r7, #34] @ 0x22 │ │ + ldrh r4, [r5, #36] @ 0x24 │ │ mrc2 13, 0, r3, cr0, cr6, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #24 │ │ mov r4, r0 │ │ @@ -276055,18 +276055,18 @@ │ │ mov r0, r5 │ │ blx 2701060 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ subs r5, #58 @ 0x3a │ │ lsls r0, r4, #1 │ │ - lsrs r7, r2, #7 │ │ + lsrs r4, r0, #8 │ │ mrc2 0, 0, r4, cr0, cr2, {1} │ │ lsls r0, r4, #1 │ │ - add r6, sp, #824 @ 0x338 │ │ + add r6, sp, #1004 @ 0x3ec │ │ mcr2 12, 0, r3, cr15, cr0, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #72] @ (21339ec ) │ │ @@ -276099,15 +276099,15 @@ │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ subs r4, #24 │ │ lsls r0, r4, #1 │ │ - add r7, sp, #764 @ 0x2fc │ │ + add r7, sp, #944 @ 0x3b0 │ │ @ instruction: 0xfe0e3be6 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #56 @ 0x38 │ │ mov r4, r0 │ │ ldr r0, [pc, #76] @ (2133a50 ) │ │ @@ -276142,15 +276142,15 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #56 @ 0x38 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ subs r3, #182 @ 0xb6 │ │ lsls r0, r4, #1 │ │ - adds r1, #92 @ 0x5c │ │ + adds r1, #137 @ 0x89 │ │ vseleq.f64 d3, d31, d0 │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #76] @ (2133ab4 ) │ │ @@ -276185,15 +276185,15 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ subs r3, #84 @ 0x54 │ │ lsls r0, r4, #1 │ │ - ldr r2, [r5, #120] @ 0x78 │ │ + ldr r7, [r2, #124] @ 0x7c │ │ mcr2 11, 0, r3, cr15, cr12, {0} @ │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #24 │ │ mov r4, r0 │ │ @@ -276277,15 +276277,15 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #12] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ subs r2, #236 @ 0xec │ │ lsls r0, r4, #1 │ │ - cdp 14, 5, cr15, cr2, cr14, {0} │ │ + cdp 14, 7, cr15, cr15, cr14, {0} │ │ subs r2, #78 @ 0x4e │ │ lsls r0, r4, #1 │ │ bmi.n 2133b58 │ │ bmi.n 2133b5a │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -276378,18 +276378,18 @@ │ │ subs r7, #185 @ 0xb9 │ │ ldmia r4!, {r0, r2, r3, r6, r7} │ │ ldmia r4!, {r2, r3, r6, r7} │ │ ldmia r4!, {r2, r3, r6, r7} │ │ subs r7, #236 @ 0xec │ │ subs r1, #250 @ 0xfa │ │ lsls r0, r4, #1 │ │ - ldr r3, [r2, #72] @ 0x48 │ │ - cdp2 12, 1, cr6, cr0, cr12, {5} │ │ + ldr r0, [r0, #76] @ 0x4c │ │ + mrc2 12, 0, r6, cr0, cr9, {6} │ │ cdp2 13, 1, cr9, cr0, cr4, {4} │ │ - mrc2 12, 0, ip, cr1, cr14, {1} │ │ + cdp2 12, 1, cr12, cr1, cr11, {3} │ │ @ instruction: 0xfe0f3944 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #84] @ (2133d18 ) │ │ @@ -276427,15 +276427,15 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ subs r0, #246 @ 0xf6 │ │ lsls r0, r4, #1 │ │ - strh r3, [r7, #60] @ 0x3c │ │ + strh r0, [r5, #62] @ 0x3e │ │ vfmsl.f16 d3, s1, s1[1] │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #84] @ (2133d84 ) │ │ @@ -276473,15 +276473,15 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ subs r0, #138 @ 0x8a │ │ lsls r0, r4, #1 │ │ - ldr r2, [r3, #116] @ 0x74 │ │ + ldr r7, [r0, #120] @ 0x78 │ │ vcmla.f16 , q7, d12[0], #0 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #84] @ (2133df0 ) │ │ @@ -276519,15 +276519,15 @@ │ │ ittt eq │ │ moveq r0, #0 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ subs r0, #30 │ │ lsls r0, r4, #1 │ │ - movs r4, #121 @ 0x79 │ │ + movs r4, #166 @ 0xa6 │ │ cdp2 7, 1, cr3, cr0, cr0, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ mov r4, r0 │ │ @@ -276641,15 +276641,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ adds r7, #172 @ 0xac │ │ lsls r0, r4, #1 │ │ - b.n 2133a7a │ │ + b.n 2133ad4 │ │ mcr2 6, 0, r3, cr15, cr14, {5} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #92 @ 0x5c │ │ mov r4, r0 │ │ @@ -276874,22 +276874,22 @@ │ │ itt ne │ │ ldrne r0, [sp, #64] @ 0x40 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ adds r6, #116 @ 0x74 │ │ lsls r0, r4, #1 │ │ - @ instruction: 0xea09fe0e │ │ - b.n 2134702 │ │ + @ instruction: 0xea36fe0e │ │ + b.n 213475c │ │ mcr2 9, 0, fp, cr15, cr7, {4} @ │ │ - cdp2 3, 1, cr8, cr1, cr10, {7} │ │ + mrc2 4, 0, r8, cr1, cr7, {0} │ │ cdp2 5, 1, cr3, cr0, cr12, {4} │ │ lsls r0, r4, #1 │ │ - add r4, pc, #664 @ (adr r4, 2134444 , 3, 3>::run >(Eigen::QuaternionBase >&, Eigen::Matrix const&)@@Base+0x17c>) │ │ - mcr2 4, 0, sl, cr14, cr14, {3} │ │ + add r4, pc, #844 @ (adr r4, 21344f8 const&)@@Base+0xc>) │ │ + cdp2 4, 0, cr10, cr14, cr11, {5} │ │ mcr2 4, 0, r3, cr14, cr12, {2} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ mov r4, r0 │ │ @@ -276945,15 +276945,15 @@ │ │ addeq sp, #16 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ adds r3, #248 @ 0xf8 │ │ lsls r0, r4, #1 │ │ - lsls r0, r0 │ │ + lsls r5, r5 │ │ mrc2 3, 0, r3, cr1, cr2, {4} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #96] @ (21342bc ) │ │ @@ -276997,15 +276997,15 @@ │ │ itt eq │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ adds r3, #96 @ 0x60 │ │ lsls r0, r4, #1 │ │ - lsrs r7, r2, #9 │ │ + lsrs r4, r0, #10 │ │ mcr2 3, 0, r3, cr15, cr4, {0} │ │ lsls r0, r4, #1 │ │ │ │ 021342c8 , 3, 3>::run >(Eigen::QuaternionBase >&, Eigen::Matrix const&)@@Base>: │ │ vldr s4, [r1, #16] │ │ vldr s0, [r1, #32] │ │ vldr s2, [r1] │ │ @@ -277300,45 +277300,45 @@ │ │ cmp r1, r0 │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ adds r0, #90 @ 0x5a │ │ lsls r0, r4, #1 │ │ - strb r0, [r2, #17] │ │ + strb r5, [r7, #17] │ │ mrc2 0, 0, r0, cr1, cr7, {5} │ │ movs r0, r0 │ │ - subs r7, #183 @ 0xb7 │ │ + subs r7, #228 @ 0xe4 │ │ mrc2 0, 0, r0, cr0, cr13, {5} │ │ movs r0, r0 │ │ - cmp r7, lr │ │ + cmp ip, r4 │ │ cdp2 1, 0, cr0, cr15, cr11, {5} │ │ movs r0, r0 │ │ - bgt.n 21346ee │ │ + bgt.n 2134548 const&)@@Base+0x5c> │ │ cdp2 2, 1, cr0, cr0, cr9, {4} │ │ movs r0, r0 │ │ - add sp, fp │ │ + cmp r2, r1 │ │ mcr2 3, 0, r0, cr15, cr7, {6} │ │ movs r0, r0 │ │ - asrs r5, r1, #31 │ │ + asrs r2, r7, #31 │ │ cdp2 4, 1, cr0, cr1, cr1, {7} │ │ movs r0, r0 │ │ - strh r4, [r7, #50] @ 0x32 │ │ + strh r1, [r5, #52] @ 0x34 │ │ cdp2 6, 0, cr0, cr15, cr11, {2} │ │ movs r0, r0 │ │ cmp r7, #214 @ 0xd6 │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r1, [pc, #8] @ (2134648 ) │ │ add r1, pc │ │ blx 2704b40 │ │ movs r0, #1 │ │ pop {r7, pc} │ │ - ldrb r6, [r1, #27] │ │ + ldrb r3, [r7, #27] │ │ mrc2 5, 0, fp, cr0, cr0, {6} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [pc, #220] @ (2134734 ) │ │ mov r1, r4 │ │ add r0, pc │ │ @@ -277425,17 +277425,17 @@ │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ mov r0, sp │ │ bl 2134dd4 │ │ blx 26ffaf0 │ │ cmp r7, #100 @ 0x64 │ │ lsls r0, r4, #1 │ │ - pld [r2, #15] │ │ - lsls r1, r0, #28 │ │ - cdp2 6, 0, cr0, cr15, cr1, {4} │ │ + pldw [pc, #-3599] @ 213392d │ │ + lsls r6, r5, #28 │ │ + cdp2 6, 0, cr0, cr15, cr14, {5} │ │ cdp2 14, 0, cr2, cr15, cr6, {5} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #48 @ 0x30 │ │ mov r4, r0 │ │ ldr r0, [pc, #204] @ (2134820 ) │ │ @@ -277518,16 +277518,16 @@ │ │ add r0, sp, #32 │ │ bl 2134dd4 │ │ blx 26ffaf0 │ │ nop │ │ cmp r6, #104 @ 0x68 │ │ lsls r0, r4, #1 │ │ sxth r7, r1 │ │ - cdp2 7, 1, cr15, cr1, cr10, {0} │ │ - mcr2 5, 0, r0, cr15, cr9, {7} │ │ + mrc2 7, 0, pc, cr1, cr7, {1} │ │ + cdp2 6, 0, cr0, cr15, cr6, {1} │ │ mcr2 13, 0, r2, cr15, cr12, {5} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #48 @ 0x30 │ │ mov r4, r0 │ │ ldr r0, [pc, #316] @ (213497c ) │ │ @@ -277652,17 +277652,17 @@ │ │ add r0, sp, #24 │ │ bl 2134e80 * CelxLua::safeGetClass >(int, FatalErrors, char const*)@@Base+0x70> │ │ add r0, sp, #32 │ │ bl 2134dd4 │ │ blx 26ffaf0 │ │ cmp r5, #124 @ 0x7c │ │ lsls r0, r4, #1 │ │ - str r3, [r7, #68] @ 0x44 │ │ - mcr2 6, 0, pc, cr14, cr14, {0} @ │ │ - cdp2 5, 0, cr0, cr15, cr13, {0} │ │ + str r0, [r5, #72] @ 0x48 │ │ + cdp2 6, 0, cr15, cr14, cr11, {2} │ │ + mcr2 5, 0, r0, cr15, cr10, {1} │ │ cdp2 12, 0, cr2, cr15, cr12, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ mov r4, r0 │ │ ldr r0, [pc, #244] @ (2134a90 ) │ │ @@ -277760,17 +277760,17 @@ │ │ b.n 2134a84 │ │ add r0, sp, #20 │ │ bl 2134dd4 │ │ blx 26ffaf0 │ │ nop │ │ cmp r4, #32 │ │ lsls r0, r4, #1 │ │ - strb r4, [r1, #22] │ │ - cdp2 4, 1, cr15, cr1, cr2, {6} │ │ - mcr2 3, 0, r0, cr15, cr1, {5} │ │ + strb r1, [r7, #22] │ │ + cdp2 4, 1, cr15, cr1, cr15, {7} │ │ + mcr2 3, 0, r0, cr15, cr14, {6} │ │ mcr2 11, 0, r2, cr15, cr4, {2} @ │ │ lsls r0, r4, #1 │ │ bmi.n 2134a50 │ │ bmi.n 2134a52 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8-d10} │ │ @@ -277897,18 +277897,18 @@ │ │ nop │ │ ldr r0, [r5, #116] @ 0x74 │ │ ldrh r1, [r7, #0] │ │ ldrsh r7, [r4, r6] │ │ subs r6, #124 @ 0x7c │ │ cmp r3, #4 │ │ lsls r0, r4, #1 │ │ - asrs r2, r0, #13 │ │ - cdp2 3, 1, cr15, cr1, cr6, {5} │ │ - mcr2 2, 0, r0, cr15, cr5, {4} │ │ - mcr2 5, 0, pc, cr15, cr0, {6} @ │ │ + asrs r7, r5, #13 │ │ + mrc2 3, 0, pc, cr1, cr3, {6} │ │ + cdp2 2, 0, cr0, cr15, cr2, {6} │ │ + mcr2 5, 0, pc, cr15, cr13, {7} @ │ │ @ instruction: 0xfe1029e6 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #136 @ 0x88 │ │ mov r4, sp │ │ @@ -278048,18 +278048,18 @@ │ │ blx 26ffae0 │ │ b.n 2134db2 │ │ add r0, sp, #20 │ │ bl 2134dd4 │ │ blx 26ffaf0 │ │ cmp r1, #132 @ 0x84 │ │ lsls r0, r4, #1 │ │ - cbnz r3, 2134dd6 │ │ - cdp2 2, 1, cr15, cr0, cr6, {1} │ │ - mcr2 1, 0, r0, cr15, cr5, {0} │ │ - cdp2 0, 0, cr2, cr15, cr8, {5} │ │ + cbnz r0, 2134de2 │ │ + mrc2 2, 0, pc, cr0, cr3, {2} │ │ + cdp2 1, 0, cr0, cr15, cr2, {2} │ │ + mcr2 0, 0, r2, cr15, cr5, {6} │ │ vcmla.f16 d2, d14, d10[1], #0 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r4, [r0, #4] │ │ cbz r4, 2134e0c │ │ adds r1, r4, #4 │ │ @@ -278334,60 +278334,60 @@ │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ movs r6, #66 @ 0x42 │ │ lsls r0, r4, #1 │ │ - ldr r0, [r7, #32] │ │ + ldr r5, [r4, #36] @ 0x24 │ │ cdp2 1, 1, cr0, cr1, cr7, {1} │ │ movs r0, r0 │ │ add r2, sp, #0 │ │ mrc2 1, 0, r0, cr1, cr1, {1} │ │ movs r0, r0 │ │ - str r7, [sp, #184] @ 0xb8 │ │ + str r7, [sp, #364] @ 0x16c │ │ mrc2 2, 0, r0, cr0, cr15, {3} │ │ movs r0, r0 │ │ - ldr r3, [pc, #140] @ (2135104 ) │ │ + ldr r3, [pc, #320] @ (21351b8 ) │ │ mrc2 3, 0, r0, cr1, cr13, {4} │ │ movs r0, r0 │ │ - asrs r2, r2, #10 │ │ + asrs r7, r7, #10 │ │ mrc2 5, 0, r0, cr0, cr7, {5} │ │ movs r0, r0 │ │ - ldr r3, [pc, #84] @ (21350dc ) │ │ + ldr r3, [pc, #264] @ (2135190 ) │ │ mrc2 6, 0, r0, cr1, cr5, {7} │ │ movs r0, r0 │ │ - ldr r1, [sp, #740] @ 0x2e4 │ │ + ldr r1, [sp, #920] @ 0x398 │ │ vfmal.f16 d0, s29, s7[1] │ │ movs r0, r0 │ │ - ldr r1, [pc, #492] @ (2135284 ) │ │ + ldr r1, [pc, #672] @ (2135338 ) │ │ vselvs.f32 s0, s3, s19 │ │ movs r0, r0 │ │ - subs r5, #159 @ 0x9f │ │ + subs r5, #204 @ 0xcc │ │ cdp2 12, 0, cr0, cr14, cr3, {0} │ │ movs r0, r0 │ │ - bls.n 2134fba │ │ + bls.n 2135014 │ │ vdot.bf16 d0, d30, d9[0] │ │ movs r0, r0 │ │ - push {r1, r2, r5, r7, lr} │ │ + push {r0, r1, r4, r6, r7, lr} │ │ cdp2 14, 1, cr0, cr0, cr3, {0} │ │ movs r0, r0 │ │ - bcc.n 2134fc8 │ │ + bcc.n 2135022 │ │ mrc2 14, 0, r0, cr0, cr13, {3} │ │ movs r0, r0 │ │ movs r5, #120 @ 0x78 │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r1, [pc, #8] @ (21350d0 ) │ │ add r1, pc │ │ blx 2704b40 │ │ movs r0, #1 │ │ pop {r7, pc} │ │ - ldrb r6, [r6, r0] │ │ + ldrb r3, [r4, r1] │ │ mcr2 4, 0, sp, cr14, cr4, {6} │ │ bmi.n 2135082 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #76 @ 0x4c │ │ mov r4, r0 │ │ @@ -278502,17 +278502,17 @@ │ │ nop │ │ str r5, [r0, #28] │ │ ldr r7, [pc, #124] @ (2135298 ) │ │ lsrs r7, r7, #13 │ │ adcs r2, r4 │ │ movs r4, #212 @ 0xd4 │ │ lsls r0, r4, #1 │ │ - strb r0, [r3, #16] │ │ - mrc2 10, 0, r5, cr0, cr10, {2} @ │ │ - vseleq.f64 d1, d30, d8 │ │ + strb r5, [r0, #17] │ │ + vselvs.f32 s10, s1, s14 │ │ + mcr2 11, 0, r1, cr14, cr5, {5} @ │ │ cdp2 3, 0, cr2, cr14, cr0, {6} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #84 @ 0x54 │ │ mov r5, r0 │ │ @@ -278611,17 +278611,17 @@ │ │ ittt eq │ │ addeq sp, #84 @ 0x54 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ movs r3, #120 @ 0x78 │ │ lsls r0, r4, #1 │ │ - cbz r3, 21353ac │ │ - vfmsl.f16 , d16, d6[3] │ │ - mcr2 3, 0, pc, cr14, cr8, {4} @ │ │ + cbz r0, 21353b8 │ │ + vselvs.f16 s10, s0, s23 │ │ + cdp2 3, 0, cr15, cr14, cr5, {6} │ │ cdp2 2, 0, cr2, cr13, cr10, {4} │ │ lsls r0, r4, #1 │ │ bmi.n 2135308 │ │ bmi.n 213530a │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -278794,16 +278794,16 @@ │ │ nop │ │ str r5, [r0, #28] │ │ ldr r7, [pc, #124] @ (21355e8 ) │ │ lsrs r7, r7, #13 │ │ adcs r2, r4 │ │ movs r2, #68 @ 0x44 │ │ lsls r0, r4, #1 │ │ - push {r1, lr} │ │ - cdp2 7, 0, cr5, cr15, cr10, {6} │ │ + push {r0, r1, r2, r3, r5, lr} │ │ + mcr2 7, 0, r5, cr15, cr7, {7} │ │ mcr2 4, 0, sl, cr14, cr7, {3} │ │ vfmsl.f16 d8, s2, s10[0] │ │ mrc2 0, 0, r2, cr1, cr4, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -278915,17 +278915,17 @@ │ │ addeq sp, #4 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ movs r0, #30 │ │ lsls r0, r4, #1 │ │ - adds r1, #3 │ │ - mrc2 4, 0, r5, cr0, cr2, {7} │ │ - cdp2 14, 0, cr6, cr14, cr13, {5} │ │ + adds r1, #48 @ 0x30 │ │ + mrc2 5, 0, r5, cr0, cr15, {0} │ │ + mcr2 14, 0, r6, cr14, cr10, {6} │ │ mrc2 15, 0, r1, cr0, cr10, {0} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d11} │ │ @@ -279082,16 +279082,16 @@ │ │ itt eq │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ subs r2, r2, #3 │ │ lsls r0, r4, #1 │ │ - ldmia r5, {r0, r1, r2, r4, r5} │ │ - vcmla.f16 d14, d31, d11[1], #0 │ │ + ldmia r5, {r2, r5, r6} │ │ + vfmal.f16 q7, d31, d0[1] │ │ cdp2 13, 1, cr1, cr0, cr6, {2} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d11} │ │ @@ -279263,16 +279263,16 @@ │ │ addeq sp, #4 │ │ itt eq │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ adds r6, r7, #3 │ │ lsls r0, r4, #1 │ │ - str r0, [r1, r0] │ │ - cdp2 13, 1, cr6, cr0, cr0, {7} │ │ + str r5, [r6, r0] │ │ + cdp2 14, 1, cr6, cr0, cr13, {0} │ │ @ instruction: 0xfe0e1b48 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ mov sl, r0 │ │ @@ -279403,18 +279403,18 @@ │ │ itt ne │ │ ldrne r0, [sp, #12] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ subs r0, r1, r4 │ │ lsls r0, r4, #1 │ │ - movs r7, #186 @ 0xba │ │ - cdp2 0, 1, cr5, cr1, cr14, {4} │ │ + movs r7, #231 @ 0xe7 │ │ + mrc2 0, 0, r5, cr1, cr11, {5} │ │ mcr2 11, 0, ip, cr14, cr1, {6} @ │ │ - cdp2 15, 0, cr2, cr13, cr2, {4} │ │ + cdp2 15, 0, cr2, cr13, cr15, {5} │ │ mcr2 9, 0, r1, cr15, cr6, {7} @ │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #48 @ 0x30 │ │ mov r4, r0 │ │ @@ -279557,16 +279557,16 @@ │ │ cmp r5, #0 │ │ itt ne │ │ ldrne r0, [sp, #36] @ 0x24 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ adds r0, r4, r6 │ │ lsls r0, r4, #1 │ │ - movs r6, #82 @ 0x52 │ │ - cdp2 15, 1, cr4, cr1, cr6, {1} │ │ + movs r6, #127 @ 0x7f │ │ + mrc2 15, 0, r4, cr1, cr3, {2} │ │ @ instruction: 0xfe0eca69 │ │ mcr2 10, 0, ip, cr13, cr14, {1} @ │ │ @ instruction: 0xfe0dc9cd │ │ vcmla.f16 d1, d29, d2[1], #0 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ @@ -279617,16 +279617,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ adds r0, r2, r0 │ │ lsls r0, r4, #1 │ │ - b.n 21364fc │ │ - mrc2 13, 0, r4, cr0, cr10, {4} │ │ + b.n 2136556 │ │ + cdp2 13, 1, cr4, cr0, cr7, {6} │ │ mcr2 7, 0, r1, cr14, cr10, {5} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #108] @ (2135ea0 ) │ │ @@ -279673,16 +279673,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ asrs r0, r1, #30 │ │ lsls r0, r4, #1 │ │ - ldr r6, [pc, #764] @ (21361a4 ) │ │ - mcr2 13, 0, r4, cr14, cr2, {0} │ │ + ldr r6, [pc, #944] @ (2136258 ) │ │ + mcr2 13, 0, r4, cr14, cr15, {1} │ │ mcr2 7, 0, r1, cr14, cr2, {1} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #108] @ (2135f28 ) │ │ @@ -279729,16 +279729,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ asrs r0, r0, #28 │ │ lsls r0, r4, #1 │ │ - ldmia r2!, {r4, r6, r7} │ │ - cdp2 12, 0, cr4, cr14, cr10, {4} │ │ + ldmia r2, {r0, r2, r3, r4, r5, r6, r7} │ │ + mcr2 12, 0, r4, cr14, cr7, {5} │ │ cdp2 6, 0, cr1, cr14, cr10, {5} │ │ lsls r0, r4, #1 │ │ │ │ 02135f38 , 3, 3>::run >(Eigen::QuaternionBase >&, Eigen::Matrix const&)@@Base>: │ │ vldr d18, [r1, #32] │ │ vldr d16, [r1, #64] @ 0x40 │ │ vldr d17, [r1] │ │ @@ -280013,42 +280013,42 @@ │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ asrs r6, r7, #16 │ │ lsls r0, r4, #1 │ │ - ldmia r0!, {r1, r4, r5} │ │ + ldmia r0, {r0, r1, r2, r3, r4, r6} │ │ mcr2 0, 0, r0, cr14, cr11, {7} │ │ movs r0, r0 │ │ - lsrs r7, r0, #16 │ │ + lsrs r4, r6, #16 │ │ mcr2 1, 0, r0, cr14, cr5, {3} │ │ movs r0, r0 │ │ - add r4, pc, #264 @ (adr r4, 2136360 ) │ │ + add r4, pc, #444 @ (adr r4, 2136414 ) │ │ mrc2 1, 0, r0, cr0, cr3, {7} │ │ movs r0, r0 │ │ - cmp r1, #125 @ 0x7d │ │ + cmp r1, #170 @ 0xaa │ │ cdp2 3, 0, cr0, cr15, cr1, {1} │ │ movs r0, r0 │ │ - add r2, sp, #132 @ 0x84 │ │ + add r2, sp, #312 @ 0x138 │ │ mcr2 4, 0, r0, cr14, cr3, {1} │ │ movs r0, r0 │ │ - ldrsb r6, [r5, r7] │ │ + ldr r3, [r3, r0] │ │ cdp2 6, 1, cr0, cr1, cr5, {1} │ │ movs r0, r0 │ │ - subs r1, #3 │ │ + subs r1, #48 @ 0x30 │ │ mrc2 6, 0, r0, cr1, cr15, {2} │ │ movs r0, r0 │ │ - stmia r1!, {r0, r6, r7} │ │ + stmia r1!, {r1, r2, r3, r5, r6, r7} │ │ cdp2 7, 1, cr0, cr0, cr5, {1} │ │ movs r0, r0 │ │ - adds r7, #105 @ 0x69 │ │ + adds r7, #150 @ 0x96 │ │ mrc2 9, 0, r0, cr1, cr11, {1} @ │ │ movs r0, r0 │ │ - cmp r3, #141 @ 0x8d │ │ + cmp r3, #186 @ 0xba │ │ mcr2 10, 0, r0, cr14, cr13, {4} @ │ │ movs r0, r0 │ │ asrs r0, r2, #14 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ @@ -280096,16 +280096,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ asrs r0, r3, #12 │ │ lsls r0, r4, #1 │ │ - b.n 2135b86 │ │ - @ instruction: 0xfe0d2acc │ │ + b.n 2135be0 │ │ + mcr2 10, 0, r2, cr13, cr9, {7} @ │ │ cdp2 2, 0, cr1, cr14, cr2, {6} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ mov r4, r0 │ │ ldr r0, [pc, #112] @ (213639c ) │ │ @@ -280153,16 +280153,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #40 @ 0x28 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ asrs r0, r2, #10 │ │ lsls r0, r4, #1 │ │ - str r5, [r6, #32] │ │ - @ instruction: 0xfe102a44 │ │ + str r2, [r4, #36] @ 0x24 │ │ + mrc2 10, 0, r2, cr0, cr1, {3} @ │ │ mcr2 2, 0, r1, cr14, cr6, {1} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ mov r4, r0 │ │ ldr r0, [pc, #284] @ (21364d4 ) │ │ @@ -280257,17 +280257,17 @@ │ │ itt eq │ │ addeq sp, #40 @ 0x28 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ asrs r4, r0, #8 │ │ lsls r0, r4, #1 │ │ - ble.n 21363f4 │ │ - mrc2 9, 0, r2, cr0, cr8, {5} @ │ │ - cdp2 4, 0, cr4, cr14, cr8, {2} │ │ + ble.n 213644e │ │ + @ instruction: 0xfe1029e5 │ │ + mcr2 4, 0, r4, cr14, cr5, {3} │ │ mrc2 0, 0, r1, cr0, cr12, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8-d10} │ │ sub sp, #40 @ 0x28 │ │ mov r4, r0 │ │ @@ -280356,18 +280356,18 @@ │ │ moveq r0, #0 │ │ addeq sp, #40 @ 0x28 │ │ vpopeq {d8-d10} │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ asrs r4, r0, #3 │ │ lsls r0, r4, #1 │ │ - movs r1, #215 @ 0xd7 │ │ - vfmsl.f16 q1, d0, d0[3] │ │ - mcr2 7, 0, r6, cr14, cr6, {0} │ │ - vcmla.f16 q7, , d9[0], #0 │ │ + movs r2, #4 │ │ + vcmla.f16 d2, d16, d5[1], #90 │ │ + cdp2 7, 0, cr6, cr14, cr3, {2} │ │ + vfmal.f16 q7, d15, d6[2] │ │ cdp2 15, 0, cr0, cr14, cr8, {7} │ │ lsls r0, r4, #1 │ │ bmi.n 21365b0 │ │ bmi.n 21365b2 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -280526,18 +280526,18 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ @ instruction: 0xfffeffff │ │ vqrdmlsh.s , , d31[0] │ │ lsrs r6, r3, #30 │ │ lsls r0, r4, #1 │ │ - add r2, pc, #568 @ (adr r2, 2136a30 ) │ │ - mcr2 7, 0, r2, cr15, cr2, {2} │ │ - mcr2 6, 0, pc, cr14, cr12, {7} @ │ │ - cdp2 3, 1, cr8, cr0, cr3, {1} │ │ + add r2, pc, #748 @ (adr r2, 2136ae4 ) │ │ + mcr2 7, 0, r2, cr15, cr15, {3} │ │ + cdp2 7, 0, cr15, cr14, cr9, {1} │ │ + mrc2 3, 0, r8, cr0, cr0, {2} │ │ mcr2 13, 0, r0, cr14, cr4, {7} │ │ lsls r0, r4, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #48] @ (2136844 ) │ │ @@ -280561,15 +280561,15 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ lsrs r0, r5, #22 │ │ lsls r0, r4, #1 │ │ - asr.w lr, r2, pc @ │ │ + ror.w lr, pc, pc │ │ lsrs r4, r1, #22 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8-d15} │ │ sub sp, #16 │ │ mov r4, r0 │ │ @@ -280640,16 +280640,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ vpopeq {d8-d15} │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ lsrs r4, r3, #21 │ │ lsls r0, r4, #1 │ │ - subs r2, r4, #2 │ │ - mrc2 14, 0, r7, cr0, cr3, {1} │ │ + subs r7, r1, #3 │ │ + cdp2 14, 1, cr7, cr0, cr0, {3} │ │ cdp2 12, 1, cr0, cr0, cr0, {6} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ vpush {d8-d15} │ │ sub sp, #32 │ │ @@ -280830,16 +280830,16 @@ │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ lsrs r2, r0, #18 │ │ lsls r0, r4, #1 │ │ - ble.n 2136ad2 │ │ - mcr2 10, 0, r9, cr13, cr2, {7} @ │ │ + ble.n 2136b2c │ │ + mcr2 11, 0, r9, cr13, cr15, {0} @ │ │ vselvs.f32 s0, s1, s9 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ mov r9, r0 │ │ @@ -280970,18 +280970,18 @@ │ │ cmp r5, #0 │ │ itt ne │ │ ldrne r0, [sp, #12] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ lsrs r4, r4, #9 │ │ lsls r0, r4, #1 │ │ - str r2, [r4, #24] │ │ - mcr2 2, 0, r2, cr15, cr4, {0} │ │ - mcr2 9, 0, r5, cr14, cr5, {7} @ │ │ - mrc2 14, 0, r1, cr0, cr8, {6} │ │ + str r7, [r1, #28] │ │ + cdp2 2, 0, cr2, cr15, cr1, {2} │ │ + vseleq.f32 s10, s28, s5 │ │ + cdp2 15, 1, cr1, cr0, cr5, {0} │ │ @ instruction: 0xfe0f0948 │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ vpush {d8-d11} │ │ sub sp, #32 │ │ @@ -281123,19 +281123,19 @@ │ │ itt ne │ │ ldrne r0, [sp, #16] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ lsrs r0, r6, #3 │ │ lsls r0, r4, #1 │ │ - str r6, [r5, #0] │ │ - cdp2 0, 0, cr2, cr15, cr0, {5} │ │ - vcmla.f16 d5, d30, d1[0], #0 │ │ - mrc2 0, 0, r2, cr0, cr7, {2} │ │ - mcr2 7, 0, r5, cr14, cr1, {6} │ │ + str r3, [r3, #4] │ │ + cdp2 0, 0, cr2, cr15, cr13, {6} │ │ + vcmla.f16 d5, d30, d14[1], #0 │ │ + cdp2 0, 1, cr2, cr0, cr4, {4} │ │ + mcr2 7, 0, r5, cr14, cr14, {7} │ │ cdp2 7, 1, cr0, cr0, cr6, {6} │ │ lsls r0, r4, #1 │ │ │ │ 02136e64 const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -281316,60 +281316,60 @@ │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ lsls r6, r1, #26 │ │ lsls r0, r4, #1 │ │ - ldr r2, [pc, #528] @ (2137224 ) │ │ + ldr r2, [pc, #708] @ (21372d8 ) │ │ cdp2 1, 1, cr0, cr1, cr7, {1} │ │ movs r0, r0 │ │ - cmp r3, #153 @ 0x99 │ │ + cmp r3, #198 @ 0xc6 │ │ cdp2 1, 1, cr0, cr1, cr13, {1} │ │ movs r0, r0 │ │ - ldrb r5, [r7, #8] │ │ + ldrb r2, [r5, #9] │ │ mcr2 2, 0, r0, cr14, cr7, {5} │ │ movs r0, r0 │ │ - push {r0, r3, r6} │ │ + push {r1, r2, r4, r5, r6} │ │ cdp2 3, 1, cr0, cr0, cr1, {2} │ │ movs r0, r0 │ │ - strb r7, [r1, #30] │ │ + strb r4, [r7, #30] │ │ cdp2 5, 1, cr0, cr0, cr11, {1} │ │ movs r0, r0 │ │ - cmp r1, #227 @ 0xe3 │ │ + cmp r2, #16 │ │ mrc2 5, 0, r0, cr1, cr9, {6} │ │ movs r0, r0 │ │ - subs r7, r0, #0 │ │ + subs r4, r6, #0 │ │ mcr2 7, 0, r0, cr14, cr3, {1} │ │ movs r0, r0 │ │ - cbnz r1, 2137088 │ │ + rev r6, r3 │ │ vcmla.f16 d0, d30, d1[0], #0 │ │ movs r0, r0 │ │ - str r6, [sp, #56] @ 0x38 │ │ + str r6, [sp, #236] @ 0xec │ │ vfmsl.f16 q0, d16, d3[3] │ │ movs r0, r0 │ │ - cbz r0, 21370d8 │ │ + push {r0, r2, r3, r4} │ │ mrc2 9, 0, r0, cr0, cr5, {3} @ │ │ movs r0, r0 │ │ - udf #3 │ │ + udf #48 @ 0x30 │ │ @ instruction: 0xfe0e09ef │ │ movs r0, r0 │ │ - subs r1, #76 @ 0x4c │ │ + subs r1, #121 @ 0x79 │ │ vselvs.f32 s0, s1, s11 │ │ movs r0, r0 │ │ lsls r4, r0, #23 │ │ lsls r0, r4, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r1, [pc, #8] @ (2137084 ) │ │ add r1, pc │ │ blx 2704b40 │ │ movs r0, #1 │ │ pop {r7, pc} │ │ - ldrsb r2, [r5, r7] │ │ + ldr r7, [r2, r0] │ │ mcr2 5, 0, fp, cr14, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d11} │ │ sub sp, #136 @ 0x88 │ │ mov r1, r0 │ │ @@ -281505,16 +281505,16 @@ │ │ itt eq │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ lsls r6, r3, #20 │ │ lsls r0, r4, #1 │ │ - cbz r3, 2137278 │ │ - vfmal.f16 , d15, d1[2] │ │ + cbz r0, 2137284 │ │ + vfmal.f16 d3, s31, s12[1] │ │ cdp2 3, 0, cr0, cr15, cr14, {6} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ mov r1, r0 │ │ ldr r0, [pc, #124] @ (21372a8 ) │ │ @@ -281566,16 +281566,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #40 @ 0x28 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ lsls r0, r2, #14 │ │ lsls r0, r4, #1 │ │ - subs r0, #42 @ 0x2a │ │ - mcr2 4, 0, r7, cr15, cr1, {5} │ │ + subs r0, #87 @ 0x57 │ │ + mcr2 4, 0, r7, cr15, cr14, {6} │ │ cdp2 3, 1, cr0, cr0, cr10, {1} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ vpush {d8} │ │ sub sp, #64 @ 0x40 │ │ @@ -281743,16 +281743,16 @@ │ │ vpopeq {d8} │ │ itt eq │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ lsls r6, r4, #11 │ │ lsls r0, r4, #1 │ │ - bmi.n 2137502 │ │ - mcr2 3, 0, r5, cr13, cr9, {7} │ │ + bmi.n 213755c │ │ + cdp2 4, 0, cr5, cr13, cr6, {1} │ │ mcr2 1, 0, r0, cr14, cr14, {1} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ mov r1, r0 │ │ ldr r0, [pc, #160] @ (213755c ) │ │ @@ -281815,16 +281815,16 @@ │ │ moveq r0, #1 │ │ addeq sp, #40 @ 0x28 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ lsls r0, r0, #4 │ │ lsls r0, r4, #1 │ │ - bcs.n 21375f2 │ │ - mcr2 3, 0, r5, cr13, cr1, {1} │ │ + bcs.n 213764c │ │ + mcr2 3, 0, r5, cr13, cr14, {2} │ │ mcr2 0, 0, r0, cr14, cr6, {3} │ │ lsls r0, r4, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #28 │ │ mov r9, r0 │ │ @@ -281953,18 +281953,18 @@ │ │ cmp r5, #0 │ │ itt ne │ │ ldrne r0, [sp, #12] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ lsls r0, r0, #1 │ │ lsls r0, r4, #1 │ │ - strht pc, [r2, #13] │ │ - adds r1, r5, r0 │ │ - mcr2 15, 0, r4, cr14, cr0, {7} │ │ - mrc2 4, 0, r1, cr0, cr6, {5} │ │ + strt pc, [pc, #-3597] @ 21368b7 │ │ + adds r6, r2, r1 │ │ + mcr2 0, 0, r5, cr14, cr13, {0} │ │ + cdp2 4, 1, cr1, cr0, cr3, {7} │ │ cdp2 15, 0, cr15, cr15, cr12, {1} │ │ lsls r7, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #32 │ │ mov r4, r0 │ │ @@ -282086,19 +282086,19 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #16] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ mrc2 0, 6, r0, cr8, cr15, {2} │ │ - bl 1ff2436 │ │ - asrs r1, r0, #27 │ │ - cdp2 14, 0, cr4, cr14, cr8, {4} │ │ - cdp2 4, 1, cr15, cr0, cr6, {1} │ │ - mcr2 13, 0, r4, cr14, cr14, {7} │ │ + bl 201f436 │ │ + asrs r6, r5, #27 │ │ + mcr2 14, 0, r4, cr14, cr5, {5} │ │ + mrc2 4, 0, pc, cr0, cr3, {2} │ │ + cdp2 14, 0, cr4, cr14, cr11, {1} │ │ mrc2 13, 0, pc, cr0, cr10, {6} │ │ lsls r7, r3, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #108] @ (21378a8 ) │ │ @@ -282143,16 +282143,16 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ stc2 0, cr0, [r0, #380] @ 0x17c │ │ - asrs r2, r5, #22 │ │ - cdp2 5, 0, cr1, cr14, cr13, {3} │ │ + asrs r7, r2, #23 │ │ + mcr2 5, 0, r1, cr14, cr10, {4} │ │ vdot.bf16 d15, d14, d10[1] │ │ lsls r7, r3, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #108] @ (2137930 ) │ │ @@ -282197,16 +282197,16 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldc2l 0, cr0, [r8], #380 @ 0x17c │ │ - asrs r4, r6, #9 │ │ - cdp2 4, 0, cr1, cr15, cr5, {7} │ │ + asrs r1, r4, #10 │ │ + mcr2 5, 0, r1, cr15, cr2, {0} │ │ cdp2 12, 0, cr15, cr14, cr2, {5} │ │ lsls r7, r3, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #108] @ (21379b8 ) │ │ @@ -282251,16 +282251,16 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldc2l 0, cr0, [r0], #-380 @ 0xfffffe84 │ │ - mov r0, r1 │ │ - mrc2 4, 0, r1, cr1, cr13, {2} │ │ + mov r5, r6 │ │ + cdp2 4, 1, cr1, cr1, cr10, {4} │ │ mcr2 12, 0, pc, cr14, cr10, {0} @ │ │ lsls r7, r3, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ mov r5, r0 │ │ ldr r0, [pc, #168] @ (2137a7c ) │ │ @@ -282322,16 +282322,16 @@ │ │ cmp r1, r0 │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #40 @ 0x28 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ @ instruction: 0xfbe8005f │ │ - ldmia r0, {r0, r1, r4, r5, r7} │ │ - mcr2 3, 0, r1, cr15, cr3, {6} │ │ + ldmia r0!, {r5, r6, r7} │ │ + cdp2 4, 0, cr1, cr15, cr0, {0} │ │ mcr2 11, 0, pc, cr14, cr4, {2} @ │ │ lsls r7, r3, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #124] @ (2137b14 ) │ │ @@ -282380,16 +282380,16 @@ │ │ ittt eq │ │ moveq r0, #1 │ │ addeq sp, #16 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ @ instruction: 0xfb24005f │ │ - ldr r3, [pc, #180] @ (2137bd0 ) │ │ - mrc2 3, 0, r1, cr0, cr1, {0} │ │ + ldr r3, [pc, #360] @ (2137c84 ) │ │ + mrc2 3, 0, r1, cr0, cr14, {1} │ │ mcr2 10, 0, pc, cr14, cr14, {5} @ │ │ lsls r7, r3, #1 │ │ │ │ 02137b24 : │ │ ldr r1, [pc, #4] @ (2137b2c ) │ │ add r1, pc │ │ str r0, [r1, #0] │ │ @@ -283502,19 +283502,19 @@ │ │ lsls r2, r4, #1 │ │ asrs r6, r2, #17 │ │ cdp2 6, 1, cr1, cr2, cr2, {5} │ │ mrc2 6, 0, r1, cr2, cr14, {3} │ │ cdp2 6, 1, cr1, cr2, cr14, {3} │ │ cdp2 3, 1, cr15, cr2, cr14, {2} │ │ lsls r7, r3, #1 │ │ - subs r1, #202 @ 0xca │ │ - mrc2 3, 0, r8, cr1, cr10, {0} │ │ - mcr2 1, 0, ip, cr15, cr12, {2} │ │ - mcr2 4, 0, r1, cr13, cr7, {3} │ │ - cdp2 4, 1, cr1, cr1, cr15, {3} │ │ + subs r1, #247 @ 0xf7 │ │ + cdp2 3, 1, cr8, cr1, cr7, {2} │ │ + cdp2 1, 0, cr12, cr15, cr9, {4} │ │ + cdp2 4, 0, cr1, cr13, cr4, {5} │ │ + mrc2 4, 0, r1, cr1, cr12, {4} │ │ vfmsl.f16 , d1, d0[2] │ │ lsls r2, r4, #1 │ │ ldr r0, [r6, r1] │ │ lsls r2, r4, #1 │ │ stmia r5!, {r2, r3, r5, r7} │ │ lsls r0, r4, #1 │ │ stmia r7!, {r1, r2, r5, r7} │ │ @@ -284018,16 +284018,16 @@ │ │ ldrb.w r0, [sp, #16] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ orn r0, r8, pc, lsr #1 │ │ - adds r7, #158 @ 0x9e │ │ - cdp2 7, 0, cr5, cr14, cr1, {7} │ │ + adds r7, #203 @ 0xcb │ │ + vcmla.f16 d5, d14, d14[0], #0 │ │ mcr2 9, 0, lr, cr14, cr10, {3} @ │ │ lsls r7, r3, #1 │ │ │ │ 02138ca8 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -284246,16 +284246,16 @@ │ │ str r4, [r4, r2] │ │ vfmsl.f16 q7, d17, d4[3] │ │ lsls r7, r3, #1 │ │ b.n 2138e60 │ │ lsls r7, r3, #1 │ │ b.n 2138d88 │ │ lsls r7, r3, #1 │ │ - bl 1eceb12 │ │ - bmi.n 2138e76 │ │ + bl 1efbb12 │ │ + bmi.n 2138ed0 │ │ Address 0x2138ef6 is out of bounds. │ │ │ │ │ │ 02138ef8 : │ │ mov r2, r1 │ │ ldrd r1, r0, [r0, #4] │ │ b.w 26fefd4 │ │ @@ -284679,15 +284679,15 @@ │ │ cmp r0, #0 │ │ beq.n 2139326 │ │ b.n 21393e0 │ │ nop │ │ ldrh r0, [r0, #24] │ │ mrc2 6, 0, lr, cr1, cr12, {1} │ │ lsls r7, r3, #1 │ │ - str r0, [sp, #88] @ 0x58 │ │ + str r0, [sp, #268] @ 0x10c │ │ cdp2 1, 0, cr15, cr15, cr6, {6} │ │ b.n 2138dc2 │ │ ldr r1, [r0, #8] │ │ cmp r1, #4 │ │ blt.n 2139376 │ │ ldr r1, [pc, #472] @ (2139528 ) │ │ add r1, pc │ │ @@ -284862,23 +284862,23 @@ │ │ blx 26ffaf0 │ │ ldr r1, [sp, #616] @ 0x268 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ldr r1, [sp, #612] @ 0x264 │ │ subs r7, #185 @ 0xb9 │ │ b.n 2139194 │ │ lsls r7, r3, #1 │ │ - ldr r2, [r7, r0] │ │ + ldr r7, [r4, r1] │ │ mcr2 3, 0, lr, cr14, cr14, {1} │ │ lsls r7, r3, #1 │ │ - lsrs r3, r2, #3 │ │ - vcmla.f16 q0, , d1[0], #90 │ │ - vselvs.f16 s30, s2, s4 │ │ - mcr2 7, 0, r1, cr14, cr4, {1} │ │ - cdp2 7, 0, cr1, cr15, cr2, {1} │ │ - mcr2 14, 0, ip, cr15, cr11, {7} │ │ + lsrs r0, r0, #4 │ │ + vcmla.f16 q0, , d14[1], #90 │ │ + vselvs.f16 s30, s2, s31 │ │ + cdp2 7, 0, cr1, cr14, cr1, {3} │ │ + cdp2 7, 0, cr1, cr15, cr15, {2} │ │ + cdp2 15, 0, cr12, cr15, cr8, {1} │ │ mcr2 6, 0, lr, cr15, cr10, {0} │ │ lsls r7, r3, #1 │ │ b.n 21397fc │ │ lsls r7, r3, #1 │ │ │ │ 0213953c : │ │ b.w 26fe8e4 │ │ @@ -285092,15 +285092,15 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ b.n 2139768 │ │ lsls r7, r3, #1 │ │ - strh r5, [r0, r6] │ │ + strh r2, [r6, r6] │ │ mcr2 14, 0, sp, cr14, cr10, {5} │ │ lsls r7, r3, #1 │ │ │ │ 02139768 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -285234,15 +285234,15 @@ │ │ beq.n 21398c8 │ │ ldr r0, [sp, #4] │ │ ldr r0, [r0, #8] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ udf #68 @ 0x44 │ │ lsls r7, r3, #1 │ │ - add r3, sp, #160 @ 0xa0 │ │ + add r3, sp, #340 @ 0x154 │ │ vdot.bf16 , , d12[0] │ │ lsls r7, r3, #1 │ │ │ │ 021398d8 , std::__ndk1::allocator >::__count_unique(std::__ndk1::__fs::filesystem::path const&) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -285530,15 +285530,15 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ bge.n 2139b24 │ │ lsls r7, r3, #1 │ │ mvns r2, r4 │ │ lsls r2, r4, #1 │ │ - movs r4, #169 @ 0xa9 │ │ + movs r4, #214 @ 0xd6 │ │ vselvs.f32 s26, s0, s13 │ │ lsls r7, r3, #1 │ │ │ │ 02139bc0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -285614,15 +285614,15 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ bls.n 2139c54 │ │ lsls r7, r3, #1 │ │ orrs r2, r2 │ │ lsls r2, r4, #1 │ │ - movs r3, #217 @ 0xd9 │ │ + movs r4, #6 │ │ mrc2 9, 0, sp, cr0, cr6, {2} @ │ │ lsls r7, r3, #1 │ │ │ │ 02139c90 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -285700,15 +285700,15 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ bls.n 2139d88 │ │ lsls r7, r3, #1 │ │ negs r2, r0 │ │ lsls r2, r4, #1 │ │ - movs r3, #9 │ │ + movs r3, #54 @ 0x36 │ │ vcmla.f16 d13, d16, d2[0], #90 │ │ lsls r7, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ ldrd lr, ip, [r7, #8] │ │ movs r6, #0 │ │ @@ -287789,16 +287789,16 @@ │ │ blx 26ffad0 │ │ add r0, sp, #52 @ 0x34 │ │ bl 213b34c │ │ blx 26ffaf0 │ │ nop │ │ ldmia r0!, {r2, r3, r4, r5, r6, r7} │ │ lsls r7, r3, #1 │ │ - asrs r4, r4, #24 │ │ - cdp2 6, 0, cr1, cr14, cr2, {0} │ │ + asrs r1, r2, #25 │ │ + cdp2 6, 0, cr1, cr14, cr15, {1} │ │ mcr2 2, 0, ip, cr14, cr4, {6} │ │ lsls r7, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r5, [r0, #0] │ │ mov r4, r0 │ │ @@ -288836,15 +288836,15 @@ │ │ bvc.n 213bed0 >::__assign_with_size[abi:ne180000](unsigned int*, unsigned int*, int)@@Base+0x4> │ │ subs r4, #35 @ 0x23 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (213bec8 > const&) const@@Base+0x140>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - subs r7, #203 @ 0xcb │ │ + subs r7, #248 @ 0xf8 │ │ Address 0x213beca is out of bounds. │ │ │ │ │ │ 0213becc >::__assign_with_size[abi:ne180000](unsigned int*, unsigned int*, int)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -288919,21 +288919,21 @@ │ │ bl 213bf8c >::__assign_with_size[abi:ne180000](unsigned int*, unsigned int*, int)@@Base+0xc0> │ │ bmi.n 213bf36 >::__assign_with_size[abi:ne180000](unsigned int*, unsigned int*, int)@@Base+0x6a> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (213bf98 >::__assign_with_size[abi:ne180000](unsigned int*, unsigned int*, int)@@Base+0xcc>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - subs r6, #251 @ 0xfb │ │ + subs r7, #40 @ 0x28 │ │ cdp2 5, 1, cr11, cr0, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (213bfa8 >::__assign_with_size[abi:ne180000](unsigned int*, unsigned int*, int)@@Base+0xdc>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - subs r6, #235 @ 0xeb │ │ + subs r7, #24 │ │ Address 0x213bfaa is out of bounds. │ │ │ │ │ │ 0213bfac >::__push_back_slow_path(cmod::PrimitiveGroup&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -292312,31 +292312,31 @@ │ │ b.n 213e3e8 │ │ add r0, sp, #20 │ │ bl 213d614 │ │ blx 26ffaf0 │ │ nop │ │ str r4, [sp, #192] @ 0xc0 │ │ lsls r7, r3, #1 │ │ - ldrh r4, [r2, #4] │ │ - vfmal.f16 q4, d14, d2[2] │ │ + ldrh r1, [r0, #6] │ │ + vfmal.f16 d8, s29, s14[1] │ │ cdp2 2, 0, cr9, cr14, cr0, {0} │ │ lsls r7, r3, #1 │ │ │ │ 0213e404 : │ │ bx lr │ │ │ │ 0213e406 : │ │ b.w 26fe8e4 │ │ bmi.n 213e3b6 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (213e418 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - subs r3, r7, r1 │ │ + subs r0, r5, r2 │ │ Address 0x213e41a is out of bounds. │ │ │ │ │ │ 0213e41c >::__push_back_slow_path(cmod::Mesh&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -292561,15 +292561,15 @@ │ │ mov r0, r4 │ │ pop {r4, r5, r7, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (213e6c4 >::__push_back_slow_path(cmod::Mesh&&)@@Base+0x2a8>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - asrs r7, r1, #31 │ │ + asrs r4, r7, #31 │ │ mrc2 5, 0, fp, cr0, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ str r3, [sp, #32] │ │ mov r6, r0 │ │ ldr r0, [r7, #8] │ │ @@ -295878,28 +295878,28 @@ │ │ ldr r1, [r0, #4] │ │ mov r0, r5 │ │ blx r1 │ │ blx 26ffaf0 │ │ nop │ │ ldr r6, [r4, #72] @ 0x48 │ │ lsls r7, r3, #1 │ │ - ble.n 2140adc >&, std::__ndk1::function)@@Base+0x1d8> │ │ - cdp2 3, 0, cr12, cr15, cr15, {6} │ │ + udf #35 @ 0x23 │ │ + mcr2 3, 0, ip, cr15, cr12, {7} │ │ cdp2 14, 0, cr0, cr14, cr4, {3} │ │ lsls r6, r3, #1 │ │ lsrs r4, r3, #23 │ │ lsls r6, r3, #1 │ │ - add r3, pc, #824 @ (adr r3, 2140e38 >&, std::__ndk1::function)@@Base+0x2d4>) │ │ + add r3, pc, #1004 @ (adr r3, 2140eec >&, std::__ndk1::function)@@Base+0x388>) │ │ mcr2 14, 0, r0, cr13, cr10, {1} │ │ lsls r6, r3, #1 │ │ lsrs r2, r1, #24 │ │ lsls r6, r3, #1 │ │ - cdp2 14, 9, cr15, cr9, cr14, {0} │ │ - cdp2 14, 7, cr15, cr9, cr14, {0} │ │ - str r1, [sp, #556] @ 0x22c │ │ + cdp2 14, 12, cr15, cr6, cr14, {0} │ │ + cdp2 14, 10, cr15, cr6, cr14, {0} │ │ + str r1, [sp, #736] @ 0x2e0 │ │ mrc2 11, 0, r6, cr0, cr6, {0} @ │ │ lsls r7, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r5, [r0, #0] │ │ mov r4, r0 │ │ @@ -296360,29 +296360,29 @@ │ │ strb r0, [r2, #2] │ │ ldr r0, [sp, #48] @ 0x30 │ │ strh r1, [r2, #0] │ │ strb.w sl, [sp, #72] @ 0x48 │ │ strd r6, r0, [sp, #76] @ 0x4c │ │ ldr r6, [sp, #36] @ 0x24 │ │ b.n 214109e >&, std::__ndk1::function)@@Base+0x53a> │ │ - ldc2 14, cr15, [r9], #56 @ 0x38 │ │ + stc2l 14, cr15, [r6], #56 @ 0x38 │ │ lsrs r2, r7, #13 │ │ lsls r6, r3, #1 │ │ - asrs r7, r5, #30 │ │ - mcr2 14, 0, r7, cr15, cr8, {6} │ │ - cdp2 12, 0, cr9, cr14, cr0, {4} │ │ - mcr2 12, 0, sp, cr15, cr15, {0} │ │ - vseleq.f16 s26, s26, s27 │ │ - mcr2 14, 0, r9, cr15, cr5, {7} │ │ + asrs r4, r3, #31 │ │ + cdp2 15, 0, cr7, cr15, cr5, {0} │ │ + cdp2 12, 0, cr9, cr14, cr13, {5} │ │ + cdp2 12, 0, cr13, cr15, cr12, {2} │ │ + mcr2 9, 0, sp, cr13, cr10, {2} @ │ │ + cdp2 15, 0, cr9, cr15, cr2, {1} │ │ mcr2 15, 0, ip, cr13, cr8, {1} │ │ - mrc2 7, 0, fp, cr0, cr2, {3} │ │ - cdp2 2, 0, cr3, cr15, cr11, {7} │ │ - mrc2 12, 0, r7, cr0, cr14, {7} │ │ - cdp2 6, 0, cr15, cr14, cr1, {5} │ │ - cdp2 1, 0, cr3, cr15, cr12, {7} │ │ + mrc2 7, 0, fp, cr0, cr15, {4} │ │ + mcr2 3, 0, r3, cr15, cr8, {0} │ │ + cdp2 13, 1, cr7, cr0, cr11, {1} │ │ + cdp2 6, 0, cr15, cr14, cr14, {6} │ │ + mcr2 2, 0, r3, cr15, cr9, {0} │ │ vfmsl.f16 , d16, d1[1] │ │ str r0, [sp, #128] @ 0x80 │ │ ldr r0, [pc, #696] @ (21412e8 >&, std::__ndk1::function)@@Base+0x784>) │ │ add r0, pc │ │ movs r1, #18 │ │ blx 26ffde0 │ │ mov r4, r0 │ │ @@ -296653,39 +296653,39 @@ │ │ ldr r1, [pc, #104] @ (2141344 >&, std::__ndk1::function)@@Base+0x7e0>) │ │ movs r2, #4 │ │ add r1, pc │ │ b.n 2141350 >&, std::__ndk1::function)@@Base+0x7ec> │ │ ldr r1, [pc, #100] @ (2141348 >&, std::__ndk1::function)@@Base+0x7e4>) │ │ add r1, pc │ │ b.n 2141350 >&, std::__ndk1::function)@@Base+0x7ec> │ │ - bl 1f51f0a │ │ - adds r1, r1, r6 │ │ - cdp2 1, 0, cr3, cr14, cr14, {0} │ │ - cdp2 5, 1, cr15, cr0, cr0, {4} │ │ - mcr2 5, 0, pc, cr15, cr5, {2} @ │ │ - vcmla.f16 , , d5[1], #0 │ │ - mcr2 0, 0, r3, cr14, cr6, {4} │ │ - mrc2 1, 0, r9, cr0, cr1, {4} │ │ - cdp2 2, 0, cr1, cr15, cr1, {7} │ │ - cdp2 5, 0, cr3, cr15, cr4, {5} │ │ - cdp2 6, 0, cr13, cr13, cr12, {2} │ │ - mcr2 3, 0, pc, cr14, cr10, {7} @ │ │ - mcr2 7, 0, r1, cr15, cr1, {4} │ │ - cdp2 6, 0, cr15, cr14, cr12, {5} │ │ - @ instruction: 0xfe0ebacc │ │ - mcr2 3, 0, pc, cr14, cr10, {6} @ │ │ - mcr2 10, 0, r9, cr15, cr7, {6} @ │ │ - vfmal.f16 d9, s26, s12[0] │ │ - cdp2 3, 0, cr15, cr14, cr14, {6} │ │ - mcr2 11, 0, r3, cr15, cr8, {2} @ │ │ + bl 1f7ef0a │ │ + adds r6, r6, r6 │ │ + mcr2 1, 0, r3, cr14, cr11, {1} │ │ + cdp2 5, 1, cr15, cr0, cr13, {5} │ │ + cdp2 5, 0, cr15, cr15, cr2, {4} │ │ + mcr2 9, 0, r1, cr15, cr2, {0} @ │ │ + cdp2 0, 0, cr3, cr14, cr3, {6} │ │ + mrc2 1, 0, r9, cr0, cr14, {5} │ │ + cdp2 3, 0, cr1, cr15, cr14, {0} │ │ + mcr2 5, 0, r3, cr15, cr1, {6} │ │ + mcr2 6, 0, sp, cr13, cr9, {3} │ │ + cdp2 4, 0, cr15, cr14, cr7, {1} │ │ + mcr2 7, 0, r1, cr15, cr14, {5} │ │ + mcr2 6, 0, pc, cr14, cr9, {6} @ │ │ + mcr2 10, 0, fp, cr14, cr9, {7} @ │ │ + cdp2 4, 0, cr15, cr14, cr7, {0} │ │ + vseleq.f64 d9, d15, d4 │ │ + vcmla.f16 , , d3[0], #0 │ │ + mcr2 3, 0, pc, cr14, cr11, {7} @ │ │ + vseleq.f64 d3, d31, d5 │ │ cdp2 7, 0, cr14, cr14, cr2, {3} │ │ - mrc2 7, 0, r1, cr0, cr11, {1} │ │ - cdp2 12, 0, cr10, cr14, cr4, {6} │ │ - vselvs.f32 s18, s1, s18 │ │ - cdp2 5, 0, cr13, cr13, cr12, {3} │ │ + cdp2 7, 1, cr1, cr0, cr8, {3} │ │ + mcr2 12, 0, sl, cr14, cr1, {7} │ │ + mrc2 10, 0, r9, cr0, cr6, {5} @ │ │ + mcr2 5, 0, sp, cr13, cr9, {4} │ │ @ instruction: 0xfe0e49c3 │ │ add r1, pc │ │ blx 2706190 │ │ ldr.w r0, [r9, #32] │ │ ldr r1, [r0, #0] │ │ ldr.w r1, [r1, #-12] │ │ add r1, r0 │ │ @@ -296980,19 +296980,19 @@ │ │ subs r2, r2, r1 │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ add.w r2, r3, r2, asr #2 │ │ cmp r4, r2 │ │ bne.n 2141670 >&, std::__ndk1::function)@@Base+0xb0c> │ │ movs r2, #10 │ │ b.n 2141672 >&, std::__ndk1::function)@@Base+0xb0e> │ │ - bl 1f1b27c │ │ - asrs r3, r2, #26 │ │ - cdp2 15, 0, cr8, cr14, cr7, {2} │ │ + bl 1f4827c │ │ + asrs r0, r0, #27 │ │ + mcr2 15, 0, r8, cr14, cr4, {3} │ │ cdp2 3, 0, cr1, cr15, cr5, {3} │ │ - vseleq.f32 s10, s26, s10 │ │ + mcr2 10, 0, r5, cr13, cr2, {1} @ │ │ cdp2 2, 0, cr2, cr13, cr0, {1} │ │ adds r3, r1, r5 │ │ ldr r1, [pc, #368] @ (21417e8 >&, std::__ndk1::function)@@Base+0xc84>) │ │ strb.w r2, [sp, #72] @ 0x48 │ │ add r2, sp, #72 @ 0x48 │ │ add r1, pc │ │ str r2, [sp, #0] │ │ @@ -297093,35 +297093,35 @@ │ │ cmp.w r8, #0 │ │ beq.n 214177a >&, std::__ndk1::function)@@Base+0xc16> │ │ ldr r0, [sp, #48] @ 0x30 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ ldr r6, [r2, #20] │ │ lsls r7, r3, #1 │ │ - str r4, [sp, #540] @ 0x21c │ │ - mcr2 0, 0, r1, cr13, cr8, {3} │ │ - mcr2 2, 0, r7, cr14, cr5, {5} │ │ - mcr2 10, 0, sl, cr15, cr10, {7} @ │ │ - mrc2 11, 0, sl, cr0, cr0, {1} @ │ │ - mrc2 13, 0, r8, cr0, cr15, {6} │ │ - mcr2 13, 0, r8, cr15, cr1, {5} │ │ - cdp2 12, 0, cr8, cr15, cr11, {1} │ │ - vfmal.f16 , d15, d4[3] │ │ - vcmla.f16 d5, d30, d6[0], #0 │ │ - cdp2 3, 0, cr15, cr13, cr2, {4} │ │ - mcr2 14, 0, r0, cr14, cr12, {6} │ │ - mcr2 6, 0, r7, cr15, cr6, {0} │ │ - cdp2 4, 0, cr10, cr14, cr15, {0} │ │ - mrc2 12, 0, r4, cr0, cr4, {7} │ │ - cdp2 0, 0, cr11, cr15, cr5, {2} │ │ - cdp2 4, 0, cr13, cr15, cr10, {2} │ │ - cdp2 14, 0, cr0, cr13, cr11, {4} │ │ - mcr2 1, 0, r7, cr15, cr12, {7} │ │ + str r4, [sp, #720] @ 0x2d0 │ │ + cdp2 0, 0, cr1, cr13, cr5, {5} │ │ + cdp2 2, 0, cr7, cr14, cr2, {7} │ │ + vseleq.f64 d10, d15, d23 │ │ + mrc2 11, 0, sl, cr0, cr13, {2} @ │ │ + cdp2 14, 1, cr8, cr0, cr12, {0} │ │ + mcr2 13, 0, r8, cr15, cr14, {6} │ │ + mcr2 12, 0, r8, cr15, cr8, {2} │ │ + vcmla.f16 d3, d31, d9[1], #0 │ │ + vfmal.f16 d5, s29, s7[0] │ │ + cdp2 3, 0, cr15, cr13, cr15, {5} │ │ + cdp2 15, 0, cr0, cr14, cr9, {0} │ │ + cdp2 6, 0, cr7, cr15, cr3, {2} │ │ + mcr2 4, 0, sl, cr14, cr12, {1} │ │ + cdp2 13, 1, cr4, cr0, cr1, {1} │ │ + mcr2 0, 0, fp, cr15, cr2, {3} │ │ + mcr2 4, 0, sp, cr15, cr7, {3} │ │ + mcr2 14, 0, r0, cr13, cr8, {5} │ │ + cdp2 2, 0, cr7, cr15, cr9, {1} │ │ mcr2 3, 0, lr, cr14, cr6, {0} │ │ - mrc2 11, 0, r8, cr0, cr7, {6} @ │ │ + cdp2 12, 1, cr8, cr0, cr4, {0} │ │ vseleq.f16 s12, s30, s29 │ │ lsls r7, r3, #1 │ │ │ │ 021417f8 >&, std::__ndk1::function)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -297544,15 +297544,15 @@ │ │ vldr d16, [sp, #48] @ 0x30 │ │ ldr r0, [sp, #56] @ 0x38 │ │ str r0, [sp, #40] @ 0x28 │ │ vstr d16, [sp, #32] │ │ b.n 2141c9a >&, std::__ndk1::function)@@Base+0x4a2> │ │ movs r5, #0 │ │ b.n 2141bea >&, std::__ndk1::function)@@Base+0x3f2> │ │ - str r4, [sp, #320] @ 0x140 │ │ + str r4, [sp, #500] @ 0x1f4 │ │ mcr2 9, 0, lr, cr13, cr13, {6} @ │ │ movs r1, #13 │ │ mov r0, r8 │ │ bl 207d350 │ │ ldrb.w r0, [sp, #32] │ │ lsls r1, r0, #31 │ │ ittt ne │ │ @@ -298453,32 +298453,32 @@ │ │ it eq │ │ vstreq s21, [sp, #284] @ 0x11c │ │ b.n 21426aa >&, std::__ndk1::function)@@Base+0xeb2> │ │ movs r5, #1 │ │ b.n 214265a >&, std::__ndk1::function)@@Base+0xe62> │ │ movs r0, r0 │ │ movs r0, r0 │ │ - ldrh r5, [r0, #18] │ │ - vseleq.f32 s16, s26, s14 │ │ - vfmal.f16 q2, d13, d2[1] │ │ - cdp2 7, 0, cr7, cr14, cr9, {3} │ │ - vfmsl.f16 , d16, d4[3] │ │ - mrc2 13, 0, r1, cr0, cr15, {2} │ │ - vselvs.f16 s12, s0, s6 │ │ + ldrh r2, [r6, #18] │ │ + mcr2 10, 0, r8, cr13, cr4, {1} @ │ │ + vcmla.f16 d4, d29, d7[0], #0 │ │ + mcr2 7, 0, r7, cr14, cr6, {4} │ │ + vselvs.f16 s2, s0, s19 │ │ + cdp2 13, 1, cr1, cr0, cr12, {4} │ │ + mrc2 9, 0, r6, cr0, cr0, {1} @ │ │ mcr2 2, 0, r0, cr13, cr2, {6} │ │ - vseleq.f16 s8, s27, s2 │ │ - mcr2 13, 0, pc, cr13, cr8, {5} @ │ │ - vfmal.f16 d6, s30, s14[1] │ │ - cdp2 15, 0, cr15, cr13, cr6, {1} │ │ - cdp2 15, 0, cr15, cr14, cr6, {0} │ │ - mcr2 2, 0, ip, cr14, cr0, {5} │ │ - mcr2 4, 0, r8, cr14, cr10, {7} │ │ - mcr2 0, 0, lr, cr14, cr15, {2} │ │ - vcmla.f16 d2, d15, d15[0], #0 │ │ - mcr2 7, 0, r4, cr14, cr15, {6} │ │ + vseleq.f16 s8, s27, s29 │ │ + vdot.bf16 , , d5[1] │ │ + vcmla.f16 q3, , d12[0], #0 │ │ + mcr2 15, 0, pc, cr13, cr3, {2} @ │ │ + mcr2 15, 0, pc, cr14, cr3, {1} @ │ │ + mcr2 2, 0, ip, cr14, cr13, {6} │ │ + cdp2 5, 0, cr8, cr14, cr7, {1} │ │ + cdp2 0, 0, cr14, cr14, cr12, {4} │ │ + vfmal.f16 d2, s30, s9[1] │ │ + vcmla.f16 d4, d14, d12[0], #0 │ │ cdp2 5, 0, cr2, cr13, cr2, {0} │ │ mov r0, r8 │ │ blx 2701c00 │ │ add r0, sp, #104 @ 0x68 │ │ mov r1, r8 │ │ blx 2701d90 │ │ ldrb.w r0, [sp, #112] @ 0x70 │ │ @@ -298851,31 +298851,31 @@ │ │ strh.w r1, [sp, #122] @ 0x7a │ │ b.n 2142880 >&, std::__ndk1::function)@@Base+0x1088> │ │ movs r4, #3 │ │ cmp r6, #16 │ │ bne.n 2142ac8 >&, std::__ndk1::function)@@Base+0x12d0> │ │ b.n 2142d26 >&, std::__ndk1::function)@@Base+0x152e> │ │ @ instruction: 0xef40fe10 │ │ - strb r1, [r7, #16] │ │ - mrc2 4, 0, lr, cr0, cr11, {6} │ │ + strb r6, [r4, #17] │ │ + cdp2 5, 1, cr14, cr0, cr8, {0} │ │ cdp2 6, 0, cr15, cr13, cr2, {4} │ │ - mrc2 14, 0, r1, cr0, cr1, {7} │ │ - cdp2 4, 0, cr1, cr13, cr14, {2} │ │ - cdp2 1, 1, cr12, cr0, cr10, {1} │ │ - vseleq.f64 d15, d29, d13 │ │ - cdp2 7, 0, cr13, cr14, cr15, {5} │ │ - cdp2 4, 0, cr8, cr15, cr6, {1} │ │ - mcr2 5, 0, r3, cr13, cr7, {1} │ │ - vselvs.f16 s2, s1, s25 │ │ - cdp2 2, 0, cr6, cr15, cr4, {2} │ │ - mcr2 0, 0, ip, cr14, cr13, {4} │ │ - mcr2 0, 0, r0, cr13, cr11, {2} │ │ + mrc2 15, 0, r1, cr0, cr14, {0} │ │ + mcr2 4, 0, r1, cr13, cr11, {3} │ │ + mrc2 1, 0, ip, cr0, cr7, {2} │ │ + mcr2 11, 0, pc, cr13, cr10, {5} @ │ │ + mcr2 7, 0, sp, cr14, cr12, {6} │ │ + mcr2 4, 0, r8, cr15, cr3, {2} │ │ + cdp2 5, 0, cr3, cr13, cr4, {3} │ │ + mrc2 9, 0, r1, cr0, cr9, {6} @ │ │ + mcr2 2, 0, r6, cr15, cr1, {3} │ │ + cdp2 0, 0, cr12, cr14, cr10, {6} │ │ + cdp2 0, 0, cr0, cr13, cr8, {4} │ │ mcr2 13, 0, pc, cr14, cr2, {4} @ │ │ - cdp2 4, 0, cr4, cr12, cr5, {2} │ │ - mcr2 4, 0, r4, cr13, cr3, {1} │ │ + mcr2 4, 0, r4, cr12, cr2, {3} │ │ + cdp2 4, 0, cr4, cr13, cr0, {3} │ │ cdp2 4, 0, cr2, cr13, cr5, {0} │ │ cmp r6, #16 │ │ bne.n 2142ac8 >&, std::__ndk1::function)@@Base+0x12d0> │ │ b.n 2142d26 >&, std::__ndk1::function)@@Base+0x152e> │ │ movs r4, #1 │ │ cmp r6, #16 │ │ bne.n 2142ac8 >&, std::__ndk1::function)@@Base+0x12d0> │ │ @@ -299163,16 +299163,16 @@ │ │ lsls r0, r0, #31 │ │ beq.n 2142e1a >&, std::__ndk1::function)@@Base+0x1622> │ │ ldr r0, [sp, #416] @ 0x1a0 │ │ b.n 2142e16 >&, std::__ndk1::function)@@Base+0x161e> │ │ stc2 14, cr15, [fp], {12} │ │ strb r4, [r2, #12] │ │ cdp2 12, 1, cr14, cr1, cr2, {3} │ │ - cdp2 12, 1, cr7, cr0, cr7, {2} │ │ - mcr2 12, 0, r7, cr15, cr5, {1} │ │ + mrc2 12, 0, r7, cr0, cr4, {3} │ │ + cdp2 12, 0, cr7, cr15, cr2, {3} │ │ mcr2 11, 0, lr, cr15, cr8, {3} @ │ │ mrc2 11, 0, lr, cr0, cr14, {4} @ │ │ mrc2 0, 0, r2, cr0, cr0, {1} │ │ blx 26ffb80 │ │ ldr r1, [pc, #856] @ (2143128 >&, std::__ndk1::function)@@Base+0x1930>) │ │ mov r2, r0 │ │ ldr r3, [sp, #64] @ 0x40 │ │ @@ -299556,15 +299556,15 @@ │ │ str r0, [sp, #400] @ 0x190 │ │ ldr r1, [sp, #20] │ │ ldr r0, [sp, #32] │ │ str r1, [sp, #396] @ 0x18c │ │ str r0, [sp, #392] @ 0x188 │ │ b.n 2143256 >&, std::__ndk1::function)@@Base+0x1a5e> │ │ nop │ │ - bvc.n 21432b8 >&, std::__ndk1::function)@@Base+0x1ac0> │ │ + bvc.n 2143112 >&, std::__ndk1::function)@@Base+0x191a> │ │ vfmal.f16 q7, d31, d4[2] │ │ cdp2 1, 1, cr15, cr0, cr10, {5} │ │ cdp2 15, 1, cr14, cr0, cr8, {5} │ │ cdp2 5, 1, cr15, cr0, cr13, {0} │ │ ldrb r4, [r2, #15] │ │ movs r0, #32 │ │ blx 26ffb80 │ │ @@ -299898,24 +299898,24 @@ │ │ str r1, [sp, #88] @ 0x58 │ │ add r1, sp, #88 @ 0x58 │ │ mov r0, r3 │ │ blx r2 │ │ ldr.w r8, [sp, #60] @ 0x3c │ │ b.n 21435f0 >&, std::__ndk1::function)@@Base+0x1df8> │ │ @ instruction: 0xe8ccfe10 │ │ - bvs.n 2143658 >&, std::__ndk1::function)@@Base+0x1e60> │ │ - mcr2 6, 0, r8, cr14, cr7, {7} │ │ - mrc2 11, 0, r5, cr0, cr6, {2} @ │ │ - vseleq.f64 d3, d13, d28 │ │ - cdp2 1, 0, cr15, cr13, cr10, {4} │ │ - vcmla.f16 d5, d30, d2[1], #0 │ │ - mcr2 10, 0, r1, cr14, cr12, {6} @ │ │ - mcr2 15, 0, r2, cr14, cr14, {3} │ │ - mcr2 2, 0, r9, cr15, cr11, {6} │ │ - cdp2 2, 0, cr9, cr15, cr9, {6} │ │ + bvs.n 21434b2 >&, std::__ndk1::function)@@Base+0x1cba> │ │ + cdp2 7, 0, cr8, cr14, cr4, {1} │ │ + vselvs.f64 d5, d16, d3 │ │ + mcr2 11, 0, r3, cr13, cr9, {2} @ │ │ + mcr2 1, 0, pc, cr13, cr7, {5} @ │ │ + vcmla.f16 , q15, d15[0], #0 │ │ + vseleq.f64 d1, d14, d9 │ │ + cdp2 15, 0, cr2, cr14, cr11, {5} │ │ + cdp2 3, 0, cr9, cr15, cr8, {0} │ │ + mcr2 2, 0, r9, cr15, cr6, {7} │ │ cdp2 0, 0, cr14, cr15, cr2, {6} │ │ mrc2 0, 0, r2, cr0, cr0, {1} │ │ blx 26ffb80 │ │ ldr r1, [pc, #948] @ (2143968 >&, std::__ndk1::function)@@Base+0x2170>) │ │ ldr r3, [sp, #64] @ 0x40 │ │ add r1, pc │ │ str r0, [sp, #96] @ 0x60 │ │ @@ -300290,16 +300290,16 @@ │ │ blx 26ffad0 │ │ b.n 2143a48 >&, std::__ndk1::function)@@Base+0x2250> │ │ nop │ │ @ instruction: 0xea5efe10 │ │ b.n 2143b04 >&, std::__ndk1::function)@@Base+0x230c> │ │ mrc2 4, 0, lr, cr0, cr12, {6} │ │ mrc2 0, 0, lr, cr0, cr6, {7} │ │ - @ instruction: 0xfe100bc5 │ │ - mcr2 11, 0, r0, cr15, cr5, {5} @ │ │ + mrc2 11, 0, r0, cr0, cr2, {7} @ │ │ + @ instruction: 0xfe0f0be2 │ │ cdp2 1, 0, cr14, cr15, cr8, {0} │ │ cdp2 3, 1, cr14, cr0, cr0, {5} │ │ cdp2 13, 1, cr13, cr0, cr8, {3} │ │ mrc2 0, 0, lr, cr0, cr12, {2} │ │ b.n 2143a10 >&, std::__ndk1::function)@@Base+0x2218> │ │ b.n 2143b0a >&, std::__ndk1::function)@@Base+0x2312> │ │ b.n 2143a48 >&, std::__ndk1::function)@@Base+0x2250> │ │ @@ -300526,15 +300526,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #28] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ subs r2, #140 @ 0x8c │ │ lsls r7, r3, #1 │ │ - ldr r3, [pc, #848] @ (2143f10 >&, std::__ndk1::function)@@Base+0x2718>) │ │ + ldr r4, [pc, #4] @ (2143bc4 >&, std::__ndk1::function)@@Base+0x23cc>) │ │ vseleq.f32 s6, s30, s29 │ │ lsls r7, r3, #1 │ │ udf #254 @ 0xfe │ │ adds r0, #4 │ │ b.w 26fe89c │ │ push {r7, lr} │ │ mov r7, sp │ │ @@ -301285,16 +301285,16 @@ │ │ beq.n 21443ae >&, std::__ndk1::function)@@Base+0x2bb6> │ │ b.n 2144476 >&, std::__ndk1::function)@@Base+0x2c7e> │ │ nop │ │ svc 194 @ 0xc2 │ │ cdp2 6, 1, cr13, cr0, cr8, {1} │ │ mrc2 15, 0, sp, cr0, cr6, {3} │ │ cdp2 5, 1, cr13, cr0, cr2, {4} │ │ - cdp2 7, 1, cr14, cr0, cr15, {1} │ │ - mcr2 7, 0, lr, cr13, cr11, {0} │ │ + mrc2 7, 0, lr, cr0, cr12, {2} │ │ + cdp2 7, 0, cr14, cr13, cr8, {2} │ │ cdp2 12, 0, cr2, cr13, cr3, {0} │ │ bhi.n 2144472 >&, std::__ndk1::function)@@Base+0x2c7a> │ │ ldr r0, [sp, #76] @ 0x4c │ │ ldr r0, [r0, #40] @ 0x28 │ │ add r1, sp, #424 @ 0x1a8 │ │ movs r2, #4 │ │ blx 2704340 │ │ @@ -302037,15 +302037,15 @@ │ │ blxne 26ffad0 │ │ ldrsh.w r0, [sp, #108] @ 0x6c │ │ movs r4, #1 │ │ ldr r1, [sp, #32] │ │ str.w r6, [r1, r0, lsl #2] │ │ b.n 21449a4 >&, std::__ndk1::function)@@Base+0x31ac> │ │ bne.n 2144c70 >&, std::__ndk1::function)@@Base+0x3478> │ │ - mrc2 11, 0, fp, cr0, cr9, {0} @ │ │ + @ instruction: 0xfe10bb46 │ │ mcr2 0, 0, r2, cr13, cr0, {1} │ │ blx 26ffb80 │ │ ldr r1, [pc, #920] @ (2144f80 >&, std::__ndk1::function)@@Base+0x3788>) │ │ movs r3, #15 │ │ mov r2, r0 │ │ str r0, [sp, #144] @ 0x90 │ │ add r1, pc │ │ @@ -302689,15 +302689,15 @@ │ │ blx 26ffae0 │ │ ldrb.w r0, [sp, #20] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #28] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - @ instruction: 0xefb8fe0f │ │ + vmull.p64 , d5, d15 │ │ movs r3, #226 @ 0xe2 │ │ lsls r7, r3, #1 │ │ movs r3, #144 @ 0x90 │ │ lsls r7, r3, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ @@ -304326,19 +304326,19 @@ │ │ cmp r0, #12 │ │ bcs.n 21462ac │ │ movs r1, #0 │ │ mov r0, r4 │ │ b.n 21462e8 │ │ movs r1, #0 │ │ b.n 21462f2 │ │ - lsls r4, r1, #14 │ │ - mcr2 0, 0, r6, cr15, cr6, {3} │ │ - cdp2 5, 1, cr12, cr0, cr0, {2} │ │ - mcr2 13, 0, r6, cr14, cr15, {6} │ │ - mcr2 7, 0, r2, cr14, cr8, {5} │ │ + lsls r1, r7, #14 │ │ + cdp2 0, 0, cr6, cr15, cr3, {5} │ │ + cdp2 5, 1, cr12, cr0, cr13, {3} │ │ + cdp2 14, 0, cr6, cr14, cr12, {0} │ │ + cdp2 7, 0, cr2, cr14, cr5, {7} │ │ cdp2 0, 0, cr0, cr15, cr0, {0} │ │ movs r0, r0 │ │ movs r1, #1 │ │ add.w r2, r1, r0, lsr #2 │ │ movw r0, #65532 @ 0xfffc │ │ vmov.i32 q8, #0 @ 0x00000000 │ │ movt r0, #32767 @ 0x7fff │ │ @@ -305228,27 +305228,27 @@ │ │ lsls r7, r3, #1 │ │ adds r5, #90 @ 0x5a │ │ cdp2 5, 1, cr11, cr1, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2146c88 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - str r2, [sp, #44] @ 0x2c │ │ + str r2, [sp, #224] @ 0xe0 │ │ cdp2 5, 0, cr11, cr15, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2146c98 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - str r1, [sp, #1004] @ 0x3ec │ │ + str r2, [sp, #160] @ 0xa0 │ │ cdp2 5, 0, cr11, cr15, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2146ca8 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - str r1, [sp, #940] @ 0x3ac │ │ + str r2, [sp, #96] @ 0x60 │ │ Address 0x2146caa is out of bounds. │ │ │ │ │ │ 02146cac >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -317498,26 +317498,26 @@ │ │ blx 26ffaf0 │ │ nop │ │ ldc 0, cr0, [ip, #-384]! @ 0xfffffe80 │ │ ldrb r4, [r7, #29] │ │ lsls r6, r3, #1 │ │ stc 0, cr0, [r6, #-384]! @ 0xfffffe80 │ │ adds r0, #228 @ 0xe4 │ │ - mcr2 1, 0, sp, cr12, cr12, {5} │ │ - cdp2 1, 0, cr13, cr12, cr2, {5} │ │ - cdp2 6, 0, cr13, cr12, cr2, {0} │ │ - cdp2 6, 0, cr11, cr13, cr6, {0} │ │ - mcr2 4, 0, r1, cr12, cr15, {4} │ │ - mcr2 4, 0, r1, cr13, cr1, {4} │ │ + cdp2 1, 0, cr13, cr12, cr9, {7} │ │ + cdp2 1, 0, cr13, cr12, cr15, {6} │ │ + cdp2 6, 0, cr13, cr12, cr15, {1} │ │ + mcr2 6, 0, fp, cr13, cr3, {1} │ │ + cdp2 4, 0, cr1, cr12, cr12, {6} │ │ + mcr2 4, 0, r1, cr13, cr14, {5} │ │ mcr2 14, 0, r7, cr13, cr0, {2} │ │ lsls r6, r3, #1 │ │ ldrb r2, [r7, #18] │ │ lsls r6, r3, #1 │ │ - ldrh r1, [r2, #32] │ │ - mcr2 11, 0, r8, cr15, cr11, {7} @ │ │ + ldrh r6, [r7, #32] │ │ + cdp2 12, 0, cr8, cr15, cr8, {1} │ │ mcr2 10, 0, r2, cr15, cr8, {6} @ │ │ lsls r5, r3, #1 │ │ cmp r2, #170 @ 0xaa │ │ lsls r5, r3, #1 │ │ strh r6, [r1, #6] │ │ lsls r6, r3, #1 │ │ push {r4, r5, r7, lr} │ │ @@ -336479,15 +336479,15 @@ │ │ mov r0, r4 │ │ pop {r4, r5, r7, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (215d740 >&)@@Base+0x6b4>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - movs r7, #83 @ 0x53 │ │ + movs r7, #128 @ 0x80 │ │ mcr2 5, 0, fp, cr14, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ ldr r2, [pc, #216] @ (215d828 >&)@@Base+0x79c>) │ │ mov.w fp, #0 │ │ ldrd sl, r5, [r7, #12] │ │ @@ -341620,15 +341620,15 @@ │ │ addeq sp, #32 │ │ vpopeq {d8-d9} │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ str r4, [r7, #68] @ 0x44 │ │ lsls r5, r3, #1 │ │ - asrs r0, r4, #9 │ │ + asrs r5, r1, #10 │ │ mcr2 4, 0, r6, cr14, cr0, {3} │ │ lsls r5, r3, #1 │ │ str r2, [r0, #64] @ 0x40 │ │ lsls r5, r3, #1 │ │ │ │ 021611e4 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -341732,15 +341732,15 @@ │ │ addeq sp, #32 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ str r6, [r0, #52] @ 0x34 │ │ lsls r5, r3, #1 │ │ - bvc.n 216128a │ │ + bhi.n 21612e4 │ │ mcr2 3, 0, r6, cr11, cr8, {2} │ │ lsls r5, r3, #1 │ │ str r4, [r7, #44] @ 0x2c │ │ lsls r5, r3, #1 │ │ │ │ 021612e8 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -341787,15 +341787,15 @@ │ │ addeq sp, #32 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ str r6, [r0, #44] @ 0x2c │ │ lsls r5, r3, #1 │ │ - @ instruction: 0xb606 │ │ + @ instruction: 0xb633 │ │ mcr2 2, 0, r6, cr11, cr8, {6} │ │ lsls r5, r3, #1 │ │ str r4, [r7, #36] @ 0x24 │ │ lsls r5, r3, #1 │ │ │ │ 02161368 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -341842,15 +341842,15 @@ │ │ addeq sp, #32 │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ str r6, [r0, #36] @ 0x24 │ │ lsls r5, r3, #1 │ │ - ldr.w pc, [r0, #3595] @ 0xe0b │ │ + ldr??.w pc, [sp, #3595] @ 0xe0b │ │ str r0, [r3, #36] @ 0x24 │ │ lsls r5, r3, #1 │ │ str r4, [r7, #28] │ │ lsls r5, r3, #1 │ │ │ │ 021613e8 >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -344625,15 +344625,15 @@ │ │ add r0, r5 │ │ lsls r5, r3, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21631d0 , bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&)>(std::__ndk1::basic_istream >&, std::__ndk1::__fs::filesystem::path const&, std::__ndk1::vector >&, std::__ndk1::vector, std::__ndk1::allocator > >&, bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&))@@Base+0x278>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldmia r4!, {r0, r1, r6, r7} │ │ + ldmia r4, {r4, r5, r6, r7} │ │ vseleq.f16 s8, s26, s4 │ │ add r1, pc │ │ adds r1, #8 │ │ str r1, [r0, #0] │ │ b.w 26fe908 │ │ lsls r2, r5, #29 │ │ lsls r4, r3, #1 │ │ @@ -345409,15 +345409,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #40] @ 0x28 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ subs r5, #116 @ 0x74 │ │ lsls r5, r3, #1 │ │ - strb r5, [r4, r7] │ │ + ldrsb r2, [r2, r0] │ │ mcr2 3, 0, r0, cr11, cr1, {1} │ │ movs r0, r0 │ │ subs r4, #210 @ 0xd2 │ │ lsls r5, r3, #1 │ │ vshr.u32 q8, , #2 │ │ subs r3, #254 @ 0xfe │ │ lsls r5, r3, #1 │ │ @@ -345595,15 +345595,15 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ subs r3, #140 @ 0x8c │ │ lsls r5, r3, #1 │ │ stcl 14, cr15, [r6], #40 @ 0x28 │ │ subs r3, #108 @ 0x6c │ │ lsls r5, r3, #1 │ │ - lsls r5, r6, #31 │ │ + lsrs r2, r4, #32 │ │ @ instruction: 0xfe0d3ac8 │ │ lsls r5, r3, #1 │ │ lsls r3, r1, #27 │ │ movs r0, r0 │ │ mcr2 0, 4, r0, cr0, cr11, {2} │ │ subs r2, #160 @ 0xa0 │ │ lsls r5, r3, #1 │ │ @@ -345919,17 +345919,17 @@ │ │ adds r6, #98 @ 0x62 │ │ lsls r5, r3, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2163f94 , bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&)>(std::__ndk1::basic_istream >&, std::__ndk1::__fs::filesystem::path const&, std::__ndk1::vector >&, std::__ndk1::vector, std::__ndk1::allocator > >&, bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&))@@Base+0x103c>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bkpt 0x00ff │ │ - vseleq.f16 s8, s26, s4 │ │ - add r1, pc │ │ + ite cs │ │ + vseleqcs.f16 s8, s26, s4 @ │ │ + addcc r1, pc │ │ adds r1, #8 │ │ str r1, [r0, #0] │ │ b.w 26fe908 │ │ vst1.8 @ instruction: 0xf9ce005b │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r1, [pc, #16] @ (2163fc0 , bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&)>(std::__ndk1::basic_istream >&, std::__ndk1::__fs::filesystem::path const&, std::__ndk1::vector >&, std::__ndk1::vector, std::__ndk1::allocator > >&, bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&))@@Base+0x1068>) │ │ @@ -346099,23 +346099,23 @@ │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ strd r8, r0, [sp, #48] @ 0x30 │ │ b.n 2164060 , bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&)>(std::__ndk1::basic_istream >&, std::__ndk1::__fs::filesystem::path const&, std::__ndk1::vector >&, std::__ndk1::vector, std::__ndk1::allocator > >&, bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&))@@Base+0x1108> │ │ nop │ │ adds r5, #192 @ 0xc0 │ │ lsls r5, r3, #1 │ │ - lsls r4, r3, #7 │ │ + lsls r1, r1, #8 │ │ mcr2 5, 0, r3, cr14, cr14, {4} │ │ lsls r5, r3, #1 │ │ bkpt 0x0008 │ │ - mcr2 13, 0, r8, cr15, cr4, {2} │ │ - mcr2 11, 0, r4, cr12, cr7, {1} @ │ │ + vdot.bf16 d8, d31, d1[0] │ │ + @ instruction: 0xfe0c4b64 │ │ cdp2 5, 0, cr3, cr12, cr0, {1} │ │ lsls r5, r3, #1 │ │ - lsls r7, r6, #4 │ │ + lsls r4, r4, #5 │ │ mcr2 4, 0, r3, cr14, cr6, {7} │ │ lsls r5, r3, #1 │ │ b.n 2163e20 , bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&)>(std::__ndk1::basic_istream >&, std::__ndk1::__fs::filesystem::path const&, std::__ndk1::vector >&, std::__ndk1::vector, std::__ndk1::allocator > >&, bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&))@@Base+0xec8> │ │ mcr2 4, 0, r3, cr10, cr0, {5} │ │ lsls r5, r3, #1 │ │ adds r5, #68 @ 0x44 │ │ lsls r5, r3, #1 │ │ @@ -346934,15 +346934,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #40] @ 0x28 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ cmp r5, #76 @ 0x4c │ │ lsls r5, r3, #1 │ │ - cmp sp, r7 │ │ + cmp sl, sp │ │ mcr2 3, 0, r0, cr11, cr1, {1} │ │ movs r0, r0 │ │ cmp r4, #170 @ 0xaa │ │ lsls r5, r3, #1 │ │ vshr.s32 q8, , #2 │ │ cmp r3, #214 @ 0xd6 │ │ lsls r5, r3, #1 │ │ @@ -347120,15 +347120,15 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ cmp r3, #100 @ 0x64 │ │ lsls r5, r3, #1 │ │ bgt.n 2164b90 , bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&)>(std::__ndk1::basic_istream >&, std::__ndk1::__fs::filesystem::path const&, std::__ndk1::vector >&, std::__ndk1::vector, std::__ndk1::allocator > >&, bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&))@@Base+0x1c38> │ │ @ instruction: 0xfe0a2b44 │ │ lsls r5, r3, #1 │ │ - bl 2132834 │ │ + bl 215f834 const&, double, double, double)@@Base+0x32c> │ │ cmp r2, #160 @ 0xa0 │ │ lsls r5, r3, #1 │ │ lsls r3, r7, #21 │ │ movs r0, r0 │ │ mcr 0, 4, r0, cr0, cr11, {2} │ │ cmp r2, #120 @ 0x78 │ │ lsls r5, r3, #1 │ │ @@ -347465,15 +347465,15 @@ │ │ movs r5, #238 @ 0xee │ │ lsls r5, r3, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2165008 , bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&)>(std::__ndk1::basic_istream >&, std::__ndk1::__fs::filesystem::path const&, std::__ndk1::vector >&, std::__ndk1::vector, std::__ndk1::allocator > >&, bool (*)(std::__ndk1::basic_istream >&, double&, Eigen::Matrix&))@@Base+0x20b0>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - add r6, sp, #556 @ 0x22c │ │ + add r6, sp, #736 @ 0x2e0 │ │ vseleq.f16 s8, s26, s4 │ │ add r1, pc │ │ adds r1, #8 │ │ str r1, [r0, #0] │ │ b.w 26fe908 │ │ @ instruction: 0xe982005b │ │ push {r7, lr} │ │ @@ -350222,15 +350222,15 @@ │ │ lsls r2, r0, #31 │ │ lsls r5, r3, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21671f4 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldrh r7, [r3, #36] @ 0x24 │ │ + ldrh r4, [r1, #38] @ 0x26 │ │ vseleq.f16 s8, s26, s4 │ │ add r1, pc │ │ adds r1, #8 │ │ str r1, [r0, #0] │ │ b.w 26fe908 │ │ ldmia r1, {r1, r2, r3, r4, r6} │ │ lsls r3, r3, #1 │ │ @@ -352441,26 +352441,26 @@ │ │ b.n 216897c │ │ ldrb r0, [r4, #0] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [r4, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - @ instruction: 0xffbcfe0b │ │ + vmull.p64 , d9, d11 │ │ ldcl 0, cr0, [lr], #368 @ 0x170 │ │ ldrb r4, [r5, r3] │ │ lsls r7, r3, #1 │ │ ldrb r6, [r3, r3] │ │ lsls r7, r3, #1 │ │ ldrb r2, [r7, r1] │ │ lsls r7, r3, #1 │ │ ldrb r2, [r4, r1] │ │ lsls r7, r3, #1 │ │ - ldr r3, [sp, #1000] @ 0x3e8 │ │ - cdp2 15, 0, cr15, cr12, cr2, {4} │ │ + ldr r4, [sp, #156] @ 0x9c │ │ + cdp2 15, 0, cr15, cr12, cr15, {5} │ │ cdp2 12, 0, cr14, cr11, cr10, {4} │ │ lsls r4, r3, #1 │ │ ldrb r2, [r2, r1] │ │ lsls r7, r3, #1 │ │ │ │ 021689b4 , std::__ndk1::allocator > const&)@@Base>: │ │ push {r4, r5, r7, lr} │ │ @@ -352998,16 +352998,16 @@ │ │ add r1, pc │ │ blx 2703830 │ │ mov r0, r5 │ │ mvn.w r1, #1 │ │ blx 2704b00 │ │ b.n 2168ff4 , std::__ndk1::allocator > const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&, AssociativeArray const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x498> │ │ nop │ │ - lsrs r6, r5, #30 │ │ - mcr2 2, 0, ip, cr14, cr11, {0} │ │ + lsrs r3, r3, #31 │ │ + cdp2 2, 0, cr12, cr14, cr8, {2} │ │ vseleq.f64 d9, d11, d24 │ │ vcmla.f16 d9, d10, d6[0], #0 │ │ vmov d10, r6, r0 │ │ vcmp.f64 d10, #0.0 │ │ vmrs APSR_nzcv, fpscr │ │ bls.n 2168fe8 , std::__ndk1::allocator > const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&, AssociativeArray const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x48c> │ │ movs r0, #136 @ 0x88 │ │ @@ -353075,26 +353075,26 @@ │ │ ldrb.w r0, [sp, #40] @ 0x28 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #48] @ 0x30 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ orr.w r0, r6, ip, lsr #1 │ │ - ldrb r6, [r3, r6] │ │ + ldrb r3, [r1, r7] │ │ mcr2 6, 0, lr, cr11, cr12, {4} │ │ lsls r4, r3, #1 │ │ - lsrs r6, r4, #26 │ │ - cdp2 12, 0, cr1, cr14, cr13, {5} │ │ + lsrs r3, r2, #27 │ │ + mcr2 12, 0, r1, cr14, cr10, {6} │ │ mcr2 12, 0, r6, cr13, cr7, {7} │ │ - vdot.bf16 , q7, d1[1] │ │ - mcr2 5, 0, fp, cr11, cr6, {3} │ │ + vdot.bf16 d13, d30, d14[0] │ │ + cdp2 5, 0, cr11, cr11, cr3, {5} │ │ vcmla.f16 d9, d28, d0[0], #0 │ │ mcr2 15, 0, r8, cr10, cr4, {7} │ │ - vcmla.f16 d15, d30, d15[1], #0 │ │ - mcr2 9, 0, r7, cr12, cr13, {3} @ │ │ + vfmal.f16 , d30, d4[1] │ │ + vseleq.f16 s14, s25, s21 │ │ cdp2 1, 0, cr11, cr12, cr12, {4} │ │ lsls r3, r3, #1 │ │ cbz r4, 216909e , std::__ndk1::allocator > const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&, AssociativeArray const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x542> │ │ lsls r3, r3, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r4, [r0, #4] │ │ @@ -353293,15 +353293,15 @@ │ │ blx 2704b00 │ │ ldr r0, [sp, #4] │ │ vmov d9, sl, fp │ │ vmov d10, r6, r8 │ │ vmov d8, r0, r9 │ │ b.n 2169234 , std::__ndk1::allocator > const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&, AssociativeArray const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x6d8> │ │ nop │ │ - ldr r3, [r1, #108] @ 0x6c │ │ + ldr r0, [r7, #108] @ 0x6c │ │ Address 0x21692a2 is out of bounds. │ │ │ │ │ │ 021692a4 , std::__ndk1::allocator > const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&, AssociativeArray const&, std::__ndk1::__fs::filesystem::path const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -353663,16 +353663,16 @@ │ │ vpopeq {d8-d9} │ │ addeq sp, #4 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ - lsrs r6, r4, #1 │ │ - mcr2 15, 0, sl, cr14, cr5, {7} │ │ + lsrs r3, r2, #2 │ │ + cdp2 0, 0, cr11, cr14, cr2, {1} │ │ cdp2 0, 0, cr2, cr12, cr0, {4} │ │ movs r1, #16 │ │ blx 26ffbe0 │ │ ldr r1, [sp, #20] │ │ vmov.f64 d17, #112 @ 0x3f800000 1.0 │ │ vmov d16, r6, r1 │ │ ldr r1, [pc, #192] @ (216975c , std::__ndk1::allocator > const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&, AssociativeArray const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x4b8>) │ │ @@ -353724,25 +353724,25 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #48] @ 0x30 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ b.n 2169d30 │ │ lsls r4, r3, #1 │ │ - strb r4, [r4, #23] │ │ + strb r1, [r2, #24] │ │ @ instruction: 0xfe0c49c7 │ │ mcr2 15, 0, sp, cr14, cr12, {2} │ │ lsls r4, r3, #1 │ │ - lsls r6, r3, #29 │ │ - cdp2 5, 0, cr1, cr14, cr5, {3} │ │ - mcr2 6, 0, r5, cr13, cr10, {0} │ │ - vcmla.f16 d11, d11, d10[0], #0 │ │ + lsls r3, r1, #30 │ │ + mcr2 5, 0, r1, cr14, cr2, {4} │ │ + cdp2 6, 0, cr5, cr13, cr7, {2} │ │ + vfmal.f16 d11, s22, s15[0] │ │ vcmla.f16 q4, , d8[1], #0 │ │ - vcmla.f16 , q7, d7[1], #0 │ │ - vfmal.f16 , d10, d3[1] │ │ + vfmal.f16 d15, s29, s8[0] │ │ + vcmla.f16 d15, d26, d8[0], #0 │ │ mcr2 11, 0, sl, cr10, cr0, {0} @ │ │ lsls r3, r3, #1 │ │ add r2, sp, #872 @ 0x368 │ │ lsls r3, r3, #1 │ │ ldr r1, [pc, #8] @ (2169770 , std::__ndk1::allocator > const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&, AssociativeArray const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x4cc>) │ │ add r1, pc │ │ adds r1, #8 │ │ @@ -353946,15 +353946,15 @@ │ │ strd fp, sl, [r5, #64] @ 0x40 │ │ strd r6, r8, [r5, #72] @ 0x48 │ │ blx 2704b00 │ │ vstr d8, [r5, #48] @ 0x30 │ │ b.n 21698ea , std::__ndk1::allocator > const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&, AssociativeArray const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x646> │ │ ble.n 21698d4 , std::__ndk1::allocator > const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&, AssociativeArray const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x630> │ │ lsls r4, r3, #1 │ │ - lsls r3, r3, #12 │ │ + lsls r0, r1, #13 │ │ mcr2 15, 0, r8, cr14, cr0, {1} │ │ mcr2 12, 0, sp, cr10, cr0, {5} │ │ lsls r4, r3, #1 │ │ adds r0, #24 │ │ vldmia r0, {d16-d18} │ │ vcmp.f64 d16, #0.0 │ │ vsub.f64 d17, d18, d17 │ │ @@ -353984,16 +353984,16 @@ │ │ ldr r2, [pc, #16] @ (21699f4 ) │ │ add r0, pc │ │ add r2, pc │ │ blx 2706600 │ │ movs r0, #1 │ │ pop {r7, pc} │ │ nop │ │ - ldr r1, [r5, #124] @ 0x7c │ │ - cdp2 6, 0, cr2, cr12, cr5, {0} │ │ + strb r6, [r2, #0] │ │ + mcr2 6, 0, r2, cr12, cr2, {1} │ │ Address 0x21699f6 is out of bounds. │ │ │ │ │ │ 021699f8 , std::__ndk1::allocator > const&, int*)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -354057,15 +354057,15 @@ │ │ itt eq │ │ ldreq.w fp, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ blt.n 21699f4 │ │ lsls r4, r3, #1 │ │ - push {r0, r2, r4, r5} │ │ + push {r1, r5, r6} │ │ mcr2 11, 0, sp, cr11, cr6, {2} @ │ │ lsls r4, r3, #1 │ │ │ │ 02169a94 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -354206,19 +354206,19 @@ │ │ lsls r7, r3, #1 │ │ ldr r2, [pc, #152] @ (2169c9c , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, double, double)@@Base>) │ │ lsls r7, r3, #1 │ │ ldr r2, [pc, #48] @ (2169c38 , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, double, double, double, double)@@Base+0x18>) │ │ lsls r7, r3, #1 │ │ ldr r1, [pc, #992] @ (2169fec ) │ │ lsls r7, r3, #1 │ │ - add r4, sp, #476 @ 0x1dc │ │ - cdp2 15, 0, cr0, cr10, cr6, {6} │ │ + add r4, sp, #656 @ 0x290 │ │ + mcr2 15, 0, r0, cr10, cr3, {7} │ │ mcr2 10, 0, sp, cr11, cr0, {4} @ │ │ lsls r4, r3, #1 │ │ - cbz r4, 2169c62 , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, double, double, double, double)@@Base+0x42> │ │ + cbz r1, 2169c6e , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, double, double, double, double)@@Base+0x4e> │ │ mcr2 10, 0, sp, cr11, cr0, {1} @ │ │ lsls r4, r3, #1 │ │ │ │ 02169c20 , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, double, double, double, double)@@Base>: │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r4, [pc, #112] @ (2169c98 , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, double, double, double, double)@@Base+0x78>) │ │ @@ -354458,15 +354458,15 @@ │ │ ldrb.w r0, [sp, #16] │ │ lsls r0, r0, #31 │ │ beq.n 2169ea6 , std::__ndk1::allocator > const&)@@Base+0x152> │ │ ldr r0, [sp, #24] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - cbnz r5, 2169f02 │ │ + cbnz r2, 2169f0e │ │ vfmal.f16 , d13, d2[0] │ │ lsls r4, r3, #1 │ │ bvc.n 2169fac │ │ lsls r4, r3, #1 │ │ │ │ 02169eb8 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -354778,31 +354778,31 @@ │ │ stmia r1!, {r1, r6} │ │ movs r0, r0 │ │ movs r0, r0 │ │ adds r0, r0, r0 │ │ lsrs r5, r6 │ │ bvs.n 216a1fc │ │ lsls r4, r3, #1 │ │ - stmia r2!, {r0, r1, r2, r3, r4, r6, r7} │ │ - cdp2 14, 0, cr14, cr12, cr7, {2} │ │ - mcr2 15, 0, sl, cr10, cr2, {4} │ │ + stmia r3!, {r2, r3} │ │ + mcr2 14, 0, lr, cr12, cr4, {3} │ │ + mcr2 15, 0, sl, cr10, cr15, {5} │ │ mcr2 14, 0, sl, cr11, cr14, {0} │ │ lsls r5, r3, #1 │ │ - add r7, sp, #448 @ 0x1c0 │ │ + add r7, sp, #628 @ 0x274 │ │ cdp2 14, 0, cr10, cr11, cr2, {0} │ │ lsls r5, r3, #1 │ │ add r5, sp, #768 @ 0x300 │ │ lsls r5, r3, #1 │ │ - @ instruction: 0xfbdffe0d │ │ - movs r7, #81 @ 0x51 │ │ + stc2 14, cr15, [ip], {13} │ │ + movs r7, #126 @ 0x7e │ │ cdp2 12, 0, cr10, cr11, cr2, {4} │ │ lsls r5, r3, #1 │ │ - ldrh r6, [r7, #6] │ │ - cdp2 6, 0, cr10, cr11, cr5, {0} │ │ - mcr2 9, 0, r0, cr10, cr4, {2} @ │ │ + ldrh r3, [r5, #8] │ │ + mcr2 6, 0, sl, cr11, cr2, {1} │ │ + vseleq.f16 s0, s21, s2 │ │ cdp2 5, 0, cr13, cr11, cr2, {3} │ │ lsls r4, r3, #1 │ │ │ │ 0216a25c , std::__ndk1::allocator > >(char const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -354952,17 +354952,17 @@ │ │ movs r0, r0 │ │ adds r0, r0, r0 │ │ lsrs r5, r6 │ │ bcs.n 216a394 │ │ lsls r4, r3, #1 │ │ bne.n 216a3ec │ │ lsls r4, r3, #1 │ │ - strh r4, [r2, #56] @ 0x38 │ │ - cdp2 4, 0, cr10, cr11, cr9, {1} │ │ - mcr2 7, 0, r0, cr10, cr4, {3} │ │ + strh r1, [r0, #58] @ 0x3a │ │ + mcr2 4, 0, sl, cr11, cr6, {2} │ │ + cdp2 7, 0, cr0, cr10, cr1, {5} │ │ mcr2 4, 0, sp, cr11, cr4, {6} │ │ bmi.n 216a3b2 │ │ │ │ 0216a408 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -355064,17 +355064,17 @@ │ │ movs r0, r0 │ │ adds r0, r0, r0 │ │ stmia r0!, {r0, r2, r4, r5, r6, r7} │ │ bne.n 216a474 │ │ lsls r4, r3, #1 │ │ beq.n 216a4b4 │ │ lsls r4, r3, #1 │ │ - strh r4, [r3, #46] @ 0x2e │ │ - mcr2 2, 0, sl, cr11, cr5, {7} │ │ - cdp2 6, 0, cr0, cr10, cr0, {2} │ │ + strh r1, [r1, #48] @ 0x30 │ │ + cdp2 3, 0, cr10, cr11, cr2, {1} │ │ + cdp2 6, 0, cr0, cr10, cr13, {3} │ │ Address 0x216a54a is out of bounds. │ │ │ │ │ │ 0216a54c : │ │ vldr d16, [r0, #128] @ 0x80 │ │ vstr d16, [r1] │ │ vldr d16, [r0, #136] @ 0x88 │ │ @@ -355408,15 +355408,15 @@ │ │ ldrb.w r0, [sp, #16] │ │ lsls r0, r0, #31 │ │ beq.n 216a8aa , std::__ndk1::allocator > const&)@@Base+0x152> │ │ ldr r0, [sp, #24] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - cbz r1, 216a8c6 │ │ + cbz r6, 216a8d0 │ │ cdp2 14, 0, cr12, cr13, cr14, {2} │ │ lsls r4, r3, #1 │ │ ldmia r5, {r1, r2, r4, r5, r6} │ │ lsls r4, r3, #1 │ │ bmi.n 216a868 , std::__ndk1::allocator > const&)@@Base+0x110> │ │ bmi.n 216a86a , std::__ndk1::allocator > const&)@@Base+0x112> │ │ │ │ @@ -355504,16 +355504,16 @@ │ │ lsrs r5, r6 │ │ ldr r4, [pc, #988] @ (216ad88 , 0, Eigen::Stride<0, 0> >, 3, 3>::run >(Eigen::QuaternionBase >&, Eigen::Map, 0, Eigen::Stride<0, 0> > const&)@@Base+0x90>) │ │ adds r7, r7, #5 │ │ bge.n 216a984 │ │ bkpt 0x0048 │ │ ldmia r4!, {r3, r5, r6, r7} │ │ lsls r4, r3, #1 │ │ - ldr r6, [sp, #404] @ 0x194 │ │ - mcr2 1, 0, r0, cr10, cr2, {5} │ │ + ldr r6, [sp, #584] @ 0x248 │ │ + mcr2 1, 0, r0, cr10, cr15, {6} │ │ cdp2 12, 0, cr12, cr11, cr6, {2} │ │ lsls r4, r3, #1 │ │ │ │ 0216a9c0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -355690,16 +355690,16 @@ │ │ stmia r1!, {r1, r6} │ │ movs r0, r0 │ │ movs r0, r0 │ │ adds r0, r0, r0 │ │ lsrs r5, r6 │ │ ldmia r3!, {r5, r6, r7} │ │ lsls r4, r3, #1 │ │ - ldr r5, [sp, #116] @ 0x74 │ │ - cdp2 0, 0, cr0, cr10, cr14, {3} │ │ + ldr r5, [sp, #296] @ 0x128 │ │ + mcr2 0, 0, r0, cr10, cr11, {4} │ │ mcr2 14, 0, ip, cr11, cr12, {3} │ │ lsls r4, r3, #1 │ │ ldmia r6, {r1, r2, r6, r7} │ │ lsls r4, r3, #1 │ │ ldmia r5, {r1, r2, r3, r4, r5, r6, r7} │ │ lsls r4, r3, #1 │ │ ldmia r1!, {r2, r3, r5, r6, r7} │ │ @@ -356302,15 +356302,15 @@ │ │ bl 216b2d4 │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (216b2e0 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldr r3, [pc, #716] @ (216b5b0 ) │ │ + ldr r3, [pc, #896] @ (216b664 const&, Eigen::Quaternion const&, Eigen::Matrix const&, Eigen::Matrix const&, float, bool)@@Base+0x74>) │ │ Address 0x216b2e2 is out of bounds. │ │ │ │ │ │ 0216b2e4 : │ │ vmov.i32 q8, #0 @ 0x00000000 │ │ mov r2, r0 │ │ str.w r1, [r2], #4 │ │ @@ -359028,21 +359028,21 @@ │ │ add r1, pc, #280 @ (adr r1, 216d5c8 ) │ │ lsls r4, r3, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (216d4bc const&, float, celestia::math::Frustum const&, Matrices const&)@@Base+0x26c>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - cmp r1, #215 @ 0xd7 │ │ + cmp r2, #4 │ │ cdp2 5, 0, cr11, cr13, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (216d4cc const&, float, celestia::math::Frustum const&, Matrices const&)@@Base+0x27c>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - cmp r1, #199 @ 0xc7 │ │ + cmp r1, #244 @ 0xf4 │ │ Address 0x216d4ce is out of bounds. │ │ │ │ │ │ 0216d4d0 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ @@ -359353,16 +359353,16 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ b.n 216d800 │ │ b.n 216d800 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - ldr r7, [r1, #40] @ 0x28 │ │ - cdp2 2, 0, cr15, cr12, cr13, {1} │ │ + ldr r4, [r7, #40] @ 0x28 │ │ + mcr2 2, 0, pc, cr12, cr10, {2} @ │ │ Address 0x216d812 is out of bounds. │ │ │ │ │ │ 0216d814 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ @@ -360513,17 +360513,17 @@ │ │ subs r7, #128 @ 0x80 │ │ movs r0, r0 │ │ movs r0, r0 │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ ldr r5, [sp, #304] @ 0x130 │ │ lsls r4, r3, #1 │ │ - ldrb r7, [r2, #8] │ │ - mcr2 11, 0, r5, cr12, cr9, {6} @ │ │ - cdp2 12, 0, cr9, cr13, cr4, {4} │ │ + ldrb r4, [r0, #9] │ │ + cdp2 12, 0, cr5, cr12, cr6, {0} │ │ + mcr2 12, 0, r9, cr13, cr1, {5} │ │ cdp2 2, 0, cr9, cr13, cr12, {1} │ │ lsls r4, r3, #1 │ │ str r2, [sp, #24] │ │ lsls r4, r3, #1 │ │ ldrh r0, [r7, #52] @ 0x34 │ │ lsls r4, r3, #1 │ │ │ │ @@ -361192,22 +361192,22 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ bmi.n 216ef20 │ │ vfmsl.f16 d8, s5, s13[0] │ │ lsls r4, r3, #1 │ │ - adds r7, #225 @ 0xe1 │ │ - mcr2 6, 0, r5, cr12, cr15, {0} │ │ - vdot.bf16 , q6, d15[1] │ │ - mcr2 15, 0, r7, cr11, cr9, {0} │ │ - mcr2 11, 0, ip, cr11, cr0, {7} @ │ │ - mcr2 2, 0, r3, cr13, cr15, {0} │ │ - mcr2 11, 0, fp, cr13, cr3, {6} @ │ │ - mcr2 6, 0, r3, cr12, cr2, {6} │ │ + subs r0, #14 │ │ + cdp2 6, 0, cr5, cr12, cr12, {2} │ │ + mcr2 13, 0, fp, cr12, cr12, {4} │ │ + cdp2 15, 0, cr7, cr11, cr6, {2} │ │ + mcr2 12, 0, ip, cr11, cr13, {0} │ │ + cdp2 2, 0, cr3, cr13, cr12, {2} │ │ + cdp2 12, 0, cr11, cr13, cr0, {0} │ │ + mcr2 6, 0, r3, cr12, cr15, {7} │ │ vcmla.f16 q4, , d0[0], #0 │ │ lsls r4, r3, #1 │ │ strh r4, [r1, #56] @ 0x38 │ │ lsls r4, r3, #1 │ │ │ │ 0216eefc : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -361375,20 +361375,20 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ strh r2, [r5, #52] @ 0x34 │ │ lsls r4, r3, #1 │ │ adds r6, #177 @ 0xb1 │ │ - cdp2 4, 0, cr5, cr10, cr3, {1} │ │ - mcr2 11, 0, fp, cr12, cr5, {3} @ │ │ - mcr2 13, 0, r7, cr11, cr15, {0} │ │ - mcr2 9, 0, ip, cr11, cr2, {7} @ │ │ - cdp2 0, 0, cr3, cr13, cr1, {1} │ │ - cdp2 5, 0, cr3, cr13, cr14, {3} │ │ + mcr2 4, 0, r5, cr10, cr0, {2} │ │ + vseleq.f64 d11, d28, d18 │ │ + vdot.bf16 , , d12[0] │ │ + mcr2 10, 0, ip, cr11, cr15, {0} @ │ │ + cdp2 0, 0, cr3, cr13, cr14, {2} │ │ + mcr2 5, 0, r3, cr13, cr11, {4} │ │ cdp2 6, 0, cr8, cr11, cr4, {3} │ │ lsls r4, r3, #1 │ │ strh r0, [r6, #40] @ 0x28 │ │ lsls r4, r3, #1 │ │ │ │ 0216f0d0 &, Eigen::Matrix&, int&) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -362041,17 +362041,17 @@ │ │ strh.w r3, [r4, #-2] │ │ add.w r3, sl, r2 │ │ cmp r3, ip │ │ bne.n 216f874 │ │ add.w sl, r1, r2 │ │ b.n 216f8da │ │ nop │ │ - bl 1f6b4c4 │ │ + bl 1f984c4 │ │ adds r3, #13 │ │ - cdp2 4, 0, cr13, cr10, cr15, {2} │ │ + mcr2 4, 0, sp, cr10, cr12, {3} │ │ cdp2 15, 0, cr15, cr10, cr0, {0} │ │ bx pc │ │ cmp r1, #75 @ 0x4b │ │ subs r7, #37 @ 0x25 │ │ mcr2 6, 0, r4, cr0, cr15, {7} │ │ nop │ │ nop │ │ @@ -363219,23 +363219,23 @@ │ │ add r0, sp, #96 @ 0x60 │ │ ldr r4, [sp, #68] @ 0x44 │ │ blx 2703e60 │ │ add r0, sp, #76 @ 0x4c │ │ blx 2703e50 │ │ b.n 2170606 │ │ b.n 2170604 │ │ - ldmia.w r9!, {r1, r3, r9, sl, fp, ip, sp, lr, pc} │ │ + strd pc, lr, [r6], #40 @ 0x28 │ │ ldr r4, [sp, #68] @ 0x44 │ │ cmp r4, #0 │ │ itt ne │ │ movne r0, r4 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ movs r5, #201 @ 0xc9 │ │ - cdp2 7, 0, cr12, cr10, cr11, {0} │ │ + mcr2 7, 0, ip, cr10, cr8, {1} │ │ cdp2 15, 0, cr11, cr10, cr0, {0} │ │ nop │ │ mcr2 6, 0, r4, cr0, cr15, {7} │ │ mcr2 6, 0, r4, cr0, cr15, {7} │ │ vaba.u8 q2, q0, │ │ cmp r1, #75 @ 0x4b │ │ subs r7, #37 @ 0x25 │ │ @@ -363304,21 +363304,21 @@ │ │ b.n 21705d6 │ │ subs r5, #123 @ 0x7b │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2170708 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bl 20fc324 │ │ + bl 2129324 >&)@@Base+0x12e> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2170718 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bl 20ec334 │ │ + bl 2119334 │ │ │ │ 0217071c >::__emplace_back_slow_path(celestia::gl::Buffer&&, celestia::gl::VertexObject&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ mov r8, r2 │ │ @@ -363412,21 +363412,21 @@ │ │ bl 2170828 >::__emplace_back_slow_path(celestia::gl::Buffer&&, celestia::gl::VertexObject&&)@@Base+0x10c> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2170834 >::__emplace_back_slow_path(celestia::gl::Buffer&&, celestia::gl::VertexObject&&)@@Base+0x118>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bl 1fd0450 │ │ + bl 1ffd450 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2170844 >::__emplace_back_slow_path(celestia::gl::Buffer&&, celestia::gl::VertexObject&&)@@Base+0x128>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bl 1fc0460 │ │ + bl 1fed460 │ │ bmi.n 21707f4 >::__emplace_back_slow_path(celestia::gl::Buffer&&, celestia::gl::VertexObject&&)@@Base+0xd8> │ │ bmi.n 21707f6 >::__emplace_back_slow_path(celestia::gl::Buffer&&, celestia::gl::VertexObject&&)@@Base+0xda> │ │ bmi.n 21707f8 >::__emplace_back_slow_path(celestia::gl::Buffer&&, celestia::gl::VertexObject&&)@@Base+0xdc> │ │ bmi.n 21707fa >::__emplace_back_slow_path(celestia::gl::Buffer&&, celestia::gl::VertexObject&&)@@Base+0xde> │ │ │ │ 02170850 : │ │ push {r4, r6, r7, lr} │ │ @@ -363783,15 +363783,15 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldr r6, [r7, #36] @ 0x24 │ │ lsls r4, r3, #1 │ │ adds r1, r2, #3 │ │ - mcr2 14, 0, r9, cr10, cr7, {0} │ │ + cdp2 14, 0, cr9, cr10, cr4, {2} │ │ @ instruction: 0xfe0b6b66 │ │ lsls r4, r3, #1 │ │ adds r5, r7, r6 │ │ movs r0, r0 │ │ ldr r0, [r1, #24] │ │ lsls r4, r3, #1 │ │ push {r4, r5, r7, lr} │ │ @@ -364646,20 +364646,20 @@ │ │ bl 2170c64 │ │ mov r5, r0 │ │ ldr.w r0, [r0, #736] @ 0x2e0 │ │ ldr.w r9, [sp, #84] @ 0x54 │ │ cbnz r0, 21716f2 │ │ b.n 21716a8 │ │ nop │ │ - ldrsb r5, [r6, r2] │ │ - @ instruction: 0xfe0b09ef │ │ - vcmla.f16 d3, d29, d14[0], #0 │ │ - mcr2 5, 0, r7, cr11, cr6, {7} │ │ - mcr2 4, 0, r9, cr11, cr7, {4} │ │ - vdot.bf16 d2, d11, d3[1] │ │ + ldrsb r2, [r4, r3] │ │ + mcr2 10, 0, r0, cr11, cr12, {0} @ │ │ + vfmal.f16 d3, s27, s7[1] │ │ + cdp2 6, 0, cr7, cr11, cr3, {1} │ │ + cdp2 4, 0, cr9, cr11, cr4, {6} │ │ + mcr2 13, 0, r2, cr11, cr0, {2} │ │ vcmla.f16 d4, d12, d9[0], #0 │ │ movs r1, #2 │ │ movs r2, #128 @ 0x80 │ │ movw r3, #6409 @ 0x1909 │ │ add r0, pc │ │ stmia.w sp, {r0, r1, r6} │ │ add r0, sp, #288 @ 0x120 │ │ @@ -365104,21 +365104,21 @@ │ │ movs r0, r0 │ │ ldmia r4!, {r0, r2, r3, r6, r7} │ │ subs r7, #76 @ 0x4c │ │ movs r0, r0 │ │ cmn r0, r0 │ │ ldr r2, [r1, #12] │ │ lsls r4, r3, #1 │ │ - lsrs r0, r2, #12 │ │ - mcr2 2, 0, r6, cr11, cr5, {3} │ │ - mcr2 5, 0, r0, cr13, cr1, {4} │ │ - mcr2 4, 0, r3, cr13, cr0, {1} │ │ - mcr2 1, 0, r7, cr11, cr2, {4} │ │ - cdp2 0, 0, cr9, cr11, cr1, {1} │ │ - mcr2 12, 0, r6, cr11, cr4, {7} │ │ + lsrs r5, r7, #12 │ │ + cdp2 2, 0, cr6, cr11, cr2, {5} │ │ + mcr2 5, 0, r0, cr13, cr14, {5} │ │ + mcr2 4, 0, r3, cr13, cr13, {2} │ │ + mcr2 1, 0, r7, cr11, cr15, {5} │ │ + cdp2 0, 0, cr9, cr11, cr14, {2} │ │ + vdot.bf16 d6, d11, d1[1] │ │ @ instruction: 0xfe0c5a64 │ │ lsls r4, r3, #1 │ │ ldr r0, [pc, #32] @ (2171c60 ) │ │ add r0, pc │ │ ldr r0, [r0, #0] │ │ ldrb r1, [r0, #0] │ │ lsls r1, r1, #31 │ │ @@ -365864,15 +365864,15 @@ │ │ pop {r4, r6, r7, pc} │ │ bmi.n 21724fa │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (217255c ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bls.n 21725ce │ │ + bls.n 2172628 │ │ mcr2 5, 0, fp, cr12, cr0, {6} │ │ add r7, sp, #8 │ │ vpush {d8-d9} │ │ vmov.f32 s0, #96 @ 0x3f000000 0.5 │ │ mov r4, r3 │ │ vmov s2, r0 │ │ vmla.f32 s0, s2, s0 │ │ @@ -365946,15 +365946,15 @@ │ │ movs r0, r0 │ │ negs r0, r6 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2172668 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bhi.n 21726c2 │ │ + bhi.n 217271c │ │ mcr2 5, 0, fp, cr12, cr0, {6} │ │ add r7, sp, #8 │ │ vpush {d8-d13} │ │ ldr r2, [pc, #244] @ (217276c ) │ │ mov r4, r3 │ │ add r2, pc │ │ vldr s16, [r2] │ │ @@ -366093,15 +366093,15 @@ │ │ yieldcc │ │ lsls r6, r3, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2172834 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bvs.n 21728f6 const&, Color const&, float, Matrices const&)@@Base+0x86> │ │ + bvs.n 2172750 │ │ Address 0x2172836 is out of bounds. │ │ │ │ │ │ 02172838 : │ │ movs r2, #0 │ │ strd r1, r2, [r0, #4] │ │ str r2, [r0, #12] │ │ @@ -366267,20 +366267,20 @@ │ │ subs r3, #128 @ 0x80 │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ ldr r5, [pc, #184] @ (2172aac ) │ │ lsls r4, r3, #1 │ │ - str r6, [r1, #56] @ 0x38 │ │ - mcr2 14, 0, r5, cr11, cr8, {6} │ │ - cdp2 6, 0, cr3, cr12, cr7, {6} │ │ - cdp2 7, 0, cr15, cr12, cr13, {7} │ │ - mcr2 12, 0, r9, cr11, cr4, {6} │ │ - cdp2 5, 0, cr3, cr12, cr4, {0} │ │ + str r3, [r7, #56] @ 0x38 │ │ + cdp2 15, 0, cr5, cr11, cr5, {0} │ │ + mcr2 6, 0, r3, cr12, cr4, {7} │ │ + vfmal.f16 d15, s24, s4[1] │ │ + vdot.bf16 d9, d11, d1[0] │ │ + mcr2 5, 0, r3, cr12, cr1, {1} │ │ cdp2 12, 0, cr4, cr13, cr6, {0} │ │ lsls r4, r3, #1 │ │ │ │ 02172a10 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -369368,27 +369368,27 @@ │ │ str r1, [r0, #96] @ 0x60 │ │ bx lr │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2174c2c ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - sxtb r7, r4 │ │ + uxth r4, r2 │ │ cdp2 5, 0, cr11, cr12, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2174c3c ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - sxtb r7, r2 │ │ + uxth r4, r0 │ │ cdp2 5, 0, cr11, cr12, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2174c4c ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - sxtb r7, r0 │ │ + sxtb r4, r6 │ │ Address 0x2174c4e is out of bounds. │ │ │ │ │ │ 02174c50 : │ │ movs r3, #0 │ │ add r2, pc, #44 @ (adr r2, 2174c80 ) │ │ vld1.64 {d16-d17}, [r2 :128] │ │ @@ -369941,15 +369941,15 @@ │ │ movs r3, #22 │ │ lsls r4, r3, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2175324 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - add r3, sp, #444 @ 0x1bc │ │ + add r3, sp, #624 @ 0x270 │ │ mcr2 5, 0, fp, cr12, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #76 @ 0x4c │ │ str r3, [sp, #16] │ │ mov r8, r0 │ │ strd r2, r1, [sp, #24] │ │ @@ -372974,15 +372974,15 @@ │ │ lsls r4, r3, #1 │ │ mrc2 0, 7, r0, cr8, cr11, {2} │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2177728 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strh r3, [r5, #58] @ 0x3a │ │ + strh r0, [r3, #60] @ 0x3c │ │ mcr2 4, 0, sp, cr12, cr4, {6} │ │ bmi.n 21776da │ │ │ │ 02177730 const&, celestia::engine::SkyGrid const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -374378,16 +374378,16 @@ │ │ movs r0, r0 │ │ movs r0, r0 │ │ eors r1, r3 │ │ cmp r5, #24 │ │ strb r4, [r0, r1] │ │ movs r1, #251 @ 0xfb │ │ ands r1, r1 │ │ - strh r5, [r4, #6] │ │ - mcr2 0, 0, r8, cr11, cr5, {6} │ │ + strh r2, [r2, #8] │ │ + cdp2 1, 0, cr8, cr11, cr2, {0} │ │ cdp2 2, 0, cr15, cr11, cr3, {2} │ │ movs r6, r0 │ │ mov.w sl, #0 │ │ movt r0, #45250 @ 0xb0c2 │ │ str r0, [sp, #96] @ 0x60 │ │ ldr r0, [sp, #76] @ 0x4c │ │ cmp r0, #0 │ │ @@ -374695,41 +374695,41 @@ │ │ b.n 2178d3c const&, Color const&, int) const@@Base+0x71c> │ │ b.n 2178d3c const&, Color const&, int) const@@Base+0x71c> │ │ b.n 2178d3c const&, Color const&, int) const@@Base+0x71c> │ │ b.n 2178d3c const&, Color const&, int) const@@Base+0x71c> │ │ b.n 2178d3c const&, Color const&, int) const@@Base+0x71c> │ │ b.n 2178d3c const&, Color const&, int) const@@Base+0x71c> │ │ b.n 2178d3c const&, Color const&, int) const@@Base+0x71c> │ │ - strh r6, [r5, #2] │ │ + strh r3, [r3, #4] │ │ vfmal.f16 d15, s23, s10[1] │ │ lsls r0, r4, #1 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #104] @ 0x68 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ orr.w r0, r2, #91 @ 0x5b │ │ - strh r4, [r7, #0] │ │ + strh r1, [r5, #2] │ │ cdp2 15, 0, cr11, cr11, cr0, {0} │ │ nop │ │ nop │ │ nop │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ movs r0, r0 │ │ movs r0, r0 │ │ vqadd.s64 q8, q2, │ │ mrc 0, 7, r0, cr2, cr11, {2} │ │ - movs r3, #184 @ 0xb8 │ │ - cdp2 3, 0, cr2, cr10, cr12, {4} │ │ + movs r3, #229 @ 0xe5 │ │ + mcr2 3, 0, r2, cr10, cr9, {5} │ │ cdp2 0, 0, cr7, cr10, cr11, {2} │ │ cdp2 0, 0, cr7, cr13, cr13, {1} │ │ mcr2 4, 0, sp, cr13, cr4, {6} │ │ bmi.n 2178d36 const&, Color const&, int) const@@Base+0x716> │ │ bmi.n 2178d38 const&, Color const&, int) const@@Base+0x718> │ │ bmi.n 2178d3a const&, Color const&, int) const@@Base+0x71a> │ │ │ │ @@ -375055,15 +375055,15 @@ │ │ movs r0, #34 @ 0x22 │ │ mov.w r9, #39 @ 0x27 │ │ add r4, pc │ │ movt r1, #19775 @ 0x4d3f │ │ str r0, [sp, #104] @ 0x68 │ │ b.n 2179170 const&, celestia::engine::SkyGrid const&, int) const@@Base+0x3e0> │ │ nop │ │ - asrs r5, r1, #18 │ │ + asrs r2, r7, #18 │ │ vfmal.f16 , d27, d3[1] │ │ movs r4, r5 │ │ ldr.w fp, [sp, #96] @ 0x60 │ │ cmp.w fp, #0 │ │ it mi │ │ addmi fp, r1 │ │ cmp r0, #1 │ │ @@ -375381,20 +375381,20 @@ │ │ blx 27071f0 │ │ ldr r0, [sp, #100] @ 0x64 │ │ vldr s0, [r0, #8] │ │ vldr s2, [r0, #20] │ │ vldr s4, [r0, #32] │ │ b.n 217958c const&, celestia::engine::SkyGrid const&, int) const@@Base+0x7fc> │ │ nop │ │ - bl 205418c │ │ - ldrsb r3, [r6, r2] │ │ + bl 208118c │ │ + ldrsb r0, [r4, r3] │ │ cdp2 7, 0, cr14, cr11, cr6, {7} │ │ lsls r3, r3, #1 │ │ - ldrsb r3, [r7, r1] │ │ - @ instruction: 0xfe0b1b4e │ │ + ldrsb r0, [r5, r2] │ │ + mcr2 11, 0, r1, cr11, cr11, {3} @ │ │ vfmal.f16 , d26, d5[1] │ │ add sp, #352 @ 0x160 │ │ vldr s10, [sp, #160] @ 0xa0 │ │ vldr s8, [sp, #156] @ 0x9c │ │ vmul.f32 s4, s10, s4 │ │ vldr s6, [sp, #152] @ 0x98 │ │ vmla.f32 s4, s8, s2 │ │ @@ -375442,15 +375442,15 @@ │ │ ldrb.w r0, [sp, #108] @ 0x6c │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #116] @ 0x74 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - subs r6, r3, r4 │ │ + subs r3, r1, r5 │ │ cdp2 0, 0, cr0, cr10, cr0, {0} │ │ strh r0, [r0, #0] │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ movs r0, r0 │ │ @@ -376989,15 +376989,15 @@ │ │ bmi.n 217a594 , std::__ndk1::allocator >&&, std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >&&)@@Base+0x7c> │ │ lsls r3, r3, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (217a514 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldr r7, [r7, r5] │ │ + ldr r4, [r5, r6] │ │ Address 0x217a516 is out of bounds. │ │ │ │ │ │ 0217a518 , std::__ndk1::allocator >&&, std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -377110,15 +377110,15 @@ │ │ ldrb r0, [r5, #0] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [r5, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - ldr r6, [sp, #88] @ 0x58 │ │ + ldr r6, [sp, #268] @ 0x10c │ │ mcr2 5, 0, fp, cr11, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r5, [r0, #0] │ │ mov r4, r0 │ │ cbz r5, 217a69e , std::__ndk1::allocator >&&, std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >&&)@@Base+0x186> │ │ ldr r1, [r4, #4] │ │ @@ -377641,15 +377641,15 @@ │ │ add r2, sp, #40 @ 0x28 │ │ mov r0, r8 │ │ blx 2707310 │ │ str.w r0, [r8, #4] │ │ mov.w r8, #1 │ │ b.n 217ab1c >&, StarDatabase const&)@@Base+0x3e8> │ │ nop │ │ - ldr r3, [sp, #320] @ 0x140 │ │ + ldr r3, [sp, #500] @ 0x1f4 │ │ cdp2 1, 0, cr15, cr11, cr5, {4} │ │ b.n 217adc2 , std::__ndk1::allocator > >* std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >::__push_back_slow_path, std::__ndk1::allocator > > >(std::__ndk1::vector, std::__ndk1::allocator > >&&)@@Base+0xe6> │ │ mov r4, r0 │ │ ldr r0, [r0, #8] │ │ cmp r0, #0 │ │ bmi.n 217abe8 >&, StarDatabase const&)@@Base+0x4b4> │ │ ldr r0, [pc, #236] @ (217acb4 >&, StarDatabase const&)@@Base+0x580>) │ │ @@ -377744,23 +377744,23 @@ │ │ add r0, sp, #88 @ 0x58 │ │ blx 2701c30 │ │ ldr r0, [sp, #20] │ │ bl 208831c │ │ blx 26ffaf0 │ │ ldmia r6, {r2, r4, r5, r6} │ │ lsls r3, r3, #1 │ │ - str r5, [r7, #8] │ │ - mcr2 0, 0, r6, cr10, cr1, {5} │ │ - mcr2 3, 0, sl, cr10, cr0, {5} │ │ - cdp2 0, 0, cr0, cr10, cr0, {2} │ │ - mcr2 12, 0, r1, cr11, cr11, {1} │ │ - mcr2 0, 0, r4, cr12, cr15, {4} │ │ - cdp2 0, 0, cr4, cr10, cr15, {4} │ │ - mcr2 4, 0, r1, cr10, cr6, {4} │ │ - mcr2 4, 0, r1, cr13, cr8, {3} │ │ + str r2, [r5, #12] │ │ + mcr2 0, 0, r6, cr10, cr14, {6} │ │ + mcr2 3, 0, sl, cr10, cr13, {6} │ │ + cdp2 0, 0, cr0, cr10, cr13, {3} │ │ + cdp2 12, 0, cr1, cr11, cr8, {3} │ │ + cdp2 0, 0, cr4, cr12, cr12, {6} │ │ + mcr2 0, 0, r4, cr10, cr12, {5} │ │ + cdp2 4, 0, cr1, cr10, cr3, {6} │ │ + cdp2 4, 0, cr1, cr13, cr5, {5} │ │ @ instruction: 0xfe0dc9ca │ │ lsls r3, r3, #1 │ │ │ │ 0217acdc , std::__ndk1::allocator > >* std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >::__push_back_slow_path, std::__ndk1::allocator > > >(std::__ndk1::vector, std::__ndk1::allocator > >&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -377903,15 +377903,15 @@ │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ bmi.n 217ae1e , std::__ndk1::allocator > >* std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >::__push_back_slow_path, std::__ndk1::allocator > > >(std::__ndk1::vector, std::__ndk1::allocator > >&&)@@Base+0x142> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (217ae80 , std::__ndk1::allocator > >* std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >::__push_back_slow_path, std::__ndk1::allocator > > >(std::__ndk1::vector, std::__ndk1::allocator > >&&)@@Base+0x1a4>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - str r3, [r2, r0] │ │ + str r0, [r0, r1] │ │ Address 0x217ae82 is out of bounds. │ │ │ │ │ │ 0217ae84 >::__emplace_back_slow_path, std::__ndk1::allocator >, std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > > >(std::__ndk1::basic_string, std::__ndk1::allocator >&&, std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -378068,15 +378068,15 @@ │ │ pop {r4, r5, r7, pc} │ │ bmi.n 217afee >::__emplace_back_slow_path, std::__ndk1::allocator >, std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > > >(std::__ndk1::basic_string, std::__ndk1::allocator >&&, std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >&&)@@Base+0x16a> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (217b050 >::__emplace_back_slow_path, std::__ndk1::allocator >, std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > > >(std::__ndk1::basic_string, std::__ndk1::allocator >&&, std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >&&)@@Base+0x1cc>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldr r6, [pc, #268] @ (217b160 const&, float, double, Matrices const&) const@@Base+0xb8>) │ │ + ldr r6, [pc, #448] @ (217b214 const&, float, double, Matrices const&) const@@Base+0x16c>) │ │ Address 0x217b052 is out of bounds. │ │ │ │ │ │ 0217b054 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r2, [pc, #56] @ (217b094 ) │ │ @@ -389879,15 +389879,15 @@ │ │ movs r2, #0 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26ff0c4 │ │ mov r0, r5 │ │ bl 2093d98 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x130> │ │ bl 207de6a │ │ - lsrs r4, r7, #24 │ │ + lsrs r1, r5, #25 │ │ Address 0x21835a6 is out of bounds. │ │ │ │ │ │ 021835a8 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -394917,15 +394917,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #32] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ lsrs r2, r7, #20 │ │ lsls r3, r3, #1 │ │ - bge.n 21869cc , std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >&, std::__ndk1::basic_string_view >, bool) const@@Base+0x15c> │ │ + bge.n 2186a26 , std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >&, std::__ndk1::basic_string_view >, bool) const@@Base+0x1b6> │ │ mcr2 11, 0, r0, cr10, cr6, {1} @ │ │ lsls r3, r3, #1 │ │ │ │ 02186ad0 : │ │ ldrb.w r3, [r1, #224] @ 0xe0 │ │ lsls r3, r3, #30 │ │ it pl │ │ @@ -396975,15 +396975,15 @@ │ │ bl 2188014 >* std::__ndk1::vector >, std::__ndk1::allocator > > >::__emplace_back_slow_path > >(std::__ndk1::unique_ptr >&&)@@Base+0x13c> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2188020 >* std::__ndk1::vector >, std::__ndk1::allocator > > >::__emplace_back_slow_path > >(std::__ndk1::unique_ptr >&&)@@Base+0x148>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldrb r3, [r6, #25] │ │ + ldrb r0, [r4, #26] │ │ Address 0x2188022 is out of bounds. │ │ │ │ │ │ 02188024 , std::__ndk1::allocator >, Body*>, std::__ndk1::__tree_node, std::__ndk1::allocator >, Body*>, void*>*, int> std::__ndk1::__tree, std::__ndk1::allocator >, Body*>, std::__ndk1::__map_value_compare, std::__ndk1::allocator >, std::__ndk1::__value_type, std::__ndk1::allocator >, Body*>, UTF8StringOrderingPredicate, true>, std::__ndk1::allocator, std::__ndk1::allocator >, Body*> > >::find, std::__ndk1::allocator > >(std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -400100,15 +400100,15 @@ │ │ bl 218a104 >* std::__ndk1::vector >, std::__ndk1::allocator > > >::__push_back_slow_path > >(std::__ndk1::unique_ptr >&&)@@Base+0x15c> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (218a110 >* std::__ndk1::vector >, std::__ndk1::allocator > > >::__push_back_slow_path > >(std::__ndk1::unique_ptr >&&)@@Base+0x168>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldrb r3, [r0, r6] │ │ + ldrb r0, [r6, r6] │ │ Address 0x218a112 is out of bounds. │ │ │ │ │ │ 0218a114 , void*>*>, bool> std::__ndk1::__hash_table, std::__ndk1::__unordered_map_hasher, std::__ndk1::hash, std::__ndk1::equal_to, true>, std::__ndk1::__unordered_map_equal, std::__ndk1::equal_to, std::__ndk1::hash, true>, std::__ndk1::allocator > >::__emplace_unique_key_args, std::__ndk1::tuple<> >(Body const* const&, std::__ndk1::piecewise_construct_t const&, std::__ndk1::tuple&&, std::__ndk1::tuple<>&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -401727,16 +401727,16 @@ │ │ blxne 26ffad0 │ │ add r0, sp, #56 @ 0x38 │ │ bl 217a668 , std::__ndk1::allocator >&&, std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >&&)@@Base+0x150> │ │ blx 26ffaf0 │ │ nop │ │ stmia r7!, {r3, r4, r5, r6, r7} │ │ lsls r2, r3, #1 │ │ - adds r1, #45 @ 0x2d │ │ - cdp2 12, 0, cr3, cr10, cr5, {1} │ │ + adds r1, #90 @ 0x5a │ │ + mcr2 12, 0, r3, cr10, cr2, {2} │ │ mcr2 4, 0, ip, cr9, cr4, {3} │ │ lsls r2, r3, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ ldr r2, [pc, #172] @ (218b280 >&)@@Base+0x4d0>) │ │ add r2, pc │ │ @@ -401809,15 +401809,15 @@ │ │ ldr r0, [pc, #12] @ (218b288 >&)@@Base+0x4d8>) │ │ add r0, pc │ │ bl 2093da8 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x140> │ │ stmia r3!, {r3, r5, r6, r7} │ │ lsls r2, r3, #1 │ │ stmia r3!, {r2, r4, r5, r7} │ │ lsls r2, r3, #1 │ │ - adds r0, #29 │ │ + adds r0, #74 @ 0x4a │ │ Address 0x218b28a is out of bounds. │ │ │ │ │ │ 0218b28c , std::__ndk1::allocator > >* std::__ndk1::vector, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > > >::__emplace_back_slow_path, std::__ndk1::allocator > > >(std::__ndk1::vector, std::__ndk1::allocator > >&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -403837,15 +403837,15 @@ │ │ ldr r3, [r0, #28] │ │ b.n 218c69a , std::__ndk1::allocator > const&)@@Base+0xfe> │ │ nop │ │ add sp, #56 @ 0x38 │ │ lsls r2, r3, #1 │ │ sub sp, #288 @ 0x120 │ │ lsls r2, r3, #1 │ │ - pop {r0, r2, r3, r6, pc} │ │ + pop {r1, r3, r4, r5, r6, pc} │ │ mcr2 0, 0, fp, cr11, cr6, {4} │ │ lsls r2, r3, #1 │ │ add sp, #112 @ 0x70 │ │ lsls r2, r3, #1 │ │ add sp, #56 @ 0x38 │ │ lsls r2, r3, #1 │ │ add r7, sp, #608 @ 0x260 │ │ @@ -404055,15 +404055,15 @@ │ │ mov r0, r5 │ │ b.n 218c8f8 *& std::__ndk1::__tree, std::__ndk1::allocator >, UserCategoryId>, std::__ndk1::__map_value_compare, std::__ndk1::allocator >, std::__ndk1::__value_type, std::__ndk1::allocator >, UserCategoryId>, std::__ndk1::less, true>, std::__ndk1::allocator, std::__ndk1::allocator >, UserCategoryId> > >::__find_equal, std::__ndk1::allocator > >(std::__ndk1::__tree_end_node*>*&, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0xd8> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (218c920 *& std::__ndk1::__tree, std::__ndk1::allocator >, UserCategoryId>, std::__ndk1::__map_value_compare, std::__ndk1::allocator >, std::__ndk1::__value_type, std::__ndk1::allocator >, UserCategoryId>, std::__ndk1::less, true>, std::__ndk1::allocator, std::__ndk1::allocator >, UserCategoryId> > >::__find_equal, std::__ndk1::allocator > >(std::__ndk1::__tree_end_node*>*&, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0x100>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - adds r5, #115 @ 0x73 │ │ + adds r5, #160 @ 0xa0 │ │ mcr2 5, 0, fp, cr11, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ ldr r6, [r1, #4] │ │ mov ip, r0 │ │ mov.w r0, #1431655765 @ 0x55555555 │ │ @@ -404740,15 +404740,15 @@ │ │ bl 218cfdc >* std::__ndk1::vector >, std::__ndk1::allocator > > >::__push_back_slow_path > >(std::__ndk1::unique_ptr >&&)@@Base+0x132> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (218cfe8 >* std::__ndk1::vector >, std::__ndk1::allocator > > >::__push_back_slow_path > >(std::__ndk1::unique_ptr >&&)@@Base+0x13e>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - cmp r6, #171 @ 0xab │ │ + cmp r6, #216 @ 0xd8 │ │ Address 0x218cfea is out of bounds. │ │ │ │ │ │ 0218cfec *>, bool> std::__ndk1::__hash_table, std::__ndk1::equal_to, std::__ndk1::allocator >::__emplace_unique_key_args(UserCategoryId const&, UserCategoryId&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -407184,15 +407184,15 @@ │ │ str r1, [sp, #400] @ 0x190 │ │ lsls r2, r3, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (218e90c ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - asrs r7, r0, #22 │ │ + asrs r4, r6, #22 │ │ Address 0x218e90e is out of bounds. │ │ │ │ │ │ 0218e910 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -407318,16 +407318,16 @@ │ │ ldr r0, [pc, #20] @ (218ea60 >)@@Base+0xdc>) │ │ add r0, pc │ │ bl 2093da8 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x140> │ │ nop │ │ ldrh r2, [r2, r4] │ │ lsls r1, r3, #1 │ │ bls.n 218e9dc >)@@Base+0x58> │ │ - mrc2 9, 0, r5, cr0, cr1, {6} @ │ │ - vcmla.f16 , q5, d11[0], #0 │ │ + mrc2 9, 0, r5, cr0, cr14, {7} @ │ │ + vfmal.f16 , d10, d0[3] │ │ vcmla.f16 q3, , d1[0], #0 │ │ cmp r1, #0 │ │ it eq │ │ bxeq lr │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ str r1, [r0, #8] │ │ @@ -412281,24 +412281,24 @@ │ │ movs r1, #251 @ 0xfb │ │ ands r1, r1 │ │ movs r0, r0 │ │ movs r0, r0 │ │ lsls r3, r3, #4 │ │ cdp2 14, 0, cr4, cr8, cr4, {5} │ │ lsls r2, r3, #1 │ │ - ldrsh r2, [r2, r7] │ │ - cdp2 3, 0, cr8, cr9, cr4, {5} │ │ - cdp2 14, 0, cr6, cr9, cr0, {6} │ │ - mcr2 1, 0, r8, cr11, cr10, {5} │ │ - mcr2 5, 0, sl, cr10, cr8, {3} │ │ - mcr2 0, 0, sl, cr9, cr1, {5} │ │ - cdp2 3, 0, cr4, cr8, cr5, {4} │ │ - cdp2 14, 0, cr5, cr9, cr14, {4} │ │ - cdp2 1, 0, cr12, cr10, cr7, {6} │ │ - mcr2 12, 0, r9, cr8, cr4, {6} │ │ + ldrsh r7, [r7, r7] │ │ + mcr2 3, 0, r8, cr9, cr1, {6} │ │ + cdp2 14, 0, cr6, cr9, cr13, {7} │ │ + cdp2 1, 0, cr8, cr11, cr7, {7} │ │ + cdp2 5, 0, cr10, cr10, cr5, {5} │ │ + mcr2 0, 0, sl, cr9, cr14, {6} │ │ + mcr2 3, 0, r4, cr8, cr2, {5} │ │ + mcr2 14, 0, r5, cr9, cr11, {5} │ │ + mcr2 1, 0, ip, cr10, cr4, {7} │ │ + vdot.bf16 d9, d8, d1[0] │ │ cdp2 12, 0, cr4, cr10, cr8, {0} │ │ lsls r2, r3, #1 │ │ │ │ 02192a20 , std::__ndk1::allocator > const&, std::__ndk1::__fs::filesystem::path const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -412454,16 +412454,16 @@ │ │ cbz r6, 2192b9e , std::__ndk1::allocator > const&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x17e> │ │ mov r0, r9 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldr r3, [pc, #552] @ (2192dd0 ) │ │ lsls r2, r3, #1 │ │ - strh r1, [r2, #24] │ │ - mcr2 13, 0, r5, cr8, cr6, {1} │ │ + strh r6, [r7, #24] │ │ + vdot.bf16 , q4, d3[1] │ │ @ instruction: 0xfe0a4a4c │ │ lsls r2, r3, #1 │ │ │ │ 02192bb4 : │ │ ldr r1, [pc, #40] @ (2192be0 ) │ │ ldrb.w r2, [r0, #60] @ 0x3c │ │ add r1, pc │ │ @@ -412775,15 +412775,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r9 │ │ bl 207d398 │ │ mov r0, sl │ │ bl 2093d98 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x130> │ │ bl 207de6a │ │ nop │ │ - asrs r6, r7, #21 │ │ + asrs r3, r5, #22 │ │ Address 0x2192eb6 is out of bounds. │ │ │ │ │ │ 02192eb8 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -412853,16 +412853,16 @@ │ │ ldrb r0, [r4, #0] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [r4, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - asrs r6, r3, #18 │ │ - cdp2 1, 0, cr9, cr10, cr0, {3} │ │ + asrs r3, r1, #19 │ │ + cdp2 1, 0, cr9, cr10, cr13, {4} │ │ Address 0x2192f6a is out of bounds. │ │ │ │ │ │ 02192f6c >, double>&, Eigen::Matrix const&, Eigen::Quaternion const&, float, float, float) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -413544,23 +413544,23 @@ │ │ mov r0, r4 │ │ movs r1, #1 │ │ strd fp, fp, [sp] │ │ blx 26ffdf0 │ │ movs r4, #2 │ │ b.n 2193816 >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x4f2> │ │ nop │ │ - ldr r2, [r4, #0] │ │ - cdp2 14, 0, cr4, cr11, cr6, {6} │ │ - mcr2 14, 0, r2, cr11, cr2, {4} │ │ - mcr2 3, 0, r1, cr10, cr8, {0} │ │ - mcr2 0, 0, pc, cr8, cr7, {3} @ │ │ - vcmla.f16 d7, d25, d15[1], #0 │ │ - vcmla.f16 d7, d24, d3[1], #0 │ │ - mcr2 9, 0, r1, cr8, cr13, {5} @ │ │ - mcr2 9, 0, r1, cr9, cr15, {4} @ │ │ + ldr r7, [r1, #4] │ │ + mcr2 14, 0, r4, cr11, cr3, {7} │ │ + mcr2 14, 0, r2, cr11, cr15, {5} │ │ + cdp2 3, 0, cr1, cr10, cr5, {2} │ │ + cdp2 0, 0, cr15, cr8, cr4, {5} │ │ + vfmal.f16 , d25, d4[1] │ │ + vfmal.f16 , d24, d0[0] │ │ + @ instruction: 0xfe0819ea │ │ + @ instruction: 0xfe0919cc │ │ mcr2 9, 0, lr, cr9, cr6, {6} @ │ │ movs r1, #1 │ │ add r6, sp, #104 @ 0x68 │ │ mov r0, r6 │ │ bl 207d350 │ │ mov r0, r5 │ │ mov r1, r4 │ │ @@ -413749,19 +413749,19 @@ │ │ lsls r2, r3, #1 │ │ add sl, r8 │ │ lsls r2, r3, #1 │ │ add r6, r9 │ │ lsls r2, r3, #1 │ │ mvns r2, r6 │ │ lsls r2, r3, #1 │ │ - strb r1, [r6, #27] │ │ - cdp2 6, 0, cr7, cr8, cr5, {7} │ │ - cdp2 3, 0, cr15, cr8, cr3, {0} │ │ - mcr2 2, 0, pc, cr8, cr7, {7} @ │ │ - mcr2 10, 0, sl, cr8, cr15, {0} @ │ │ + strb r6, [r3, #28] │ │ + mcr2 7, 0, r7, cr8, cr2, {0} │ │ + mcr2 3, 0, pc, cr8, cr0, {1} @ │ │ + cdp2 3, 0, cr15, cr8, cr4, {1} │ │ + @ instruction: 0xfe08aa4c │ │ vdot.bf16 , , d6[1] │ │ lsls r2, r3, #1 │ │ bmi.n 21938d0 >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x5ac> │ │ bmi.n 21938d2 >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x5ae> │ │ bmi.n 21938d4 >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x5b0> │ │ bmi.n 21938d6 >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x5b2> │ │ bmi.n 21938d8 >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x5b4> │ │ @@ -414090,15 +414090,15 @@ │ │ mov r2, fp │ │ ldr.w r1, [r3, #-4]! │ │ str.w r1, [r2, #-4]! │ │ cmp r3, r5 │ │ bne.n 2193ce4 │ │ b.n 2193cfa │ │ nop │ │ - str r0, [r1, #40] @ 0x28 │ │ + str r5, [r6, #40] @ 0x28 │ │ mcr2 6, 0, r4, cr11, cr10, {2} │ │ ldr r1, [sp, #96] @ 0x60 │ │ add.w r6, fp, #4 │ │ cmp r5, #0 │ │ add.w r0, r0, r9, lsl #2 │ │ strd r2, r6, [r1, #36] @ 0x24 │ │ str r0, [r1, #44] @ 0x2c │ │ @@ -414943,16 +414943,16 @@ │ │ mov.w r8, #0 │ │ mov fp, sl │ │ str r5, [sp, #92] @ 0x5c │ │ adds r0, #1 │ │ str r0, [sp, #96] @ 0x60 │ │ str r1, [sp, #84] @ 0x54 │ │ b.n 21946a8 │ │ - b.n 2194a26 │ │ - mcr2 1, 0, lr, cr9, cr11, {5} │ │ + b.n 2194a80 │ │ + cdp2 1, 0, cr14, cr9, cr8, {7} │ │ mcr2 12, 0, r3, cr9, cr4, {3} │ │ lsls r2, r3, #1 │ │ ldr r0, [sp, #96] @ 0x60 │ │ strd r9, r0, [r6], #8 │ │ str r6, [sp, #172] @ 0xac │ │ add.w r8, r8, #4 │ │ cmp.w r8, #32 │ │ @@ -415425,15 +415425,15 @@ │ │ blx 26ffad0 │ │ add r0, sp, #108 @ 0x6c │ │ bl 2194c38 │ │ add r0, sp, #112 @ 0x70 │ │ bl 2194ca0 │ │ blx 26ffaf0 │ │ nop │ │ - movs r5, #225 @ 0xe1 │ │ + movs r6, #14 │ │ vcmla.f16 d9, d8, d10[0], #0 │ │ ldr r0, [r0, #0] │ │ cbz r0, 2194bd6 │ │ ldr r1, [sp, #96] @ 0x60 │ │ str r0, [r1, #52] @ 0x34 │ │ blx 26ffad0 │ │ ldr r0, [sp, #92] @ 0x5c │ │ @@ -415453,28 +415453,28 @@ │ │ add r0, sp, #116 @ 0x74 │ │ ldr r4, [sp, #96] @ 0x60 │ │ str r4, [sp, #116] @ 0x74 │ │ bl 2195410 & BlockArray, 1024u>::emplace_back&>(Eigen::Matrix&)@@Base+0x120> │ │ mov r0, r4 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ - movs r5, #195 @ 0xc3 │ │ + movs r5, #240 @ 0xf0 │ │ cdp2 0, 0, cr0, cr8, cr0, {0} │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ movs r2, r0 │ │ movs r0, r0 │ │ movs r3, r0 │ │ ... │ │ stmia r4!, {r1, r3, r4, r5, r6} │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ - cmp pc, sp │ │ - vdot.bf16 , q12, d4[0] │ │ + mov r4, r3 │ │ + mcr2 13, 0, r9, cr8, cr1, {7} │ │ vseleq.f64 d2, d10, d0 │ │ lsls r2, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ ldr.w r9, [r0] │ │ movs r1, #0 │ │ @@ -415890,15 +415890,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ bmi.n 2195056 , 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >* std::__ndk1::vector, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >, std::__ndk1::allocator, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > > > >::__push_back_slow_path, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > > >(std::__ndk1::unique_ptr, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >&&)@@Base+0x17e> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21950b8 , 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >* std::__ndk1::vector, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >, std::__ndk1::allocator, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > > > >::__push_back_slow_path, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > > >(std::__ndk1::unique_ptr, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >&&)@@Base+0x1e0>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - add r5, sp, #876 @ 0x36c │ │ + add r6, sp, #32 │ │ Address 0x21950ba is out of bounds. │ │ │ │ │ │ 021950bc , 1024u, 0u, true>::on_capacity_overflow(boost::move_detail::integral_constant)@@Base>: │ │ push {r7, lr} │ │ mov r7, sp │ │ blx 2707f40 │ │ @@ -415908,15 +415908,15 @@ │ │ mov r7, sp │ │ blx 2707f50 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21950d8 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - add r5, sp, #748 @ 0x2ec │ │ + add r5, sp, #928 @ 0x3a0 │ │ mcr2 5, 0, fp, cr10, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d10} │ │ sub sp, #48 @ 0x30 │ │ ldr r6, [pc, #504] @ (21952e8 ) │ │ @@ -416331,27 +416331,27 @@ │ │ mov r0, sl │ │ bl 21955a8 & BlockArray, 1024u>::emplace_back&>(Eigen::Matrix&)@@Base+0x2b8> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21955a4 & BlockArray, 1024u>::emplace_back&>(Eigen::Matrix&)@@Base+0x2b4>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - add r0, sp, #956 @ 0x3bc │ │ + add r1, sp, #112 @ 0x70 │ │ cdp2 5, 0, cr11, cr10, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21955b4 & BlockArray, 1024u>::emplace_back&>(Eigen::Matrix&)@@Base+0x2c4>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - add r0, sp, #892 @ 0x37c │ │ + add r1, sp, #48 @ 0x30 │ │ cdp2 5, 0, cr11, cr10, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21955c4 & BlockArray, 1024u>::emplace_back&>(Eigen::Matrix&)@@Base+0x2d4>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - add r0, sp, #828 @ 0x33c │ │ + add r0, sp, #1008 @ 0x3f0 │ │ Address 0x21955c6 is out of bounds. │ │ │ │ │ │ 021955c8 & std::__ndk1::vector, std::__ndk1::allocator > >::emplace_back const&, double&>(Eigen::Matrix const&, double&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -423005,15 +423005,15 @@ │ │ bl 2199e28 * std::__ndk1::vector, std::__ndk1::allocator > >::__push_back_slow_path const&>(std::__ndk1::shared_ptr const&)@@Base+0x1d8> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2199e34 * std::__ndk1::vector, std::__ndk1::allocator > >::__push_back_slow_path const&>(std::__ndk1::shared_ptr const&)@@Base+0x1e4>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - str r7, [r3, #4] │ │ + str r4, [r1, #8] │ │ Address 0x2199e36 is out of bounds. │ │ │ │ │ │ 02199e38 : │ │ ldr r0, [r0, #76] @ 0x4c │ │ bx lr │ │ │ │ @@ -423204,15 +423204,15 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ bvs.n 2199fd0 │ │ lsls r1, r3, #1 │ │ bvs.n 219a01c │ │ lsls r1, r3, #1 │ │ - add r3, pc, #84 @ (adr r3, 219a064 ) │ │ + add r3, pc, #264 @ (adr r3, 219a118 const&, double&, double&) const@@Base+0x1c>) │ │ Address 0x219a00e is out of bounds. │ │ │ │ │ │ 0219a010 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -423292,15 +423292,15 @@ │ │ blx 26ffae0 │ │ ldr r0, [sp, #28] │ │ cmp r0, r9 │ │ it ne │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - add r6, sp, #944 @ 0x3b0 │ │ + add r7, sp, #100 @ 0x64 │ │ mcr2 5, 0, sp, cr8, cr6, {4} │ │ lsls r1, r3, #1 │ │ bpl.n 219a0e8 │ │ lsls r1, r3, #1 │ │ bpl.n 219a0f4 │ │ lsls r1, r3, #1 │ │ │ │ @@ -423630,15 +423630,15 @@ │ │ ldrb.w r0, [sp, #32] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #40] @ 0x28 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - add lr, r7 │ │ + add fp, sp │ │ cdp2 1, 0, cr13, cr9, cr10, {7} │ │ lsls r1, r3, #1 │ │ ldrsb r4, [r3, r2] │ │ vseleq.f32 s6, s22, s16 │ │ mcr2 1, 0, sp, cr11, cr14, {0} │ │ lsls r1, r3, #1 │ │ │ │ @@ -424683,17 +424683,17 @@ │ │ vstr d16, [r0, #12] │ │ strd r1, r1, [sp, #44] @ 0x2c │ │ str r1, [sp, #52] @ 0x34 │ │ adds r0, #28 │ │ b.n 219b0f4 │ │ ldmia r5, {r3, r5} │ │ lsls r1, r3, #1 │ │ - ldr r1, [sp, #936] @ 0x3a8 │ │ - mcr2 0, 0, lr, cr7, cr13, {3} │ │ - cdp2 4, 0, cr11, cr7, cr9, {1} │ │ + ldr r2, [sp, #92] @ 0x5c │ │ + cdp2 0, 0, cr14, cr7, cr10, {5} │ │ + mcr2 4, 0, fp, cr7, cr6, {2} │ │ vseleq.f64 d4, d9, d31 │ │ vseleq.f16 s20, s22, s22 │ │ mov r0, r5 │ │ blx 2708240 │ │ ldrb.w r1, [sp, #68] @ 0x44 │ │ str r0, [r5, #4] │ │ cmp r1, #0 │ │ @@ -424916,18 +424916,18 @@ │ │ strne r0, [sp, #36] @ 0x24 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ ldrh r4, [r3, #58] @ 0x3a │ │ subs r7, #66 @ 0x42 │ │ ldmia r4!, {r1, r2, r7} │ │ lsls r1, r3, #1 │ │ - ldr r7, [sp, #188] @ 0xbc │ │ - vfmal.f16 d3, s16, s2[0] │ │ - mcr2 5, 0, r1, cr9, cr6, {2} │ │ - cdp2 3, 0, cr7, cr10, cr1, {6} │ │ + ldr r7, [sp, #368] @ 0x170 │ │ + vfmal.f16 d3, s16, s13[1] │ │ + cdp2 5, 0, cr1, cr9, cr3, {4} │ │ + cdp2 3, 0, cr7, cr10, cr14, {7} │ │ mcr2 3, 0, ip, cr9, cr8, {0} │ │ lsls r1, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r5, [r0, #0] │ │ mov r4, r0 │ │ @@ -425444,15 +425444,15 @@ │ │ vmov r2, s0 │ │ vmul.f32 s2, s2, s21 │ │ vdiv.f32 s29, s2, s23 │ │ b.n 219bb4e │ │ nop │ │ stmia r2!, {r4, r5, r6, r7} │ │ lsls r1, r3, #1 │ │ - ldr r1, [r3, #104] @ 0x68 │ │ + ldr r6, [r0, #108] @ 0x6c │ │ mcr2 2, 0, ip, cr9, cr14, {0} │ │ lsls r1, r3, #1 │ │ asrs r7, r5, #9 │ │ subs r4, #3 │ │ movs r0, r0 │ │ subs r3, #128 @ 0x80 │ │ adds r3, #51 @ 0x33 │ │ @@ -425809,18 +425809,18 @@ │ │ blx 26ffaf0 │ │ strh r0, [r0, #0] │ │ mvns r7, r7 │ │ movs r0, r0 │ │ muls r7, r7 │ │ stmia r0!, {r1, r3, r5, r6, r7} │ │ lsls r1, r3, #1 │ │ - str r3, [r2, #120] @ 0x78 │ │ + str r0, [r0, #124] @ 0x7c │ │ mcr2 9, 0, fp, cr10, cr14, {3} @ │ │ lsls r1, r3, #1 │ │ - str r1, [r0, #120] @ 0x78 │ │ + str r6, [r5, #120] @ 0x78 │ │ vfmal.f16 d11, s20, s1[1] │ │ lsls r1, r3, #1 │ │ │ │ 0219be04 : │ │ ldrd r0, r1, [r0] │ │ subs r0, r1, r0 │ │ movw r1, #28087 @ 0x6db7 │ │ @@ -427437,15 +427437,15 @@ │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ bx lr │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (219d19c ::operator() >(std::__ndk1::mersenne_twister_engine&, std::__ndk1::uniform_int_distribution::param_type const&)@@Base+0x1a8>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - cmp r4, #247 @ 0xf7 │ │ + cmp r5, #36 @ 0x24 │ │ vseleq.f16 s4, s20, s0 │ │ it eq │ │ bxeq lr │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r1 │ │ ldr r1, [r1, #0] │ │ @@ -427784,15 +427784,15 @@ │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ bmi.n 219d4e6 * std::__ndk1::vector, std::__ndk1::allocator > >::__push_back_slow_path >(std::__ndk1::optional&&)@@Base+0x124> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (219d548 * std::__ndk1::vector, std::__ndk1::allocator > >::__push_back_slow_path >(std::__ndk1::optional&&)@@Base+0x186>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - cmp r1, #75 @ 0x4b │ │ + cmp r1, #120 @ 0x78 │ │ Address 0x219d54a is out of bounds. │ │ │ │ │ │ 0219d54c * std::__ndk1::vector, std::__ndk1::allocator > >::__emplace_back_slow_path(std::__ndk1::in_place_t const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -428090,38 +428090,38 @@ │ │ itttt eq │ │ moveq r0, #1 │ │ addeq sp, #24 │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ bl 207de6a │ │ - bmi.n 219d93a , std::__ndk1::allocator > >)@@Base+0x2a2> │ │ + bmi.n 219d794 , std::__ndk1::allocator > >)@@Base+0xfc> │ │ mcr2 15, 0, r9, cr8, cr0, {0} │ │ lsls r1, r3, #1 │ │ add r3, pc, #152 @ (adr r3, 219d8f8 , std::__ndk1::allocator > >)@@Base+0x260>) │ │ lsls r1, r3, #1 │ │ - ldrh r1, [r4, #34] @ 0x22 │ │ - cdp2 4, 0, cr1, cr9, cr11, {3} │ │ + ldrh r6, [r1, #36] @ 0x24 │ │ + mcr2 4, 0, r1, cr9, cr8, {4} │ │ mcr2 3, 0, sl, cr8, cr4, {6} │ │ lsls r1, r3, #1 │ │ - stmia r5!, {r0, r2, r3, r5} │ │ - mcr2 0, 0, r1, cr10, cr3, {6} │ │ + stmia r5!, {r1, r3, r4, r6} │ │ + cdp2 1, 0, cr1, cr10, cr0, {0} │ │ mcr2 3, 0, sl, cr10, cr2, {5} │ │ lsls r1, r3, #1 │ │ movs r3, #163 @ 0xa3 │ │ cdp2 3, 0, cr10, cr11, cr2, {5} │ │ lsls r1, r3, #1 │ │ - asrs r2, r0, #6 │ │ + asrs r7, r5, #6 │ │ mcr2 3, 0, sl, cr9, cr2, {4} │ │ lsls r1, r3, #1 │ │ - sub sp, #200 @ 0xc8 │ │ - cdp2 6, 0, cr13, cr9, cr6, {6} │ │ + sub sp, #380 @ 0x17c │ │ + mcr2 6, 0, sp, cr9, cr3, {7} │ │ mcr2 3, 0, sl, cr7, cr0, {3} │ │ lsls r1, r3, #1 │ │ - @ instruction: 0xe8c2fe0a │ │ + strd pc, lr, [pc], #40 @ 219d8c0 , std::__ndk1::allocator > >)@@Base+0x228> @ 0x28 │ │ add r3, pc, #368 @ (adr r3, 219da0c ) │ │ lsls r1, r3, #1 │ │ add r3, pc, #24 @ (adr r3, 219d8b8 , std::__ndk1::allocator > >)@@Base+0x220>) │ │ lsls r1, r3, #1 │ │ add r1, pc, #424 @ (adr r1, 219da4c ) │ │ lsls r1, r3, #1 │ │ add r3, pc, #200 @ (adr r3, 219d970 , std::__ndk1::allocator > >)@@Base+0x2d8>) │ │ @@ -428130,17 +428130,17 @@ │ │ lsls r1, r3, #1 │ │ ldr r7, [sp, #224] @ 0xe0 │ │ lsls r1, r3, #1 │ │ add r3, pc, #48 @ (adr r3, 219d8e4 , std::__ndk1::allocator > >)@@Base+0x24c>) │ │ lsls r1, r3, #1 │ │ add r3, pc, #16 @ (adr r3, 219d8c8 , std::__ndk1::allocator > >)@@Base+0x230>) │ │ lsls r1, r3, #1 │ │ - ldrh r1, [r3, #26] │ │ - mcr2 3, 0, sp, cr9, cr6, {1} │ │ - cdp2 1, 0, cr13, cr8, cr7, {5} │ │ + ldrh r6, [r0, #28] │ │ + cdp2 3, 0, cr13, cr9, cr3, {3} │ │ + mcr2 1, 0, sp, cr8, cr4, {6} │ │ mcr2 0, 0, r1, cr9, cr0, {3} │ │ lsls r4, r3, #1 │ │ ldr r5, [sp, #528] @ 0x210 │ │ lsls r1, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -428887,15 +428887,15 @@ │ │ nop │ │ nop │ │ nop │ │ str r5, [r0, #28] │ │ ldr r7, [pc, #124] @ (219e178 ) │ │ lsrs r7, r7, #13 │ │ adcs r2, r4 │ │ - ldmia r2!, {r5, r7} │ │ + ldmia r2, {r0, r2, r3, r6, r7} │ │ cdp2 0, 0, cr0, cr9, cr0, {0} │ │ orrs r4, r6 │ │ lsrs r3, r3, #31 │ │ eors r1, r1 │ │ vdiv.f32 s6, s17, s6 │ │ vsub.f32 s22, s16, s2 │ │ ldrb.w r0, [fp, #956] @ 0x3bc │ │ @@ -429184,22 +429184,22 @@ │ │ ldc2l 3, cr4, [r1, #-508]! @ 0xfffffe04 │ │ movs r0, r0 │ │ movs r0, r0 │ │ str r7, [sp, #440] @ 0x1b8 │ │ lsls r1, r3, #1 │ │ str r5, [sp, #32] │ │ lsls r1, r3, #1 │ │ - ldrb r5, [r3, #18] │ │ - cdp2 0, 0, cr4, cr9, cr6, {5} │ │ - vseleq.f64 d6, d26, d14 │ │ - mcr2 1, 0, r4, cr8, cr1, {3} │ │ - cdp2 3, 0, cr2, cr8, cr8, {0} │ │ - mcr2 0, 0, r4, cr10, cr4, {2} │ │ + ldrb r2, [r1, #19] │ │ + mcr2 0, 0, r4, cr9, cr3, {6} │ │ + mcr2 11, 0, r6, cr10, cr11, {5} @ │ │ + mcr2 1, 0, r4, cr8, cr14, {4} │ │ + mcr2 3, 0, r2, cr8, cr5, {1} │ │ + cdp2 0, 0, cr4, cr10, cr1, {4} │ │ mcr2 10, 0, pc, cr10, cr3, {2} @ │ │ - vfmal.f16 d2, s21, s1[0] │ │ + vfmal.f16 q1, d26, d5[1] │ │ cdp2 1, 0, cr9, cr8, cr6, {4} │ │ lsls r1, r3, #1 │ │ bmi.n 219e484 │ │ bmi.n 219e486 │ │ bmi.n 219e488 │ │ bmi.n 219e48a │ │ │ │ @@ -429408,22 +429408,22 @@ │ │ subs r3, #128 @ 0x80 │ │ strh r1, [r0, #4] │ │ subs r3, #128 @ 0x80 │ │ lsrs r3, r3, #31 │ │ eors r1, r1 │ │ movs r0, r0 │ │ cmn r0, r1 │ │ - ldrh r6, [r7, #10] │ │ + ldrh r3, [r5, #12] │ │ mcr2 0, 0, r9, cr7, cr10, {5} │ │ lsls r1, r3, #1 │ │ - ldrb r1, [r5, #9] │ │ - cdp2 14, 0, cr15, cr9, cr2, {3} │ │ - cdp2 0, 0, cr14, cr7, cr15, {2} │ │ + ldrb r6, [r2, #10] │ │ + cdp2 14, 0, cr15, cr9, cr15, {4} │ │ + mcr2 0, 0, lr, cr7, cr12, {3} │ │ mcr2 3, 0, pc, cr9, cr14, {1} @ │ │ - mcr2 14, 0, r7, cr10, cr4, {4} │ │ + cdp2 14, 0, cr7, cr10, cr1, {6} │ │ mcr2 14, 0, r8, cr8, cr0, {5} │ │ lsls r1, r3, #1 │ │ bmi.n 219e714 │ │ bmi.n 219e716 │ │ bmi.n 219e718 │ │ bmi.n 219e71a │ │ │ │ @@ -429594,15 +429594,15 @@ │ │ lsls r1, r3, #1 │ │ │ │ 0219e930 : │ │ ldr r0, [pc, #4] @ (219e938 ) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - ldrb r0, [r3, #7] │ │ + ldrb r5, [r0, #8] │ │ Address 0x219e93a is out of bounds. │ │ │ │ │ │ 0219e93c , std::__ndk1::allocator > const&)@@Base>: │ │ bx lr │ │ bmi.n 219e8ea │ │ │ │ @@ -429705,15 +429705,15 @@ │ │ ldr r1, [r1, #0] │ │ ldr r1, [r1, #0] │ │ cmp r1, r0 │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ - svc 118 @ 0x76 │ │ + svc 163 @ 0xa3 │ │ vseleq.f64 d8, d23, d16 │ │ lsls r1, r3, #1 │ │ ldrh r6, [r7, #26] │ │ lsls r1, r3, #1 │ │ │ │ 0219ea5c , std::__ndk1::allocator > fmt::v11::sprintf(char* const&, float const&, float const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -430075,17 +430075,17 @@ │ │ negs r0, r6 │ │ movs r0, r0 │ │ orrs r4, r6 │ │ lsrs r3, r3, #31 │ │ eors r1, r1 │ │ ldrh r4, [r6, #4] │ │ lsls r1, r3, #1 │ │ - pacg lr, r8, r8 │ │ - bcs.n 219ee54 │ │ - @ instruction: 0xfe0afb46 │ │ + @ instruction: 0xfb95fe08 │ │ + bcc.n 219eeae │ │ + mcr2 11, 0, pc, cr10, cr3, {3} @ │ │ cdp2 7, 0, cr8, cr8, cr2, {3} │ │ lsls r1, r3, #1 │ │ │ │ 0219eea0 : │ │ mov.w r0, #1048576 @ 0x100000 │ │ movs r1, #0 │ │ bx lr │ │ @@ -430693,15 +430693,15 @@ │ │ lsls r1, r3, #1 │ │ strh r4, [r5, #22] │ │ lsls r1, r3, #1 │ │ ldrh r6, [r7, #0] │ │ lsls r1, r3, #1 │ │ ldrh r4, [r5, #0] │ │ lsls r1, r3, #1 │ │ - ldr r7, [pc, #352] @ (219f4e0 , std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > > const&, GLVertexShader**)@@Base+0x4>) │ │ + ldr r7, [pc, #532] @ (219f594 , std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > > const&, GLVertexShader**)@@Base+0xb8>) │ │ mcr2 2, 0, r8, cr10, cr6, {3} │ │ lsls r1, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #40 @ 0x28 │ │ mov sl, r0 │ │ @@ -430831,15 +430831,15 @@ │ │ nop │ │ strh r6, [r2, #60] @ 0x3c │ │ lsls r1, r3, #1 │ │ strh r4, [r4, #16] │ │ lsls r1, r3, #1 │ │ strh r2, [r1, #58] @ 0x3a │ │ lsls r1, r3, #1 │ │ - adds r6, r0, r1 │ │ + adds r3, r6, r1 │ │ mcr2 7, 0, r8, cr8, cr4, {1} │ │ lsls r1, r3, #1 │ │ strh r6, [r3, #58] @ 0x3a │ │ lsls r1, r3, #1 │ │ strh r2, [r5, #56] @ 0x38 │ │ lsls r1, r3, #1 │ │ strh r4, [r3, #56] @ 0x38 │ │ @@ -431033,15 +431033,15 @@ │ │ lsls r1, r3, #1 │ │ ldrb r0, [r4, #31] │ │ lsls r1, r3, #1 │ │ strh r4, [r1, #42] @ 0x2a │ │ lsls r1, r3, #1 │ │ strh r0, [r3, #40] @ 0x28 │ │ lsls r1, r3, #1 │ │ - bl 1ee32b6 │ │ + bl 1f102b6 │ │ ldrb r2, [r2, #29] │ │ lsls r1, r3, #1 │ │ │ │ 0219f6ac , std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > > const&, GLGeometryShader**)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -431130,15 +431130,15 @@ │ │ lsls r1, r3, #1 │ │ ldrb r0, [r7, #27] │ │ lsls r1, r3, #1 │ │ strh r0, [r5, #34] @ 0x22 │ │ lsls r1, r3, #1 │ │ strh r0, [r6, #32] │ │ lsls r1, r3, #1 │ │ - ldr r4, [r7, #64] @ 0x40 │ │ + ldr r1, [r5, #68] @ 0x44 │ │ cdp2 14, 0, cr7, cr9, cr10, {3} │ │ lsls r1, r3, #1 │ │ │ │ 0219f794 , std::__ndk1::allocator > const&, GLVertexShader**)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -433806,15 +433806,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r8 │ │ movs r1, #0 │ │ movs r2, #0 │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26ff0c4 │ │ - adds r2, #54 @ 0x36 │ │ + adds r2, #99 @ 0x63 │ │ Address 0x21a11be is out of bounds. │ │ │ │ │ │ 021a11c0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -438258,15 +438258,15 @@ │ │ nop │ │ nop │ │ ... │ │ movs r0, r0 │ │ subs r7, #128 @ 0x80 │ │ adds r2, #170 @ 0xaa │ │ lsls r1, r3, #1 │ │ - vcge.f16 d15, d7, d9 │ │ + vcge.f32 d31, d4, d9 │ │ adds r1, #204 @ 0xcc │ │ lsls r1, r3, #1 │ │ adds r0, #250 @ 0xfa │ │ lsls r1, r3, #1 │ │ │ │ 021a4550 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -438624,31 +438624,31 @@ │ │ bne.n 21a4960 │ │ ldr r1, [sp, #72] @ 0x48 │ │ vldr d16, [sp, #88] @ 0x58 │ │ ldr r0, [sp, #96] @ 0x60 │ │ str r0, [r1, #8] │ │ vstr d16, [r1] │ │ b.n 21a496a │ │ - strh r0, [r0, #8] │ │ + strh r5, [r5, #8] │ │ mcr2 0, 0, r3, cr9, cr2, {2} │ │ lsls r1, r3, #1 │ │ adds r5, #68 @ 0x44 │ │ lsls r1, r3, #1 │ │ - ldrb r0, [r5, #7] │ │ + ldrb r5, [r2, #8] │ │ mcr2 15, 0, r2, cr10, cr4, {4} │ │ lsls r1, r3, #1 │ │ - ldrb r0, [r3, #7] │ │ - cdp2 2, 0, cr10, cr10, cr1, {1} │ │ + ldrb r5, [r0, #8] │ │ + cdp2 2, 0, cr10, cr10, cr14, {2} │ │ mcr2 15, 0, r2, cr8, cr0, {0} │ │ lsls r1, r3, #1 │ │ cbz r6, 21a49a6 │ │ - mcr2 11, 0, r3, cr10, cr15, {6} @ │ │ + cdp2 12, 0, cr3, cr10, cr12, {0} │ │ cdp2 14, 0, cr2, cr10, cr8, {4} │ │ lsls r1, r3, #1 │ │ - subs r3, #197 @ 0xc5 │ │ + subs r3, #242 @ 0xf2 │ │ @ instruction: 0xfe0a096a │ │ lsls r0, r3, #1 │ │ ldmia r4!, {r0, r2, r3, r6, r7} │ │ subs r5, #204 @ 0xcc │ │ movs r0, r0 │ │ orrs r0, r0 │ │ movs r0, r0 │ │ @@ -440502,28 +440502,28 @@ │ │ vpopeq {d8-d11} │ │ addeq sp, #4 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ - lsrs r5, r0, #2 │ │ - vfmal.f16 q0, d9, d1[3] │ │ - mcr2 3, 0, r3, cr9, cr4, {0} │ │ + lsrs r2, r6, #2 │ │ + vcmla.f16 d0, d25, d6[1], #0 │ │ + cdp2 3, 0, cr3, cr9, cr1, {2} │ │ vseleq.f32 s2, s14, s8 │ │ lsls r1, r3, #1 │ │ - adds r3, #4 │ │ + adds r3, #49 @ 0x31 │ │ mcr2 9, 0, r1, cr7, cr12, {6} @ │ │ lsls r1, r3, #1 │ │ adds r6, r4, r5 │ │ lsls r1, r3, #1 │ │ adds r2, r2, #0 │ │ lsls r1, r3, #1 │ │ - add r1, sp, #708 @ 0x2c4 │ │ - mcr2 12, 0, sl, cr9, cr9, {2} │ │ + add r1, sp, #888 @ 0x378 │ │ + cdp2 12, 0, cr10, cr9, cr6, {4} │ │ vcmla.f16 , q4, d0[0], #0 │ │ lsls r1, r3, #1 │ │ add r0, sp, #112 @ 0x70 │ │ add r1, sp, #232 @ 0xe8 │ │ blx 2701c40 │ │ ldrb.w r0, [sp, #112] @ 0x70 │ │ cmp r0, #4 │ │ @@ -440834,26 +440834,26 @@ │ │ b.n 21a6296 │ │ b.n 21a623a │ │ b.n 21a623a │ │ b.n 21a623a │ │ b.n 21a623a │ │ b.n 21a6296 │ │ nop │ │ - b.n 21a59cc │ │ + b.n 21a5a26 │ │ cdp2 12, 0, cr9, cr9, cr5, {1} │ │ cdp2 7, 0, cr1, cr10, cr6, {1} │ │ lsls r1, r3, #1 │ │ ldr r4, [sp, #84] @ 0x54 │ │ - mcr2 0, 0, pc, cr10, cr2, {0} @ │ │ - mcr2 5, 0, lr, cr7, cr11, {2} │ │ + mcr2 0, 0, pc, cr10, cr15, {1} @ │ │ + cdp2 5, 0, cr14, cr7, cr8, {4} │ │ cdp2 0, 0, cr0, cr8, cr0, {0} │ │ movs r0, r0 │ │ - add r2, sp, #484 @ 0x1e4 │ │ - mcr2 14, 0, r0, cr8, cr0, {6} │ │ - mcr2 7, 0, lr, cr7, cr13, {6} │ │ + add r2, sp, #664 @ 0x298 │ │ + mcr2 14, 0, r0, cr8, cr13, {7} │ │ + vcmla.f16 d14, d7, d10[0], #0 │ │ vcmla.f16 d10, d6, d15[1], #0 │ │ bl 21a6b00 ::InfoType>::construct[abi:ne180000]::InfoType, TextureInfo const&>(ResourceManager::InfoType*, TextureInfo const&)@@Base+0x15c> │ │ b.n 21a6266 │ │ b.n 21a621e │ │ b.n 21a621e │ │ b.n 21a623a │ │ b.n 21a623a │ │ @@ -441022,15 +441022,15 @@ │ │ lsls r6, r3, #1 │ │ asrs r4, r6, #10 │ │ lsls r1, r3, #1 │ │ strh r0, [r4, #44] @ 0x2c │ │ lsls r6, r3, #1 │ │ strh r4, [r0, #44] @ 0x2c │ │ lsls r6, r3, #1 │ │ - svc 21 │ │ + svc 66 @ 0x42 │ │ cdp2 5, 0, cr8, cr9, cr0, {3} │ │ lsls r6, r3, #1 │ │ asrs r0, r3, #10 │ │ lsls r1, r3, #1 │ │ strh r6, [r2, #42] @ 0x2a │ │ lsls r6, r3, #1 │ │ push {r4, r5, r7, lr} │ │ @@ -441773,15 +441773,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ bmi.n 21a6a9a ::InfoType>::construct[abi:ne180000]::InfoType, TextureInfo const&>(ResourceManager::InfoType*, TextureInfo const&)@@Base+0xf6> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21a6afc ::InfoType>::construct[abi:ne180000]::InfoType, TextureInfo const&>(ResourceManager::InfoType*, TextureInfo const&)@@Base+0x158>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - str r3, [sp, #604] @ 0x25c │ │ + str r3, [sp, #784] @ 0x310 │ │ mcr2 5, 0, fp, cr9, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r5, [r0, #0] │ │ mov r4, r0 │ │ cbz r5, 21a6b36 ::InfoType>::construct[abi:ne180000]::InfoType, TextureInfo const&>(ResourceManager::InfoType*, TextureInfo const&)@@Base+0x192> │ │ ldr r1, [r4, #4] │ │ @@ -442728,15 +442728,15 @@ │ │ lsls r6, r3, #1 │ │ lsls r4, r0, #5 │ │ lsls r1, r3, #1 │ │ strb r0, [r7, #16] │ │ lsls r6, r3, #1 │ │ strb r4, [r3, #16] │ │ lsls r6, r3, #1 │ │ - ldrd pc, lr, [lr, #36]! @ 0x24 │ │ + @ instruction: 0xea2bfe09 │ │ strb r0, [r7, #15] │ │ lsls r6, r3, #1 │ │ lsls r0, r5, #4 │ │ lsls r1, r3, #1 │ │ strb r6, [r5, #15] │ │ lsls r6, r3, #1 │ │ push {r4, r5, r7, lr} │ │ @@ -442972,15 +442972,15 @@ │ │ ldrb.w r0, [sp] │ │ lsls r0, r0, #31 │ │ beq.n 21a7764 │ │ ldr r0, [sp, #8] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ vmov.i32 q8, #168 @ 0x000000a8 │ │ - asrs r0, r6, #23 │ │ + asrs r5, r3, #24 │ │ mcr2 10, 0, sp, cr8, cr10, {5} @ │ │ lsls r7, r2, #1 │ │ mrc2 0, 5, r0, cr0, cr8, {2} │ │ │ │ 021a7778 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -443254,26 +443254,26 @@ │ │ b.n 21a7a32 │ │ add r0, sp, #28 │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ mrc2 0, 1, r0, cr4, cr8, {2} │ │ stc2l 0, cr0, [sl], #-352 @ 0xfffffea0 │ │ @ instruction: 0xfbfe0058 │ │ - ldmia r4, {r0, r1, r4, r5, r6, r7} │ │ - cdp2 12, 0, cr12, cr8, cr7, {7} │ │ - mcr2 11, 0, sl, cr8, cr13, {6} @ │ │ - @ instruction: 0xfe09abcf │ │ - mcr2 12, 0, ip, cr9, cr11, {4} │ │ - cdp2 12, 0, cr12, cr8, cr15, {4} │ │ + ldmia r5, {r5} │ │ + mcr2 13, 0, ip, cr8, cr4, {0} │ │ + cdp2 12, 0, cr10, cr8, cr10, {0} │ │ + mcr2 11, 0, sl, cr9, cr12, {7} @ │ │ + cdp2 12, 0, cr12, cr9, cr8, {6} │ │ + mcr2 12, 0, ip, cr8, cr12, {5} │ │ mcr2 5, 0, r6, cr8, cr0, {6} │ │ cdp2 5, 0, cr6, cr10, cr4, {6} │ │ - cdp2 14, 0, cr0, cr10, cr12, {5} │ │ - cdp2 14, 0, cr0, cr9, cr0, {5} │ │ - mcr2 15, 0, r4, cr9, cr0, {7} │ │ - mcr2 15, 0, r4, cr7, cr10, {6} │ │ + mcr2 14, 0, r0, cr10, cr9, {6} │ │ + cdp2 14, 0, cr0, cr9, cr13, {6} │ │ + mcr2 0, 0, r5, cr9, cr13, {0} │ │ + cdp2 0, 0, cr5, cr7, cr7, {0} │ │ Address 0x21a7a76 is out of bounds. │ │ │ │ │ │ 021a7a78 ::~ResourceManager()@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -443845,15 +443845,15 @@ │ │ strne r0, [sp, #48] @ 0x30 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ vst4.16 {d16-d19}, [r6 :64], r8 │ │ ldrh r2, [r0, r0] │ │ @ instruction: 0xfe0f59ec │ │ - cdp2 3, 0, cr14, cr15, cr7, {6} │ │ + mcr2 3, 0, lr, cr15, cr4, {7} │ │ cdp2 5, 0, cr15, cr8, cr0, {5} │ │ lsls r0, r3, #1 │ │ │ │ 021a8084 : │ │ ldr r0, [r0, #4] │ │ ldrb r0, [r0, #28] │ │ bx lr │ │ @@ -444050,15 +444050,15 @@ │ │ pop {r4, r5, r7, pc} │ │ bmi.n 21a81fe >::__emplace_back_slow_path >(celestia::gl::Buffer::TargetHint&&, celestia::util::array_view&&)@@Base+0xfa> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21a8260 >::__emplace_back_slow_path >(celestia::gl::Buffer::TargetHint&&, celestia::util::array_view&&)@@Base+0x15c>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldrb r3, [r6, #16] │ │ + ldrb r0, [r4, #17] │ │ mcr2 5, 0, fp, cr9, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ ldr.w fp, [r0] │ │ ldrd r6, r2, [fp, #4] │ │ cmp r6, r2 │ │ @@ -444338,15 +444338,15 @@ │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ bmi.n 21a8502 >::__emplace_back_slow_path(celestia::gl::VertexObject&&)@@Base+0x76> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21a8564 >::__emplace_back_slow_path(celestia::gl::VertexObject&&)@@Base+0xd8>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldrb r7, [r5, #4] │ │ + ldrb r4, [r3, #5] │ │ Address 0x21a8566 is out of bounds. │ │ │ │ │ │ 021a8568 : │ │ mov.w r1, #4294967295 @ 0xffffffff │ │ strd r1, r1, [r0] │ │ str r1, [r0, #8] │ │ @@ -445421,15 +445421,15 @@ │ │ ldrne r0, [sp, #16] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ b.n 21a8f1c >)@@Base+0xe0> │ │ lsls r0, r3, #1 │ │ b.n 21a8f9c >)@@Base+0x160> │ │ lsls r0, r3, #1 │ │ - push {r1, r2, r3, r5, r6, r7} │ │ + push {r0, r1, r3, r4, lr} │ │ cdp2 5, 0, cr14, cr8, cr6, {6} │ │ lsls r0, r3, #1 │ │ │ │ 021a9048 : │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #8 │ │ @@ -446064,15 +446064,15 @@ │ │ bmi.n 21a9602 , std::__ndk1::allocator >, unsigned int>, std::__ndk1::__tree_node, std::__ndk1::allocator >, unsigned int>, void*>*, int> std::__ndk1::__tree, std::__ndk1::allocator >, unsigned int>, std::__ndk1::__map_value_compare, std::__ndk1::allocator >, std::__ndk1::__value_type, std::__ndk1::allocator >, unsigned int>, CompareIgnoringCasePredicate, true>, std::__ndk1::allocator, std::__ndk1::allocator >, unsigned int> > >::find > >(std::__ndk1::basic_string_view > const&) const@@Base+0x2e> │ │ │ │ 021a9658 : │ │ ldr r0, [pc, #4] @ (21a9660 ) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - cbz r2, 21a9676 │ │ + cbz r7, 21a9680 │ │ Address 0x21a9662 is out of bounds. │ │ │ │ │ │ 021a9664 , std::__ndk1::allocator > const&)@@Base>: │ │ bx lr │ │ bmi.n 21a9612 , std::__ndk1::allocator >, unsigned int>, std::__ndk1::__tree_node, std::__ndk1::allocator >, unsigned int>, void*>*, int> std::__ndk1::__tree, std::__ndk1::allocator >, unsigned int>, std::__ndk1::__map_value_compare, std::__ndk1::allocator >, std::__ndk1::__value_type, std::__ndk1::allocator >, unsigned int>, CompareIgnoringCasePredicate, true>, std::__ndk1::allocator, std::__ndk1::allocator >, unsigned int> > >::find > >(std::__ndk1::basic_string_view > const&) const@@Base+0x3e> │ │ │ │ @@ -446108,15 +446108,15 @@ │ │ blx 26fe330 │ │ movs r0, #0 │ │ strb r0, [r4, r5] │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r4 │ │ bl 207d398 │ │ - cbz r0, 21a96d4 │ │ + cbz r5, 21a96de │ │ Address 0x21a96c6 is out of bounds. │ │ │ │ │ │ 021a96c8 : │ │ ldr r0, [r0, #76] @ 0x4c │ │ bx lr │ │ │ │ @@ -446278,19 +446278,19 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ nop │ │ ... │ │ movs r0, r0 │ │ subs r7, #128 @ 0x80 │ │ - stmia r7!, {r0, r2, r6, r7} │ │ + stmia r7!, {r1, r4, r5, r6, r7} │ │ cdp2 14, 0, cr13, cr9, cr6, {6} │ │ lsls r0, r3, #1 │ │ - bvc.n 21a98fe ::getHandle(celestia::engine::GeometryInfo const&)@@Base+0x7a> │ │ - mcr2 7, 0, sp, cr6, cr5, {1} │ │ + bvc.n 21a9958 │ │ + cdp2 7, 0, cr13, cr6, cr2, {3} │ │ vdot.bf16 d13, d22, d12[1] │ │ lsls r0, r3, #1 │ │ │ │ 021a9884 ::getHandle(celestia::engine::GeometryInfo const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -447036,15 +447036,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ bmi.n 21a9fea ::InfoType>::construct[abi:ne180000]::InfoType, celestia::engine::GeometryInfo const&>(ResourceManager::InfoType*, celestia::engine::GeometryInfo const&)@@Base+0x10e> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21aa04c ::InfoType>::construct[abi:ne180000]::InfoType, celestia::engine::GeometryInfo const&>(ResourceManager::InfoType*, celestia::engine::GeometryInfo const&)@@Base+0x170>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldrsh r7, [r0, r1] │ │ + ldrsh r4, [r6, r1] │ │ Address 0x21aa04e is out of bounds. │ │ │ │ │ │ 021aa050 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -457351,15 +457351,15 @@ │ │ bmi.n 21b1bb6 >::~__shared_ptr_emplace()@@Base+0x1a> │ │ │ │ 021b1c0c : │ │ ldr r0, [pc, #4] @ (21b1c14 ) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - strb r1, [r7, #0] │ │ + strb r6, [r4, #1] │ │ Address 0x21b1c16 is out of bounds. │ │ │ │ │ │ 021b1c18 , std::__ndk1::allocator > const&)@@Base>: │ │ bx lr │ │ bmi.n 21b1bc6 >::~__shared_ptr_emplace()@@Base+0x2a> │ │ │ │ @@ -457395,15 +457395,15 @@ │ │ blx 26fe330 │ │ movs r0, #0 │ │ strb r0, [r4, r5] │ │ ldr.w r8, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r4 │ │ bl 207d398 │ │ - strb r7, [r3, #0] │ │ + strb r4, [r1, #1] │ │ Address 0x21b1c7a is out of bounds. │ │ │ │ │ │ 021b1c7c : │ │ movs r0, #3 │ │ bx lr │ │ │ │ @@ -457950,15 +457950,15 @@ │ │ add sp, #8 │ │ pop {r7, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21b21e8 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bgt.n 21b2142 │ │ + bgt.n 21b219c │ │ Address 0x21b21ea is out of bounds. │ │ │ │ │ │ 021b21ec : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -458077,15 +458077,15 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [r4, #48] @ 0x30 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ strh r4, [r7, r6] │ │ lsls r0, r3, #1 │ │ - ldrb r2, [r0, #8] │ │ + ldrb r7, [r5, #8] │ │ mcr2 2, 0, r5, cr9, cr8, {7} │ │ lsls r0, r3, #1 │ │ │ │ 021b2328 : │ │ ldr r2, [r1, #0] │ │ str.w r2, [r0, #21] │ │ ldr r2, [r1, #0] │ │ @@ -458754,48 +458754,48 @@ │ │ b.n 21b2af0 │ │ mov r0, r5 │ │ blx 2706690 │ │ cmp r0, #0 │ │ beq.n 21b2af0 │ │ mov r6, fp │ │ b.n 21b2b38 │ │ - subs r1, r2, r6 │ │ - cdp2 2, 0, cr8, cr9, cr11, {2} │ │ - cdp2 7, 0, cr3, cr8, cr14, {0} │ │ + subs r6, r7, r6 │ │ + mcr2 2, 0, r8, cr9, cr8, {3} │ │ + mcr2 7, 0, r3, cr8, cr11, {1} │ │ cdp2 0, 0, cr0, cr9, cr0, {0} │ │ movs r0, r0 │ │ bmi.n 21b2a90 │ │ eors r6, r6 │ │ - ldr r0, [sp, #444] @ 0x1bc │ │ + ldr r0, [sp, #624] @ 0x270 │ │ cdp2 15, 0, cr11, cr9, cr0, {0} │ │ nop │ │ str r6, [r4, #100] @ 0x64 │ │ ldrb r6, [r4, r5] │ │ bpl.n 21b2b5a │ │ sbcs r1, r4 │ │ - ldr r0, [sp, #332] @ 0x14c │ │ - mcr2 13, 0, r7, cr9, cr8, {3} │ │ - cdp2 6, 0, cr3, cr7, cr15, {6} │ │ - vseleq.f64 d3, d25, d18 │ │ - mcr2 4, 0, lr, cr8, cr11, {3} │ │ - mcr2 3, 0, ip, cr6, cr15, {0} │ │ - mcr2 14, 0, r9, cr6, cr5, {1} │ │ + ldr r0, [sp, #512] @ 0x200 │ │ + vdot.bf16 d7, d25, d5[1] │ │ + mcr2 6, 0, r3, cr7, cr12, {7} │ │ + @ instruction: 0xfe093bcf │ │ + cdp2 4, 0, cr14, cr8, cr8, {5} │ │ + cdp2 3, 0, cr12, cr6, cr12, {2} │ │ + cdp2 14, 0, cr9, cr6, cr2, {3} │ │ mcr2 5, 0, fp, cr8, cr6, {6} │ │ cdp2 5, 0, cr11, cr9, cr10, {6} │ │ - mcr2 0, 0, sl, cr9, cr8, {6} │ │ - cdp2 5, 0, cr8, cr6, cr15, {2} │ │ - cdp2 5, 0, cr8, cr6, cr3, {2} │ │ + cdp2 1, 0, cr10, cr9, cr5, {0} │ │ + mcr2 5, 0, r8, cr6, cr12, {3} │ │ + mcr2 5, 0, r8, cr6, cr0, {3} │ │ cdp2 14, 0, cr15, cr6, cr14, {7} │ │ cdp2 14, 0, cr15, cr5, cr2, {7} │ │ - mcr2 0, 0, sl, cr5, cr4, {5} │ │ - cdp2 0, 0, cr10, cr6, cr8, {5} │ │ - cdp2 14, 0, cr11, cr6, cr3, {3} │ │ - mcr2 14, 0, fp, cr8, cr7, {2} │ │ - mcr2 3, 0, sl, cr8, cr9, {7} │ │ - cdp2 3, 0, cr10, cr7, cr13, {7} │ │ + cdp2 0, 0, cr10, cr5, cr1, {7} │ │ + mcr2 0, 0, sl, cr6, cr5, {6} │ │ + mcr2 14, 0, fp, cr6, cr0, {4} │ │ + cdp2 14, 0, cr11, cr8, cr4, {4} │ │ + cdp2 4, 0, cr10, cr8, cr6, {1} │ │ + mcr2 4, 0, sl, cr7, cr10, {0} │ │ cdp2 0, 0, cr2, cr7, cr0, {0} │ │ cmp.w r9, #0 │ │ mov r6, fp │ │ strd r0, r0, [sp, #48] @ 0x30 │ │ strd r0, r0, [sp, #96] @ 0x60 │ │ beq.n 21b2b2e │ │ add.w r0, r9, #4 │ │ @@ -459170,38 +459170,38 @@ │ │ ldr r2, [pc, #104] @ (21b2f34 ) │ │ movs r1, #0 │ │ add r3, sp, #96 @ 0x60 │ │ strd r3, r1, [sp, #8] │ │ add r2, pc │ │ movs r3, #51 @ 0x33 │ │ b.n 21b2f50 │ │ - stmia r0!, {r0, r1, r2, r4, r5, r6} │ │ - vseleq.f64 d9, d22, d3 │ │ - mcr2 10, 0, pc, cr8, cr12, {0} @ │ │ - vcmla.f16 , , d7[1], #0 │ │ - cdp2 0, 0, cr6, cr8, cr14, {2} │ │ - cdp2 0, 0, cr6, cr7, cr2, {2} │ │ - cdp2 1, 0, cr10, cr7, cr12, {4} │ │ - cdp2 1, 0, cr10, cr7, cr0, {4} │ │ - vcmla.f16 , , d12[1], #0 │ │ - mcr2 13, 0, r7, cr7, cr6, {5} │ │ - mcr2 13, 0, r9, cr8, cr0, {5} │ │ - mcr2 10, 0, fp, cr6, cr10, {6} @ │ │ - mcr2 11, 0, fp, cr8, cr14, {6} @ │ │ - cdp2 15, 0, cr3, cr7, cr1, {3} │ │ + stmia r0!, {r2, r5, r7} │ │ + mcr2 11, 0, r9, cr6, cr0, {5} @ │ │ + @ instruction: 0xfe08fa49 │ │ + mcr2 9, 0, pc, cr7, cr4, {0} @ │ │ + mcr2 0, 0, r6, cr8, cr11, {3} │ │ + cdp2 0, 0, cr6, cr7, cr15, {3} │ │ + mcr2 1, 0, sl, cr7, cr9, {5} │ │ + cdp2 1, 0, cr10, cr7, cr13, {5} │ │ + mcr2 9, 0, pc, cr7, cr9, {0} @ │ │ + vdot.bf16 , , d3[1] │ │ + mcr2 13, 0, r9, cr8, cr13, {6} │ │ + vseleq.f64 d11, d6, d7 │ │ + cdp2 12, 0, cr11, cr8, cr11, {0} │ │ + cdp2 15, 0, cr3, cr7, cr14, {4} │ │ mcr2 10, 0, pc, cr7, cr12, {7} @ │ │ - mcr2 10, 0, fp, cr5, cr1, {6} @ │ │ - mcr2 6, 0, pc, cr8, cr11, {7} @ │ │ - mcr2 12, 0, r7, cr8, cr11, {3} │ │ + mcr2 10, 0, fp, cr5, cr14, {7} @ │ │ + cdp2 7, 0, cr15, cr8, cr8, {1} │ │ + cdp2 12, 0, cr7, cr8, cr8, {5} │ │ mcr2 13, 0, ip, cr8, cr10, {2} │ │ mcr2 13, 0, ip, cr9, cr8, {1} │ │ - @ instruction: 0xfe09dbcf │ │ + mcr2 11, 0, sp, cr9, cr12, {7} @ │ │ mcr2 12, 0, ip, cr7, cr15, {3} │ │ - mcr2 6, 0, pc, cr9, cr2, {6} @ │ │ - cdp2 15, 0, cr7, cr7, cr13, {3} │ │ + mcr2 6, 0, pc, cr9, cr15, {7} @ │ │ + mcr2 15, 0, r7, cr7, cr10, {4} │ │ cdp2 1, 0, cr15, cr6, cr12, {2} │ │ b.n 21b2dc2 │ │ ldr r1, [r0, #8] │ │ cmp r1, #0 │ │ bmi.n 21b2f58 │ │ ldr r2, [pc, #832] @ (21b3284 ) │ │ movs r1, #0 │ │ @@ -459510,29 +459510,29 @@ │ │ nop │ │ str r6, [r4, #100] @ 0x64 │ │ ldrb r6, [r4, r5] │ │ bpl.n 21b333a , std::__ndk1::allocator > >(char const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&) const@@Base+0x76> │ │ sbcs r1, r4 │ │ ldr r6, [pc, #720] @ (21b3554 , std::__ndk1::allocator > >(char const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&) const@@Base+0x290>) │ │ lsls r0, r3, #1 │ │ - cbnz r1, 21b3288 │ │ - cdp2 7, 0, cr5, cr8, cr6, {7} │ │ - mcr2 7, 0, r5, cr8, cr10, {6} │ │ - mcr2 9, 0, sp, cr8, cr12, {6} @ │ │ - cdp2 14, 0, cr2, cr7, cr4, {2} │ │ - mcr2 14, 0, r2, cr9, cr2, {0} │ │ - cdp2 7, 0, cr5, cr9, cr3, {2} │ │ - cdp2 7, 0, cr5, cr8, cr1, {1} │ │ - mcr2 3, 0, r5, cr8, cr5, {6} │ │ - mcr2 13, 0, r3, cr9, cr5, {0} │ │ - mcr2 9, 0, r7, cr7, cr3, {5} @ │ │ - mcr2 5, 0, pc, cr8, cr14, {6} @ │ │ - cdp2 5, 0, cr15, cr7, cr14, {5} │ │ - mcr2 2, 0, r3, cr7, cr4, {0} │ │ - vdot.bf16 d2, d8, d13[0] │ │ + cbnz r6, 21b3292 │ │ + vfmal.f16 d5, s16, s6[0] │ │ + vcmla.f16 d5, d8, d7[0], #0 │ │ + vseleq.f32 s26, s16, s18 │ │ + mcr2 14, 0, r2, cr7, cr1, {3} │ │ + mcr2 14, 0, r2, cr9, cr15, {1} │ │ + mcr2 7, 0, r5, cr9, cr0, {3} │ │ + cdp2 7, 0, cr5, cr8, cr14, {2} │ │ + cdp2 4, 0, cr5, cr8, cr2, {0} │ │ + vdot.bf16 , , d2[0] │ │ + @ instruction: 0xfe0779e0 │ │ + cdp2 6, 0, cr15, cr8, cr11, {0} │ │ + mcr2 5, 0, pc, cr7, cr11, {6} @ │ │ + cdp2 2, 0, cr3, cr7, cr1, {2} │ │ + mcr2 13, 0, r2, cr8, cr10, {1} │ │ mcr2 6, 0, r4, cr9, cr6, {2} │ │ lsls r0, r3, #1 │ │ │ │ 021b32c4 , std::__ndk1::allocator > >(char const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -459885,32 +459885,32 @@ │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ eors r6, r4 │ │ cmp r5, #24 │ │ strb r4, [r0, r1] │ │ movs r1, #251 @ 0xfb │ │ ands r1, r1 │ │ - ldrb r3, [r3, #13] │ │ + ldrb r0, [r1, #14] │ │ cdp2 2, 0, cr4, cr6, cr0, {3} │ │ lsls r0, r3, #1 │ │ - bcc.n 21b3760 , std::__ndk1::allocator > >(char const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&) const@@Base+0x49c> │ │ - mcr2 0, 0, pc, cr8, cr10, {6} @ │ │ - cdp2 15, 0, cr2, cr8, cr15, {6} │ │ - mcr2 2, 0, sp, cr8, cr15, {7} │ │ - vfmal.f16 , d8, d7[2] │ │ - mcr2 0, 0, pc, cr6, cr15, {0} @ │ │ - mcr2 3, 0, fp, cr8, cr11, {0} │ │ - mcr2 5, 0, r9, cr8, cr3, {5} │ │ - cdp2 0, 0, cr15, cr6, cr1, {2} │ │ - vseleq.f16 s18, s16, s5 │ │ - mcr2 6, 0, fp, cr7, cr3, {4} │ │ - mcr2 14, 0, r2, cr6, cr5, {4} │ │ - mcr2 4, 0, sp, cr8, cr10, {6} │ │ - cdp2 6, 0, cr11, cr7, cr1, {1} │ │ - cdp2 3, 0, cr11, cr6, cr13, {3} │ │ + bcc.n 21b35ba , std::__ndk1::allocator > >(char const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&) const@@Base+0x2f6> │ │ + cdp2 1, 0, cr15, cr8, cr7, {0} │ │ + mcr2 15, 0, r2, cr8, cr12, {7} │ │ + cdp2 3, 0, cr13, cr8, cr12, {1} │ │ + vcmla.f16 d13, d24, d4[1], #0 │ │ + cdp2 0, 0, cr15, cr6, cr12, {2} │ │ + cdp2 3, 0, cr11, cr8, cr8, {2} │ │ + cdp2 5, 0, cr9, cr8, cr0, {7} │ │ + cdp2 0, 0, cr15, cr6, cr14, {3} │ │ + @ instruction: 0xfe08994f │ │ + cdp2 6, 0, cr11, cr7, cr0, {6} │ │ + cdp2 14, 0, cr2, cr6, cr2, {6} │ │ + cdp2 5, 0, cr13, cr8, cr7, {0} │ │ + cdp2 6, 0, cr11, cr7, cr14, {2} │ │ + mcr2 3, 0, fp, cr6, cr10, {4} │ │ mcr2 1, 0, r4, cr7, cr2, {5} │ │ lsls r0, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ mov r5, r0 │ │ movs r0, #48 @ 0x30 │ │ @@ -460111,26 +460111,26 @@ │ │ ldrb r6, [r4, r5] │ │ bpl.n 21b39b2 │ │ sbcs r1, r4 │ │ movs r0, r0 │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ eors r6, r4 │ │ - bcs.n 21b38f4 , std::__ndk1::allocator > >(char const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&) const@@Base+0x630> │ │ + bcc.n 21b394e , std::__ndk1::allocator > >(char const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&) const@@Base+0x68a> │ │ mcr2 14, 0, r3, cr7, cr4, {1} │ │ lsls r0, r3, #1 │ │ orrs r2, r7 │ │ lsls r0, r3, #1 │ │ subs r4, #244 @ 0xf4 │ │ lsls r0, r3, #1 │ │ - cbz r3, 21b3992 , std::__ndk1::allocator > >(char const*, std::__ndk1::basic_string, std::__ndk1::allocator > const&) const@@Base+0x6ce> │ │ - cdp2 7, 0, cr1, cr6, cr15, {0} │ │ - vseleq.f64 d4, d23, d5 │ │ - cdp2 6, 0, cr5, cr9, cr2, {3} │ │ - mcr2 3, 0, r5, cr6, cr1, {6} │ │ + push {r3, r5} │ │ + mcr2 7, 0, r1, cr6, cr12, {1} │ │ + mcr2 11, 0, r4, cr7, cr2, {5} @ │ │ + cdp2 6, 0, cr5, cr9, cr15, {4} │ │ + mcr2 3, 0, r5, cr6, cr14, {7} │ │ mcr2 5, 0, fp, cr7, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ mov r8, r0 │ │ movs r0, #48 @ 0x30 │ │ mov r6, r2 │ │ mov r5, r1 │ │ @@ -460462,34 +460462,34 @@ │ │ ldr r0, [sp, #80] @ 0x50 │ │ str r5, [sp, #84] @ 0x54 │ │ blx 26ffad0 │ │ cbz r4, 21b3cd4 │ │ strd r4, sl, [fp] │ │ b.n 21b4394 │ │ nop │ │ - bl 2289894 │ │ - asrs r0, r6, #19 │ │ - mcr2 14, 0, sl, cr7, cr4, {4} │ │ - cdp2 5, 0, cr8, cr7, cr13, {6} │ │ - mcr2 5, 0, r8, cr9, cr11, {5} │ │ + bl 22b6894 │ │ + asrs r5, r3, #20 │ │ + cdp2 14, 0, cr10, cr7, cr1, {6} │ │ + mcr2 5, 0, r8, cr7, cr10, {7} │ │ + cdp2 5, 0, cr8, cr9, cr8, {7} │ │ mcr2 10, 0, fp, cr9, cr9, {4} @ │ │ - mcr2 9, 0, r2, cr9, cr8, {2} @ │ │ - mcr2 9, 0, lr, cr8, cr2, {3} @ │ │ - cdp2 0, 0, cr11, cr8, cr12, {7} │ │ - cdp2 0, 0, cr11, cr6, cr0, {7} │ │ - cdp2 15, 0, cr8, cr6, cr9, {2} │ │ - mcr2 15, 0, r8, cr6, cr13, {1} │ │ - mcr2 14, 0, lr, cr6, cr6, {7} │ │ - mcr2 1, 0, sp, cr6, cr11, {3} │ │ - cdp2 0, 0, cr11, cr6, cr13, {0} │ │ - vseleq.f64 d8, d6, d19 │ │ + vseleq.f16 s4, s19, s10 │ │ + mcr2 9, 0, lr, cr8, cr15, {4} @ │ │ + mcr2 1, 0, fp, cr8, cr9, {0} │ │ + cdp2 1, 0, cr11, cr6, cr13, {0} │ │ + mcr2 15, 0, r8, cr6, cr6, {3} │ │ + cdp2 15, 0, cr8, cr6, cr10, {3} │ │ + cdp2 15, 0, cr14, cr6, cr3, {1} │ │ + cdp2 1, 0, cr13, cr6, cr8, {5} │ │ + mcr2 0, 0, fp, cr6, cr10, {1} │ │ + mcr2 11, 0, r8, cr6, cr0, {2} @ │ │ cdp2 3, 0, cr10, cr8, cr13, {0} │ │ cdp2 3, 0, cr10, cr9, cr1, {0} │ │ - mcr2 14, 0, r8, cr9, cr3, {4} │ │ - cdp2 14, 0, cr8, cr6, cr7, {4} │ │ + cdp2 14, 0, cr8, cr9, cr0, {6} │ │ + mcr2 14, 0, r8, cr6, cr4, {5} │ │ mcr2 1, 0, pc, cr6, cr10, {5} @ │ │ lsrs r0, r0, #28 │ │ beq.n 21b3d06 │ │ add.w r0, sl, #4 │ │ dmb ish │ │ ldrex r1, [r0] │ │ subs r2, r1, #1 │ │ @@ -460842,43 +460842,43 @@ │ │ bl 21b4660 │ │ b.n 21b4394 │ │ blx 26ffdc0 │ │ ldr r1, [pc, #100] @ (21b411c ) │ │ add r1, pc │ │ b.n 21b4386 │ │ nop │ │ - ldmia r5!, {r1, r3} │ │ - mcr2 10, 0, r4, cr7, cr12, {7} @ │ │ - mcr2 13, 0, r6, cr8, cr6, {0} │ │ - mcr2 13, 0, r8, cr8, cr0, {0} │ │ - mcr2 1, 0, r2, cr6, cr3, {0} │ │ - @ instruction: 0xfe09aae6 │ │ - cdp2 4, 0, cr0, cr8, cr13, {5} │ │ - mcr2 11, 0, r6, cr9, cr14, {7} @ │ │ - mcr2 11, 0, r6, cr8, cr8, {6} @ │ │ - mcr2 12, 0, sl, cr8, cr5, {5} │ │ - cdp2 12, 0, cr10, cr6, cr9, {5} │ │ + ldmia r5, {r0, r1, r2, r4, r5} │ │ + vseleq.f64 d4, d7, d25 │ │ + vdot.bf16 q3, q4, d3[0] │ │ + mcr2 13, 0, r8, cr8, cr13, {1} │ │ + cdp2 1, 0, cr2, cr6, cr0, {2} │ │ + mcr2 11, 0, sl, cr9, cr3, {0} @ │ │ + mcr2 4, 0, r0, cr8, cr10, {6} │ │ + cdp2 12, 0, cr6, cr9, cr11, {1} │ │ + cdp2 12, 0, cr6, cr8, cr5, {0} │ │ + cdp2 12, 0, cr10, cr8, cr2, {7} │ │ + mcr2 12, 0, sl, cr6, cr6, {6} │ │ mcr2 12, 0, fp, cr6, cr5, {0} │ │ - vfmal.f16 q2, d25, d5[3] │ │ - vdot.bf16 d12, d24, d7[0] │ │ - mcr2 0, 0, r1, cr6, cr4, {1} │ │ - @ instruction: 0xfe07cac8 │ │ - mcr2 5, 0, lr, cr7, cr3, {2} │ │ - cdp2 14, 0, cr8, cr8, cr2, {2} │ │ - mcr2 11, 0, r6, cr7, cr10, {1} @ │ │ + vseleq.f16 s8, s18, s21 │ │ + mcr2 13, 0, ip, cr8, cr4, {5} │ │ + cdp2 0, 0, cr1, cr6, cr1, {3} │ │ + mcr2 10, 0, ip, cr7, cr5, {7} @ │ │ + cdp2 5, 0, cr14, cr7, cr0, {4} │ │ + cdp2 14, 0, cr8, cr8, cr15, {3} │ │ + @ instruction: 0xfe076b67 │ │ cdp2 0, 0, cr0, cr7, cr0, {0} │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ eors r6, r4 │ │ cmp r5, #24 │ │ strb r4, [r0, r1] │ │ movs r1, #251 @ 0xfb │ │ ands r1, r1 │ │ - strh r3, [r1, #50] @ 0x32 │ │ - cdp2 5, 0, cr8, cr8, cr9, {7} │ │ + strh r0, [r7, #50] @ 0x32 │ │ + mcr2 6, 0, r8, cr8, cr6, {0} │ │ cdp2 1, 0, cr2, cr8, cr0, {0} │ │ cmp r4, #0 │ │ strd r1, r1, [sp, #48] @ 0x30 │ │ it ne │ │ cmpne r0, #0 │ │ bne.w 21b425a │ │ movs r0, #192 @ 0xc0 │ │ @@ -461205,16 +461205,16 @@ │ │ movs r0, #0 │ │ strd r0, r0, [sp, #96] @ 0x60 │ │ mov r0, r4 │ │ bl 21b4e5c │ │ b.n 21b4394 │ │ subs r2, #70 @ 0x46 │ │ lsls r0, r3, #1 │ │ - ldmia r0!, {r2, r3, r4, r6, r7} │ │ - vcmla.f16 q4, , d2[1], #0 │ │ + ldmia r1!, {r0, r3} │ │ + vcmla.f16 d8, d23, d15[0], #0 │ │ @ instruction: 0xfe0639c0 │ │ lsls r0, r3, #1 │ │ vcmp.f64 d16, #0.0 │ │ vmrs APSR_nzcv, fpscr │ │ bne.n 21b4512 │ │ add r0, sp, #32 │ │ add r1, sp, #40 @ 0x28 │ │ @@ -461307,28 +461307,28 @@ │ │ stmia r0!, {r1, r2, r4, r5, r6} │ │ movs r0, r0 │ │ orrs r4, r6 │ │ lsrs r3, r3, #31 │ │ eors r1, r1 │ │ subs r3, #238 @ 0xee │ │ lsls r0, r3, #1 │ │ - add r1, sp, #380 @ 0x17c │ │ - mcr2 11, 0, r6, cr6, cr4, {6} @ │ │ - @ instruction: 0xfe066bc8 │ │ - cdp2 4, 0, cr8, cr6, cr11, {3} │ │ - vseleq.f64 d2, d8, d17 │ │ - cdp2 4, 0, cr0, cr6, cr7, {7} │ │ - mcr2 12, 0, r0, cr6, cr11, {5} │ │ - vseleq.f64 d2, d7, d29 │ │ - vcmla.f16 d6, d6, d1[1], #0 │ │ - vseleq.f16 s4, s15, s14 │ │ - cdp2 15, 0, cr3, cr7, cr5, {5} │ │ + add r1, sp, #560 @ 0x230 │ │ + cdp2 12, 0, cr6, cr6, cr1, {0} │ │ + mcr2 11, 0, r6, cr6, cr5, {7} @ │ │ + mcr2 4, 0, r8, cr6, cr8, {4} │ │ + @ instruction: 0xfe082b4e │ │ + mcr2 5, 0, r0, cr6, cr4, {0} │ │ + cdp2 12, 0, cr0, cr6, cr8, {7} │ │ + mcr2 11, 0, r2, cr7, cr10, {2} @ │ │ + vcmla.f16 q3, q3, d14[0], #0 │ │ + mcr2 9, 0, r2, cr7, cr4, {5} @ │ │ + mcr2 15, 0, r3, cr7, cr2, {6} │ │ cdp2 7, 0, cr11, cr9, cr0, {3} │ │ - vseleq.f16 s16, s19, s21 │ │ - mcr2 3, 0, r0, cr7, cr13, {3} │ │ + mcr2 9, 0, r8, cr9, cr7, {6} @ │ │ + cdp2 3, 0, cr0, cr7, cr10, {5} │ │ cdp2 2, 0, cr3, cr6, cr4, {1} │ │ lsls r0, r3, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r4, [r0, #4] │ │ cbz r4, 21b4658 │ │ adds r1, r4, #4 │ │ @@ -461496,21 +461496,21 @@ │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ eors r6, r4 │ │ cmp r5, #24 │ │ strb r4, [r0, r1] │ │ movs r1, #251 @ 0xfb │ │ ands r1, r1 │ │ - stmia r6!, {r0, r4, r5, r6} │ │ + stmia r6!, {r1, r2, r3, r4, r7} │ │ mcr2 15, 0, r2, cr6, cr14, {1} │ │ lsls r0, r3, #1 │ │ - lsrs r4, r1, #4 │ │ - cdp2 3, 0, cr12, cr7, cr0, {5} │ │ - cdp2 14, 0, cr13, cr7, cr11, {1} │ │ - mcr2 7, 0, r8, cr8, cr10, {0} │ │ + lsrs r1, r7, #4 │ │ + cdp2 3, 0, cr12, cr7, cr13, {6} │ │ + mcr2 14, 0, sp, cr7, cr8, {2} │ │ + cdp2 7, 0, cr8, cr8, cr7, {2} │ │ mcr2 3, 0, r3, cr7, cr10, {7} │ │ lsls r0, r3, #1 │ │ cmp r5, #230 @ 0xe6 │ │ lsls r0, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -461690,19 +461690,19 @@ │ │ strb r4, [r0, r1] │ │ moval r1, #251 @ 0xfb │ │ andal r1, r1 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ - lsls r0, r7, #29 │ │ + lsls r5, r4, #30 │ │ vdot.bf16 q1, , d6[1] │ │ lsls r0, r3, #1 │ │ - bgt.n 21b49aa │ │ - cdp2 5, 0, cr8, cr8, cr14, {4} │ │ + bgt.n 21b4a04 │ │ + mcr2 5, 0, r8, cr8, cr11, {5} │ │ mcr2 15, 0, r2, cr7, cr14, {3} │ │ lsls r0, r3, #1 │ │ cmp r3, #178 @ 0xb2 │ │ lsls r0, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -461878,19 +461878,19 @@ │ │ strb r4, [r0, r1] │ │ moval r1, #251 @ 0xfb │ │ andal r1, r1 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ - add lr, r6 │ │ + add fp, ip │ │ mcr2 11, 0, r2, cr6, cr6, {0} @ │ │ lsls r0, r3, #1 │ │ - add r1, pc, #428 @ (adr r1, 21b4e68 ) │ │ - cdp2 3, 0, cr8, cr6, cr12, {2} │ │ + add r1, pc, #608 @ (adr r1, 21b4f1c ) │ │ + mcr2 3, 0, r8, cr6, cr9, {3} │ │ mcr2 13, 0, r2, cr7, cr0, {1} │ │ lsls r0, r3, #1 │ │ cmp r1, #100 @ 0x64 │ │ lsls r0, r3, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8-d11} │ │ @@ -462789,35 +462789,35 @@ │ │ ldrd r0, r1, [sp, #56] @ 0x38 │ │ strd r0, r1, [r9] │ │ movs r0, #0 │ │ strd r0, r0, [sp, #56] @ 0x38 │ │ mov r0, r5 │ │ bl 21b61c4 >::~__shared_ptr_emplace()@@Base+0xb0> │ │ b.n 21b5526 │ │ - lsrs r0, r7, #17 │ │ + lsrs r5, r4, #18 │ │ vfmal.f16 q1, d9, d0[3] │ │ lsls r0, r3, #1 │ │ - bl 1e7e272 │ │ - bcs.n 21b55c2 │ │ - mcr2 1, 0, sp, cr7, cr11, {5} │ │ - cdp2 5, 0, cr9, cr8, cr7, {4} │ │ + bl 1eab272 │ │ + bcs.n 21b561c │ │ + cdp2 1, 0, cr13, cr7, cr8, {7} │ │ + mcr2 5, 0, r9, cr8, cr4, {5} │ │ cdp2 7, 0, cr2, cr7, cr0, {4} │ │ lsls r0, r3, #1 │ │ - strb r1, [r1, #27] │ │ - mcr2 10, 0, r1, cr6, cr8, {6} @ │ │ - cdp2 14, 0, cr14, cr6, cr8, {2} │ │ - mcr2 4, 0, r3, cr8, cr4, {0} │ │ - cdp2 4, 0, cr9, cr8, cr14, {0} │ │ - mcr2 1, 0, r7, cr8, cr12, {6} │ │ - mcr2 15, 0, ip, cr8, cr11, {6} │ │ - vseleq.f16 s2, s17, s13 │ │ - cdp2 4, 0, cr5, cr6, cr15, {4} │ │ + strb r6, [r6, #27] │ │ + vseleq.f64 d1, d6, d5 │ │ + mcr2 14, 0, lr, cr6, cr5, {3} │ │ + cdp2 4, 0, cr3, cr8, cr1, {2} │ │ + mcr2 4, 0, r9, cr8, cr11, {1} │ │ + cdp2 2, 0, cr7, cr8, cr9, {0} │ │ + cdp2 0, 0, cr13, cr8, cr8, {0} │ │ + mcr2 9, 0, r1, cr8, cr3, {6} @ │ │ + mcr2 4, 0, r5, cr6, cr12, {5} │ │ mcr2 5, 0, r2, cr8, cr8, {3} │ │ lsls r0, r3, #1 │ │ - ldr r4, [r0, #36] @ 0x24 │ │ + ldr r1, [r6, #36] @ 0x24 │ │ cdp2 6, 0, cr4, cr9, cr2, {5} │ │ blx 26ffdc0 │ │ ldr r1, [r0, #8] │ │ movs r5, #0 │ │ cmp r1, #0 │ │ bmi.n 21b55e2 │ │ ldrd r1, r3, [r6, #4] │ │ @@ -463139,31 +463139,31 @@ │ │ mov r0, r5 │ │ blx 2701060 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ movs r3, #16 │ │ lsls r0, r3, #1 │ │ - adds r7, r2, r1 │ │ - mcr2 14, 0, ip, cr6, cr7, {7} │ │ - vdot.bf16 q7, , d11[0] │ │ - cdp2 3, 0, cr4, cr7, cr1, {5} │ │ - cdp2 5, 0, cr5, cr9, cr14, {6} │ │ - vfmal.f16 , d22, d2[2] │ │ - vcmla.f16 d6, d6, d11[0], #0 │ │ - mcr2 13, 0, r4, cr9, cr4, {7} │ │ - @ instruction: 0xfe072a69 │ │ - cdp2 12, 0, cr2, cr9, cr13, {0} │ │ - mcr2 0, 0, r3, cr9, cr2, {5} │ │ - cdp2 1, 0, cr5, cr8, cr12, {5} │ │ - cdp2 0, 0, cr3, cr8, cr13, {2} │ │ - cdp2 12, 0, cr2, cr8, cr12, {1} │ │ - cdp2 3, 0, cr13, cr9, cr0, {4} │ │ - mcr2 4, 0, r7, cr6, cr11, {7} │ │ - cdp2 3, 0, cr4, cr7, cr3, {1} │ │ + adds r4, r0, r2 │ │ + cdp2 15, 0, cr12, cr6, cr4, {1} │ │ + mcr2 13, 0, lr, cr7, cr8, {7} │ │ + cdp2 3, 0, cr4, cr7, cr14, {6} │ │ + mcr2 5, 0, r5, cr9, cr11, {7} │ │ + mcr2 9, 0, pc, cr6, cr15, {0} @ │ │ + vfmal.f16 d6, s12, s1[1] │ │ + cdp2 14, 0, cr4, cr9, cr1, {1} │ │ + mcr2 10, 0, r2, cr7, cr6, {4} @ │ │ + mcr2 12, 0, r2, cr9, cr10, {1} │ │ + mcr2 0, 0, r3, cr9, cr15, {6} │ │ + mcr2 1, 0, r5, cr8, cr9, {6} │ │ + mcr2 0, 0, r3, cr8, cr10, {3} │ │ + mcr2 12, 0, r2, cr8, cr9, {2} │ │ + cdp2 3, 0, cr13, cr9, cr13, {5} │ │ + cdp2 5, 0, cr7, cr6, cr8, {1} │ │ + mcr2 3, 0, r4, cr7, cr0, {2} │ │ mcr2 0, 0, r2, cr9, cr0, {4} │ │ lsls r0, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ mov r9, r3 │ │ blx 2701c90 │ │ @@ -464129,19 +464129,19 @@ │ │ ldr r1, [r1, #0] │ │ cmp r1, r0 │ │ ittt eq │ │ addeq sp, #40 @ 0x28 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ - lsrs r0, r1, #17 │ │ + lsrs r5, r6, #17 │ │ cdp2 2, 0, cr1, cr6, cr6, {7} │ │ lsls r0, r3, #1 │ │ - str r6, [r5, #124] @ 0x7c │ │ - cdp2 3, 0, cr10, cr6, cr14, {7} │ │ + ldr r3, [r3, #0] │ │ + mcr2 4, 0, sl, cr6, cr11, {0} │ │ cdp2 2, 0, cr1, cr8, cr14, {1} │ │ lsls r0, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #32 │ │ ldr r1, [pc, #416] @ (21b6564 >::~__shared_ptr_emplace()@@Base+0x450>) │ │ @@ -464308,28 +464308,28 @@ │ │ mov.w r5, #4294967295 @ 0xffffffff │ │ b.n 21b6532 >::~__shared_ptr_emplace()@@Base+0x41e> │ │ movs r5, #3 │ │ b.n 21b6532 >::~__shared_ptr_emplace()@@Base+0x41e> │ │ mvn.w r5, #1 │ │ b.n 21b6532 >::~__shared_ptr_emplace()@@Base+0x41e> │ │ nop │ │ - cmp sl, pc │ │ + mov r7, r4 │ │ mcr2 1, 0, r1, cr8, cr4, {7} │ │ lsls r0, r3, #1 │ │ - adds r7, #134 @ 0x86 │ │ - mcr2 12, 0, fp, cr9, cr0, {7} │ │ - cdp2 6, 0, cr12, cr7, cr5, {5} │ │ - cdp2 4, 0, cr15, cr6, cr15, {5} │ │ - cdp2 4, 0, cr8, cr8, cr1, {7} │ │ - cdp2 4, 0, cr5, cr8, cr11, {5} │ │ + adds r7, #179 @ 0xb3 │ │ + mcr2 13, 0, fp, cr9, cr13, {0} │ │ + mcr2 6, 0, ip, cr7, cr2, {6} │ │ + mcr2 4, 0, pc, cr6, cr12, {6} @ │ │ + cdp2 5, 0, cr8, cr8, cr14, {0} │ │ + mcr2 4, 0, r5, cr8, cr8, {6} │ │ mcr2 10, 0, r7, cr9, cr11, {4} @ │ │ - cdp2 0, 0, cr14, cr9, cr15, {3} │ │ + mcr2 0, 0, lr, cr9, cr12, {4} │ │ @ instruction: 0xfe077a60 │ │ - cdp2 7, 0, cr3, cr9, cr4, {7} │ │ - vseleq.f64 d14, d9, d4 │ │ + vfmal.f16 d3, s18, s2[0] │ │ + mcr2 11, 0, lr, cr9, cr1, {1} @ │ │ cdp2 0, 0, cr1, cr6, cr6, {4} │ │ lsls r0, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #112 @ 0x70 │ │ mov r6, r1 │ │ @@ -464636,23 +464636,23 @@ │ │ bl 2134e80 * CelxLua::safeGetClass >(int, FatalErrors, char const*)@@Base+0x70> │ │ blx 26ffaf0 │ │ b.n 21b68d8 >::~__shared_ptr_emplace()@@Base+0x7c4> │ │ add r0, sp, #48 @ 0x30 │ │ blx 2708c50 │ │ blx 26ffaf0 │ │ nop │ │ - lsrs r2, r4, #6 │ │ + lsrs r7, r1, #7 │ │ cdp2 0, 0, cr1, cr6, cr10, {0} │ │ lsls r0, r3, #1 │ │ - movs r6, #152 @ 0x98 │ │ - cdp2 4, 0, cr10, cr7, cr8, {3} │ │ - cdp2 1, 0, cr14, cr7, cr0, {7} │ │ - mcr2 11, 0, sp, cr5, cr10, {2} @ │ │ + movs r6, #197 @ 0xc5 │ │ + mcr2 4, 0, sl, cr7, cr5, {4} │ │ + cdp2 2, 0, cr14, cr7, cr13, {0} │ │ + vseleq.f64 d13, d21, d7 │ │ mcr2 13, 0, r8, cr8, cr9, {4} │ │ - mcr2 9, 0, r5, cr9, cr2, {6} @ │ │ + mcr2 9, 0, r5, cr9, cr15, {7} @ │ │ cdp2 14, 0, cr0, cr9, cr4, {2} │ │ lsls r0, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #16 │ │ mov r6, r1 │ │ @@ -464796,18 +464796,18 @@ │ │ cmp r1, r0 │ │ ittt eq │ │ addeq sp, #40 @ 0x28 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ - subs r0, r3, #3 │ │ + subs r5, r0, #4 │ │ @ instruction: 0xfe080be0 │ │ lsls r0, r3, #1 │ │ - add r0, pc, #324 @ (adr r0, 21b6bd4 >::~__shared_ptr_emplace()@@Base+0x10>) │ │ + add r0, pc, #504 @ (adr r0, 21b6c88 ) │ │ mcr2 11, 0, r0, cr7, cr0, {2} @ │ │ lsls r0, r3, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #40 @ 0x28 │ │ mov r6, r1 │ │ @@ -464889,18 +464889,18 @@ │ │ ldr r1, [r1, #0] │ │ cmp r1, r0 │ │ ittt eq │ │ addeq sp, #40 @ 0x28 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ - subs r2, #236 @ 0xec │ │ + subs r3, #25 │ │ mcr2 11, 0, r0, cr7, cr4, {0} @ │ │ lsls r0, r3, #1 │ │ - bge.n 21b6bc8 >::~__shared_ptr_emplace()@@Base+0x4> │ │ + bge.n 21b6c22 >::~__shared_ptr_emplace()@@Base+0xa> │ │ mcr2 13, 0, fp, cr7, cr3, {1} │ │ @ instruction: 0xfe050a62 │ │ lsls r0, r3, #1 │ │ │ │ 021b6b84 >::~__shared_ptr_emplace()@@Base>: │ │ ldr r1, [pc, #12] @ (21b6b94 >::~__shared_ptr_emplace()@@Base+0x10>) │ │ add r1, pc │ │ @@ -466551,15 +466551,15 @@ │ │ blx 26ffaf0 │ │ nop │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ push {r2, r3, r5} │ │ adcs r2, r0 │ │ @ instruction: 0xfa7a0057 │ │ - mov ip, r1 │ │ + mov r9, r7 │ │ mcr2 9, 0, pc, cr6, cr2, {5} @ │ │ lsls r7, r2, #1 │ │ bmi.n 21b7bf8 │ │ bmi.n 21b7bfa │ │ │ │ 021b7c50 const&, float, double, Matrices const&) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -467563,15 +467563,15 @@ │ │ mov.w r8, #69 @ 0x45 │ │ vmov r0, s0 │ │ rsb r0, r0, #360 @ 0x168 │ │ b.n 21b896a const&, float, double, Matrices const&) const@@Base+0xd1a> │ │ movs r0, #0 │ │ mov.w r8, #69 @ 0x45 │ │ b.n 21b896a const&, float, double, Matrices const&) const@@Base+0xd1a> │ │ - lsls r6, r0, #10 │ │ + lsls r3, r6, #10 │ │ cdp2 0, 0, cr0, cr7, cr0, {0} │ │ movs r0, r0 │ │ strh r0, [r0, #0] │ │ eors r6, r4 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, #0 │ │ @@ -467712,17 +467712,17 @@ │ │ movs r0, r0 │ │ subs r7, #128 @ 0x80 │ │ movs r0, r0 │ │ movs r0, r0 │ │ vst4.16 {d16-d19}, [r6 :64], r7 │ │ @ instruction: 0xf2e20057 │ │ adc.w r0, sl, r7, lsr #1 │ │ - vcge.f32 d15, d0, d6 │ │ - cdp2 14, 10, cr15, cr12, cr6, {0} │ │ - cdp2 14, 9, cr15, cr2, cr6, {0} │ │ + vcgt.f32 d15, d13, d6 │ │ + cdp2 14, 13, cr15, cr9, cr6, {0} │ │ + cdp2 14, 11, cr15, cr15, cr6, {0} │ │ │ │ 021b8b18 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d9} │ │ @@ -469026,15 +469026,15 @@ │ │ bx lr │ │ bmi.n 21b9b06 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21b9b68 ::~OctreeProcessor()@@Base+0x10>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - str r3, [r5, #48] @ 0x30 │ │ + str r0, [r3, #52] @ 0x34 │ │ Address 0x21b9b6a is out of bounds. │ │ │ │ │ │ 021b9b6c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -469086,15 +469086,15 @@ │ │ ldr r1, [pc, #12] @ (21b9c04 ) │ │ add r1, pc │ │ blx 2703f40 │ │ str r0, [r4, #28] │ │ movs r0, #1 │ │ strb r0, [r4, #20] │ │ pop {r4, r6, r7, pc} │ │ - @ instruction: 0xeb9bfe06 │ │ + @ instruction: 0xebc8fe06 │ │ │ │ 021b9c08 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #24 │ │ mov r4, r0 │ │ ldr r0, [pc, #64] @ (21b9c54 ) │ │ @@ -469230,15 +469230,15 @@ │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ svc 6 │ │ lsls r7, r2, #1 │ │ bhi.n 21b9d40 │ │ lsls r7, r2, #1 │ │ - @ instruction: 0xeabafe07 │ │ + @ instruction: 0xeae7fe07 │ │ udf #160 @ 0xa0 │ │ lsls r7, r2, #1 │ │ bhi.n 21b9c6c │ │ lsls r7, r2, #1 │ │ │ │ 021b9d5c : │ │ push {r7, lr} │ │ @@ -470574,15 +470574,15 @@ │ │ vldr s0, [r8, #28] │ │ b.n 21bab92 │ │ nop │ │ ldmia r7!, {r1, r2, r5} │ │ lsls r7, r2, #1 │ │ bcs.n 21baad8 │ │ lsls r7, r2, #1 │ │ - eors r4, r6 │ │ + lsls r1, r4 │ │ mcr2 13, 0, pc, cr8, cr1, {3} @ │ │ muls r7, r7 │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldrb.w r0, [r8, #9] │ │ cbz r0, 21bab9e │ │ ldr.w r0, [r8, #4] │ │ @@ -481838,15 +481838,15 @@ │ │ nop {15} │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldr r1, [pc, #80] @ (21c2fc8 ) │ │ lsls r7, r2, #1 │ │ mov sl, r1 │ │ lsls r7, r2, #1 │ │ - bhi.n 21c2ee2 > const&, Observer const&, double)@@Base+0x252> │ │ + bhi.n 21c2f3c > const&, Observer const&, double)@@Base+0x2ac> │ │ Address 0x21c2f7e is out of bounds. │ │ │ │ │ │ 021c2f80 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -482175,18 +482175,18 @@ │ │ lsls r7, r2, #1 │ │ @ instruction: 0xb640 │ │ lsls r4, r3, #1 │ │ mov r8, r4 │ │ lsls r7, r2, #1 │ │ @ instruction: 0xb806 │ │ lsls r4, r3, #1 │ │ - bpl.n 21c337e │ │ + bpl.n 21c33d8 │ │ mcr2 6, 0, fp, cr5, cr10, {7} │ │ lsls r4, r3, #1 │ │ - bcc.n 21c333e │ │ + bmi.n 21c3398 │ │ mcr2 3, 0, r4, cr5, cr2, {0} │ │ lsls r7, r2, #1 │ │ │ │ 021c3370 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -490421,15 +490421,15 @@ │ │ adds r0, #1 │ │ str.w r0, [r9, #8] │ │ ldr r1, [pc, #12] @ (21c97f8 , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > >&) const@@Base+0x9c>) │ │ add r1, pc │ │ add.w r0, r6, #28 │ │ blx 2703ac0 │ │ b.n 21c97fc , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > >&) const@@Base+0xa0> │ │ - mcrr 14, 0, pc, r6, cr7 @ │ │ + ldcl 14, cr15, [r3], #-28 @ 0xffffffe4 │ │ ldrb.w r0, [sp, #88] @ 0x58 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #96] @ 0x60 │ │ blxne 26ffad0 │ │ ldr r0, [pc, #24] @ (21c9824 , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > >&) const@@Base+0xc8>) │ │ add r0, pc │ │ @@ -490802,19 +490802,19 @@ │ │ mov r4, r0 │ │ cmp r5, #0 │ │ bne.n 21c9cfe , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > >&) const@@Base+0x5a2> │ │ movs r0, #40 @ 0x28 │ │ blx 26ffb80 │ │ b.n 21c9cb4 , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > >&) const@@Base+0x558> │ │ nop │ │ - asrs r6, r4, #2 │ │ + asrs r3, r2, #3 │ │ cdp2 15, 0, cr7, cr6, cr8, {5} │ │ mcr2 14, 0, sp, cr8, cr12, {7} │ │ lsls r6, r2, #1 │ │ - strb r0, [r5, #4] │ │ + strb r5, [r2, #5] │ │ mcr2 13, 0, r7, cr5, cr6, {0} │ │ mcr2 9, 0, lr, cr8, cr13, {6} @ │ │ movs r0, #10 │ │ ldr r1, [pc, #36] @ (21c9c6c , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > >&) const@@Base+0x510>) │ │ str r0, [sp, #96] @ 0x60 │ │ movw r0, #273 @ 0x111 │ │ stmia.w sp, {r0, r4, r8} │ │ @@ -490826,15 +490826,15 @@ │ │ str r3, [sp, #88] @ 0x58 │ │ str r4, [sp, #12] │ │ bl 221a5c4 │ │ movs r0, #16 │ │ blx 26ffb80 │ │ b.n 21c9c70 , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > >&) const@@Base+0x514> │ │ nop │ │ - ldr r4, [pc, #984] @ (21ca048 , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > >&) const@@Base+0x8ec>) │ │ + ldr r5, [pc, #140] @ (21c9cfc , std::__ndk1::allocator >, std::__ndk1::basic_string, std::__ndk1::allocator >, std::__ndk1::less, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > const, std::__ndk1::basic_string, std::__ndk1::allocator > > > >&) const@@Base+0x5a0>) │ │ vseleq.f16 s8, s14, s24 │ │ str r0, [sp, #96] @ 0x60 │ │ add r1, pc │ │ vldr d16, [r1] │ │ adds r1, #6 │ │ vld1.16 {d17}, [r1] │ │ adds r1, r0, #6 │ │ @@ -491690,15 +491690,15 @@ │ │ blx 26ffaf0 │ │ nop │ │ udf #80 @ 0x50 │ │ lsls r6, r2, #1 │ │ ldrb r2, [r2, #7] │ │ cdp2 7, 0, cr13, cr8, cr12, {3} │ │ lsls r6, r2, #1 │ │ - stmia r0!, {r5, r7} │ │ + stmia r0!, {r0, r2, r3, r6, r7} │ │ mcr2 1, 0, r7, cr6, cr4, {4} │ │ vseleq.f16 s14, s16, s24 │ │ mcr2 0, 0, sp, cr8, cr6, {5} │ │ lsls r6, r2, #1 │ │ │ │ 021ca5ac : │ │ ldr.w r0, [r0, #944] @ 0x3b0 │ │ @@ -491764,15 +491764,15 @@ │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldmia r7, {r1, r3, r4, r5, r6, r7} │ │ lsls r6, r2, #1 │ │ - str r1, [r3, #76] @ 0x4c │ │ + str r6, [r0, #80] @ 0x50 │ │ cdp2 15, 0, cr12, cr6, cr6, {4} │ │ lsls r6, r2, #1 │ │ │ │ 021ca660 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r2, [pc, #68] @ (21ca6ac ) │ │ @@ -491970,15 +491970,15 @@ │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ bmi.n 21ca83e const&, Eigen::Matrix const&)@@Base+0x15e> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21ca8a0 const&, Eigen::Matrix const&)@@Base+0x1c0>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strb r3, [r6, r7] │ │ + ldrsb r0, [r4, r0] │ │ mcr2 5, 0, fp, cr7, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #188 @ 0xbc │ │ str r3, [sp, #20] │ │ mov r5, r0 │ │ ldr.w r0, [pc, #3736] @ 21cb74c const&, Eigen::Matrix const&)@@Base+0x106c> │ │ @@ -494279,15 +494279,15 @@ │ │ add sp, #336 @ 0x150 │ │ lsls r6, r2, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21cc594 const&, Eigen::Matrix const&)@@Base+0x1eb4>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - subs r0, #255 @ 0xff │ │ + subs r1, #44 @ 0x2c │ │ Address 0x21cc596 is out of bounds. │ │ │ │ │ │ 021cc598 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ @@ -494574,15 +494574,15 @@ │ │ ldr r1, [r4, #8] │ │ b.n 21cc898 >::__push_back_slow_path(Renderer::Annotation const&)@@Base+0x1d8> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21cc8c4 >::__push_back_slow_path(Renderer::Annotation const&)@@Base+0x204>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - adds r5, #207 @ 0xcf │ │ + adds r5, #252 @ 0xfc │ │ Address 0x21cc8c6 is out of bounds. │ │ │ │ │ │ 021cc8c8 >, Eigen::internal::evaluator, 3, 3, false>, Eigen::Matrix, 1> >, Eigen::internal::assign_op, 0>, 0, 9>::run(Eigen::internal::generic_dense_assignment_kernel >, Eigen::internal::evaluator, 3, 3, false>, Eigen::Matrix, 1> >, Eigen::internal::assign_op, 0>&)@@Base>: │ │ ldrd r2, r1, [r0] │ │ ldr r0, [r1, #0] │ │ ldr r1, [r1, #24] │ │ @@ -499082,28 +499082,28 @@ │ │ bl 21cfe88 >::__push_back_slow_path(EclipseShadow const&)@@Base+0x13c> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21cfe94 >::__push_back_slow_path(EclipseShadow const&)@@Base+0x148>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - @ instruction: 0xfffffe06 │ │ - push {r7, lr} │ │ + movs r4, r5 │ │ + cdp2 5, 0, cr11, cr7, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21cfea4 >::__push_back_slow_path(EclipseShadow const&)@@Base+0x158>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - vmull.p64 , d15, d6 │ │ - push {r7, lr} │ │ + movs r4, r3 │ │ + cdp2 5, 0, cr11, cr7, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21cfeb4 >::__push_back_slow_path(EclipseShadow const&)@@Base+0x168>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - vmull.p , d15, d6 │ │ - push {r4, r5, r6, r7, lr} │ │ + movs r4, r1 │ │ + mcr2 5, 0, fp, cr7, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ mov r8, r0 │ │ ldrd r4, r0, [r0, #4] │ │ mov sl, r1 │ │ subs r1, r0, r4 │ │ @@ -501611,15 +501611,15 @@ │ │ ldr r2, [r6, r1] │ │ lsls r6, r2, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21d1d74 &, RenderListEntry*, false>(RenderListEntry*, RenderListEntry*, std::__ndk1::__less&, std::__ndk1::iterator_traits::difference_type, bool)@@Base+0x1da0>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - b.n 21d1fb6 const&, unsigned int, unsigned long long, Eigen::Quaternion const&, celestia::math::Frustum const&, Matrices const&, Renderer*)@@Base+0x23e> │ │ + b.n 21d2010 const&, unsigned int, unsigned long long, Eigen::Quaternion const&, celestia::math::Frustum const&, Matrices const&, Renderer*)@@Base+0x298> │ │ Address 0x21d1d76 is out of bounds. │ │ │ │ │ │ 021d1d78 const&, unsigned int, unsigned long long, Eigen::Quaternion const&, celestia::math::Frustum const&, Matrices const&, Renderer*)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -502441,15 +502441,15 @@ │ │ vmov.f32 s5, s0 │ │ b.n 21d2686 const&, double, Matrices const&, Renderer*)@@Base+0x296> │ │ nop │ │ strb r4, [r5, r1] │ │ lsls r6, r2, #1 │ │ ldrsb r2, [r4, r5] │ │ lsls r6, r2, #1 │ │ - stmia r4!, {r2, r5, r7} │ │ + stmia r4!, {r0, r4, r6, r7} │ │ mcr2 5, 0, r5, cr6, cr14, {4} │ │ lsls r6, r2, #1 │ │ ldrsb r0, [r2, r4] │ │ lsls r6, r2, #1 │ │ ldrsb r2, [r1, r4] │ │ lsls r6, r2, #1 │ │ ldrsb r2, [r4, r3] │ │ @@ -503425,22 +503425,22 @@ │ │ beq.n 21d30ea │ │ ldr r0, [sp, #40] @ 0x28 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ @ instruction: 0x4782 │ │ lsls r6, r2, #1 │ │ - cmp r2, #51 @ 0x33 │ │ - mcr2 10, 0, r2, cr7, cr11, {2} @ │ │ + cmp r2, #96 @ 0x60 │ │ + vseleq.f32 s4, s15, s16 │ │ mcr2 6, 0, r4, cr7, cr8, {7} │ │ lsls r6, r2, #1 │ │ - adds r4, #153 @ 0x99 │ │ + adds r4, #198 @ 0xc6 │ │ mcr2 6, 0, r4, cr6, cr2, {2} │ │ lsls r6, r2, #1 │ │ - adds r4, #131 @ 0x83 │ │ + adds r4, #176 @ 0xb0 │ │ mcr2 5, 0, r4, cr6, cr2, {5} │ │ lsls r6, r2, #1 │ │ │ │ 021d3110 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r0, [pc, #80] @ (21d3168 ) │ │ @@ -504751,15 +504751,15 @@ │ │ bl 21e1bc0 const&, Eigen::Matrix const&)@@Base+0x33c> │ │ ldr r1, [r4, #4] │ │ mov r0, r4 │ │ bl 21e1b98 const&, Eigen::Matrix const&)@@Base+0x314> │ │ blx 26ffaf0 │ │ subs r5, #160 @ 0xa0 │ │ lsls r6, r2, #1 │ │ - b.n 21d3d0e │ │ + b.n 21d3d68 │ │ Address 0x21d3dee is out of bounds. │ │ │ │ │ │ 021d3df0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -505109,24 +505109,24 @@ │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ adds r6, #68 @ 0x44 │ │ lsls r6, r2, #1 │ │ subs r0, #160 @ 0xa0 │ │ lsls r6, r2, #1 │ │ - ldrb r0, [r3, #28] │ │ - mcr2 5, 0, lr, cr7, cr11, {3} │ │ - vfmal.f16 q6, d6, d2[1] │ │ - mcr2 1, 0, r5, cr5, cr0, {1} │ │ - @ instruction: 0xfe04ea6a │ │ - mcr2 10, 0, ip, cr4, cr12, {6} @ │ │ - mcr2 6, 0, r0, cr5, cr2, {3} │ │ - mcr2 9, 0, sl, cr4, cr3, {1} @ │ │ - cdp2 12, 0, cr10, cr6, cr14, {1} │ │ - mcr2 12, 0, r6, cr4, cr1, {5} │ │ + ldrb r5, [r0, #29] │ │ + cdp2 5, 0, cr14, cr7, cr8, {5} │ │ + vcmla.f16 d12, d22, d7[0], #0 │ │ + mcr2 1, 0, r5, cr5, cr13, {2} │ │ + mcr2 10, 0, lr, cr4, cr7, {4} @ │ │ + vseleq.f64 d12, d4, d9 │ │ + mcr2 6, 0, r0, cr5, cr15, {4} │ │ + @ instruction: 0xfe04a960 │ │ + mcr2 12, 0, sl, cr6, cr11, {2} │ │ + mcr2 12, 0, r6, cr4, cr14, {6} │ │ mcr2 10, 0, fp, cr5, cr9, {3} @ │ │ mcr2 10, 0, fp, cr7, cr15, {6} @ │ │ cdp2 5, 0, cr3, cr7, cr2, {4} │ │ lsls r6, r2, #1 │ │ │ │ 021d4178 >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -505482,39 +505482,39 @@ │ │ ldrne r0, [sp, #40] @ 0x28 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ adds r3, #46 @ 0x2e │ │ lsls r6, r2, #1 │ │ asrs r0, r2, #22 │ │ lsls r5, r2, #1 │ │ - ldr r5, [pc, #240] @ (21d45b4 >)@@Base+0x90>) │ │ + ldr r5, [pc, #420] @ (21d4668 >)@@Base+0x144>) │ │ cdp2 5, 0, cr1, cr4, cr10, {4} │ │ lsls r5, r2, #1 │ │ bvc.n 21d44dc >, std::__ndk1::basic_string_view >)@@Base+0x264> │ │ - mcr2 13, 0, r4, cr7, cr12, {1} │ │ - mcr2 12, 0, r1, cr4, cr14, {7} │ │ + vdot.bf16 q2, , d9[1] │ │ + vdot.bf16 d1, d4, d11[1] │ │ vcmla.f16 , , d2[0], #0 │ │ - cdp2 3, 0, cr12, cr7, cr9, {1} │ │ + mcr2 3, 0, ip, cr7, cr6, {2} │ │ vcmla.f16 d11, d20, d10[1], #0 │ │ mcr2 7, 0, r3, cr7, cr0, {7} │ │ lsls r6, r2, #1 │ │ - mov r3, r2 │ │ - mcr2 10, 0, r2, cr6, cr14, {4} @ │ │ + mov r0, r8 │ │ + @ instruction: 0xfe062acb │ │ cdp2 5, 0, cr3, cr5, cr14, {3} │ │ lsls r6, r2, #1 │ │ - ldrb r2, [r5, #15] │ │ - cdp2 2, 0, cr14, cr7, cr15, {2} │ │ - mcr2 5, 0, ip, cr6, cr0, {1} │ │ - cdp2 14, 0, cr4, cr5, cr8, {0} │ │ - cdp2 7, 0, cr14, cr4, cr4, {2} │ │ - mcr2 7, 0, ip, cr4, cr8, {5} │ │ - mcr2 3, 0, r0, cr5, cr0, {2} │ │ - mcr2 6, 0, sl, cr4, cr3, {0} │ │ - mcr2 9, 0, sl, cr6, cr0, {0} @ │ │ - mcr2 9, 0, r6, cr4, cr5, {4} @ │ │ + ldrb r7, [r2, #16] │ │ + mcr2 2, 0, lr, cr7, cr12, {3} │ │ + mcr2 5, 0, ip, cr6, cr13, {2} │ │ + mcr2 14, 0, r4, cr5, cr5, {1} │ │ + mcr2 7, 0, lr, cr4, cr1, {3} │ │ + cdp2 7, 0, cr12, cr4, cr5, {7} │ │ + mcr2 3, 0, r0, cr5, cr13, {3} │ │ + cdp2 6, 0, cr10, cr4, cr0, {2} │ │ + mcr2 9, 0, sl, cr6, cr13, {1} @ │ │ + @ instruction: 0xfe0469c2 │ │ mcr2 7, 0, fp, cr5, cr15, {2} │ │ cdp2 7, 0, cr11, cr7, cr7, {6} │ │ cdp2 1, 0, cr3, cr7, cr6, {2} │ │ lsls r6, r2, #1 │ │ │ │ 021d4524 >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -505873,23 +505873,23 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ adds r0, #136 @ 0x88 │ │ lsls r6, r2, #1 │ │ cmp r5, #206 @ 0xce │ │ lsls r6, r2, #1 │ │ - subs r1, r2, #2 │ │ - mcr2 7, 0, r2, cr6, cr12, {0} │ │ - cdp2 7, 0, cr2, cr5, cr10, {0} │ │ - mcr2 13, 0, r1, cr5, cr15, {7} │ │ - vdot.bf16 , q11, d15[1] │ │ - cdp2 6, 0, cr12, cr6, cr10, {2} │ │ - vseleq.f32 s14, s8, s3 │ │ - cdp2 6, 0, cr12, cr7, cr10, {1} │ │ - vseleq.f32 s14, s8, s2 │ │ + subs r6, r7, #2 │ │ + cdp2 7, 0, cr2, cr6, cr9, {2} │ │ + mcr2 7, 0, r2, cr5, cr7, {1} │ │ + cdp2 14, 0, cr1, cr5, cr12, {1} │ │ + mcr2 14, 0, r1, cr6, cr12, {0} │ │ + mcr2 6, 0, ip, cr6, cr7, {3} │ │ + @ instruction: 0xfe047a4e │ │ + mcr2 6, 0, ip, cr7, cr7, {2} │ │ + vseleq.f32 s14, s8, s29 │ │ cdp2 14, 0, cr2, cr7, cr8, {7} │ │ lsls r6, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #224 @ 0xe0 │ │ mov r4, r0 │ │ @@ -506068,21 +506068,21 @@ │ │ blx 26ffaf0 │ │ bl 207de6a │ │ nop │ │ cmp r4, #168 @ 0xa8 │ │ lsls r6, r2, #1 │ │ cmp r4, #180 @ 0xb4 │ │ lsls r6, r2, #1 │ │ - subs r3, #50 @ 0x32 │ │ + subs r3, #95 @ 0x5f │ │ vseleq.f64 d2, d7, d30 │ │ lsls r6, r2, #1 │ │ - strb r1, [r3, #31] │ │ + ldrb r6, [r0, #0] │ │ mcr2 12, 0, r2, cr7, cr2, {2} │ │ lsls r6, r2, #1 │ │ - strb r1, [r1, #31] │ │ + strb r6, [r6, #31] │ │ mcr2 11, 0, r2, cr7, cr12, {4} @ │ │ lsls r6, r2, #1 │ │ │ │ 021d4aec >, ShaderManager::GeomShaderParams const*)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -506492,21 +506492,21 @@ │ │ ldr r0, [sp, #120] @ 0x78 │ │ blx 26ffad0 │ │ b.n 21d4ece >, ShaderManager::GeomShaderParams const*)@@Base+0x3e2> │ │ ldr r0, [sp, #152] @ 0x98 │ │ blx 26ffad0 │ │ b.n 21d4e88 >, ShaderManager::GeomShaderParams const*)@@Base+0x39c> │ │ b.n 21d4fbc >, ShaderManager::GeomShaderParams const*)@@Base+0x4d0> │ │ - adds r5, r0, r3 │ │ - mcr2 1, 0, r2, cr6, cr0, {2} │ │ - mcr2 1, 0, r2, cr5, cr14, {1} │ │ - vfmal.f16 d1, s10, s7[0] │ │ - vcmla.f16 d1, d6, d3[1], #0 │ │ - cdp2 14, 0, cr5, cr6, cr12, {0} │ │ - mcr2 13, 0, r5, cr6, cr10, {7} │ │ + adds r2, r6, r3 │ │ + mcr2 1, 0, r2, cr6, cr13, {3} │ │ + cdp2 1, 0, cr2, cr5, cr11, {3} │ │ + vcmla.f16 , , d0[1], #0 │ │ + vfmal.f16 , d6, d0[0] │ │ + mcr2 14, 0, r5, cr6, cr9, {1} │ │ + cdp2 14, 0, cr5, cr6, cr7, {1} │ │ vfmal.f16 d15, s13, s10[1] │ │ lsls r4, r3, #2 │ │ cmp r0, #0 │ │ itt ne │ │ ldrbne.w r0, [sp, #144] @ 0x90 │ │ movsne.w r0, r0, lsl #31 │ │ beq.n 21d4faa >, ShaderManager::GeomShaderParams const*)@@Base+0x4be> │ │ @@ -506610,20 +506610,20 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ cmp r2, #188 @ 0xbc │ │ lsls r6, r2, #1 │ │ movs r6, #170 @ 0xaa │ │ lsls r6, r2, #1 │ │ - stmia r0!, {r2, r7} │ │ - mcr2 4, 0, r7, cr4, cr11, {2} │ │ - cdp2 0, 0, cr12, cr7, cr4, {3} │ │ - mcr2 4, 0, r7, cr4, cr11, {1} │ │ - cdp2 15, 0, cr11, cr7, cr14, {2} │ │ - cdp2 3, 0, cr7, cr4, cr5, {1} │ │ + stmia r0!, {r0, r4, r5, r7} │ │ + cdp2 4, 0, cr7, cr4, cr8, {4} │ │ + mcr2 0, 0, ip, cr7, cr1, {4} │ │ + cdp2 4, 0, cr7, cr4, cr8, {3} │ │ + mcr2 15, 0, fp, cr7, cr11, {3} │ │ + mcr2 3, 0, r7, cr4, cr2, {2} │ │ mcr2 7, 0, r2, cr7, cr2, {3} │ │ lsls r6, r2, #1 │ │ │ │ 021d509c >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, ShaderManager::GeomShaderParams const*)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -507005,15 +507005,15 @@ │ │ blx 26ffad0 │ │ b.n 21d5444 >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, ShaderManager::GeomShaderParams const*)@@Base+0x3a8> │ │ b.n 21d546e >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, ShaderManager::GeomShaderParams const*)@@Base+0x3d2> │ │ b.n 21d5460 >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, ShaderManager::GeomShaderParams const*)@@Base+0x3c4> │ │ b.n 21d5460 >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, ShaderManager::GeomShaderParams const*)@@Base+0x3c4> │ │ b.n 21d5452 >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, ShaderManager::GeomShaderParams const*)@@Base+0x3b6> │ │ b.n 21d546e >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, ShaderManager::GeomShaderParams const*)@@Base+0x3d2> │ │ - ldr r7, [r2, #12] │ │ + ldr r4, [r0, #16] │ │ vfmal.f16 d15, s15, s10[1] │ │ movs r4, r2 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #28] │ │ blxne 26ffad0 │ │ ldrb.w r0, [sp, #32] │ │ @@ -507030,55 +507030,55 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #72] @ 0x48 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ movs r5, #6 │ │ lsls r6, r2, #1 │ │ - ldr r1, [sp, #160] @ 0xa0 │ │ - mcr2 7, 0, fp, cr6, cr0, {4} │ │ - cdp2 0, 0, cr0, cr6, cr6, {2} │ │ - @ instruction: 0xfe059b41 │ │ + ldr r1, [sp, #340] @ 0x154 │ │ + mcr2 7, 0, fp, cr6, cr13, {5} │ │ + mcr2 0, 0, r0, cr6, cr3, {3} │ │ + @ instruction: 0xfe059b6e │ │ @ instruction: 0xfe058b4a │ │ mcr2 11, 0, r8, cr7, cr4, {0} @ │ │ mcr2 14, 0, r8, cr7, cr0, {4} │ │ mcr2 7, 0, r0, cr12, cr6, {1} │ │ lsls r5, r2, #1 │ │ - lsrs r2, r5, #26 │ │ + lsrs r7, r2, #27 │ │ @ instruction: 0xfe07aa44 │ │ - mcr2 14, 0, r3, cr7, cr6, {2} │ │ - cdp2 14, 0, cr0, cr4, cr3, {7} │ │ + cdp2 14, 0, cr3, cr7, cr3, {4} │ │ + mcr2 15, 0, r0, cr4, cr0, {0} │ │ vseleq.f32 s20, s14, s13 │ │ - cdp2 14, 0, cr3, cr7, cr4, {3} │ │ - mcr2 9, 0, fp, cr4, cr5, {5} @ │ │ + mcr2 14, 0, r3, cr7, cr1, {4} │ │ + @ instruction: 0xfe04b9e2 │ │ mcr2 6, 0, r0, cr5, cr10, {2} │ │ lsls r5, r2, #1 │ │ lsls r4, r3, #25 │ │ lsls r5, r2, #1 │ │ - cbnz r7, 21d54e8 >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, ShaderManager::GeomShaderParams const*)@@Base+0x44c> │ │ + cbnz r4, 21d54f4 >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, ShaderManager::GeomShaderParams const*)@@Base+0x458> │ │ @ instruction: 0xfe05a96e │ │ mcr2 9, 0, sl, cr7, cr12, {2} @ │ │ - cdp2 3, 0, cr11, cr7, cr7, {6} │ │ + mcr2 3, 0, fp, cr7, cr4, {7} │ │ vfmal.f16 d2, s9, s8[0] │ │ lsls r6, r2, #1 │ │ - adds r6, #183 @ 0xb7 │ │ + adds r6, #228 @ 0xe4 │ │ mcr2 6, 0, sp, cr6, cr9, {6} │ │ - mcr2 11, 0, r1, cr3, cr12, {0} @ │ │ + @ instruction: 0xfe031b49 │ │ cdp2 5, 0, cr2, cr5, cr10, {7} │ │ lsls r6, r2, #1 │ │ - ldr r6, [r4, #68] @ 0x44 │ │ - cdp2 2, 0, cr13, cr7, cr11, {6} │ │ - cdp2 5, 0, cr11, cr6, cr12, {5} │ │ - cdp2 14, 0, cr3, cr5, cr4, {4} │ │ - cdp2 7, 0, cr13, cr4, cr0, {6} │ │ - vfmal.f16 d11, s8, s9[0] │ │ - cdp2 3, 0, cr15, cr5, cr12, {6} │ │ - cdp2 6, 0, cr9, cr3, cr15, {4} │ │ - vseleq.f16 s18, s13, s24 │ │ - mcr2 10, 0, r5, cr4, cr1, {0} @ │ │ + ldr r3, [r2, #72] @ 0x48 │ │ + mcr2 2, 0, sp, cr7, cr8, {7} │ │ + mcr2 5, 0, fp, cr6, cr9, {6} │ │ + mcr2 14, 0, r3, cr5, cr1, {5} │ │ + cdp2 7, 0, cr13, cr4, cr13, {7} │ │ + vcmla.f16 , q2, d1[1], #0 │ │ + mcr2 3, 0, pc, cr5, cr9, {7} @ │ │ + mcr2 6, 0, r9, cr3, cr12, {5} │ │ + mcr2 9, 0, r9, cr6, cr9, {5} @ │ │ + mcr2 10, 0, r5, cr4, cr14, {1} @ │ │ mcr2 7, 0, sl, cr5, cr11, {6} │ │ vcmla.f16 q5, , d3[0], #0 │ │ cdp2 1, 0, cr2, cr7, cr6, {5} │ │ lsls r6, r2, #1 │ │ │ │ 021d5520 >, std::__ndk1::basic_string_view >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -507320,39 +507320,39 @@ │ │ ldrne r0, [sp, #40] @ 0x28 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ movs r0, #134 @ 0x86 │ │ lsls r6, r2, #1 │ │ lsls r0, r5, #11 │ │ lsls r5, r2, #1 │ │ - subs r2, #148 @ 0x94 │ │ + subs r2, #193 @ 0xc1 │ │ cdp2 2, 0, cr0, cr4, cr2, {7} │ │ lsls r5, r2, #1 │ │ - lsrs r1, r2, #12 │ │ - mcr2 10, 0, r3, cr7, cr4, {4} @ │ │ - mcr2 10, 0, r0, cr4, cr6, {2} @ │ │ + lsrs r6, r7, #12 │ │ + @ instruction: 0xfe073ac1 │ │ + vseleq.f32 s0, s9, s6 │ │ mcr2 6, 0, sl, cr7, cr10, {0} │ │ - cdp2 0, 0, cr11, cr7, cr1, {4} │ │ + cdp2 0, 0, cr11, cr7, cr14, {5} │ │ cdp2 6, 0, cr10, cr4, cr2, {0} │ │ cdp2 5, 0, cr2, cr7, cr8, {2} │ │ lsls r6, r2, #1 │ │ - adds r3, #107 @ 0x6b │ │ - mcr2 7, 0, r1, cr6, cr6, {7} │ │ + adds r3, #152 @ 0x98 │ │ + vcmla.f16 d1, d6, d3[1], #0 │ │ cdp2 2, 0, cr2, cr5, cr6, {6} │ │ lsls r6, r2, #1 │ │ - ldr r2, [r0, #20] │ │ - cdp2 15, 0, cr12, cr7, cr7, {5} │ │ - cdp2 2, 0, cr11, cr6, cr8, {4} │ │ - @ instruction: 0xfe053b60 │ │ - mcr2 4, 0, sp, cr4, cr12, {4} │ │ - mcr2 5, 0, fp, cr4, cr0, {0} │ │ - cdp2 0, 0, cr15, cr5, cr8, {5} │ │ - cdp2 3, 0, cr9, cr3, cr11, {3} │ │ - cdp2 6, 0, cr9, cr6, cr8, {3} │ │ - cdp2 6, 0, cr5, cr4, cr13, {7} │ │ + ldr r7, [r5, #20] │ │ + mcr2 15, 0, ip, cr7, cr4, {6} │ │ + mcr2 2, 0, fp, cr6, cr5, {5} │ │ + vseleq.f64 d3, d21, d13 │ │ + cdp2 4, 0, cr13, cr4, cr9, {6} │ │ + mcr2 5, 0, fp, cr4, cr13, {1} │ │ + mcr2 0, 0, pc, cr5, cr5, {6} @ │ │ + mcr2 3, 0, r9, cr3, cr8, {4} │ │ + mcr2 6, 0, r9, cr6, cr5, {4} │ │ + mcr2 7, 0, r5, cr4, cr10, {0} │ │ mcr2 4, 0, sl, cr5, cr7, {5} │ │ mcr2 5, 0, sl, cr7, cr15, {0} │ │ mcr2 14, 0, r1, cr7, cr14, {4} │ │ lsls r6, r2, #1 │ │ │ │ 021d57cc >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -507839,37 +507839,37 @@ │ │ bgt.n 21d5d30 │ │ cmp r0, #1 │ │ beq.n 21d5d3c │ │ cmp r0, #128 @ 0x80 │ │ beq.n 21d5d3c │ │ b.n 21d5d4e │ │ stmia r0!, {r3, r6, r7} │ │ - cdp2 14, 0, cr6, cr7, cr15, {0} │ │ - cdp2 3, 0, cr1, cr6, cr3, {6} │ │ - mcr2 2, 0, r5, cr5, cr1, {1} │ │ - mcr2 1, 0, r5, cr5, cr15, {5} │ │ - @ instruction: 0xfe050a4c │ │ + mcr2 14, 0, r6, cr7, cr12, {1} │ │ + mcr2 3, 0, r1, cr6, cr0, {7} │ │ + mcr2 2, 0, r5, cr5, cr14, {2} │ │ + cdp2 1, 0, cr5, cr5, cr12, {7} │ │ + mcr2 10, 0, r0, cr5, cr9, {3} @ │ │ mcr2 13, 0, pc, cr6, cr10, {7} @ │ │ lsls r4, r2, #1 │ │ ldc2l 0, cr0, [r4, #336]! @ 0x150 │ │ stc2l 0, cr0, [lr, #336]! @ 0x150 │ │ stc2l 0, cr0, [r0, #336]! @ 0x150 │ │ - lsls r3, r1, #21 │ │ - mcr2 3, 0, fp, cr7, cr15, {1} │ │ - vseleq.f32 s28, s9, s18 │ │ - vseleq.f64 d12, d5, d11 │ │ - vcmla.f16 d14, d5, d10[0], #0 │ │ - cdp2 1, 0, cr14, cr6, cr0, {5} │ │ - mcr2 9, 0, r0, cr6, cr2, {4} @ │ │ + lsls r0, r7, #21 │ │ + cdp2 3, 0, cr11, cr7, cr12, {3} │ │ + mcr2 10, 0, lr, cr4, cr6, {5} @ │ │ + mcr2 11, 0, ip, cr5, cr8, {1} @ │ │ + vfmal.f16 d14, s10, s15[0] │ │ + cdp2 1, 0, cr14, cr6, cr13, {6} │ │ + mcr2 9, 0, r0, cr6, cr15, {5} @ │ │ mcr2 15, 0, r9, cr6, cr9, {5} │ │ - cdp2 7, 0, cr14, cr7, cr2, {3} │ │ - cdp2 1, 0, cr5, cr6, cr8, {1} │ │ - mcr2 2, 0, r7, cr4, cr13, {3} │ │ - mcr2 6, 0, lr, cr5, cr10, {7} │ │ - cdp2 0, 0, cr1, cr6, cr7, {5} │ │ + cdp2 7, 0, cr14, cr7, cr15, {4} │ │ + mcr2 1, 0, r5, cr6, cr5, {2} │ │ + cdp2 2, 0, cr7, cr4, cr10, {5} │ │ + cdp2 7, 0, cr14, cr5, cr7, {1} │ │ + mcr2 0, 0, r1, cr6, cr4, {6} │ │ mcr2 5, 0, pc, cr5, cr0, {5} @ │ │ ldr r0, [r0, #120] @ 0x78 │ │ it ne │ │ cmpne.w r0, #256 @ 0x100 │ │ bne.n 21d5d4e │ │ ldrb.w r0, [fp, #5] │ │ lsls r0, r0, #26 │ │ @@ -508194,33 +508194,33 @@ │ │ itt ne │ │ ldrne r0, [sp, #136] @ 0x88 │ │ blxne 26ffad0 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldrh r0, [r0, #0] │ │ b.n 21d6016 │ │ nop │ │ - b.n 21d5d00 │ │ - mcr2 3, 0, sl, cr6, cr3, {2} │ │ - mcr2 0, 0, fp, cr6, cr11, {2} │ │ - mcr2 15, 0, r0, cr4, cr6, {3} │ │ - cdp2 0, 0, cr11, cr5, cr11, {0} │ │ - cdp2 15, 0, cr10, cr4, cr3, {0} │ │ - mcr2 15, 0, sl, cr4, cr11, {5} │ │ - mcr2 13, 0, r8, cr4, cr5, {7} │ │ - cdp2 15, 0, cr10, cr4, cr9, {3} │ │ - cdp2 6, 0, cr14, cr4, cr3, {6} │ │ - cdp2 4, 0, cr14, cr5, cr0, {4} │ │ - mcr2 13, 0, r8, cr6, cr13, {2} │ │ - mcr2 14, 0, sl, cr4, cr5, {5} │ │ - @ instruction: 0xfe046bee │ │ - cdp2 14, 0, cr10, cr4, cr3, {3} │ │ - mcr2 11, 0, sl, cr4, cr11, {2} @ │ │ - mcr2 6, 0, ip, cr5, cr10, {1} │ │ - cdp2 6, 0, cr12, cr5, cr14, {0} │ │ - mcr2 3, 0, lr, cr5, cr10, {0} │ │ + b.n 21d5d5a │ │ + cdp2 3, 0, cr10, cr6, cr0, {4} │ │ + cdp2 0, 0, cr11, cr6, cr8, {4} │ │ + cdp2 15, 0, cr0, cr4, cr3, {5} │ │ + mcr2 0, 0, fp, cr5, cr8, {1} │ │ + mcr2 15, 0, sl, cr4, cr0, {1} │ │ + cdp2 15, 0, cr10, cr4, cr8, {7} │ │ + cdp2 14, 0, cr8, cr4, cr2, {1} │ │ + mcr2 15, 0, sl, cr4, cr6, {4} │ │ + mcr2 6, 0, lr, cr4, cr0, {7} │ │ + cdp2 4, 0, cr14, cr5, cr13, {5} │ │ + vdot.bf16 d8, d22, d10[0] │ │ + cdp2 14, 0, cr10, cr4, cr2, {7} │ │ + mcr2 12, 0, r6, cr4, cr11, {0} │ │ + mcr2 14, 0, sl, cr4, cr0, {4} │ │ + vseleq.f64 d10, d20, d8 │ │ + cdp2 6, 0, cr12, cr5, cr7, {3} │ │ + mcr2 6, 0, ip, cr5, cr11, {1} │ │ + cdp2 3, 0, cr14, cr5, cr7, {2} │ │ vcmla.f16 d9, d6, d11[0], #0 │ │ add.w r8, sp, #144 @ 0x90 │ │ ldr r0, [r0, #4] │ │ lsls r1, r0, #21 │ │ bpl.n 21d6170 │ │ ldr r0, [pc, #936] @ (21d64c4 ) │ │ movs r3, #13 │ │ @@ -508580,40 +508580,40 @@ │ │ movs r2, #2 │ │ strd r8, r0, [sp, #8] │ │ strd r2, r0, [sp] │ │ add r0, sp, #112 @ 0x70 │ │ movs r2, #16 │ │ bl 221a5c4 │ │ b.n 21d65f8 │ │ - adds r0, #49 @ 0x31 │ │ - cdp2 12, 0, cr10, cr4, cr9, {7} │ │ + adds r0, #94 @ 0x5e │ │ + mcr2 13, 0, sl, cr4, cr6, {0} │ │ @ instruction: 0xfe049a62 │ │ - mcr2 3, 0, r0, cr7, cr4, {6} │ │ - mcr2 11, 0, r8, cr6, cr0, {4} @ │ │ - mcr2 3, 0, r0, cr4, cr14, {3} │ │ - @ instruction: 0xfe064bcf │ │ - @ instruction: 0xfe05abe7 │ │ - @ instruction: 0xfe04a967 │ │ - mcr2 11, 0, sl, cr5, cr7, {4} @ │ │ - mcr2 10, 0, r4, cr4, cr9, {7} @ │ │ + cdp2 4, 0, cr0, cr7, cr1, {0} │ │ + mcr2 11, 0, r8, cr6, cr13, {5} @ │ │ + cdp2 3, 0, cr0, cr4, cr11, {5} │ │ + mcr2 11, 0, r4, cr6, cr12, {7} @ │ │ + mcr2 12, 0, sl, cr5, cr4, {0} │ │ + mcr2 9, 0, sl, cr4, cr4, {4} @ │ │ + @ instruction: 0xfe05abc4 │ │ + vseleq.f64 d4, d4, d22 │ │ mcr2 5, 0, pc, cr5, cr0, {2} @ │ │ lsls r4, r2, #1 │ │ adc.w r0, r4, #13893632 @ 0xd40000 │ │ - strh r0, [r2, #50] @ 0x32 │ │ - mcr2 5, 0, lr, cr5, cr1, {0} │ │ - cdp2 15, 0, cr13, cr3, cr0, {5} │ │ - mcr2 12, 0, lr, cr6, cr3, {6} │ │ - mcr2 11, 0, r0, cr4, cr7, {6} @ │ │ - mcr2 15, 0, sp, cr4, cr13, {3} │ │ - cdp2 6, 0, cr8, cr6, cr13, {1} │ │ - cdp2 0, 0, cr0, cr6, cr14, {6} │ │ - mcr2 12, 0, lr, cr6, cr12, {3} │ │ - mcr2 3, 0, sl, cr4, cr0, {2} │ │ - mcr2 9, 0, r3, cr6, cr7, {0} @ │ │ - vfmal.f16 , d23, d5[2] │ │ + strh r5, [r7, #50] @ 0x32 │ │ + mcr2 5, 0, lr, cr5, cr14, {1} │ │ + cdp2 15, 0, cr13, cr3, cr13, {6} │ │ + vdot.bf16 d14, d6, d0[0] │ │ + cdp2 12, 0, cr0, cr4, cr4, {0} │ │ + cdp2 15, 0, cr13, cr4, cr10, {5} │ │ + mcr2 6, 0, r8, cr6, cr10, {2} │ │ + mcr2 0, 0, r0, cr6, cr11, {7} │ │ + cdp2 12, 0, cr14, cr6, cr9, {5} │ │ + mcr2 3, 0, sl, cr4, cr13, {3} │ │ + @ instruction: 0xfe063944 │ │ + vseleq.f16 s6, s14, s5 │ │ @ instruction: 0xfe0749c6 │ │ movs r0, #0 │ │ str r0, [sp, #160] @ 0xa0 │ │ add r1, pc │ │ str r0, [sp, #152] @ 0x98 │ │ str r0, [sp, #144] @ 0x90 │ │ movw r2, #546 @ 0x222 │ │ @@ -508903,15 +508903,15 @@ │ │ strd r2, r0, [sp] │ │ movs r2, #16 │ │ strd r8, r0, [sp, #8] │ │ add r0, sp, #112 @ 0x70 │ │ bl 221a5c4 │ │ b.n 21d686c │ │ nop │ │ - lsrs r6, r3, #10 │ │ + lsrs r3, r1, #11 │ │ mcr2 12, 0, r1, cr4, cr2, {6} │ │ lsls r6, r2, #1 │ │ ldr r1, [pc, #264] @ (21d6958 ) │ │ str r5, [sp, #160] @ 0xa0 │ │ add r1, pc │ │ str r5, [sp, #152] @ 0x98 │ │ str r5, [sp, #144] @ 0x90 │ │ @@ -508984,33 +508984,33 @@ │ │ strd r2, r0, [sp] │ │ movs r2, #16 │ │ strd r8, r0, [sp, #8] │ │ add r0, sp, #112 @ 0x70 │ │ bl 221a5c4 │ │ b.n 21d6988 │ │ nop │ │ - stmia r0!, {r1, r2, r3, r4, r6, r7} │ │ - mcr2 2, 0, sl, cr5, cr5, {3} │ │ - mcr2 6, 0, r4, cr6, cr1, {4} │ │ - @ instruction: 0xfe0509ee │ │ - cdp2 0, 0, cr12, cr4, cr14, {1} │ │ - cdp2 4, 0, cr12, cr5, cr14, {5} │ │ - mcr2 7, 0, r3, cr4, cr5, {0} │ │ - vseleq.f16 s0, s14, s5 │ │ - mcr2 4, 0, r6, cr4, cr3, {4} │ │ - cdp2 3, 0, cr12, cr4, cr0, {7} │ │ - cdp2 6, 0, cr3, cr4, cr7, {2} │ │ - vfmal.f16 q0, d7, d4[0] │ │ - mcr2 5, 0, r3, cr4, cr13, {1} │ │ - cdp2 0, 0, cr10, cr7, cr9, {1} │ │ - mcr2 5, 0, r3, cr6, cr9, {3} │ │ - mcr2 7, 0, r0, cr7, cr12, {3} │ │ - mcr2 15, 0, sp, cr4, cr8, {6} │ │ - mcr2 15, 0, r9, cr3, cr1, {2} │ │ - cdp2 4, 0, cr3, cr6, cr1, {5} │ │ + stmia r1!, {r0, r1, r3} │ │ + cdp2 2, 0, cr10, cr5, cr2, {5} │ │ + mcr2 6, 0, r4, cr6, cr14, {5} │ │ + mcr2 10, 0, r0, cr5, cr11, {0} @ │ │ + mcr2 0, 0, ip, cr4, cr11, {2} │ │ + mcr2 4, 0, ip, cr5, cr11, {6} │ │ + cdp2 7, 0, cr3, cr4, cr2, {2} │ │ + @ instruction: 0xfe07094f │ │ + cdp2 4, 0, cr6, cr4, cr0, {6} │ │ + cdp2 4, 0, cr12, cr4, cr13, {0} │ │ + mcr2 6, 0, r3, cr4, cr4, {3} │ │ + vcmla.f16 d0, d23, d1[0], #0 │ │ + cdp2 5, 0, cr3, cr4, cr10, {3} │ │ + mcr2 0, 0, sl, cr7, cr6, {2} │ │ + cdp2 5, 0, cr3, cr6, cr6, {5} │ │ + cdp2 7, 0, cr0, cr7, cr9, {5} │ │ + cdp2 0, 0, cr14, cr4, cr5, {0} │ │ + mcr2 15, 0, r9, cr3, cr14, {3} │ │ + cdp2 4, 0, cr3, cr6, cr14, {6} │ │ mcr2 9, 0, r4, cr7, cr10, {7} @ │ │ str r5, [sp, #160] @ 0xa0 │ │ add r1, pc │ │ str r5, [sp, #152] @ 0x98 │ │ str r5, [sp, #144] @ 0x90 │ │ movs r0, #0 │ │ movw r2, #546 @ 0x222 │ │ @@ -509371,33 +509371,33 @@ │ │ add r1, pc │ │ mov r0, r6 │ │ blx 2701e60 │ │ ldr r0, [sp, #44] @ 0x2c │ │ ldrh r0, [r0, #0] │ │ b.n 21d6c8a │ │ nop │ │ - lsls r0, r4, #25 │ │ - cdp2 15, 0, cr7, cr4, cr8, {7} │ │ - mcr2 14, 0, r9, cr5, cr5, {1} │ │ - mcr2 2, 0, r2, cr6, cr15, {3} │ │ - mcr2 5, 0, r2, cr5, cr10, {1} │ │ - cdp2 15, 0, cr7, cr4, cr5, {3} │ │ - vseleq.f16 s2, s13, s27 │ │ - mcr2 10, 0, pc, cr7, cr6, {0} @ │ │ - mcr2 15, 0, r7, cr5, cr5, {0} │ │ - vfmal.f16 d13, s12, s14[0] │ │ + lsls r5, r1, #26 │ │ + mcr2 0, 0, r8, cr4, cr5, {0} │ │ + cdp2 14, 0, cr9, cr5, cr2, {3} │ │ + cdp2 2, 0, cr2, cr6, cr12, {5} │ │ + cdp2 5, 0, cr2, cr5, cr7, {3} │ │ + mcr2 15, 0, r7, cr4, cr2, {4} │ │ + mcr2 9, 0, r1, cr6, cr10, {6} @ │ │ + @ instruction: 0xfe07fa43 │ │ + cdp2 15, 0, cr7, cr5, cr2, {2} │ │ + vcmla.f16 , q3, d4[0], #0 │ │ mcr2 13, 0, fp, cr6, cr11, {2} │ │ - mcr2 2, 0, sl, cr3, cr9, {3} │ │ - vdot.bf16 , q10, d0[0] │ │ - mcr2 1, 0, r3, cr5, cr1, {2} │ │ + cdp2 2, 0, cr10, cr3, cr6, {5} │ │ + vdot.bf16 , q10, d13[1] │ │ + mcr2 1, 0, r3, cr5, cr14, {3} │ │ mcr2 2, 0, r7, cr7, cr13, {5} │ │ - mcr2 9, 0, fp, cr7, cr2, {7} @ │ │ - cdp2 6, 0, cr13, cr5, cr15, {3} │ │ - mcr2 2, 0, pc, cr6, cr1, {3} @ │ │ - mcr2 2, 0, r2, cr6, cr15, {2} │ │ + mcr2 10, 0, fp, cr7, cr15, {0} @ │ │ + mcr2 6, 0, sp, cr5, cr12, {4} │ │ + mcr2 2, 0, pc, cr6, cr14, {4} @ │ │ + cdp2 2, 0, cr2, cr6, cr12, {4} │ │ @ instruction: 0xfe0449c5 │ │ ldr r0, [sp, #24] │ │ add r1, pc │ │ str r0, [sp, #160] @ 0xa0 │ │ str r0, [sp, #152] @ 0x98 │ │ str r0, [sp, #144] @ 0x90 │ │ movs r0, #0 │ │ @@ -509714,17 +509714,17 @@ │ │ b.n 21d70d2 │ │ ldrb.w r0, [sp, #96] @ 0x60 │ │ lsls r0, r0, #31 │ │ beq.n 21d7122 │ │ ldr r0, [sp, #104] @ 0x68 │ │ blx 26ffad0 │ │ b.n 21d7122 │ │ - lsls r0, r5, #8 │ │ - cdp2 15, 0, cr9, cr4, cr10, {2} │ │ - mcr2 9, 0, r9, cr4, cr9, {7} @ │ │ + lsls r5, r2, #9 │ │ + mcr2 15, 0, r9, cr4, cr7, {3} │ │ + vseleq.f32 s18, s8, s13 │ │ vfmal.f16 d15, s13, s10[1] │ │ movs r0, r6 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #56] @ 0x38 │ │ blxne 26ffad0 │ │ ldrb.w r0, [sp, #112] @ 0x70 │ │ @@ -509760,26 +509760,26 @@ │ │ ldrb.w r0, [sp, #84] @ 0x54 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #92] @ 0x5c │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ rev16 r7, r7 │ │ - cdp2 15, 0, cr9, cr3, cr2, {4} │ │ + cdp2 15, 0, cr9, cr3, cr15, {5} │ │ mcr2 1, 0, r7, cr4, cr2, {1} │ │ @ instruction: 0xfe07e968 │ │ lsls r4, r2, #1 │ │ strd r0, r0, [r8, #-336]! @ 0x150 │ │ - movs r0, #173 @ 0xad │ │ + movs r0, #218 @ 0xda │ │ cdp2 12, 0, cr0, cr4, cr8, {1} │ │ lsls r6, r2, #1 │ │ - subs r3, r1, r1 │ │ + subs r0, r7, r1 │ │ cdp2 6, 0, cr0, cr6, cr10, {3} │ │ lsls r6, r2, #1 │ │ - subs r6, r5, #4 │ │ + subs r3, r3, #5 │ │ vseleq.f64 d11, d5, d4 │ │ mcr2 5, 0, fp, cr3, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #220 @ 0xdc │ │ mov r4, r0 │ │ ldr.w r0, [pc, #1328] @ 21d76a0 │ │ @@ -510230,16 +510230,16 @@ │ │ adds r1, r0, #4 │ │ add r0, sp, #64 @ 0x40 │ │ blx 26ffc90 │ │ b.n 21d764c │ │ nop │ │ ldrh r5, [r0, #12] │ │ mcr2 9, 0, r8, cr7, cr5, {3} @ │ │ - cdp2 3, 0, cr11, cr7, cr3, {7} │ │ - mcr2 11, 0, r9, cr5, cr15, {3} @ │ │ + mcr2 4, 0, fp, cr7, cr0, {0} │ │ + vseleq.f64 d9, d21, d28 │ │ vcmla.f16 d9, d4, d9[0], #0 │ │ blx 26ffca0 │ │ blx 26ffaf0 │ │ b.n 21d766c │ │ b.n 21d766c │ │ b.n 21d766c │ │ b.n 21d767a │ │ @@ -510269,30 +510269,30 @@ │ │ add r0, sp, #64 @ 0x40 │ │ blx 2703790 │ │ blx 26ffaf0 │ │ nop │ │ lsls r4, r1, #17 │ │ lsls r6, r2, #1 │ │ vshr.u32 q0, , #26 │ │ - ldrh r5, [r4, r7] │ │ - mcr2 11, 0, r5, cr5, cr5, {6} @ │ │ - @ instruction: 0xfe059aef │ │ - cdp2 7, 0, cr3, cr4, cr8, {7} │ │ - mcr2 7, 0, r3, cr6, cr8, {6} │ │ - mcr2 10, 0, r9, cr6, cr5, {2} @ │ │ - @ instruction: 0xfe04396c │ │ - mcr2 9, 0, r3, cr5, cr12, {2} @ │ │ - @ instruction: 0xfe0599c5 │ │ - vfmal.f16 q1, d20, d7[1] │ │ - vcmla.f16 q1, , d15[0], #0 │ │ - vseleq.f16 s18, s14, s11 │ │ - cdp2 2, 0, cr9, cr4, cr11, {6} │ │ - mcr2 2, 0, r9, cr6, cr11, {5} │ │ - mcr2 10, 0, lr, cr6, cr3, {4} @ │ │ - vcmla.f16 d9, d22, d7[0], #0 │ │ + ldrb r2, [r2, r0] │ │ + cdp2 12, 0, cr5, cr5, cr2, {0} │ │ + mcr2 11, 0, r9, cr5, cr12, {0} @ │ │ + vfmal.f16 d3, s8, s10[0] │ │ + vcmla.f16 d3, d6, d5[0], #0 │ │ + vseleq.f32 s18, s13, s4 │ │ + mcr2 9, 0, r3, cr4, cr9, {4} @ │ │ + vseleq.f16 s6, s11, s18 │ │ + mcr2 9, 0, r9, cr5, cr2, {7} @ │ │ + vseleq.f16 s4, s8, s24 │ │ + vfmal.f16 q1, d23, d4[3] │ │ + mcr2 9, 0, r9, cr7, cr2, {2} @ │ │ + mcr2 2, 0, r9, cr4, cr8, {7} │ │ + cdp2 2, 0, cr9, cr6, cr8, {7} │ │ + @ instruction: 0xfe06eac0 │ │ + vfmal.f16 d9, s13, s9[0] │ │ mcr2 5, 0, fp, cr4, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ mov r5, r1 │ │ ldr r1, [pc, #640] @ (21d7978 ) │ │ ldr r4, [pc, #644] @ (21d797c ) │ │ @@ -510554,24 +510554,24 @@ │ │ nop │ │ lsls r5, r4, #16 │ │ movs r0, r0 │ │ subs r2, #115 @ 0x73 │ │ movs r0, r0 │ │ mrc2 0, 5, r0, cr10, cr5, {2} │ │ ldr r4, [sp, #912] @ 0x390 │ │ - cdp2 4, 0, cr3, cr7, cr3, {7} │ │ - cdp2 6, 0, cr3, cr5, cr15, {7} │ │ + mcr2 5, 0, r3, cr7, cr0, {0} │ │ + mcr2 7, 0, r3, cr5, cr12, {0} │ │ cdp2 12, 0, cr15, cr4, cr0, {5} │ │ lsls r5, r2, #1 │ │ ldr r6, [sp, #216] @ 0xd8 │ │ cdp2 15, 0, cr9, cr7, cr12, {2} │ │ cdp2 15, 0, cr9, cr7, cr2, {0} │ │ cdp2 5, 0, cr10, cr7, cr0, {3} │ │ mcr2 7, 0, sl, cr7, cr6, {3} │ │ - cdp2 7, 0, cr15, cr7, cr10, {3} │ │ + mcr2 7, 0, pc, cr7, cr7, {4} @ │ │ mcr2 5, 0, fp, cr3, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #56 @ 0x38 │ │ mov r4, r0 │ │ ldr r0, [pc, #324] @ (21d7b00 ) │ │ ldr r6, [pc, #328] @ (21d7b04 ) │ │ @@ -510693,22 +510693,22 @@ │ │ b.n 21d7af0 │ │ ldrb r0, [r4, #0] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [r4, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - strb r7, [r2, #0] │ │ - mcr2 6, 0, lr, cr5, cr1, {2} │ │ - vseleq.f16 s24, s13, s25 │ │ + strb r4, [r0, #1] │ │ + mcr2 6, 0, lr, cr5, cr14, {3} │ │ + mcr2 9, 0, ip, cr6, cr9, {6} @ │ │ mcr2 11, 0, pc, cr6, cr4, {7} @ │ │ lsls r5, r2, #1 │ │ - str r3, [sp, #924] @ 0x39c │ │ + str r4, [sp, #80] @ 0x50 │ │ cdp2 5, 0, cr6, cr4, cr9, {5} │ │ - mcr2 10, 0, lr, cr7, cr14, {6} @ │ │ + vseleq.f64 d14, d7, d11 │ │ mcr2 1, 0, r8, cr5, cr9, {3} │ │ mcr2 10, 0, pc, cr7, cr10, {7} @ │ │ lsls r5, r2, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ ldr r5, [pc, #92] @ (21d7b88 ) │ │ @@ -510747,19 +510747,19 @@ │ │ ldr r1, [r1, #0] │ │ cmp r1, r0 │ │ itt eq │ │ addeq sp, #40 @ 0x28 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ @ instruction: 0xfa8e0055 │ │ - ldrh r0, [r0, #62] @ 0x3e │ │ + ldrh r5, [r5, #62] @ 0x3e │ │ cdp2 4, 0, cr6, cr4, cr8, {4} │ │ vdot.bf16 d13, d12, d14[1] │ │ lsls r4, r2, #1 │ │ - ldmia r0!, {r1, r3, r4} │ │ + ldmia r0, {r0, r1, r2, r6} │ │ @ instruction: 0xfe06fa46 │ │ lsls r5, r2, #1 │ │ │ │ 021d7ba0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -510797,15 +510797,15 @@ │ │ mcr2 14, 0, pc, cr7, cr10, {7} @ │ │ lsls r5, r2, #1 │ │ ldr r1, [pc, #8] @ (21d7c04 ) │ │ add r1, pc │ │ add r0, sp, #140 @ 0x8c │ │ blx 2701e60 │ │ b.n 21d7c08 │ │ - bl 2310810 │ │ + bl 233d810 │ │ ldr r0, [pc, #12] @ (21d7c18 ) │ │ add r0, pc │ │ ldrd r1, r2, [r0] │ │ add r0, sp, #140 @ 0x8c │ │ blx 26ffb70 │ │ b.n 21d7c1c │ │ bgt.n 21d7c30 │ │ @@ -511266,35 +511266,35 @@ │ │ ldrne r0, [sp, #160] @ 0xa0 │ │ blxne 26ffad0 │ │ ldrh.w r0, [r9, #2] │ │ cmp r0, #128 @ 0x80 │ │ bne.n 21d8150 │ │ movs r0, #128 @ 0x80 │ │ b.n 21d81c0 │ │ - bl 22aad08 │ │ - str r0, [sp, #860] @ 0x35c │ │ - @ instruction: 0xfe048acd │ │ - mcr2 0, 0, r9, cr6, cr13, {3} │ │ - mcr2 3, 0, r4, cr4, cr9, {6} │ │ - cdp2 0, 0, cr9, cr7, cr3, {1} │ │ - mcr2 15, 0, r2, cr4, cr0, {4} │ │ - cdp2 15, 0, cr8, cr5, cr9, {6} │ │ - vseleq.f32 s24, s8, s3 │ │ - cdp2 15, 0, cr8, cr3, cr15, {3} │ │ - cdp2 14, 0, cr1, cr4, cr11, {7} │ │ - mcr2 15, 0, r8, cr7, cr5, {0} │ │ - mcr2 12, 0, sl, cr4, cr5, {0} │ │ - mcr2 14, 0, r8, cr4, cr11, {5} │ │ - mcr2 5, 0, r0, cr4, cr8, {0} │ │ - cdp2 6, 0, cr10, cr7, cr13, {1} │ │ - vdot.bf16 q4, , d13[0] │ │ - cdp2 12, 0, cr8, cr4, cr1, {7} │ │ - mcr2 15, 0, sp, cr4, cr13, {3} │ │ - vdot.bf16 q4, q3, d7[1] │ │ - vseleq.f16 s12, s8, s9 │ │ + bl 22d7d08 │ │ + str r1, [sp, #16] │ │ + mcr2 10, 0, r8, cr4, cr10, {7} @ │ │ + cdp2 0, 0, cr9, cr6, cr10, {5} │ │ + cdp2 4, 0, cr4, cr4, cr6, {0} │ │ + mcr2 0, 0, r9, cr7, cr0, {2} │ │ + mcr2 15, 0, r2, cr4, cr13, {5} │ │ + mcr2 15, 0, r8, cr5, cr6, {7} │ │ + @ instruction: 0xfe04ca4e │ │ + mcr2 15, 0, r8, cr3, cr12, {4} │ │ + mcr2 15, 0, r1, cr4, cr8, {0} │ │ + cdp2 15, 0, cr8, cr7, cr2, {2} │ │ + cdp2 12, 0, cr10, cr4, cr2, {2} │ │ + cdp2 14, 0, cr8, cr4, cr8, {7} │ │ + cdp2 5, 0, cr0, cr4, cr5, {2} │ │ + mcr2 6, 0, sl, cr7, cr10, {2} │ │ + mcr2 13, 0, r8, cr5, cr10, {7} │ │ + vdot.bf16 d8, d4, d14[0] │ │ + cdp2 15, 0, cr13, cr4, cr10, {5} │ │ + mcr2 13, 0, r8, cr6, cr4, {4} │ │ + mcr2 9, 0, r6, cr4, cr1, {2} @ │ │ mcr2 9, 0, r4, cr5, cr11, {6} @ │ │ movs r2, #6 │ │ ldr r0, [pc, #876] @ (21d84c4 ) │ │ add r1, pc │ │ add r0, pc │ │ strd r0, r2, [sp, #224] @ 0xe0 │ │ movs r0, #4 │ │ @@ -511616,33 +511616,33 @@ │ │ beq.w 21d85be │ │ add.w r8, sp, #140 @ 0x8c │ │ movs r6, #0 │ │ mov.w sl, #5 │ │ mov.w fp, #0 │ │ mov.w r9, #0 │ │ b.n 21d8538 │ │ - stmia r2!, {r2, r3, r4} │ │ - mcr2 11, 0, fp, cr6, cr2, {5} @ │ │ - mcr2 1, 0, ip, cr6, cr10, {4} │ │ - cdp2 14, 0, cr7, cr6, cr15, {6} │ │ - mcr2 12, 0, r4, cr6, cr3, {5} │ │ - mcr2 1, 0, ip, cr5, cr0, {1} │ │ - mcr2 10, 0, lr, cr6, cr13, {6} @ │ │ - vseleq.f64 d8, d20, d5 │ │ - mcr2 1, 0, r0, cr4, cr5, {6} │ │ - mcr2 11, 0, r8, cr7, cr3, {1} @ │ │ - @ instruction: 0xfe040a61 │ │ - cdp2 0, 0, cr12, cr4, cr0, {2} │ │ - vseleq.f32 s4, s12, s12 │ │ - mcr2 10, 0, r8, cr4, cr15, {3} @ │ │ - mcr2 9, 0, lr, cr4, cr3, {6} @ │ │ - vseleq.f32 s16, s8, s22 │ │ + stmia r2!, {r0, r3, r6} │ │ + mcr2 11, 0, fp, cr6, cr15, {6} @ │ │ + cdp2 1, 0, cr12, cr6, cr7, {6} │ │ + mcr2 14, 0, r7, cr6, cr12, {7} │ │ + cdp2 12, 0, cr4, cr6, cr0, {7} │ │ + mcr2 1, 0, ip, cr5, cr13, {2} │ │ + vseleq.f64 d14, d6, d10 │ │ + mcr2 11, 0, r8, cr4, cr2, {5} @ │ │ + cdp2 2, 0, cr0, cr4, cr2, {0} │ │ + @ instruction: 0xfe078b60 │ │ + vseleq.f32 s0, s9, s28 │ │ + cdp2 0, 0, cr12, cr4, cr13, {3} │ │ + mcr2 10, 0, r2, cr6, cr3, {1} @ │ │ + vseleq.f32 s16, s9, s25 │ │ + vseleq.f32 s28, s8, s0 │ │ + mcr2 10, 0, r8, cr4, cr8, {1} @ │ │ cdp2 4, 0, cr10, cr4, cr14, {5} │ │ - mcr2 15, 0, fp, cr3, cr12, {0} │ │ - mcr2 7, 0, r6, cr6, cr9, {7} │ │ + cdp2 15, 0, cr11, cr3, cr9, {2} │ │ + vcmla.f16 d6, d6, d6[1], #0 │ │ vfmal.f16 d15, s9, s10[1] │ │ lsls r0, r3, #2 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #160] @ 0xa0 │ │ blxne 26ffad0 │ │ ldrb.w r0, [sp, #256] @ 0x100 │ │ @@ -511947,27 +511947,27 @@ │ │ b.n 21d8b24 │ │ add r4, sp, #140 @ 0x8c │ │ mov.w sl, #221 @ 0xdd │ │ movw fp, #557 @ 0x22d │ │ mov.w r8, #0 │ │ mov.w r9, #0 │ │ b.n 21d888e │ │ - lsls r6, r5, #12 │ │ - cdp2 7, 0, cr2, cr5, cr15, {1} │ │ - vfmal.f16 d8, s11, s10[0] │ │ - vfmal.f16 d8, s8, s7[1] │ │ - cdp2 15, 0, cr13, cr4, cr7, {0} │ │ - mcr2 0, 0, sl, cr5, cr8, {1} │ │ - cdp2 0, 0, cr10, cr5, cr12, {1} │ │ - mcr2 13, 0, fp, cr5, cr4, {1} │ │ - cdp2 12, 0, cr11, cr6, cr14, {4} │ │ - mcr2 2, 0, r6, cr6, cr1, {7} │ │ - cdp2 6, 0, cr8, cr5, cr15, {6} │ │ - mcr2 1, 0, r6, cr4, cr10, {7} │ │ - mcr2 5, 0, r6, cr6, cr12, {4} │ │ + lsls r3, r3, #13 │ │ + mcr2 7, 0, r2, cr5, cr12, {2} │ │ + vcmla.f16 q4, , d2[0], #0 │ │ + vcmla.f16 q4, q2, d8[1], #0 │ │ + mcr2 15, 0, sp, cr4, cr4, {1} │ │ + cdp2 0, 0, cr10, cr5, cr5, {3} │ │ + mcr2 0, 0, sl, cr5, cr9, {2} │ │ + vdot.bf16 , , d1[1] │ │ + mcr2 12, 0, fp, cr6, cr11, {5} │ │ + mcr2 3, 0, r6, cr6, cr14, {0} │ │ + mcr2 6, 0, r8, cr5, cr12, {7} │ │ + cdp2 2, 0, cr6, cr4, cr7, {1} │ │ + cdp2 5, 0, cr6, cr6, cr9, {6} │ │ vseleq.f32 s30, s8, s24 │ │ lsls r5, r2, #1 │ │ add.w r9, r9, #1 │ │ cmp r9, r1 │ │ bcs.w 21d83f2 │ │ mov.w r2, r9, lsl #3 │ │ str r2, [sp, #44] @ 0x2c │ │ @@ -512246,33 +512246,33 @@ │ │ cmp r0, #255 @ 0xff │ │ bgt.n 21d8bc0 │ │ cmp r0, #1 │ │ it ne │ │ cmpne r0, #128 @ 0x80 │ │ beq.n 21d8bce │ │ b.w 21da852 │ │ - str r2, [r4, #20] │ │ - mcr2 14, 0, r9, cr5, cr2, {1} │ │ - mcr2 5, 0, r8, cr5, cr5, {0} │ │ - cdp2 4, 0, cr6, cr4, cr0, {4} │ │ - cdp2 15, 0, cr11, cr4, cr15, {5} │ │ - mcr2 5, 0, r8, cr3, cr9, {1} │ │ - cdp2 3, 0, cr6, cr4, cr12, {7} │ │ - vseleq.f64 d13, d20, d15 │ │ - cdp2 4, 0, cr8, cr5, cr5, {5} │ │ - mcr2 3, 0, r6, cr4, cr8, {2} │ │ - cdp2 5, 0, cr14, cr4, cr3, {5} │ │ - mcr2 4, 0, r8, cr3, cr1, {0} │ │ - cdp2 2, 0, cr6, cr4, cr4, {6} │ │ - mcr2 5, 0, ip, cr4, cr6, {7} │ │ - mcr2 3, 0, r8, cr4, cr13, {3} │ │ + str r7, [r1, #24] │ │ + mcr2 14, 0, r9, cr5, cr15, {2} │ │ + cdp2 5, 0, cr8, cr5, cr2, {2} │ │ + cdp2 4, 0, cr6, cr4, cr13, {5} │ │ + mcr2 15, 0, fp, cr4, cr12, {6} │ │ + cdp2 5, 0, cr8, cr3, cr6, {3} │ │ + mcr2 4, 0, r6, cr4, cr9, {0} │ │ + mcr2 11, 0, sp, cr4, cr12, {5} @ │ │ + mcr2 4, 0, r8, cr5, cr2, {6} │ │ + cdp2 3, 0, cr6, cr4, cr5, {4} │ │ + mcr2 5, 0, lr, cr4, cr0, {6} │ │ + mcr2 4, 0, r8, cr3, cr14, {1} │ │ + mcr2 2, 0, r6, cr4, cr1, {7} │ │ + cdp2 6, 0, cr12, cr4, cr3, {1} │ │ + cdp2 3, 0, cr8, cr4, cr10, {5} │ │ mcr2 4, 0, r5, cr4, cr2, {0} │ │ - cdp2 4, 0, cr13, cr7, cr14, {2} │ │ - cdp2 2, 0, cr14, cr6, cr7, {1} │ │ - mcr2 15, 0, r7, cr4, cr11, {5} │ │ + mcr2 4, 0, sp, cr7, cr11, {3} │ │ + mcr2 2, 0, lr, cr6, cr4, {2} │ │ + cdp2 15, 0, cr7, cr4, cr8, {7} │ │ mcr2 5, 0, pc, cr5, cr0, {5} @ │ │ ldrb r0, [r0, #30] │ │ it ne │ │ cmpne.w r0, #1024 @ 0x400 │ │ bne.w 21da852 │ │ ldrh r0, [r5, #0] │ │ cmp r0, #0 │ │ @@ -512532,30 +512532,30 @@ │ │ str r4, [sp, #208] @ 0xd0 │ │ bne.n 21d8ea4 │ │ ldr r1, [pc, #68] @ (21d8ea0 ) │ │ add r1, pc │ │ mov r0, r6 │ │ blx 2701e60 │ │ b.n 21d8f46 │ │ - adds r5, #233 @ 0xe9 │ │ + adds r6, #22 │ │ mcr2 13, 0, r9, cr7, cr3, {5} │ │ - mcr2 2, 0, lr, cr3, cr3, {7} │ │ + cdp2 3, 0, cr14, cr3, cr0, {1} │ │ cdp2 12, 0, cr9, cr3, cr3, {6} │ │ - mcr2 14, 0, r7, cr3, cr11, {2} │ │ - cdp2 3, 0, cr3, cr5, cr9, {5} │ │ - mcr2 15, 0, r7, cr7, cr6, {7} │ │ + cdp2 14, 0, cr7, cr3, cr8, {4} │ │ + mcr2 3, 0, r3, cr5, cr6, {6} │ │ + cdp2 0, 0, cr8, cr7, cr3, {1} │ │ mcr2 14, 0, r6, cr4, cr14, {0} │ │ - mcr2 15, 0, pc, cr7, cr1, {0} @ │ │ - cdp2 2, 0, cr9, cr4, cr9, {1} │ │ - mcr2 4, 0, r9, cr6, cr8, {7} │ │ - vcmla.f16 , q3, d15[0], #0 │ │ - cdp2 0, 0, cr8, cr6, cr7, {2} │ │ + mcr2 15, 0, pc, cr7, cr14, {1} @ │ │ + mcr2 2, 0, r9, cr4, cr6, {2} │ │ + cdp2 5, 0, cr9, cr6, cr5, {1} │ │ + vfmal.f16 , d6, d4[3] │ │ + mcr2 0, 0, r8, cr6, cr4, {3} │ │ mcr2 11, 0, r9, cr4, cr3, {5} @ │ │ - mcr2 9, 0, r7, cr3, cr4, {7} @ │ │ - cdp2 1, 0, cr13, cr6, cr1, {6} │ │ + vseleq.f32 s14, s6, s3 │ │ + cdp2 1, 0, cr13, cr6, cr14, {7} │ │ @ instruction: 0xfe0649c9 │ │ movs r2, #9 │ │ ldr r0, [pc, #804] @ (21d91d0 ) │ │ add r1, pc │ │ add r0, pc │ │ strd r0, r2, [sp, #224] @ 0xe0 │ │ ldr r0, [sp, #56] @ 0x38 │ │ @@ -512843,29 +512843,29 @@ │ │ ldr r3, [sp, #44] @ 0x2c │ │ itt eq │ │ moveq r1, r3 │ │ lsreq r2, r0, #1 │ │ mov r0, r6 │ │ blx 26ffb70 │ │ b.n 21d9248 │ │ - ldrh r3, [r5, r4] │ │ - cdp2 4, 0, cr11, cr6, cr11, {3} │ │ - vdot.bf16 , q3, d15[1] │ │ - vseleq.f32 s10, s11, s22 │ │ + ldrh r0, [r3, r5] │ │ + mcr2 4, 0, fp, cr6, cr8, {4} │ │ + mcr2 13, 0, r5, cr6, cr12, {4} │ │ + mcr2 10, 0, r5, cr5, cr8, {5} @ │ │ cdp2 0, 0, cr5, cr6, cr14, {4} │ │ - cdp2 1, 0, cr0, cr7, cr6, {6} │ │ - mcr2 6, 0, r9, cr4, cr4, {4} │ │ - mcr2 1, 0, r0, cr5, cr4, {2} │ │ - cdp2 1, 0, cr3, cr4, cr3, {4} │ │ - cdp2 2, 0, cr11, cr7, cr7, {5} │ │ - @ instruction: 0xfe065963 │ │ - mcr2 4, 0, fp, cr6, cr11, {6} │ │ + mcr2 1, 0, r0, cr7, cr3, {7} │ │ + cdp2 6, 0, cr9, cr4, cr1, {6} │ │ + cdp2 1, 0, cr0, cr5, cr1, {4} │ │ + mcr2 1, 0, r3, cr4, cr0, {5} │ │ + mcr2 2, 0, fp, cr7, cr4, {6} │ │ + mcr2 9, 0, r5, cr6, cr0, {4} @ │ │ + cdp2 5, 0, cr11, cr6, cr8, {0} │ │ cdp2 14, 0, cr4, cr5, cr10, {6} │ │ - cdp2 0, 0, cr0, cr7, cr2, {0} │ │ - cdp2 12, 0, cr0, cr4, cr1, {1} │ │ + cdp2 0, 0, cr0, cr7, cr15, {1} │ │ + cdp2 12, 0, cr0, cr4, cr14, {2} │ │ vseleq.f16 s18, s14, s28 │ │ mov r0, r9 │ │ mov r2, r5 │ │ bl 21e1a58 const&, Eigen::Matrix const&)@@Base+0x1d4> │ │ ldr r1, [pc, #748] @ (21d9500 ) │ │ add r1, pc │ │ mov r0, r9 │ │ @@ -513142,30 +513142,30 @@ │ │ add.w r9, sp, #240 @ 0xf0 │ │ add r0, pc │ │ movs r5, #0 │ │ add r4, pc │ │ mov.w fp, #0 │ │ mov sl, r0 │ │ b.n 21d955c │ │ - lsrs r3, r4, #14 │ │ - mcr2 7, 0, r5, cr7, cr13, {2} │ │ + lsrs r0, r2, #15 │ │ + cdp2 7, 0, cr5, cr7, cr10, {4} │ │ @ instruction: 0xfe066966 │ │ - cdp2 5, 0, cr7, cr7, cr11, {1} │ │ - cdp2 6, 0, cr5, cr6, cr7, {4} │ │ - cdp2 2, 0, cr11, cr6, cr6, {0} │ │ - @ instruction: 0xfe050a6c │ │ - mcr2 5, 0, r5, cr7, cr15, {6} │ │ + mcr2 5, 0, r7, cr7, cr8, {2} │ │ + mcr2 6, 0, r5, cr6, cr4, {5} │ │ + mcr2 2, 0, fp, cr6, cr3, {1} │ │ + mcr2 10, 0, r0, cr5, cr9, {4} @ │ │ + cdp2 6, 0, cr5, cr7, cr12, {0} │ │ mcr2 7, 0, r6, cr6, cr13, {4} │ │ - cdp2 7, 0, cr1, cr7, cr5, {3} │ │ - mcr2 7, 0, r1, cr6, cr7, {7} │ │ - mcr2 7, 0, r5, cr5, cr12, {5} │ │ - mcr2 6, 0, r3, cr4, cr9, {5} │ │ - mcr2 2, 0, r3, cr4, cr9, {3} │ │ - cdp2 4, 0, cr5, cr6, cr3, {7} │ │ - mcr2 2, 0, r3, cr6, cr6, {3} │ │ + mcr2 7, 0, r1, cr7, cr2, {4} │ │ + vcmla.f16 d1, d6, d4[1], #0 │ │ + cdp2 7, 0, cr5, cr5, cr9, {7} │ │ + cdp2 6, 0, cr3, cr4, cr6, {7} │ │ + cdp2 2, 0, cr3, cr4, cr6, {5} │ │ + mcr2 5, 0, r5, cr6, cr0, {0} │ │ + cdp2 2, 0, cr3, cr6, cr3, {5} │ │ vfmal.f16 d15, s13, s10[1] │ │ lsls r4, r0, #1 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #76] @ 0x4c │ │ blxne 26ffad0 │ │ ldr r6, [sp, #48] @ 0x30 │ │ @@ -513320,21 +513320,21 @@ │ │ add.w sl, sp, #168 @ 0xa8 │ │ add.w fp, sp, #184 @ 0xb8 │ │ add.w r8, sl, #1 │ │ mov.w r9, #0 │ │ movs r2, #0 │ │ movs r4, #0 │ │ b.n 21d9744 │ │ - strb r1, [r2, #8] │ │ - mcr2 7, 0, r1, cr6, cr4, {3} │ │ - mcr2 15, 0, r6, cr5, cr7, {7} │ │ - mcr2 12, 0, sl, cr4, cr4, {6} │ │ + strb r6, [r7, #8] │ │ + cdp2 7, 0, cr1, cr6, cr1, {5} │ │ + cdp2 0, 0, cr7, cr5, cr4, {1} │ │ + vdot.bf16 d10, d4, d1[0] │ │ cdp2 2, 0, cr9, cr6, cr6, {2} │ │ vfmal.f16 d4, s7, s10[0] │ │ - mcr2 0, 0, r3, cr7, cr11, {3} │ │ + cdp2 0, 0, cr3, cr7, cr8, {5} │ │ vfmal.f16 d15, s13, s10[1] │ │ lsls r0, r3, #3 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #224] @ 0xe0 │ │ blxne 26ffad0 │ │ ldrb.w r0, [sp, #152] @ 0x98 │ │ @@ -513744,34 +513744,34 @@ │ │ add r0, sp, #168 @ 0xa8 │ │ movs r4, #0 │ │ mov.w fp, #0 │ │ movs r5, #0 │ │ adds r0, #1 │ │ str r0, [sp, #36] @ 0x24 │ │ b.n 21d9c10 │ │ - add r5, sp, #672 @ 0x2a0 │ │ - mcr2 5, 0, sp, cr5, cr13, {5} │ │ - cdp2 1, 0, cr5, cr4, cr5, {7} │ │ - mcr2 15, 0, r6, cr6, cr13, {4} │ │ - cdp2 1, 0, cr5, cr6, cr15, {0} │ │ - mcr2 12, 0, ip, cr6, cr10, {2} │ │ - vcmla.f16 d2, d5, d14[1], #0 │ │ - cdp2 1, 0, cr5, cr7, cr7, {0} │ │ + add r5, sp, #852 @ 0x354 │ │ + cdp2 5, 0, cr13, cr5, cr10, {7} │ │ + mcr2 2, 0, r5, cr4, cr2, {0} │ │ + cdp2 15, 0, cr6, cr6, cr10, {6} │ │ + mcr2 1, 0, r5, cr6, cr12, {1} │ │ + cdp2 12, 0, cr12, cr6, cr7, {4} │ │ + vfmal.f16 q1, d5, d3[1] │ │ + mcr2 1, 0, r5, cr7, cr4, {1} │ │ cdp2 2, 0, cr6, cr5, cr15, {2} │ │ - cdp2 2, 0, cr3, cr7, cr11, {0} │ │ - cdp2 0, 0, cr5, cr4, cr15, {2} │ │ - cdp2 14, 0, cr6, cr6, cr5, {0} │ │ - cdp2 3, 0, cr1, cr6, cr4, {2} │ │ - mcr2 5, 0, ip, cr5, cr4, {5} │ │ + mcr2 2, 0, r3, cr7, cr8, {1} │ │ + mcr2 0, 0, r5, cr4, cr12, {3} │ │ + mcr2 14, 0, r6, cr6, cr2, {1} │ │ + mcr2 3, 0, r1, cr6, cr1, {3} │ │ + cdp2 5, 0, cr12, cr5, cr1, {7} │ │ mcr2 5, 0, r4, cr6, cr8, {1} │ │ - cdp2 6, 0, cr2, cr7, cr14, {0} │ │ - cdp2 6, 0, cr2, cr7, cr13, {0} │ │ - cdp2 14, 0, cr4, cr7, cr13, {7} │ │ - cdp2 3, 0, cr3, cr5, cr13, {1} │ │ - vcmla.f16 d10, d5, d5[0], #0 │ │ + mcr2 6, 0, r2, cr7, cr11, {1} │ │ + mcr2 6, 0, r2, cr7, cr10, {1} │ │ + mcr2 15, 0, r4, cr7, cr10, {0} │ │ + mcr2 3, 0, r3, cr5, cr10, {2} │ │ + vfmal.f16 d10, s10, s5[0] │ │ vfmal.f16 d15, s13, s10[1] │ │ lsls r0, r3, #2 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #160] @ 0xa0 │ │ blxne 26ffad0 │ │ ldr r6, [sp, #48] @ 0x30 │ │ @@ -514131,30 +514131,30 @@ │ │ ldr.w r9, [sp, #60] @ 0x3c │ │ mov.w r0, r8, lsl #1 │ │ cmp.w r8, #0 │ │ mov.w r4, #0 │ │ strb.w r0, [sp, #152] @ 0x98 │ │ bne.n 21da036 │ │ b.n 21da040 │ │ - movs r5, #179 @ 0xb3 │ │ - cdp2 0, 0, cr5, cr7, cr10, {2} │ │ - mcr2 14, 0, r8, cr4, cr2, {4} │ │ - cdp2 5, 0, cr2, cr4, cr7, {0} │ │ - vfmal.f16 d12, s14, s5[1] │ │ - mcr2 13, 0, r8, cr5, cr7, {7} │ │ - mcr2 4, 0, r2, cr4, cr15, {5} │ │ - cdp2 7, 0, cr12, cr7, cr14, {5} │ │ - cdp2 7, 0, cr12, cr5, cr8, {0} │ │ - mcr2 3, 0, r2, cr5, cr11, {6} │ │ - cdp2 2, 0, cr11, cr7, cr3, {3} │ │ - cdp2 6, 0, cr12, cr4, cr0, {7} │ │ - @ instruction: 0xfe054b41 │ │ - cdp2 14, 0, cr14, cr6, cr6, {1} │ │ - vseleq.f16 s12, s8, s26 │ │ - mcr2 15, 0, ip, cr6, cr7, {7} │ │ + movs r5, #224 @ 0xe0 │ │ + mcr2 0, 0, r5, cr7, cr7, {3} │ │ + mcr2 14, 0, r8, cr4, cr15, {5} │ │ + mcr2 5, 0, r2, cr4, cr4, {1} │ │ + vcmla.f16 q6, , d7[1], #0 │ │ + cdp2 14, 0, cr8, cr5, cr4, {1} │ │ + cdp2 4, 0, cr2, cr4, cr12, {7} │ │ + mcr2 7, 0, ip, cr7, cr11, {6} │ │ + mcr2 7, 0, ip, cr5, cr5, {1} │ │ + cdp2 4, 0, cr2, cr5, cr8, {0} │ │ + mcr2 2, 0, fp, cr7, cr0, {4} │ │ + cdp2 7, 0, cr12, cr4, cr13, {0} │ │ + @ instruction: 0xfe054b6e │ │ + mcr2 14, 0, lr, cr6, cr3, {2} │ │ + mcr2 9, 0, r6, cr4, cr10, {1} @ │ │ + cdp2 0, 0, cr13, cr6, cr4, {1} │ │ cdp2 0, 0, cr15, cr3, cr8, {2} │ │ movs r7, r1 │ │ add.w sl, r0, #1 │ │ mov r0, sl │ │ blx 26ffb80 │ │ mov r9, r0 │ │ orr.w r0, sl, #1 │ │ @@ -514468,34 +514468,34 @@ │ │ bmi.n 21da3bc │ │ lsls r0, r0, #30 │ │ bmi.w 21da4e2 │ │ ldr r1, [pc, #80] @ (21da3b8 ) │ │ add r1, pc │ │ b.n 21da3c0 │ │ nop │ │ - add r5, pc, #176 @ (adr r5, 21da420 ) │ │ - vdot.bf16 q6, , d3[0] │ │ - @ instruction: 0xfe044965 │ │ - mcr2 7, 0, r6, cr6, cr7, {0} │ │ - mcr2 0, 0, r2, cr6, cr7, {3} │ │ - cdp2 5, 0, cr2, cr7, cr13, {6} │ │ - mcr2 14, 0, sl, cr6, cr8, {6} │ │ - @ instruction: 0xfe04696e │ │ + add r5, pc, #356 @ (adr r5, 21da4d4 ) │ │ + mcr2 13, 0, ip, cr5, cr0, {3} │ │ + mcr2 9, 0, r4, cr4, cr2, {4} @ │ │ + cdp2 7, 0, cr6, cr6, cr4, {2} │ │ + cdp2 0, 0, cr2, cr6, cr4, {5} │ │ + mcr2 5, 0, r2, cr7, cr10, {7} │ │ + cdp2 15, 0, cr10, cr6, cr5, {0} │ │ + mcr2 9, 0, r6, cr4, cr11, {4} @ │ │ mcr2 9, 0, r5, cr5, cr11, {5} @ │ │ - mcr2 9, 0, r2, cr7, cr7, {3} @ │ │ - mcr2 7, 0, r4, cr4, cr9, {5} │ │ - mcr2 5, 0, r6, cr6, cr1, {3} │ │ - cdp2 6, 0, cr14, cr6, cr14, {1} │ │ - mcr2 12, 0, r0, cr4, cr4, {2} │ │ - cdp2 6, 0, cr4, cr4, cr11, {7} │ │ - mcr2 2, 0, r8, cr5, cr5, {1} │ │ - mcr2 9, 0, lr, cr6, cr1, {5} @ │ │ - vdot.bf16 q5, q2, d6[1] │ │ - mcr2 12, 0, lr, cr4, cr9, {2} │ │ - vdot.bf16 d10, d19, d3[0] │ │ + vseleq.f16 s4, s15, s9 │ │ + cdp2 7, 0, cr4, cr4, cr6, {7} │ │ + mcr2 5, 0, r6, cr6, cr14, {4} │ │ + mcr2 6, 0, lr, cr6, cr11, {2} │ │ + cdp2 12, 0, cr0, cr4, cr1, {4} │ │ + mcr2 7, 0, r4, cr4, cr8, {0} │ │ + cdp2 2, 0, cr8, cr5, cr2, {3} │ │ + mcr2 9, 0, lr, cr6, cr14, {6} @ │ │ + mcr2 13, 0, sl, cr4, cr3, {4} │ │ + cdp2 12, 0, cr14, cr4, cr6, {4} │ │ + mcr2 13, 0, sl, cr3, cr0, {5} │ │ @ instruction: 0xfe044962 │ │ add r1, pc │ │ add r0, sp, #140 @ 0x8c │ │ blx 2701e60 │ │ ldr r0, [r5, #4] │ │ lsls r1, r0, #28 │ │ bpl.w 21da64c │ │ @@ -514634,19 +514634,19 @@ │ │ beq.w 21da3c6 │ │ ldr r0, [sp, #160] @ 0xa0 │ │ blx 26ffad0 │ │ b.n 21da3c6 │ │ nop │ │ subs r3, #172 @ 0xac │ │ mcr2 12, 0, r3, cr7, cr2, {0} │ │ - vseleq.f64 d0, d23, d0 │ │ - mcr2 10, 0, r0, cr4, cr7, {5} @ │ │ - @ instruction: 0xfe040ac7 │ │ - mcr2 7, 0, r4, cr4, cr14, {4} │ │ - mcr2 10, 0, ip, cr4, cr4, {5} @ │ │ + vseleq.f64 d0, d23, d29 │ │ + @ instruction: 0xfe040ae4 │ │ + mcr2 10, 0, r0, cr4, cr4, {7} @ │ │ + cdp2 7, 0, cr4, cr4, cr11, {6} │ │ + @ instruction: 0xfe04cae1 │ │ vcmla.f16 d3, d3, d1[0], #0 │ │ ldr r1, [pc, #996] @ (21da94c ) │ │ and.w r0, r0, #3 │ │ ldr r2, [sp, #20] │ │ add r1, pc │ │ ldrb r0, [r2, r0] │ │ strb.w r0, [sp, #256] @ 0x100 │ │ @@ -515015,38 +515015,38 @@ │ │ add r0, sp, #152 @ 0x98 │ │ bl 207d398 │ │ b.n 21dad6c │ │ b.n 21dad12 │ │ b.n 21dad6c │ │ b.n 21dad12 │ │ subs r2, #142 @ 0x8e │ │ - cdp2 2, 0, cr6, cr7, cr9, {2} │ │ - mcr2 9, 0, r4, cr6, cr3, {1} @ │ │ - mcr2 6, 0, r0, cr4, cr0, {5} │ │ - mcr2 11, 0, sl, cr5, cr6, {0} @ │ │ - cdp2 1, 0, cr6, cr4, cr9, {4} │ │ - vfmal.f16 q0, d22, d5[2] │ │ + mcr2 2, 0, r6, cr7, cr6, {3} │ │ + @ instruction: 0xfe064960 │ │ + mcr2 6, 0, r0, cr4, cr13, {6} │ │ + @ instruction: 0xfe05ab43 │ │ + mcr2 1, 0, r6, cr4, cr6, {5} │ │ + vseleq.f16 s0, s12, s5 │ │ mcr2 2, 0, r8, cr4, cr9, {6} │ │ - cdp2 6, 0, cr14, cr3, cr13, {3} │ │ + mcr2 6, 0, lr, cr3, cr10, {4} │ │ cdp2 2, 0, cr8, cr4, cr7, {4} │ │ - vseleq.f32 s2, s6, s1 │ │ - cdp2 5, 0, cr14, cr7, cr9, {5} │ │ - vcmla.f16 d14, d4, d13[0], #0 │ │ + @ instruction: 0xfe031a4d │ │ + mcr2 5, 0, lr, cr7, cr6, {6} │ │ + vfmal.f16 d14, s8, s5[1] │ │ cdp2 3, 0, cr13, cr3, cr8, {4} │ │ lsls r5, r2, #1 │ │ - stmia r6!, {r2, r3, r4, r6} │ │ + stmia r6!, {r0, r3, r7} │ │ mcr2 1, 0, r8, cr4, cr13, {1} │ │ - vdot.bf16 , , d11[1] │ │ - mcr2 13, 0, r7, cr5, cr3, {4} │ │ - cdp2 12, 0, cr9, cr5, cr11, {6} │ │ - mcr2 6, 0, lr, cr5, cr0, {7} │ │ - mcr2 2, 0, r6, cr3, cr5, {1} │ │ - mcr2 3, 0, lr, cr5, cr9, {5} │ │ + mcr2 14, 0, r7, cr3, cr8, {0} │ │ + vdot.bf16 , , d0[0] │ │ + mcr2 12, 0, r9, cr5, cr8, {7} │ │ + mcr2 7, 0, lr, cr5, cr13, {0} │ │ + cdp2 2, 0, cr6, cr3, cr2, {3} │ │ + cdp2 3, 0, cr14, cr5, cr6, {7} │ │ mcr2 6, 0, r3, cr4, cr15, {1} │ │ - cdp2 15, 0, cr13, cr7, cr3, {6} │ │ + mcr2 15, 0, sp, cr7, cr0, {7} │ │ mcr2 1, 0, lr, cr5, cr14, {6} │ │ b.n 21daad0 │ │ b.n 21dad12 │ │ b.n 21dad6c │ │ b.n 21daad0 │ │ b.n 21dad12 │ │ b.n 21dad6c │ │ @@ -515795,36 +515795,36 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [r4, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ b.n 21db108 │ │ nop │ │ - @ instruction: 0xb765 │ │ - vcmla.f16 d7, d21, d9[0], #0 │ │ - cdp2 0, 0, cr6, cr5, cr9, {1} │ │ + @ instruction: 0xb792 │ │ + vfmal.f16 d7, s11, s13[0] │ │ + mcr2 0, 0, r6, cr5, cr6, {2} │ │ mcr2 7, 0, ip, cr4, cr8, {6} │ │ lsls r5, r2, #1 │ │ - cbz r1, 21db164 │ │ - cdp2 15, 0, cr5, cr6, cr5, {6} │ │ - cdp2 0, 0, cr2, cr4, cr0, {4} │ │ - mcr2 15, 0, r5, cr5, cr5, {3} │ │ - mcr2 14, 0, r3, cr4, cr7, {3} │ │ - cdp2 15, 0, cr5, cr4, cr5, {1} │ │ - mcr2 14, 0, sp, cr4, cr11, {4} │ │ - mcr2 14, 0, r5, cr4, cr5, {6} │ │ + cbz r6, 21db16e │ │ + mcr2 15, 0, r5, cr6, cr2, {7} │ │ + cdp2 0, 0, cr2, cr4, cr13, {5} │ │ + cdp2 15, 0, cr5, cr5, cr2, {5} │ │ + cdp2 14, 0, cr3, cr4, cr4, {5} │ │ + mcr2 15, 0, r5, cr4, cr2, {2} │ │ + cdp2 14, 0, cr13, cr4, cr8, {6} │ │ + cdp2 15, 0, cr5, cr4, cr2, {0} │ │ cdp2 0, 0, cr3, cr4, cr9, {4} │ │ - cdp2 14, 0, cr5, cr7, cr5, {4} │ │ - cdp2 14, 0, cr11, cr4, cr10, {3} │ │ - mcr2 14, 0, r5, cr4, cr5, {1} │ │ - vdot.bf16 , q10, d4[0] │ │ - vdot.bf16 , q10, d5[1] │ │ + mcr2 14, 0, r5, cr7, cr2, {5} │ │ + mcr2 14, 0, fp, cr4, cr7, {4} │ │ + cdp2 14, 0, cr5, cr4, cr2, {3} │ │ + mcr2 13, 0, r5, cr4, cr1, {7} │ │ + mcr2 14, 0, r5, cr4, cr2, {0} │ │ vseleq.f64 d4, d20, d18 │ │ - mcr2 13, 0, r5, cr7, cr5, {4} │ │ - mcr2 7, 0, r5, cr4, cr3, {4} │ │ + vdot.bf16 , , d2[0] │ │ + cdp2 7, 0, cr5, cr4, cr0, {6} │ │ mcr2 4, 0, ip, cr6, cr8, {7} │ │ lsls r5, r2, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #40 @ 0x28 │ │ ldr r5, [pc, #92] @ (21db1d8 ) │ │ cmp r3, #10 │ │ @@ -515863,19 +515863,19 @@ │ │ cmp r1, r0 │ │ itt eq │ │ addeq sp, #40 @ 0x28 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ stmia r4!, {r1, r2, r3, r4, r5} │ │ lsls r5, r2, #1 │ │ - ldr r0, [r6, r5] │ │ + ldr r5, [r3, r6] │ │ mcr2 14, 0, r2, cr4, cr8, {1} │ │ mcr2 6, 0, sl, cr12, cr14, {6} │ │ lsls r4, r2, #1 │ │ - str r1, [sp, #808] @ 0x328 │ │ + str r1, [sp, #988] @ 0x3dc │ │ mcr2 3, 0, ip, cr6, cr6, {7} │ │ lsls r5, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #84 @ 0x54 │ │ mov fp, r0 │ │ @@ -516124,25 +516124,25 @@ │ │ itt eq │ │ addeq r1, r5, #1 │ │ lsreq r2, r0, #1 │ │ mov r0, fp │ │ blx 26ffb70 │ │ b.n 21db544 │ │ nop │ │ - ldrb r1, [r0, r0] │ │ + ldrb r6, [r5, r0] │ │ mcr2 13, 0, r2, cr4, cr6, {6} │ │ vdot.bf16 d2, d23, d14[1] │ │ - mcr2 5, 0, r5, cr7, cr11, {3} │ │ - vseleq.f32 s10, s13, s3 │ │ - vdot.bf16 d10, d4, d9[0] │ │ + cdp2 5, 0, cr5, cr7, cr8, {5} │ │ + @ instruction: 0xfe065ace │ │ + mcr2 13, 0, sl, cr4, cr6, {1} │ │ cdp2 6, 0, cr7, cr6, cr7, {4} │ │ - mcr2 12, 0, fp, cr3, cr2, {7} │ │ + mcr2 13, 0, fp, cr3, cr15, {0} │ │ mcr2 5, 0, r7, cr3, cr11, {4} │ │ - mcr2 13, 0, r9, cr3, cr1, {5} │ │ - cdp2 4, 0, cr5, cr4, cr1, {2} │ │ + mcr2 13, 0, r9, cr3, cr14, {6} │ │ + cdp2 4, 0, cr5, cr4, cr14, {3} │ │ mcr2 6, 0, ip, cr6, cr6, {5} │ │ lsls r5, r2, #1 │ │ movs r2, #13 │ │ str.w r8, [sp, #72] @ 0x48 │ │ strd r0, r2, [sp, #64] @ 0x40 │ │ movs r0, #0 │ │ movs r2, #45 @ 0x2d │ │ @@ -516411,29 +516411,29 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne.w r0, [fp, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ stmia r3!, {r3, r4, r5, r7} │ │ lsls r5, r2, #1 │ │ - asrs r0, r1, #30 │ │ + asrs r5, r6, #30 │ │ cdp2 6, 0, cr12, cr4, cr10, {5} │ │ lsls r5, r2, #1 │ │ - ldrt pc, [sp, #4] │ │ - bmi.n 21db868 │ │ - vseleq.f32 s10, s8, s0 │ │ - mcr2 13, 0, r0, cr4, cr9, {3} │ │ - vseleq.f32 s26, s14, s31 │ │ - cdp2 0, 0, cr7, cr3, cr0, {7} │ │ - vdot.bf16 q4, , d12[1] │ │ - cdp2 0, 0, cr9, cr6, cr10, {0} │ │ + strb.w pc, [sl, #3588] @ 0xe04 │ │ + bmi.n 21db6c2 │ │ + vseleq.f32 s10, s8, s27 │ │ + vdot.bf16 d0, d20, d6[1] │ │ + mcr2 10, 0, sp, cr7, cr12, {2} @ │ │ + cdp2 1, 0, cr7, cr3, cr13, {0} │ │ + mcr2 14, 0, r8, cr5, cr9, {0} │ │ + mcr2 0, 0, r9, cr6, cr7, {1} │ │ mcr2 14, 0, fp, cr5, cr6, {6} │ │ lsls r5, r2, #1 │ │ - asrs r5, r4, #27 │ │ - mcr2 12, 0, r0, cr4, cr1, {6} │ │ + asrs r2, r2, #28 │ │ + mcr2 12, 0, r0, cr4, cr14, {7} │ │ mcr2 5, 0, fp, cr7, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #128 @ 0x80 │ │ mov r9, r1 │ │ ldr r1, [pc, #852] @ (21dbb48 ) │ │ mov r4, r0 │ │ @@ -516752,46 +516752,46 @@ │ │ ldrb.w r0, [sp, #20] │ │ lsls r0, r0, #31 │ │ beq.w 21dbd1a │ │ ldr r0, [sp, #28] │ │ b.n 21dbd16 │ │ nop │ │ movs r7, #61 @ 0x3d │ │ - @ instruction: 0xfe07d96a │ │ - mcr2 3, 0, pc, cr3, cr2, {4} @ │ │ + mcr2 9, 0, sp, cr7, cr7, {4} @ │ │ + mcr2 3, 0, pc, cr3, cr15, {5} @ │ │ cdp2 3, 0, cr4, cr5, cr10, {7} │ │ - cdp2 7, 0, cr11, cr7, cr6, {7} │ │ - mcr2 0, 0, r1, cr3, cr8, {1} │ │ - vfmal.f16 d11, s12, s6[0] │ │ - vdot.bf16 d10, d19, d9[1] │ │ - mcr2 1, 0, r3, cr5, cr9, {3} │ │ - mcr2 10, 0, r8, cr6, cr9, {5} @ │ │ - vcmla.f16 d11, d6, d13[0], #0 │ │ - mcr2 7, 0, r9, cr3, cr14, {5} │ │ - cdp2 15, 0, cr4, cr4, cr8, {1} │ │ - cdp2 15, 0, cr0, cr6, cr2, {4} │ │ - cdp2 5, 0, cr15, cr6, cr14, {0} │ │ - vdot.bf16 q3, q2, d15[1] │ │ - vfmal.f16 , d5, d0[3] │ │ - cdp2 15, 0, cr0, cr3, cr1, {4} │ │ - cdp2 12, 0, cr6, cr6, cr6, {3} │ │ + vfmal.f16 d11, s14, s6[0] │ │ + cdp2 0, 0, cr1, cr3, cr5, {3} │ │ + vcmla.f16 , q3, d0[0], #0 │ │ + mcr2 13, 0, sl, cr3, cr6, {6} │ │ + cdp2 1, 0, cr3, cr5, cr6, {5} │ │ + @ instruction: 0xfe068ae6 │ │ + vfmal.f16 d11, s12, s5[1] │ │ + cdp2 7, 0, cr9, cr3, cr11, {7} │ │ + mcr2 15, 0, r4, cr4, cr5, {2} │ │ + cdp2 15, 0, cr0, cr6, cr15, {5} │ │ + mcr2 5, 0, pc, cr6, cr11, {1} @ │ │ + mcr2 13, 0, r6, cr4, cr12, {4} │ │ + vcmla.f16 d13, d21, d5[1], #0 │ │ + cdp2 15, 0, cr0, cr3, cr14, {5} │ │ + mcr2 12, 0, r6, cr6, cr3, {4} │ │ mcr2 6, 0, r2, cr6, cr15, {5} │ │ - @ instruction: 0xfe078a69 │ │ - cdp2 0, 0, cr13, cr6, cr12, {0} │ │ + mcr2 10, 0, r8, cr7, cr6, {4} @ │ │ + mcr2 0, 0, sp, cr6, cr9, {1} │ │ cdp2 6, 0, cr2, cr5, cr1, {5} │ │ - mcr2 0, 0, r3, cr7, cr11, {2} │ │ - cdp2 6, 0, cr10, cr6, cr5, {3} │ │ - mcr2 7, 0, fp, cr5, cr4, {0} │ │ - mcr2 13, 0, r6, cr3, cr3, {0} │ │ - mcr2 12, 0, r6, cr5, cr6, {6} │ │ - cdp2 3, 0, cr14, cr5, cr12, {6} │ │ - mcr2 12, 0, r6, cr6, cr0, {7} │ │ - vseleq.f64 d6, d21, d18 │ │ - vfmal.f16 q4, d22, d1[0] │ │ - cdp2 3, 0, cr14, cr6, cr12, {5} │ │ + cdp2 0, 0, cr3, cr7, cr8, {4} │ │ + mcr2 6, 0, sl, cr6, cr2, {4} │ │ + cdp2 7, 0, cr11, cr5, cr1, {2} │ │ + vdot.bf16 q3, , d0[0] │ │ + vdot.bf16 d6, d5, d3[0] │ │ + mcr2 3, 0, lr, cr5, cr9, {7} │ │ + mcr2 13, 0, r6, cr6, cr13, {0} │ │ + @ instruction: 0xfe056bcf │ │ + vfmal.f16 q4, d22, d6[3] │ │ + mcr2 3, 0, lr, cr6, cr9, {6} │ │ vseleq.f16 s8, s13, s15 │ │ movs r0, #9 │ │ strd sl, r0, [sp, #112] @ 0x70 │ │ movs r0, #0 │ │ add r1, pc │ │ str r0, [sp, #104] @ 0x68 │ │ movs r2, #210 @ 0xd2 │ │ @@ -517033,26 +517033,26 @@ │ │ itt ne │ │ ldrne r0, [r4, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ pop {r1, r6, r7, pc} │ │ lsls r5, r2, #1 │ │ - ldr r5, [pc, #84] @ (21dbeb8 ) │ │ - cdp2 2, 0, cr13, cr6, cr7, {4} │ │ + ldr r5, [pc, #264] @ (21dbf6c ) │ │ + mcr2 2, 0, sp, cr6, cr4, {5} │ │ vcmla.f16 d11, d19, d6[0], #0 │ │ lsls r5, r2, #1 │ │ - cmp r5, #255 @ 0xff │ │ - cdp2 0, 0, cr1, cr6, cr11, {1} │ │ - mcr2 4, 0, r9, cr4, cr2, {2} │ │ - mcr2 11, 0, r6, cr4, cr5, {1} @ │ │ - mcr2 9, 0, ip, cr5, cr3, {4} @ │ │ - mcr2 10, 0, r6, cr6, cr10, {3} @ │ │ - vseleq.f32 s12, s11, s10 │ │ - vseleq.f64 d4, d5, d11 │ │ + cmp r6, #44 @ 0x2c │ │ + mcr2 0, 0, r1, cr6, cr8, {2} │ │ + mcr2 4, 0, r9, cr4, cr15, {3} │ │ + @ instruction: 0xfe046b62 │ │ + @ instruction: 0xfe05c9c0 │ │ + vseleq.f32 s12, s13, s15 │ │ + mcr2 10, 0, r6, cr5, cr2, {5} @ │ │ + mcr2 11, 0, r4, cr5, cr8, {1} @ │ │ Address 0x21dbe8a is out of bounds. │ │ │ │ │ │ 021dbe8c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -517124,17 +517124,17 @@ │ │ strd r2, r0, [sp] │ │ movs r2, #15 │ │ strd r6, r0, [sp, #8] │ │ mov r0, r4 │ │ bl 221a5c4 │ │ b.n 21dbf54 │ │ nop │ │ - add r0, pc, #996 @ (adr r0, 21dc330 ) │ │ - cdp2 14, 0, cr4, cr6, cr13, {7} │ │ - cdp2 14, 0, cr10, cr4, cr8, {0} │ │ + add r1, pc, #152 @ (adr r1, 21dbfe4 ) │ │ + mcr2 15, 0, r4, cr6, cr10, {0} │ │ + mcr2 14, 0, sl, cr4, cr5, {1} │ │ vfmal.f16 d15, s9, s10[1] │ │ lsls r0, r2, #1 │ │ ldrd r2, r1, [sp, #84] @ 0x54 │ │ ands.w r3, r0, #1 │ │ itt eq │ │ addeq r1, r4, #1 │ │ lsreq r2, r0, #1 │ │ @@ -517159,16 +517159,16 @@ │ │ strd r6, r0, [sp, #8] │ │ strd r2, r0, [sp] │ │ mov r0, r4 │ │ movs r2, #15 │ │ bl 221a5c4 │ │ b.n 21dbfb0 │ │ nop │ │ - ldr r6, [pc, #556] @ (21dc1d8 ) │ │ - vdot.bf16 d4, d20, d3[0] │ │ + ldr r6, [pc, #736] @ (21dc28c ) │ │ + mcr2 13, 0, r4, cr4, cr0, {5} │ │ vfmal.f16 d15, s9, s10[1] │ │ lsls r0, r2, #1 │ │ ldrd r2, r1, [sp, #84] @ 0x54 │ │ ands.w r3, r0, #1 │ │ itt eq │ │ addeq r1, r4, #1 │ │ lsreq r2, r0, #1 │ │ @@ -517564,29 +517564,29 @@ │ │ ldrb.w r0, [sp, #120] @ 0x78 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #128] @ 0x80 │ │ blxne 26ffad0 │ │ b.n 21dc3f0 │ │ nop │ │ - lsls r5, r2 │ │ - mcr2 6, 0, r6, cr6, cr9, {2} │ │ - cdp2 3, 0, cr8, cr5, cr0, {3} │ │ + lsrs r2, r0 │ │ + cdp2 6, 0, cr6, cr6, cr6, {4} │ │ + cdp2 3, 0, cr8, cr5, cr13, {4} │ │ vfmal.f16 d15, s13, s10[1] │ │ lsls r0, r2, #1 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #88] @ 0x58 │ │ blxne 26ffad0 │ │ b.n 21dc418 │ │ - lsrs r7, r5, #25 │ │ - mcr2 2, 0, r8, cr5, cr14, {7} │ │ - vcmla.f16 q1, q11, d0[1], #0 │ │ - mcr2 5, 0, r6, cr6, cr6, {4} │ │ - cdp2 2, 0, cr8, cr5, cr2, {5} │ │ + lsrs r4, r3, #26 │ │ + cdp2 3, 0, cr8, cr5, cr11, {1} │ │ + vseleq.f16 s4, s12, s26 │ │ + cdp2 5, 0, cr6, cr6, cr3, {6} │ │ + cdp2 2, 0, cr8, cr5, cr15, {6} │ │ cdp2 4, 0, cr5, cr6, cr10, {4} │ │ vfmal.f16 d15, s15, s10[1] │ │ lsls r0, r0, #1 │ │ lsls r0, r0, #31 │ │ beq.n 21dc4a8 │ │ ldr r0, [sp, #72] @ 0x48 │ │ b.n 21dc4a4 │ │ @@ -517653,30 +517653,30 @@ │ │ nop │ │ @ instruction: 0xb71e │ │ lsls r5, r2, #1 │ │ str r7, [sp, #112] @ 0x70 │ │ lsls r4, r2, #1 │ │ str r7, [sp, #56] @ 0x38 │ │ lsls r4, r2, #1 │ │ - cmp r0, #28 │ │ - cdp2 12, 0, cr13, cr5, cr11, {2} │ │ - mcr2 4, 0, r6, cr6, cr8, {5} │ │ - cdp2 6, 0, cr4, cr5, cr15, {2} │ │ - mcr2 7, 0, ip, cr6, cr12, {0} │ │ - cdp2 15, 0, cr12, cr5, cr8, {5} │ │ - mcr2 11, 0, r4, cr3, cr13, {7} @ │ │ - cdp2 3, 0, cr10, cr4, cr11, {0} │ │ - cdp2 0, 0, cr8, cr5, cr11, {7} │ │ - cdp2 7, 0, cr2, cr6, cr7, {5} │ │ - mcr2 13, 0, r8, cr6, cr12, {4} │ │ - @ instruction: 0xfe04aa45 │ │ - cdp2 12, 0, cr12, cr4, cr5, {2} │ │ + cmp r0, #73 @ 0x49 │ │ + mcr2 12, 0, sp, cr5, cr8, {3} │ │ + cdp2 4, 0, cr6, cr6, cr5, {7} │ │ + mcr2 6, 0, r4, cr5, cr12, {3} │ │ + cdp2 7, 0, cr12, cr6, cr9, {2} │ │ + mcr2 15, 0, ip, cr5, cr5, {6} │ │ + cdp2 12, 0, cr4, cr3, cr10, {1} │ │ + mcr2 3, 0, sl, cr4, cr8, {1} │ │ + mcr2 1, 0, r8, cr5, cr8, {0} │ │ + mcr2 7, 0, r2, cr6, cr4, {6} │ │ + vdot.bf16 q4, q11, d9[0] │ │ + mcr2 10, 0, sl, cr4, cr2, {3} @ │ │ + mcr2 12, 0, ip, cr4, cr2, {3} │ │ cdp2 7, 0, cr11, cr3, cr0, {6} │ │ lsls r5, r2, #1 │ │ - stmia r5!, {r0, r1, r5, r6, r7} │ │ + stmia r6!, {r4} │ │ cdp2 2, 0, cr11, cr5, cr2, {0} │ │ lsls r5, r2, #1 │ │ │ │ 021dc508 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -517938,31 +517938,31 @@ │ │ mov.w r9, #0 │ │ mov.w sl, #0 │ │ ldr r0, [r0, #12] │ │ b.n 21dc81a │ │ strb r6, [r2, r2] │ │ cdp2 2, 0, cr9, cr7, cr2, {7} │ │ lsls r4, r2, #1 │ │ - str r7, [r0, #16] │ │ - vcmla.f16 d4, d21, d7[1], #0 │ │ - mcr2 14, 0, fp, cr4, cr7, {7} │ │ - vcmla.f16 d4, d6, d3[1], #0 │ │ - mcr2 7, 0, r4, cr4, cr9, {1} │ │ - mcr2 13, 0, r7, cr4, cr10, {1} │ │ - @ instruction: 0xfe063a6f │ │ - mcr2 15, 0, r5, cr6, cr12, {6} │ │ - mcr2 12, 0, r7, cr5, cr14, {6} │ │ + str r4, [r6, #16] │ │ + vfmal.f16 q2, d21, d4[0] │ │ + cdp2 15, 0, cr11, cr4, cr4, {1} │ │ + vfmal.f16 q2, d6, d0[0] │ │ + cdp2 7, 0, cr4, cr4, cr6, {3} │ │ + vdot.bf16 , q2, d7[1] │ │ + mcr2 10, 0, r3, cr6, cr12, {4} @ │ │ + cdp2 0, 0, cr6, cr6, cr9, {0} │ │ + vdot.bf16 d7, d5, d11[0] │ │ cdp2 14, 0, cr4, cr6, cr6, {6} │ │ - mcr2 7, 0, sl, cr7, cr6, {0} │ │ - cdp2 7, 0, cr4, cr4, cr3, {1} │ │ - mcr2 1, 0, r4, cr4, cr9, {0} │ │ - cdp2 7, 0, cr0, cr6, cr3, {5} │ │ - vfmal.f16 , d21, d1[0] │ │ - cdp2 12, 0, cr7, cr6, cr0, {1} │ │ - cdp2 2, 0, cr2, cr6, cr2, {0} │ │ + cdp2 7, 0, cr10, cr7, cr3, {2} │ │ + mcr2 7, 0, r4, cr4, cr0, {2} │ │ + cdp2 1, 0, cr4, cr4, cr6, {2} │ │ + mcr2 7, 0, r0, cr6, cr0, {6} │ │ + vfmal.f16 , d21, d6[3] │ │ + cdp2 12, 0, cr7, cr6, cr13, {2} │ │ + cdp2 2, 0, cr2, cr6, cr15, {1} │ │ cdp2 1, 0, cr15, cr6, cr10, {0} │ │ lsrs r1, r0, #8 │ │ cmp sl, r1 │ │ bcs.w 21dcae4 │ │ mov.w r2, sl, lsl #3 │ │ str r2, [sp, #28] │ │ lsr.w r2, r0, r2 │ │ @@ -518201,26 +518201,26 @@ │ │ and.w r1, r1, #3 │ │ cmp r8, r1 │ │ bcc.w 21dc82c │ │ ldr r1, [sp, #32] │ │ ldrh r1, [r1, #0] │ │ b.n 21dc810 │ │ nop │ │ - movs r4, #242 @ 0xf2 │ │ - mcr2 0, 0, r8, cr4, cr15, {0} │ │ - cdp2 5, 0, cr4, cr3, cr7, {5} │ │ - mcr2 4, 0, r2, cr4, cr8, {2} │ │ - mcr2 11, 0, r9, cr4, cr9, {7} @ │ │ - cdp2 5, 0, cr4, cr5, cr13, {0} │ │ - mcr2 3, 0, r2, cr4, cr14, {5} │ │ - cdp2 6, 0, cr10, cr4, cr7, {0} │ │ - mcr2 4, 0, r4, cr3, cr3, {3} │ │ - cdp2 3, 0, cr2, cr4, cr4, {1} │ │ - mcr2 6, 0, r8, cr4, cr4, {2} │ │ - mcr2 3, 0, r4, cr4, cr9, {6} │ │ + movs r5, #31 │ │ + cdp2 0, 0, cr8, cr4, cr12, {2} │ │ + mcr2 5, 0, r4, cr3, cr4, {6} │ │ + cdp2 4, 0, cr2, cr4, cr5, {4} │ │ + cdp2 12, 0, cr9, cr4, cr6, {1} │ │ + mcr2 5, 0, r4, cr5, cr10, {1} │ │ + cdp2 3, 0, cr2, cr4, cr11, {7} │ │ + mcr2 6, 0, sl, cr4, cr4, {1} │ │ + cdp2 4, 0, cr4, cr3, cr0, {5} │ │ + mcr2 3, 0, r2, cr4, cr1, {2} │ │ + cdp2 6, 0, cr8, cr4, cr1, {4} │ │ + cdp2 4, 0, cr4, cr4, cr6, {0} │ │ vseleq.f16 s8, s9, s25 │ │ add r1, pc │ │ add r0, sp, #76 @ 0x4c │ │ blx 2701e60 │ │ add r5, sp, #104 @ 0x68 │ │ ldr r1, [pc, #680] @ (21dcd9c ) │ │ add r1, pc │ │ @@ -518477,35 +518477,35 @@ │ │ add.w r8, sp, #48 @ 0x30 │ │ add.w fp, sp, #76 @ 0x4c │ │ add r4, pc │ │ mov.w r9, #0 │ │ mov.w sl, #0 │ │ movs r6, #0 │ │ b.n 21dce26 │ │ - subs r0, r7, #1 │ │ + subs r5, r4, #2 │ │ vdot.bf16 , , d3[1] │ │ - cdp2 1, 0, cr13, cr3, cr7, {7} │ │ + mcr2 2, 0, sp, cr3, cr4, {0} │ │ cdp2 14, 0, cr5, cr6, cr11, {4} │ │ - mcr2 4, 0, r9, cr3, cr9, {6} │ │ - mcr2 4, 0, lr, cr5, cr8, {0} │ │ - mcr2 3, 0, lr, cr3, cr10, {7} │ │ - cdp2 5, 0, cr8, cr3, cr12, {5} │ │ + cdp2 5, 0, cr9, cr3, cr6, {0} │ │ + cdp2 4, 0, cr14, cr5, cr5, {2} │ │ + cdp2 4, 0, cr14, cr3, cr7, {1} │ │ + mcr2 5, 0, r8, cr3, cr9, {6} │ │ mcr2 4, 0, r1, cr4, cr3, {5} │ │ - mcr2 15, 0, r3, cr7, cr13, {7} │ │ + cdp2 0, 0, cr4, cr7, cr10, {1} │ │ mcr2 13, 0, r5, cr5, cr9, {5} │ │ - cdp2 2, 0, cr0, cr3, cr1, {6} │ │ + cdp2 2, 0, cr0, cr3, cr14, {7} │ │ vdot.bf16 , , d7[1] │ │ - cdp2 1, 0, cr12, cr3, cr6, {2} │ │ + mcr2 1, 0, ip, cr3, cr3, {3} │ │ mcr2 13, 0, r5, cr4, cr5, {0} │ │ - cdp2 12, 0, cr1, cr3, cr1, {7} │ │ + vdot.bf16 d1, d3, d14[0] │ │ cdp2 12, 0, cr5, cr6, cr3, {6} │ │ - cdp2 0, 0, cr4, cr3, cr11, {5} │ │ + mcr2 0, 0, r4, cr3, cr8, {6} │ │ mcr2 12, 0, r5, cr4, cr1, {3} │ │ - mcr2 15, 0, sp, cr3, cr11, {4} │ │ - cdp2 5, 0, cr7, cr4, cr13, {4} │ │ + cdp2 15, 0, cr13, cr3, cr8, {6} │ │ + mcr2 5, 0, r7, cr4, cr10, {5} │ │ vfmal.f16 d15, s13, s10[1] │ │ lsls r0, r0, #1 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #72] @ 0x48 │ │ blxne 26ffad0 │ │ ldrb.w r0, [sp, #48] @ 0x30 │ │ @@ -518880,22 +518880,22 @@ │ │ b.n 21dd2e2 │ │ b.n 21dd238 │ │ b.n 21dd2e2 │ │ b.n 21dd238 │ │ b.n 21dd2e2 │ │ b.n 21dd2e2 │ │ nop │ │ - subs r7, r4, r6 │ │ - cdp2 14, 0, cr12, cr6, cr13, {6} │ │ - cdp2 5, 0, cr7, cr6, cr5, {0} │ │ - vseleq.f64 d1, d6, d5 │ │ + subs r4, r2, r7 │ │ + mcr2 14, 0, ip, cr6, cr10, {7} │ │ + mcr2 5, 0, r7, cr6, cr2, {1} │ │ + mcr2 11, 0, r1, cr6, cr2, {1} @ │ │ cdp2 0, 0, cr1, cr6, cr5, {6} │ │ - cdp2 0, 0, cr12, cr7, cr13, {6} │ │ - mcr2 13, 0, sp, cr3, cr13, {2} │ │ - cdp2 14, 0, cr3, cr4, cr5, {0} │ │ + mcr2 0, 0, ip, cr7, cr10, {7} │ │ + vdot.bf16 d13, d19, d10[0] │ │ + mcr2 14, 0, r3, cr4, cr2, {1} │ │ cdp2 0, 0, cr14, cr4, cr12, {0} │ │ b.n 21dd2e2 │ │ b.n 21dd238 │ │ b.n 21dd2e2 │ │ b.n 21dd238 │ │ b.n 21dd2e2 │ │ b.n 21dd238 │ │ @@ -518984,33 +518984,33 @@ │ │ ldrne r0, [sp, #84] @ 0x54 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ b.n 21dd2e2 │ │ b.n 21dd2d4 │ │ sub sp, #144 @ 0x90 │ │ lsls r5, r2, #1 │ │ - stmia r1!, {r1, r3, r4, r5, r6, r7} │ │ - mcr2 14, 0, r3, cr3, cr3, {2} │ │ - cdp2 15, 0, cr8, cr4, cr0, {6} │ │ - mcr2 9, 0, r1, cr6, cr3, {3} @ │ │ - @ instruction: 0xfe06196b │ │ - mcr2 2, 0, r5, cr6, cr2, {2} │ │ - cdp2 12, 0, cr12, cr6, cr6, {5} │ │ - mcr2 7, 0, r3, cr6, cr7, {1} │ │ - vcmla.f16 d1, d6, d14[0], #0 │ │ - mcr2 14, 0, fp, cr6, cr7, {1} │ │ + stmia r2!, {r0, r1, r2, r5} │ │ + cdp2 14, 0, cr3, cr3, cr0, {4} │ │ + cdp2 15, 0, cr8, cr4, cr13, {7} │ │ + vseleq.f16 s2, s13, s1 │ │ + mcr2 9, 0, r1, cr6, cr8, {4} @ │ │ + mcr2 2, 0, r5, cr6, cr15, {3} │ │ + mcr2 12, 0, ip, cr6, cr3, {6} │ │ + cdp2 7, 0, cr3, cr6, cr4, {3} │ │ + vfmal.f16 d1, s12, s7[1] │ │ + cdp2 14, 0, cr11, cr6, cr4, {3} │ │ mcr2 9, 0, sl, cr3, cr2, {5} @ │ │ lsls r5, r2, #1 │ │ - ldr r4, [sp, #536] @ 0x218 │ │ + ldr r4, [sp, #716] @ 0x2cc │ │ mcr2 3, 0, sl, cr4, cr4, {7} │ │ lsls r5, r2, #1 │ │ - adds r5, r5, r3 │ │ - mcr2 1, 0, r5, cr6, cr4, {6} │ │ - cdp2 4, 0, cr5, cr6, cr14, {3} │ │ - mcr2 6, 0, r3, cr6, cr9, {5} │ │ + adds r2, r3, r4 │ │ + cdp2 2, 0, cr5, cr6, cr1, {0} │ │ + mcr2 4, 0, r5, cr6, cr11, {4} │ │ + cdp2 6, 0, cr3, cr6, cr6, {7} │ │ mcr2 5, 0, fp, cr6, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ sub sp, #136 @ 0x88 │ │ mov r8, r0 │ │ ldr r0, [pc, #892] @ (21dd6cc ) │ │ mov r5, r1 │ │ @@ -519338,32 +519338,32 @@ │ │ ldrb.w r0, [r8] │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne.w r0, [r8, #8] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - strb r1, [r0, #20] │ │ - @ instruction: 0xfe0319cc │ │ + strb r6, [r5, #20] │ │ + mcr2 9, 0, r1, cr3, cr9, {7} @ │ │ cdp2 2, 0, cr10, cr4, cr2, {3} │ │ lsls r5, r2, #1 │ │ - asrs r2, r2, #25 │ │ - @ instruction: 0xfe06fb4e │ │ - vseleq.f16 s2, s8, s24 │ │ - cdp2 0, 0, cr9, cr4, cr15, {5} │ │ - cdp2 12, 0, cr8, cr5, cr6, {0} │ │ - vseleq.f32 s30, s13, s5 │ │ - vcmla.f16 , q2, d6[1], #0 │ │ - mcr2 10, 0, r9, cr4, cr1, {5} @ │ │ - mcr2 10, 0, pc, cr3, cr10, {0} @ │ │ - mcr2 11, 0, r8, cr4, cr7, {3} @ │ │ - mcr2 11, 0, r7, cr6, cr10, {1} @ │ │ - vcmla.f16 d1, d4, d14[0], #0 │ │ - mcr2 10, 0, r7, cr4, cr0, {7} @ │ │ - vcmla.f16 d9, d4, d7[1], #0 │ │ + asrs r7, r7, #25 │ │ + mcr2 11, 0, pc, cr6, cr11, {3} @ │ │ + mcr2 9, 0, r1, cr4, cr9, {1} @ │ │ + mcr2 0, 0, r9, cr4, cr12, {6} │ │ + mcr2 12, 0, r8, cr5, cr3, {1} │ │ + @ instruction: 0xfe06facf │ │ + vfmal.f16 d1, s9, s6[0] │ │ + mcr2 10, 0, r9, cr4, cr14, {6} @ │ │ + @ instruction: 0xfe03fa47 │ │ + vseleq.f64 d8, d20, d20 │ │ + @ instruction: 0xfe067b67 │ │ + vfmal.f16 d1, s8, s7[1] │ │ + mcr2 11, 0, r7, cr4, cr13, {0} @ │ │ + vfmal.f16 , d4, d4[0] │ │ mcr2 15, 0, r9, cr4, cr8, {5} │ │ lsls r5, r2, #1 │ │ │ │ 021dd714 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -519638,45 +519638,45 @@ │ │ itt ne │ │ ldrne r0, [sp, #36] @ 0x24 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ ldr r6, [sp, #608] @ 0x260 │ │ lsls r5, r2, #1 │ │ cmp r6, r1 │ │ - cdp2 2, 0, cr1, cr7, cr7, {7} │ │ + mcr2 3, 0, r1, cr7, cr4, {0} │ │ mcr2 0, 0, r8, cr5, cr0, {5} │ │ lsls r4, r2, #1 │ │ strh r2, [r5, #4] │ │ lsls r4, r2, #1 │ │ strh r4, [r4, #4] │ │ lsls r4, r2, #1 │ │ strh r6, [r2, #4] │ │ lsls r4, r2, #1 │ │ - ldr r6, [pc, #572] @ (21ddc3c ) │ │ - cdp2 6, 0, cr3, cr5, cr15, {1} │ │ - cdp2 5, 0, cr3, cr4, cr5, {2} │ │ - @ instruction: 0xfe046b46 │ │ - vfmal.f16 q1, d6, d3[3] │ │ - mcr2 10, 0, r6, cr6, cr6, {7} @ │ │ - cdp2 4, 0, cr6, cr6, cr12, {4} │ │ + ldr r6, [pc, #752] @ (21ddcf0 ) │ │ + mcr2 6, 0, r3, cr5, cr12, {2} │ │ + mcr2 5, 0, r3, cr4, cr2, {3} │ │ + mcr2 11, 0, r6, cr4, cr3, {3} @ │ │ + vcmla.f16 d2, d22, d8[1], #0 │ │ + vseleq.f64 d6, d6, d19 │ │ + mcr2 4, 0, r6, cr6, cr9, {5} │ │ cdp2 15, 0, cr7, cr6, cr14, {3} │ │ lsls r4, r2, #1 │ │ ldrb r4, [r4, #29] │ │ lsls r4, r2, #1 │ │ - asrs r0, r6, #1 │ │ - cdp2 4, 0, cr9, cr5, cr3, {6} │ │ - cdp2 0, 0, cr1, cr4, cr8, {5} │ │ + asrs r5, r3, #2 │ │ + mcr2 4, 0, r9, cr5, cr0, {7} │ │ + mcr2 0, 0, r1, cr4, cr5, {6} │ │ mcr2 15, 0, r7, cr6, cr2, {1} │ │ lsls r4, r2, #1 │ │ ldrb r6, [r6, #28] │ │ lsls r4, r2, #1 │ │ - @ instruction: 0xb67b │ │ + @ instruction: 0xb6a8 │ │ mcr2 1, 0, sl, cr3, cr6, {7} │ │ lsls r5, r2, #1 │ │ - add sp, #100 @ 0x64 │ │ + add sp, #280 @ 0x118 │ │ mcr2 12, 0, r9, cr5, cr8, {1} │ │ lsls r5, r2, #1 │ │ │ │ 021dda44 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -519747,17 +519747,17 @@ │ │ add r4, sp, #40 @ 0x28 │ │ strd r2, r0, [sp] │ │ movs r2, #15 │ │ mov r0, r4 │ │ bl 221a5c4 │ │ b.n 21ddb10 │ │ nop │ │ - ldr r3, [pc, #580] @ (21ddd4c ) │ │ - mcr2 3, 0, r3, cr5, cr1, {1} │ │ - cdp2 2, 0, cr3, cr4, cr5, {2} │ │ + ldr r3, [pc, #760] @ (21dde00 ) │ │ + mcr2 3, 0, r3, cr5, cr14, {2} │ │ + mcr2 2, 0, r3, cr4, cr2, {3} │ │ vfmal.f16 d15, s9, s10[1] │ │ movs r0, r5 │ │ ldrd r2, r1, [sp, #44] @ 0x2c │ │ ands.w r3, r0, #1 │ │ itt eq │ │ addeq r1, r4, #1 │ │ lsreq r2, r0, #1 │ │ @@ -519800,16 +519800,16 @@ │ │ strd r5, r0, [sp, #8] │ │ strd r2, r0, [sp] │ │ mov r0, r4 │ │ movs r2, #15 │ │ bl 221a5c4 │ │ b.n 21ddb9c │ │ nop │ │ - ldr r0, [r1, #0] │ │ - mcr2 5, 0, r2, cr6, cr13, {1} │ │ + ldr r5, [r6, #0] │ │ + cdp2 5, 0, cr2, cr6, cr10, {3} │ │ vfmal.f16 d15, s13, s10[1] │ │ movs r0, r5 │ │ ldrd r2, r1, [sp, #44] @ 0x2c │ │ ands.w r3, r0, #1 │ │ itt eq │ │ addeq r1, r4, #1 │ │ lsreq r2, r0, #1 │ │ @@ -519835,16 +519835,16 @@ │ │ movs r2, #221 @ 0xdd │ │ strd r5, r0, [sp, #8] │ │ strd r2, r0, [sp] │ │ mov r0, r4 │ │ movs r2, #15 │ │ bl 221a5c4 │ │ b.n 21ddbf8 │ │ - str r2, [r5, #120] @ 0x78 │ │ - cdp2 1, 0, cr6, cr6, cr0, {2} │ │ + str r7, [r2, #124] @ 0x7c │ │ + cdp2 1, 0, cr6, cr6, cr13, {3} │ │ vfmal.f16 d15, s13, s10[1] │ │ movs r0, r5 │ │ add.w r8, r4, #1 │ │ ldrd r2, r1, [sp, #44] @ 0x2c │ │ ands.w r3, r0, #1 │ │ itt eq │ │ moveq r1, r8 │ │ @@ -520234,24 +520234,24 @@ │ │ beq.n 21de0ac │ │ ldr r0, [sp, #88] @ 0x58 │ │ blx 26ffad0 │ │ b.n 21de0ac │ │ b.n 21de0ac │ │ b.n 21de0ba │ │ nop │ │ - ldr r1, [pc, #744] @ (21de300 ) │ │ + ldr r1, [pc, #924] @ (21de3b4 ) │ │ mcr2 13, 0, r4, cr6, cr11, {2} │ │ - cdp2 12, 0, cr0, cr3, cr12, {4} │ │ + mcr2 12, 0, r0, cr3, cr9, {5} │ │ mcr2 2, 0, r0, cr5, cr12, {2} │ │ - cdp2 0, 0, cr3, cr7, cr9, {2} │ │ - mcr2 0, 0, r3, cr4, cr12, {2} │ │ - mcr2 15, 0, sl, cr4, cr9, {5} │ │ - cdp2 3, 0, cr8, cr4, cr11, {0} │ │ + mcr2 0, 0, r3, cr7, cr6, {3} │ │ + cdp2 0, 0, cr3, cr4, cr9, {4} │ │ + cdp2 15, 0, cr10, cr4, cr6, {7} │ │ + mcr2 3, 0, r8, cr4, cr8, {1} │ │ cdp2 12, 0, cr4, cr6, cr9, {4} │ │ - @ instruction: 0xfe032aca │ │ + mcr2 10, 0, r2, cr3, cr7, {7} @ │ │ cdp2 0, 0, cr14, cr6, cr4, {2} │ │ b.n 21de09a │ │ ldrb.w r0, [sp, #40] @ 0x28 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #48] @ 0x30 │ │ blxne 26ffad0 │ │ @@ -520313,31 +520313,31 @@ │ │ ldrne r0, [sp, #60] @ 0x3c │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldr r3, [sp, #416] @ 0x1a0 │ │ lsls r5, r2, #1 │ │ ldr r4, [pc, #220] @ (21de1c0 ) │ │ - cdp2 15, 0, cr10, cr3, cr11, {6} │ │ - cdp2 7, 0, cr4, cr4, cr15, {5} │ │ - cdp2 12, 0, cr12, cr6, cr11, {7} │ │ - mcr2 11, 0, r0, cr5, cr3, {6} @ │ │ - mcr2 5, 0, r6, cr6, cr3, {0} │ │ - mcr2 14, 0, r0, cr6, cr2, {4} │ │ - mcr2 2, 0, r7, cr4, cr14, {0} │ │ - vseleq.f16 s8, s8, s2 │ │ - mcr2 7, 0, sl, cr5, cr15, {2} │ │ - cdp2 7, 0, cr4, cr6, cr2, {0} │ │ - mcr2 11, 0, ip, cr6, cr2, {7} @ │ │ - vfmal.f16 d2, s11, s15[1] │ │ - mcr2 13, 0, r0, cr6, cr1, {2} │ │ - mcr2 0, 0, fp, cr4, cr9, {0} │ │ + mcr2 15, 0, sl, cr3, cr8, {7} │ │ + mcr2 7, 0, r4, cr4, cr12, {6} │ │ + mcr2 13, 0, ip, cr6, cr8, {0} │ │ + cdp2 12, 0, cr0, cr5, cr0, {0} │ │ + cdp2 5, 0, cr6, cr6, cr0, {2} │ │ + mcr2 14, 0, r0, cr6, cr15, {5} │ │ + cdp2 2, 0, cr7, cr4, cr11, {2} │ │ + vseleq.f16 s8, s8, s29 │ │ + cdp2 7, 0, cr10, cr5, cr12, {4} │ │ + cdp2 7, 0, cr4, cr6, cr15, {1} │ │ + mcr2 12, 0, ip, cr6, cr15, {0} │ │ + vcmla.f16 q1, , d12[1], #0 │ │ + mcr2 13, 0, r0, cr6, cr14, {3} │ │ + cdp2 0, 0, cr11, cr4, cr6, {2} │ │ mcr2 11, 0, r9, cr3, cr4, {4} @ │ │ lsls r5, r2, #1 │ │ - ldrh r0, [r5, #50] @ 0x32 │ │ + ldrh r5, [r2, #52] @ 0x34 │ │ mcr2 5, 0, r9, cr4, cr6, {6} │ │ lsls r5, r2, #1 │ │ │ │ 021de128 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -520662,31 +520662,31 @@ │ │ lsls r4, r2, #1 │ │ strb r6, [r3, #26] │ │ lsls r4, r2, #1 │ │ strb r0, [r3, #26] │ │ lsls r4, r2, #1 │ │ strb r4, [r1, #26] │ │ lsls r4, r2, #1 │ │ - ldrb r1, [r4, #25] │ │ - mcr2 12, 0, r2, cr6, cr5, {2} │ │ - vseleq.f64 d10, d20, d3 │ │ - mcr2 4, 0, r4, cr3, cr13, {2} │ │ - mcr2 11, 0, r2, cr5, cr13, {7} @ │ │ - @ instruction: 0xfe04bb44 │ │ - cdp2 12, 0, cr14, cr6, cr11, {2} │ │ - mcr2 0, 0, r6, cr4, cr10, {6} │ │ + ldrb r6, [r1, #26] │ │ + cdp2 12, 0, cr2, cr6, cr2, {4} │ │ + mcr2 11, 0, sl, cr4, cr0, {5} @ │ │ + cdp2 4, 0, cr4, cr3, cr10, {4} │ │ + cdp2 12, 0, cr2, cr5, cr10, {1} │ │ + mcr2 11, 0, fp, cr4, cr1, {3} @ │ │ + mcr2 12, 0, lr, cr6, cr8, {3} │ │ + cdp2 1, 0, cr6, cr4, cr7, {0} │ │ vseleq.f32 s6, s13, s21 │ │ - mcr2 3, 0, r4, cr7, cr10, {3} │ │ - cdp2 0, 0, cr6, cr5, cr6, {4} │ │ - mcr2 12, 0, r7, cr6, cr12, {6} │ │ + cdp2 3, 0, cr4, cr7, cr7, {5} │ │ + mcr2 0, 0, r6, cr5, cr3, {5} │ │ + vdot.bf16 d7, d6, d9[0] │ │ mcr2 4, 0, r7, cr6, cr14, {7} │ │ lsls r4, r2, #1 │ │ strb r4, [r6, #19] │ │ lsls r4, r2, #1 │ │ - lsls r2, r0, #24 │ │ + lsls r7, r5, #24 │ │ mcr2 0, 0, r2, cr5, cr0, {0} │ │ blx 26ffb80 │ │ ldr r1, [pc, #592] @ (21de71c ) │ │ movs r2, #12 │ │ movs r3, #17 │ │ str r2, [sp, #36] @ 0x24 │ │ add r1, pc │ │ @@ -520914,37 +520914,37 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #68] @ 0x44 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ str r4, [sp, #520] @ 0x208 │ │ lsls r5, r2, #1 │ │ - @ instruction: 0xea70fe04 │ │ + @ instruction: 0xea9dfe04 │ │ adds r4, #34 @ 0x22 │ │ - mcr2 12, 0, r8, cr7, cr2, {1} │ │ - vseleq.f32 s22, s6, s11 │ │ - vseleq.f32 s16, s12, s13 │ │ - cdp2 4, 0, cr2, cr4, cr9, {0} │ │ - mcr2 14, 0, r3, cr6, cr4, {3} │ │ - cdp2 5, 0, cr0, cr6, cr5, {4} │ │ - vseleq.f16 s28, s13, s25 │ │ + mcr2 12, 0, r8, cr7, cr15, {2} │ │ + mcr2 10, 0, fp, cr3, cr2, {2} @ │ │ + mcr2 10, 0, r8, cr6, cr3, {2} @ │ │ + mcr2 4, 0, r2, cr4, cr6, {1} │ │ + cdp2 14, 0, cr3, cr6, cr1, {5} │ │ + mcr2 5, 0, r0, cr6, cr2, {5} │ │ + mcr2 9, 0, lr, cr6, cr9, {6} @ │ │ mcr2 3, 0, r4, cr4, cr9, {3} │ │ - vfmal.f16 q1, d3, d4[3] │ │ + vcmla.f16 d2, d19, d9[1], #0 │ │ vseleq.f32 s30, s8, s25 │ │ cdp2 2, 0, cr7, cr6, cr0, {3} │ │ lsls r4, r2, #1 │ │ strb r4, [r4, #9] │ │ lsls r4, r2, #1 │ │ - add r1, sp, #676 @ 0x2a4 │ │ + add r1, sp, #856 @ 0x358 │ │ cdp2 5, 0, cr9, cr3, cr4, {1} │ │ lsls r5, r2, #1 │ │ - add r3, pc, #284 @ (adr r3, 21de878 ) │ │ + add r3, pc, #464 @ (adr r3, 21de92c ) │ │ cdp2 15, 0, cr8, cr5, cr6, {3} │ │ lsls r5, r2, #1 │ │ - add r0, sp, #160 @ 0xa0 │ │ + add r0, sp, #340 @ 0x154 │ │ mcr2 3, 0, r4, cr4, cr14, {7} │ │ Address 0x21de766 is out of bounds. │ │ │ │ │ │ 021de768 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -521327,41 +521327,41 @@ │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #52] @ 0x34 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ ldrh r4, [r0, #50] @ 0x32 │ │ lsls r5, r2, #1 │ │ - strh r4, [r6, #48] @ 0x30 │ │ - cdp2 6, 0, cr2, cr4, cr1, {2} │ │ - mcr2 0, 0, r2, cr4, cr7, {1} │ │ - cdp2 7, 0, cr7, cr6, cr15, {7} │ │ - @ instruction: 0xfe065b4a │ │ - cdp2 1, 0, cr0, cr6, cr13, {5} │ │ - cdp2 6, 0, cr14, cr5, cr5, {3} │ │ - mcr2 10, 0, r5, cr4, cr4, {7} @ │ │ + strh r1, [r4, #50] @ 0x32 │ │ + cdp2 6, 0, cr2, cr4, cr14, {3} │ │ + cdp2 0, 0, cr2, cr4, cr4, {3} │ │ + vfmal.f16 d7, s12, s8[1] │ │ + mcr2 11, 0, r5, cr6, cr7, {3} @ │ │ + mcr2 1, 0, r0, cr6, cr10, {6} │ │ + mcr2 6, 0, lr, cr5, cr2, {4} │ │ + vseleq.f64 d5, d4, d17 │ │ cdp2 4, 0, cr3, cr6, cr4, {6} │ │ - mcr2 13, 0, r3, cr7, cr2, {4} │ │ - mcr2 10, 0, r5, cr5, cr14, {4} @ │ │ - mcr2 6, 0, r7, cr6, cr4, {7} │ │ - mcr2 0, 0, r0, cr6, cr12, {1} │ │ - mcr2 1, 0, r4, cr5, cr12, {4} │ │ - cdp2 14, 0, cr13, cr4, cr2, {1} │ │ - mcr2 6, 0, r7, cr5, cr11, {3} │ │ - cdp2 12, 0, cr3, cr5, cr14, {4} │ │ - mcr2 1, 0, ip, cr5, cr7, {3} │ │ - cdp2 5, 0, cr10, cr5, cr1, {2} │ │ + mcr2 13, 0, r3, cr7, cr15, {5} │ │ + @ instruction: 0xfe055acb │ │ + cdp2 7, 0, cr7, cr6, cr1, {1} │ │ + cdp2 0, 0, cr0, cr6, cr9, {3} │ │ + cdp2 1, 0, cr4, cr5, cr9, {6} │ │ + cdp2 14, 0, cr13, cr4, cr15, {2} │ │ + cdp2 6, 0, cr7, cr5, cr8, {5} │ │ + mcr2 12, 0, r3, cr5, cr11, {5} │ │ + cdp2 1, 0, cr12, cr5, cr4, {5} │ │ + cdp2 5, 0, cr10, cr5, cr14, {3} │ │ mcr2 0, 0, r9, cr3, cr12, {5} │ │ lsls r5, r2, #1 │ │ - strh r0, [r2, #28] │ │ + strh r5, [r7, #28] │ │ mcr2 10, 0, r8, cr4, cr0, {7} @ │ │ lsls r5, r2, #1 │ │ - movs r7, r7 │ │ - mcr2 12, 0, r3, cr5, cr6, {6} │ │ - mcr2 4, 0, r2, cr5, cr2, {0} │ │ + lsls r4, r5, #1 │ │ + vdot.bf16 d3, d5, d3[0] │ │ + mcr2 4, 0, r2, cr5, cr15, {1} │ │ Address 0x21debbe is out of bounds. │ │ │ │ │ │ 021debc0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -521667,20 +521667,20 @@ │ │ ldrh r6, [r7, #20] │ │ lsls r5, r2, #1 │ │ ldrh r0, [r0, #22] │ │ lsls r5, r2, #1 │ │ cmp r5, #132 @ 0x84 │ │ mcr2 10, 0, r8, cr7, cr12, {2} @ │ │ lsls r5, r2, #1 │ │ - add r3, pc, #536 @ (adr r3, 21df114 ) │ │ - mcr2 3, 0, sl, cr3, cr2, {4} │ │ - vseleq.f64 d13, d3, d23 │ │ - cdp2 3, 0, cr10, cr5, cr1, {7} │ │ - cdp2 3, 0, cr12, cr3, cr10, {0} │ │ - vdot.bf16 d15, d3, d1[1] │ │ + add r3, pc, #716 @ (adr r3, 21df1c8 ) │ │ + mcr2 3, 0, sl, cr3, cr15, {5} │ │ + mcr2 11, 0, sp, cr3, cr4, {2} @ │ │ + cdp2 4, 0, cr10, cr5, cr14, {0} │ │ + mcr2 3, 0, ip, cr3, cr7, {1} │ │ + vdot.bf16 , , d14[0] │ │ @ instruction: 0xfe058946 │ │ lsls r5, r2, #1 │ │ ldr r1, [pc, #464] @ (21df0e8 ) │ │ movs r0, #0 │ │ strd r0, r0, [sp, #176] @ 0xb0 │ │ add r1, pc │ │ str r0, [sp, #184] @ 0xb8 │ │ @@ -521837,43 +521837,43 @@ │ │ blx 2700df0 │ │ b.n 21df0a6 │ │ add r0, sp, #40 @ 0x28 │ │ blx 2703790 │ │ blx 26ffaf0 │ │ ldrh r4, [r2, #14] │ │ lsls r5, r2, #1 │ │ - subs r1, #63 @ 0x3f │ │ - mcr2 0, 0, r2, cr5, cr15, {6} │ │ - mcr2 15, 0, r1, cr4, cr5, {7} │ │ - cdp2 1, 0, cr14, cr4, cr11, {1} │ │ - mcr2 5, 0, r5, cr4, cr10, {5} │ │ + subs r1, #108 @ 0x6c │ │ + cdp2 1, 0, cr2, cr5, cr12, {0} │ │ + cdp2 0, 0, cr2, cr4, cr2, {1} │ │ + mcr2 1, 0, lr, cr4, cr8, {2} │ │ + cdp2 5, 0, cr5, cr4, cr7, {7} │ │ cdp2 15, 0, cr2, cr6, cr10, {4} │ │ - cdp2 5, 0, cr5, cr7, cr4, {3} │ │ - mcr2 2, 0, r1, cr6, cr9, {4} │ │ + mcr2 5, 0, r5, cr7, cr1, {4} │ │ + cdp2 2, 0, cr1, cr6, cr6, {6} │ │ mcr2 9, 0, r6, cr6, cr14, {6} @ │ │ lsls r4, r2, #1 │ │ ldr r4, [r2, #28] │ │ lsls r4, r2, #1 │ │ - ssub16 lr, lr, r4 │ │ - bcs.n 21df046 │ │ - cdp2 14, 0, cr10, cr6, cr11, {6} │ │ + mul.w lr, fp, r4 │ │ + bcs.n 21df0a0 │ │ + mcr2 14, 0, sl, cr6, cr8, {7} │ │ mcr2 9, 0, r3, cr6, cr5, {7} @ │ │ - mcr2 14, 0, r1, cr3, cr8, {7} │ │ + cdp2 15, 0, cr1, cr3, cr5, {1} │ │ cdp2 0, 0, cr15, cr4, cr8, {5} │ │ vfmal.f16 q3, d22, d2[1] │ │ lsls r4, r2, #1 │ │ ldr r6, [r3, #12] │ │ lsls r4, r2, #1 │ │ - add r0, pc, #140 @ (adr r0, 21df18c ) │ │ + add r0, pc, #320 @ (adr r0, 21df240 ) │ │ mcr2 11, 0, r8, cr3, cr2, {4} @ │ │ lsls r5, r2, #1 │ │ - ldr r1, [sp, #724] @ 0x2d4 │ │ + ldr r1, [sp, #904] @ 0x388 │ │ cdp2 5, 0, cr8, cr5, cr6, {4} │ │ lsls r5, r2, #1 │ │ - ldr r6, [sp, #840] @ 0x348 │ │ + ldr r6, [sp, #1020] @ 0x3fc │ │ vseleq.f32 s6, s9, s17 │ │ Address 0x21df112 is out of bounds. │ │ │ │ │ │ 021df114 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -522100,27 +522100,27 @@ │ │ strh r4, [r5, #42] @ 0x2a │ │ lsls r5, r2, #1 │ │ strh r6, [r5, #42] @ 0x2a │ │ lsls r5, r2, #1 │ │ cmp r0, #50 @ 0x32 │ │ cdp2 5, 0, cr8, cr7, cr10, {0} │ │ lsls r5, r2, #1 │ │ - ldr r6, [sp, #208] @ 0xd0 │ │ - mcr2 12, 0, r7, cr3, cr4, {1} │ │ - cdp2 12, 0, cr1, cr4, cr1, {2} │ │ - mcr2 6, 0, r1, cr4, cr7, {1} │ │ - mcr2 13, 0, r6, cr6, cr5, {7} │ │ - cdp2 1, 0, cr5, cr6, cr6, {2} │ │ - cdp2 7, 0, cr15, cr6, cr9, {5} │ │ - mcr2 12, 0, sp, cr4, cr11, {2} │ │ - mcr2 3, 0, r3, cr4, cr3, {6} │ │ - mcr2 11, 0, r1, cr5, cr3, {3} @ │ │ - cdp2 1, 0, cr9, cr4, cr3, {6} │ │ - mcr2 0, 0, r5, cr6, cr14, {3} │ │ - mcr2 13, 0, r0, cr6, cr3, {5} │ │ + ldr r6, [sp, #388] @ 0x184 │ │ + cdp2 12, 0, cr7, cr3, cr1, {3} │ │ + cdp2 12, 0, cr1, cr4, cr14, {3} │ │ + cdp2 6, 0, cr1, cr4, cr4, {3} │ │ + cdp2 14, 0, cr6, cr6, cr2, {1} │ │ + mcr2 1, 0, r5, cr6, cr3, {3} │ │ + mcr2 7, 0, pc, cr6, cr6, {6} @ │ │ + cdp2 12, 0, cr13, cr4, cr8, {4} │ │ + cdp2 4, 0, cr3, cr4, cr0, {0} │ │ + vseleq.f64 d1, d21, d16 │ │ + mcr2 1, 0, r9, cr4, cr0, {7} │ │ + cdp2 0, 0, cr5, cr6, cr11, {5} │ │ + vdot.bf16 q0, q11, d0[1] │ │ cdp2 1, 0, cr15, cr6, cr8, {0} │ │ lsrs r1, r0, #32 │ │ cmp r8, r1 │ │ bcs.w 21df64a │ │ mov.w r2, r8, lsl #3 │ │ str r2, [sp, #36] @ 0x24 │ │ lsr.w r2, r0, r2 │ │ @@ -522495,19 +522495,19 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ b.n 21df7cc │ │ b.n 21df830 │ │ b.n 21df7cc │ │ b.n 21df830 │ │ - ldr??t pc, [sl, #3] │ │ - strb r7, [r0, r2] │ │ - vseleq.f32 s2, s6, s30 │ │ - vcmla.f16 , q10, d0[0], #0 │ │ - cdp2 0, 0, cr7, cr3, cr1, {3} │ │ + vst3. {d15[0],d16[0],d17[0]}, [r7], r3 │ │ + strb r4, [r6, r2] │ │ + mcr2 10, 0, r1, cr3, cr12, {1} @ │ │ + vcmla.f16 , q10, d13[1], #0 │ │ + cdp2 0, 0, cr7, cr3, cr14, {4} │ │ cdp2 0, 0, cr14, cr5, cr4, {0} │ │ b.n 21df830 │ │ b.n 21df7cc │ │ b.n 21df830 │ │ b.n 21df7f0 │ │ b.n 21df830 │ │ ldrb.w r0, [sp, #68] @ 0x44 │ │ @@ -522552,30 +522552,30 @@ │ │ blx 26ffad0 │ │ add r0, sp, #80 @ 0x50 │ │ blx 2703790 │ │ blx 26ffaf0 │ │ nop │ │ strh r2, [r0, #36] @ 0x24 │ │ lsls r5, r2, #1 │ │ - adds r5, r6, r5 │ │ - vcmla.f16 d15, d4, d6[1], #0 │ │ - @ instruction: 0xfe037a6f │ │ - vfmal.f16 , d19, d3[1] │ │ - cdp2 7, 0, cr15, cr4, cr12, {4} │ │ - mcr2 10, 0, r5, cr3, cr12, {5} @ │ │ - vcmla.f16 , q2, d1[0], #0 │ │ - vdot.bf16 d4, d4, d2[1] │ │ + adds r2, r4, r6 │ │ + vfmal.f16 , d4, d3[0] │ │ + mcr2 10, 0, r7, cr3, cr12, {4} @ │ │ + vseleq.f16 s2, s6, s16 │ │ + mcr2 7, 0, pc, cr4, cr9, {5} @ │ │ + @ instruction: 0xfe035ae9 │ │ + vcmla.f16 , q2, d14[1], #0 │ │ + vdot.bf16 q2, q2, d15[0] │ │ mcr2 6, 0, r2, cr6, cr2, {7} │ │ - mcr2 2, 0, pc, cr7, cr10, {5} @ │ │ - mcr2 6, 0, fp, cr4, cr15, {2} │ │ - mcr2 6, 0, fp, cr4, cr6, {4} │ │ - vfmal.f16 , d20, d1[0] │ │ + cdp2 2, 0, cr15, cr7, cr7, {7} │ │ + cdp2 6, 0, cr11, cr4, cr12, {4} │ │ + cdp2 6, 0, cr11, cr4, cr3, {6} │ │ + vfmal.f16 , d20, d6[3] │ │ mcr2 4, 0, r8, cr3, cr14, {1} │ │ lsls r5, r2, #1 │ │ - strb r2, [r2, #28] │ │ + strb r7, [r7, #28] │ │ mcr2 14, 0, r7, cr4, cr0, {1} │ │ lsls r5, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #92 @ 0x5c │ │ str r0, [sp, #20] │ │ @@ -522775,46 +522775,46 @@ │ │ blx 26ffad0 │ │ ldrb.w r0, [sp, #36] @ 0x24 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - str r7, [sp, #384] @ 0x180 │ │ + str r7, [sp, #564] @ 0x234 │ │ mcr2 15, 0, r5, cr3, cr12, {4} │ │ lsls r4, r2, #1 │ │ - str r7, [sp, #256] @ 0x100 │ │ + str r7, [sp, #436] @ 0x1b4 │ │ cdp2 15, 0, cr5, cr3, cr12, {4} │ │ lsls r4, r2, #1 │ │ movs r1, #26 │ │ - cdp2 7, 0, cr6, cr7, cr6, {1} │ │ - cdp2 4, 0, cr1, cr6, cr14, {7} │ │ + mcr2 7, 0, r6, cr7, cr3, {2} │ │ + mcr2 5, 0, r1, cr6, cr11, {0} │ │ mcr2 12, 0, r7, cr4, cr12, {7} │ │ lsls r5, r2, #1 │ │ lsls r4, r6, #10 │ │ - vcmla.f16 q6, , d7[1], #0 │ │ - mcr2 13, 0, r0, cr6, cr9, {0} │ │ + vfmal.f16 d12, s15, s8[0] │ │ + vdot.bf16 q0, q3, d6[0] │ │ mcr2 2, 0, r0, cr4, cr10, {4} │ │ mcr2 15, 0, r7, cr7, cr0, {5} │ │ lsls r5, r2, #1 │ │ - stmia r6!, {r2, r3, r5} │ │ - mcr2 12, 0, r2, cr6, cr1, {4} │ │ - mcr2 15, 0, r0, cr6, cr2, {3} │ │ - vcmla.f16 , , d10[0], #0 │ │ - cdp2 1, 0, cr3, cr3, cr6, {4} │ │ - mcr2 1, 0, r1, cr4, cr10, {7} │ │ - mcr2 13, 0, r4, cr5, cr2, {4} │ │ - mcr2 0, 0, pc, cr3, cr5, {2} @ │ │ - mcr2 3, 0, pc, cr5, cr2, {2} @ │ │ - mcr2 3, 0, fp, cr3, cr7, {6} │ │ + stmia r6!, {r0, r3, r4, r6} │ │ + mcr2 12, 0, r2, cr6, cr14, {5} │ │ + mcr2 15, 0, r0, cr6, cr15, {4} │ │ + vfmal.f16 , d5, d7[2] │ │ + mcr2 1, 0, r3, cr3, cr3, {5} │ │ + cdp2 2, 0, cr1, cr4, cr7, {1} │ │ + mcr2 13, 0, r4, cr5, cr15, {5} │ │ + cdp2 0, 0, cr15, cr3, cr2, {4} │ │ + mcr2 3, 0, pc, cr5, cr15, {3} @ │ │ + cdp2 4, 0, cr11, cr3, cr4, {0} │ │ cdp2 1, 0, cr0, cr4, cr1, {5} │ │ cdp2 2, 0, cr0, cr7, cr9, {0} │ │ mcr2 1, 0, r8, cr7, cr2, {1} │ │ lsls r5, r2, #1 │ │ - lsrs r0, r7, #25 │ │ + lsrs r5, r4, #26 │ │ mcr2 11, 0, r7, cr6, cr2, {4} @ │ │ lsls r5, r2, #1 │ │ │ │ 021dfad8 : │ │ strb r1, [r0, #24] │ │ bx lr │ │ │ │ @@ -522902,19 +522902,19 @@ │ │ add r5, sp, #40 @ 0x28 │ │ adds r6, r0, #1 │ │ mov.w fp, #210 @ 0xd2 │ │ mov.w r8, #0 │ │ mov.w r9, #0 │ │ b.n 21dfbf4 │ │ nop │ │ - push {r1, r2, r4, r5, r6} │ │ - mcr2 4, 0, fp, cr3, cr0, {3} │ │ - cdp2 15, 0, cr9, cr3, cr11, {4} │ │ - cdp2 0, 0, cr1, cr6, cr13, {0} │ │ - mcr2 1, 0, fp, cr5, cr9, {6} │ │ + push {r0, r1, r5, r7} │ │ + mcr2 4, 0, fp, cr3, cr13, {4} │ │ + mcr2 15, 0, r9, cr3, cr8, {5} │ │ + mcr2 0, 0, r1, cr6, cr10, {1} │ │ + cdp2 2, 0, cr11, cr5, cr6, {0} │ │ vcmla.f16 d9, d4, d4[0], #0 │ │ add.w r9, r9, #1 │ │ mov.w fp, #210 @ 0xd2 │ │ adds r0, #48 @ 0x30 │ │ str r0, [sp, #16] │ │ ldrh.w r0, [r4, #456] @ 0x1c8 │ │ cmp r9, r0 │ │ @@ -522939,16 +522939,16 @@ │ │ lsls r0, r0, #31 │ │ it eq │ │ moveq r2, r6 │ │ mov r0, r5 │ │ blx 2708470 │ │ b.n 21dfc3c │ │ nop │ │ - ldcl 14, cr15, [fp, #20] │ │ - bx r2 │ │ + cdp 14, 0, cr15, cr8, cr5, {0} │ │ + bxns r8 │ │ vfmal.f16 d15, s13, s10[1] │ │ asrs r0, r3, #32 │ │ add.w sl, r9, r9, lsl #1 │ │ ldr r0, [sp, #40] @ 0x28 │ │ str.w r0, [r4, sl, lsl #3] │ │ lsls r0, r1, #31 │ │ itt ne │ │ @@ -523280,34 +523280,34 @@ │ │ add.w sl, sl, #1 │ │ lsrs r0, r1 │ │ and.w r0, r0, #3 │ │ cmp sl, r0 │ │ bcc.w 21dfe78 │ │ b.n 21dfbdc │ │ nop │ │ - ldcl 14, cr15, [fp, #-20]! @ 0xffffffec │ │ - movs r6, #96 @ 0x60 │ │ - vdot.bf16 d14, d6, d7[1] │ │ - @ instruction: 0xfe050969 │ │ - mcr2 12, 0, lr, cr6, cr7, {6} │ │ - vcmla.f16 d6, d5, d0[1], #0 │ │ - cdp2 12, 0, cr14, cr5, cr1, {4} │ │ - mcr2 2, 0, r2, cr5, cr1, {4} │ │ - cdp2 12, 0, cr14, cr6, cr3, {1} │ │ - cdp2 2, 0, cr6, cr5, cr13, {1} │ │ - @ instruction: 0xfe058a64 │ │ - cdp2 14, 0, cr10, cr4, cr5, {3} │ │ - cdp2 14, 0, cr14, cr4, cr6, {5} │ │ - mcr2 9, 0, r4, cr3, cr3, {6} @ │ │ - cdp2 14, 0, cr14, cr3, cr14, {2} │ │ - cdp2 5, 0, cr6, cr3, cr15, {7} │ │ - mcr2 13, 0, lr, cr5, cr6, {7} │ │ - mcr2 0, 0, r7, cr3, cr15, {1} │ │ - mcr2 13, 0, lr, cr3, cr14, {4} │ │ - cdp2 0, 0, cr5, cr3, cr14, {6} │ │ + stc 14, cr15, [r8, #20]! │ │ + movs r6, #141 @ 0x8d │ │ + mcr2 13, 0, lr, cr6, cr4, {2} │ │ + mcr2 9, 0, r0, cr5, cr6, {4} @ │ │ + vdot.bf16 d14, d6, d4[0] │ │ + vcmla.f16 q3, , d13[0], #0 │ │ + cdp2 12, 0, cr14, cr5, cr14, {5} │ │ + mcr2 2, 0, r2, cr5, cr14, {5} │ │ + mcr2 12, 0, lr, cr6, cr0, {2} │ │ + mcr2 2, 0, r6, cr5, cr10, {2} │ │ + mcr2 10, 0, r8, cr5, cr1, {4} @ │ │ + mcr2 14, 0, sl, cr4, cr2, {4} │ │ + mcr2 14, 0, lr, cr4, cr3, {6} │ │ + vseleq.f32 s8, s6, s0 │ │ + mcr2 14, 0, lr, cr3, cr11, {3} │ │ + mcr2 6, 0, r6, cr3, cr12, {0} │ │ + cdp2 14, 0, cr14, cr5, cr3, {1} │ │ + cdp2 0, 0, cr7, cr3, cr12, {3} │ │ + vdot.bf16 q7, , d11[0] │ │ + mcr2 0, 0, r5, cr3, cr11, {7} │ │ vfmal.f16 d15, s9, s8[0] │ │ lsls r6, r1, #7 │ │ lsls r0, r0, #29 │ │ bpl.n 21e00f6 │ │ add r0, sp, #40 @ 0x28 │ │ add.w r8, sp, #24 │ │ adds r6, r0, #1 │ │ @@ -523659,53 +523659,53 @@ │ │ b.n 21e0404 │ │ b.n 21e0404 │ │ b.n 21e0404 │ │ b.n 21e0404 │ │ b.n 21e0404 │ │ b.n 21e0404 │ │ b.n 21e0404 │ │ - stmia r0!, {r1, r2, r3, r4, r5, r6, r7} │ │ + stmia r1!, {r0, r1, r3, r5} │ │ vfmal.f16 d15, s13, s10[1] │ │ movs r0, r3 │ │ lsls r0, r0, #31 │ │ beq.n 21e0412 │ │ ldr r0, [sp, #32] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldrb r0, [r2, #10] │ │ lsls r5, r2, #1 │ │ - @ instruction: 0xea15fe04 │ │ - ldr r1, [r3, #68] @ 0x44 │ │ - @ instruction: 0xfe040be1 │ │ - @ instruction: 0xfe048be5 │ │ - mcr2 2, 0, r8, cr3, cr3, {7} │ │ - @ instruction: 0xfe066b6c │ │ - mcr2 11, 0, r0, cr4, cr3, {1} @ │ │ - mcr2 10, 0, lr, cr4, cr15, {2} @ │ │ - cdp2 3, 0, cr4, cr3, cr9, {3} │ │ - mcr2 11, 0, r6, cr5, cr10, {4} @ │ │ - @ instruction: 0xfe040b61 │ │ - cdp2 3, 0, cr4, cr4, cr5, {2} │ │ - mcr2 7, 0, r0, cr5, cr5, {3} │ │ - cdp2 7, 0, cr12, cr5, cr0, {5} │ │ + @ instruction: 0xea42fe04 │ │ + ldr r6, [r0, #72] @ 0x48 │ │ + cdp2 12, 0, cr0, cr4, cr14, {0} │ │ + mcr2 12, 0, r8, cr4, cr2, {0} │ │ + cdp2 3, 0, cr8, cr3, cr0, {1} │ │ + mcr2 11, 0, r6, cr6, cr9, {4} @ │ │ + @ instruction: 0xfe040b60 │ │ + vseleq.f32 s28, s9, s24 │ │ + mcr2 3, 0, r4, cr3, cr6, {4} │ │ + @ instruction: 0xfe056bc7 │ │ + vseleq.f64 d0, d20, d14 │ │ + mcr2 3, 0, r4, cr4, cr2, {3} │ │ + cdp2 7, 0, cr0, cr5, cr2, {5} │ │ + cdp2 7, 0, cr12, cr5, cr13, {6} │ │ cdp2 7, 0, cr15, cr3, cr0, {6} │ │ - cdp2 12, 0, cr12, cr6, cr10, {4} │ │ - mcr2 10, 0, lr, cr4, cr11, {5} @ │ │ - mcr2 11, 0, r8, cr3, cr9, {0} @ │ │ + mcr2 12, 0, ip, cr6, cr7, {5} │ │ + @ instruction: 0xfe04eae8 │ │ + @ instruction: 0xfe038b46 │ │ vdot.bf16 , q2, d1[0] │ │ - mcr2 11, 0, r6, cr6, cr12, {2} @ │ │ - mcr2 2, 0, r6, cr4, cr5, {4} │ │ - mcr2 10, 0, r0, cr5, cr10, {6} @ │ │ + vseleq.f64 d6, d22, d9 │ │ + cdp2 2, 0, cr6, cr4, cr2, {6} │ │ + vseleq.f64 d0, d5, d7 │ │ vfmal.f16 , d20, d2[2] │ │ - mcr2 5, 0, r0, cr6, cr13, {0} │ │ - mcr2 6, 0, lr, cr6, cr14, {5} │ │ + cdp2 5, 0, cr0, cr6, cr10, {2} │ │ + cdp2 6, 0, cr14, cr6, cr11, {7} │ │ cdp2 12, 0, cr13, cr4, cr3, {5} │ │ - vcmla.f16 q0, q3, d3[0], #0 │ │ - vseleq.f32 s20, s10, s30 │ │ + vfmal.f16 q0, d6, d0[2] │ │ + mcr2 10, 0, sl, cr5, cr12, {1} @ │ │ cdp2 2, 0, cr7, cr4, cr12, {2} │ │ lsls r5, r2, #1 │ │ │ │ 021e0490 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -523888,39 +523888,39 @@ │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ bx r2 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ strb r0, [r1, #25] │ │ lsls r5, r2, #1 │ │ - lsls r1, r1, #13 │ │ + lsls r6, r6, #13 │ │ cdp2 6, 0, cr7, cr6, cr0, {2} │ │ lsls r5, r2, #1 │ │ - pop {r0, r7} │ │ + pop {r1, r2, r3, r5, r7} │ │ mcr2 6, 0, r7, cr6, cr2, {0} │ │ lsls r5, r2, #1 │ │ - add r0, sp, #416 @ 0x1a0 │ │ + add r0, sp, #596 @ 0x254 │ │ cdp2 5, 0, cr7, cr4, cr8, {7} │ │ lsls r5, r2, #1 │ │ - orrs r1, r5 │ │ + muls r6, r2 │ │ mcr2 5, 0, r7, cr3, cr14, {5} │ │ lsls r5, r2, #1 │ │ - ldr r0, [sp, #140] @ 0x8c │ │ + ldr r0, [sp, #320] @ 0x140 │ │ mcr2 5, 0, r7, cr6, cr4, {4} │ │ lsls r5, r2, #1 │ │ - movs r5, #125 @ 0x7d │ │ + movs r5, #170 @ 0xaa │ │ cdp2 5, 0, cr7, cr4, cr10, {3} │ │ lsls r5, r2, #1 │ │ movs r2, #246 @ 0xf6 │ │ cdp2 5, 0, cr7, cr3, cr0, {2} │ │ lsls r5, r2, #1 │ │ - ldrsh r5, [r6, r3] │ │ + ldrsh r2, [r4, r4] │ │ mcr2 5, 0, r7, cr5, cr6, {0} │ │ lsls r5, r2, #1 │ │ - ldrb r4, [r3, #25] │ │ + ldrb r1, [r1, #26] │ │ cdp2 4, 0, cr7, cr6, cr12, {7} │ │ lsls r5, r2, #1 │ │ │ │ 021e067c : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ @@ -523989,19 +523989,19 @@ │ │ ittt eq │ │ moveq r0, r4 │ │ addeq sp, #8 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ ldr r0, [r6, #112] @ 0x70 │ │ lsls r5, r2, #1 │ │ - add r1, sp, #32 │ │ - vfmal.f16 q5, d19, d6[2] │ │ - mcr2 4, 0, r9, cr3, cr1, {0} │ │ - mcr2 4, 0, r0, cr6, cr3, {4} │ │ - mcr2 6, 0, sl, cr5, cr15, {2} │ │ + add r1, sp, #212 @ 0xd4 │ │ + vseleq.f16 s20, s6, s7 │ │ + mcr2 4, 0, r9, cr3, cr14, {1} │ │ + cdp2 4, 0, cr0, cr6, cr0, {6} │ │ + cdp2 6, 0, cr10, cr5, cr12, {4} │ │ mcr2 14, 0, r6, cr4, cr12, {4} │ │ lsls r5, r2, #1 │ │ │ │ 021e0750 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #8 │ │ @@ -524060,19 +524060,19 @@ │ │ itt eq │ │ addeq sp, #8 │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ ldr r2, [r4, #100] @ 0x64 │ │ lsls r5, r2, #1 │ │ - add r0, sp, #288 @ 0x120 │ │ - vcmla.f16 q5, , d2[0], #0 │ │ - mcr2 3, 0, r9, cr3, cr13, {2} │ │ - mcr2 3, 0, r0, cr6, cr15, {6} │ │ - cdp2 5, 0, cr10, cr5, cr11, {5} │ │ + add r0, sp, #468 @ 0x1d4 │ │ + vcmla.f16 q5, , d15[1], #0 │ │ + cdp2 3, 0, cr9, cr3, cr10, {4} │ │ + cdp2 4, 0, cr0, cr6, cr12, {0} │ │ + mcr2 5, 0, sl, cr5, cr8, {6} │ │ vdot.bf16 q3, q10, d8[1] │ │ lsls r5, r2, #1 │ │ │ │ 021e0804 : │ │ ldr.w r1, [r0, #452] @ 0x1c4 │ │ cmp r1, #0 │ │ it eq │ │ @@ -525611,15 +525611,15 @@ │ │ ittt eq │ │ addeq sp, #12 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldrb r4, [r5, r0] │ │ lsls r5, r2, #1 │ │ - strh r6, [r7, #30] │ │ + strh r3, [r5, #32] │ │ vseleq.f64 d5, d22, d6 │ │ lsls r5, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #56 @ 0x38 │ │ mov r8, r0 │ │ @@ -525733,22 +525733,22 @@ │ │ lsls r0, r0, #31 │ │ beq.n 21e1b74 const&, Eigen::Matrix const&)@@Base+0x2f0> │ │ ldr r0, [sp, #40] @ 0x28 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ ldrh r6, [r2, r5] │ │ lsls r5, r2, #1 │ │ - ldmia r7!, {r0, r2, r4, r6} │ │ - vfmal.f16 d0, s10, s9[1] │ │ - vcmla.f16 q1, q11, d14[0], #0 │ │ + ldmia r7, {r1, r7} │ │ + vcmla.f16 q0, , d9[1], #0 │ │ + vfmal.f16 q1, d22, d3[3] │ │ mcr2 10, 0, r5, cr6, cr8, {3} @ │ │ lsls r5, r2, #1 │ │ - bl 2519796 │ │ + bl 2546796 │ │ stmia r5!, {r2, r4} │ │ - mcr2 6, 0, r7, cr6, cr14, {2} │ │ + cdp2 6, 0, cr7, cr6, cr11, {4} │ │ vseleq.f16 s4, s6, s0 │ │ it eq │ │ bxeq lr │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r2, [r1, #0] │ │ mov r5, r1 │ │ @@ -526042,15 +526042,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ bmi.n 21e1dde >, CelestiaGLProgram*>, std::__ndk1::__tree_node >, CelestiaGLProgram*>, void*>*, int>, bool> std::__ndk1::__tree >, CelestiaGLProgram*>, std::__ndk1::__map_value_compare >, std::__ndk1::__value_type >, CelestiaGLProgram*>, std::__ndk1::less > >, true>, std::__ndk1::allocator >, CelestiaGLProgram*> > >::__emplace_unique_key_args >, std::__ndk1::piecewise_construct_t const&, std::__ndk1::tuple > const&>, std::__ndk1::tuple<> >(std::__ndk1::basic_string_view > const&, std::__ndk1::piecewise_construct_t const&, std::__ndk1::tuple > const&>&&, std::__ndk1::tuple<>&&)@@Base+0x74> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21e1e40 >, CelestiaGLProgram*>, std::__ndk1::__tree_node >, CelestiaGLProgram*>, void*>*, int>, bool> std::__ndk1::__tree >, CelestiaGLProgram*>, std::__ndk1::__map_value_compare >, std::__ndk1::__value_type >, CelestiaGLProgram*>, std::__ndk1::less > >, true>, std::__ndk1::allocator >, CelestiaGLProgram*> > >::__emplace_unique_key_args >, std::__ndk1::piecewise_construct_t const&, std::__ndk1::tuple > const&>, std::__ndk1::tuple<> >(std::__ndk1::basic_string_view > const&, std::__ndk1::piecewise_construct_t const&, std::__ndk1::tuple > const&>&&, std::__ndk1::tuple<>&&)@@Base+0xd6>) │ │ add r0, pc │ │ bl 2093da8 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x140> │ │ - b.n 21e1eea │ │ + b.n 21e1f44 │ │ Address 0x21e1e42 is out of bounds. │ │ │ │ │ │ 021e1e44 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -529311,17 +529311,17 @@ │ │ str r0, [sp, #72] @ 0x48 │ │ movs r0, #1 │ │ str r0, [sp, #68] @ 0x44 │ │ movs r0, #0 │ │ str r0, [sp, #76] @ 0x4c │ │ b.n 21e3e54 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x164> │ │ nop │ │ - ldmia r2!, {r1, r3, r4, r7} │ │ - vfmal.f16 d2, s10, s6[0] │ │ - @ instruction: 0xfe05abe2 │ │ + ldmia r2, {r0, r1, r2, r6, r7} │ │ + vcmla.f16 q1, , d0[0], #0 │ │ + cdp2 12, 0, cr10, cr5, cr15, {0} │ │ vfmal.f16 , d5, d6[1] │ │ mcr2 14, 0, sp, cr6, cr6, {2} │ │ vcmla.f16 d13, d6, d2[0], #0 │ │ vcmla.f16 d9, d6, d11[1], #0 │ │ cmp r2, #0 │ │ ldr r1, [pc, #912] @ (21e451c >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x82c>) │ │ ldr r2, [sp, #56] @ 0x38 │ │ @@ -529653,26 +529653,26 @@ │ │ mov r2, sl │ │ blx 27058c0 │ │ blx 2701380 │ │ mov r1, r6 │ │ movs r2, #1 │ │ blx 27058b0 │ │ b.w 21e56f2 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x1a02> │ │ - ldr r6, [r6, #72] @ 0x48 │ │ - mcr2 15, 0, r4, cr4, cr7, {4} │ │ - cdp2 12, 0, cr1, cr3, cr1, {2} │ │ - mcr2 5, 0, r0, cr6, cr14, {3} │ │ - vseleq.f32 s8, s7, s30 │ │ - mcr2 4, 0, r0, cr4, cr4, {7} │ │ - cdp2 14, 0, cr7, cr3, cr7, {1} │ │ - cdp2 14, 0, cr7, cr6, cr7, {0} │ │ - vfmal.f16 q5, d6, d5[1] │ │ - mcr2 6, 0, sl, cr4, cr7, {4} │ │ - cdp2 1, 0, cr8, cr3, cr2, {5} │ │ - vseleq.f16 s24, s11, s11 │ │ + ldr r3, [r4, #76] @ 0x4c │ │ + cdp2 15, 0, cr4, cr4, cr4, {6} │ │ + cdp2 12, 0, cr1, cr3, cr14, {3} │ │ + cdp2 5, 0, cr0, cr6, cr11, {5} │ │ + mcr2 10, 0, r4, cr3, cr12, {5} @ │ │ + cdp2 5, 0, cr0, cr4, cr1, {1} │ │ + mcr2 14, 0, r7, cr3, cr4, {2} │ │ + mcr2 14, 0, r7, cr6, cr4, {1} │ │ + vcmla.f16 d10, d22, d10[0], #0 │ │ + cdp2 6, 0, cr10, cr4, cr4, {6} │ │ + cdp2 1, 0, cr8, cr3, cr15, {6} │ │ + mcr2 9, 0, ip, cr5, cr2, {6} @ │ │ vfmal.f16 , d19, d5[1] │ │ str r0, [sp, #288] @ 0x120 │ │ mov r6, r4 │ │ cbz r0, 21e4572 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x882> │ │ ldr r0, [sp, #44] @ 0x2c │ │ add r1, sp, #88 @ 0x58 │ │ blx 27078e0 │ │ @@ -529992,23 +529992,23 @@ │ │ vstr s2, [sp, #212] @ 0xd4 │ │ vstr s4, [sp, #208] @ 0xd0 │ │ mov r0, r6 │ │ mov r1, sl │ │ blx 27049b0 │ │ b.n 21e4a04 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0xd14> │ │ nop │ │ - strh r1, [r7, #30] │ │ - cdp2 12, 0, cr15, cr3, cr8, {0} │ │ - cdp2 4, 0, cr12, cr5, cr13, {7} │ │ + strh r6, [r4, #32] │ │ + mcr2 12, 0, pc, cr3, cr5, {1} @ │ │ + mcr2 5, 0, ip, cr5, cr10, {0} │ │ cdp2 3, 0, cr11, cr4, cr14, {5} │ │ - vseleq.f32 s0, s13, s20 │ │ + mcr2 10, 0, r0, cr6, cr7, {5} @ │ │ vcmla.f16 , q10, d0[1], #0 │ │ - mcr2 14, 0, r3, cr6, cr8, {2} │ │ - mcr2 9, 0, r0, cr6, cr10, {1} @ │ │ - cdp2 5, 0, cr2, cr4, cr7, {6} │ │ + cdp2 14, 0, cr3, cr6, cr5, {4} │ │ + @ instruction: 0xfe060967 │ │ + mcr2 5, 0, r2, cr4, cr4, {7} │ │ vcmla.f16 d3, d20, d4[1], #0 │ │ lsls r5, r2, #1 │ │ orr.w r0, r5, #15 │ │ adds r4, r0, #1 │ │ mov r0, r4 │ │ blx 26ffb80 │ │ mov r6, r0 │ │ @@ -530294,36 +530294,36 @@ │ │ vcmp.f32 s16, s18 │ │ vmrs APSR_nzcv, fpscr │ │ bhi.n 21e4c78 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0xf88> │ │ vmov r1, s16 │ │ mov r0, r6 │ │ blx 2707720 │ │ b.n 21e4cb4 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0xfc4> │ │ - asr.w lr, r1, r5 │ │ - ble.n 21e4c32 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0xf42> │ │ + ror.w lr, lr, r5 │ │ + udf #38 @ 0x26 │ │ mcr2 5, 0, r9, cr4, cr12, {5} │ │ mcr2 14, 0, r0, cr11, cr4, {2} │ │ lsls r4, r2, #1 │ │ str r6, [sp, #544] @ 0x220 │ │ cdp2 15, 0, cr11, cr11, cr0, {0} │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ ands r0, r0 │ │ lsls r7, r1 │ │ ldr r1, [sp, #616] @ 0x268 │ │ ldr r1, [sp, #612] @ 0x264 │ │ ldr r1, [sp, #612] @ 0x264 │ │ subs r7, #185 @ 0xb9 │ │ - subs r4, #248 @ 0xf8 │ │ - cdp2 14, 0, cr11, cr5, cr8, {1} │ │ - cdp2 15, 0, cr13, cr5, cr11, {7} │ │ - mcr2 4, 0, r6, cr3, cr11, {3} │ │ - cdp2 6, 0, cr7, cr3, cr4, {3} │ │ - vdot.bf16 d7, d6, d2[1] │ │ + subs r5, #37 @ 0x25 │ │ + mcr2 14, 0, fp, cr5, cr5, {2} │ │ + mcr2 0, 0, lr, cr5, cr8, {0} │ │ + cdp2 4, 0, cr6, cr3, cr8, {5} │ │ + mcr2 6, 0, r7, cr3, cr1, {4} │ │ + vdot.bf16 , q3, d15[0] │ │ mcr2 1, 0, pc, cr5, cr11, {0} @ │ │ b.n 21e4dc2 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x10d2> │ │ mov r4, r0 │ │ ldr r0, [pc, #888] @ (21e4ff8 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x1308>) │ │ add r0, pc │ │ blx 26ffdd0 │ │ mov r5, r0 │ │ @@ -530638,30 +530638,30 @@ │ │ bne.n 21e5034 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x1344> │ │ ldr r1, [sp, #20] │ │ vldr d16, [r9] │ │ ldr.w r0, [r9, #8] │ │ str r0, [r1, #8] │ │ vstr d16, [r1] │ │ b.n 21e503e >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x134e> │ │ - strb r2, [r1, #23] │ │ - mcr2 3, 0, r6, cr6, cr12, {1} │ │ - @ instruction: 0xfe031964 │ │ - vseleq.f16 s6, s10, s22 │ │ + strb r7, [r6, #23] │ │ + cdp2 3, 0, cr6, cr6, cr9, {3} │ │ + mcr2 9, 0, r1, cr3, cr1, {4} @ │ │ + mcr2 9, 0, r3, cr5, cr8, {1} @ │ │ cdp2 12, 0, cr13, cr6, cr13, {4} │ │ - mcr2 13, 0, sp, cr2, cr10, {7} │ │ - mcr2 10, 0, sp, cr3, cr7, {2} @ │ │ - mcr2 11, 0, fp, cr4, cr9, {2} @ │ │ - mcr2 0, 0, r1, cr5, cr13, {2} │ │ - mcr2 14, 0, r9, cr6, cr10, {1} │ │ - mcr2 15, 0, r1, cr4, cr11, {5} │ │ - cdp2 15, 0, cr1, cr3, cr15, {5} │ │ + cdp2 14, 0, cr13, cr2, cr7, {1} │ │ + vseleq.f32 s26, s7, s8 │ │ + vseleq.f64 d11, d20, d6 │ │ + cdp2 0, 0, cr1, cr5, cr10, {4} │ │ + cdp2 14, 0, cr9, cr6, cr7, {3} │ │ + cdp2 15, 0, cr1, cr4, cr8, {7} │ │ + mcr2 15, 0, r1, cr3, cr12, {6} │ │ cdp2 0, 0, cr0, cr3, cr0, {0} │ │ movs r0, r0 │ │ - bl 2050c38 │ │ - ldrb r6, [r7, #18] │ │ + bl 207dc38 │ │ + ldrb r3, [r5, #19] │ │ mcr2 9, 0, lr, cr3, cr9, {6} @ │ │ movs r1, #1 │ │ ldr r0, [sp, #20] │ │ bl 207d350 │ │ orr.w r0, r5, r6 │ │ strb.w r0, [sp, #344] @ 0x158 │ │ mov.w r0, #1065353216 @ 0x3f800000 │ │ @@ -530980,36 +530980,36 @@ │ │ ldr r0, [sp, #352] @ 0x160 │ │ str.w fp, [sp, #352] @ 0x160 │ │ cmp r0, #0 │ │ beq.n 21e546e >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x177e> │ │ blx 26ffad0 │ │ b.n 21e546e >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x177e> │ │ nop │ │ - ldrh r6, [r0, r5] │ │ - cdp2 6, 0, cr13, cr5, cr9, {6} │ │ - mcr2 12, 0, r3, cr4, cr8, {5} │ │ + ldrh r3, [r6, r5] │ │ + mcr2 6, 0, sp, cr5, cr6, {7} │ │ + cdp2 12, 0, cr3, cr4, cr5, {7} │ │ mcr2 14, 0, r8, cr4, cr3, {5} │ │ - mcr2 13, 0, r7, cr6, cr7, {4} │ │ - mcr2 12, 0, r1, cr4, cr14, {3} │ │ - cdp2 15, 0, cr15, cr4, cr4, {5} │ │ - cdp2 4, 0, cr13, cr3, cr9, {0} │ │ - mcr2 1, 0, pc, cr5, cr5, {7} @ │ │ - cdp2 1, 0, cr15, cr5, cr2, {7} │ │ - cdp2 6, 0, cr7, cr5, cr13, {5} │ │ - cdp2 3, 0, cr13, cr5, cr8, {3} │ │ - mcr2 11, 0, r5, cr5, cr15, {4} @ │ │ + vdot.bf16 , q11, d4[0] │ │ + cdp2 12, 0, cr1, cr4, cr11, {5} │ │ + mcr2 15, 0, pc, cr4, cr1, {6} @ │ │ + mcr2 4, 0, sp, cr3, cr6, {1} │ │ + cdp2 2, 0, cr15, cr5, cr2, {1} │ │ + cdp2 2, 0, cr15, cr5, cr15, {0} │ │ + mcr2 6, 0, r7, cr5, cr10, {6} │ │ + mcr2 3, 0, sp, cr5, cr5, {4} │ │ + @ instruction: 0xfe055bcc │ │ cdp2 0, 0, cr0, cr4, cr0, {0} │ │ orrs r4, r6 │ │ lsrs r3, r3, #31 │ │ eors r1, r1 │ │ - cbnz r4, 21e548a >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x179a> │ │ - cdp2 15, 0, cr6, cr3, cr1, {4} │ │ - mcr2 14, 0, pc, cr6, cr12, {1} @ │ │ - vfmal.f16 d13, s6, s11[0] │ │ - vfmal.f16 , d3, d5[2] │ │ + cbnz r1, 21e5496 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x17a6> │ │ + cdp2 15, 0, cr6, cr3, cr14, {5} │ │ + cdp2 14, 0, cr15, cr6, cr9, {3} │ │ + vcmla.f16 , , d2[1], #0 │ │ + vcmla.f16 d5, d19, d2[1], #0 │ │ mcr2 1, 0, pc, cr5, cr10, {0} @ │ │ b.n 21e4dc2 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x10d2> │ │ mov r4, r0 │ │ ldr r0, [pc, #948] @ (21e57f4 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x1b04>) │ │ add r0, pc │ │ blx 26ffdd0 │ │ mov r5, r0 │ │ @@ -531362,29 +531362,29 @@ │ │ addeq sp, #4 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ it eq │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ add r0, sp, #208 @ 0xd0 │ │ bl 2093d98 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x130> │ │ - ldrh r1, [r2, r0] │ │ - cdp2 3, 0, cr15, cr4, cr15, {2} │ │ - vseleq.f16 s6, s5, s9 │ │ + ldrh r6, [r7, r0] │ │ + mcr2 3, 0, pc, cr4, cr12, {3} @ │ │ + mcr2 9, 0, r3, cr2, cr1, {6} @ │ │ cdp2 0, 0, cr0, cr4, cr0, {0} │ │ movs r0, r0 │ │ - subs r5, #28 │ │ - vdot.bf16 d6, d3, d6[1] │ │ + subs r5, #73 @ 0x49 │ │ + mcr2 13, 0, r6, cr3, cr3, {2} │ │ mcr2 6, 0, sl, cr6, cr5, {5} │ │ - mcr2 5, 0, pc, cr6, cr12, {5} @ │ │ - cdp2 0, 0, cr3, cr3, cr1, {2} │ │ - mcr2 15, 0, lr, cr6, cr13, {6} │ │ + cdp2 5, 0, cr15, cr6, cr9, {7} │ │ + cdp2 0, 0, cr3, cr3, cr14, {3} │ │ + cdp2 0, 0, cr15, cr6, cr10, {0} │ │ mcr2 3, 0, sp, cr4, cr1, {4} │ │ - cdp2 15, 0, cr6, cr2, cr2, {7} │ │ - mcr2 4, 0, r9, cr5, cr3, {4} │ │ - cdp2 7, 0, cr11, cr3, cr3, {6} │ │ + cdp2 0, 0, cr7, cr2, cr15, {0} │ │ + cdp2 4, 0, cr9, cr5, cr0, {6} │ │ + mcr2 7, 0, fp, cr3, cr0, {7} │ │ vfmal.f16 d10, s6, s9[0] │ │ bl 207d398 │ │ add r0, sp, #208 @ 0xd0 │ │ bl 207d398 │ │ add r0, sp, #208 @ 0xd0 │ │ bl 207d398 │ │ b.n 21e5910 >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x1c20> │ │ @@ -531653,15 +531653,15 @@ │ │ ittt eq │ │ addeq sp, #40 @ 0x28 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ subs r4, r5, r5 │ │ lsls r5, r2, #1 │ │ - lsrs r2, r3, #15 │ │ + lsrs r7, r0, #16 │ │ vseleq.f64 d1, d5, d10 │ │ lsls r5, r2, #1 │ │ │ │ 021e5ad4 : │ │ ldr r0, [r0, #4] │ │ bx lr │ │ push {r4, r5, r6, r7, lr} │ │ @@ -532001,36 +532001,36 @@ │ │ cmp r0, #0 │ │ itttt ne │ │ ldrbne.w r0, [sp, #88] @ 0x58 │ │ movsne.w r0, r0, lsl #31 │ │ ldrne r0, [sp, #96] @ 0x60 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - bl 229ca8a │ │ + bl 22c9a8a │ │ subs r2, r1, r3 │ │ lsls r5, r2, #1 │ │ - strb r5, [r5, #16] │ │ - cdp2 5, 0, cr1, cr4, cr15, {4} │ │ - mcr2 2, 0, r1, cr3, cr5, {7} │ │ - @ instruction: 0xfe042acf │ │ - mcr2 2, 0, r4, cr6, cr9, {7} │ │ - cdp2 14, 0, cr2, cr6, cr6, {1} │ │ - mcr2 10, 0, lr, cr5, cr14, {3} @ │ │ - mcr2 0, 0, r5, cr4, cr4, {3} │ │ - mcr2 10, 0, r2, cr5, cr1, {5} @ │ │ - cdp2 2, 0, cr4, cr6, cr0, {7} │ │ - mcr2 15, 0, ip, cr6, cr7, {7} │ │ - mcr2 3, 0, r7, cr3, cr3, {4} │ │ - @ instruction: 0xfe04ca60 │ │ - cdp2 5, 0, cr15, cr5, cr1, {6} │ │ - mcr2 0, 0, r9, cr3, cr11, {7} │ │ - mcr2 2, 0, r3, cr4, cr4, {2} │ │ - cdp2 6, 0, cr6, cr4, cr5, {5} │ │ - mcr2 4, 0, r1, cr6, cr1, {5} │ │ - cdp2 4, 0, cr1, cr3, cr12, {5} │ │ + strb r2, [r3, #17] │ │ + mcr2 5, 0, r1, cr4, cr12, {5} │ │ + cdp2 3, 0, cr1, cr3, cr2, {1} │ │ + mcr2 10, 0, r2, cr4, cr12, {7} @ │ │ + cdp2 3, 0, cr4, cr6, cr6, {1} │ │ + mcr2 14, 0, r2, cr6, cr3, {2} │ │ + vseleq.f32 s28, s11, s23 │ │ + cdp2 0, 0, cr5, cr4, cr1, {5} │ │ + mcr2 10, 0, r2, cr5, cr14, {6} @ │ │ + cdp2 3, 0, cr4, cr6, cr13, {0} │ │ + cdp2 0, 0, cr13, cr6, cr4, {1} │ │ + cdp2 3, 0, cr7, cr3, cr0, {6} │ │ + vseleq.f32 s24, s9, s26 │ │ + cdp2 5, 0, cr15, cr5, cr14, {7} │ │ + cdp2 1, 0, cr9, cr3, cr8, {1} │ │ + cdp2 2, 0, cr3, cr4, cr1, {4} │ │ + mcr2 6, 0, r6, cr4, cr2, {6} │ │ + mcr2 4, 0, r1, cr6, cr14, {6} │ │ + mcr2 4, 0, r1, cr3, cr9, {6} │ │ mcr2 7, 0, r1, cr3, cr0, {7} │ │ lsls r5, r2, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r4, [r0, #0] │ │ movs r1, #0 │ │ str r1, [r0, #0] │ │ @@ -532488,25 +532488,25 @@ │ │ add.w r9, sp, #160 @ 0xa0 │ │ ldr r0, [r0, #4] │ │ cmp sl, r0 │ │ bne.w 21e615c │ │ b.w 21e6de8 │ │ subs r0, r7, r3 │ │ lsls r5, r2, #1 │ │ - str r3, [r5, #124] @ 0x7c │ │ - @ instruction: 0xfe058a69 │ │ + ldr r0, [r3, #0] │ │ + mcr2 10, 0, r8, cr5, cr6, {4} @ │ │ cdp2 0, 0, cr0, cr3, cr0, {0} │ │ movs r0, r0 │ │ movs r0, r0 │ │ - vcvt.f16.u16 d18, d27, #16 │ │ - mcr2 5, 0, r6, cr4, cr15, {0} │ │ - cdp2 6, 0, cr10, cr5, cr6, {7} │ │ - @ instruction: 0xfe0589e9 │ │ - mcr2 6, 0, r6, cr4, cr0, {1} │ │ - cdp2 6, 0, cr6, cr5, cr0, {0} │ │ + vqdmulh.s q9, q0, d24[0] │ │ + cdp2 5, 0, cr6, cr4, cr12, {2} │ │ + mcr2 7, 0, sl, cr5, cr3, {0} │ │ + mcr2 10, 0, r8, cr5, cr6, {0} @ │ │ + mcr2 6, 0, r6, cr4, cr13, {2} │ │ + cdp2 6, 0, cr6, cr5, cr13, {1} │ │ mcr2 9, 0, lr, cr5, cr13, {6} @ │ │ lsls r4, r2, #4 │ │ cbz r1, 21e63ae │ │ adds r2, r1, #4 │ │ ldrex r3, [r2] │ │ adds r3, #1 │ │ strex r6, r3, [r2] │ │ @@ -532801,17 +532801,17 @@ │ │ ldr r0, [r4, #0] │ │ ldr r1, [r0, #8] │ │ mov r0, r4 │ │ blx r1 │ │ mov r0, r4 │ │ blx 2700270 │ │ b.n 21e6526 │ │ - add r7, pc, #756 @ (adr r7, 21e69b4 ) │ │ - cdp2 3, 0, cr10, cr4, cr1, {4} │ │ - mcr2 3, 0, sl, cr5, cr5, {3} │ │ + add r7, pc, #936 @ (adr r7, 21e6a68 ) │ │ + cdp2 3, 0, cr10, cr4, cr14, {5} │ │ + cdp2 3, 0, cr10, cr5, cr2, {5} │ │ cdp2 1, 0, cr2, cr5, cr0, {0} │ │ movs r0, #0 │ │ ldr.w fp, [r7, #12] │ │ movt r1, #65520 @ 0xfff0 │ │ strd r0, r1, [sp, #104] @ 0x68 │ │ movs r1, #0 │ │ movt r1, #32752 @ 0x7ff0 │ │ @@ -533209,18 +533209,18 @@ │ │ ldr r0, [r4, #0] │ │ ldr r1, [r0, #8] │ │ mov r0, r4 │ │ blx r1 │ │ mov r0, r4 │ │ blx 2700270 │ │ b.n 21e69d0 │ │ - add r0, pc, #568 @ (adr r0, 21e6d2c ) │ │ - cdp2 15, 0, cr9, cr5, cr0, {6} │ │ - mcr2 15, 0, r9, cr5, cr4, {5} │ │ - cdp2 2, 0, cr10, cr5, cr9, {4} │ │ + add r0, pc, #748 @ (adr r0, 21e6de0 ) │ │ + cdp2 15, 0, cr9, cr5, cr13, {7} │ │ + cdp2 15, 0, cr9, cr5, cr1, {7} │ │ + mcr2 2, 0, sl, cr5, cr6, {5} │ │ mcr2 5, 0, r1, cr4, cr2, {4} │ │ lsls r5, r2, #1 │ │ ldr r0, [sp, #120] @ 0x78 │ │ mov r5, fp │ │ mov fp, r4 │ │ cmp r0, #0 │ │ beq.w 21e6e14 │ │ @@ -533555,22 +533555,22 @@ │ │ add r0, sp, #52 @ 0x34 │ │ bl 2183964 │ │ add r0, sp, #56 @ 0x38 │ │ bl 2134dd4 │ │ b.n 21e6efc │ │ pop {r1, r5, r7, pc} │ │ mcr2 13, 0, fp, cr2, cr14, {3} │ │ - mcr2 15, 0, r7, cr2, cr13, {2} │ │ - mcr2 10, 0, r5, cr3, cr1, {3} @ │ │ - vdot.bf16 d7, d5, d8[0] │ │ - mcr2 11, 0, r9, cr5, cr15, {4} @ │ │ - mcr2 11, 0, r9, cr5, cr3, {4} @ │ │ - mcr2 1, 0, r8, cr5, cr7, {7} │ │ - cdp2 1, 0, cr8, cr3, cr7, {6} │ │ - mcr2 15, 0, r2, cr3, cr7, {6} │ │ + cdp2 15, 0, cr7, cr2, cr10, {4} │ │ + mcr2 10, 0, r5, cr3, cr14, {4} @ │ │ + mcr2 13, 0, r7, cr5, cr5, {1} │ │ + @ instruction: 0xfe059bcc │ │ + @ instruction: 0xfe059bc0 │ │ + cdp2 2, 0, cr8, cr5, cr4, {1} │ │ + mcr2 1, 0, r8, cr3, cr4, {7} │ │ + cdp2 0, 0, cr3, cr3, cr4, {0} │ │ mcr2 1, 0, pc, cr6, cr8, {0} @ │ │ b.n 21e6dc2 │ │ mov r4, r0 │ │ ldr r0, [r0, #8] │ │ cmp r0, #0 │ │ bmi.n 21e6eda │ │ ldr r0, [pc, #792] @ (21e71d4 ) │ │ @@ -533884,16 +533884,16 @@ │ │ add r0, sp, #128 @ 0x80 │ │ bl 2134e80 * CelxLua::safeGetClass >(int, FatalErrors, char const*)@@Base+0x70> │ │ b.n 21e7220 │ │ b.n 21e71c4 │ │ b.n 21e7226 │ │ b.n 21e71e8 │ │ nop │ │ - strh r0, [r1, r5] │ │ - mcr2 3, 0, r5, cr6, cr12, {1} │ │ + strh r5, [r6, r5] │ │ + cdp2 3, 0, cr5, cr6, cr9, {3} │ │ vcmla.f16 d10, d6, d4[1], #0 │ │ bl 2158874 >)@@Base+0x1594> │ │ add r0, sp, #64 @ 0x40 │ │ bl 2146e4e >)@@Base+0x1a2> │ │ add r0, sp, #112 @ 0x70 │ │ bl 2158874 >)@@Base+0x1594> │ │ add r0, sp, #120 @ 0x78 │ │ @@ -533921,16 +533921,16 @@ │ │ bl 2134e80 * CelxLua::safeGetClass >(int, FatalErrors, char const*)@@Base+0x70> │ │ add r0, sp, #80 @ 0x50 │ │ bl 2134e80 * CelxLua::safeGetClass >(int, FatalErrors, char const*)@@Base+0x70> │ │ blx 26ffaf0 │ │ nop │ │ lsls r4, r3, #19 │ │ lsls r5, r2, #1 │ │ - subs r2, r3, #1 │ │ - mcr2 14, 0, r1, cr4, cr6, {1} │ │ + subs r7, r0, #2 │ │ + cdp2 14, 0, cr1, cr4, cr3, {3} │ │ mcr2 5, 0, fp, cr4, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #32 │ │ mov r4, r0 │ │ ldr r0, [pc, #152] @ (21e72ec ) │ │ add r0, pc │ │ @@ -536157,15 +536157,15 @@ │ │ mrc 0, 2, r0, cr2, cr4, {2} │ │ bics.w r0, r0, r4, lsr #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21e8c38 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strb r3, [r3, #9] │ │ + strb r0, [r1, #10] │ │ Address 0x21e8c3a is out of bounds. │ │ │ │ │ │ 021e8c3c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -538376,15 +538376,15 @@ │ │ beq.n 21ea500 >&) const@@Base+0x17b0> │ │ lsls r4, r2, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21ea568 >&) const@@Base+0x1818>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldr r3, [r5, r4] │ │ + ldr r0, [r3, r5] │ │ mcr2 5, 0, fp, cr5, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #68 @ 0x44 │ │ str r3, [sp, #12] │ │ mov r4, r0 │ │ ldr.w r0, [pc, #3364] @ 21eb2a0 >&) const@@Base+0x2550> │ │ @@ -543838,15 +543838,15 @@ │ │ movs r0, r0 │ │ movs r0, r0 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21ee890 >::__emplace_back_slow_path(float&&, float&&, float&&)@@Base+0x1c0>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - asrs r3, r0, #24 │ │ + asrs r0, r6, #24 │ │ Address 0x21ee892 is out of bounds. │ │ │ │ │ │ 021ee894 >::__emplace_back_slow_path&>(Eigen::Matrix&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -544863,28 +544863,28 @@ │ │ nop │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldmia r4!, {r0, r2, r3, r6, r7} │ │ subs r6, #76 @ 0x4c │ │ strh r0, [r7, #36] @ 0x24 │ │ lsls r4, r2, #1 │ │ - add r5, sp, #488 @ 0x1e8 │ │ + add r5, sp, #668 @ 0x29c │ │ cdp2 7, 0, cr6, cr5, cr6, {7} │ │ lsls r3, r2, #1 │ │ ldr r4, [r6, #4] │ │ lsls r3, r2, #1 │ │ - add r5, sp, #328 @ 0x148 │ │ - mcr2 4, 0, r5, cr5, cr5, {5} │ │ + add r5, sp, #508 @ 0x1fc │ │ + cdp2 4, 0, cr5, cr5, cr2, {7} │ │ mcr2 7, 0, r6, cr4, cr12, {4} │ │ lsls r3, r2, #1 │ │ ldr r6, [r7, #4] │ │ lsls r3, r2, #1 │ │ ldr r2, [r3, #0] │ │ lsls r3, r2, #1 │ │ - strb r1, [r1, r2] │ │ + strb r6, [r6, r2] │ │ mcr2 9, 0, r1, cr4, cr0, {4} @ │ │ mcr2 1, 0, r1, cr11, cr14, {3} │ │ mcr2 13, 0, r0, cr11, cr8, {7} │ │ mcr2 14, 0, r0, cr11, cr6, {3} │ │ cdp2 15, 0, cr0, cr11, cr6, {0} │ │ mcr2 15, 0, r0, cr11, cr4, {2} │ │ cdp2 15, 0, cr0, cr11, cr6, {6} │ │ @@ -545092,15 +545092,15 @@ │ │ ldrne r0, [sp, #28] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ strh r0, [r0, #0] │ │ mov r5, r3 │ │ str r0, [r7, #76] @ 0x4c │ │ lsls r3, r2, #1 │ │ - str r3, [sp, #104] @ 0x68 │ │ + str r3, [sp, #284] @ 0x11c │ │ mcr2 4, 0, r6, cr3, cr6, {2} │ │ lsls r3, r2, #1 │ │ strh r4, [r4, #2] │ │ lsls r4, r2, #1 │ │ lsrs r4, r2, #10 │ │ @ instruction: 0xfe0b0a62 │ │ cdp2 15, 0, cr7, cr11, cr0, {5} │ │ @@ -545193,15 +545193,15 @@ │ │ blx 26ffad0 │ │ b.n 21ef690 │ │ add r0, sp, #8 │ │ blx 2709810 │ │ blx 26ffaf0 │ │ ldrb r6, [r7, #28] │ │ lsls r4, r2, #1 │ │ - ldr r5, [pc, #492] @ (21ef94c ) │ │ + ldr r5, [pc, #672] @ (21efa00 >, float, float)@@Base+0xa4>) │ │ cdp2 15, 0, cr7, cr5, cr8, {1} │ │ lsls r4, r2, #1 │ │ │ │ 021ef764 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -545238,15 +545238,15 @@ │ │ add sp, #8 │ │ ldr.w fp, [sp], #4 │ │ pop {r4, r5, r6, r7, pc} │ │ mov r0, r5 │ │ blx 2709810 │ │ blx 26ffaf0 │ │ nop │ │ - ldr r4, [pc, #732] @ (21efab0 ) │ │ + ldr r4, [pc, #912] @ (21efb64 ) │ │ Address 0x21ef7d2 is out of bounds. │ │ │ │ │ │ 021ef7d4 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ @@ -545317,15 +545317,15 @@ │ │ bne.n 21ef7ee │ │ blx 2709800 │ │ blx 26ffad0 │ │ b.n 21ef7ee │ │ nop │ │ ldrb r0, [r4, #23] │ │ lsls r4, r2, #1 │ │ - ldr r1, [sp, #856] @ 0x358 │ │ + ldr r2, [sp, #12] │ │ vdot.bf16 , q9, d10[0] │ │ lsls r4, r2, #1 │ │ │ │ 021ef89c : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #16 │ │ @@ -547644,15 +547644,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ bmi.n 21f0fee │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21f1050 ) │ │ add r0, pc │ │ bl 207d3a8 │ │ - cdp 14, 4, cr15, cr3, cr4, {0} │ │ + cdp 14, 7, cr15, cr0, cr4, {0} │ │ │ │ 021f1054 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr.w r1, [r0, #16]! │ │ movs r2, #0 │ │ @@ -547968,19 +547968,19 @@ │ │ bl 207d398 │ │ mov r0, r6 │ │ bl 2093d98 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x130> │ │ bl 207de6a │ │ nop │ │ str r6, [r7, #56] @ 0x38 │ │ lsls r4, r2, #1 │ │ - ldrh r2, [r0, #32] │ │ - cdp2 1, 0, cr3, cr5, cr2, {2} │ │ + ldrh r7, [r5, #32] │ │ + cdp2 1, 0, cr3, cr5, cr15, {3} │ │ mcr2 2, 0, r6, cr4, cr12, {2} │ │ lsls r4, r2, #1 │ │ - bls.n 21f139a │ │ + bge.n 21f13f4 │ │ Address 0x21f139a is out of bounds. │ │ │ │ │ │ 021f139c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -548359,25 +548359,25 @@ │ │ ldr r0, [sp, #28] │ │ ldr r0, [r0, #8] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ str r4, [r1, #32] │ │ lsls r4, r2, #1 │ │ - cmp r7, #124 @ 0x7c │ │ - mcr2 11, 0, sl, cr4, cr14, {4} @ │ │ - vseleq.f16 s16, s9, s24 │ │ - cdp2 7, 0, cr13, cr5, cr7, {4} │ │ - mcr2 10, 0, sl, cr3, cr4, {4} @ │ │ - vseleq.f32 s8, s9, s8 │ │ - mcr2 10, 0, r4, cr5, cr6, {3} @ │ │ - mcr2 9, 0, sl, cr5, cr12, {7} @ │ │ - mcr2 5, 0, r1, cr4, cr7, {1} │ │ - cdp2 5, 0, cr1, cr3, cr9, {1} │ │ - @ instruction: 0xfe03a966 │ │ + cmp r7, #169 @ 0xa9 │ │ + @ instruction: 0xfe04abcb │ │ + mcr2 9, 0, r8, cr4, cr9, {5} @ │ │ + mcr2 7, 0, sp, cr5, cr4, {5} │ │ + @ instruction: 0xfe03aac1 │ │ + mcr2 10, 0, r4, cr4, cr1, {5} @ │ │ + vseleq.f32 s8, s11, s7 │ │ + vseleq.f32 s20, s10, s19 │ │ + cdp2 5, 0, cr1, cr4, cr4, {3} │ │ + mcr2 5, 0, r1, cr3, cr6, {2} │ │ + mcr2 9, 0, sl, cr3, cr3, {4} @ │ │ mcr2 14, 0, r5, cr4, cr14, {4} │ │ lsls r4, r2, #1 │ │ │ │ 021f17bc &, Eigen::Matrix const&, Eigen::Quaternion const&, float, float, float) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -549297,18 +549297,18 @@ │ │ subs.w r3, r0, #1024 @ 0x400 │ │ beq.w 21f22c0 >&)@@Base+0x500> │ │ ldr r0, [sp, #28] │ │ movs r6, #0 │ │ str r3, [sp, #36] @ 0x24 │ │ ldr r4, [r0, #24] │ │ b.n 21f21a8 >&)@@Base+0x3e8> │ │ - lsrs r7, r7, #32 │ │ + lsrs r4, r5, #1 │ │ cdp2 0, 0, cr0, cr5, cr0, {0} │ │ subs r3, #128 @ 0x80 │ │ - lsrs r0, r5, #2 │ │ + lsrs r5, r2, #3 │ │ vcmla.f16 , q2, d4[0], #0 │ │ ldrh r4, [r0, r4] │ │ ldr r0, [sp, #28] │ │ adds r6, #1 │ │ cmp r6, r3 │ │ str r4, [r0, #24] │ │ beq.w 21f22c4 >&)@@Base+0x504> │ │ @@ -549461,17 +549461,17 @@ │ │ movs r0, r0 │ │ movs r2, r1 │ │ movs r0, r0 │ │ ldrsb r4, [r4, r7] │ │ lsls r4, r2, #1 │ │ ldrsb r4, [r3, r6] │ │ lsls r4, r2, #1 │ │ - add r4, sp, #364 @ 0x16c │ │ - cdp2 12, 0, cr10, cr2, cr3, {2} │ │ - mcr2 0, 0, r5, cr2, cr0, {5} │ │ + add r4, sp, #544 @ 0x220 │ │ + mcr2 12, 0, sl, cr2, cr0, {3} │ │ + mcr2 0, 0, r5, cr2, cr13, {6} │ │ Address 0x21f2352 is out of bounds. │ │ │ │ │ │ 021f2354 ::emplace_back&>(unsigned int&, boost::intrusive_ptr&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -549982,18 +549982,18 @@ │ │ ldr r0, [r4, #0] │ │ blx 2707ef0 │ │ add.w r0, r5, #11 │ │ cmp r0, r8 │ │ bne.n 21f2866 >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x402> │ │ b.n 21f24e8 >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x84> │ │ nop │ │ - lsrs r7, r7 │ │ - mcr2 4, 0, ip, cr4, cr10, {6} │ │ - mcr2 3, 0, lr, cr4, cr4, {2} │ │ - @ instruction: 0xfe048a68 │ │ + asrs r4, r5 │ │ + cdp2 5, 0, cr12, cr4, cr7, {0} │ │ + cdp2 3, 0, cr14, cr4, cr1, {4} │ │ + mcr2 10, 0, r8, cr4, cr5, {4} @ │ │ vcmla.f16 q2, q1, d12[1], #0 │ │ add r0, pc │ │ blx 26ffdd0 │ │ mov r4, r0 │ │ blx 26ffe30 │ │ mov r9, r0 │ │ blx 26ffdc0 │ │ @@ -550155,27 +550155,27 @@ │ │ ldrne r0, [sp, #72] @ 0x48 │ │ blxne 26ffad0 │ │ add r0, sp, #84 @ 0x54 │ │ blx 2701c30 │ │ blx 26ffaf0 │ │ str r4, [r0, r5] │ │ lsls r4, r2, #1 │ │ - cmp r1, #18 │ │ - cdp2 14, 0, cr3, cr3, cr13, {0} │ │ + cmp r1, #63 @ 0x3f │ │ + mcr2 14, 0, r3, cr3, cr10, {1} │ │ cdp2 3, 0, cr5, cr4, cr4, {2} │ │ lsls r4, r2, #1 │ │ - @ instruction: 0xb895 │ │ - cdp2 3, 0, cr10, cr3, cr6, {1} │ │ + @ instruction: 0xb8c2 │ │ + mcr2 3, 0, sl, cr3, cr3, {2} │ │ cdp2 12, 0, cr4, cr2, cr2, {4} │ │ lsls r4, r2, #1 │ │ - ldr r4, [r0, #4] │ │ - vdot.bf16 d3, d2, d5[0] │ │ + ldr r1, [r6, #4] │ │ + mcr2 13, 0, r3, cr2, cr2, {1} │ │ mcr2 2, 0, r5, cr4, cr12, {1} │ │ lsls r4, r2, #1 │ │ - b.n 21f27ee >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x38a> │ │ + b.n 21f2848 >&, std::__ndk1::__fs::filesystem::path const&)@@Base+0x3e4> │ │ Address 0x21f2a7a is out of bounds. │ │ │ │ │ │ 021f2a7c : │ │ adds r2, r1, #1 │ │ itt eq │ │ moveq r0, #0 │ │ @@ -550559,36 +550559,36 @@ │ │ movs r0, #1 │ │ movs r5, #0 │ │ movs r1, #1 │ │ cmp.w r9, #0 │ │ bne.w 21f3040 │ │ b.n 21f3168 │ │ nop │ │ - subs r4, r2, r4 │ │ + subs r1, r0, r5 │ │ vseleq.f32 s8, s9, s1 │ │ lsls r4, r2, #1 │ │ - b.n 21f2f00 │ │ - @ instruction: 0xfe033aef │ │ + b.n 21f2f5a │ │ + mcr2 11, 0, r3, cr3, cr12, {0} @ │ │ cdp2 0, 0, cr5, cr4, cr4, {1} │ │ lsls r4, r2, #1 │ │ - ldr r5, [sp, #116] @ 0x74 │ │ - cdp2 2, 0, cr14, cr4, cr11, {6} │ │ + ldr r5, [sp, #296] @ 0x128 │ │ + mcr2 2, 0, lr, cr4, cr8, {7} │ │ cdp2 15, 0, cr4, cr2, cr10, {6} │ │ lsls r4, r2, #1 │ │ - strh r0, [r1, #10] │ │ - @ instruction: 0xfe03396f │ │ + strh r5, [r6, #10] │ │ + mcr2 9, 0, r3, cr3, cr12, {4} @ │ │ cdp2 14, 0, cr4, cr4, cr6, {5} │ │ lsls r4, r2, #1 │ │ - subs r6, #243 @ 0xf3 │ │ - mcr2 14, 0, r9, cr3, cr15, {6} │ │ - cdp2 0, 0, cr4, cr2, cr6, {5} │ │ + subs r7, #32 │ │ + cdp2 15, 0, cr9, cr3, cr12, {0} │ │ + mcr2 0, 0, r4, cr2, cr3, {6} │ │ cdp2 5, 0, cr12, cr3, cr12, {5} │ │ adds r7, #39 @ 0x27 │ │ - lsls r1, r0 │ │ - cdp2 0, 0, cr14, cr3, cr9, {6} │ │ + lsls r6, r5 │ │ + mcr2 0, 0, lr, cr3, cr6, {7} │ │ vdot.bf16 q2, q9, d10[0] │ │ lsls r4, r2, #1 │ │ cmp.w r9, #0 │ │ beq.n 21f2f2e │ │ ldr r0, [pc, #936] @ (21f3280 ) │ │ add r0, pc │ │ blx 26ffdd0 │ │ @@ -550912,30 +550912,30 @@ │ │ vmla.f32 s2, s4, s0 │ │ vsub.f32 s0, s20, s2 │ │ vsub.f32 s20, s0, s22 │ │ cmp.w sl, #0 │ │ bne.w 21f30ae │ │ b.n 21f2fa2 │ │ nop │ │ - subs r7, #159 @ 0x9f │ │ - cdp2 0, 0, cr14, cr3, cr15, {0} │ │ + subs r7, #204 @ 0xcc │ │ + mcr2 0, 0, lr, cr3, cr12, {1} │ │ vdot.bf16 d4, d2, d14[0] │ │ lsls r4, r2, #1 │ │ movs r0, r0 │ │ movs r0, r0 │ │ cbz r2, 21f3298 │ │ - cdp2 15, 0, cr13, cr5, cr9, {5} │ │ + mcr2 15, 0, sp, cr5, cr6, {6} │ │ cdp2 12, 0, cr4, cr2, cr6, {5} │ │ lsls r4, r2, #1 │ │ - ldr r3, [r2, #104] @ 0x68 │ │ - mcr2 14, 0, sp, cr5, cr7, {4} │ │ + ldr r0, [r0, #108] @ 0x6c │ │ + cdp2 14, 0, cr13, cr5, cr4, {6} │ │ mcr2 11, 0, r4, cr2, cr6, {4} @ │ │ lsls r4, r2, #1 │ │ - ldr r3, [sp, #248] @ 0xf8 │ │ - mcr2 5, 0, r3, cr2, cr11, {1} │ │ + ldr r3, [sp, #428] @ 0x1ac │ │ + cdp2 5, 0, cr3, cr2, cr8, {3} │ │ mcr2 10, 0, r4, cr4, cr0, {3} @ │ │ lsls r4, r2, #1 │ │ pop {r1, r2, r4, r5, r6, pc} │ │ eors r0, r2 │ │ mov r9, r6 │ │ str.w sl, [r6, #20] │ │ movs r4, #1 │ │ @@ -551318,30 +551318,30 @@ │ │ ldrb.w r0, [r8, #12] │ │ cbz r0, 21f36f0 │ │ ldr r0, [sp, #20] │ │ add r1, sp, #112 @ 0x70 │ │ blx 2709980 │ │ b.n 21f3748 │ │ nop │ │ - cmp r2, #205 @ 0xcd │ │ - @ instruction: 0xfe056ac2 │ │ - vseleq.f32 s26, s11, s3 │ │ + cmp r2, #250 @ 0xfa │ │ + @ instruction: 0xfe056aef │ │ + @ instruction: 0xfe05dace │ │ mcr2 7, 0, r4, cr2, cr14, {4} │ │ lsls r4, r2, #1 │ │ - bmi.n 21f3612 │ │ - cdp2 2, 0, cr3, cr4, cr13, {0} │ │ + bmi.n 21f366c │ │ + mcr2 2, 0, r3, cr4, cr10, {1} │ │ cdp2 7, 0, cr4, cr4, cr4, {2} │ │ lsls r4, r2, #1 │ │ - str r1, [r1, r3] │ │ - vcmla.f16 d5, d21, d3[0], #0 │ │ - mcr2 9, 0, sp, cr3, cr15, {0} @ │ │ + str r6, [r6, r3] │ │ + vfmal.f16 d5, s11, s1[0] │ │ + @ instruction: 0xfe03d94c │ │ mcr2 6, 0, r4, cr2, cr14, {0} │ │ lsls r4, r2, #1 │ │ - ldrb r3, [r0, #2] │ │ - cdp2 0, 0, cr3, cr3, cr13, {4} │ │ + ldrb r0, [r6, #2] │ │ + mcr2 0, 0, r3, cr3, cr10, {5} │ │ cdp2 5, 0, cr4, cr4, cr4, {6} │ │ lsls r4, r2, #1 │ │ ldr r0, [pc, #752] @ (21f39e4 ) │ │ add r0, pc │ │ blx 26ffdd0 │ │ mov r4, r0 │ │ blx 26ffe30 │ │ @@ -551607,33 +551607,33 @@ │ │ vcvt.f32.f64 s0, d16 │ │ vmov r1, s0 │ │ ldr r0, [sp, #20] │ │ blx 2709930 │ │ b.n 21f3a7e │ │ nop │ │ bl 250c5ea │ │ - bvc.n 21f39d6 │ │ + bhi.n 21f3a30 │ │ mcr2 4, 0, r4, cr2, cr4, {7} │ │ lsls r4, r2, #1 │ │ - ldr r6, [pc, #744] @ (21f3cdc ) │ │ - cdp2 0, 0, cr1, cr5, cr1, {5} │ │ - cdp2 6, 0, cr13, cr2, cr5, {7} │ │ + ldr r6, [pc, #924] @ (21f3d90 ) │ │ + cdp2 0, 0, cr1, cr5, cr14, {6} │ │ + mcr2 7, 0, sp, cr2, cr2, {0} │ │ cdp2 3, 0, cr4, cr2, cr4, {7} │ │ lsls r4, r2, #1 │ │ - cmp r0, #50 @ 0x32 │ │ - cdp2 6, 0, cr13, cr5, cr13, {4} │ │ + cmp r0, #95 @ 0x5f │ │ + mcr2 6, 0, sp, cr5, cr10, {5} │ │ cdp2 3, 0, cr4, cr2, cr12, {4} │ │ lsls r4, r2, #1 │ │ - str r0, [sp, #828] @ 0x33c │ │ - @ instruction: 0xfe0289c6 │ │ - mcr2 5, 0, sp, cr5, cr1, {7} │ │ + str r0, [sp, #1008] @ 0x3f0 │ │ + mcr2 9, 0, r8, cr2, cr3, {7} @ │ │ + mcr2 6, 0, sp, cr5, cr14, {0} │ │ mcr2 2, 0, r4, cr2, cr0, {7} │ │ lsls r4, r2, #1 │ │ - str r1, [r3, #92] @ 0x5c │ │ - mcr2 5, 0, sp, cr5, cr9, {4} │ │ + str r6, [r0, #96] @ 0x60 │ │ + cdp2 5, 0, cr13, cr5, cr6, {6} │ │ mcr2 2, 0, r4, cr2, cr8, {4} │ │ lsls r4, r2, #1 │ │ ldr r0, [pc, #892] @ (21f3da8 ) │ │ add r0, pc │ │ blx 26ffdd0 │ │ mov r4, r0 │ │ blx 26ffe30 │ │ @@ -551946,32 +551946,32 @@ │ │ stmia r0!, {r0, r1, r2, r3} │ │ ldrb r5, [r2, #3] │ │ movs r6, #233 @ 0xe9 │ │ lsrs r1, r6, #32 │ │ itt le │ │ suble r0, #220 @ 0xdc │ │ lslle r4, r2, #1 │ │ - ldmia r7, {r0, r3, r4, r6, r7} │ │ - mcr2 10, 0, r2, cr3, cr13, {3} @ │ │ + beq.n 21f3dac │ │ + vseleq.f32 s4, s7, s21 │ │ mcr2 15, 0, r3, cr4, cr4, {5} │ │ lsls r4, r2, #1 │ │ stmia r2!, {r0, r1, r2, r3, r4, r5, r6} │ │ - mcr2 4, 0, sp, cr5, cr13, {5} │ │ + cdp2 4, 0, cr13, cr5, cr10, {7} │ │ mcr2 1, 0, r4, cr2, cr12, {5} │ │ lsls r4, r2, #1 │ │ - ldr r3, [pc, #740] @ (21f409c ) │ │ + ldr r3, [pc, #920] @ (21f4150 ) │ │ mcr2 14, 0, lr, cr5, cr0, {7} │ │ - mcr2 3, 0, sp, cr1, cr11, {4} │ │ + cdp2 3, 0, cr13, cr1, cr8, {6} │ │ mcr2 0, 0, r4, cr2, cr10, {4} │ │ lsls r4, r2, #1 │ │ - lsrs r2, r4, #20 │ │ - cdp2 3, 0, cr13, cr2, cr3, {2} │ │ + lsrs r7, r1, #21 │ │ + mcr2 3, 0, sp, cr2, cr0, {3} │ │ cdp2 0, 0, cr4, cr2, cr2, {2} │ │ lsls r4, r2, #1 │ │ - ldr r3, [pc, #856] @ (21f412c ) │ │ + ldr r4, [pc, #12] @ (21f3de0 , std::__ndk1::allocator > const&)@@Base+0xc>) │ │ Address 0x21f3dd2 is out of bounds. │ │ │ │ │ │ 021f3dd4 , std::__ndk1::allocator > const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -552033,15 +552033,15 @@ │ │ mov r0, r9 │ │ mov r3, r8 │ │ blx 2709bb0 │ │ b.n 21f3e38 , std::__ndk1::allocator > const&)@@Base+0x64> │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - cmp r7, r3 │ │ + cmp r4, r9 │ │ Address 0x21f3e6e is out of bounds. │ │ │ │ │ │ 021f3e70 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -552214,15 +552214,15 @@ │ │ ittt eq │ │ addeq sp, #32 │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ adds r6, #232 @ 0xe8 │ │ lsls r4, r2, #1 │ │ - adds r2, #37 @ 0x25 │ │ + adds r2, #82 @ 0x52 │ │ mcr2 7, 0, r3, cr2, cr0, {1} │ │ lsls r4, r2, #1 │ │ adds r5, #186 @ 0xba │ │ lsls r4, r2, #1 │ │ │ │ 021f4028 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -552542,15 +552542,15 @@ │ │ ldr r0, [r4, #44] @ 0x2c │ │ vadd.f32 s22, s0, s20 │ │ cmp r6, r0 │ │ bcs.n 21f43d4 │ │ vstmia r6!, {s22} │ │ ldr r0, [sp, #72] @ 0x48 │ │ b.n 21f4470 │ │ - ldr r1, [pc, #360] @ (21f4538 ) │ │ + ldr r1, [pc, #540] @ (21f45ec ) │ │ vcmla.f16 q5, q10, d1[0], #0 │ │ subs r7, #192 @ 0xc0 │ │ mov.w fp, sl, asr #2 │ │ add.w r9, fp, #1 │ │ cmp.w r9, #1073741824 @ 0x40000000 │ │ str r1, [sp, #96] @ 0x60 │ │ bcs.w 21f5192 │ │ @@ -553845,16 +553845,16 @@ │ │ ldr r1, [sp, #100] @ 0x64 │ │ str r0, [sp, #108] @ 0x6c │ │ add r0, sp, #108 @ 0x6c │ │ bl 21f1c88 *& std::__ndk1::__tree, std::__ndk1::allocator >, std::__ndk1::less, std::__ndk1::allocator > >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__find_equal, std::__ndk1::allocator > >(std::__ndk1::__tree_end_node*>*&, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0xf4> │ │ add r0, sp, #104 @ 0x68 │ │ bl 21f5fac , std::__ndk1::allocator > const&, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base+0x158> │ │ blx 26ffaf0 │ │ - ldr r6, [pc, #476] @ (21f5430 ) │ │ - mcr2 14, 0, r4, cr5, cr9, {2} │ │ + ldr r6, [pc, #656] @ (21f54e4 >&, std::__ndk1::optional&, std::__ndk1::shared_ptr&) const@@Base+0x2c>) │ │ + cdp2 14, 0, cr4, cr5, cr6, {4} │ │ cdp2 4, 0, cr2, cr5, cr10, {6} │ │ lsls r4, r2, #1 │ │ │ │ 021f525c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -554067,15 +554067,15 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ bl 213bf8c >::__assign_with_size[abi:ne180000](unsigned int*, unsigned int*, int)@@Base+0xc0> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ nop │ │ movs r3, #82 @ 0x52 │ │ lsls r4, r2, #1 │ │ - subs r4, #43 @ 0x2b │ │ + subs r4, #88 @ 0x58 │ │ mcr2 1, 0, r2, cr2, cr0, {1} │ │ lsls r4, r2, #1 │ │ │ │ 021f54b8 >&, std::__ndk1::optional&, std::__ndk1::shared_ptr&) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -554412,17 +554412,17 @@ │ │ ldr r1, [r0, #8] │ │ mov r0, r4 │ │ blx r1 │ │ mov r0, r4 │ │ blx 2700270 │ │ b.n 21f5960 >&, std::__ndk1::optional&, std::__ndk1::shared_ptr&) const@@Base+0x4a8> │ │ nop │ │ - ldrsb r4, [r1, r0] │ │ - cdp2 1, 0, cr4, cr3, cr14, {1} │ │ - cdp2 1, 0, cr3, cr5, cr12, {6} │ │ + ldrsb r1, [r7, r0] │ │ + mcr2 1, 0, r4, cr3, cr11, {2} │ │ + mcr2 1, 0, r3, cr5, cr9, {7} │ │ mcr2 13, 0, r2, cr3, cr3, {7} │ │ str r5, [sp, #596] @ 0x254 │ │ cmp r6, #147 @ 0x93 │ │ subs r7, #202 @ 0xca │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ @@ -554590,28 +554590,28 @@ │ │ eors r6, r4 │ │ ldmia r0, {r0, r1, r7} │ │ ldr r1, [r1, #92] @ 0x5c │ │ ldrsh r0, [r6, r4] │ │ subs r7, #212 @ 0xd4 │ │ movs r0, #228 @ 0xe4 │ │ lsls r4, r2, #1 │ │ - lsrs r7, r7, #3 │ │ - mcr2 14, 0, r0, cr5, cr15, {7} │ │ + lsrs r4, r5, #4 │ │ + cdp2 15, 0, cr0, cr5, cr12, {1} │ │ mcr2 4, 0, r2, cr4, cr4, {1} │ │ lsls r4, r2, #1 │ │ - str r6, [sp, #224] @ 0xe0 │ │ - vfmal.f16 d11, s6, s6[1] │ │ + str r6, [sp, #404] @ 0x194 │ │ + vcmla.f16 , , d8[0], #0 │ │ mcr2 5, 0, r2, cr2, cr14, {0} │ │ lsls r4, r2, #1 │ │ - push {r0, r6, r7, lr} │ │ - mcr2 5, 0, fp, cr2, cr13, {6} │ │ + push {r1, r2, r3, r5, r6, r7, lr} │ │ + cdp2 6, 0, cr11, cr2, cr10, {0} │ │ mcr2 2, 0, r2, cr2, cr14, {6} │ │ lsls r4, r2, #1 │ │ - @ instruction: 0xeb8bfe04 │ │ - lsrs r1, r0, #24 │ │ + @ instruction: 0xebb8fe04 │ │ + lsrs r6, r5, #24 │ │ mcr2 3, 0, r2, cr4, cr10, {1} │ │ lsls r4, r2, #1 │ │ adds r6, r4, #0 │ │ lsls r4, r2, #1 │ │ │ │ 021f5aa0 ::emplace_back&>(unsigned int const&, boost::intrusive_ptr&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -554972,25 +554972,25 @@ │ │ cmp r1, r8 │ │ bne.n 21f5de8 >&, std::__ndk1::optional&) const@@Base+0x238> │ │ mov r1, r8 │ │ b.n 21f5df0 >&, std::__ndk1::optional&) const@@Base+0x240> │ │ nop │ │ adds r0, r7, r7 │ │ lsls r4, r2, #1 │ │ - lsrs r4, r2, #10 │ │ - mcr2 14, 0, sl, cr4, cr8, {4} │ │ - vseleq.f16 s0, s7, s18 │ │ + lsrs r1, r0, #11 │ │ + cdp2 14, 0, cr10, cr4, cr5, {6} │ │ + mcr2 9, 0, r0, cr3, cr6, {5} @ │ │ cdp2 14, 0, cr1, cr4, cr4, {6} │ │ lsls r4, r2, #1 │ │ - asrs r2, r2, #8 │ │ - mcr2 2, 0, fp, cr3, cr7, {1} │ │ + asrs r7, r7, #8 │ │ + cdp2 2, 0, cr11, cr3, cr4, {3} │ │ mcr2 15, 0, r1, cr2, cr12, {1} │ │ lsls r4, r2, #1 │ │ - lsrs r2, r5, #6 │ │ - mcr2 3, 0, r1, cr4, cr15, {7} │ │ + lsrs r7, r2, #7 │ │ + cdp2 4, 0, cr1, cr4, cr12, {1} │ │ mcr2 7, 0, r1, cr2, cr2, {7} │ │ lsls r4, r2, #1 │ │ │ │ 021f5e54 , std::__ndk1::allocator > const&, std::__ndk1::basic_string, std::__ndk1::allocator > const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -555608,24 +555608,24 @@ │ │ b.n 21f644e ::format(StarDatabaseBuilder::StcHeader const&, fmt::v11::context&) const@@Base+0x112> │ │ b.n 21f644e ::format(StarDatabaseBuilder::StcHeader const&, fmt::v11::context&) const@@Base+0x112> │ │ ldr r0, [sp, #24] │ │ cmp r0, fp │ │ it ne │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ - stmia r2!, {r1, r2, r4, r5, r6, r7} │ │ + stmia r3!, {r0, r1, r5} │ │ mcr2 2, 0, r1, cr4, cr4, {7} │ │ lsls r4, r2, #1 │ │ asrs r4, r4, #9 │ │ lsls r4, r2, #1 │ │ - stmia r2!, {r1, r2, r6, r7} │ │ - cdp2 2, 0, cr2, cr4, cr12, {6} │ │ - mcr2 2, 0, r2, cr5, cr12, {5} │ │ - mcr2 9, 0, r8, cr5, cr12, {2} @ │ │ - @ instruction: 0xfe038940 │ │ + stmia r2!, {r0, r1, r4, r5, r6, r7} │ │ + mcr2 2, 0, r2, cr4, cr9, {7} │ │ + cdp2 2, 0, cr2, cr5, cr9, {7} │ │ + vseleq.f16 s16, s11, s18 │ │ + @ instruction: 0xfe03896d │ │ cdp2 1, 0, cr1, cr3, cr12, {4} │ │ lsls r4, r2, #1 │ │ cmp r1, #0 │ │ it eq │ │ bxeq lr │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ @@ -555813,15 +555813,15 @@ │ │ bl 21f667c , std::__ndk1::default_delete > >* std::__ndk1::vector, std::__ndk1::default_delete > >, std::__ndk1::allocator, std::__ndk1::default_delete > > > >::__push_back_slow_path, std::__ndk1::default_delete > > >(std::__ndk1::unique_ptr, std::__ndk1::default_delete > >&&)@@Base+0x184> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21f6688 , std::__ndk1::default_delete > >* std::__ndk1::vector, std::__ndk1::default_delete > >, std::__ndk1::allocator, std::__ndk1::default_delete > > > >::__push_back_slow_path, std::__ndk1::default_delete > > >(std::__ndk1::unique_ptr, std::__ndk1::default_delete > >&&)@@Base+0x190>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldr r0, [sp, #44] @ 0x2c │ │ + ldr r0, [sp, #224] @ 0xe0 │ │ Address 0x21f668a is out of bounds. │ │ │ │ │ │ 021f668c ::on_capacity_overflow(boost::move_detail::integral_constant)@@Base>: │ │ push {r7, lr} │ │ mov r7, sp │ │ blx 2707f40 │ │ @@ -557256,15 +557256,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ bmi.n 21f74be , 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >* std::__ndk1::vector, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >, std::__ndk1::allocator, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > > > >::__push_back_slow_path, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > > >(std::__ndk1::unique_ptr, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >&&)@@Base+0x17e> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21f7520 , 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >* std::__ndk1::vector, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >, std::__ndk1::allocator, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > > > >::__push_back_slow_path, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > > >(std::__ndk1::unique_ptr, 1024u, void>, std::__ndk1::default_delete, 1024u, void> > >&&)@@Base+0x1e0>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldrh r3, [r6, #10] │ │ + ldrh r0, [r4, #12] │ │ Address 0x21f7522 is out of bounds. │ │ │ │ │ │ 021f7524 , 1024u, 0u, true>::on_capacity_overflow(boost::move_detail::integral_constant)@@Base>: │ │ push {r7, lr} │ │ mov r7, sp │ │ blx 2707f40 │ │ @@ -557719,21 +557719,21 @@ │ │ bl 21f7a74 & BlockArray, 1024u>::emplace_back&>(Eigen::Matrix&)@@Base+0x2c0> │ │ bmi.n 21f7a0e & BlockArray, 1024u>::emplace_back&>(Eigen::Matrix&)@@Base+0x25a> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21f7a70 & BlockArray, 1024u>::emplace_back&>(Eigen::Matrix&)@@Base+0x2bc>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strh r3, [r4, #32] │ │ + strh r0, [r2, #34] @ 0x22 │ │ cdp2 5, 0, cr11, cr4, cr0, {4} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21f7a80 & BlockArray, 1024u>::emplace_back&>(Eigen::Matrix&)@@Base+0x2cc>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strh r3, [r2, #32] │ │ + strh r0, [r0, #34] @ 0x22 │ │ Address 0x21f7a82 is out of bounds. │ │ │ │ │ │ 021f7a84 & std::__ndk1::vector, std::__ndk1::allocator > >::emplace_back const&, float&>(Eigen::Matrix const&, float&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -559430,16 +559430,16 @@ │ │ cmp r2, r1 │ │ ittt eq │ │ addeq sp, #92 @ 0x5c │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ - asrs r6, r7, #19 │ │ - cdp2 1, 0, cr2, cr5, cr1, {5} │ │ + asrs r3, r5, #20 │ │ + cdp2 1, 0, cr2, cr5, cr14, {6} │ │ cdp2 6, 0, cr15, cr4, cr7, {2} │ │ asrs r0, r4, #5 │ │ ldr r0, [sp, #40] @ 0x28 │ │ movt r1, #65534 @ 0xfffe │ │ add r0, r1 │ │ adds r1, #1 │ │ cmp r0, r1 │ │ @@ -559491,16 +559491,16 @@ │ │ nop │ │ @ instruction: 0xebf60053 │ │ @ instruction: 0xeb380053 │ │ @ instruction: 0xeaba0053 │ │ ldr r2, [r2, #120] @ 0x78 │ │ mcr2 10, 0, lr, cr5, cr10, {2} @ │ │ lsls r3, r2, #1 │ │ - adds r5, r6, r1 │ │ - mcr2 5, 0, r3, cr3, cr9, {3} │ │ + adds r2, r4, r2 │ │ + cdp2 5, 0, cr3, cr3, cr6, {5} │ │ vfmal.f16 d14, s10, s1[1] │ │ lsls r3, r2, #1 │ │ │ │ 021f8e40 >, bool) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -560466,20 +560466,20 @@ │ │ b.n 21f982c >, bool) const@@Base+0x98> │ │ ldr r0, [sp, #20] │ │ cmp r0, sl │ │ it ne │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ - adds r1, #177 @ 0xb1 │ │ + adds r1, #222 @ 0xde │ │ mcr2 4, 0, lr, cr4, cr6, {3} │ │ lsls r3, r2, #1 │ │ udf #14 │ │ lsls r3, r2, #1 │ │ - adds r1, #127 @ 0x7f │ │ + adds r1, #172 @ 0xac │ │ vdot.bf16 d13, d20, d8[1] │ │ lsls r3, r2, #1 │ │ │ │ 021f9850 >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, bool) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -560669,20 +560669,20 @@ │ │ blx 26ffaf0 │ │ b.n 21fa1a4 >&)@@Base+0x230> │ │ lsls r3, r2, #1 │ │ str r6, [r4, #68] @ 0x44 │ │ vdot.bf16 , , d10[0] │ │ lsls r3, r2, #1 │ │ str r6, [r5, #64] @ 0x40 │ │ - cdp2 15, 0, cr8, cr5, cr12, {3} │ │ - mcr2 15, 0, r8, cr3, cr8, {2} │ │ - cdp2 6, 0, cr3, cr3, cr11, {1} │ │ - mcr2 6, 0, r3, cr3, cr9, {0} │ │ - mcr2 4, 0, pc, cr3, cr1, {7} @ │ │ - cdp2 4, 0, cr15, cr2, cr1, {7} │ │ + mcr2 15, 0, r8, cr5, cr9, {4} │ │ + cdp2 15, 0, cr8, cr3, cr5, {4} │ │ + mcr2 6, 0, r3, cr3, cr8, {2} │ │ + cdp2 6, 0, cr3, cr3, cr6, {2} │ │ + mcr2 5, 0, pc, cr3, cr14, {0} @ │ │ + cdp2 5, 0, cr15, cr2, cr14, {0} │ │ mcr2 2, 0, lr, cr2, cr6, {4} │ │ lsls r3, r2, #1 │ │ blt.n 21f99e0 >, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, bool) const@@Base+0x190> │ │ lsls r3, r2, #1 │ │ │ │ 021f9a64 >, unsigned int, std::__ndk1::basic_string_view >, std::__ndk1::basic_string_view >, bool) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -560796,16 +560796,16 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ b.n 21f9ed0 >&)@@Base+0x344> │ │ lsls r3, r2, #1 │ │ blt.n 21f9c04 >&)@@Base+0x78> │ │ lsls r3, r2, #1 │ │ - strh r4, [r3, r2] │ │ - cdp2 2, 0, cr5, cr3, cr10, {4} │ │ + strh r1, [r1, r3] │ │ + mcr2 2, 0, r5, cr3, cr7, {5} │ │ @ instruction: 0xfe03da6e │ │ lsls r3, r2, #1 │ │ │ │ 021f9b8c >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -561163,16 +561163,16 @@ │ │ nop │ │ bge.n 21f9f90 >&)@@Base+0x1c> │ │ lsls r3, r2, #1 │ │ bls.n 21f9efc >&)@@Base+0x370> │ │ lsls r3, r2, #1 │ │ bhi.n 21f9f00 >&)@@Base+0x374> │ │ lsls r3, r2, #1 │ │ - muls r5, r7 │ │ - cdp2 3, 0, cr4, cr3, cr5, {4} │ │ + bics r2, r5 │ │ + mcr2 3, 0, r4, cr3, cr2, {5} │ │ cdp2 6, 0, cr13, cr3, cr10, {6} │ │ lsls r3, r2, #1 │ │ │ │ 021f9f74 >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -561536,15 +561536,15 @@ │ │ subs r2, r1, r0 │ │ it ne │ │ subne.w r2, r6, r3, lsl #1 │ │ movs r3, #1 │ │ bl 21fa9ec >::__assign_with_size[abi:ne180000](StarNameDatabase::CrossIndexEntry const*, StarNameDatabase::CrossIndexEntry const*, int)@@Base+0xd0> │ │ b.n 21fa3ba >&)@@Base+0x446> │ │ ldrh r6, [r3, #20] │ │ - cdp2 14, 0, cr0, cr1, cr13, {7} │ │ + mcr2 15, 0, r0, cr1, cr10, {0} │ │ cdp2 1, 0, cr15, cr3, cr5, {0} │ │ b.n 21f9dc2 >&)@@Base+0x236> │ │ mov r4, r0 │ │ ldr r0, [pc, #124] @ (21fa3f8 >&)@@Base+0x484>) │ │ add r0, pc │ │ blx 26ffdd0 │ │ mov r6, r0 │ │ @@ -561584,21 +561584,21 @@ │ │ b.n 21fa3de >&)@@Base+0x46a> │ │ b.n 21fa3de >&)@@Base+0x46a> │ │ ldr r0, [sp, #24] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ bvs.n 21fa454 >&)@@Base+0x4e0> │ │ lsls r3, r2, #1 │ │ - movs r0, #110 @ 0x6e │ │ + movs r0, #155 @ 0x9b │ │ mcr2 3, 0, sp, cr5, cr8, {0} │ │ lsls r3, r2, #1 │ │ - add r3, pc, #476 @ (adr r3, 21fa5d4 >&)@@Base+0x660>) │ │ - mcr2 6, 0, lr, cr3, cr9, {2} │ │ - cdp2 12, 0, cr15, cr3, cr12, {1} │ │ - mcr2 12, 0, pc, cr4, cr12, {0} @ │ │ + add r3, pc, #656 @ (adr r3, 21fa688 >&)@@Base+0x714>) │ │ + cdp2 6, 0, cr14, cr3, cr6, {4} │ │ + mcr2 12, 0, pc, cr3, cr9, {2} @ │ │ + cdp2 12, 0, cr15, cr4, cr9, {2} │ │ mcr2 5, 0, fp, cr4, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ ldrd r8, r4, [r0] │ │ mov r0, r1 │ │ mov r9, r2 │ │ mov sl, r1 │ │ @@ -562186,15 +562186,15 @@ │ │ bl 21fa9dc >::__assign_with_size[abi:ne180000](StarNameDatabase::CrossIndexEntry const*, StarNameDatabase::CrossIndexEntry const*, int)@@Base+0xc0> │ │ bmi.n 21fa986 >::__assign_with_size[abi:ne180000](StarNameDatabase::CrossIndexEntry const*, StarNameDatabase::CrossIndexEntry const*, int)@@Base+0x6a> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21fa9e8 >::__assign_with_size[abi:ne180000](StarNameDatabase::CrossIndexEntry const*, StarNameDatabase::CrossIndexEntry const*, int)@@Base+0xcc>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strb r3, [r5, r2] │ │ + strb r0, [r3, r3] │ │ mcr2 5, 0, fp, cr4, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ mov sl, r2 │ │ mov r9, r1 │ │ mov r5, r0 │ │ @@ -563929,15 +563929,15 @@ │ │ lsls r1, r3, #1 │ │ cbnz r4, 21fbd1c │ │ lsls r3, r2, #1 │ │ cmp r5, #44 @ 0x2c │ │ lsls r1, r3, #1 │ │ cmp r5, #16 │ │ lsls r1, r3, #1 │ │ - lsls r2, r2, #13 │ │ + lsls r7, r7, #13 │ │ cdp2 12, 0, cr2, cr4, cr12, {7} │ │ lsls r1, r3, #1 │ │ @ instruction: 0xb8f8 │ │ lsls r3, r2, #1 │ │ cmp r4, #226 @ 0xe2 │ │ lsls r1, r3, #1 │ │ push {r4, r5, r7, lr} │ │ @@ -564428,15 +564428,15 @@ │ │ lsls r0, r0, #31 │ │ beq.n 21fc252 │ │ ldr r0, [sp, #32] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ bl 207de6a │ │ nop │ │ - ldmia r5, {r1, r2, r4, r5, r6} │ │ + ldmia r5, {r0, r1, r5, r7} │ │ vfmal.f16 d15, s5, s10[1] │ │ movs r0, r7 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #64] @ 0x40 │ │ blxne 26ffad0 │ │ ldrb.w r0, [sp, #40] @ 0x28 │ │ @@ -564445,15 +564445,15 @@ │ │ ldr r0, [sp, #48] @ 0x30 │ │ b.n 21fc24e │ │ nop │ │ @ instruction: 0xb748 │ │ lsls r3, r2, #1 │ │ ldr r3, [sp, #368] @ 0x170 │ │ lsls r2, r2, #1 │ │ - lsls r4, r7, #3 │ │ + lsls r1, r5, #4 │ │ mcr2 10, 0, r9, cr4, cr14, {0} @ │ │ lsls r2, r2, #1 │ │ push {r6, r7, lr} │ │ lsls r3, r2, #1 │ │ ldr r1, [sp, #176] @ 0xb0 │ │ lsls r2, r2, #1 │ │ push {r1, r3, r4} │ │ @@ -564545,18 +564545,18 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ cbz r6, 21fc3b2 │ │ lsls r3, r2, #1 │ │ cbz r2, 21fc3b6 │ │ lsls r3, r2, #1 │ │ - cmp r2, #82 @ 0x52 │ │ + cmp r2, #127 @ 0x7f │ │ mcr2 2, 0, fp, cr3, cr2, {6} │ │ lsls r3, r2, #1 │ │ - lsrs r3, r0, #17 │ │ + lsrs r0, r6, #17 │ │ cdp2 2, 0, cr11, cr3, cr10, {3} │ │ lsls r3, r2, #1 │ │ cmp r1, #0 │ │ it eq │ │ bxeq lr │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ @@ -565473,15 +565473,15 @@ │ │ ldrne r0, [sp, #24] │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ add r2, sp, #288 @ 0x120 │ │ lsls r3, r2, #1 │ │ add r1, sp, #176 @ 0xb0 │ │ lsls r3, r2, #1 │ │ - asrs r5, r5, #23 │ │ + asrs r2, r3, #24 │ │ mcr2 5, 0, fp, cr3, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ mov r6, r0 │ │ ldrb r0, [r1, #0] │ │ mov r9, r1 │ │ @@ -566085,15 +566085,15 @@ │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ bmi.n 21fd296 , std::__ndk1::allocator >* std::__ndk1::vector, std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__emplace_back_slow_path<>()@@Base+0xa4> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21fd2f8 , std::__ndk1::allocator >* std::__ndk1::vector, std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__emplace_back_slow_path<>()@@Base+0x106>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - cmp r3, #155 @ 0x9b │ │ + cmp r3, #200 @ 0xc8 │ │ Address 0x21fd2fa is out of bounds. │ │ │ │ │ │ 021fd2fc , std::__ndk1::allocator >* std::__ndk1::vector, std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >::__emplace_back_slow_path, std::__ndk1::allocator > >(std::__ndk1::basic_string, std::__ndk1::allocator >&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -568617,18 +568617,18 @@ │ │ str r0, [r1, #0] │ │ blx 26ffaf0 │ │ nop │ │ ldrh r2, [r1, #32] │ │ lsls r3, r2, #1 │ │ ldrh r4, [r4, #22] │ │ lsls r3, r2, #1 │ │ - udf #54 @ 0x36 │ │ + udf #99 @ 0x63 │ │ @ instruction: 0xfe0389cc │ │ lsls r3, r2, #1 │ │ - eors r6, r0 │ │ + eors r3, r6 │ │ Address 0x21fec3e is out of bounds. │ │ │ │ │ │ 021fec40 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -568953,15 +568953,15 @@ │ │ b.n 21fef2a │ │ pop {r4, r5, r7, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (21fef48 ) │ │ add r0, pc │ │ bl 2093da8 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x140> │ │ - lsrs r3, r1, #29 │ │ + lsrs r0, r7, #29 │ │ Address 0x21fef4a is out of bounds. │ │ │ │ │ │ 021fef4c const&, std::__ndk1::shared_ptr const&, std::__ndk1::shared_ptr const&, std::__ndk1::shared_ptr const&, FrameTree*)@@Base>: │ │ push {r7, lr} │ │ mov r7, sp │ │ ldrd lr, ip, [r7, #16] │ │ @@ -569537,15 +569537,15 @@ │ │ beq.n 21ff51a │ │ ldr r0, [sp, #16] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ strh r2, [r0, #26] │ │ lsls r3, r2, #1 │ │ - str r3, [r4, #96] @ 0x60 │ │ + str r0, [r2, #100] @ 0x64 │ │ mcr2 2, 0, r8, cr4, cr6, {5} │ │ lsls r3, r2, #1 │ │ strh r6, [r1, #12] │ │ lsls r3, r2, #1 │ │ │ │ 021ff530 : │ │ push {r4, r6, r7, lr} │ │ @@ -572816,15 +572816,15 @@ │ │ add r0, pc │ │ bl 2093da8 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x140> │ │ nop │ │ ldrsh r0, [r3, r0] │ │ lsls r3, r2, #1 │ │ ldrb r6, [r3, r7] │ │ lsls r3, r2, #1 │ │ - ldmia r2, {r0, r1, r2} │ │ + ldmia r2, {r2, r4, r5} │ │ Address 0x22018a2 is out of bounds. │ │ │ │ │ │ 022018a4 , std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >&, std::__ndk1::basic_string_view >, celestia::util::array_view, bool) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -573252,15 +573252,15 @@ │ │ lsls r3, r2, #1 │ │ ldrh r0, [r3, r1] │ │ lsls r3, r2, #1 │ │ ldr r0, [r1, r5] │ │ lsls r3, r2, #1 │ │ ldr r4, [r5, r6] │ │ lsls r3, r2, #1 │ │ - stmia r5!, {r0, r3, r5, r6, r7} │ │ + stmia r6!, {r1, r2, r4} │ │ mcr2 4, 0, sp, cr2, cr4, {6} │ │ bmi.n 2201c8a , std::__ndk1::allocator >, std::__ndk1::allocator, std::__ndk1::allocator > > >&, std::__ndk1::basic_string_view >, celestia::util::array_view, bool) const@@Base+0x172> │ │ │ │ 02201ce0 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ vpush {d8-d10} │ │ @@ -574299,15 +574299,15 @@ │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ bmi.n 2202976 (Eigen::ParametrizedLine const&, celestia::math::Ellipsoid const&, double&)@@Base+0xa9e> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (22029d8 (Eigen::ParametrizedLine const&, celestia::math::Ellipsoid const&, double&)@@Base+0xb00>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bmi.n 2202952 (Eigen::ParametrizedLine const&, celestia::math::Ellipsoid const&, double&)@@Base+0xa7a> │ │ + bmi.n 22029ac (Eigen::ParametrizedLine const&, celestia::math::Ellipsoid const&, double&)@@Base+0xad4> │ │ Address 0x22029da is out of bounds. │ │ │ │ │ │ 022029dc *& std::__ndk1::__tree > >, std::__ndk1::__map_value_compare > >, std::__ndk1::less, true>, std::__ndk1::allocator > > > >::__find_equal(std::__ndk1::__tree_const_iterator > >, std::__ndk1::__tree_node > >, void*>*, int>, std::__ndk1::__tree_end_node*>*&, std::__ndk1::__tree_node_base*&, unsigned int const&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -574654,15 +574654,15 @@ │ │ ldr r1, [r4, #8] │ │ b.n 2202d38 >::__emplace_back_slow_path(Selection const&)@@Base+0x254> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2202d64 >::__emplace_back_slow_path(Selection const&)@@Base+0x280>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - bne.n 2202dc6 │ │ + bne.n 2202e20 │ │ mcr2 5, 0, fp, cr3, cr0, {7} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ mov r4, r0 │ │ ldrb r0, [r0, #12] │ │ cbz r0, 2202d7e >::__emplace_back_slow_path(Selection const&)@@Base+0x29a> │ │ mov r0, r4 │ │ @@ -574950,18 +574950,18 @@ │ │ itttt eq │ │ moveq r0, r4 │ │ addeq sp, #8 │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ - str r0, [r5, r7] │ │ + strh r5, [r2, r0] │ │ mcr2 6, 0, r4, cr3, cr14, {1} │ │ lsls r3, r2, #1 │ │ - subs r7, #42 @ 0x2a │ │ + subs r7, #87 @ 0x57 │ │ @ instruction: 0xfe024acc │ │ lsls r3, r2, #1 │ │ ble.n 2202f78 │ │ cdp2 5, 0, cr4, cr9, cr10, {6} │ │ lsls r3, r2, #1 │ │ │ │ 02203024 : │ │ @@ -575196,19 +575196,19 @@ │ │ vpopeq {d8} │ │ addeq sp, #4 │ │ itt eq │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ - adds r4, #50 @ 0x32 │ │ + adds r4, #95 @ 0x5f │ │ mcr2 4, 0, r4, cr1, cr0, {0} │ │ lsls r3, r2, #1 │ │ - subs r4, #244 @ 0xf4 │ │ - vdot.bf16 d13, d2, d0[1] │ │ + subs r5, #33 @ 0x21 │ │ + vdot.bf16 , q1, d13[0] │ │ vcmla.f16 q2, , d12[1], #0 │ │ lsls r3, r2, #1 │ │ blt.n 2203324 │ │ cdp2 3, 0, cr4, cr9, cr10, {3} │ │ lsls r3, r2, #1 │ │ │ │ 02203290 : │ │ @@ -575587,16 +575587,16 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ lsrs r6, r2 │ │ lsls r3, r2, #1 │ │ bx r9 │ │ lsls r3, r2, #1 │ │ - strb r0, [r2, r2] │ │ - cdp2 4, 0, cr5, cr3, cr8, {3} │ │ + strb r5, [r7, r2] │ │ + mcr2 4, 0, r5, cr3, cr5, {4} │ │ cdp2 15, 0, cr3, cr3, cr6, {6} │ │ lsls r3, r2, #1 │ │ │ │ 0220366c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -575960,15 +575960,15 @@ │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ add r0, sp, #128 @ 0x80 │ │ bl 207d398 │ │ b.n 2203a9e │ │ nop │ │ - ldr r0, [sp, #908] @ 0x38c │ │ + ldr r1, [sp, #64] @ 0x40 │ │ vcmla.f16 d10, d2, d13[0], #0 │ │ bl 22040c0 >, unsigned int, unsigned int, unsigned int)@@Base+0xcc> │ │ b.n 2203a9e │ │ b.n 2203ab0 │ │ b.n 2203a6e │ │ ldrb.w r0, [sp, #112] @ 0x70 │ │ lsls r0, r0, #31 │ │ @@ -576006,15 +576006,15 @@ │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ subs r7, #56 @ 0x38 │ │ lsls r3, r2, #1 │ │ subs r3, #140 @ 0x8c │ │ lsls r3, r2, #1 │ │ - bcc.n 2203afa │ │ + bcc.n 2203b54 │ │ Address 0x2203ace is out of bounds. │ │ │ │ │ │ 02203ad0 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -576502,17 +576502,17 @@ │ │ lsls r0, r0, #31 │ │ beq.n 2203f9c │ │ ldr r0, [sp, #72] @ 0x48 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ subs r0, #168 @ 0xa8 │ │ lsls r3, r2, #1 │ │ - add r7, sp, #984 @ 0x3d8 │ │ - mcr2 1, 0, r9, cr1, cr15, {6} │ │ - cdp2 1, 0, cr9, cr2, cr13, {6} │ │ + add sp, #140 @ 0x8c │ │ + cdp2 2, 0, cr9, cr1, cr12, {0} │ │ + mcr2 1, 0, r9, cr2, cr10, {7} │ │ mcr2 6, 0, r3, cr2, cr6, {6} │ │ lsls r3, r2, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldrb r0, [r1, #0] │ │ mov r5, r2 │ │ @@ -577002,18 +577002,18 @@ │ │ itt ne │ │ ldrne r0, [sp, #80] @ 0x50 │ │ blxne 26ffad0 │ │ b.n 22044ec │ │ b.n 22044ec │ │ b.n 22044fc │ │ nop │ │ - @ instruction: 0xeac0fe01 │ │ + @ instruction: 0xeaedfe01 │ │ adds r4, #178 @ 0xb2 │ │ lsls r3, r2, #1 │ │ - @ instruction: 0xeab0fe01 │ │ + @ instruction: 0xeaddfe01 │ │ ldrb.w r0, [sp, #84] @ 0x54 │ │ lsls r0, r0, #31 │ │ itt ne │ │ ldrne r0, [sp, #92] @ 0x5c │ │ blxne 26ffad0 │ │ b.n 22044fc │ │ ldrb.w r0, [sp, #288] @ 0x120 │ │ @@ -577048,27 +577048,27 @@ │ │ eors r0, r2 │ │ adds r4, #184 @ 0xb8 │ │ lsls r3, r2, #1 │ │ adds r3, #216 @ 0xd8 │ │ lsls r3, r2, #1 │ │ adds r3, #106 @ 0x6a │ │ lsls r3, r2, #1 │ │ - add r0, sp, #408 @ 0x198 │ │ - mcr2 5, 0, r4, cr3, cr12, {7} │ │ - mcr2 5, 0, r4, cr3, cr0, {7} │ │ - mcr2 12, 0, r8, cr3, cr15, {7} │ │ - vdot.bf16 d2, d2, d10[0] │ │ + add r0, sp, #588 @ 0x24c │ │ + cdp2 6, 0, cr4, cr3, cr9, {1} │ │ + mcr2 6, 0, r4, cr3, cr13, {0} │ │ + vdot.bf16 d8, d3, d12[1] │ │ + mcr2 13, 0, r2, cr2, cr7, {1} │ │ cdp2 7, 0, cr14, cr1, cr14, {6} │ │ - mcr2 4, 0, ip, cr0, cr14, {7} │ │ - mcr2 3, 0, r4, cr3, cr6, {4} │ │ - mcr2 10, 0, r8, cr4, cr14, {7} @ │ │ + cdp2 5, 0, cr12, cr0, cr11, {1} │ │ + cdp2 3, 0, cr4, cr3, cr3, {6} │ │ + vseleq.f64 d8, d4, d27 │ │ mcr2 5, 0, lr, cr2, cr12, {7} │ │ - cdp2 12, 0, cr8, cr0, cr5, {2} │ │ - mcr2 10, 0, sl, cr2, cr6, {0} @ │ │ - vdot.bf16 d1, d18, d9[0] │ │ + mcr2 12, 0, r8, cr0, cr2, {3} │ │ + @ instruction: 0xfe02aa43 │ │ + mcr2 13, 0, r1, cr2, cr6, {5} │ │ mcr2 9, 0, fp, cr4, cr4, {3} @ │ │ Address 0x220458a is out of bounds. │ │ │ │ │ │ 0220458c : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ @@ -578548,15 +578548,15 @@ │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ add r0, sp, #100 @ 0x64 │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ movs r3, #130 @ 0x82 │ │ lsls r3, r2, #1 │ │ - bl 25fe2cc │ │ + bl 1e2b2cc │ │ movs r2, #160 @ 0xa0 │ │ lsls r3, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ str r2, [sp, #8] │ │ @@ -578834,15 +578834,15 @@ │ │ bl 22059ac (char const*, unsigned int const&) const@@Base+0x214> │ │ bmi.n 2205956 (char const*, unsigned int const&) const@@Base+0x1be> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (22059b8 (char const*, unsigned int const&) const@@Base+0x220>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - add r4, pc, #876 @ (adr r4, 2205d28 ) │ │ + add r5, pc, #32 @ (adr r5, 22059dc ) │ │ Address 0x22059ba is out of bounds. │ │ │ │ │ │ 022059bc : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -579147,22 +579147,22 @@ │ │ mov r0, r6 │ │ blx 26ffad0 │ │ b.n 2205b00 │ │ beq.n 2205c40 │ │ @ instruction: 0xfe001be6 │ │ lsls r3, r2, #1 │ │ beq.n 2205c28 │ │ - mcr2 5, 0, r5, cr0, cr13, {3} │ │ + cdp2 5, 0, cr5, cr0, cr10, {5} │ │ mcr2 11, 0, r1, cr1, cr6, {2} @ │ │ lsls r3, r2, #1 │ │ - strb r5, [r5, r5] │ │ - mcr2 4, 0, fp, cr1, cr6, {2} │ │ + strb r2, [r3, r6] │ │ + cdp2 4, 0, cr11, cr1, cr3, {4} │ │ mcr2 11, 0, r1, cr1, cr8, {0} @ │ │ lsls r3, r2, #1 │ │ - push {r1, r2, r6} │ │ + push {r0, r1, r4, r5, r6} │ │ mcr2 10, 0, r1, cr1, cr8, {7} @ │ │ lsls r3, r2, #1 │ │ movs r3, #4 │ │ cmp r6, #4 │ │ it ls │ │ movls r6, r3 │ │ strd r4, r9, [sp] │ │ @@ -579322,25 +579322,25 @@ │ │ add r0, sp, #164 @ 0xa4 │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ subs r2, r5, r7 │ │ lsls r3, r2, #1 │ │ subs r2, r1, r2 │ │ lsls r3, r2, #1 │ │ - asrs r2, r3, #23 │ │ - cdp2 2, 0, cr5, cr1, cr8, {0} │ │ + asrs r7, r0, #24 │ │ + mcr2 2, 0, r5, cr1, cr5, {1} │ │ mcr2 7, 0, r1, cr1, cr14, {5} │ │ lsls r3, r2, #1 │ │ - str r0, [r7, r7] │ │ - mcr2 11, 0, r0, cr1, cr2, {1} @ │ │ - mcr2 11, 0, r0, cr3, cr14, {0} @ │ │ + strh r5, [r4, r0] │ │ + mcr2 11, 0, r0, cr1, cr15, {2} @ │ │ + @ instruction: 0xfe030b4b │ │ cdp2 14, 0, cr1, cr3, cr6, {4} │ │ lsls r3, r2, #1 │ │ - ldmia r0!, {r2, r3, r4, r6} │ │ - cdp2 6, 0, cr6, cr3, cr1, {2} │ │ + ldmia r0, {r0, r3, r7} │ │ + cdp2 6, 0, cr6, cr3, cr14, {3} │ │ Address 0x2205ed2 is out of bounds. │ │ │ │ │ │ 02205ed4 (char const*, unsigned int const&) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -580949,18 +580949,18 @@ │ │ ittt eq │ │ addeq sp, #32 │ │ ldmiaeq.w sp!, {r8, r9, sl} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ lsls r0, r6, #28 │ │ lsls r3, r2, #1 │ │ - strh r3, [r1, #8] │ │ + strh r0, [r7, #8] │ │ mcr2 7, 0, r0, cr1, cr8, {1} │ │ lsls r3, r2, #1 │ │ - add r0, pc, #284 @ (adr r0, 22070a4 ) │ │ + add r0, pc, #464 @ (adr r0, 2207158 ) │ │ mcr2 6, 0, r0, cr1, cr2, {6} │ │ lsls r3, r2, #1 │ │ lsls r2, r3, #25 │ │ lsls r3, r2, #1 │ │ │ │ 02206f90 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -581078,15 +581078,15 @@ │ │ blx 26ffae0 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ lsls r6, r3, #24 │ │ lsls r3, r2, #1 │ │ - str r5, [sp, #232] @ 0xe8 │ │ + str r5, [sp, #412] @ 0x19c │ │ mcr2 0, 0, r0, cr2, cr5, {7} │ │ movs r0, r0 │ │ lsls r0, r5, #20 │ │ lsls r3, r2, #1 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r4, [r0, #0] │ │ @@ -581290,18 +581290,18 @@ │ │ itt ne │ │ movne r0, r4 │ │ blxne 2701530 │ │ blx 26ffaf0 │ │ nop │ │ lsls r6, r1, #19 │ │ lsls r3, r2, #1 │ │ - adds r7, #125 @ 0x7d │ │ + adds r7, #170 @ 0xaa │ │ cdp2 3, 0, cr0, cr1, cr4, {3} │ │ lsls r3, r2, #1 │ │ - bne.n 22072a0 │ │ + bcs.n 22072fa │ │ cdp2 3, 0, cr0, cr3, cr0, {0} │ │ lsls r3, r2, #1 │ │ │ │ 022072fc : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -581550,25 +581550,25 @@ │ │ mov r0, r5 │ │ b.n 22073d2 │ │ mov r0, r5 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ lsls r2, r6, #10 │ │ lsls r3, r2, #1 │ │ - str r1, [sp, #832] @ 0x340 │ │ - vfmal.f16 d3, s5, s0[0] │ │ + str r1, [sp, #1012] @ 0x3f4 │ │ + vfmal.f16 d3, s5, s11[1] │ │ cdp2 2, 0, cr0, cr3, cr4, {2} │ │ lsls r3, r2, #1 │ │ - cmp r4, #23 │ │ + cmp r4, #68 @ 0x44 │ │ mcr2 2, 0, r0, cr4, cr0, {4} │ │ lsls r3, r2, #1 │ │ - ldr r0, [sp, #240] @ 0xf0 │ │ + ldr r0, [sp, #420] @ 0x1a4 │ │ vcmla.f16 q0, q1, d8[0], #0 │ │ lsls r3, r2, #1 │ │ - sadd16 lr, sl, r1 │ │ + ssub8 lr, r7, r1 │ │ lsls r1, r7, #4 │ │ movs r0, r0 │ │ ldr r1, [sp, #648] @ 0x288 │ │ cdp2 1, 0, cr0, cr9, cr6, {7} │ │ lsls r3, r2, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ @@ -581615,15 +581615,15 @@ │ │ cmp r1, r0 │ │ itt eq │ │ addeq sp, #32 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ movs r0, r2 │ │ lsls r3, r2, #1 │ │ - cmp r1, #179 @ 0xb3 │ │ + cmp r1, #224 @ 0xe0 │ │ mcr2 15, 0, pc, cr4, cr14, {5} @ │ │ lsls r2, r2, #1 │ │ │ │ 0220761c : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -581966,26 +581966,26 @@ │ │ cmp r0, #0 │ │ itt ne │ │ ldrne r0, [sp, #44] @ 0x2c │ │ blxne 2701530 │ │ blx 26ffaf0 │ │ nop │ │ vqadd.u8 q8, q1, q1 │ │ - adds r2, #33 @ 0x21 │ │ - mcr2 12, 0, ip, cr1, cr2, {0} │ │ + adds r2, #78 @ 0x4e │ │ + mcr2 12, 0, ip, cr1, cr15, {1} │ │ vdot.bf16 d15, d19, d2[0] │ │ lsls r2, r2, #1 │ │ - str r4, [sp, #496] @ 0x1f0 │ │ + str r4, [sp, #676] @ 0x2a4 │ │ mcr2 2, 0, fp, cr2, cr4, {1} │ │ cdp2 2, 0, cr11, cr0, cr8, {1} │ │ - mcr2 10, 0, r4, cr0, cr8, {2} @ │ │ - @ instruction: 0xfe044a4c │ │ + vseleq.f32 s8, s1, s10 │ │ + mcr2 10, 0, r4, cr4, cr9, {3} @ │ │ mcr2 4, 0, r0, cr4, cr2, {3} │ │ lsls r3, r2, #1 │ │ - ldmia r6, {r0, r1, r4, r6} │ │ + ldmia r6!, {r7} │ │ mcr2 13, 0, pc, cr2, cr10, {6} @ │ │ lsls r2, r2, #1 │ │ lsls r3, r2, #3 │ │ movs r0, r0 │ │ mcrr2 0, 5, r0, r0, cr2 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ @@ -583147,15 +583147,15 @@ │ │ bl 22085b4 >::__push_back_slow_path(M3DMeshMaterialGroup&&)@@Base+0x142> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (22085c0 >::__push_back_slow_path(M3DMeshMaterialGroup&&)@@Base+0x14e>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - ldrb r3, [r2, #3] │ │ + ldrb r0, [r0, #4] │ │ Address 0x22085c2 is out of bounds. │ │ │ │ │ │ 022085c4 >::__push_back_slow_path(M3DTriangleMesh&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -583307,15 +583307,15 @@ │ │ mov r0, r4 │ │ pop {r4, r5, r7, pc} │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (220878c >::__push_back_slow_path(M3DTriangleMesh&&)@@Base+0x1c8>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strb r7, [r0, #28] │ │ + strb r4, [r6, #28] │ │ mcr2 5, 0, fp, cr3, cr0, {7} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ ldrd lr, ip, [r7, #12] │ │ ldr r1, [r7, #20] │ │ cmp r3, lr │ │ beq.n 2208854 >::__push_back_slow_path(M3DTriangleMesh&&)@@Base+0x290> │ │ @@ -583506,15 +583506,15 @@ │ │ bl 22089c4 >::__push_back_slow_path(M3DModel&&)@@Base+0x166> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (22089d0 >::__push_back_slow_path(M3DModel&&)@@Base+0x172>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strb r3, [r0, #19] │ │ + strb r0, [r6, #19] │ │ Address 0x22089d2 is out of bounds. │ │ │ │ │ │ 022089d4 >::__push_back_slow_path(M3DMaterial&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -583635,15 +583635,15 @@ │ │ bl 2208b54 >::__push_back_slow_path(M3DMaterial&&)@@Base+0x180> │ │ bl 20884e4 >::~basic_teestream()@@Base+0xf0> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2208b60 >::__push_back_slow_path(M3DMaterial&&)@@Base+0x18c>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - strb r3, [r6, #12] │ │ + strb r0, [r4, #13] │ │ Address 0x2208b62 is out of bounds. │ │ │ │ │ │ 02208b64 >&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -583769,17 +583769,17 @@ │ │ add r0, sp, #24 │ │ str r6, [sp, #24] │ │ bl 21a6d30 ::InfoType>::construct[abi:ne180000]::InfoType, TextureInfo const&>(ResourceManager::InfoType*, TextureInfo const&)@@Base+0x38c> │ │ mov r0, r6 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ orr.w r0, r6, r2, lsr #1 │ │ - bge.n 2208c2c >&)@@Base+0xc8> │ │ - mcr2 3, 0, r6, cr2, cr13, {2} │ │ - vfmal.f16 d11, s3, s11[0] │ │ + bge.n 2208c86 >&)@@Base+0x122> │ │ + cdp2 3, 0, cr6, cr2, cr10, {4} │ │ + vcmla.f16 , , d2[1], #0 │ │ mcr2 2, 0, r0, cr3, cr5, {4} │ │ movs r0, r0 │ │ ldrd r0, r0, [r0, #-328]! @ 0x148 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ @@ -583960,21 +583960,21 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ movs r0, #1 │ │ b.n 2208e62 >&)@@Base+0x2fe> │ │ strd r0, r0, [r2], #328 @ 0x148 │ │ lsrs r7, r7, #3 │ │ movs r0, r0 │ │ - b.n 22087d0 >::__push_back_slow_path(M3DTriangleMesh&&)@@Base+0x20c> │ │ - vfmal.f16 , d16, d7[1] │ │ - cdp2 1, 0, cr14, cr3, cr13, {1} │ │ - cdp2 15, 0, cr5, cr1, cr5, {4} │ │ - mcr2 0, 0, lr, cr2, cr14, {7} │ │ + b.n 220882a >::__push_back_slow_path(M3DTriangleMesh&&)@@Base+0x266> │ │ + vseleq.f16 s30, s0, s24 │ │ + mcr2 1, 0, lr, cr3, cr10, {2} │ │ + mcr2 15, 0, r5, cr1, cr2, {5} │ │ + cdp2 1, 0, cr14, cr2, cr11, {1} │ │ mcr2 2, 0, r5, cr1, cr7, {1} │ │ - vcmla.f16 , q2, d1[1], #0 │ │ + vcmla.f16 d15, d20, d14[0], #0 │ │ mcr2 7, 0, lr, cr3, cr6, {2} │ │ lsls r2, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ sub sp, #32 │ │ mov r4, r3 │ │ @@ -584031,15 +584031,15 @@ │ │ beq.w 2209064 │ │ b.n 2208f10 >&)@@Base+0x3ac> │ │ nop │ │ b.n 2208d44 >&)@@Base+0x1e0> │ │ lsls r2, r2, #1 │ │ b.n 2208c84 >&)@@Base+0x120> │ │ lsls r2, r2, #1 │ │ - ldr r1, [sp, #476] @ 0x1dc │ │ + ldr r1, [sp, #656] @ 0x290 │ │ cdp2 2, 0, cr0, cr2, cr1, {2} │ │ movs r0, r0 │ │ b.n 2208cc4 >&)@@Base+0x160> │ │ lsls r2, r2, #1 │ │ │ │ 02208f48 : │ │ push {r4, r5, r6, r7, lr} │ │ @@ -584141,18 +584141,18 @@ │ │ bl 21a6cac ::InfoType>::construct[abi:ne180000]::InfoType, TextureInfo const&>(ResourceManager::InfoType*, TextureInfo const&)@@Base+0x308> │ │ b.n 2209042 │ │ add r0, sp, #20 │ │ blx 26ffe10 │ │ blx 26ffaf0 │ │ b.n 2208d14 >&)@@Base+0x1b0> │ │ lsls r2, r2, #1 │ │ - subs r1, #254 @ 0xfe │ │ + subs r2, #43 @ 0x2b │ │ mcr2 6, 0, lr, cr3, cr12, {2} │ │ lsls r2, r2, #1 │ │ - subs r1, #238 @ 0xee │ │ + subs r2, #27 │ │ mcr2 6, 0, lr, cr3, cr0, {0} │ │ lsls r2, r2, #1 │ │ b.n 2208bac >&)@@Base+0x48> │ │ lsls r2, r2, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #48 @ 0x30 │ │ @@ -584226,18 +584226,18 @@ │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ b.n 2208bbc >&)@@Base+0x58> │ │ lsls r2, r2, #1 │ │ lsls r3, r3, #21 │ │ movs r0, r0 │ │ - push {r0, r2, r3} │ │ + push {r1, r3, r4, r5} │ │ cdp2 5, 0, cr0, cr3, cr5, {0} │ │ movs r0, r0 │ │ - subs r6, #220 @ 0xdc │ │ + subs r7, #9 │ │ mcr2 4, 0, lr, cr2, cr2, {5} │ │ lsls r2, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ vpush {d8-d9} │ │ @@ -584583,15 +584583,15 @@ │ │ movs r3, #17 │ │ strd r3, r1, [sp] │ │ add r3, sp, #80 @ 0x50 │ │ strd r3, r1, [sp, #8] │ │ movs r3, #63 @ 0x3f │ │ blx 26ffdf0 │ │ b.n 2209510 │ │ - push {r2, r5, r6, r7} │ │ + push {r0, r4, lr} │ │ vfmal.f16 d10, s4, s8[0] │ │ blx 27088b0 │ │ blx 26ffdc0 │ │ ldr r1, [r0, #8] │ │ cmp r1, #4 │ │ blt.n 2209510 │ │ ldr r2, [pc, #220] @ (22095d8 ) │ │ @@ -584661,34 +584661,34 @@ │ │ blx 26ffaf0 │ │ ldr r0, [sp, #64] @ 0x40 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ b.n 2208e74 >&)@@Base+0x310> │ │ lsls r2, r2, #1 │ │ - bl 24671ba │ │ - bge.n 220950a │ │ + bl 24941ba │ │ + bge.n 2209564 │ │ cdp2 3, 0, cr0, cr1, cr3, {5} │ │ movs r0, r0 │ │ - svc 74 @ 0x4a │ │ + svc 119 @ 0x77 │ │ mcr2 1, 0, r0, cr0, cr9, {3} │ │ movs r0, r0 │ │ - ldr r1, [r6, r3] │ │ - mcr2 10, 0, sp, cr2, cr0, {3} @ │ │ + ldr r6, [r3, r4] │ │ + mcr2 10, 0, sp, cr2, cr13, {4} @ │ │ vseleq.f64 d4, d17, d21 │ │ cdp2 14, 0, cr4, cr4, cr5, {0} │ │ mcr2 7, 0, r0, cr4, cr9, {2} │ │ movs r0, r0 │ │ - bl 23c31e2 │ │ + bl 23f01e2 │ │ b.n 22096b0 │ │ lsls r2, r2, #1 │ │ - ldmia r5, {r0, r2, r3, r5, r7} │ │ + ldmia r5!, {r1, r3, r4, r6, r7} │ │ cdp2 4, 0, cr1, cr3, cr11, {5} │ │ movs r0, r0 │ │ - uxtb r4, r6 │ │ + cbz r1, 2209634 │ │ cdp2 1, 0, cr14, cr2, cr6, {7} │ │ lsls r2, r2, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #40 @ 0x28 │ │ ldr r1, [pc, #68] @ (220963c ) │ │ movs r3, #2 │ │ @@ -584718,15 +584718,15 @@ │ │ itt eq │ │ addeq sp, #40 @ 0x28 │ │ popeq {r7, pc} │ │ blx 26ffae0 │ │ nop │ │ svc 190 @ 0xbe │ │ lsls r2, r2, #1 │ │ - bl 1e27248 │ │ + bl 1e54248 │ │ svc 148 @ 0x94 │ │ lsls r2, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #32 │ │ mov r6, r0 │ │ @@ -584808,15 +584808,15 @@ │ │ addeq sp, #32 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ svc 100 @ 0x64 │ │ lsls r2, r2, #1 │ │ - add sp, #24 │ │ + add sp, #204 @ 0xcc │ │ cdp2 14, 0, cr13, cr2, cr8, {6} │ │ lsls r2, r2, #1 │ │ │ │ 02209718 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldr r5, [r0, #12] │ │ @@ -584928,17 +584928,17 @@ │ │ cmp r2, r1 │ │ itt eq │ │ addeq sp, #32 │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ udf #92 @ 0x5c │ │ lsls r2, r2, #1 │ │ - lsls.w lr, sp, r0 │ │ + asr.w lr, sl, r0 │ │ str r7, [r4, #84] @ 0x54 │ │ - vfmal.f16 d1, s9, s6[0] │ │ + vcmla.f16 , q10, d0[0], #0 │ │ vdot.bf16 d13, d17, d10[1] │ │ lsls r2, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ mov r6, r0 │ │ @@ -585118,21 +585118,21 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ movs r0, #1 │ │ b.n 22099d2 │ │ ble.n 2209ad8 │ │ lsls r2, r2, #1 │ │ stc2 15, cr15, [pc, #1020] @ 2209df4 │ │ - bls.n 2209a60 │ │ - vdot.bf16 q7, q0, d15[1] │ │ - mcr2 5, 0, sp, cr3, cr13, {5} │ │ - mcr2 4, 0, r5, cr1, cr5, {0} │ │ - cdp2 5, 0, cr13, cr2, cr14, {4} │ │ + bls.n 2209aba │ │ + mcr2 13, 0, lr, cr0, cr12, {4} │ │ + cdp2 5, 0, cr13, cr3, cr10, {7} │ │ + cdp2 4, 0, cr5, cr1, cr2, {2} │ │ + mcr2 5, 0, sp, cr2, cr11, {5} │ │ cdp2 6, 0, cr4, cr1, cr7, {6} │ │ - mcr2 12, 0, lr, cr4, cr1, {7} │ │ + mcr2 13, 0, lr, cr4, cr14, {0} │ │ @ instruction: 0xfe03dbe6 │ │ lsls r2, r2, #1 │ │ bmi.n 22099c4 │ │ bmi.n 22099c6 │ │ bmi.n 22099c8 │ │ bmi.n 22099ca │ │ push {r4, r5, r6, r7, lr} │ │ @@ -585479,28 +585479,28 @@ │ │ vstr s0, [sp, #108] @ 0x6c │ │ blx 270a420 │ │ add.w sl, sl, #1 │ │ cmp r6, sl │ │ bne.n 2209d58 │ │ ldr r0, [sp, #20] │ │ b.n 2209e58 │ │ - asrs r5, r4, #17 │ │ - cdp2 12, 0, cr10, cr2, cr13, {1} │ │ - mcr2 4, 0, r0, cr2, cr4, {6} │ │ - cdp2 1, 0, cr7, cr4, cr5, {2} │ │ + asrs r2, r2, #18 │ │ + mcr2 12, 0, sl, cr2, cr10, {2} │ │ + cdp2 5, 0, cr0, cr2, cr1, {0} │ │ + mcr2 1, 0, r7, cr4, cr2, {3} │ │ cdp2 15, 0, cr8, cr2, cr0, {7} │ │ - cdp2 6, 0, cr11, cr0, cr13, {4} │ │ - cdp2 6, 0, cr15, cr1, cr2, {7} │ │ - mcr2 4, 0, r0, cr0, cr7, {3} │ │ - cdp2 14, 0, cr4, cr4, cr5, {4} │ │ - mcr2 1, 0, r5, cr3, cr12, {2} │ │ - cdp2 15, 0, cr8, cr2, cr0, {6} │ │ - mcr2 11, 0, r8, cr1, cr12, {5} @ │ │ - vdot.bf16 q7, q1, d14[0] │ │ - cdp2 2, 0, cr0, cr2, cr12, {5} │ │ + mcr2 6, 0, fp, cr0, cr10, {5} │ │ + cdp2 7, 0, cr15, cr1, cr15, {0} │ │ + cdp2 4, 0, cr0, cr0, cr4, {5} │ │ + mcr2 14, 0, r4, cr4, cr2, {5} │ │ + cdp2 1, 0, cr5, cr3, cr9, {4} │ │ + cdp2 15, 0, cr8, cr2, cr13, {7} │ │ + @ instruction: 0xfe018be9 │ │ + mcr2 13, 0, lr, cr2, cr11, {3} │ │ + mcr2 2, 0, r0, cr2, cr9, {6} │ │ cdp2 0, 0, cr9, cr4, cr4, {0} │ │ cbz r6, 2209e56 │ │ add.w r8, sp, #32 │ │ mov.w r9, #0 │ │ add.w sl, r8, #4 │ │ add.w r0, r8, #8 │ │ str r0, [sp, #20] │ │ @@ -585816,22 +585816,22 @@ │ │ b.n 2209e5a │ │ nop │ │ ... │ │ movs r0, r0 │ │ subs r7, #128 @ 0x80 │ │ blt.n 220a048 │ │ lsls r2, r2, #1 │ │ - cmp r5, #140 @ 0x8c │ │ - mcr2 12, 0, r0, cr1, cr4, {6} │ │ - mcr2 9, 0, sl, cr3, cr12, {6} @ │ │ + cmp r5, #185 @ 0xb9 │ │ + vdot.bf16 d0, d1, d1[0] │ │ + vseleq.f32 s20, s6, s18 │ │ cdp2 2, 0, cr0, cr0, cr13, {4} │ │ movs r0, r0 │ │ bmi.n 220a14c │ │ lsls r2, r2, #1 │ │ - ldmia r6!, {r0, r1, r2, r3, r7} │ │ + ldmia r6!, {r2, r3, r4, r5, r7} │ │ mcr2 10, 0, sp, cr1, cr14, {0} @ │ │ lsls r2, r2, #1 │ │ │ │ 0220a160 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ @@ -586229,38 +586229,37 @@ │ │ addeq sp, #92 @ 0x5c │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r0, [sp, #16] │ │ bl 210b1dc │ │ nop │ │ - ittee mi │ │ - mcr2mi 6, 0, pc, cr3, cr13, {3} @ │ │ - vrev64mi. d14, d3 │ │ - bpl.n 220a576 @ unpredictable branch in IT block │ │ - │ │ - bpl.n 220a576 │ │ + ite vc │ │ + mcr2vc 6, 0, pc, cr3, cr13, {3} @ │ │ + vrev64vs. d14, d3 │ │ + b.n 220a576 │ │ + b.n 220a576 │ │ b.n 220a576 │ │ b.n 220a576 │ │ add r0, sp, #48 @ 0x30 │ │ blx 270a550 │ │ blx 26ffaf0 │ │ bmi.n 220a5cc │ │ lsls r2, r2, #1 │ │ - ldmia r7, {r0, r1, r3, r4, r7} │ │ - cdp2 15, 0, cr12, cr0, cr13, {4} │ │ - cdp2 0, 0, cr2, cr0, cr11, {1} │ │ - mcr2 0, 0, r2, cr4, cr15, {0} │ │ - mcr2 4, 0, r6, cr4, cr9, {4} │ │ - cdp2 4, 0, cr6, cr3, cr11, {4} │ │ - cdp2 15, 0, cr1, cr3, cr13, {7} │ │ - mcr2 15, 0, r1, cr4, cr11, {6} │ │ + ldmia r7, {r3, r6, r7} │ │ + mcr2 15, 0, ip, cr0, cr10, {5} │ │ + mcr2 0, 0, r2, cr0, cr8, {2} │ │ + cdp2 0, 0, cr2, cr4, cr12, {2} │ │ + cdp2 4, 0, cr6, cr4, cr6, {6} │ │ + mcr2 4, 0, r6, cr3, cr8, {5} │ │ + mcr2 0, 0, r2, cr3, cr10, {0} │ │ + cdp2 0, 0, cr2, cr4, cr8, {0} │ │ mcr2 14, 0, r3, cr4, cr14, {3} │ │ - mcr2 12, 0, r4, cr4, cr3, {5} │ │ - mcr2 9, 0, r6, cr1, cr7, {7} @ │ │ + cdp2 12, 0, cr4, cr4, cr0, {7} │ │ + vseleq.f32 s12, s2, s9 │ │ mcr2 0, 0, sp, cr2, cr8, {3} │ │ lsls r2, r2, #1 │ │ bcc.n 220a5f8 │ │ lsls r2, r2, #1 │ │ │ │ 0220a5b8 : │ │ push {r4, r5, r7, lr} │ │ @@ -586485,21 +586484,21 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ movs r0, #1 │ │ b.n 220a7be │ │ ldmia r7, {r1, r2, r7} │ │ lsls r2, r2, #1 │ │ @ instruction: 0xefa3ffff │ │ - ldmia r3!, {r1, r2, r6} │ │ - cdp2 15, 0, cr13, cr0, cr3, {4} │ │ - mcr2 7, 0, ip, cr3, cr1, {6} │ │ - cdp2 6, 0, cr4, cr1, cr9, {1} │ │ - cdp2 7, 0, cr12, cr2, cr2, {5} │ │ + ldmia r3!, {r0, r1, r4, r5, r6} │ │ + mcr2 15, 0, sp, cr0, cr0, {5} │ │ + mcr2 7, 0, ip, cr3, cr14, {7} │ │ + mcr2 6, 0, r4, cr1, cr6, {2} │ │ + cdp2 7, 0, cr12, cr2, cr15, {6} │ │ vfmal.f16 , d17, d3[1] │ │ - cdp2 15, 0, cr13, cr4, cr5, {0} │ │ + mcr2 15, 0, sp, cr4, cr2, {1} │ │ mcr2 13, 0, ip, cr3, cr10, {7} │ │ lsls r2, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #40 @ 0x28 │ │ mov r5, r0 │ │ @@ -586766,24 +586765,24 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ movs r0, r0 │ │ stmia r2!, {r3, r6, r7} │ │ ldmia r5, {r1, r2, r5, r7} │ │ lsls r2, r2, #1 │ │ - ldr r6, [sp, #364] @ 0x16c │ │ - cdp2 4, 0, cr2, cr2, cr14, {5} │ │ - mcr2 7, 0, r4, cr1, cr3, {1} │ │ + ldr r6, [sp, #544] @ 0x220 │ │ + mcr2 4, 0, r2, cr2, cr11, {6} │ │ + cdp2 7, 0, cr4, cr1, cr0, {3} │ │ cdp2 1, 0, cr0, cr1, cr13, {7} │ │ movs r0, r0 │ │ ldmia r3, {r1, r2, r3, r5} │ │ lsls r2, r2, #1 │ │ - pop {r0, r2, r5, r6, r7, pc} │ │ - mcr2 6, 0, r0, cr2, cr15, {1} │ │ - mcr2 6, 0, r2, cr1, cr11, {2} │ │ + bkpt 0x0012 │ │ + cdp2 6, 0, cr0, cr2, cr12, {3} │ │ + cdp2 6, 0, cr2, cr1, cr8, {4} │ │ mcr2 1, 0, r8, cr2, cr14, {0} │ │ cdp2 12, 0, cr12, cr0, cr6, {2} │ │ lsls r2, r2, #1 │ │ │ │ 0220aae8 : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ @@ -586880,15 +586879,15 @@ │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldmia r2!, {r1, r5, r7} │ │ lsls r2, r2, #1 │ │ ldmia r2!, {r3, r6} │ │ lsls r2, r2, #1 │ │ - lsls r6, r7, #14 │ │ + lsls r3, r5, #15 │ │ mcr2 10, 0, ip, cr2, cr6, {0} @ │ │ lsls r2, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ mov r6, r0 │ │ @@ -587066,21 +587065,21 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ movs r0, #1 │ │ b.n 220ad76 │ │ ldmia r1, {r1, r2, r3, r6, r7} │ │ lsls r2, r2, #1 │ │ strd pc, pc, [r9, #1020]! @ 0x3fc │ │ - stmia r5!, {r2, r3, r7} │ │ - @ instruction: 0xfe00d9cb │ │ - mcr2 2, 0, ip, cr3, cr9, {0} │ │ - mcr2 0, 0, r4, cr1, cr1, {3} │ │ - cdp2 1, 0, cr12, cr2, cr10, {7} │ │ + stmia r5!, {r0, r3, r4, r5, r7} │ │ + mcr2 9, 0, sp, cr0, cr8, {7} @ │ │ + cdp2 2, 0, cr12, cr3, cr6, {2} │ │ + mcr2 0, 0, r4, cr1, cr14, {4} │ │ + mcr2 2, 0, ip, cr2, cr7, {0} │ │ cdp2 3, 0, cr3, cr1, cr3, {1} │ │ - @ instruction: 0xfe04d94d │ │ + mcr2 9, 0, sp, cr4, cr10, {3} @ │ │ vcmla.f16 q6, , d2[0], #0 │ │ lsls r2, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #40 @ 0x28 │ │ mov r8, r0 │ │ @@ -587296,22 +587295,22 @@ │ │ b.n 220afe0 │ │ nop │ │ movs r0, r0 │ │ muls r7, r7 │ │ stmia r7!, {r1, r2, r3, r5, r6, r7} │ │ lsls r2, r2, #1 │ │ ldrb r5, [r7, #20] │ │ - cdp2 14, 0, cr5, cr0, cr4, {6} │ │ - cdp2 4, 0, cr1, cr2, cr7, {6} │ │ + mcr2 14, 0, r5, cr0, cr1, {7} │ │ + mcr2 4, 0, r1, cr2, cr4, {7} │ │ mcr2 13, 0, r7, cr4, cr3, {0} │ │ mcr2 12, 0, r7, cr0, cr1, {7} │ │ - mcr2 0, 0, ip, cr0, cr15, {6} │ │ - mcr2 10, 0, r5, cr1, cr1, {2} @ │ │ + cdp2 1, 0, cr12, cr0, cr12, {0} │ │ + mcr2 10, 0, r5, cr1, cr14, {3} @ │ │ mcr2 7, 0, lr, cr3, cr15, {1} │ │ - vcvt.f32.u32 d21, d3, #1 │ │ + vqrdmlah.s , , d0[0] │ │ mcr2 6, 0, ip, cr2, cr4, {1} │ │ lsls r2, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #44 @ 0x2c │ │ mov r6, r0 │ │ @@ -587489,21 +587488,21 @@ │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ movs r0, #1 │ │ b.n 220b1b6 │ │ stmia r5!, {r1, r2, r3, r7} │ │ lsls r2, r2, #1 │ │ b.n 220ad2e │ │ - @ instruction: 0xffffc14c │ │ - cdp2 5, 0, cr13, cr0, cr11, {4} │ │ - mcr2 13, 0, fp, cr3, cr9, {6} │ │ - mcr2 12, 0, r3, cr1, cr1, {1} │ │ - vdot.bf16 d11, d18, d10[1] │ │ + vsra.u32 q14, , #1 │ │ + mcr2 5, 0, sp, cr0, cr8, {5} │ │ + cdp2 14, 0, cr11, cr3, cr6, {0} │ │ + mcr2 12, 0, r3, cr1, cr14, {2} │ │ + mcr2 13, 0, fp, cr2, cr7, {6} │ │ cdp2 14, 0, cr2, cr1, cr3, {7} │ │ - cdp2 5, 0, cr13, cr4, cr13, {0} │ │ + mcr2 5, 0, sp, cr4, cr10, {1} │ │ cdp2 4, 0, cr12, cr3, cr2, {0} │ │ lsls r2, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #40 @ 0x28 │ │ mov r8, r0 │ │ @@ -587678,22 +587677,22 @@ │ │ ittt eq │ │ addeq sp, #40 @ 0x28 │ │ ldreq.w r8, [sp], #4 │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ stmia r3!, {r1, r2, r3, r5, r7} │ │ lsls r2, r2, #1 │ │ - pop {r0, r2, r3, r4, r6, pc} │ │ - vdot.bf16 , , d10[0] │ │ - mcr2 14, 0, fp, cr2, cr13, {7} │ │ - cdp2 4, 0, cr13, cr0, cr2, {2} │ │ + pop {r1, r3, r7, pc} │ │ + mcr2 13, 0, r1, cr1, cr7, {7} │ │ + cdp2 15, 0, cr11, cr2, cr10, {1} │ │ + cdp2 4, 0, cr13, cr0, cr15, {3} │ │ mcr2 10, 0, r4, cr3, cr1, {2} @ │ │ - mcr2 9, 0, pc, cr4, cr10, {1} @ │ │ + @ instruction: 0xfe04f967 │ │ mcr2 2, 0, lr, cr2, cr1, {3} │ │ - vrsra.u64 d27, d30, #1 │ │ + @ instruction: 0xffffb3eb │ │ mcr2 2, 0, ip, cr2, cr2, {0} │ │ lsls r2, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr r5, [r0, #0] │ │ mov r4, r0 │ │ @@ -590981,100 +590980,100 @@ │ │ moveq r0, r8 │ │ addeq sp, #8 │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r6, [sp, #640] @ 0x280 │ │ lsls r2, r2, #1 │ │ - asrs r6, r4, #25 │ │ + asrs r3, r2, #26 │ │ cdp2 5, 0, cr10, cr2, cr10, {0} │ │ lsls r2, r2, #1 │ │ - asrs r1, r0, #13 │ │ + asrs r6, r5, #13 │ │ cdp2 4, 0, cr10, cr3, cr14, {7} │ │ lsls r2, r2, #1 │ │ - bl 24396b8 │ │ - uxtb r7, r5 │ │ + bl 24666b8 │ │ + cbz r4, 220dafe │ │ mcr2 4, 0, sl, cr2, cr2, {6} │ │ lsls r2, r2, #1 │ │ - adds r2, #81 @ 0x51 │ │ + adds r2, #126 @ 0x7e │ │ mcr2 4, 0, sl, cr3, cr4, {5} │ │ lsls r2, r2, #1 │ │ add r4, pc, #648 @ (adr r4, 220dd50 ) │ │ lsls r2, r2, #1 │ │ - ldr r7, [r2, #116] @ 0x74 │ │ + ldr r4, [r0, #120] @ 0x78 │ │ cdp2 4, 0, cr10, cr2, cr4, {4} │ │ lsls r2, r2, #1 │ │ add r4, pc, #456 @ (adr r4, 220dc9c ) │ │ lsls r2, r2, #1 │ │ lsrs r0, r4, #3 │ │ mcr2 4, 0, sl, cr4, cr6, {2} │ │ lsls r2, r2, #1 │ │ - add r6, sp, #776 @ 0x308 │ │ + add r6, sp, #956 @ 0x3bc │ │ cdp2 4, 0, cr10, cr3, cr0, {2} │ │ lsls r2, r2, #1 │ │ - @ instruction: 0xebacfe03 │ │ + @ instruction: 0xebd9fe03 │ │ add r4, pc, #144 @ (adr r4, 220db7c ) │ │ lsls r2, r2, #1 │ │ - ldrb r4, [r2, #6] │ │ + ldrb r1, [r0, #7] │ │ cdp2 4, 0, cr10, cr1, cr10, {0} │ │ lsls r2, r2, #1 │ │ - bl 21e46fa >&, Universe&, std::__ndk1::__fs::filesystem::path const&)@@Base+0xa0a> │ │ + strbt pc, [r3, #1] │ │ add r3, pc, #960 @ (adr r3, 220debc ) │ │ lsls r2, r2, #1 │ │ strh r4, [r0, r3] │ │ - cdp2 5, 0, cr11, cr0, cr12, {6} │ │ + mcr2 5, 0, fp, cr0, cr9, {7} │ │ mcr2 3, 0, sl, cr1, cr2, {6} │ │ lsls r2, r2, #1 │ │ - bl 1e6a70c │ │ + bl 1e9770c │ │ add r3, pc, #736 @ (adr r3, 220ddf0 ) │ │ lsls r2, r2, #1 │ │ - strb r1, [r1, #1] │ │ + strb r6, [r6, #1] │ │ mcr2 3, 0, sl, cr0, cr14, {4} │ │ lsls r2, r2, #1 │ │ - ldr r1, [sp, #64] @ 0x40 │ │ + ldr r1, [sp, #244] @ 0xf4 │ │ cdp2 3, 0, cr10, cr0, cr4, {4} │ │ lsls r2, r2, #1 │ │ - ldr r2, [r7, #56] @ 0x38 │ │ + ldr r7, [r4, #60] @ 0x3c │ │ cdp2 3, 0, cr10, cr3, cr8, {3} │ │ lsls r2, r2, #1 │ │ - ldr r0, [sp, #868] @ 0x364 │ │ + ldr r1, [sp, #24] │ │ mcr2 3, 0, sl, cr0, cr2, {2} │ │ lsls r2, r2, #1 │ │ - adds r6, #37 @ 0x25 │ │ + adds r6, #82 @ 0x52 │ │ mcr2 3, 0, sl, cr1, cr6, {1} │ │ lsls r2, r2, #1 │ │ - asrs r6, r7, #4 │ │ + asrs r3, r5, #5 │ │ cdp2 3, 0, cr10, cr3, cr0, {1} │ │ lsls r2, r2, #1 │ │ - adds r2, #97 @ 0x61 │ │ - vcmla.f16 , , d15[1], #0 │ │ + adds r2, #142 @ 0x8e │ │ + vfmal.f16 d7, s3, s8[1] │ │ cdp2 3, 0, cr10, cr1, cr6, {0} │ │ lsls r2, r2, #1 │ │ - adds r5, #225 @ 0xe1 │ │ + adds r6, #14 │ │ cdp2 2, 0, cr10, cr1, cr10, {7} │ │ lsls r2, r2, #1 │ │ - bvs.n 220daf6 │ │ + bvs.n 220db50 │ │ mcr2 2, 0, sl, cr0, cr4, {6} │ │ lsls r2, r2, #1 │ │ - ldr r4, [r3, #84] @ 0x54 │ │ - mcr2 6, 0, ip, cr2, cr13, {1} │ │ + ldr r1, [r1, #88] @ 0x58 │ │ + cdp2 6, 0, cr12, cr2, cr10, {3} │ │ mcr2 2, 0, sl, cr3, cr10, {5} │ │ lsls r2, r2, #1 │ │ - bl 206e76e │ │ + bl 209b76e ::operator()(char const*)@@Base+0xe> │ │ add r2, pc, #632 @ (adr r2, 220dde8 ) │ │ lsls r2, r2, #1 │ │ - @ instruction: 0xef7efe02 │ │ - str r5, [sp, #516] @ 0x204 │ │ + vmull.p64 , d11, d2 │ │ + str r5, [sp, #696] @ 0x2b8 │ │ cdp2 2, 0, cr10, cr1, cr2, {4} │ │ lsls r2, r2, #1 │ │ - asrs r7, r4, #13 │ │ - mcr2 15, 0, r2, cr2, cr12, {5} │ │ + asrs r4, r2, #14 │ │ + cdp2 15, 0, cr2, cr2, cr9, {7} │ │ cdp2 2, 0, cr10, cr3, cr6, {3} │ │ lsls r2, r2, #1 │ │ - push {r1, r3} │ │ + push {r0, r1, r2, r4, r5} │ │ cdp2 2, 0, cr10, cr1, cr14, {2} │ │ lsls r2, r2, #1 │ │ ldr r3, [sp, #224] @ 0xe0 │ │ lsls r2, r2, #1 │ │ │ │ 0220db94 : │ │ push {r7, lr} │ │ @@ -591149,16 +591148,16 @@ │ │ b.w 26ff3e8 │ │ mov r0, r4 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ subs r0, #92 @ 0x5c │ │ lsls r0, r3, #1 │ │ - ldr r6, [r0, #16] │ │ - mcr2 1, 0, r3, cr3, cr9, {0} │ │ + ldr r3, [r6, #16] │ │ + cdp2 1, 0, cr3, cr3, cr6, {2} │ │ mcr2 0, 0, sl, cr2, cr4, {5} │ │ lsls r2, r2, #1 │ │ │ │ 0220dc50 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ @@ -591207,15 +591206,15 @@ │ │ mov r0, r4 │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ adds r7, #220 @ 0xdc │ │ lsls r0, r3, #1 │ │ ldr r6, [pc, #980] @ (220e0a0 ) │ │ - mcr2 4, 0, r8, cr0, cr1, {5} │ │ + mcr2 4, 0, r8, cr0, cr14, {6} │ │ mcr2 0, 0, sl, cr3, cr4, {1} │ │ lsls r2, r2, #1 │ │ │ │ 0220dcd4 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -591492,16 +591491,16 @@ │ │ b.n 220dfa0 │ │ add r0, sp, #36 @ 0x24 │ │ bl 20a6ade ::loadExtras(celestia::util::array_view)@@Base+0x35a> │ │ blx 26ffaf0 │ │ nop │ │ str r7, [sp, #1000] @ 0x3e8 │ │ lsls r2, r2, #1 │ │ - ldr r2, [pc, #848] @ (220e304 ) │ │ - cdp2 3, 0, cr8, cr2, cr7, {2} │ │ + ldr r3, [pc, #4] @ (220dfb8 ) │ │ + mcr2 3, 0, r8, cr2, cr4, {3} │ │ mcr2 14, 0, r9, cr3, cr12, {6} │ │ lsls r2, r2, #1 │ │ str r6, [sp, #376] @ 0x178 │ │ lsls r2, r2, #1 │ │ │ │ 0220dfc0 : │ │ bx lr │ │ @@ -592381,31 +592380,31 @@ │ │ itt ne │ │ ldrne r0, [sp, #76] @ 0x4c │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ str r0, [sp, #728] @ 0x2d8 │ │ lsls r2, r2, #1 │ │ - lsrs r3, r1, #2 │ │ - mcr2 9, 0, r8, cr2, cr13, {7} @ │ │ - mcr2 7, 0, r0, cr1, cr4, {5} │ │ - cdp2 15, 0, cr5, cr2, cr7, {2} │ │ - cdp2 12, 0, cr8, cr3, cr8, {1} │ │ - cdp2 3, 0, cr10, cr0, cr2, {7} │ │ - mcr2 3, 0, sl, cr2, cr12, {5} │ │ - cdp2 2, 0, cr8, cr2, cr1, {6} │ │ - mcr2 2, 0, r8, cr1, cr5, {5} │ │ - cdp2 2, 0, cr2, cr1, cr6, {5} │ │ - cdp2 12, 0, cr5, cr3, cr10, {0} │ │ - mcr2 11, 0, r5, cr2, cr14, {7} @ │ │ - mcr2 2, 0, r2, cr2, cr0, {4} │ │ - vdot.bf16 d5, d19, d13[0] │ │ - vdot.bf16 d5, d19, d1[0] │ │ - mcr2 2, 0, r2, cr3, cr10, {3} │ │ - mcr2 2, 0, r8, cr3, cr15, {3} │ │ + lsrs r0, r7, #2 │ │ + vseleq.f32 s16, s4, s21 │ │ + cdp2 7, 0, cr0, cr1, cr1, {7} │ │ + mcr2 15, 0, r5, cr2, cr4, {3} │ │ + mcr2 12, 0, r8, cr3, cr5, {2} │ │ + cdp2 4, 0, cr10, cr0, cr15, {0} │ │ + cdp2 3, 0, cr10, cr2, cr9, {7} │ │ + cdp2 2, 0, cr8, cr2, cr14, {7} │ │ + cdp2 2, 0, cr8, cr1, cr2, {7} │ │ + mcr2 2, 0, r2, cr1, cr3, {6} │ │ + mcr2 12, 0, r5, cr3, cr7, {1} │ │ + cdp2 12, 0, cr5, cr2, cr11, {1} │ │ + mcr2 2, 0, r2, cr2, cr13, {5} │ │ + mcr2 13, 0, r5, cr3, cr10, {5} │ │ + vdot.bf16 d5, d19, d14[1] │ │ + cdp2 2, 0, cr2, cr3, cr7, {5} │ │ + cdp2 2, 0, cr8, cr3, cr12, {5} │ │ mcr2 13, 0, r8, cr1, cr2, {7} │ │ lsls r2, r2, #1 │ │ │ │ 0220e870 : │ │ ldr r0, [pc, #16] @ (220e884 ) │ │ add r0, pc │ │ ldrb r1, [r0, #0] │ │ @@ -592465,15 +592464,15 @@ │ │ mov r2, r9 │ │ ldr.w r3, [r0, #680] @ 0x2a8 │ │ mov r0, r5 │ │ blx r3 │ │ mov r0, r6 │ │ ldmia.w sp!, {r8, r9, sl} │ │ pop {r4, r5, r6, r7, pc} │ │ - adds r5, r5, #5 │ │ + adds r2, r3, #6 │ │ Address 0x220e8fe is out of bounds. │ │ │ │ │ │ 0220e900 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -592592,15 +592591,15 @@ │ │ itt ne │ │ ldrne r0, [sp, #36] @ 0x24 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldrh r2, [r5, #36] @ 0x24 │ │ lsls r2, r2, #1 │ │ - adds r7, r6, #1 │ │ + adds r4, r4, #2 │ │ mcr2 10, 0, r0, cr1, cr0, {0} @ │ │ @ instruction: 0xfe048bc4 │ │ lsls r2, r2, #1 │ │ │ │ 0220ea34 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -596162,17 +596161,17 @@ │ │ b.n 2210c02 │ │ ldr r1, [pc, #20] @ (2210c14 ) │ │ mov r0, r5 │ │ add r1, pc │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ bx r2 │ │ - ldrsh r7, [r0, r1] │ │ - mcr2 11, 0, r8, cr1, cr0, {0} @ │ │ - mcr2 11, 0, r5, cr3, cr3, {2} @ │ │ + ldrsh r4, [r6, r1] │ │ + mcr2 11, 0, r8, cr1, cr13, {1} @ │ │ + vseleq.f64 d5, d19, d0 │ │ Address 0x2210c16 is out of bounds. │ │ │ │ │ │ 02210c18 : │ │ ldr r1, [sp, #0] │ │ mov r0, r2 │ │ b.w 26ff5c8 │ │ @@ -598208,18 +598207,18 @@ │ │ bcs.n 2211fe0 │ │ adds r6, r0, #1 │ │ lsls r1, r5, #1 │ │ strb.w r1, [sp, #108] @ 0x6c │ │ cbnz r5, 2211ff8 │ │ b.n 2212002 │ │ @ instruction: 0xf7e20057 │ │ - cmp r1, #214 @ 0xd6 │ │ - mcr2 12, 0, ip, cr2, cr15, {5} │ │ - mcr2 3, 0, r7, cr2, cr3, {6} │ │ - cdp2 0, 0, cr9, cr0, cr2, {0} │ │ + cmp r2, #3 │ │ + cdp2 12, 0, cr12, cr2, cr12, {7} │ │ + cdp2 4, 0, cr7, cr2, cr0, {0} │ │ + cdp2 0, 0, cr9, cr0, cr15, {1} │ │ cdp2 0, 0, cr15, cr1, cr5, {2} │ │ movs r7, r1 │ │ adds r4, r0, #1 │ │ mov r0, r4 │ │ blx 26ffb80 │ │ mov r6, r0 │ │ orr.w r0, r4, #1 │ │ @@ -598535,16 +598534,16 @@ │ │ beq.n 22122ac │ │ ldr r0, [sp, #352] @ 0x160 │ │ blx 26ffad0 │ │ b.n 22122ac │ │ nop │ │ ldrsh r0, [r4, r0] │ │ lsls r2, r2, #1 │ │ - lsrs r1, r5, #4 │ │ - cdp2 2, 0, cr6, cr2, cr13, {3} │ │ + lsrs r6, r2, #5 │ │ + mcr2 2, 0, r6, cr2, cr10, {4} │ │ mcr2 4, 0, r5, cr2, cr2, {3} │ │ lsls r2, r2, #1 │ │ │ │ 02212340 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::operator[](std::__ndk1::basic_string, std::__ndk1::allocator >)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -598653,15 +598652,15 @@ │ │ cbnz r6, 2212446 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::operator[](std::__ndk1::basic_string, std::__ndk1::allocator >)@@Base+0x106> │ │ b.n 221244c , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::operator[](std::__ndk1::basic_string, std::__ndk1::allocator >)@@Base+0x10c> │ │ mov r0, r4 │ │ blx 26ffbb0 │ │ blx 26ffaf0 │ │ strh r4, [r5, r1] │ │ lsls r2, r2, #1 │ │ - movs r5, #50 @ 0x32 │ │ + movs r5, #95 @ 0x5f │ │ vfmal.f16 d5, s1, s13[0] │ │ lsls r2, r2, #1 │ │ ldr r0, [r7, r2] │ │ lsls r2, r2, #1 │ │ str r2, [r4, r7] │ │ lsls r2, r2, #1 │ │ │ │ @@ -600177,17 +600176,17 @@ │ │ add.w r6, r0, #8 │ │ add.w sl, sp, #376 @ 0x178 │ │ mov.w r9, #0 │ │ strd r9, r9, [sp, #320] @ 0x140 │ │ b.n 221349a │ │ b.n 2213b30 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::json_value::destroy(nlohmann::json_abi_v3_11_3::detail::value_t)@@Base+0x25c> │ │ lsls r7, r2, #1 │ │ - str r3, [r3, #4] │ │ - mcr2 6, 0, pc, cr0, cr15, {1} @ │ │ - mcr2 15, 0, r4, cr1, cr7, {4} │ │ + str r0, [r1, #8] │ │ + cdp2 6, 0, cr15, cr0, cr12, {3} │ │ + cdp2 15, 0, cr4, cr1, cr4, {6} │ │ vcmla.f16 d2, d2, d0[0], #0 │ │ itt ne │ │ ldrne r0, [sp, #312] @ 0x138 │ │ blxne 26ffad0 │ │ add.w r8, r8, #4 │ │ cmp r8, r4 │ │ beq.n 221353e │ │ @@ -600510,15 +600509,15 @@ │ │ blx 26ffad0 │ │ b.n 2213780 │ │ nop │ │ ldr r0, [pc, #728] @ (2213ac8 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::json_value::destroy(nlohmann::json_abi_v3_11_3::detail::value_t)@@Base+0x1f4>) │ │ lsls r2, r2, #1 │ │ subs r7, #146 @ 0x92 │ │ lsls r2, r2, #1 │ │ - adds r3, r3, #3 │ │ + adds r0, r1, #4 │ │ Address 0x22137f6 is out of bounds. │ │ │ │ │ │ 022137f8 : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ sub sp, #48 @ 0x30 │ │ @@ -600997,15 +600996,15 @@ │ │ bl 207de6a │ │ bmi.n 2213c7a , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::json_value::destroy(nlohmann::json_abi_v3_11_3::detail::value_t)@@Base+0x3a6> │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (2213cdc , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::json_value::destroy(nlohmann::json_abi_v3_11_3::detail::value_t)@@Base+0x408>) │ │ add r0, pc │ │ bl 207d3a8 │ │ - stmia r1!, {r0, r1, r2, r4, r5, r7} │ │ + stmia r1!, {r2, r5, r6, r7} │ │ Address 0x2213cde is out of bounds. │ │ │ │ │ │ 02213ce0 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>* std::__ndk1::vector, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>, std::__ndk1::allocator, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> > >::__push_back_slow_path, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -601401,16 +601400,16 @@ │ │ ldr r0, [sp, #16] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ bvc.n 2214058 <_ZN8nlohmann16json_abi_v3_11_36detail10type_error6createIPNS0_10basic_jsonINSt6__ndk13mapENS5_6vectorENS5_12basic_stringIcNS5_11char_traitsIcEENS5_9allocatorIcEEEEbxydSB_NS0_14adl_serializerENS7_IhNSB_IhEEEEvEETnNS5_9enable_ifIXsr21is_basic_json_contextIT_EE5valueEiE4typeELi0EEES2_iRKSD_SK_@@Base+0xa0> │ │ cdp2 5, 0, cr3, cr3, cr14, {7} │ │ lsls r2, r2, #1 │ │ - strh r1, [r1, #32] │ │ - mcr2 10, 0, r4, cr3, cr4, {3} @ │ │ + strh r6, [r6, #32] │ │ + vseleq.f32 s8, s7, s3 │ │ mcr2 12, 0, r3, cr2, cr10, {3} │ │ lsls r2, r2, #1 │ │ subs r4, #92 @ 0x5c │ │ lsls r2, r2, #1 │ │ adds r5, #18 │ │ lsls r2, r2, #1 │ │ │ │ @@ -601458,15 +601457,15 @@ │ │ add r1, pc │ │ ldr.w r0, [r1, r0, lsl #2] │ │ bx lr │ │ ldr r0, [pc, #4] @ (22141a4 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::type_name() const@@Base+0x18>) │ │ add r0, pc │ │ bx lr │ │ nop │ │ - b.n 2214022 <_ZN8nlohmann16json_abi_v3_11_36detail10type_error6createIPNS0_10basic_jsonINSt6__ndk13mapENS5_6vectorENS5_12basic_stringIcNS5_11char_traitsIcEENS5_9allocatorIcEEEEbxydSB_NS0_14adl_serializerENS7_IhNSB_IhEEEEvEETnNS5_9enable_ifIXsr21is_basic_json_contextIT_EE5valueEiE4typeELi0EEES2_iRKSD_SK_@@Base+0x6a> │ │ + b.n 221407c <_ZN8nlohmann16json_abi_v3_11_36detail10type_error6createIPNS0_10basic_jsonINSt6__ndk13mapENS5_6vectorENS5_12basic_stringIcNS5_11char_traitsIcEENS5_9allocatorIcEEEEbxydSB_NS0_14adl_serializerENS7_IhNSB_IhEEEEvEETnNS5_9enable_ifIXsr21is_basic_json_contextIT_EE5valueEiE4typeELi0EEES2_iRKSD_SK_@@Base+0xc4> │ │ mcr2 13, 0, r1, cr1, cr4, {0} │ │ lsls r1, r2, #1 │ │ │ │ 022141ac : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ @@ -603075,27 +603074,27 @@ │ │ cmp r4, r0 │ │ beq.w 2215398 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0x5f0> │ │ ldr r6, [r6, #0] │ │ add.w r5, r8, #8 │ │ mov.w r9, #41 @ 0x29 │ │ mov.w sl, #100 @ 0x64 │ │ b.n 22151f8 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0x450> │ │ - bge.n 22150ae , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0x306> │ │ - cdp2 3, 0, cr9, cr0, cr10, {5} │ │ - vseleq.f16 s6, s2, s24 │ │ - cdp2 0, 0, cr4, cr3, cr11, {2} │ │ - mcr2 0, 0, r4, cr1, cr8, {0} │ │ + bge.n 2215108 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0x360> │ │ + mcr2 3, 0, r9, cr0, cr7, {6} │ │ + mcr2 9, 0, r3, cr1, cr9, {1} @ │ │ + mcr2 0, 0, r4, cr3, cr8, {3} │ │ + cdp2 0, 0, cr4, cr1, cr5, {2} │ │ cdp2 15, 0, cr8, cr1, cr3, {6} │ │ mcr2 13, 0, sl, cr3, cr2, {2} │ │ mcr2 12, 0, r2, cr3, cr12, {3} │ │ lsls r2, r2, #1 │ │ ldrh r5, [r6, #52] @ 0x34 │ │ - @ instruction: 0xfe035bcd │ │ - cdp2 12, 0, cr7, cr2, cr1, {2} │ │ - cdp2 14, 0, cr9, cr0, cr6, {7} │ │ + mcr2 11, 0, r5, cr3, cr10, {7} @ │ │ + cdp2 12, 0, cr7, cr2, cr14, {3} │ │ + mcr2 15, 0, r9, cr0, cr3, {0} │ │ vfmal.f16 , d16, d0[1] │ │ movs r0, r0 │ │ ldr r1, [r0, #0] │ │ ldr r2, [r1, #0] │ │ movs r1, #48 @ 0x30 │ │ blx r2 │ │ ldr.w r0, [r8] │ │ @@ -603472,20 +603471,20 @@ │ │ strb.w r0, [r2, #-1] │ │ ldr.w r0, [r8] │ │ ldr r2, [r0, #0] │ │ ldr r3, [r2, #4] │ │ mov r2, r9 │ │ b.n 221576c , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0x9c4> │ │ ldmia r6!, {r1, r4, r5, r7} │ │ - ldc2l 7, cr15, [pc, #84]! @ 2215608 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0x860> │ │ - ldc2l 6, cr5, [pc, #460]! @ 2215784 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0x9dc> │ │ - @ instruction: 0xfe00d941 │ │ + ldc2l 7, cr15, [pc, #264]! @ 22156bc , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0x914> │ │ + ldc2l 6, cr5, [pc, #640]! @ 2215838 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0xa90> │ │ + @ instruction: 0xfe00d96e │ │ vseleq.f16 s20, s1, s20 │ │ - @ instruction: 0xfe033ac8 │ │ - cdp2 7, 0, cr13, cr1, cr9, {7} │ │ + mcr2 10, 0, r3, cr3, cr5, {7} @ │ │ + vfmal.f16 d13, s2, s12[0] │ │ mcr2 7, 0, r2, cr0, cr6, {5} │ │ lsls r2, r2, #1 │ │ movs r7, #106 @ 0x6a │ │ lsls r2, r2, #1 │ │ uxtb r2, r0 │ │ movs r3, #41 @ 0x29 │ │ muls r2, r3 │ │ @@ -603816,25 +603815,25 @@ │ │ b.w 2214e58 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0xb0> │ │ add.w r0, r8, #592 @ 0x250 │ │ lsls r1, r1, #1 │ │ movs r2, #32 │ │ blx 27036b0 │ │ b.w 2214f94 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0x1ec> │ │ nop │ │ - ldc2 14, cr15, [r9], {-0} │ │ - adds r4, r4, #0 │ │ + mcrr2 14, 0, pc, r6, cr0 @ │ │ + adds r1, r2, #1 │ │ cdp2 4, 0, cr2, cr0, cr12, {7} │ │ lsls r2, r2, #1 │ │ movs r4, #154 @ 0x9a │ │ lsls r2, r2, #1 │ │ - bne.n 221597a , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&, bool, bool, unsigned int, unsigned int)@@Base+0xbd2> │ │ + bcs.n 22159d4 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::~serializer()@@Base+0x34> │ │ mcr2 9, 0, r8, cr0, cr13, {6} @ │ │ cdp2 4, 0, cr2, cr3, cr2, {2} │ │ lsls r2, r2, #1 │ │ - lsrs r6, r5, #31 │ │ + asrs r3, r3, #32 │ │ Address 0x221599e is out of bounds. │ │ │ │ │ │ 022159a0 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::~serializer()@@Base>: │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ ldrb.w r1, [r0, #592] @ 0x250 │ │ @@ -604327,39 +604326,39 @@ │ │ b.n 2215e72 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump_escaped(std::__ndk1::basic_string, std::__ndk1::allocator > const&, bool)@@Base+0x42e> │ │ mov r0, r6 │ │ blx 26ffbb0 │ │ blx 26ffaf0 │ │ nop │ │ subs r6, r4, r5 │ │ lsls r2, r2, #1 │ │ - str r4, [r2, #124] @ 0x7c │ │ - mcr2 5, 0, r3, cr3, cr13, {7} │ │ - mcr2 12, 0, r2, cr0, cr2, {1} │ │ - vseleq.f32 s28, s0, s4 │ │ - cdp2 3, 0, cr9, cr1, cr1, {0} │ │ + ldr r1, [r0, #0] │ │ + cdp2 6, 0, cr3, cr3, cr10, {1} │ │ + mcr2 12, 0, r2, cr0, cr15, {2} │ │ + vseleq.f32 s28, s0, s31 │ │ + cdp2 3, 0, cr9, cr1, cr14, {1} │ │ cdp2 15, 0, cr1, cr0, cr8, {2} │ │ lsls r2, r2, #1 │ │ subs r2, r1, #5 │ │ lsls r2, r2, #1 │ │ adds r2, r4, r4 │ │ lsls r2, r2, #1 │ │ - cmp r3, #182 @ 0xb6 │ │ - mcr2 9, 0, lr, cr0, cr13, {4} @ │ │ + cmp r3, #227 @ 0xe3 │ │ + @ instruction: 0xfe00e9ca │ │ cdp2 14, 0, cr1, cr1, cr12, {6} │ │ lsls r2, r2, #1 │ │ subs r6, r1, #3 │ │ lsls r2, r2, #1 │ │ adds r2, r2, r3 │ │ lsls r2, r2, #1 │ │ adds r4, r5, r2 │ │ lsls r2, r2, #1 │ │ - strh r3, [r1, r6] │ │ + strh r0, [r7, r6] │ │ vfmal.f16 d1, s1, s12[0] │ │ lsls r2, r2, #1 │ │ - add r0, sp, #440 @ 0x1b8 │ │ + add r0, sp, #620 @ 0x26c │ │ vfmal.f16 , d17, d4[2] │ │ lsls r2, r2, #1 │ │ │ │ 02215ec4 <_ZN8nlohmann16json_abi_v3_11_36detail10serializerINS0_10basic_jsonINSt6__ndk13mapENS4_6vectorENS4_12basic_stringIcNS4_11char_traitsIcEENS4_9allocatorIcEEEEbxydSA_NS0_14adl_serializerENS6_IhNSA_IhEEEEvEEE12dump_integerIxTnNS4_9enable_ifIXoooooosr3std11is_integralIT_EE5valuesr3std7is_sameISK_yEE5valuesr3std7is_sameISK_xEE5valuesr3std7is_sameISK_hEE5valueEiE4typeELi0EEEvSK_@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ @@ -604620,15 +604619,15 @@ │ │ movs r0, r0 │ │ movs r0, r0 │ │ ldrb r0, [r6, #31] │ │ asrs r4, r7, #19 │ │ lsls r2, r2, #1 │ │ asrs r0, r0, #19 │ │ lsls r2, r2, #1 │ │ - stmia r7!, {r0, r1, r2, r3, r4, r6} │ │ + stmia r7!, {r2, r3, r7} │ │ cdp2 4, 0, cr1, cr0, cr4, {2} │ │ lsls r2, r2, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #16 │ │ mov ip, r1 │ │ ldr r1, [pc, #48] @ (22161e4 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> >::dump_float(double)@@Base+0x134>) │ │ @@ -604788,16 +604787,16 @@ │ │ ldr r0, [sp, #16] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ push {r1, r2, r3, r5, r6, lr} │ │ mcr2 3, 0, r1, cr3, cr10, {5} │ │ lsls r2, r2, #1 │ │ - str r5, [r2, #28] │ │ - vcmla.f16 q1, , d0[0], #0 │ │ + str r2, [r0, #32] │ │ + vcmla.f16 q1, , d13[1], #0 │ │ @ instruction: 0xfe021a46 │ │ lsls r2, r2, #1 │ │ subs r0, r5, r0 │ │ lsls r2, r2, #1 │ │ asrs r6, r3, #11 │ │ lsls r2, r2, #1 │ │ │ │ @@ -608179,17 +608178,17 @@ │ │ itt ne │ │ strne r0, [sp, #160] @ 0xa0 │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ bl 207de6a │ │ nop │ │ orr.w r0, r8, #13697024 @ 0xd10000 │ │ - beq.n 221849a , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>& nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::operator[](char const*)@@Base+0x92> │ │ - mcr2 0, 0, sp, cr0, cr4, {2} │ │ - mcr2 13, 0, lr, cr0, cr15, {6} │ │ + beq.n 22184f4 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::push_back(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&)@@Base+0x3c> │ │ + cdp2 0, 0, cr13, cr0, cr1, {4} │ │ + cdp2 14, 0, cr14, cr0, cr12, {0} │ │ cdp2 15, 0, cr5, cr0, cr10, {1} │ │ mcr2 2, 0, pc, cr3, cr0, {2} @ │ │ lsls r1, r2, #1 │ │ │ │ 02218408 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>& nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::operator[](char const*)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -608350,15 +608349,15 @@ │ │ blxne 26ffad0 │ │ cbnz r6, 221858e , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::push_back(nlohmann::json_abi_v3_11_3::basic_json, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> const&)@@Base+0xd6> │ │ blx 26ffaf0 │ │ mov r0, r4 │ │ blx 26ffbb0 │ │ blx 26ffaf0 │ │ @ instruction: 0xf0f80051 │ │ - ldr r3, [pc, #280] @ (22186b8 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::basic_json(std::initializer_list, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> > >, bool, nlohmann::json_abi_v3_11_3::detail::value_t)@@Base+0x7c>) │ │ + ldr r3, [pc, #460] @ (221876c , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::basic_json(std::initializer_list, std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void> > >, bool, nlohmann::json_abi_v3_11_3::detail::value_t)@@Base+0x130>) │ │ mcr2 7, 0, pc, cr1, cr6, {3} @ │ │ lsls r1, r2, #1 │ │ @ instruction: 0xf7780051 │ │ @ instruction: 0xf0a20051 │ │ │ │ 022185ac : │ │ ldrb r0, [r0, #4] │ │ @@ -608638,15 +608637,15 @@ │ │ mov r0, r4 │ │ blx 26ffbb0 │ │ mov r0, sl │ │ blx 270a700 │ │ blx 26ffaf0 │ │ nop │ │ vqadd.s32 q8, q5, │ │ - sbcs r7, r7 │ │ + rors r4, r5 │ │ mcr2 4, 0, pc, cr2, cr10, {5} @ │ │ lsls r1, r2, #1 │ │ @ instruction: 0xf4bc0051 │ │ ldcl 0, cr0, [sl, #324] @ 0x144 │ │ │ │ 02218888 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::operator[](unsigned int) const@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -608711,15 +608710,15 @@ │ │ cbnz r6, 221891a , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::operator[](unsigned int) const@@Base+0x92> │ │ b.n 2218920 , std::__ndk1::allocator >, bool, long long, unsigned long long, double, std::__ndk1::allocator, nlohmann::json_abi_v3_11_3::adl_serializer, std::__ndk1::vector >, void>::operator[](unsigned int) const@@Base+0x98> │ │ mov r0, r4 │ │ blx 26ffbb0 │ │ blx 26ffaf0 │ │ stc 0, cr0, [r8, #-324]! @ 0xfffffebc │ │ ldc 0, cr0, [r2, #-324] @ 0xfffffebc │ │ - lsls r1, r5, #6 │ │ + lsls r6, r2, #7 │ │ cdp2 3, 0, cr15, cr2, cr2, {7} │ │ lsls r1, r2, #1 │ │ @ instruction: 0xf3e40051 │ │ │ │ 02218938 <_ZN8nlohmann16json_abi_v3_11_36detail10type_error6createIPKNS0_10basic_jsonINSt6__ndk13mapENS5_6vectorENS5_12basic_stringIcNS5_11char_traitsIcEENS5_9allocatorIcEEEEbxydSB_NS0_14adl_serializerENS7_IhNSB_IhEEEEvEETnNS5_9enable_ifIXsr21is_basic_json_contextIT_EE5valueEiE4typeELi0EEES2_iRKSD_SL_@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ @@ -608850,16 +608849,16 @@ │ │ ldr r0, [sp, #16] │ │ blx 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldrh r2, [r4, #48] @ 0x30 │ │ cdp2 12, 0, cr14, cr3, cr14, {3} │ │ lsls r1, r2, #1 │ │ - subs r2, #137 @ 0x89 │ │ - mcr2 0, 0, r0, cr3, cr4, {7} │ │ + subs r2, #182 @ 0xb6 │ │ + cdp2 1, 0, cr0, cr3, cr1, {1} │ │ mcr2 2, 0, pc, cr2, cr10, {7} @ │ │ lsls r1, r2, #1 │ │ @ instruction: 0xf2dc0051 │ │ @ instruction: 0xeb920051 │ │ │ │ 02218aac , std::__ndk1::allocator > nlohmann::json_abi_v3_11_3::detail::concat, std::__ndk1::allocator >, char const (&) [52], char const*>(char const (&) [52], char const*&&)@@Base>: │ │ push {r4, r5, r6, r7, lr} │ │ @@ -609604,15 +609603,15 @@ │ │ b.n 22199c0 │ │ lsls r1, r2, #1 │ │ push {r7, lr} │ │ mov r7, sp │ │ ldr r0, [pc, #4] @ (221920c ) │ │ add r0, pc │ │ bl 2093da8 , std::__ndk1::allocator > fmt::v11::detail::vformat(std::__ndk1::locale const&, fmt::v11::basic_string_view, fmt::v11::detail::vformat_args::type)@@Base+0x140> │ │ - ldr r7, [r0, #72] @ 0x48 │ │ + ldr r4, [r6, #72] @ 0x48 │ │ Address 0x221920e is out of bounds. │ │ │ │ │ │ 02219210 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl} │ │ @@ -610024,73 +610023,73 @@ │ │ mov r0, r4 │ │ blx 270aa10 │ │ b.n 2219572 │ │ @ instruction: 0xeae00051 │ │ @ instruction: 0xeacc0051 │ │ @ instruction: 0xeaaa0051 │ │ eor.w r0, r2, r1, lsr #1 │ │ - bmi.n 2219528 │ │ - cdp2 1, 0, cr3, cr1, cr3, {5} │ │ + bmi.n 2219582 │ │ + mcr2 1, 0, r3, cr1, cr0, {6} │ │ mcr2 3, 0, lr, cr3, cr14, {4} │ │ lsls r1, r2, #1 │ │ strh r0, [r5, #56] @ 0x38 │ │ cdp2 7, 0, cr8, cr8, cr2, {3} │ │ - cdp2 4, 0, cr13, cr8, cr0, {3} │ │ - mcr2 15, 0, pc, cr1, cr4, {3} @ │ │ + cdp2 4, 0, cr13, cr8, cr13, {4} │ │ + cdp2 15, 0, cr15, cr1, cr1, {5} │ │ ldc2l 9, cr14, [pc, #504]! @ 22197d4 @ │ │ lsls r1, r2, #1 │ │ strd r0, r0, [ip], #324 @ 0x144 │ │ - bcc.n 2219620 │ │ - cdp2 14, 0, cr13, cr1, cr10, {1} │ │ + bcc.n 221967a │ │ + mcr2 14, 0, sp, cr1, cr7, {2} │ │ ldc2l 9, cr14, [pc, #472]! @ 22197c4 @ │ │ lsls r1, r2, #1 │ │ @ instruction: 0xe8d00051 │ │ - bcc.n 22195fc │ │ - mcr2 6, 0, r5, cr1, cr3, {3} │ │ - cdp2 7, 0, cr9, cr2, cr4, {1} │ │ + bcc.n 2219656 │ │ + cdp2 6, 0, cr5, cr1, cr0, {5} │ │ + mcr2 7, 0, r9, cr2, cr1, {2} │ │ cdp2 7, 0, cr14, cr0, cr0, {7} │ │ lsls r1, r2, #1 │ │ b.n 22195d8 │ │ lsls r1, r2, #1 │ │ b.n 2219594 │ │ lsls r1, r2, #1 │ │ b.n 22195b0 │ │ lsls r1, r2, #1 │ │ ldrd r0, r0, [ip, #324] @ 0x144 │ │ ldrd r0, r0, [r4, #324] @ 0x144 │ │ b.n 2219534 │ │ lsls r1, r2, #1 │ │ - bne.n 2219598 │ │ - cdp2 14, 0, cr2, cr1, cr9, {4} │ │ + bne.n 22195f2 │ │ + mcr2 14, 0, r2, cr1, cr6, {5} │ │ vfmal.f16 d14, s6, s5[0] │ │ lsls r1, r2, #1 │ │ - bcs.n 22196f4 │ │ - cdp2 12, 0, cr12, cr1, cr11, {2} │ │ + bcs.n 221954e │ │ + mcr2 12, 0, ip, cr1, cr8, {3} │ │ vfmal.f16 d14, s4, s8[1] │ │ lsls r1, r2, #1 │ │ - bcs.n 22196d4 │ │ - mcr2 15, 0, r2, cr1, cr11, {0} │ │ + bcs.n 221972e │ │ + cdp2 15, 0, cr2, cr1, cr8, {2} │ │ vcmla.f16 d14, d19, d14[1], #0 │ │ lsls r1, r2, #1 │ │ strh r6, [r3, #46] @ 0x2e │ │ vcmla.f16 q7, q4, d8[1], #0 │ │ lsls r1, r2, #1 │ │ - bcs.n 221957c │ │ - cdp2 12, 0, cr12, cr1, cr6, {5} │ │ - mcr2 7, 0, r9, cr2, cr0, {3} │ │ + bcs.n 22195d6 │ │ + mcr2 12, 0, ip, cr1, cr3, {6} │ │ + mcr2 7, 0, r9, cr2, cr13, {4} │ │ vcmla.f16 d14, d0, d14[1], #0 │ │ lsls r1, r2, #1 │ │ stmdb lr!, {r0, r4, r6} │ │ stmdb sl, {r0, r4, r6} │ │ ldmdb r6, {r0, r4, r6} │ │ ldrd r0, r0, [lr, #-324] @ 0x144 │ │ - bcc.n 2219588 │ │ - cdp2 12, 0, cr1, cr1, cr0, {7} │ │ - vcmla.f16 , q0, d6[1], #0 │ │ - vseleq.f16 s18, s1, s20 │ │ + bcc.n 22195e2 │ │ + vdot.bf16 d1, d1, d13[0] │ │ + vfmal.f16 d9, s1, s6[0] │ │ + mcr2 9, 0, r9, cr0, cr7, {5} @ │ │ cdp2 0, 0, cr14, cr0, cr4, {2} │ │ lsls r1, r2, #1 │ │ │ │ 0221967c : │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ ldr r1, [pc, #92] @ (22196e0 ) │ │ @@ -610133,16 +610132,16 @@ │ │ ldr r1, [r1, #0] │ │ blx r1 │ │ movs r0, #0 │ │ strd r0, r0, [r4, #64] @ 0x40 │ │ strd r0, r0, [r4, #16] │ │ str r0, [r4, #24] │ │ pop {r4, r6, r7, pc} │ │ - beq.n 221968c │ │ - mcr2 5, 0, r9, cr1, cr10, {5} │ │ + bne.n 22196e6 │ │ + cdp2 5, 0, cr9, cr1, cr7, {7} │ │ mcr2 6, 0, lr, cr0, cr6, {3} │ │ lsls r1, r2, #1 │ │ b.n 22193e8 │ │ lsls r1, r2, #1 │ │ b.n 22193a4 │ │ lsls r1, r2, #1 │ │ b.n 22193c0 │ │ @@ -610329,15 +610328,15 @@ │ │ lsls r1, r2, #1 │ │ b.n 2219408 │ │ lsls r1, r2, #1 │ │ b.n 22192fc │ │ lsls r1, r2, #1 │ │ b.n 2219218 │ │ lsls r1, r2, #1 │ │ - ldmia r6, {r1, r5, r6, r7} │ │ + ldmia r7!, {r0, r1, r2, r3} │ │ cdp2 3, 0, cr9, cr1, cr2, {0} │ │ Address 0x22198ba is out of bounds. │ │ │ │ │ │ 022198bc : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ @@ -610441,16 +610440,16 @@ │ │ ldr.w r8, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26fe9c8 │ │ b.n 221a130 │ │ lsls r1, r2, #1 │ │ b.n 221a11c │ │ lsls r1, r2, #1 │ │ - ldmia r5!, {r1, r2, r3, r4, r6, r7} │ │ - mcr2 2, 0, r9, cr1, cr7, {6} │ │ + ldmia r6!, {r0, r1, r3} │ │ + cdp2 3, 0, cr9, cr1, cr4, {0} │ │ Address 0x22199c6 is out of bounds. │ │ │ │ │ │ 022199c8 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ @@ -610569,20 +610568,20 @@ │ │ ldr r0, [r4, #0] │ │ ldr r1, [r2, #0] │ │ ldr.w r2, [r0, #876] @ 0x36c │ │ mov r0, r4 │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ bx r2 │ │ - adds r2, #132 @ 0x84 │ │ - mcr2 7, 0, fp, cr0, cr3, {4} │ │ + adds r2, #177 @ 0xb1 │ │ + cdp2 7, 0, cr11, cr0, cr0, {6} │ │ cdp2 2, 0, cr14, cr0, cr14, {4} │ │ lsls r1, r2, #1 │ │ - bpl.n 2219b16 │ │ - mcr2 5, 0, r1, cr0, cr11, {6} │ │ + bpl.n 2219b70 │ │ + cdp2 6, 0, cr1, cr0, cr8, {0} │ │ mcr2 2, 0, lr, cr0, cr4, {3} │ │ lsls r1, r2, #1 │ │ b.n 2219fe0 │ │ lsls r1, r2, #1 │ │ │ │ 02219b0c : │ │ push {r4, r6, r7, lr} │ │ @@ -610625,16 +610624,16 @@ │ │ movs r1, #0 │ │ mov r3, r4 │ │ add r0, pc │ │ ldr r2, [r0, #0] │ │ add.w r0, r4, #44 @ 0x2c │ │ ldmia.w sp!, {r4, r6, r7, lr} │ │ b.w 26ff67c │ │ - ldmia r4!, {r5} │ │ - vdot.bf16 d8, d17, d4[1] │ │ + ldmia r4!, {r0, r2, r3, r6} │ │ + mcr2 13, 0, r8, cr1, cr1, {6} │ │ mcr2 1, 0, lr, cr1, cr4, {6} │ │ lsls r1, r2, #1 │ │ │ │ 02219b84 : │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -610664,16 +610663,16 @@ │ │ movs r0, #4 │ │ mov r1, r4 │ │ add r2, pc │ │ blx 270aa00 │ │ ldr.w fp, [sp], #4 │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 26ff6a0 │ │ - ldmia r3, {r3, r6, r7} │ │ - mcr2 3, 0, r1, cr1, cr0, {4} │ │ + ldmia r3!, {r0, r2, r4, r5, r6, r7} │ │ + mcr2 3, 0, r1, cr1, cr13, {5} │ │ mcr2 15, 0, r8, cr1, cr2, {6} │ │ Address 0x2219bea is out of bounds. │ │ │ │ │ │ 02219bec : │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ @@ -611132,16 +611131,16 @@ │ │ lsls r7, r2, #1 │ │ bhi.n 221a128 │ │ lsls r1, r2, #1 │ │ strb r2, [r5, #27] │ │ lsls r7, r2, #1 │ │ bvc.n 2219fbc │ │ lsls r1, r2, #1 │ │ - add r0, sp, #648 @ 0x288 │ │ - vcmla.f16 d10, d17, d14[0], #0 │ │ + add r0, sp, #828 @ 0x33c │ │ + vfmal.f16 d10, s3, s7[1] │ │ mcr2 12, 0, sp, cr1, cr6, {5} │ │ lsls r1, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #68 @ 0x44 │ │ mov r6, r0 │ │ @@ -612003,15 +612002,15 @@ │ │ bl 221be00 │ │ b.n 221a890 │ │ ldr r0, [pc, #8] @ (221a990 ) │ │ add r0, pc │ │ bl 221a310 │ │ ldmia r5, {r2, r3, r5, r6} │ │ lsls r1, r2, #1 │ │ - subs r0, #251 @ 0xfb │ │ + subs r1, #40 @ 0x28 │ │ vdot.bf16 d12, d0, d8[1] │ │ lsls r1, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub.w sp, sp, #560 @ 0x230 │ │ mov r4, r0 │ │ @@ -612087,15 +612086,15 @@ │ │ cmp r0, r6 │ │ it ne │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ str r3, [sp, #620] @ 0x26c │ │ vmull.u32 q14, d7, d10 │ │ lsls r1, r2, #1 │ │ - movs r3, #24 │ │ + movs r3, #69 @ 0x45 │ │ mcr2 3, 0, sp, cr0, cr8, {0} │ │ lsls r1, r2, #1 │ │ bcc.n 221aa9c │ │ lsls r1, r2, #1 │ │ ldmia r3, {r1, r2, r3, r4, r5, r7} │ │ lsls r1, r2, #1 │ │ push {r4, r6, r7, lr} │ │ @@ -613541,15 +613540,15 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ ldr.w r2, [r9, #16] │ │ add.w r1, sl, r4 │ │ mov r0, sl │ │ ldmia.w sp!, {r8, r9, sl} │ │ ldmia.w sp!, {r4, r5, r6, r7, lr} │ │ b.w 209b5f4 │ │ - bl 1e9b744 │ │ + bl 1ec8744 │ │ push {r4, r6, r7, lr} │ │ add r7, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #60] @ (221bb88 ) │ │ ldrb.w r1, [r4, #32] │ │ add r0, pc │ │ adds r0, #8 │ │ @@ -613720,16 +613719,16 @@ │ │ movs r0, r0 │ │ movs r0, #0 │ │ movs r0, r0 │ │ lsls r0, r0, #4 │ │ ldr r2, [r7, #16] │ │ mcr2 9, 0, fp, cr3, cr8, {3} @ │ │ lsls r1, r2, #1 │ │ - strd pc, lr, [r6, #-0]! │ │ - stmia r0!, {r0, r5, r6} │ │ + @ instruction: 0xe993fe00 │ │ + stmia r0!, {r1, r2, r3, r7} │ │ vfmal.f16 , d18, d6[2] │ │ lsls r1, r2, #1 │ │ bmi.n 221bcb0 │ │ bmi.n 221bcb2 │ │ bmi.n 221bcb4 │ │ bmi.n 221bcb6 │ │ bmi.n 221bcb8 │ │ @@ -613815,20 +613814,20 @@ │ │ movs r0, r0 │ │ movs r0, #0 │ │ movs r0, r0 │ │ lsls r0, r0, #4 │ │ ldr r6, [r0, #4] │ │ vcmla.f16 d11, d19, d4[0], #0 │ │ lsls r1, r2, #1 │ │ - ldrd pc, lr, [r8], #-0 │ │ - iteee vs │ │ - vcmlavs.f16 d11, d2, d2[0], #0 │ │ - lslvc r1, r2, #1 │ │ - bmi.n 221bda0 @ unpredictable │ │ - bmi.n 221bda2 @ unpredictable │ │ + stmia.w r5!, {r9, sl, fp, ip, sp, lr, pc} │ │ + itt ls │ │ + vcmlals.f16 d11, d2, d2[0], #0 │ │ + lslls r1, r2, #1 │ │ + bmi.n 221bda0 │ │ + bmi.n 221bda2 │ │ bmi.n 221bda4 │ │ bmi.n 221bda6 │ │ bmi.n 221bda8 │ │ bmi.n 221bdaa │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ @@ -613910,16 +613909,16 @@ │ │ movs r0, r0 │ │ movs r0, #0 │ │ movs r0, r0 │ │ lsls r0, r0, #4 │ │ str r6, [r2, #116] @ 0x74 │ │ mcr2 7, 0, fp, cr3, cr4, {4} │ │ lsls r1, r2, #1 │ │ - b.n 221bdec │ │ - mcr2 14, 0, fp, cr0, cr15, {3} │ │ + b.n 221be46 │ │ + cdp2 14, 0, cr11, cr0, cr12, {5} │ │ mcr2 7, 0, fp, cr2, cr2, {0} │ │ lsls r1, r2, #1 │ │ push {r4, r5, r7, lr} │ │ add r7, sp, #8 │ │ cbz r1, 221bf02 │ │ ldr r5, [r0, #0] │ │ mov r0, r1 │ │ @@ -613930,15 +613929,15 @@ │ │ mov r2, r5 │ │ ldmia.w sp!, {r4, r5, r7, lr} │ │ b.w 209b5f4 │ │ ldr r0, [pc, #8] @ (221bf0c ) │ │ add r0, pc │ │ bl 221a310 │ │ nop │ │ - ldc 14, cr15, [sl, #4] │ │ + stcl 14, cr15, [r7, #4] │ │ push {r7, lr} │ │ mov r7, sp │ │ sub sp, #32 │ │ ldr r2, [pc, #100] @ (221bf7c ) │ │ mov.w r3, #4294967295 @ 0xffffffff │ │ add r2, pc │ │ ldr r2, [r2, #0] │ │ @@ -614128,18 +614127,18 @@ │ │ ldrh.w r1, [r1, r4, lsl #1] │ │ strh.w r1, [r0, #-2] │ │ b.n 221c0e0 │ │ nop │ │ str r0, [r1, #40] @ 0x28 │ │ cdp2 6, 0, cr11, cr3, cr2, {1} │ │ lsls r1, r2, #1 │ │ - add r6, pc, #56 @ (adr r6, 221c168 ) │ │ - ldc2l 5, cr10, [pc, #40]! @ 221c158 │ │ - ldc2l 5, cr10, [pc, #568]! @ 221c36c │ │ - ldc2l 5, cr10, [pc, #336]! @ 221c288 │ │ + add r6, pc, #236 @ (adr r6, 221c21c ) │ │ + ldc2l 5, cr10, [pc, #220]! @ 221c20c │ │ + ldc2l 5, cr10, [pc, #748]! @ 221c420 │ │ + ldc2l 5, cr10, [pc, #516]! @ 221c33c │ │ ldc2l 4, cr11, [pc, #864]! @ 221c49c │ │ lsls r1, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #36 @ 0x24 │ │ eor.w r2, r2, r3, asr #31 │ │ @@ -614326,18 +614325,18 @@ │ │ ldrh.w r1, [r1, fp, lsl #1] │ │ strh.w r1, [r2, #-2] │ │ b.n 221c2fe │ │ str r2, [r7, #28] │ │ mcr2 1, 0, r6, cr3, cr10, {5} │ │ mcr2 4, 0, fp, cr3, cr8, {1} │ │ lsls r1, r2, #1 │ │ - add r4, pc, #96 @ (adr r4, 221c3b8 ) │ │ - ldc2l 2, cr10, [pc, #912]! @ 221c6e8 │ │ - ldc2l 3, cr10, [pc, #520]! @ 221c564 │ │ - ldc2l 3, cr10, [pc, #216]! @ 221c438 │ │ + add r4, pc, #276 @ (adr r4, 221c46c ) │ │ + ldc2l 3, cr10, [pc, #68]! @ 221c39c │ │ + ldc2l 3, cr10, [pc, #700]! @ 221c618 │ │ + ldc2l 3, cr10, [pc, #396]! @ 221c4ec │ │ ldc2l 2, cr11, [pc, #744]! @ 221c64c │ │ lsls r1, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #108 @ 0x6c │ │ str r0, [sp, #12] │ │ @@ -615002,17 +615001,17 @@ │ │ ldr r1, [pc, #20] @ (221ca64 ) │ │ add r1, pc │ │ ldrh.w r1, [r1, r3, lsl #1] │ │ strh.w r1, [r2, #-2] │ │ ldmia.w sp!, {r8, r9, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - ldr r4, [sp, #520] @ 0x208 │ │ - ldc2l 11, cr9, [pc, #840]! @ 221cdac @ │ │ - ldc2l 12, cr9, [pc, #880]! @ 221cdd8 │ │ + ldr r4, [sp, #700] @ 0x2bc │ │ + ldc2l 11, cr9, [pc, #1020]! @ 221ce60 @ │ │ + ldc2l 13, cr9, [pc, #36]! @ 221ca8c │ │ ldc2l 5, cr11, [pc, #960]! @ 221ce2c │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ mov r5, r1 │ │ @@ -615258,20 +615257,20 @@ │ │ ldr r0, [sp, #8] │ │ cmp r0, sl │ │ it ne │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ add r2, sp, #544 @ 0x220 │ │ lsls r1, r2, #1 │ │ - ldr r2, [sp, #280] @ 0x118 │ │ - ldc2l 9, cr9, [pc, #352]! @ 221ce44 @ │ │ + ldr r2, [sp, #460] @ 0x1cc │ │ + ldc2l 9, cr9, [pc, #442]! @ 221ce9e @ │ │ ldc2l 9, cr10, [pc, #20]! @ 221ccfc @ │ │ lsls r1, r2, #1 │ │ strb r7, [r5, #7] │ │ - vmlsl.u32 , d23, d22 │ │ + @ instruction: 0xffe79ad3 │ │ ldc2l 5, cr11, [pc, #960]! @ 221d0b4 │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ mov r6, r1 │ │ ldr r1, [pc, #232] @ (221cdec ) │ │ ldr r5, [r6, #0] │ │ @@ -615587,16 +615586,16 @@ │ │ moveq r0, r4 │ │ addeq sp, #16 │ │ ldmiaeq.w sp!, {r8, r9, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ add r6, pc, #880 @ (adr r6, 221d398 ) │ │ lsls r1, r2, #1 │ │ - str r6, [sp, #408] @ 0x198 │ │ - ldc2l 6, cr9, [pc, #176]! @ 221d0dc │ │ + str r6, [sp, #588] @ 0x24c │ │ + ldc2l 6, cr9, [pc, #356]! @ 221d190 │ │ ldc2l 5, cr10, [pc, #704]! @ 221d2f0 │ │ lsls r1, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #116 @ 0x74 │ │ str r0, [sp, #12] │ │ @@ -616316,17 +616315,17 @@ │ │ ldrh.w r0, [r1, r0, lsl #1] │ │ strh.w r0, [r4, #-2] │ │ ldr r0, [sp, #4] │ │ add sp, #12 │ │ ldmia.w sp!, {r8, r9, sl, fp} │ │ pop {r4, r5, r6, r7, pc} │ │ nop │ │ - ldrh r2, [r5, #58] @ 0x3a │ │ - ldc2l 14, cr8, [pc, #392]! @ 221d960 │ │ - ldc2l 15, cr8, [pc, #856]! @ 221db34 │ │ + ldrh r7, [r2, #60] @ 0x3c │ │ + ldc2l 14, cr8, [pc, #572]! @ 221da14 │ │ + ldc2l 0, cr9, [pc, #12]! @ 221d7e8 │ │ ldc2l 5, cr11, [pc, #960]! @ 221dba0 │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #16 │ │ mov r4, r0 │ │ ldr r0, [r0, #0] │ │ mov r5, r1 │ │ @@ -616596,20 +616595,20 @@ │ │ cmp r0, r1 │ │ it ne │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ nop │ │ ldr r5, [sp, #40] @ 0x28 │ │ lsls r1, r2, #1 │ │ - ldrh r4, [r5, #36] @ 0x24 │ │ - ldc2l 11, cr8, [pc, #960]! @ 221de6c @ │ │ + ldrh r1, [r3, #38] @ 0x26 │ │ + ldc2l 12, cr8, [pc, #116]! @ 221db20 │ │ ldc2l 11, cr9, [pc, #280]! @ 221dbc8 @ │ │ lsls r1, r2, #1 │ │ str r1, [r6, #68] @ 0x44 │ │ - vcvt.u16.f16 d24, d12, #25 │ │ + vqrdmulh.s32 q12, , d9[0] │ │ ldc2l 5, cr11, [pc, #960]! @ 221de7c │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ mov r6, r1 │ │ ldr r1, [pc, #240] @ (221dbbc ) │ │ ldr r5, [r6, #0] │ │ @@ -616935,16 +616934,16 @@ │ │ moveq r0, sl │ │ addeq sp, #36 @ 0x24 │ │ ldmiaeq.w sp!, {r8, r9, sl, fp} │ │ popeq {r4, r5, r6, r7, pc} │ │ blx 26ffae0 │ │ ldr r1, [sp, #48] @ 0x30 │ │ lsls r1, r2, #1 │ │ - ldrh r0, [r6, #2] │ │ - ldc2l 8, cr8, [pc, #120]! @ 221deb4 │ │ + ldrh r5, [r3, #4] │ │ + vcmla.f32 q12, , , #270 │ │ ldc2l 7, cr9, [pc, #640]! @ 221e0c0 │ │ lsls r1, r2, #1 │ │ bmi.n 221ddf0 │ │ bmi.n 221ddf2 │ │ bmi.n 221ddf4 │ │ bmi.n 221ddf6 │ │ bmi.n 221ddf8 │ │ @@ -617382,15 +617381,15 @@ │ │ mov r2, r1 │ │ bl 221bd10 │ │ b.n 221e2f8 │ │ add r0, sp, #32 │ │ bl 221bee4 │ │ b.n 221e2f8 │ │ nop │ │ - lsrs r7, r5, #13 │ │ + lsrs r4, r3, #14 │ │ vcmla.f16 d10, d2, d8[0], #0 │ │ mov r2, r1 │ │ bl 221be00 │ │ ldr r0, [sp, #100] @ 0x64 │ │ ldr r1, [pc, #120] @ (221e374 ) │ │ add r1, pc │ │ ldr r1, [r1, #0] │ │ @@ -617424,27 +617423,27 @@ │ │ @ instruction: 0xffffffff │ │ movs r0, r0 │ │ movs r0, #0 │ │ movs r0, r0 │ │ lsls r0, r0, #4 │ │ str r7, [sp, #360] @ 0x168 │ │ lsls r1, r2, #1 │ │ - @ instruction: 0xff63fdff │ │ + @ instruction: 0xff90fdff │ │ bics r4, r4 │ │ - mcr2 3, 0, ip, cr3, cr12, {6} │ │ - mcr2 10, 0, r9, cr0, cr7, {6} @ │ │ + cdp2 4, 0, cr12, cr3, cr9, {0} │ │ + vseleq.f64 d9, d0, d4 │ │ cdp2 5, 0, cr4, cr2, cr10, {4} │ │ - cdp2 5, 0, cr12, cr3, cr12, {6} │ │ - cdp2 12, 0, cr9, cr0, cr3, {6} │ │ - cdp2 6, 0, cr6, cr2, cr0, {2} │ │ + mcr2 5, 0, ip, cr3, cr9, {7} │ │ + mcr2 12, 0, r9, cr0, cr0, {7} │ │ + cdp2 6, 0, cr6, cr2, cr13, {3} │ │ ldc2l 2, cr9, [pc, #768]! @ 221e674 │ │ lsls r1, r2, #1 │ │ - cdp2 14, 4, cr15, cr10, cr0, {0} │ │ - add r3, pc, #712 @ (adr r3, 221e648 ) │ │ - @ instruction: 0xfe00c968 │ │ + cdp2 14, 7, cr15, cr7, cr0, {0} │ │ + add r3, pc, #892 @ (adr r3, 221e6fc ) │ │ + mcr2 9, 0, ip, cr0, cr5, {4} @ │ │ mcr2 5, 0, fp, cr1, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #92 @ 0x5c │ │ mov r4, r0 │ │ ldr.w r0, [pc, #984] @ 221e76c │ │ add r0, pc │ │ @@ -617809,22 +617808,22 @@ │ │ bl 221a310 │ │ ldr r0, [pc, #36] @ (221e788 ) │ │ add r0, pc │ │ bl 221a310 │ │ nop │ │ str r2, [sp, #160] @ 0xa0 │ │ lsls r1, r2, #1 │ │ - @ instruction: 0xfb2dfdff │ │ + @ instruction: 0xfb5afdff │ │ subs r7, #206 @ 0xce │ │ cdp2 0, 0, cr4, cr3, cr2, {1} │ │ mcr2 14, 0, r3, cr3, cr10, {7} │ │ cdp2 1, 0, cr9, cr3, cr0, {5} │ │ lsls r1, r2, #1 │ │ - str r2, [r2, #32] │ │ - ldc2l 5, cr12, [pc, #232]! @ 221e870 │ │ + str r7, [r7, #32] │ │ + ldc2l 5, cr12, [pc, #412]! @ 221e924 │ │ mcr2 5, 0, fp, cr1, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #20 │ │ ldrb r6, [r0, #0] │ │ mov fp, r0 │ │ str r2, [sp, #12] │ │ @@ -617968,17 +617967,17 @@ │ │ pop {r4, r5, r6, r7, pc} │ │ ldr r0, [pc, #16] @ (221e91c ) │ │ add r0, pc │ │ bl 221a310 │ │ ldr r0, [pc, #12] @ (221e920 ) │ │ add r0, pc │ │ bl 221a310 │ │ - @ instruction: 0xfa27fdff │ │ - ldrt pc, [r6] │ │ - pop {r1, r2, r5} │ │ + @ instruction: 0xfa54fdff │ │ + strb.w pc, [r3, #3584] @ 0xe00 │ │ + pop {r0, r1, r4, r6} │ │ mcr2 5, 0, fp, cr0, cr0, {7} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, fp} │ │ sub sp, #80 @ 0x50 │ │ mov r6, r0 │ │ ldr r0, [pc, #308] @ (221ea68 ) │ │ mov r4, r1 │ │ @@ -618788,16 +618787,16 @@ │ │ mov.w r6, r6, lsr #4 │ │ strb.w r2, [r0], #-1 │ │ bne.n 221f1ea │ │ ldr.w fp, [sp, #16] │ │ add.w r9, sp, #24 │ │ b.n 221f28a │ │ ldr r6, [pc, #884] @ (221f588 ) │ │ - vcvt.u16.f16 q12, , #25 │ │ - @ instruction: 0xfe029a64 │ │ + @ instruction: 0xffe78d8c │ │ + mcr2 10, 0, r9, cr2, cr1, {4} @ │ │ ldc2l 4, cr15, [pc, #316]! @ 221f358 │ │ strb r2, [r7, #19] │ │ mov r0, r5 │ │ cmp r4, sl │ │ bls.w 221f0a2 │ │ ldr r1, [sp, #20] │ │ add r0, sl │ │ @@ -618902,17 +618901,17 @@ │ │ it ne │ │ blxne 26ffad0 │ │ blx 26ffaf0 │ │ strh r6, [r1, #58] @ 0x3a │ │ lsls r1, r2, #1 │ │ adds r2, #106 @ 0x6a │ │ cdp2 2, 0, cr3, cr3, cr10, {1} │ │ - cdp2 4, 0, cr7, cr3, cr2, {7} │ │ - ldc2l 7, cr9, [pc, #656]! @ 221f5d4 │ │ - ldc2l 10, cr8, [pc, #636]! @ 221f5c4 @ │ │ + cdp2 5, 0, cr7, cr3, cr15, {0} │ │ + ldc2l 7, cr9, [pc, #836]! @ 221f688 │ │ + ldc2l 10, cr8, [pc, #816]! @ 221f678 @ │ │ mcr2 2, 0, r8, cr2, cr2, {5} │ │ lsls r1, r2, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #4 │ │ mov r4, r1 │ │ @@ -809677,21 +809676,21 @@ │ │ mcr2 1, 0, fp, cr1, cr12, {3} │ │ mcr2 1, 0, fp, cr1, cr0, {6} │ │ cdp2 0, 0, cr11, cr1, cr12, {2} │ │ cdp2 0, 0, cr11, cr1, cr4, {6} │ │ cdp2 0, 0, cr11, cr1, cr8, {5} │ │ cdp2 12, 0, cr3, cr1, cr8, {2} │ │ lsls r3, r1, #1 │ │ - bl 1e8930c │ │ + bl 1eb630c │ │ lsrs r4, r4, #7 │ │ lsls r3, r1, #1 │ │ stmia r0!, {r1, r2, r3, r4, r6, r7} │ │ - mcr2 4, 0, sp, cr2, cr8, {0} │ │ + cdp2 4, 0, cr13, cr2, cr5, {2} │ │ ldc2l 4, cr12, [sl, #72]! @ 0x48 │ │ - vseleq.f32 s2, s5, s5 │ │ + @ instruction: 0xfe021acf │ │ ldc2l 8, cr4, [sl, #192]! @ 0xc0 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 2287c50 │ │ movs r0, #64 @ 0x40 │ │ b.n 2287278 │ │ eors r0, r0 │ │ b.n 228727c │ │ @@ -817237,21 +817236,21 @@ │ │ adds.w ip, r1, sl, lsr #13 │ │ cdp2 12, 0, cr3, cr3, cr8, {6} │ │ cdp2 14, 0, cr2, cr3, cr0, {0} │ │ mcr2 13, 0, r2, cr3, cr12, {5} │ │ vfmal.f16 , d3, d0[0] │ │ lsls r2, r1, #1 │ │ @ instruction: 0xf784004a │ │ - add r7, sp, #292 @ 0x124 │ │ + add r7, sp, #472 @ 0x1d8 │ │ ldc2l 5, cr12, [sl, #176]! @ 0xb0 │ │ lsls r2, r1, #1 │ │ subs r2, #82 @ 0x52 │ │ - cdp2 15, 0, cr8, cr3, cr0, {3} │ │ + cdp2 15, 0, cr8, cr3, cr13, {4} │ │ ldc2l 10, cr3, [sl, #752]! @ 0x2f0 @ │ │ - cdp2 5, 0, cr13, cr3, cr14, {7} │ │ + mcr2 6, 0, sp, cr3, cr11, {0} │ │ Address 0x228b8ce is out of bounds. │ │ │ │ │ │ 0228b8d0 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ @@ -817318,15 +817317,15 @@ │ │ pop {r4, r5, fp, pc} │ │ subeq pc, sl, r0, lsr #15 │ │ subeq pc, sl, ip, lsr #14 │ │ subeq pc, sl, r4, lsl r7 @ │ │ subeq ip, sl, r4, asr #7 │ │ subseq r5, r0, r4, lsr #23 │ │ subeq ip, sl, r0, asr r1 │ │ - ldc2l 12, cr6, [fp, #868]! @ 0x364 │ │ + ldc2l 13, cr6, [fp, #24]! │ │ │ │ 0228b9ec : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ ldr r0, [pc, #140] @ 228ba8c │ │ ldr r0, [pc, r0] │ │ @@ -817362,15 +817361,15 @@ │ │ ldr r0, [r0] │ │ bl 270aba0 │ │ bl 2707f50 │ │ mov r0, #0 │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ ldrdeq ip, [sl], #-8 │ │ - ldc2l 5, cr5, [r9, #404]! @ 0x194 │ │ + ldc2l 5, cr5, [r9, #584]! @ 0x248 │ │ ldc2l 1, cr7, [r8, #288]! @ 0x120 │ │ ldrdeq ip, [sl], #-40 @ 0xffffffd8 │ │ │ │ 0228ba9c : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ @@ -817418,15 +817417,15 @@ │ │ add r1, pc, r1 │ │ ldr r0, [pc, r0] │ │ ldr r0, [r0] │ │ bl 270aba0 │ │ bl 2707f50 │ │ subseq r5, r0, ip, asr sl │ │ subeq ip, sl, r8 │ │ - ldc2l 4, cr5, [r9, #596]! @ 0x254 │ │ + ldc2l 4, cr5, [r9, #776]! @ 0x308 │ │ ldc2l 0, cr7, [r8, #416]! @ 0x1a0 │ │ strdeq ip, [sl], #-24 @ 0xffffffe8 │ │ │ │ 0228bb74 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ @@ -817507,17 +817506,17 @@ │ │ ldr r0, [pc, #44] @ 228bcdc │ │ add r1, pc, r1 │ │ ldr r0, [pc, r0] │ │ ldr r0, [r0] │ │ bl 270aba0 │ │ bl 2707f50 │ │ subeq fp, sl, ip, asr #30 │ │ - ldc2l 3, cr5, [r9, #884]! @ 0x374 │ │ - ldc2l 3, cr11, [r9, #904]! @ 0x388 │ │ - ldc2l 3, cr5, [r9, #372]! @ 0x174 │ │ + ldc2l 4, cr5, [r9, #40]! @ 0x28 │ │ + ldc2l 4, cr11, [r9, #60]! @ 0x3c │ │ + ldc2l 3, cr5, [r9, #552]! @ 0x228 │ │ ldc2l 15, cr6, [r8, #160]! @ 0xa0 │ │ strheq ip, [sl], #-8 │ │ ldc2l 15, cr6, [r8, #32]! │ │ umaaleq ip, sl, r8, r0 │ │ │ │ 0228bce0 : │ │ mov r1, #0 │ │ @@ -817665,15 +817664,15 @@ │ │ ldr r0, [pc, #36] @ 228bf2c │ │ add r1, pc, r1 │ │ ldr r0, [pc, r0] │ │ ldr r0, [r0] │ │ bl 270aba0 │ │ bl 2707f50 │ │ subeq fp, sl, r0, asr #26 │ │ - ldc2l 1, cr5, [r9, #836]! @ 0x344 │ │ + ldc2l 1, cr5, [r9, #1016]! @ 0x3f8 │ │ subeq fp, sl, ip, asr #24 │ │ umaaleq sp, sl, r0, r0 │ │ ldc2l 12, cr6, [r8, #704]! @ 0x2c0 │ │ subeq fp, sl, r0, asr #28 │ │ │ │ 0228bf30 : │ │ ldr r1, [pc, #24] @ 228bf50 │ │ @@ -817692,15 +817691,15 @@ │ │ mov r3, r1 │ │ ldr r1, [pc, #16] @ 228bf78 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ add r0, r0, #12 │ │ b 228bf7c │ │ subseq r5, r0, r4, lsr #11 │ │ - ldc2l 7, cr12, [fp, #752]! @ 0x2f0 │ │ + ldc2l 7, cr12, [fp, #932]! @ 0x3a4 │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ mov r0, #1 │ │ ldr r7, [r4] │ │ cmp r7, #0 │ │ beq 228bf9c │ │ @@ -817742,15 +817741,15 @@ │ │ mov r2, r5 │ │ add r1, pc, r1 │ │ bl 270aba0 │ │ bl 2707f50 │ │ subseq r5, r0, ip, asr r5 │ │ subseq r5, r0, r8, lsl r5 │ │ subeq fp, sl, ip, lsr sp │ │ - ldc2l 9, cr8, [r8, #190]! @ 0xbe @ │ │ + ldc2l 9, cr8, [r8, #280]! @ 0x118 @ │ │ │ │ 0228c044 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ ldr r6, [pc, #124] @ 228c0d0 │ │ mov r5, r1 │ │ ldr r1, [pc, #120] @ 228c0d4 │ │ @@ -817781,16 +817780,16 @@ │ │ ldr r0, [pc, #28] @ 228c0dc │ │ add r1, pc, r1 │ │ ldr r0, [pc, r0] │ │ ldr r0, [r0] │ │ bl 270aba0 │ │ bl 2707f50 │ │ subseq r5, r0, ip, lsr #9 │ │ - ldc2l 6, cr12, [fp, #768]! @ 0x300 │ │ - ldc2l 14, cr12, [r9, #68]! @ 0x44 │ │ + ldc2l 6, cr12, [fp, #948]! @ 0x3b4 │ │ + ldc2l 14, cr12, [r9, #248]! @ 0xf8 │ │ subeq fp, sl, r8, lsl #25 │ │ │ │ 0228c0e0 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r5, [pc, #196] @ 228c1b4 │ │ mov r4, r0 │ │ @@ -817840,19 +817839,19 @@ │ │ ldr r2, [pc, #32] @ 228c1c4 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270aba0 │ │ bl 2707f50 │ │ subseq r5, r0, r8, lsl r4 │ │ - ldc2l 6, cr12, [fp, #32]! │ │ + ldc2l 6, cr12, [fp, #212]! @ 0xd4 │ │ subeq fp, sl, r0, asr #23 │ │ - ldc2l 7, cr8, [r8, #908]! @ 0x38c │ │ - ldc2l 5, cr12, [fp, #496]! @ 0x1f0 │ │ - ldc2l 13, cr12, [r9, #404]! @ 0x194 │ │ + ldc2l 8, cr8, [r8, #64]! @ 0x40 │ │ + ldc2l 5, cr12, [fp, #676]! @ 0x2a4 │ │ + ldc2l 13, cr12, [r9, #584]! @ 0x248 │ │ ldrdeq fp, [sl], #-188 @ 0xffffff44 │ │ │ │ 0228c1d0 : │ │ mov r0, #0 │ │ bx lr │ │ │ │ 0228c1d8 : │ │ @@ -817908,19 +817907,19 @@ │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ ldr r0, [pc, r0] │ │ ldr r0, [r0] │ │ bl 270aba0 │ │ bl 2707f50 │ │ subseq r5, r0, r0, lsr #6 │ │ - vcmla.f32 d28, d26, d11, #270 │ │ - ldc2l 7, cr8, [r8, #4]! │ │ - ldc2l 8, cr12, [sl, #76]! @ 0x4c │ │ + ldc2l 8, cr12, [sl, #736]! @ 0x2e0 │ │ + ldc2l 7, cr8, [r8, #184]! @ 0xb8 │ │ + vcmla.f32 q14, q5, q0, #270 │ │ subeq fp, sl, r4, lsr #21 │ │ - ldc2l 12, cr12, [r9, #324]! @ 0x144 │ │ + ldc2l 12, cr12, [r9, #504]! @ 0x1f8 │ │ subeq fp, sl, r8, asr #21 │ │ │ │ 0228c2d0 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r5, [pc, #180] @ 228c394 │ │ mov r4, r0 │ │ @@ -817966,19 +817965,19 @@ │ │ ldr r2, [pc, #32] @ 228c3a4 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270aba0 │ │ bl 2707f50 │ │ subseq r5, r0, r8, lsr #4 │ │ - ldc2l 13, cr2, [r9, #360]! @ 0x168 │ │ + ldc2l 13, cr2, [r9, #540]! @ 0x21c │ │ subeq fp, sl, r0, ror #19 │ │ - ldc2l 6, cr8, [r8, #12]! │ │ - ldc2l 12, cr2, [r9, #888]! @ 0x378 │ │ - ldc2l 11, cr12, [r9, #500]! @ 0x1f4 @ │ │ + ldc2l 6, cr8, [r8, #192]! @ 0xc0 │ │ + ldc2l 13, cr2, [r9, #44]! @ 0x2c │ │ + ldc2l 11, cr12, [r9, #680]! @ 0x2a8 @ │ │ strdeq fp, [sl], #-148 @ 0xffffff6c │ │ │ │ 0228c3b0 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r4, r0 │ │ @@ -818073,19 +818072,19 @@ │ │ ldr r2, [pc, #32] @ 228c540 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270aba0 │ │ bl 2707f50 │ │ subseq r5, r0, ip, lsl #1 │ │ - ldc2l 6, cr12, [sl, #44]! @ 0x2c │ │ + ldc2l 6, cr12, [sl, #224]! @ 0xe0 │ │ subeq fp, sl, r4, asr #16 │ │ - ldc2l 4, cr8, [r8, #412]! @ 0x19c │ │ - ldc2l 5, cr12, [sl, #572]! @ 0x23c │ │ - ldc2l 9, cr12, [r9, #450]! @ 0x1c2 @ │ │ + ldc2l 4, cr8, [r8, #592]! @ 0x250 │ │ + ldc2l 5, cr12, [sl, #752]! @ 0x2f0 │ │ + ldc2l 10, cr12, [r9, #56]! @ 0x38 @ │ │ subeq fp, sl, r8, asr r8 │ │ │ │ 0228c54c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ ldr r5, [pc, #268] @ 228c66c │ │ @@ -818154,15 +818153,15 @@ │ │ ldr r0, [pc, r0] │ │ ldr r0, [r0] │ │ blx r0 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ subseq r4, r0, r8, lsr #31 │ │ - ldc2l 5, cr12, [sl, #156]! @ 0x9c │ │ + ldc2l 5, cr12, [sl, #336]! @ 0x150 │ │ subeq lr, sl, r8, lsr #21 │ │ subeq lr, sl, r4, lsr sl │ │ subeq lr, sl, ip, lsl sl │ │ subeq fp, sl, r4, asr #13 │ │ subeq lr, sl, r0, lsl sl │ │ │ │ 0228c688 : │ │ @@ -818305,15 +818304,15 @@ │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ mov r0, r8 │ │ bl 270ac30 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ subseq r4, r0, r4, lsr #27 │ │ - ldc2l 15, cr11, [fp, #592]! @ 0x250 │ │ + ldc2l 15, cr11, [fp, #772]! @ 0x304 │ │ strheq lr, [sl], #-140 @ 0xffffff74 │ │ subeq lr, sl, r8, asr #16 │ │ subeq lr, sl, ip, lsr #16 │ │ ldrdeq fp, [sl], #-76 @ 0xffffffb4 │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r5, [pc, #56] @ 228c918 │ │ @@ -818413,18 +818412,18 @@ │ │ mov sp, fp │ │ pop {fp, pc} │ │ mov r0, #0 │ │ mov sp, fp │ │ pop {fp, pc} │ │ subeq lr, sl, ip, asr r6 │ │ subeq lr, sl, r4, lsl #14 │ │ - ldc2l 10, cr15, [fp, #472]! @ 0x1d8 @ │ │ - ldc2l 10, cr7, [fp, #980]! @ 0x3d4 @ │ │ - ldc2l 4, cr12, [r9, #708]! @ 0x2c4 │ │ - ldc2l 7, cr9, [fp, #356]! @ 0x164 │ │ + ldc2l 10, cr15, [fp, #652]! @ 0x28c @ │ │ + ldc2l 11, cr7, [fp, #136]! @ 0x88 @ │ │ + ldc2l 4, cr12, [r9, #888]! @ 0x378 │ │ + ldc2l 7, cr9, [fp, #536]! @ 0x218 │ │ │ │ 0228ca6c : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #8 │ │ ldr r1, [pc, #112] @ 228caf0 │ │ ldr r1, [pc, r1] │ │ @@ -818453,18 +818452,18 @@ │ │ add r2, pc, r2 │ │ add r3, pc, r3 │ │ bl 270ad10 │ │ mov r0, #0 │ │ mov sp, fp │ │ pop {fp, pc} │ │ subeq lr, sl, ip, asr r6 │ │ - ldc2l 9, cr15, [fp, #412]! @ 0x19c @ │ │ - ldc2l 10, cr7, [fp, #308]! @ 0x134 @ │ │ - ldc2l 4, cr12, [r9, #36]! @ 0x24 │ │ - ldc2l 6, cr9, [fp, #708]! @ 0x2c4 │ │ + ldc2l 9, cr15, [fp, #502]! @ 0x1f6 @ │ │ + ldc2l 10, cr7, [fp, #488]! @ 0x1e8 @ │ │ + ldc2l 4, cr12, [r9, #216]! @ 0xd8 │ │ + ldc2l 6, cr9, [fp, #888]! @ 0x378 │ │ │ │ 0228cb04 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #80] @ 228cb68 │ │ ldr r0, [pc, r0] │ │ @@ -818531,15 +818530,15 @@ │ │ cmp r0, #0 │ │ moveq r4, #0 │ │ mov r0, r4 │ │ pop {r4, sl, fp, pc} │ │ mov r4, #0 │ │ mov r0, r4 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 13, cr15, [sl, #1000]! @ 0x3e8 │ │ + ldc2l 14, cr15, [sl, #156]! @ 0x9c │ │ │ │ 0228cc18 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #8 │ │ str r1, [sp, #4] │ │ add r1, sp, #4 │ │ @@ -820033,15 +820032,15 @@ │ │ b 228d40c │ │ ldr r2, [pc, #2276] @ 228ec38 │ │ add r2, pc, r2 │ │ b 228d40c │ │ ldr r2, [pc, #2296] @ 228ec58 │ │ add r2, pc, r2 │ │ b 228d40c │ │ - ldc2l 2, cr3, [r9, #772]! @ 0x304 │ │ + ldc2l 2, cr3, [r9, #952]! @ 0x3b8 │ │ ldr r2, [pc, #2284] @ 228ec5c │ │ add r2, pc, r2 │ │ b 228d40c │ │ ldr r2, [pc, #2280] @ 228ec64 │ │ add r2, pc, r2 │ │ b 228d40c │ │ ldr r2, [pc, #2232] @ 228ec40 │ │ @@ -820052,15 +820051,15 @@ │ │ b 228d40c │ │ ldr r2, [pc, #2216] @ 228ec48 │ │ add r2, pc, r2 │ │ b 228d40c │ │ ldr r2, [pc, #2208] @ 228ec4c │ │ add r2, pc, r2 │ │ b 228d40c │ │ - ldc2l 2, cr3, [r9, #500]! @ 0x1f4 │ │ + ldc2l 2, cr3, [r9, #680]! @ 0x2a8 │ │ ldr r0, [fp, #-148] @ 0xffffff6c │ │ ldr r2, [r7, #40] @ 0x28 │ │ cmp r0, #0 │ │ beq 228e3cc │ │ ldr r0, [r7, #44] @ 0x2c │ │ b 228e3d8 │ │ ldr r1, [r7, #44] @ 0x2c │ │ @@ -820190,16 +820189,16 @@ │ │ cmp r5, #0 │ │ ldr r1, [fp, #-168] @ 0xffffff58 │ │ moveq r1, r5 │ │ add r0, r0, r7 │ │ str r1, [fp, #-168] @ 0xffffff58 │ │ add r6, r6, #8 │ │ b 228e56c │ │ - ldc2l 13, cr6, [fp, #20]! │ │ - ldc2l 11, cr11, [r8, #432]! @ 0x1b0 @ │ │ + ldc2l 13, cr6, [fp, #200]! @ 0xc8 │ │ + ldc2l 11, cr11, [r8, #612]! @ 0x264 @ │ │ mov r7, #0 │ │ str r0, [fp, #-168] @ 0xffffff58 │ │ ldr r1, [fp, #-148] @ 0xffffff6c │ │ ldr r0, [r6] │ │ cmp r1, #0 │ │ reveq r0, r0 │ │ cmp r0, #0 │ │ @@ -820262,15 +820261,15 @@ │ │ ldr r0, [r0, #12] │ │ cmp r0, #0 │ │ beq 228e6fc │ │ rev r2, r1 │ │ ldr r3, [r8, r2] │ │ rev r3, r3 │ │ b 228e704 │ │ - ldc2l 11, cr6, [fp, #820]! @ 0x334 @ │ │ + ldc2l 11, cr6, [fp, #1000]! @ 0x3e8 @ │ │ ldr r3, [r8, r1] │ │ mov r2, r1 │ │ cmn r3, #1 │ │ beq 228e738 │ │ add r2, r8, r2 │ │ ldr r3, [r2], #8 │ │ cmp r0, #0 │ │ @@ -820300,15 +820299,15 @@ │ │ cmn r3, #1 │ │ beq 228e794 │ │ ldr r6, [fp, #-156] @ 0xffffff64 │ │ ldr r3, [r6, r3, lsl #2] │ │ cmp r3, #0 │ │ bne 228e768 │ │ b 228e6bc │ │ - ldc2l 10, cr11, [r8, #208]! @ 0xd0 @ │ │ + ldc2l 10, cr11, [r8, #388]! @ 0x184 @ │ │ cmp r0, #0 │ │ str r7, [fp, #-168] @ 0xffffff58 │ │ str lr, [fp, #-160] @ 0xffffff60 │ │ str r5, [fp, #-184] @ 0xffffff48 │ │ beq 228e7dc │ │ rev r1, r1 │ │ mov r2, ip │ │ @@ -820318,15 +820317,15 @@ │ │ add sl, ip, r1 │ │ add r1, r2, #4 │ │ cmn r3, #1 │ │ bne 228e7f8 │ │ ldr r1, [r1] │ │ rev r1, r1 │ │ b 228e8c4 │ │ - ldc2l 11, cr14, [r8, #824]! @ 0x338 @ │ │ + ldc2l 11, cr14, [r8, #1004]! @ 0x3ec @ │ │ mov r2, ip │ │ ldr r1, [r2, r1]! │ │ ldr r3, [r2, #8] │ │ add sl, ip, r1 │ │ add r1, r2, #4 │ │ cmn r3, #1 │ │ beq 228e8c0 │ │ @@ -820348,15 +820347,15 @@ │ │ mov r0, r2 │ │ mov r1, sl │ │ mov r2, r8 │ │ bl 26fe32c │ │ add sl, sl, r8 │ │ add r4, r4, r8 │ │ b 228e858 │ │ - ldc2l 10, cr11, [r8, #36]! @ 0x24 @ │ │ + ldc2l 10, cr11, [r8, #216]! @ 0xd8 @ │ │ mov r4, r2 │ │ cmn r5, #1 │ │ beq 228e89c │ │ ldr r0, [fp, #-156] @ 0xffffff64 │ │ ldr r6, [r0, r5, lsl #2] │ │ mov r0, r6 │ │ bl 26ffe30 │ │ @@ -820366,15 +820365,15 @@ │ │ mov r2, r5 │ │ bl 26fe32c │ │ ldr r0, [fp, #-152] @ 0xffffff68 │ │ add r2, r4, r5 │ │ add r7, r7, #8 │ │ ldr r0, [r0, #12] │ │ b 228e810 │ │ - ldc2l 10, cr6, [fp, #212]! @ 0xd4 @ │ │ + ldc2l 10, cr6, [fp, #392]! @ 0x188 @ │ │ ldr r0, [fp, #-204] @ 0xffffff34 │ │ ldr r2, [fp, #-148] @ 0xffffff6c │ │ ldr lr, [fp, #-160] @ 0xffffff60 │ │ ldr r1, [r0] │ │ ldr r0, [fp, #-152] @ 0xffffff68 │ │ sub r1, r4, r1 │ │ str r1, [r2, lr, lsl #3] │ │ @@ -820398,16 +820397,16 @@ │ │ add r8, r7, r1 │ │ add r1, r2, #4 │ │ cmn r3, #1 │ │ bne 228e93c │ │ ldr r0, [r1] │ │ rev r0, r0 │ │ b 228e9e0 │ │ - ldc2l 8, cr11, [r8, #624]! @ 0x270 │ │ - ldc2l 13, cr10, [fp, #712]! @ 0x2c8 │ │ + vcmla.f32 , q12, , #270 │ │ + ldc2l 13, cr10, [fp, #892]! @ 0x37c │ │ mov r2, r7 │ │ ldr r1, [r2, r1]! │ │ ldr r3, [r2, #8] │ │ add r8, r7, r1 │ │ add r1, r2, #4 │ │ cmn r3, #1 │ │ beq 228e9dc │ │ @@ -820458,16 +820457,16 @@ │ │ ldr ip, [fp, #-144] @ 0xffffff70 │ │ add lr, lr, #1 │ │ ldr r0, [fp, #-172] @ 0xffffff54 │ │ ldr r1, [fp, #-188] @ 0xffffff44 │ │ ldr r8, [fp, #-208] @ 0xffffff30 │ │ ldr r7, [fp, #-168] @ 0xffffff58 │ │ b 228e6c4 │ │ - ldc2l 5, cr3, [r9, #636]! @ 0x27c │ │ - ldc2l 8, cr6, [fp, #756]! @ 0x2f4 │ │ + ldc2l 5, cr3, [r9, #816]! @ 0x330 │ │ + vcmla.f32 q11, , q13, #270 │ │ ldr r0, [fp, #-196] @ 0xffffff3c │ │ cmp lr, r0 │ │ bne 228eb88 │ │ ldr r4, [fp, #-176] @ 0xffffff50 │ │ ldr r6, [fp, #-212] @ 0xffffff2c │ │ ldr r0, [r4] │ │ cmp r0, #0 │ │ @@ -820485,15 +820484,15 @@ │ │ bcc 228ea3c │ │ ldr r4, [fp, #-196] @ 0xffffff3c │ │ mov r7, #0 │ │ mov sl, r6 │ │ cmp r4, #1 │ │ movls r4, #1 │ │ b 228ea94 │ │ - ldc2l 7, cr11, [r8, #144]! @ 0x90 │ │ + ldc2l 7, cr11, [r8, #324]! @ 0x144 │ │ ldr r3, [fp, #-180] @ 0xffffff4c │ │ add r7, r7, #1 │ │ ldr r0, [r3] │ │ cmp r7, r4 │ │ add r0, r7, r0 │ │ str r0, [sl, r5, lsl #2] │ │ beq 228eb04 │ │ @@ -820537,15 +820536,15 @@ │ │ b 228eb3c │ │ ldr r4, [fp, #-152] @ 0xffffff68 │ │ mov r0, #0 │ │ str r0, [r4, #32] │ │ str r0, [r4, #36] @ 0x24 │ │ ldr r8, [fp, #-164] @ 0xffffff5c │ │ b 228d390 │ │ - ldc2l 7, cr6, [fp, #644]! @ 0x284 │ │ + ldc2l 7, cr6, [fp, #824]! @ 0x338 │ │ mov r0, r5 │ │ bl 2291f64 <_nl_expand_alias@@Base+0x1c44> │ │ cmp r0, #0 │ │ bne 228eb9c │ │ ldr r4, [fp, #-152] @ 0xffffff68 │ │ ldr r0, [r4, #16] │ │ bl 2291934 <_nl_expand_alias@@Base+0x1614> │ │ @@ -820570,85 +820569,85 @@ │ │ bl 2707f50 │ │ bl 2707f50 │ │ bl 2707f50 │ │ bl 2707f50 │ │ bl 2707f50 │ │ bl 2707f50 │ │ bl 2707f50 │ │ - ldc2l 6, cr11, [r8, #32]! │ │ - ldc2l 12, cr6, [r8, #1020]! @ 0x3fc │ │ - ldc2l 1, cr1, [sl, #64]! @ 0x40 │ │ + ldc2l 6, cr11, [r8, #212]! @ 0xd4 │ │ + ldc2l 13, cr6, [r8, #176]! @ 0xb0 │ │ + ldc2l 1, cr1, [sl, #244]! @ 0xf4 │ │ ldc2l 1, cr0, [ip, #732]! @ 0x2dc │ │ - ldc2l 4, cr4, [sl, #232]! @ 0xe8 │ │ - ldc2l 12, cr6, [r8, #492]! @ 0x1ec │ │ - ldc2l 0, cr1, [sl, #512]! @ 0x200 │ │ + ldc2l 4, cr4, [sl, #412]! @ 0x19c │ │ + ldc2l 12, cr6, [r8, #672]! @ 0x2a0 │ │ + ldc2l 0, cr1, [sl, #692]! @ 0x2b4 │ │ ldc2l 1, cr0, [ip, #300]! @ 0x12c │ │ - ldc2l 3, cr4, [sl, #776]! @ 0x308 │ │ - ldc2l 6, cr6, [fp, #980]! @ 0x3d4 │ │ - ldc2l 12, cr6, [r8, #828]! @ 0x33c │ │ - ldc2l 0, cr1, [sl, #896]! @ 0x380 │ │ + ldc2l 3, cr4, [sl, #956]! @ 0x3bc │ │ + ldc2l 7, cr6, [fp, #136]! @ 0x88 │ │ + ldc2l 12, cr6, [r8, #1008]! @ 0x3f0 │ │ + ldc2l 1, cr1, [sl, #52]! @ 0x34 │ │ ldc2l 1, cr0, [ip, #540]! @ 0x21c │ │ - ldc2l 4, cr4, [sl, #40]! @ 0x28 │ │ - ldc2l 5, cr11, [r8, #368]! @ 0x170 │ │ - ldc2l 0, cr15, [r8, #156]! @ 0x9c │ │ - ldc2l 13, cr10, [sl, #512]! @ 0x200 │ │ - ldc2l 2, cr3, [r9, #700]! @ 0x2bc │ │ - ldc2l 10, cr6, [sl, #640]! @ 0x280 @ │ │ - ldc2l 1, cr6, [fp, #372]! @ 0x174 │ │ - ldc2l 6, cr6, [r8, #668]! @ 0x29c │ │ - ldc2l 10, cr0, [sl, #736]! @ 0x2e0 @ │ │ + ldc2l 4, cr4, [sl, #220]! @ 0xdc │ │ + ldc2l 5, cr11, [r8, #548]! @ 0x224 │ │ + ldc2l 0, cr15, [r8, #336]! @ 0x150 │ │ + ldc2l 13, cr10, [sl, #692]! @ 0x2b4 │ │ + ldc2l 2, cr3, [r9, #880]! @ 0x370 │ │ + ldc2l 10, cr6, [sl, #820]! @ 0x334 @ │ │ + ldc2l 1, cr6, [fp, #552]! @ 0x228 │ │ + ldc2l 6, cr6, [r8, #848]! @ 0x350 │ │ + ldc2l 10, cr0, [sl, #916]! @ 0x394 @ │ │ ldc2l 11, cr15, [fp, #380]! @ 0x17c @ │ │ - ldc2l 13, cr3, [sl, #904]! @ 0x388 │ │ - ldc2l 15, cr10, [r8, #784]! @ 0x310 │ │ - ldc2l 6, cr6, [r8, #524]! @ 0x20c │ │ - ldc2l 10, cr0, [sl, #592]! @ 0x250 @ │ │ + ldc2l 14, cr3, [sl, #60]! @ 0x3c │ │ + ldc2l 15, cr10, [r8, #964]! @ 0x3c4 │ │ + ldc2l 6, cr6, [r8, #704]! @ 0x2c0 │ │ + ldc2l 10, cr0, [sl, #772]! @ 0x304 @ │ │ ldc2l 11, cr15, [fp, #44]! @ 0x2c @ │ │ - ldc2l 13, cr3, [sl, #568]! @ 0x238 │ │ - ldc2l 2, cr6, [fp, #84]! @ 0x54 │ │ - ldc2l 6, cr6, [r8, #172]! @ 0xac │ │ - ldc2l 10, cr0, [sl, #240]! @ 0xf0 @ │ │ + ldc2l 13, cr3, [sl, #748]! @ 0x2ec │ │ + ldc2l 2, cr6, [fp, #264]! @ 0x108 │ │ + ldc2l 6, cr6, [r8, #352]! @ 0x160 │ │ + ldc2l 10, cr0, [sl, #420]! @ 0x1a4 @ │ │ ldc2l 10, cr15, [fp, #716]! @ 0x2cc @ │ │ - ldc2l 13, cr3, [sl, #216]! @ 0xd8 │ │ - ldc2l 0, cr11, [r8, #496]! @ 0x1f0 │ │ - ldc2l 7, cr10, [fp, #104]! @ 0x68 │ │ - ldc2l 9, cr14, [r8, #486]! @ 0x1e6 @ │ │ - ldc2l 7, cr10, [sl, #336]! @ 0x150 │ │ - ldc2l 12, cr2, [r9, #540]! @ 0x21c │ │ - ldc2l 4, cr6, [sl, #224]! @ 0xe0 │ │ - ldc2l 15, cr2, [r9, #12]! │ │ - ldc2l 3, cr6, [fp, #1012]! @ 0x3f4 │ │ - ldc2l 7, cr6, [r8, #412]! @ 0x19c │ │ - ldc2l 11, cr0, [sl, #480]! @ 0x1e0 @ │ │ + ldc2l 13, cr3, [sl, #396]! @ 0x18c │ │ + ldc2l 0, cr11, [r8, #676]! @ 0x2a4 │ │ + ldc2l 7, cr10, [fp, #284]! @ 0x11c │ │ + ldc2l 10, cr14, [r8, #128]! @ 0x80 @ │ │ + ldc2l 7, cr10, [sl, #516]! @ 0x204 │ │ + ldc2l 12, cr2, [r9, #720]! @ 0x2d0 │ │ + ldc2l 4, cr6, [sl, #404]! @ 0x194 │ │ + ldc2l 15, cr2, [r9, #192]! @ 0xc0 │ │ + ldc2l 4, cr6, [fp, #168]! @ 0xa8 │ │ + ldc2l 7, cr6, [r8, #592]! @ 0x250 │ │ + ldc2l 11, cr0, [sl, #660]! @ 0x294 @ │ │ ldc2l 12, cr15, [fp, #124]! @ 0x7c │ │ - ldc2l 14, cr3, [sl, #648]! @ 0x288 │ │ - ldc2l 2, cr11, [r8, #400]! @ 0x190 │ │ - ldc2l 7, cr6, [r8, #220]! @ 0xdc │ │ - ldc2l 11, cr0, [sl, #288]! @ 0x120 @ │ │ + ldc2l 14, cr3, [sl, #828]! @ 0x33c │ │ + ldc2l 2, cr11, [r8, #580]! @ 0x244 │ │ + ldc2l 7, cr6, [r8, #400]! @ 0x190 │ │ + ldc2l 11, cr0, [sl, #468]! @ 0x1d4 @ │ │ ldc2l 11, cr15, [fp, #764]! @ 0x2fc @ │ │ - ldc2l 14, cr3, [sl, #264]! @ 0x108 │ │ - ldc2l 4, cr6, [fp, #724]! @ 0x2d4 │ │ - ldc2l 6, cr6, [r8, #956]! @ 0x3bc │ │ - ldc2l 10, cr0, [sl, #928]! @ 0x3a0 @ │ │ + ldc2l 14, cr3, [sl, #444]! @ 0x1bc │ │ + ldc2l 4, cr6, [fp, #904]! @ 0x388 │ │ + ldc2l 7, cr6, [r8, #112]! @ 0x70 │ │ + ldc2l 11, cr0, [sl, #84]! @ 0x54 @ │ │ ldc2l 11, cr15, [fp, #524]! @ 0x20c @ │ │ - ldc2l 14, cr3, [sl, #24]! │ │ - ldc2l 3, cr11, [r8, #112]! @ 0x70 │ │ - ldc2l 9, cr10, [fp, #356]! @ 0x164 @ │ │ - ldc2l 10, cr14, [r8, #668]! @ 0x29c @ │ │ - vcmla.f32 d26, d10, d12, #270 │ │ - ldc2l 13, cr2, [r9, #284]! @ 0x11c │ │ - ldc2l 5, cr6, [sl, #272]! @ 0x110 │ │ - ldc2l 1, cr3, [r9, #636]! @ 0x27c │ │ - ldc2l 0, cr12, [fp, #664]! @ 0x298 │ │ - ldc2l 13, cr2, [sl, #384]! @ 0x180 │ │ - ldc2l 12, cr4, [r9, #932]! @ 0x3a4 │ │ - ldc2l 7, cr8, [sl, #916]! @ 0x394 │ │ - ldc2l 9, cr6, [r8, #454]! @ 0x1c6 @ │ │ - ldc2l 13, cr0, [sl, #928]! @ 0x3a0 │ │ + ldc2l 14, cr3, [sl, #204]! @ 0xcc │ │ + ldc2l 3, cr11, [r8, #292]! @ 0x124 │ │ + ldc2l 9, cr10, [fp, #446]! @ 0x1be @ │ │ + ldc2l 10, cr14, [r8, #848]! @ 0x350 @ │ │ + ldc2l 8, cr10, [sl, #228]! @ 0xe4 │ │ + ldc2l 13, cr2, [r9, #464]! @ 0x1d0 │ │ + ldc2l 5, cr6, [sl, #452]! @ 0x1c4 │ │ + ldc2l 1, cr3, [r9, #816]! @ 0x330 │ │ + ldc2l 0, cr12, [fp, #844]! @ 0x34c │ │ + ldc2l 13, cr2, [sl, #564]! @ 0x234 │ │ + ldc2l 13, cr4, [r9, #88]! @ 0x58 │ │ + ldc2l 8, cr8, [sl, #72]! @ 0x48 │ │ + ldc2l 10, cr6, [r8, #64]! @ 0x40 @ │ │ + ldc2l 14, cr0, [sl, #84]! @ 0x54 │ │ ldc2l 14, cr15, [fp, #716]! @ 0x2cc │ │ - ldc2l 1, cr4, [sl, #168]! @ 0xa8 │ │ + ldc2l 1, cr4, [sl, #348]! @ 0x15c │ │ ldrb r1, [r0] │ │ cmp r1, #0 │ │ beq 228ed1c │ │ add r2, r0, #1 │ │ mov r0, #0 │ │ mov ip, #240 @ 0xf0 │ │ add r0, r1, r0, lsl #4 │ │ @@ -821272,40 +821271,40 @@ │ │ bl 2707f50 │ │ bl 2707f50 │ │ bl 2707f50 │ │ @ instruction: 0x0050269c │ │ subeq r9, fp, r4, lsl #10 │ │ ldc2l 2, cr15, [fp, #168]! @ 0xa8 │ │ subeq r7, r9, ip, lsr r0 │ │ - ldc2l 7, cr1, [r9, #164]! @ 0xa4 │ │ + ldc2l 7, cr1, [r9, #344]! @ 0x158 │ │ subseq r2, r0, r0, lsr r6 │ │ subseq r2, r0, ip, lsl r6 │ │ ldrdeq r0, [r0], -ip │ │ ldrsheq r2, [r0], #-84 @ 0xffffffac │ │ subeq ip, sl, r4, lsl #4 │ │ subseq r2, r0, r8, lsl r0 │ │ subseq r2, r0, r4, ror #10 │ │ subseq r2, r0, r4, lsr #10 │ │ subseq r2, r0, ip, lsl #10 │ │ vcmla.f16 q0, , d13[0], #0 │ │ - ldc2l 14, cr12, [sl, #876]! @ 0x36c │ │ - ldc2l 5, cr10, [fp, #864]! @ 0x360 │ │ + ldc2l 15, cr12, [sl, #32]! │ │ + ldc2l 6, cr10, [fp, #20]! │ │ subseq r2, r0, ip, lsr #6 │ │ - ldc2l 13, cr12, [sl, #524]! @ 0x20c │ │ - ldc2l 2, cr13, [fp, #32]! │ │ + ldc2l 13, cr12, [sl, #704]! @ 0x2c0 │ │ + ldc2l 2, cr13, [fp, #212]! @ 0xd4 │ │ ldrheq r2, [r0], #-12 │ │ subeq fp, sl, r8, ror #25 │ │ @ instruction: 0x00502090 │ │ andeq r0, r0, r0, asr r2 │ │ subseq r2, r0, r8, rrx │ │ subeq fp, sl, ip, lsl #28 │ │ subseq r2, r0, r4, asr #2 │ │ subseq r1, r0, ip, lsr pc │ │ subseq r1, r0, r4, asr pc │ │ - ldc2l 10, cr10, [fp, #292]! @ 0x124 @ │ │ + ldc2l 10, cr10, [fp, #472]! @ 0x1d8 @ │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r5, r1 │ │ ldr r1, [r0, #16] │ │ mov r4, r0 │ │ add r0, r0, #28 │ │ ldr r2, [r5, #16] │ │ @@ -822151,15 +822150,15 @@ │ │ bl 2707f50 │ │ ldr r4, [r0, #4] │ │ b 2290434 <_nl_expand_alias@@Base+0x114> │ │ bl 2707f50 │ │ subseq r1, r0, r8, asr #4 │ │ subseq r1, r0, ip, lsr #4 │ │ subseq r1, r0, ip, lsl r2 │ │ - ldc2l 2, cr0, [r9, #852]! @ 0x354 │ │ + ldc2l 3, cr0, [r9, #8]! │ │ andeq r0, r0, r4, lsl r1 │ │ subseq r1, r0, r8, lsl #4 │ │ ldrsheq r1, [r0], #-20 @ 0xffffffec │ │ ldrsbeq r1, [r0], #-16 │ │ subseq r1, r0, r0, asr r1 │ │ subseq r1, r0, r4, asr #2 │ │ ldr r1, [r1] │ │ @@ -822456,15 +822455,15 @@ │ │ bl 270ae60 │ │ b 2290920 <_nl_expand_alias@@Base+0x600> │ │ mov r4, #0 │ │ mov r0, r4 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldc2l 11, cr1, [ip, #64]! @ 0x40 @ │ │ - ldc2l 6, cr14, [sl, #56]! @ 0x38 │ │ + ldc2l 6, cr14, [sl, #236]! @ 0xec │ │ subseq r0, r0, ip, ror #29 │ │ ldrsbeq r0, [r0], #-236 @ 0xffffff14 │ │ ldrheq r0, [r0], #-236 @ 0xffffff14 │ │ subseq r0, r0, ip, lsr #29 │ │ @ instruction: 0x00500e9c │ │ subseq r0, r0, ip, ror lr │ │ subseq r0, r0, r0, ror lr │ │ @@ -822653,16 +822652,16 @@ │ │ str r0, [sp, #4] │ │ add r0, sp, #4 │ │ bl 2290c50 <_nl_expand_alias@@Base+0x930> │ │ cmp r0, #0 │ │ bne 2290bb0 <_nl_expand_alias@@Base+0x890> │ │ ldr r0, [sp, #8] │ │ b 2290bc0 <_nl_expand_alias@@Base+0x8a0> │ │ - ldc2l 4, cr0, [r9, #248]! @ 0xf8 │ │ - ldc2l 12, cr3, [sl, #172]! @ 0xac │ │ + ldc2l 4, cr0, [r9, #428]! @ 0x1ac │ │ + ldc2l 12, cr3, [sl, #352]! @ 0x160 │ │ subeq r5, r9, r8, ror r3 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ sub sp, sp, #1024 @ 0x400 │ │ str r0, [sp, #20] │ │ sub r0, fp, #232 @ 0xe8 │ │ @@ -823421,22 +823420,22 @@ │ │ bl 2707f50 │ │ subeq pc, pc, r0, ror #30 │ │ subeq pc, pc, ip, asr #30 │ │ subeq pc, pc, r0, lsr pc @ │ │ subeq pc, pc, r0, lsl pc @ │ │ subeq pc, pc, r0, lsl #30 │ │ ldrdeq pc, [pc], #-236 @ │ │ - ldc2l 11, cr7, [r8, #704]! @ 0x2c0 @ │ │ + ldc2l 11, cr7, [r8, #884]! @ 0x374 @ │ │ strheq pc, [pc], #-224 @ │ │ - ldc2l 11, cr5, [r8, #504]! @ 0x1f8 @ │ │ - ldc2l 9, cr9, [r8, #262]! @ 0x106 @ │ │ - ldc2l 9, cr11, [r9, #66]! @ 0x42 @ │ │ - vcmla.f32 q12, , q3, #270 │ │ + ldc2l 11, cr5, [r8, #684]! @ 0x2ac @ │ │ + ldc2l 9, cr9, [r8, #352]! @ 0x160 @ │ │ + ldc2l 9, cr11, [r9, #156]! @ 0x9c @ │ │ + ldc2l 8, cr8, [fp, #972]! @ 0x3cc │ │ ldc2l 9, cr12, [fp, #130]! @ 0x82 @ │ │ - ldc2l 7, cr15, [r8, #824]! @ 0x338 │ │ + ldc2l 7, cr15, [r8, #1004]! @ 0x3ec │ │ subeq pc, pc, r4, lsl #27 │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ mov r4, r0 │ │ mov r6, r1 │ │ mov r0, #34 @ 0x22 │ │ mov r1, r4 │ │ @@ -823479,16 +823478,16 @@ │ │ bl 2703070 │ │ b 22918bc <_nl_expand_alias@@Base+0x159c> │ │ mov r0, #34 @ 0x22 │ │ mov r1, r4 │ │ pop {r4, r5, r6, r7, r8, sl, fp, lr} │ │ b 270ae80 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 1, cr3, [r8, #100]! @ 0x64 │ │ - ldc2l 13, cr0, [fp, #972]! @ 0x3cc │ │ + ldc2l 1, cr3, [r8, #280]! @ 0x118 │ │ + ldc2l 14, cr0, [fp, #128]! @ 0x80 │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ bl 2702800 │ │ mov r5, r0 │ │ ldr r6, [r0] │ │ mov r0, r4 │ │ @@ -823510,16 +823509,16 @@ │ │ ldr r4, [pc, #24] @ 22919ac <_nl_expand_alias@@Base+0x168c> │ │ add r1, pc, r1 │ │ add r4, pc, r4 │ │ movne r4, r1 │ │ mov r0, r4 │ │ pop {r4, sl, fp, pc} │ │ bl 2707f50 │ │ - ldc2l 6, cr10, [sl, #284]! @ 0x11c │ │ - ldc2l 7, cr11, [r9, #100]! @ 0x64 │ │ + ldc2l 6, cr10, [sl, #464]! @ 0x1d0 │ │ + ldc2l 7, cr11, [r9, #280]! @ 0x118 │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #6 │ │ beq 2291a18 <_nl_expand_alias@@Base+0x16f8> │ │ ldr r0, [pc, #84] @ 2291a1c <_nl_expand_alias@@Base+0x16fc> │ │ mov r4, r1 │ │ add r0, pc, r0 │ │ @@ -823539,16 +823538,16 @@ │ │ bl 2704220 │ │ cmp r0, #0 │ │ ldrbne r1, [r0] │ │ cmpne r1, #0 │ │ moveq r0, #0 │ │ pop {r4, sl, fp, pc} │ │ bl 2707f50 │ │ - ldc2l 13, cr2, [sl, #944]! @ 0x3b0 │ │ - ldc2l 3, cr13, [r9, #780]! @ 0x30c │ │ + ldc2l 14, cr2, [sl, #100]! @ 0x64 │ │ + ldc2l 3, cr13, [r9, #960]! @ 0x3c0 │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ ldr r0, [pc, #80] @ 2291a84 <_nl_expand_alias@@Base+0x1764> │ │ mov r4, r1 │ │ add r0, pc, r0 │ │ bl 2704220 │ │ cmp r0, #0 │ │ @@ -823565,20 +823564,20 @@ │ │ add r0, pc, r0 │ │ bl 2704220 │ │ cmp r0, #0 │ │ ldrbne r1, [r0] │ │ cmpne r1, #0 │ │ moveq r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 13, cr2, [sl, #512]! @ 0x200 │ │ - ldc2l 3, cr13, [r9, #348]! @ 0x15c │ │ + ldc2l 13, cr2, [sl, #692]! @ 0x2b4 │ │ + ldc2l 3, cr13, [r9, #528]! @ 0x210 │ │ ldr r0, [pc, #4] @ 2291a98 <_nl_expand_alias@@Base+0x1778> │ │ add r0, pc, r0 │ │ bx lr │ │ - ldc2l 5, cr10, [sl, #284]! @ 0x11c │ │ + ldc2l 5, cr10, [sl, #464]! @ 0x1d0 │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #6 │ │ beq 2291b4c <_nl_expand_alias@@Base+0x182c> │ │ mov r0, #0 │ │ mov r4, r1 │ │ bl 270ae90 │ │ @@ -823616,19 +823615,19 @@ │ │ ldr r1, [pc, #36] @ 2291b60 <_nl_expand_alias@@Base+0x1840> │ │ cmp r0, #0 │ │ add r1, pc, r1 │ │ movne r1, r0 │ │ mov r0, r1 │ │ pop {r4, sl, fp, pc} │ │ bl 2707f50 │ │ - ldc2l 5, cr10, [sl, #12]! │ │ - ldc2l 5, cr11, [r9, #852]! @ 0x354 │ │ - ldc2l 12, cr2, [sl, #816]! @ 0x330 │ │ - ldc2l 2, cr13, [r9, #652]! @ 0x28c │ │ - ldc2l 4, cr10, [sl, #620]! @ 0x26c │ │ + ldc2l 5, cr10, [sl, #192]! @ 0xc0 │ │ + ldc2l 6, cr11, [r9, #8]! │ │ + ldc2l 12, cr2, [sl, #996]! @ 0x3e4 │ │ + ldc2l 2, cr13, [r9, #832]! @ 0x340 │ │ + ldc2l 4, cr10, [sl, #800]! @ 0x320 │ │ push {fp, lr} │ │ mov fp, sp │ │ cmp r0, #6 │ │ beq 2291b90 <_nl_expand_alias@@Base+0x1870> │ │ bl 229195c <_nl_expand_alias@@Base+0x163c> │ │ cmp r0, #0 │ │ beq 2291b88 <_nl_expand_alias@@Base+0x1868> │ │ @@ -823717,15 +823716,15 @@ │ │ bne 2291cdc <_nl_expand_alias@@Base+0x19bc> │ │ add r5, r6, #4 │ │ mov r0, r5 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ bl 2707f50 │ │ bl 2707f50 │ │ strheq pc, [pc], #-152 @ │ │ - ldc2l 3, cr10, [sl, #220]! @ 0xdc │ │ + ldc2l 3, cr10, [sl, #400]! @ 0x190 │ │ subeq pc, pc, ip, asr #26 │ │ subeq pc, pc, ip, ror #25 │ │ push {fp, lr} │ │ mov fp, sp │ │ cmp r0, #6 │ │ beq 2291d1c <_nl_expand_alias@@Base+0x19fc> │ │ bl 22919b0 <_nl_expand_alias@@Base+0x1690> │ │ @@ -855560,16 +855559,16 @@ │ │ cdp2 0, 0, cr8, cr1, cr3, {6} │ │ mcr2 0, 0, r8, cr1, cr12, {6} │ │ mcr2 0, 0, r8, cr1, cr11, {6} │ │ mcr2 0, 0, r8, cr1, cr11, {4} │ │ mcr2 0, 0, r8, cr1, cr8, {4} │ │ cdp2 1, 0, cr8, cr1, cr5, {2} │ │ cdp2 1, 0, cr8, cr1, cr2, {2} │ │ - cdp2 7, 0, cr4, cr1, cr6, {7} │ │ - ldc2l 9, cr15, [sl, #52]! @ 0x34 @ │ │ + cdp2 15, 0, cr10, cr1, cr11, {2} │ │ + ldc2l 9, cr15, [r6, #52]! @ 0x34 @ │ │ lsls r0, r1, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w fp, [sp, #-4]! │ │ ldr.w r5, [r0, #332] @ 0x14c │ │ mov r4, r0 │ │ ldr r0, [r5, #24] │ │ @@ -894321,15 +894320,15 @@ │ │ popeq {r4, r6, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ mov sl, r8 │ │ lsls r7, r0, #1 │ │ ldr r6, [pc, #240] @ (22c302c ) │ │ lsls r7, r0, #1 │ │ - ldr r6, [sp, #276] @ 0x114 │ │ + ldr r6, [sp, #456] @ 0x1c8 │ │ ldc2l 6, cr4, [r5, #624]! @ 0x270 │ │ lsls r7, r0, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ str.w r8, [sp, #-4]! │ │ sub sp, #32 │ │ ldr r0, [r0, #0] │ │ @@ -894696,15 +894695,15 @@ │ │ lsls r7, r7, #11 │ │ movs r0, r0 │ │ lsls r7, r6, #8 │ │ movs r0, r0 │ │ lsls r7, r3, #3 │ │ movs r0, r0 │ │ ldmia r3!, {r0, r1, r2, r5, r6} │ │ - ldc2l 5, cr1, [r8, #952]! @ 0x3b8 │ │ + ldc2l 6, cr1, [r8, #108]! @ 0x6c │ │ ldc2l 2, cr4, [r7, #672]! @ 0x2a0 │ │ lsls r7, r0, #1 │ │ push {r4, r5, r6, r7, lr} │ │ add r7, sp, #12 │ │ stmdb sp!, {r8, r9, sl, fp} │ │ sub sp, #12 │ │ ldr.w sl, [r0, #4] │ │ @@ -899727,17 +899726,17 @@ │ │ popeq {r4, r5, r7, pc} │ │ blx 26ffae0 │ │ nop │ │ subs r4, r1, #1 │ │ lsls r0, r1, #1 │ │ asrs r2, r5, #32 │ │ lsls r7, r0, #1 │ │ - stmia r1!, {r0, r1, r2, r4, r5, r6} │ │ - ldc2l 5, cr14, [r7, #128]! @ 0x80 │ │ - ldc2l 10, cr10, [r4, #180]! @ 0xb4 @ │ │ + stmia r1!, {r2, r5, r7} │ │ + ldc2l 5, cr14, [r7, #308]! @ 0x134 │ │ + ldc2l 10, cr10, [r4, #360]! @ 0x168 @ │ │ ldc2l 13, cr1, [r5, #488]! @ 0x1e8 │ │ lsls r0, r1, #1 │ │ lsrs r0, r1, #29 │ │ lsls r7, r0, #1 │ │ │ │ 022c66a4 : │ │ push {r7, lr} │ │ @@ -954476,15 +954475,15 @@ │ │ beq 22edfac │ │ b 22edff0 │ │ add r1, r1, #1 │ │ mov r0, #128 @ 0x80 │ │ b 22edee0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 12, cr10, [r4, #956]! @ 0x3bc │ │ + ldc2l 13, cr10, [r4, #112]! @ 0x70 │ │ │ │ 022edffc : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ bl 22ee1f0 │ │ cmp r0, #0 │ │ @@ -954562,15 +954561,15 @@ │ │ pop {r4, r5, fp, pc} │ │ mov r0, #1 │ │ pop {r4, r5, fp, pc} │ │ mov r0, r5 │ │ bl 2703030 │ │ mov r0, #81 @ 0x51 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 4, cr2, [r4, #248]! @ 0xf8 │ │ + ldc2l 4, cr2, [r4, #428]! @ 0x1ac │ │ strheq r0, [r0], -r0 @ │ │ andeq r0, r0, ip, lsr #32 │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ cmp r3, #0 │ │ bne 22ee174 │ │ ldr r6, [r0, #4] │ │ @@ -955491,16 +955490,16 @@ │ │ mov r1, r4 │ │ ldr r0, [r0, #4] │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 22f64c8 │ │ mov r7, #6 │ │ b 22ee760 │ │ - ldc2l 11, cr7, [r4, #188]! @ 0xbc @ │ │ - ldc2l 3, cr14, [r3, #212]! @ 0xd4 │ │ + ldc2l 11, cr7, [r4, #368]! @ 0x170 @ │ │ + ldc2l 3, cr14, [r3, #392]! @ 0x188 │ │ │ │ 022eefb4 : │ │ add r0, r0, r0, asr #31 │ │ add r0, r0, #32768 @ 0x8000 │ │ bfc r0, #0, #16 │ │ bx lr │ │ │ │ @@ -956889,30 +956888,30 @@ │ │ cmp r2, #0 │ │ beq 22f050c │ │ ldr r1, [pc, #12] @ 22f0514 │ │ add r1, pc, r1 │ │ bx r2 │ │ mov r0, #0 │ │ bx lr │ │ - ldc2l 3, cr6, [r4, #636]! @ 0x27c │ │ + ldc2l 3, cr6, [r4, #816]! @ 0x330 │ │ │ │ 022f0518 : │ │ cmp r0, #0 │ │ beq 22f0540 │ │ ldr r0, [r0, #96] @ 0x60 │ │ ldr r1, [r0] │ │ ldr r2, [r1, #32] │ │ cmp r2, #0 │ │ beq 22f0540 │ │ ldr r1, [pc, #12] @ 22f0548 │ │ add r1, pc, r1 │ │ bx r2 │ │ mov r0, #0 │ │ bx lr │ │ - ldc2l 3, cr6, [r4, #428]! @ 0x1ac │ │ + ldc2l 3, cr6, [r4, #608]! @ 0x260 │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r2, [r0, #4] │ │ mov r4, r1 │ │ mov r1, #96 @ 0x60 │ │ mov r5, r0 │ │ blx r2 │ │ @@ -958738,16 +958737,16 @@ │ │ str r5, [r0, #80] @ 0x50 │ │ mov r0, #0 │ │ movwge r0, #1 │ │ orr r1, r1, r0 │ │ uxtb r0, r1 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 3, cr8, [r5, #900]! @ 0x384 │ │ - ldc2l 3, cr8, [r5, #804]! @ 0x324 │ │ + ldc2l 4, cr8, [r5, #56]! @ 0x38 │ │ + ldc2l 3, cr8, [r5, #984]! @ 0x3d8 │ │ │ │ 022f21e0 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ cmp r0, #0 │ │ movne r4, r1 │ │ cmpne r1, #0 │ │ @@ -960310,15 +960309,15 @@ │ │ mov r2, r6 │ │ b 22f3838 │ │ nop {0} │ │ nop {0} │ │ andeq r0, r1, r0 │ │ ... │ │ andeq r0, r1, r0 │ │ - ldc2l 7, cr3, [r4, #924]! @ 0x39c │ │ + ldc2l 8, cr3, [r4, #80]! @ 0x50 │ │ subeq r3, r3, r0, rrx │ │ umaaleq r2, r3, r8, pc @ │ │ │ │ 022f3a1c : │ │ cmp r1, #0 │ │ moveq r0, #6 │ │ bxeq lr │ │ @@ -961755,15 +961754,15 @@ │ │ mov r3, r8 │ │ pop {r4, r5, r6, r7, r8, r9, fp, lr} │ │ bx ip │ │ mov r0, #35 @ 0x23 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ mov r0, #6 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 11, cr3, [r4, #604]! @ 0x25c @ │ │ + ldc2l 11, cr3, [r4, #784]! @ 0x310 @ │ │ │ │ 022f5020 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ beq 22f5090 │ │ movw ip, #26979 @ 0x6963 │ │ @@ -961884,15 +961883,15 @@ │ │ mov sl, #0 │ │ str r0, [r5, #92] @ 0x5c │ │ b 22f5204 │ │ mov sl, #35 @ 0x23 │ │ mov r0, sl │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 6, cr3, [r5, #172]! @ 0xac │ │ + ldc2l 6, cr3, [r5, #352]! @ 0x160 │ │ │ │ 022f5214 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ mov r4, r0 │ │ cmp r4, #0 │ │ @@ -961921,15 +961920,15 @@ │ │ mvn r0, #0 │ │ ldreq r0, [sp, #4] │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ mvn r0, #0 │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 5, cr3, [r5, #332]! @ 0x14c │ │ + ldc2l 5, cr3, [r5, #512]! @ 0x200 │ │ │ │ 022f52a0 : │ │ mov r1, r0 │ │ cmp r1, #0 │ │ ldrne r3, [r1] │ │ mvn r0, #0 │ │ cmpne r3, #0 │ │ @@ -962430,15 +962429,15 @@ │ │ mov r0, r3 │ │ mov r3, r2 │ │ mov r1, r7 │ │ mov r2, r6 │ │ blx r5 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 14, cr2, [r5, #156]! @ 0x9c │ │ + ldc2l 14, cr2, [r5, #336]! @ 0x150 │ │ │ │ 022f5a6c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ cmp r0, #0 │ │ mvn r4, #0 │ │ @@ -962492,15 +962491,15 @@ │ │ ldr r1, [r0, #12] │ │ mov r2, sl │ │ ldr r3, [r1, #24] │ │ mov r1, r6 │ │ blx r3 │ │ mov r4, r0 │ │ b 22f5a8c │ │ - ldc2l 12, cr2, [r5, #1004]! @ 0x3ec │ │ + ldc2l 13, cr2, [r5, #160]! @ 0xa0 │ │ │ │ 022f5b5c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ cmp r0, #0 │ │ mov sl, #0 │ │ @@ -962553,15 +962552,15 @@ │ │ beq 22f5b80 │ │ ldr r2, [r0, #12] │ │ ldr r1, [r5, #100] @ 0x64 │ │ ldr r2, [r2, #28] │ │ blx r2 │ │ mov sl, r0 │ │ b 22f5b80 │ │ - ldc2l 12, cr2, [r5, #44]! @ 0x2c │ │ + ldc2l 12, cr2, [r5, #224]! @ 0xe0 │ │ │ │ 022f5c48 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ cmp r0, #0 │ │ mov r4, #0 │ │ @@ -962615,15 +962614,15 @@ │ │ ldr r2, [r0, #12] │ │ ldr r1, [r6, #100] @ 0x64 │ │ ldr r3, [r2, #32] │ │ mov r2, sl │ │ blx r3 │ │ mov r4, r0 │ │ b 22f5c6c │ │ - ldc2l 11, cr2, [r5, #124]! @ 0x7c @ │ │ + ldc2l 11, cr2, [r5, #304]! @ 0x130 @ │ │ │ │ 022f5d38 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ cmp r0, #0 │ │ mov r4, #0 │ │ @@ -962677,15 +962676,15 @@ │ │ ldr r2, [r0, #12] │ │ ldr r1, [r6, #100] @ 0x64 │ │ ldr r3, [r2, #36] @ 0x24 │ │ mov r2, sl │ │ blx r3 │ │ mov r4, r0 │ │ b 22f5d5c │ │ - ldc2l 10, cr2, [r5, #188]! @ 0xbc @ │ │ + ldc2l 10, cr2, [r5, #368]! @ 0x170 @ │ │ │ │ 022f5e28 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ cmpne r1, #0 │ │ beq 22f5e54 │ │ @@ -962723,15 +962722,15 @@ │ │ str r2, [r3, #40] @ 0x28 │ │ cmp r5, #0 │ │ ldrne r2, [r5, #4] │ │ cmpne r2, #0 │ │ beq 22f5e54 │ │ pop {r4, r5, fp, lr} │ │ bx r2 │ │ - ldc2l 12, cr10, [r4, #588]! @ 0x24c │ │ + ldc2l 12, cr10, [r4, #768]! @ 0x300 │ │ │ │ 022f5ed8 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ cmp r0, #0 │ │ beq 22f5efc │ │ cmp r2, #0 │ │ @@ -962789,15 +962788,15 @@ │ │ cmp r7, #0 │ │ beq 22f5fcc │ │ mov ip, r7 │ │ pop {r4, r5, r6, r7, r8, sl, fp, lr} │ │ bx ip │ │ mov r0, ip │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 11, cr10, [r4, #732]! @ 0x2dc @ │ │ + ldc2l 11, cr10, [r4, #912]! @ 0x390 @ │ │ │ │ 022f5fd8 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ ldrne r3, [r0, #128] @ 0x80 │ │ ldrne r1, [r3, #28] │ │ @@ -962828,15 +962827,15 @@ │ │ str r2, [r3, #28] │ │ cmp r1, #0 │ │ ldrne r1, [r1] │ │ cmpne r1, #0 │ │ beq 22f5ff4 │ │ pop {r4, sl, fp, lr} │ │ bx r1 │ │ - ldc2l 15, cr4, [r3, #368]! @ 0x170 │ │ + ldc2l 15, cr4, [r3, #548]! @ 0x224 │ │ │ │ 022f606c : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ ldrbne r2, [r0, #8] │ │ tstne r2, #8 │ │ @@ -962859,15 +962858,15 @@ │ │ cmp r0, #0 │ │ beq 22f6084 │ │ mov r1, r5 │ │ mov r0, r4 │ │ ldr r2, [r2, #4] │ │ pop {r4, r5, fp, lr} │ │ bx r2 │ │ - ldc2l 13, cr8, [r3, #904]! @ 0x388 │ │ + ldc2l 14, cr8, [r3, #60]! @ 0x3c │ │ │ │ 022f60e0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ mov ip, r0 │ │ cmp ip, #0 │ │ @@ -962903,15 +962902,15 @@ │ │ mov r3, r5 │ │ str r9, [fp, #8] │ │ mov r0, sl │ │ mov ip, r7 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ bx ip │ │ - ldc2l 13, cr8, [r3, #344]! @ 0x158 │ │ + ldc2l 13, cr8, [r3, #524]! @ 0x20c │ │ │ │ 022f6188 : │ │ mov ip, r0 │ │ mov r0, #35 @ 0x23 │ │ cmp ip, #0 │ │ bxeq lr │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ @@ -962946,15 +962945,15 @@ │ │ mov r0, r8 │ │ mov r5, r6 │ │ str r6, [sp] │ │ blx r7 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, lr} │ │ bx lr │ │ - ldc2l 12, cr8, [r3, #744]! @ 0x2e8 │ │ + ldc2l 12, cr8, [r3, #924]! @ 0x39c │ │ │ │ 022f622c : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ mov r4, r0 │ │ cmp r4, #0 │ │ @@ -962983,15 +962982,15 @@ │ │ blx r2 │ │ mov r1, r0 │ │ ldr r0, [sp] │ │ cmp r1, #0 │ │ movne r0, #0 │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 5, cr2, [r5, #236]! @ 0xec │ │ + ldc2l 5, cr2, [r5, #416]! @ 0x1a0 │ │ │ │ 022f62b8 : │ │ cmp r0, #0 │ │ beq 22f62e0 │ │ ldr r2, [r0] │ │ mov r1, r0 │ │ mov r0, #35 @ 0x23 │ │ @@ -963895,15 +963894,15 @@ │ │ bx ip │ │ mov r0, #33 @ 0x21 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ mov r0, #11 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ mov r0, #7 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 7, cr1, [r5, #336]! @ 0x150 │ │ + ldc2l 7, cr1, [r5, #516]! @ 0x204 │ │ │ │ 022f70b8 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ cmp r0, #0 │ │ beq 22f718c │ │ mov r4, r1 │ │ @@ -963957,15 +963956,15 @@ │ │ bx r3 │ │ mov r0, #33 @ 0x21 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ mov r0, #11 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ mov r0, #7 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 6, cr1, [r5, #384]! @ 0x180 │ │ + ldc2l 6, cr1, [r5, #564]! @ 0x234 │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ cmp r0, #0 │ │ beq 22f7280 │ │ mov r4, r1 │ │ mov r1, r0 │ │ mov r0, #6 │ │ @@ -964018,15 +964017,15 @@ │ │ bx ip │ │ mov r0, #33 @ 0x21 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ mov r0, #11 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ mov r0, #7 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 5, cr1, [r5, #448]! @ 0x1c0 │ │ + ldc2l 5, cr1, [r5, #628]! @ 0x274 │ │ │ │ 022f729c : │ │ cmp r0, #0 │ │ moveq r0, #33 @ 0x21 │ │ ldrne r1, [r0, #204] @ 0xcc │ │ addne r1, r1, #1 │ │ strne r1, [r0, #204] @ 0xcc │ │ @@ -964241,15 +964240,15 @@ │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ blx r2 │ │ cmp r0, #0 │ │ ldrne r8, [r0] │ │ mov r0, r8 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 3, cr15, [r3, #172]! @ 0xac │ │ + ldc2l 3, cr15, [r3, #352]! @ 0x160 │ │ ldc2l 11, cr6, [r5, #848]! @ 0x350 @ │ │ │ │ 022f75ec : │ │ mov ip, r0 │ │ mov r0, #6 │ │ cmp ip, #0 │ │ bxeq lr │ │ @@ -965894,19 +965893,19 @@ │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ ldr r0, [r6] │ │ bic r0, r0, r0, asr #31 │ │ str r0, [r9, #68] @ 0x44 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 15, cr7, [r4, #392]! @ 0x188 │ │ - ldc2l 7, cr14, [r1, #332]! @ 0x14c │ │ - ldc2l 2, cr14, [r2, #928]! @ 0x3a0 │ │ - ldc2l 12, cr13, [r3, #752]! @ 0x2f0 │ │ - ldc2l 3, cr2, [r3, #516]! @ 0x204 │ │ + ldc2l 15, cr7, [r4, #572]! @ 0x23c │ │ + ldc2l 7, cr14, [r1, #512]! @ 0x200 │ │ + ldc2l 3, cr14, [r2, #84]! @ 0x54 │ │ + ldc2l 12, cr13, [r3, #932]! @ 0x3a4 │ │ + ldc2l 3, cr2, [r3, #696]! @ 0x2b8 │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r6, r1 │ │ ldr r1, [pc, #188] @ 22f901c │ │ mov r5, r0 │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ @@ -965951,17 +965950,17 @@ │ │ str r0, [r4] │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ ldrb r0, [r5, #32] │ │ strb r0, [r4] │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 11, cr7, [r4, #776]! @ 0x308 @ │ │ - ldc2l 3, cr14, [r1, #732]! @ 0x2dc │ │ - ldc2l 9, cr13, [r3, #64]! @ 0x40 @ │ │ + ldc2l 11, cr7, [r4, #956]! @ 0x3bc @ │ │ + ldc2l 3, cr14, [r1, #912]! @ 0x390 │ │ + ldc2l 9, cr13, [r3, #154]! @ 0x9a @ │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #60 @ 0x3c │ │ ldr r7, [r1, #20] │ │ mov r4, r3 │ │ mov r6, r2 │ │ mov r5, r1 │ │ @@ -969005,16 +969004,16 @@ │ │ uxtb r1, r0 │ │ cmp r1, #2 │ │ beq 22fbabc │ │ b 22fbaf0 │ │ mov r0, #64 @ 0x40 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 13, cr6, [r2, #880]! @ 0x370 │ │ - ldc2l 14, cr0, [r2, #528]! @ 0x210 │ │ + ldc2l 14, cr6, [r2, #36]! @ 0x24 │ │ + ldc2l 14, cr0, [r2, #708]! @ 0x2c4 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ mov r5, r0 │ │ ldr r4, [fp, #8] │ │ ldr r7, [r5] │ │ mov r0, #0 │ │ @@ -969590,18 +969589,18 @@ │ │ mov r2, r9 │ │ mov r3, #0 │ │ strd r0, [sp] │ │ mov r0, sl │ │ mov r1, r7 │ │ bl 22fbf64 │ │ b 22fc3d4 │ │ - ldc2l 5, cr0, [r2, #704]! @ 0x2c0 │ │ - ldc2l 0, cr10, [r3, #332]! @ 0x14c │ │ - ldc2l 3, cr12, [r3, #188]! @ 0xbc │ │ - ldc2l 0, cr10, [r3, #412]! @ 0x19c │ │ + ldc2l 5, cr0, [r2, #884]! @ 0x374 │ │ + ldc2l 0, cr10, [r3, #512]! @ 0x200 │ │ + ldc2l 3, cr12, [r3, #368]! @ 0x170 │ │ + ldc2l 0, cr10, [r3, #592]! @ 0x250 │ │ mov r0, #0 │ │ cmp r1, #0 │ │ ldr r2, [sp] │ │ str r0, [r3] │ │ moveq r0, #81 @ 0x51 │ │ bxeq lr │ │ movw r3, #5639 @ 0x1607 │ │ @@ -969675,15 +969674,15 @@ │ │ cmp r7, #0 │ │ bne 22fc948 │ │ mov r7, #0 │ │ str r5, [r8] │ │ b 22fc960 │ │ mov r7, #81 @ 0x51 │ │ b 22fc948 │ │ - ldc2l 9, cr8, [r2, #330]! @ 0x14a @ │ │ + ldc2l 9, cr8, [r2, #420]! @ 0x1a4 @ │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ mov r7, r0 │ │ mov r0, r2 │ │ mov r4, r3 │ │ mov r5, r2 │ │ bl 26ffe30 │ │ @@ -969774,15 +969773,15 @@ │ │ mov r1, r0 │ │ mov r0, #0 │ │ str r1, [r4] │ │ str r0, [r2] │ │ pop {r4, sl, fp, pc} │ │ mov r0, #64 @ 0x40 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 4, cr12, [r2, #844]! @ 0x34c │ │ + ldc2l 5, cr12, [r2] │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ mov r1, r2 │ │ ldr r2, [pc, #52] @ 22fcbac │ │ ldr r0, [r0] │ │ mov r4, r3 │ │ add r2, pc, r2 │ │ @@ -969793,15 +969792,15 @@ │ │ mov r1, r0 │ │ mov r0, #0 │ │ str r1, [r4] │ │ str r0, [r2] │ │ pop {r4, sl, fp, pc} │ │ mov r0, #64 @ 0x40 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 5, cr0, [r3, #256]! @ 0x100 │ │ + ldc2l 5, cr0, [r3, #436]! @ 0x1b4 │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #40 @ 0x28 │ │ mov r1, r2 │ │ ldr r2, [pc, #212] @ 22fcc9c │ │ ldr r4, [r0] │ │ mov r6, r0 │ │ @@ -969853,15 +969852,15 @@ │ │ cmp r7, #0 │ │ bne 22fcc10 │ │ mov r7, #0 │ │ str r5, [r8] │ │ b 22fcc28 │ │ mov r7, #81 @ 0x51 │ │ b 22fcc10 │ │ - ldc2l 7, cr12, [r1, #804]! @ 0x324 │ │ + ldc2l 7, cr12, [r1, #984]! @ 0x3d8 │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #40 @ 0x28 │ │ mov r1, r2 │ │ ldr r2, [pc, #212] @ 22fcd8c │ │ ldr r4, [r0] │ │ mov r6, r0 │ │ @@ -969913,15 +969912,15 @@ │ │ cmp r7, #0 │ │ bne 22fcd00 │ │ mov r7, #0 │ │ str r5, [r8] │ │ b 22fcd18 │ │ mov r7, #81 @ 0x51 │ │ b 22fcd00 │ │ - ldc2l 5, cr8, [r2, #960]! @ 0x3c0 │ │ + ldc2l 6, cr8, [r2, #116]! @ 0x74 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ mov r8, r2 │ │ ldrd r2, [r0, #4] │ │ mov r5, r0 │ │ add r0, r3, #3 │ │ @@ -970213,15 +970212,15 @@ │ │ mov r0, r5 │ │ mov r1, r4 │ │ pop {r4, r5, fp, lr} │ │ bx r2 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ subeq r9, r2, r4, lsr #3 │ │ - ldc2l 11, cr13, [r3, #64]! @ 0x40 @ │ │ + ldc2l 11, cr13, [r3, #244]! @ 0xf4 @ │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ mov r5, r0 │ │ ldr r0, [r1, #96] @ 0x60 │ │ mov r8, r1 │ │ ldr r1, [pc, #628] @ 22fd4d4 │ │ @@ -970379,15 +970378,15 @@ │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r8 │ │ mov r1, r4 │ │ bl 230c1cc │ │ cmp r0, #0 │ │ bne 22fd290 │ │ b 22fd3a4 │ │ - ldc2l 10, cr13, [r3, #640]! @ 0x280 @ │ │ + ldc2l 10, cr13, [r3, #820]! @ 0x334 @ │ │ andeq pc, r0, r0, ror r5 @ │ │ andeq pc, r0, r8, lsl r1 @ │ │ andeq pc, r0, r4, asr #1 │ │ @ instruction: 0x0000f7b0 │ │ andeq pc, r0, r0, ror r1 @ │ │ cmp r0, #0 │ │ bxeq lr │ │ @@ -977038,19 +977037,19 @@ │ │ bne 2303628 │ │ ldr r1, [fp, #-36] @ 0xffffffdc │ │ mov r0, r1 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldc2l 11, cr13, [fp, #752]! @ 0x2f0 @ │ │ ldc2l 9, cr13, [fp, #328]! @ 0x148 @ │ │ - ldc2l 5, cr15, [r0, #208]! @ 0xd0 │ │ - ldc2l 8, cr11, [r1, #596]! @ 0x254 │ │ - ldc2l 15, cr4, [r4, #652]! @ 0x28c │ │ - ldc2l 3, cr13, [r3, #396]! @ 0x18c │ │ - ldc2l 15, cr4, [r4, #516]! @ 0x204 │ │ + ldc2l 5, cr15, [r0, #388]! @ 0x184 │ │ + vcmla.f32 , , q1, #270 │ │ + ldc2l 15, cr4, [r4, #832]! @ 0x340 │ │ + ldc2l 3, cr13, [r3, #576]! @ 0x240 │ │ + ldc2l 15, cr4, [r4, #696]! @ 0x2b8 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ ldr r8, [r0, #740] @ 0x2e4 │ │ mov r4, #0 │ │ ldr r5, [r0, #100] @ 0x64 │ │ mov r7, r2 │ │ @@ -980909,15 +980908,15 @@ │ │ cmp r0, #38 @ 0x26 │ │ mov r0, #7 │ │ bne 23078f4 │ │ mov r0, #40 @ 0x28 │ │ str r0, [r4, #64] @ 0x40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 4, cr11, [r1, #88]! @ 0x58 │ │ + ldc2l 4, cr11, [r1, #268]! @ 0x10c │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r2 │ │ mov r2, r1 │ │ ldr r1, [pc, #40] @ 2307990 │ │ mov r5, r0 │ │ mov r0, r2 │ │ @@ -980926,15 +980925,15 @@ │ │ mov r1, r0 │ │ mov r0, #12 │ │ cmp r1, #0 │ │ ldreq r0, [r5, #64] @ 0x40 │ │ streq r0, [r4] │ │ moveq r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 3, cr11, [r1, #536]! @ 0x218 │ │ + ldc2l 3, cr11, [r1, #716]! @ 0x2cc │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ mov ip, r1 │ │ ldrb r1, [r0, #292] @ 0x124 │ │ ldr lr, [fp, #8] │ │ cmp r1, #0 │ │ beq 23079d0 │ │ @@ -985771,15 +985770,15 @@ │ │ mov r2, #8 │ │ add r1, pc, r1 │ │ bl 2700990 │ │ clz r0, r0 │ │ lsr r0, r0, #5 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 5, cr8, [r0, #936]! @ 0x3a8 │ │ + ldc2l 6, cr8, [r0, #92]! @ 0x5c │ │ ldr r1, [r1] │ │ ldr r0, [r0] │ │ ldrb r1, [r1] │ │ ldrb r0, [r0] │ │ sub r0, r0, r1 │ │ bx lr │ │ push {r4, r5, r6, sl, fp, lr} │ │ @@ -986274,15 +986273,15 @@ │ │ beq 230cce0 │ │ ldr r2, [r5] │ │ cmp r2, #0 │ │ beq 230cce0 │ │ mov r0, r4 │ │ pop {r4, r5, fp, lr} │ │ bx r2 │ │ - ldc2l 5, cr8, [r1, #1016]! @ 0x3f8 │ │ + ldc2l 6, cr8, [r1, #172]! @ 0xac │ │ │ │ 0230cd1c : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ mov r0, #6 │ │ cmp r1, #0 │ │ @@ -986325,15 +986324,15 @@ │ │ beq 230cda4 │ │ ldr r2, [r5, #16] │ │ cmp r2, #0 │ │ beq 230cda4 │ │ mov r0, r4 │ │ pop {r4, r5, fp, lr} │ │ bx r2 │ │ - ldc2l 5, cr8, [r1, #232]! @ 0xe8 │ │ + ldc2l 5, cr8, [r1, #412]! @ 0x19c │ │ │ │ 0230cde0 : │ │ cmp r0, #0 │ │ moveq r0, #33 @ 0x21 │ │ bxeq lr │ │ push {fp, lr} │ │ mov fp, sp │ │ @@ -986411,15 +986410,15 @@ │ │ ldr r0, [r6, #116] @ 0x74 │ │ blx r1 │ │ mov r0, #0 │ │ str r0, [r6, #116] @ 0x74 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 4, cr8, [r1, #280]! @ 0x118 │ │ + ldc2l 4, cr8, [r1, #460]! @ 0x1cc │ │ │ │ 0230cf28 : │ │ mov r3, r0 │ │ mov r0, #6 │ │ cmp r1, #0 │ │ beq 230cf40 │ │ cmp r2, #0 │ │ @@ -986486,15 +986485,15 @@ │ │ ldr r0, [r6, #116] @ 0x74 │ │ blx r1 │ │ mov r0, #0 │ │ str r0, [r6, #116] @ 0x74 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 3, cr8, [r1, #136]! @ 0x88 │ │ + ldc2l 3, cr8, [r1, #316]! @ 0x13c │ │ │ │ 0230d04c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ mov r0, #6 │ │ cmp r1, #0 │ │ @@ -986542,15 +986541,15 @@ │ │ beq 230d06c │ │ ldr r3, [r6, #40] @ 0x28 │ │ cmp r3, #0 │ │ beq 230d06c │ │ mov r0, r4 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ bx r3 │ │ - ldc2l 1, cr8, [r1, #1000]! @ 0x3e8 │ │ + ldc2l 2, cr8, [r1, #156]! @ 0x9c │ │ │ │ 0230d124 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ mov r0, #6 │ │ cmp r1, #0 │ │ @@ -986669,15 +986668,15 @@ │ │ mov r4, r1 │ │ blx r2 │ │ mov r0, #0 │ │ str r0, [r4, #116] @ 0x74 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 1, cr8, [r1, #152]! @ 0x98 │ │ + ldc2l 1, cr8, [r1, #332]! @ 0x14c │ │ ldc2l 2, cr15, [r3, #768]! @ 0x300 │ │ │ │ 0230d31c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ mov r0, #6 │ │ @@ -986723,15 +986722,15 @@ │ │ beq 230d3ac │ │ ldr r3, [r6, #24] │ │ cmp r3, #0 │ │ beq 230d3ac │ │ mov r0, r4 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ bx r3 │ │ - ldc2l 15, cr7, [r1, #216]! @ 0xd8 │ │ + ldc2l 15, cr7, [r1, #396]! @ 0x18c │ │ │ │ 0230d3e8 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ mov r0, #6 │ │ cmp r1, #0 │ │ @@ -986850,15 +986849,15 @@ │ │ mov r4, r1 │ │ blx r2 │ │ mov r0, #0 │ │ str r0, [r4, #116] @ 0x74 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 14, cr7, [r1, #392]! @ 0x188 │ │ + ldc2l 14, cr7, [r1, #572]! @ 0x23c │ │ ldc2l 15, cr14, [r3, #1008]! @ 0x3f0 │ │ │ │ 0230d5e0 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ mov r0, #6 │ │ @@ -986978,15 +986977,15 @@ │ │ mov r4, r1 │ │ blx r2 │ │ mov r0, #0 │ │ str r0, [r4, #116] @ 0x74 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 12, cr7, [r1, #424]! @ 0x1a8 │ │ + ldc2l 12, cr7, [r1, #604]! @ 0x25c │ │ ldc2l 14, cr14, [r3, #16]! │ │ │ │ 0230d7d8 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ mov r0, #6 │ │ @@ -987032,15 +987031,15 @@ │ │ beq 230d868 │ │ ldr r3, [r6, #12] │ │ cmp r3, #0 │ │ beq 230d868 │ │ mov r0, r4 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ bx r3 │ │ - ldc2l 10, cr7, [r1, #488]! @ 0x1e8 @ │ │ + ldc2l 10, cr7, [r1, #668]! @ 0x29c @ │ │ │ │ 0230d8a4 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ mov r0, #6 │ │ cmp r2, #0 │ │ @@ -987085,15 +987084,15 @@ │ │ beq 230d934 │ │ ldr r3, [r6, #12] │ │ cmp r3, #0 │ │ beq 230d934 │ │ mov r0, r4 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ bx r3 │ │ - ldc2l 9, cr7, [r1, #348]! @ 0x15c @ │ │ + ldc2l 9, cr7, [r1, #438]! @ 0x1b6 @ │ │ │ │ 0230d970 : │ │ mov ip, r0 │ │ cmp ip, #0 │ │ mov r0, #6 │ │ cmpne r2, #0 │ │ bne 230d988 │ │ @@ -987216,15 +987215,15 @@ │ │ mov r4, r1 │ │ blx r2 │ │ mov r0, #0 │ │ str r0, [r4, #116] @ 0x74 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 8, cr7, [r1, #728]! @ 0x2d8 │ │ + vcmla.f32 , , , #270 │ │ ldc2l 10, cr14, [r3, #400]! @ 0x190 @ │ │ │ │ 0230db70 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ beq 230dbf4 │ │ @@ -987270,15 +987269,15 @@ │ │ cmp r3, #0 │ │ beq 230dc30 │ │ mov r0, r2 │ │ pop {r4, r5, fp, lr} │ │ bx r3 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 6, cr7, [r1, #936]! @ 0x3a8 │ │ + ldc2l 7, cr7, [r1, #92]! @ 0x5c │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ sub sp, sp, #8 │ │ add r1, pc, #116 @ 0x74 │ │ mov r3, sp │ │ vld1.64 {d16-d17}, [r1 :128] │ │ add r1, pc, #120 @ 0x78 │ │ vld1.64 {d18-d19}, [r1 :128] │ │ @@ -988327,16 +988326,16 @@ │ │ mov r5, #0 │ │ mov r7, #0 │ │ str r0, [sp, #24] │ │ add r6, pc, r6 │ │ str r0, [sp, #28] │ │ str r3, [sp, #32] │ │ b 230ecd8 │ │ - ldc2l 5, cr8, [r3, #148]! @ 0x94 │ │ - ldc2l 9, cr4, [r3, #490]! @ 0x1ea @ │ │ + ldc2l 5, cr8, [r3, #328]! @ 0x148 │ │ + ldc2l 10, cr4, [r3, #136]! @ 0x88 @ │ │ ldr r3, [sp, #32] │ │ mov r5, #0 │ │ add r7, r7, #1 │ │ cmp r7, r3 │ │ beq 230ed9c │ │ ldr r0, [sp, #176] @ 0xb0 │ │ ldr r1, [r4, #384] @ 0x180 │ │ @@ -988361,15 +988360,15 @@ │ │ cmp r9, r8 │ │ bne 230ed0c │ │ ldr r3, [sp, #32] │ │ mov r5, #0 │ │ ldr r6, [pc, #172] @ 230edec │ │ add r6, pc, r6 │ │ b 230eccc │ │ - ldc2l 3, cr15, [r1, #380]! @ 0x17c │ │ + ldc2l 3, cr15, [r1, #560]! @ 0x230 │ │ ldr r0, [r4, #384] @ 0x180 │ │ ldr r1, [r4, #388] @ 0x184 │ │ add r0, r0, r7, lsl #1 │ │ str r5, [r1, r7, lsl #2] │ │ mov r1, r5 │ │ strh r8, [r0] │ │ ldr r6, [pc, #128] @ 230ede8 │ │ @@ -988399,23 +988398,23 @@ │ │ movhi r0, #7 │ │ strhi r0, [r4, #280] @ 0x118 │ │ ldr r0, [r4, #284] @ 0x11c │ │ cmp r0, #1000 @ 0x3e8 │ │ movhi r0, #1 │ │ strhi r0, [r4, #284] @ 0x11c │ │ b 230deec │ │ - ldc2l 9, cr10, [r3, #408]! @ 0x198 @ │ │ - ldc2l 5, cr11, [r0, #368]! @ 0x170 │ │ - ldc2l 14, cr5, [r0, #424]! @ 0x1a8 │ │ - ldc2l 13, cr5, [r0, #712]! @ 0x2c8 │ │ - ldc2l 13, cr5, [r0, #872]! @ 0x368 │ │ - ldc2l 12, cr12, [r2, #804]! @ 0x324 │ │ - ldc2l 12, cr12, [r2, #36]! @ 0x24 │ │ - ldc2l 2, cr11, [r0, #412]! @ 0x19c │ │ - ldc2l 15, cr14, [r1, #544]! @ 0x220 │ │ + ldc2l 9, cr10, [r3, #498]! @ 0x1f2 @ │ │ + ldc2l 5, cr11, [r0, #548]! @ 0x224 │ │ + ldc2l 14, cr5, [r0, #604]! @ 0x25c │ │ + ldc2l 13, cr5, [r0, #892]! @ 0x37c │ │ + ldc2l 14, cr5, [r0, #28]! │ │ + ldc2l 12, cr12, [r2, #984]! @ 0x3d8 │ │ + ldc2l 12, cr12, [r2, #216]! @ 0xd8 │ │ + ldc2l 2, cr11, [r0, #592]! @ 0x250 │ │ + ldc2l 15, cr14, [r1, #724]! @ 0x2d4 │ │ andeq r3, r0, r0, asr #9 │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ ldr r1, [r0, #548] @ 0x224 │ │ mov r4, r0 │ │ @@ -988557,15 +988556,15 @@ │ │ blx r3 │ │ cmp r0, #0 │ │ ldreq r1, [r4, #40] @ 0x28 │ │ ldreq r2, [sp, #4] │ │ streq r2, [r1] │ │ sub sp, fp, #8 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 0, cr14, [r1, #940]! @ 0x3ac │ │ + ldc2l 1, cr14, [r1, #96]! @ 0x60 │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #40] @ 0x28 │ │ ldr r0, [r0] │ │ cmp r0, #0 │ │ beq 230f0b4 │ │ @@ -988590,15 +988589,15 @@ │ │ cmp r0, #0 │ │ beq 230f0a8 │ │ ldr r1, [r4, #40] @ 0x28 │ │ ldr r2, [r0, #8] │ │ ldr r0, [r1] │ │ blx r2 │ │ b 230f0a8 │ │ - ldc2l 0, cr14, [r1, #252]! @ 0xfc │ │ + ldc2l 0, cr14, [r1, #432]! @ 0x1b0 │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #4] │ │ ldr r5, [r0, #552] @ 0x228 │ │ cmp r5, #0 │ │ beq 230f120 │ │ @@ -988610,15 +988609,15 @@ │ │ beq 230f120 │ │ ldr r1, [r5, #4] │ │ blx r1 │ │ ldr r1, [r4, #156] @ 0x9c │ │ str r0, [r1, #36] @ 0x24 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 15, cr13, [r1, #796]! @ 0x31c │ │ + ldc2l 15, cr13, [r1, #976]! @ 0x3d0 │ │ ldr r0, [r0, #156] @ 0x9c │ │ cmp r0, #0 │ │ movne r1, #0 │ │ strne r1, [r0, #36] @ 0x24 │ │ bx lr │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ @@ -989276,15 +989275,15 @@ │ │ mov r1, r2 │ │ mov r2, r3 │ │ mov r3, #0 │ │ blx r7 │ │ mov r0, r4 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 5, cr13, [r1, #732]! @ 0x2dc │ │ + ldc2l 5, cr13, [r1, #912]! @ 0x390 │ │ ldr r0, [r0, #364] @ 0x16c │ │ bx lr │ │ push {fp, lr} │ │ mov fp, sp │ │ ldr r0, [r0, #424] @ 0x1a8 │ │ ldr r1, [r0, r1, lsl #2] │ │ mov r0, r2 │ │ @@ -990358,19 +990357,19 @@ │ │ b 2310bbc │ │ ldr r0, [sp, #32] │ │ ldr r1, [sp, #4] │ │ ldr r2, [sp, #12] │ │ str r2, [r1] │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 1, cr2, [r0, #208]! @ 0xd0 │ │ - ldc2l 12, cr7, [r3, #780]! @ 0x30c │ │ - ldc2l 5, cr14, [r0, #740]! @ 0x2e4 │ │ - ldc2l 0, cr0, [r3, #44]! @ 0x2c │ │ - ldc2l 12, cr7, [r3, #516]! @ 0x204 │ │ + ldc2l 1, cr2, [r0, #388]! @ 0x184 │ │ + ldc2l 12, cr7, [r3, #960]! @ 0x3c0 │ │ + ldc2l 5, cr14, [r0, #920]! @ 0x398 │ │ + ldc2l 0, cr0, [r3, #224]! @ 0xe0 │ │ + ldc2l 12, cr7, [r3, #696]! @ 0x2b8 │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ mov r4, r1 │ │ mov r5, r0 │ │ cmp r1, #0 │ │ beq 2310d08 │ │ @@ -991882,21 +991881,21 @@ │ │ bne 2312420 │ │ str r0, [r4, #12] │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, #3 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 9, cr5, [r0, #364]! @ 0x16c @ │ │ + ldc2l 9, cr5, [r0, #454]! @ 0x1c6 @ │ │ ldc2l 5, cr12, [r3, #576]! @ 0x240 │ │ - ldc2l 13, cr0, [r3, #572]! @ 0x23c │ │ + ldc2l 13, cr0, [r3, #752]! @ 0x2f0 │ │ subeq r4, r1, r8, lsr r3 │ │ - ldc2l 13, cr8, [r1, #100]! @ 0x64 │ │ - ldc2l 15, cr4, [r0, #376]! @ 0x178 │ │ - ldc2l 0, cr5, [r0, #664]! @ 0x298 │ │ + ldc2l 13, cr8, [r1, #280]! @ 0x118 │ │ + ldc2l 15, cr4, [r0, #556]! @ 0x22c │ │ + ldc2l 0, cr5, [r0, #844]! @ 0x34c │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r6, r1 │ │ mov r1, #0 │ │ mov r5, r2 │ │ mov r4, r0 │ │ @@ -992431,18 +992430,18 @@ │ │ andeq r0, r0, r4, lsl #4 │ │ mov r0, #2 │ │ b 23128a4 │ │ add r9, r7, #1 │ │ str r9, [r4] │ │ mov r0, #1 │ │ b 23128c4 │ │ - ldc2l 2, cr2, [r0, #72]! @ 0x48 │ │ - ldc2l 6, cr8, [r2, #36]! @ 0x24 │ │ - ldc2l 9, cr7, [r3, #404]! @ 0x194 @ │ │ - ldc2l 7, cr12, [r1, #260]! @ 0x104 │ │ + ldc2l 2, cr2, [r0, #252]! @ 0xfc │ │ + ldc2l 6, cr8, [r2, #216]! @ 0xd8 │ │ + ldc2l 9, cr7, [r3, #494]! @ 0x1ee @ │ │ + ldc2l 7, cr12, [r1, #440]! @ 0x1b8 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ mov r4, r1 │ │ ldr r6, [r1, #16] │ │ ldr r1, [r1, #28] │ │ mov r5, r0 │ │ @@ -992683,16 +992682,16 @@ │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmp r7, #0 │ │ bne 2312d68 │ │ mov r0, #3 │ │ str r0, [r4, #12] │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 1, cr14, [r0, #724]! @ 0x2d4 │ │ - ldc2l 7, cr1, [r2, #632]! @ 0x278 │ │ + ldc2l 1, cr14, [r0, #904]! @ 0x388 │ │ + ldc2l 7, cr1, [r2, #812]! @ 0x32c │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #52 @ 0x34 │ │ mov r8, r1 │ │ ldr sl, [r1, #16] │ │ ldr r5, [r1] │ │ mov r9, r0 │ │ @@ -993239,17 +993238,17 @@ │ │ cmp r0, #0 │ │ bne 23136b4 │ │ ldr r0, [r8, #148] @ 0x94 │ │ add r0, r0, #1 │ │ str r0, [r8, #148] @ 0x94 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 5, cr1, [r0, #184]! @ 0xb8 │ │ - ldc2l 4, cr1, [r0, #184]! @ 0xb8 │ │ - ldc2l 2, cr1, [r0, #216]! @ 0xd8 │ │ + ldc2l 5, cr1, [r0, #364]! @ 0x16c │ │ + ldc2l 4, cr1, [r0, #364]! @ 0x16c │ │ + ldc2l 2, cr1, [r0, #396]! @ 0x18c │ │ ldr r0, [r1, #356] @ 0x164 │ │ orr r0, r0, #1 │ │ str r0, [r1, #356] @ 0x164 │ │ bx lr │ │ nop {0} │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ @@ -994086,15 +994085,15 @@ │ │ ldr r0, [r1] │ │ ldr r2, [r0, #32] │ │ mov r0, r1 │ │ mov r1, r4 │ │ pop {r4, r5, fp, lr} │ │ bx r2 │ │ subeq r2, r1, r8, lsl #14 │ │ - ldc2l 6, cr6, [r2, #512]! @ 0x200 │ │ + ldc2l 6, cr6, [r2, #692]! @ 0x2b4 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #60 @ 0x3c │ │ mov r6, r0 │ │ ldr r0, [r1, #96] @ 0x60 │ │ mov r4, r1 │ │ ldr r1, [pc, #2936] @ 2315258 │ │ @@ -994829,24 +994828,24 @@ │ │ beq 2314e64 │ │ mov r5, r0 │ │ ldr r0, [r4, #20] │ │ mov r1, r5 │ │ bl 2319e70 │ │ mov r0, r5 │ │ b 2314e78 │ │ - ldc2l 6, cr6, [r2, #128]! @ 0x80 │ │ - ldc2l 11, cr1, [r3, #164]! @ 0xa4 @ │ │ - ldc2l 9, cr8, [r1, #326]! @ 0x146 @ │ │ - ldc2l 15, cr13, [r2, #980]! @ 0x3d4 │ │ + ldc2l 6, cr6, [r2, #308]! @ 0x134 │ │ + ldc2l 11, cr1, [r3, #344]! @ 0x158 @ │ │ + ldc2l 9, cr8, [r1, #416]! @ 0x1a0 @ │ │ + ldc2l 0, cr14, [r2, #136]! @ 0x88 │ │ ldc2l 14, cr7, [r3, #124]! @ 0x7c │ │ - ldc2l 14, cr5, [r2, #628]! @ 0x274 │ │ - ldc2l 4, cr4, [r0, #524]! @ 0x20c │ │ - ldc2l 1, cr8, [r1, #656]! @ 0x290 │ │ - ldc2l 3, cr4, [r0, #620]! @ 0x26c │ │ - ldc2l 0, cr8, [r1, #736]! @ 0x2e0 │ │ + ldc2l 14, cr5, [r2, #808]! @ 0x328 │ │ + ldc2l 4, cr4, [r0, #704]! @ 0x2c0 │ │ + ldc2l 1, cr8, [r1, #836]! @ 0x344 │ │ + ldc2l 3, cr4, [r0, #800]! @ 0x320 │ │ + ldc2l 0, cr8, [r1, #916]! @ 0x394 │ │ ldrdeq r1, [r1], #-180 @ 0xffffff4c │ │ subeq r1, r1, ip, ror #21 │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ mov r9, r0 │ │ @@ -995132,15 +995131,15 @@ │ │ ldr r4, [fp, #-36] @ 0xffffffdc │ │ b 23155c4 │ │ ldr r0, [r9, #40] @ 0x28 │ │ mvn r1, #0 │ │ str r1, [r9, #44] @ 0x2c │ │ str r7, [r0] │ │ b 23155c4 │ │ - ldc2l 11, cr7, [r1, #156]! @ 0x9c @ │ │ + ldc2l 11, cr7, [r1, #336]! @ 0x150 @ │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ ldr r1, [r0, #40] @ 0x28 │ │ ldr r4, [r1] │ │ cmp r4, #0 │ │ beq 2315778 │ │ ldr r0, [r0] │ │ @@ -995174,15 +995173,15 @@ │ │ beq 2315768 │ │ ldr r0, [r4, r7, lsl #2] │ │ ldr r1, [r6, #8] │ │ blx r1 │ │ subs r7, r7, #1 │ │ bne 23157a4 │ │ b 2315768 │ │ - ldc2l 9, cr7, [r1, #262]! @ 0x106 @ │ │ + ldc2l 9, cr7, [r1, #352]! @ 0x160 @ │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #4] │ │ ldr r0, [r0, #716] @ 0x2cc │ │ ldr r5, [r0, #3080] @ 0xc08 │ │ cmp r5, #0 │ │ @@ -995195,15 +995194,15 @@ │ │ beq 2315808 │ │ ldr r1, [r5, #8] │ │ blx r1 │ │ ldr r1, [r4, #156] @ 0x9c │ │ str r0, [r1, #36] @ 0x24 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 8, cr7, [r1, #892]! @ 0x37c │ │ + ldc2l 9, cr7, [r1, #24]! @ │ │ ldr r0, [r0, #156] @ 0x9c │ │ cmp r0, #0 │ │ movne r1, #0 │ │ strne r1, [r0, #36] @ 0x24 │ │ bx lr │ │ nop {0} │ │ nop {0} │ │ @@ -996210,15 +996209,15 @@ │ │ ldr r1, [sp, #16] │ │ mov r0, r4 │ │ bl 23167f4 │ │ mov r7, #0 │ │ mov r0, r7 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 9, cr6, [r1, #494]! @ 0x1ee @ │ │ + ldc2l 10, cr6, [r1, #144]! @ 0x90 @ │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ mov r4, r0 │ │ ldr r0, [r0] │ │ str r1, [r4, #44] @ 0x2c │ │ bl 22f4564 │ │ @@ -996288,15 +996287,15 @@ │ │ mov r7, r0 │ │ ldr r0, [r4, #20] │ │ mov r1, r8 │ │ mov r2, r5 │ │ bl 270b8b0 │ │ mov r2, r0 │ │ b 23168b4 │ │ - vcmla.f32 d22, d17, d23, #270 │ │ + ldc2l 8, cr6, [r1, #848]! @ 0x350 │ │ ldr r2, [r0, #716] @ 0x2cc │ │ movw r3, #65535 @ 0xffff │ │ ldr r0, [r2, #1188] @ 0x4a4 │ │ add r0, r0, r1, lsl #1 │ │ ldrh r1, [r0] │ │ mov r0, #0 │ │ cmp r1, r3 │ │ @@ -996664,16 +996663,16 @@ │ │ cmp r7, #22 │ │ bhi 2316efc │ │ tst lr, r3, lsl r7 │ │ bne 2316ecc │ │ mov r2, #0 │ │ strh r2, [r0] │ │ b 2316dd8 │ │ - ldc2l 11, cr11, [r1, #92]! @ 0x5c @ │ │ - ldc2l 2, cr6, [r1, #424]! @ 0x1a8 │ │ + ldc2l 11, cr11, [r1, #272]! @ 0x110 @ │ │ + ldc2l 2, cr6, [r1, #604]! @ 0x25c │ │ ldr r0, [r0, #8] │ │ ubfx r0, r0, #9, #1 │ │ bx lr │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r5, [r0, #716] @ 0x2cc │ │ @@ -996698,16 +996697,16 @@ │ │ cmp r0, #0 │ │ ldrne r1, [r0] │ │ cmpne r1, #0 │ │ beq 2316f40 │ │ mov r0, r4 │ │ pop {r4, r5, fp, lr} │ │ bx r1 │ │ - ldc2l 13, cr3, [r2, #688]! @ 0x2b0 │ │ - ldc2l 0, cr4, [r1, #80]! @ 0x50 │ │ + ldc2l 13, cr3, [r2, #868]! @ 0x364 │ │ + ldc2l 0, cr4, [r1, #260]! @ 0x104 │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r5, r2 │ │ ldr r2, [r0, #716] @ 0x2cc │ │ mov r4, r3 │ │ ldrb r3, [r2, #24] │ │ cmp r3, #2 │ │ @@ -996765,16 +996764,16 @@ │ │ cmp r1, #0 │ │ beq 2317094 │ │ mov r0, r5 │ │ mov r2, r4 │ │ bl 22fb468 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 13, cr3, [r2, #240]! @ 0xf0 │ │ - ldc2l 11, cr9, [r2, #252]! @ 0xfc @ │ │ + ldc2l 13, cr3, [r2, #420]! @ 0x1a4 │ │ + ldc2l 11, cr9, [r2, #432]! @ 0x1b0 @ │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ ldr r7, [r0, #716] @ 0x2cc │ │ mov r8, r1 │ │ mov r6, r0 │ │ ldr r0, [r0, #96] @ 0x60 │ │ ldrb r1, [r7, #24] │ │ @@ -996840,17 +996839,17 @@ │ │ mov r0, r6 │ │ mov r1, r8 │ │ pop {r4, r5, r6, r7, r8, r9, fp, lr} │ │ bx r2 │ │ mov r5, #0 │ │ mov r0, r5 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 12, cr3, [r2, #224]! @ 0xe0 │ │ - ldc2l 10, cr9, [r2, #220]! @ 0xdc @ │ │ - ldc2l 1, cr15, [r2, #180]! @ 0xb4 │ │ + ldc2l 12, cr3, [r2, #404]! @ 0x194 │ │ + ldc2l 10, cr9, [r2, #400]! @ 0x190 @ │ │ + ldc2l 1, cr15, [r2, #360]! @ 0x168 │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ ldr r3, [pc, #120] @ 231725c │ │ mov r4, #150 @ 0x96 │ │ ldr r2, [r0, #12] │ │ add r3, pc, r3 │ │ cmp r2, r3 │ │ @@ -996879,16 +996878,16 @@ │ │ beq 2317200 │ │ mov r1, r5 │ │ mov r0, r6 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ bx r2 │ │ subeq pc, r0, r8, asr #21 │ │ subeq pc, r0, r4, ror #21 │ │ - ldc2l 10, cr3, [r2, #928]! @ 0x3a0 @ │ │ - ldc2l 5, cr1, [r3, #492]! @ 0x1ec │ │ + ldc2l 11, cr3, [r2, #84]! @ 0x54 @ │ │ + ldc2l 5, cr1, [r3, #672]! @ 0x2a0 │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ ldr r4, [r0, #716] @ 0x2cc │ │ cmp r4, #0 │ │ beq 2317398 │ │ ldr r0, [r4, #1504] @ 0x5e0 │ │ movw r7, #65535 @ 0xffff │ │ @@ -1002192,27 +1002191,27 @@ │ │ ldr r5, [sp, #8] │ │ mov r0, r5 │ │ bl 231d268 │ │ b 231c478 │ │ mov r0, #160 @ 0xa0 │ │ str r0, [sp, #52] @ 0x34 │ │ b 231c3b0 │ │ - ldc2l 13, cr6, [r2, #132]! @ 0x84 │ │ - ldc2l 6, cr1, [r1, #540]! @ 0x21c │ │ - ldc2l 5, cr11, [r0, #948]! @ 0x3b4 │ │ - ldc2l 2, cr3, [r1, #332]! @ 0x14c │ │ - ldc2l 2, cr13, [r0, #868]! @ 0x364 │ │ - ldc2l 14, cr2, [r1, #828]! @ 0x33c │ │ - ldc2l 14, cr2, [r1, #388]! @ 0x184 │ │ - ldc2l 0, cr13, [r0, #36]! @ 0x24 │ │ - vcmla.f32 d22, d17, d7, #270 │ │ + ldc2l 13, cr6, [r2, #312]! @ 0x138 │ │ + ldc2l 6, cr1, [r1, #720]! @ 0x2d0 │ │ + ldc2l 6, cr11, [r0, #104]! @ 0x68 │ │ + ldc2l 2, cr3, [r1, #512]! @ 0x200 │ │ + ldc2l 3, cr13, [r0, #24]! │ │ + ldc2l 14, cr2, [r1, #1008]! @ 0x3f0 │ │ + ldc2l 14, cr2, [r1, #568]! @ 0x238 │ │ + ldc2l 0, cr13, [r0, #216]! @ 0xd8 │ │ + ldc2l 8, cr6, [r1, #720]! @ 0x2d0 │ │ ldrdeq fp, [r0], #-88 @ 0xffffffa8 │ │ - ldc2l 1, cr15, [r1, #548]! @ 0x224 │ │ - stc2l 5, cr13, [pc, #732]! @ 231c87c │ │ - ldc2l 2, cr1, [r1, #864]! @ 0x360 │ │ + ldc2l 1, cr15, [r1, #728]! @ 0x2d8 │ │ + stc2l 5, cr13, [pc, #912]! @ 231c930 │ │ + ldc2l 3, cr1, [r1, #20]! │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ ldr r1, [r0, #316] @ 0x13c │ │ mov r4, r0 │ │ ldr r5, [r0, #100] @ 0x64 │ │ @@ -1002336,15 +1002335,15 @@ │ │ blx r5 │ │ cmp r0, #0 │ │ ldreq r1, [r4, #40] @ 0x28 │ │ ldreq r2, [sp, #4] │ │ streq r2, [r1] │ │ sub sp, fp, #8 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 9, cr0, [r1, #318]! @ 0x13e @ │ │ + ldc2l 9, cr0, [r1, #408]! @ 0x198 @ │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #40] @ 0x28 │ │ ldr r0, [r0] │ │ cmp r0, #0 │ │ beq 231c80c │ │ @@ -1002369,15 +1002368,15 @@ │ │ cmp r0, #0 │ │ beq 231c800 │ │ ldr r1, [r4, #40] @ 0x28 │ │ ldr r2, [r0, #8] │ │ ldr r0, [r1] │ │ blx r2 │ │ b 231c800 │ │ - vcmla.f32 q8, , , #270 │ │ + ldc2l 9, cr0, [r1, #40]! @ 0x28 @ │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #4] │ │ ldr r5, [r0, #320] @ 0x140 │ │ cmp r5, #0 │ │ beq 231c878 │ │ @@ -1002389,15 +1002388,15 @@ │ │ beq 231c878 │ │ ldr r1, [r5, #4] │ │ blx r1 │ │ ldr r1, [r4, #156] @ 0x9c │ │ str r0, [r1, #36] @ 0x24 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - vcmla.f32 q8, , , #270 │ │ + ldc2l 8, cr0, [r1, #624]! @ 0x270 │ │ ldr r0, [r0, #156] @ 0x9c │ │ cmp r0, #0 │ │ movne r1, #0 │ │ strne r1, [r0, #36] @ 0x24 │ │ bx lr │ │ nop {0} │ │ nop {0} │ │ @@ -1002727,15 +1002726,15 @@ │ │ mov r1, r2 │ │ mov r2, r3 │ │ mov r3, #0 │ │ blx r6 │ │ mov r0, r5 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 3, cr0, [r1, #460]! @ 0x1cc │ │ + ldc2l 3, cr0, [r1, #640]! @ 0x280 │ │ ldr r1, [r0, #140] @ 0x8c │ │ cmp r1, #0 │ │ moveq r0, #0 │ │ bxeq lr │ │ mov r0, r1 │ │ ldrb r2, [r0], #1 │ │ cmp r2, #47 @ 0x2f │ │ @@ -1007250,15 +1007249,15 @@ │ │ bl 270b8f0 │ │ cmp r0, #0 │ │ moveq r0, #11 │ │ ldrne r0, [r0] │ │ strne r0, [r4, #28] │ │ movne r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 4, cr5, [r1, #348]! @ 0x15c │ │ + ldc2l 4, cr5, [r1, #528]! @ 0x210 │ │ bx lr │ │ ldr r0, [pc, #4] @ 232148c │ │ add r0, pc, r0 │ │ b 22f19b8 │ │ umaaleq r6, r0, r4, ip │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ @@ -1007924,25 +1007923,25 @@ │ │ mov r3, #0 │ │ bl 22f550c │ │ mov r9, r0 │ │ b 2321e20 │ │ cmp r3, #0 │ │ streq r1, [sl, #24] │ │ b 2321c68 │ │ - ldc2l 13, cr4, [r2, #548]! @ 0x224 │ │ - ldc2l 2, cr1, [r2, #308]! @ 0x134 │ │ - ldc2l 9, cr13, [r0, #54]! @ 0x36 @ │ │ - stc2l 12, cr5, [pc, #504]! @ 232210c │ │ - ldc2l 5, cr1, [r0, #960]! @ 0x3c0 │ │ + ldc2l 13, cr4, [r2, #728]! @ 0x2d8 │ │ + ldc2l 2, cr1, [r2, #488]! @ 0x1e8 │ │ + ldc2l 9, cr13, [r0, #144]! @ 0x90 @ │ │ + stc2l 12, cr5, [pc, #684]! @ 23221c0 │ │ + ldc2l 6, cr1, [r0, #116]! @ 0x74 │ │ subeq r6, r0, r0, lsr #19 │ │ - stc2l 1, cr3, [pc, #616]! @ 2322188 │ │ - stc2l 0, cr3, [pc, #920]! @ 23222bc │ │ - stc2l 1, cr3, [pc, #40]! @ 2321f50 │ │ - ldc2l 1, cr9, [r1, #356]! @ 0x164 │ │ - ldc2l 12, cr4, [r1, #156]! @ 0x9c │ │ + stc2l 1, cr3, [pc, #796]! @ 232223c │ │ + stc2l 1, cr3, [pc, #76]! @ 2321f70 │ │ + stc2l 1, cr3, [pc, #220]! @ 2322004 │ │ + ldc2l 1, cr9, [r1, #536]! @ 0x218 │ │ + ldc2l 12, cr4, [r1, #336]! @ 0x150 │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ ldr r5, [r0, #100] @ 0x64 │ │ ldr r0, [r0, #504] @ 0x1f8 │ │ @@ -1008645,18 +1008644,18 @@ │ │ b 2322678 │ │ add r6, r7, #1 │ │ mov r0, #1 │ │ str r6, [r4] │ │ str r0, [sl, #368] @ 0x170 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 3, cr2, [pc, #328]! @ 2322b94 │ │ - ldc2l 7, cr8, [r1, #132]! @ 0x84 │ │ - ldc2l 10, cr7, [r2, #904]! @ 0x388 @ │ │ - ldc2l 8, cr12, [r0, #356]! @ 0x164 │ │ + stc2l 3, cr2, [pc, #508]! @ 2322c48 │ │ + ldc2l 7, cr8, [r1, #312]! @ 0x138 │ │ + ldc2l 11, cr7, [r2, #60]! @ 0x3c @ │ │ + vcmla.f32 d28, d16, d6, #270 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r4, r1 │ │ ldr r9, [r1, #8] │ │ ldr r7, [r1, #16] │ │ ldr r1, [r1, #28] │ │ @@ -1009021,16 +1009020,16 @@ │ │ mov r1, r8 │ │ str r5, [r4, #140] @ 0x8c │ │ cmp r1, r9 │ │ bcs 2322b8c │ │ b 2322b80 │ │ str r0, [r4, #140] @ 0x8c │ │ b 2322b8c │ │ - stc2l 13, cr1, [pc, #1000]! @ 2323414 │ │ - stc2l 12, cr1, [pc, #408]! @ 23231c8 │ │ + stc2l 14, cr1, [pc, #156]! @ 23230c8 │ │ + stc2l 12, cr1, [pc, #588]! @ 232327c │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #52 @ 0x34 │ │ ldr r7, [r1, #16] │ │ mov r6, r1 │ │ ldr sl, [r1, #8] │ │ mov r5, r0 │ │ @@ -1010066,18 +1010065,18 @@ │ │ ldc2l 3, cr14, [r9, #560]! @ 0x230 │ │ ldc2l 3, cr14, [r9, #96]! @ 0x60 │ │ ldc2l 2, cr14, [r9, #704]! @ 0x2c0 │ │ ldc2l 2, cr14, [r9, #240]! @ 0xf0 │ │ ldc2l 1, cr14, [r9, #704]! @ 0x2c0 │ │ ldc2l 1, cr14, [r9, #416]! @ 0x1a0 │ │ subeq r4, r0, ip, asr #24 │ │ - ldc2l 3, cr7, [r1, #596]! @ 0x254 │ │ - ldc2l 7, cr1, [r0, #576]! @ 0x240 │ │ - stc2l 8, cr5, [pc, #252]! @ 2324184 │ │ - ldc2l 14, cr4, [r2, #180]! @ 0xb4 │ │ + ldc2l 3, cr7, [r1, #776]! @ 0x308 │ │ + ldc2l 7, cr1, [r0, #756]! @ 0x2f4 │ │ + vcmla.f16 , , q14, #270 │ │ + ldc2l 14, cr4, [r2, #360]! @ 0x168 │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ ldr r6, [r0, #132] @ 0x84 │ │ mov r4, r0 │ │ ldr r5, [r0, #100] @ 0x64 │ │ @@ -1010517,19 +1010516,19 @@ │ │ str r0, [sp, #8] │ │ movw r0, #3 │ │ movt r0, #1 │ │ str r0, [sp, #12] │ │ movw r0, #26979 @ 0x6963 │ │ movt r0, #30062 @ 0x756e │ │ b 232467c │ │ - ldc2l 2, cr0, [r1, #84]! @ 0x54 │ │ - stc2l 10, cr6, [pc, #852]! @ 2324ae4 @ │ │ - ldc2l 15, cr15, [r0, #120]! @ 0x78 │ │ - ldc2l 9, cr5, [r2, #504]! @ 0x1f8 @ │ │ - vcmla.f32 q10, q8, q14, #270 │ │ + ldc2l 2, cr0, [r1, #264]! @ 0x108 │ │ + stc2l 11, cr6, [pc, #8]! @ 2324798 @ │ │ + ldc2l 15, cr15, [r0, #300]! @ 0x12c │ │ + ldc2l 10, cr5, [r2, #164]! @ 0xa4 @ │ │ + ldc2l 9, cr4, [r0, #50]! @ 0x32 @ │ │ subeq r3, r0, r4, lsr #30 │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ ldr sl, [r0, #100] @ 0x64 │ │ @@ -1011892,22 +1011891,22 @@ │ │ ldc2l 4, cr13, [r9, #32]! │ │ ldc2l 3, cr13, [r9, #400]! @ 0x190 │ │ ldc2l 15, cr12, [r9, #192]! @ 0xc0 │ │ ldc2l 15, cr12, [r9, #320]! @ 0x140 │ │ ldc2l 14, cr12, [r9, #720]! @ 0x2d0 │ │ ldc2l 14, cr12, [r9, #816]! @ 0x330 │ │ ldc2l 14, cr12, [r9, #512]! @ 0x200 │ │ - ldc2l 2, cr3, [r1, #164]! @ 0xa4 │ │ - stc2l 3, cr7, [pc, #820]! @ 2326040 │ │ - vcmla.f16 , , q2, #270 │ │ - ldc2l 7, cr0, [r2, #312]! @ 0x138 │ │ - ldc2l 15, cr6, [r1, #248]! @ 0xf8 │ │ - ldc2l 11, cr12, [r1, #760]! @ 0x2f8 @ │ │ - ldc2l 15, cr8, [r1, #704]! @ 0x2c0 │ │ - ldc2l 4, cr4, [r2, #740]! @ 0x2e4 │ │ + ldc2l 2, cr3, [r1, #344]! @ 0x158 │ │ + stc2l 3, cr7, [pc, #1000]! @ 23260f4 │ │ + stc2l 8, cr1, [pc, #964]! @ 23260d4 │ │ + ldc2l 7, cr0, [r2, #492]! @ 0x1ec │ │ + ldc2l 15, cr6, [r1, #428]! @ 0x1ac │ │ + ldc2l 11, cr12, [r1, #940]! @ 0x3ac @ │ │ + ldc2l 15, cr8, [r1, #884]! @ 0x374 │ │ + ldc2l 4, cr4, [r2, #920]! @ 0x398 │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ ldr r7, [r1, #188] @ 0xbc │ │ mov r3, r0 │ │ mov r0, #3 │ │ cmp r7, #0 │ │ @@ -1012689,22 +1012688,22 @@ │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r5 │ │ bl 26ffe30 │ │ add r8, r0, #1 │ │ mov r7, r0 │ │ mov r1, r5 │ │ b 23264c8 │ │ - ldc2l 10, cr4, [r1, #740]! @ 0x2e4 @ │ │ - ldc2l 8, cr6, [r1, #108]! @ 0x6c │ │ - ldc2l 4, cr2, [r2, #196]! @ 0xc4 │ │ - ldc2l 2, cr14, [r1, #92]! @ 0x5c │ │ - ldc2l 10, cr10, [r0, #576]! @ 0x240 @ │ │ - stc2l 14, cr2, [pc, #76]! @ 23269dc │ │ - ldc2l 7, cr2, [r1, #628]! @ 0x274 │ │ - stc2l 14, cr14, [pc, #640]! @ 2326c18 │ │ + ldc2l 10, cr4, [r1, #920]! @ 0x398 @ │ │ + vcmla.f32 q11, , q4, #270 │ │ + ldc2l 4, cr2, [r2, #376]! @ 0x178 │ │ + ldc2l 2, cr14, [r1, #272]! @ 0x110 │ │ + ldc2l 10, cr10, [r0, #756]! @ 0x2f4 @ │ │ + stc2l 14, cr2, [pc, #256]! @ 2326a90 │ │ + ldc2l 7, cr2, [r1, #808]! @ 0x328 │ │ + stc2l 14, cr14, [pc, #820]! @ 2326ccc │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ cmp r1, #255 @ 0xff │ │ bhi 23269d0 │ │ ldr r4, [pc, #148] @ 2326a44 │ │ tst r1, #4 │ │ @@ -1014091,36 +1014090,36 @@ │ │ movw r0, #3 │ │ movt r0, #1 │ │ str r0, [sp, #60] @ 0x3c │ │ movw r0, #26979 @ 0x6963 │ │ movt r0, #30062 @ 0x756e │ │ str r0, [sp, #56] @ 0x38 │ │ b 2327e74 │ │ - stc2l 12, cr5, [pc, #140]! @ 2327ff0 │ │ - ldc2l 9, cr1, [r1, #370]! @ 0x172 @ │ │ - ldc2l 12, cr3, [r1, #452]! @ 0x1c4 │ │ - ldc2l 9, cr5, [r1, #294]! @ 0x126 @ │ │ - ldc2l 3, cr1, [r2, #116]! @ 0x74 │ │ - ldc2l 1, cr13, [r1, #12]! │ │ - ldc2l 13, cr9, [r0, #112]! @ 0x70 │ │ - stc2l 1, cr2, [pc, #972]! @ 232834c │ │ - ldc2l 8, cr1, [r1, #964]! @ 0x3c4 │ │ - stc2l 0, cr14, [pc, #128]! @ 2328008 │ │ - stc2l 3, cr5, [pc, #644]! @ 2328210 │ │ - vcmla.f16 , q15, q2, #270 │ │ - ldc2l 6, cr14, [r1, #904]! @ 0x388 │ │ - ldc2l 14, cr4, [r1, #904]! @ 0x388 │ │ - ldc2l 11, cr10, [r1, #392]! @ 0x188 @ │ │ - ldc2l 14, cr6, [r1, #832]! @ 0x340 │ │ - ldc2l 3, cr2, [r2, #868]! @ 0x364 │ │ - ldc2l 10, cr12, [r0, #308]! @ 0x134 @ │ │ - stc2l 3, cr3, [pc, #52]! @ 2327fe0 │ │ - ldc2l 7, cr12, [r0, #344]! @ 0x158 │ │ - ldc2l 2, cr2, [r2, #192]! @ 0xc0 │ │ - ldc2l 1, cr1, [r0, #128]! @ 0x80 │ │ + stc2l 12, cr5, [pc, #320]! @ 23280a4 │ │ + ldc2l 9, cr1, [r1, #460]! @ 0x1cc @ │ │ + ldc2l 12, cr3, [r1, #632]! @ 0x278 │ │ + ldc2l 9, cr5, [r1, #384]! @ 0x180 @ │ │ + ldc2l 3, cr1, [r2, #296]! @ 0x128 │ │ + ldc2l 1, cr13, [r1, #192]! @ 0xc0 │ │ + ldc2l 13, cr9, [r0, #292]! @ 0x124 │ │ + stc2l 2, cr2, [pc, #128]! @ 2328000 │ │ + ldc2l 9, cr1, [r1, #60]! @ 0x3c @ │ │ + stc2l 0, cr14, [pc, #308]! @ 23280bc │ │ + stc2l 3, cr5, [pc, #824]! @ 23282c4 │ │ + stc2l 8, cr15, [lr, #964]! @ 0x3c4 │ │ + ldc2l 7, cr14, [r1, #60]! @ 0x3c │ │ + ldc2l 15, cr4, [r1, #60]! @ 0x3c │ │ + ldc2l 11, cr10, [r1, #572]! @ 0x23c @ │ │ + ldc2l 14, cr6, [r1, #1012]! @ 0x3f4 │ │ + ldc2l 4, cr2, [r2, #24]! │ │ + ldc2l 10, cr12, [r0, #488]! @ 0x1e8 @ │ │ + stc2l 3, cr3, [pc, #232]! @ 2328094 │ │ + ldc2l 7, cr12, [r0, #524]! @ 0x20c │ │ + ldc2l 2, cr2, [r2, #372]! @ 0x174 │ │ + ldc2l 1, cr1, [r0, #308]! @ 0x134 │ │ ldrdeq r0, [r0], #-120 @ 0xffffff88 │ │ ldrdeq r0, [r0], #-132 @ 0xffffff7c │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ ldr r1, [r0, #140] @ 0x8c │ │ @@ -1015090,31 +1015089,31 @@ │ │ strh r0, [r4, #96] @ 0x60 │ │ ldr r0, [r8] │ │ orr r0, r0, #4 │ │ str r0, [r8] │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 3, cr10, [r1, #444]! @ 0x1bc │ │ - ldc2l 6, cr4, [r1, #500]! @ 0x1f4 │ │ + ldc2l 3, cr10, [r1, #624]! @ 0x270 │ │ + ldc2l 6, cr4, [r1, #680]! @ 0x2a8 │ │ eorseq pc, pc, r4, lsr #28 │ │ - ldc2l 3, cr12, [r0, #348]! @ 0x15c │ │ - ldc2l 4, cr8, [r0, #768]! @ 0x300 │ │ + ldc2l 3, cr12, [r0, #528]! @ 0x210 │ │ + ldc2l 4, cr8, [r0, #948]! @ 0x3b4 │ │ ldc2l 3, cr8, [r2, #1008]! @ 0x3f0 │ │ ldc2l 4, cr9, [r9, #916]! @ 0x394 │ │ andeq r0, r0, r4, lsr r7 │ │ - ldc2l 7, cr2, [r1, #556]! @ 0x22c │ │ - ldc2l 3, cr8, [r0, #528]! @ 0x210 │ │ - ldc2l 6, cr6, [r1, #308]! @ 0x134 │ │ - ldc2l 2, cr8, [r0, #416]! @ 0x1a0 │ │ - stc2l 6, cr10, [lr, #312]! @ 0x138 │ │ - ldc2l 0, cr8, [r0, #848]! @ 0x350 │ │ + ldc2l 7, cr2, [r1, #736]! @ 0x2e0 │ │ + ldc2l 3, cr8, [r0, #708]! @ 0x2c4 │ │ + ldc2l 6, cr6, [r1, #488]! @ 0x1e8 │ │ + ldc2l 2, cr8, [r0, #596]! @ 0x254 │ │ + stc2l 6, cr10, [lr, #492]! @ 0x1ec │ │ + ldc2l 1, cr8, [r0, #4]! │ │ vcmla.f32 d23, d2, d11, #270 │ │ ldc2l 10, cr5, [r2, #976]! @ 0x3d0 @ │ │ - stc2l 12, cr0, [pc, #772]! @ 2329244 │ │ + stc2l 12, cr0, [pc, #952]! @ 23292f8 │ │ ldc2l 10, cr5, [r2, #704]! @ 0x2c0 @ │ │ ldc2l 6, cr7, [r2, #900]! @ 0x384 │ │ strdeq r2, [r0], -r0 │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ @@ -1015853,26 +1015852,26 @@ │ │ ldr r2, [pc, #68] @ 2329b14 │ │ add r2, pc, r2 │ │ cmp r0, r2 │ │ movne r2, #0 │ │ strbne r2, [r0, r3] │ │ movne r2, r0 │ │ b 23298bc │ │ - stc2l 6, cr9, [lr, #892]! @ 0x37c │ │ - stc2l 10, cr15, [lr, #692]! @ 0x2b4 @ │ │ + stc2l 7, cr9, [lr, #48]! @ 0x30 │ │ + stc2l 10, cr15, [lr, #872]! @ 0x368 @ │ │ ldc2l 11, cr4, [r2, #304]! @ 0x130 @ │ │ - stc2l 13, cr15, [lr, #100]! @ 0x64 │ │ + stc2l 13, cr15, [lr, #280]! @ 0x118 │ │ ldc2l 4, cr6, [r2, #596]! @ 0x254 │ │ vcmla.f32 d20, d18, d4, #270 │ │ ldc2l 4, cr6, [r2, #724]! @ 0x2d4 │ │ muleq r0, ip, pc @ │ │ - ldc2l 3, cr11, [r0, #536]! @ 0x218 │ │ - ldc2l 1, cr9, [r1, #780]! @ 0x30c │ │ + ldc2l 3, cr11, [r0, #716]! @ 0x2cc │ │ + ldc2l 1, cr9, [r1, #960]! @ 0x3c0 │ │ eorseq lr, pc, r0, asr #25 │ │ - ldc2l 4, cr7, [r0, #464]! @ 0x1d0 │ │ + ldc2l 4, cr7, [r0, #644]! @ 0x284 │ │ ldc2l 8, cr8, [r9, #368]! @ 0x170 │ │ cmp r0, #0 │ │ mov r1, #0 │ │ ldrbne r3, [r0] │ │ cmpne r3, #0 │ │ bne 2329b34 │ │ uxth r0, r1 │ │ @@ -1016114,15 +1016113,15 @@ │ │ beq 2329d5c │ │ ldr r1, [sp] │ │ mov r4, r0 │ │ mov r0, r2 │ │ bl 22f071c │ │ mov r0, r4 │ │ b 2329d5c │ │ - ldc2l 1, cr8, [r1, #632]! @ 0x278 │ │ + ldc2l 1, cr8, [r1, #812]! @ 0x32c │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ mov r5, r1 │ │ ldr r1, [r0, #92] @ 0x5c │ │ mov r4, r0 │ │ ldr r8, [r0, #100] @ 0x64 │ │ @@ -1016769,19 +1016768,19 @@ │ │ ldc2l 15, cr7, [r9, #788]! @ 0x314 │ │ eorseq lr, pc, r8, lsl #11 │ │ ldc2l 0, cr7, [r2, #512]! @ 0x200 │ │ ldc2l 1, cr8, [r9, #244]! @ 0xf4 │ │ ldc2l 15, cr6, [r2, #928]! @ 0x3a0 │ │ ldc2l 0, cr8, [r9, #836]! @ 0x344 │ │ ldc2l 15, cr6, [r2, #768]! @ 0x300 │ │ - ldc2l 3, cr8, [r1, #428]! @ 0x1ac │ │ - stc2l 14, cr10, [pc, #308]! @ 232aa74 │ │ - stc2l 14, cr14, [lr, #740]! @ 0x2e4 │ │ + ldc2l 3, cr8, [r1, #608]! @ 0x260 │ │ + stc2l 14, cr10, [pc, #488]! @ 232ab28 │ │ + stc2l 14, cr14, [lr, #920]! @ 0x398 │ │ ldc2l 9, cr5, [r2, #2]! @ │ │ - vcmla.f16 d18, d31, d19, #270 │ │ + stc2l 8, cr2, [pc, #832]! @ 232ac8c │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ ldr r6, [fp, #8] │ │ mov r9, r1 │ │ mov r4, r0 │ │ mov r2, #7 │ │ @@ -1017806,15 +1017805,15 @@ │ │ movt r2, #16383 @ 0x3fff │ │ and r1, r1, r2 │ │ str r0, [r6, #24] │ │ orr r1, r1, #128 @ 0x80 │ │ str r1, [r6] │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 13, cr7, [r1, #956]! @ 0x3bc │ │ + ldc2l 14, cr7, [r1, #112]! @ 0x70 │ │ ldc2l 4, cr5, [r2, #412]! @ 0x19c │ │ ldrh r0, [r8, #-24] @ 0xffffffe8 │ │ movw r3, #65528 @ 0xfff8 │ │ ldrh r1, [sl, #96] @ 0x60 │ │ movt r3, #7 │ │ mul r2, r1, r0 │ │ ldrh r0, [r8, #-22] @ 0xffffffea │ │ @@ -1017837,35 +1017836,35 @@ │ │ cmp r0, #0 │ │ bne 232b098 │ │ ldr r1, [r6] │ │ mov r0, #0 │ │ str r0, [r6, #8] │ │ orr r1, r1, #2048 @ 0x800 │ │ b 232b95c │ │ - ldc2l 2, cr6, [r0] │ │ + ldc2l 2, cr6, [r0, #180]! @ 0xb4 │ │ ldc2l 15, cr5, [r2, #656]! @ 0x290 │ │ ldc2l 0, cr7, [r9, #564]! @ 0x234 │ │ ldc2l 6, cr3, [r2, #856]! @ 0x358 │ │ andeq r0, r0, r8, lsr fp │ │ andeq r0, r0, ip, lsr fp │ │ - ldc2l 13, cr9, [r0, #944]! @ 0x3b0 │ │ - stc2l 8, cr14, [lr, #352]! @ 0x160 │ │ - ldc2l 15, cr5, [r0, #368]! @ 0x170 │ │ + ldc2l 14, cr9, [r0, #100]! @ 0x64 │ │ + vcmla.f16 d30, d30, d5, #270 │ │ + ldc2l 15, cr5, [r0, #548]! @ 0x224 │ │ ldc2l 2, cr5, [r2, #700]! @ 0x2bc │ │ - ldc2l 12, cr5, [r0, #352]! @ 0x160 │ │ + ldc2l 12, cr5, [r0, #532]! @ 0x214 │ │ ldc2l 1, cr6, [r2, #208]! @ 0xd0 │ │ ldc2l 1, cr7, [r9, #532]! @ 0x214 │ │ ldc2l 4, cr8, [r2, #928]! @ 0x3a0 │ │ - stc2l 12, cr7, [pc, #252]! @ 232bb20 │ │ - ldc2l 10, cr5, [r0, #624]! @ 0x270 @ │ │ - ldc2l 6, cr7, [r1, #528]! @ 0x210 │ │ - ldc2l 9, cr5, [r0, #384]! @ 0x180 @ │ │ - ldc2l 8, cr7, [r0, #596]! @ 0x254 │ │ - ldc2l 8, cr5, [r0, #496]! @ 0x1f0 │ │ - ldc2l 6, cr13, [r1, #616]! @ 0x268 │ │ + stc2l 12, cr7, [pc, #432]! @ 232bbd4 │ │ + ldc2l 10, cr5, [r0, #804]! @ 0x324 @ │ │ + ldc2l 6, cr7, [r1, #708]! @ 0x2c4 │ │ + ldc2l 9, cr5, [r0, #474]! @ 0x1da @ │ │ + vcmla.f32 , q8, q1, #270 │ │ + vcmla.f32 d21, d16, d25, #270 │ │ + ldc2l 6, cr13, [r1, #796]! @ 0x31c │ │ mov r1, r0 │ │ cmp r1, #0 │ │ ldrbne ip, [r1] │ │ mov r0, #0 │ │ cmpne ip, #0 │ │ bne 232ba54 │ │ bx lr │ │ @@ -1021767,19 +1021766,19 @@ │ │ stm r4, {r2, r8} │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r2, r5 │ │ mov r3, r0 │ │ mov ip, sl │ │ b 232f404 │ │ - ldc2l 4, cr12, [r0, #560]! @ 0x230 │ │ - ldc2l 9, cr7, [r1, #290]! @ 0x122 @ │ │ - ldc2l 15, cr7, [r0, #924]! @ 0x39c │ │ - stc2l 9, cr6, [pc, #452]! @ 232f924 @ │ │ - ldc2l 15, cr7, [r0, #732]! @ 0x2dc │ │ + ldc2l 4, cr12, [r0, #740]! @ 0x2e4 │ │ + ldc2l 9, cr7, [r1, #380]! @ 0x17c @ │ │ + ldc2l 0, cr8, [r0, #80]! @ 0x50 │ │ + stc2l 10, cr6, [pc, #60]! @ 232f79c @ │ │ + ldc2l 15, cr7, [r0, #912]! @ 0x390 │ │ ldc2l 12, cr13, [r1, #240]! @ 0xf0 │ │ ldc2l 12, cr13, [r1, #80]! @ 0x50 │ │ ldc2l 2, cr3, [r9, #288]! @ 0x120 │ │ ldc2l 10, cr3, [r9] @ │ │ ldrdeq r6, [r0], -ip │ │ andeq r6, r0, r0, lsr #19 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ @@ -1031047,16 +1031046,16 @@ │ │ ldreq r1, [sp, #12] │ │ ldreq r0, [sp, #4] │ │ streq r1, [r5] │ │ streq r0, [r4] │ │ moveq r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 4, cr6, [r0, #128]! @ 0x80 │ │ - ldc2l 9, cr1, [r1, #42]! @ 0x2a @ │ │ + ldc2l 4, cr6, [r0, #308]! @ 0x134 │ │ + ldc2l 9, cr1, [r1, #132]! @ 0x84 @ │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov sl, r0 │ │ ldr r9, [r0, #88] @ 0x58 │ │ ldrb r0, [r0, #860] @ 0x35c │ │ add r4, sl, #840 @ 0x348 │ │ @@ -1042508,22 +1042507,22 @@ │ │ cmp r0, #0 │ │ bne 23437b8 │ │ ldr r1, [pc, #32] @ 2343b38 │ │ ldr r0, [sp, #8] │ │ add r1, pc, r1 │ │ strd r0, [r5, #116] @ 0x74 │ │ b 2343850 │ │ - stc2l 4, cr1, [sp, #252]! @ 0xfc │ │ + stc2l 4, cr1, [sp, #432]! @ 0x1b0 │ │ ldc2l 13, cr0, [r8, #224]! @ 0xe0 │ │ eorseq r5, lr, r0, lsr #27 │ │ - stc2l 6, cr9, [sp, #816]! @ 0x330 │ │ - stc2l 6, cr7, [pc, #84]! @ 2343b90 │ │ + stc2l 6, cr9, [sp, #996]! @ 0x3e4 │ │ + stc2l 6, cr7, [pc, #264]! @ 2343c44 │ │ @ instruction: 0xfffff940 │ │ - stc2l 3, cr13, [pc, #632]! @ 2343dbc │ │ - stc2l 1, cr3, [pc, #96]! @ 2343ba8 │ │ + stc2l 3, cr13, [pc, #812]! @ 2343e70 │ │ + stc2l 1, cr3, [pc, #276]! @ 2343c5c │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r6, r1 │ │ ldr r1, [pc, #468] @ 2343d30 │ │ mov r5, r0 │ │ mov r0, r6 │ │ @@ -1042639,23 +1042638,23 @@ │ │ cmp r0, #0 │ │ bne 2343bf4 │ │ ldr r1, [pc, #36] @ 2343d48 │ │ ldr r0, [sp, #4] │ │ add r1, pc, r1 │ │ strd r0, [r6, #116] @ 0x74 │ │ b 2343c68 │ │ - stc2l 4, cr7, [lr, #472]! @ 0x1d8 │ │ + stc2l 4, cr7, [lr, #652]! @ 0x28c │ │ @ instruction: 0xfffff7b8 │ │ - stc2l 15, cr0, [sp, #1004]! @ 0x3ec │ │ + stc2l 0, cr1, [sp, #160]! @ 0xa0 │ │ eorseq r5, lr, r4, asr r9 │ │ - stc2l 2, cr9, [sp, #576]! @ 0x240 │ │ - stc2l 1, cr7, [pc, #868]! @ 23440b0 │ │ + stc2l 2, cr9, [sp, #756]! @ 0x2f4 │ │ + stc2l 2, cr7, [pc, #24]! @ 2343d64 │ │ @ instruction: 0xfffff734 │ │ - stc2l 15, cr12, [pc, #392]! @ 2343edc │ │ - stc2l 12, cr2, [pc, #880]! @ 23440c8 │ │ + stc2l 15, cr12, [pc, #572]! @ 2343f90 │ │ + stc2l 13, cr2, [pc, #36]! @ 2343d7c │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #236 @ 0xec │ │ mov r7, r3 │ │ ldrh r3, [r1, #2] │ │ mov r8, #0 │ │ cmp r3, #0 │ │ @@ -1050831,15 +1050830,15 @@ │ │ mov r0, #1 │ │ vld1.32 {d16-d17}, [r5] │ │ strb r0, [r4, #65] @ 0x41 │ │ add r0, r4, #68 @ 0x44 │ │ vst1.32 {d16-d17}, [r0] │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 3, cr13, [sp, #616]! @ 0x268 │ │ + stc2l 3, cr13, [sp, #796]! @ 0x31c │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r2 │ │ mov r2, r1 │ │ ldr r1, [pc, #48] @ 234bd68 │ │ mov r5, r0 │ │ mov r0, r2 │ │ @@ -1050850,15 +1050849,15 @@ │ │ cmp r1, #0 │ │ popne {r4, r5, fp, pc} │ │ add r0, r5, #68 @ 0x44 │ │ vld1.32 {d16-d17}, [r0] │ │ mov r0, #0 │ │ vst1.32 {d16-d17}, [r4] │ │ pop {r4, r5, fp, pc} │ │ - stc2l 3, cr13, [sp, #56]! @ 0x38 │ │ + stc2l 3, cr13, [sp, #236]! @ 0xec │ │ mov r1, #0 │ │ strb r1, [r0, #70] @ 0x46 │ │ strh r1, [r0, #68] @ 0x44 │ │ mov r1, #8 │ │ str r1, [r0, #64] @ 0x40 │ │ mov r0, #0 │ │ bx lr │ │ @@ -1051444,18 +1051443,18 @@ │ │ strb r0, [r4, #69] @ 0x45 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ ldrb r0, [r5] │ │ strb r0, [r4, #70] @ 0x46 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 6, cr12, [lr, #80]! @ 0x50 │ │ - stc2l 6, cr6, [ip, #360]! @ 0x168 │ │ - stc2l 8, cr2, [lr, #880]! @ 0x370 │ │ - stc2l 5, cr4, [pc, #484]! @ 234c8a8 │ │ + stc2l 6, cr12, [lr, #260]! @ 0x104 │ │ + stc2l 6, cr6, [ip, #540]! @ 0x21c │ │ + stc2l 9, cr2, [lr, #18]! @ │ │ + stc2l 5, cr4, [pc, #664]! @ 234c95c │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r6, r1 │ │ ldr r1, [pc, #148] @ 234c768 │ │ mov r5, r0 │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ @@ -1051490,18 +1051489,18 @@ │ │ b 234c75c │ │ ldrb r0, [r5, #69] @ 0x45 │ │ b 234c75c │ │ ldrb r0, [r5, #70] @ 0x46 │ │ str r0, [r4] │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 5, cr12, [lr, #144]! @ 0x90 │ │ - stc2l 5, cr6, [ip, #424]! @ 0x1a8 │ │ - stc2l 7, cr2, [lr, #944]! @ 0x3b0 │ │ - stc2l 4, cr4, [pc, #548]! @ 234c9a0 │ │ + stc2l 5, cr12, [lr, #324]! @ 0x144 │ │ + stc2l 5, cr6, [ip, #604]! @ 0x25c │ │ + stc2l 8, cr2, [lr, #100]! @ 0x64 │ │ + stc2l 4, cr4, [pc, #728]! @ 234ca54 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #32 │ │ mov lr, #6 │ │ cmp r1, #0 │ │ beq 234c9ec │ │ ldr r2, [r1, #4] │ │ @@ -1054710,15 +1054709,15 @@ │ │ add r1, pc, r1 │ │ str r2, [r4, #8] │ │ strd r0, [r4, #20] │ │ ldr r0, [sp, #4] │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ strdeq r0, [r0], -r4 │ │ - stc2l 1, cr5, [lr, #80]! @ 0x50 │ │ + stc2l 1, cr5, [lr, #260]! @ 0x104 │ │ andeq r0, r0, r0, lsl #12 │ │ andeq r0, r0, r0, asr r3 │ │ andeq r0, r0, r8, asr #5 │ │ andeq r0, r0, r8, asr #6 │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ @@ -1054980,15 +1054979,15 @@ │ │ ldrls r1, [pc, #28] @ 234fde8 │ │ addls r1, pc, r1 │ │ ldrls r4, [r1, r0, lsl #2] │ │ b 234fd10 │ │ mov r4, #10 │ │ b 234fd10 │ │ strheq r0, [r0], -ip │ │ - stc2l 11, cr4, [lr, #1008]! @ 0x3f0 @ │ │ + stc2l 12, cr4, [lr, #164]! @ 0xa4 │ │ andeq r0, r0, ip, asr #1 │ │ ldc2l 4, cr1, [r0, #864]! @ 0x360 │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #8 │ │ mul r1, r2, r1 │ │ add r2, sp, #4 │ │ @@ -1057895,15 +1057894,15 @@ │ │ vst1.32 {d18-d19}, [r1] │ │ str r2, [r0] │ │ b 2352b58 │ │ mov r8, #7 │ │ mov r0, r8 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 7, cr3, [pc, #852]! @ 2352ec0 │ │ + vcmla.f16 d19, d15, d2, #270 │ │ eorseq r6, sp, r8, lsr #29 │ │ ldrhteq r6, [sp], -r8 │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r1, [r0, #8] │ │ ldr r4, [r0] │ │ cmp r1, #0 │ │ @@ -1059932,15 +1059931,15 @@ │ │ bl 22f071c │ │ str r5, [r4, #36] @ 0x24 │ │ str r5, [r4, #40] @ 0x28 │ │ strb r5, [r4] │ │ mov r0, r6 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 15, cr6, [lr, #108]! @ 0x6c │ │ + stc2l 15, cr6, [lr, #288]! @ 0x120 │ │ ldrsbteq r5, [sp], -r0 │ │ eorseq r5, sp, r8, lsl r8 │ │ ldrhteq r5, [sp], -ip │ │ mlaseq sp, r4, r6, r5 │ │ eorseq r5, sp, ip, ror r1 │ │ eorseq r5, sp, r4, asr r1 │ │ ldrshteq r5, [sp], -ip │ │ @@ -1060738,15 +1060737,15 @@ │ │ b 235559c │ │ mov r7, #0 │ │ b 23557c8 │ │ mov r7, r8 │ │ mov r0, r7 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 10, cr8, [sp, #208]! @ 0xd0 @ │ │ + stc2l 10, cr8, [sp, #388]! @ 0x184 @ │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r5, r0 │ │ bl 2355918 │ │ ldr r1, [r5, #12] │ │ mov r0, #0 │ │ cmp r1, #0 │ │ @@ -1070931,15 +1070930,15 @@ │ │ add r1, r1, r0 │ │ mov r0, r4 │ │ bl 237139c │ │ mov r0, r4 │ │ mov r1, #3 │ │ bl 235f30c │ │ eorseq r8, lr, r8, lsr sp │ │ - stc2l 4, cr5, [fp, #728]! @ 0x2d8 │ │ + stc2l 4, cr5, [fp, #908]! @ 0x38c │ │ ldrshteq r8, [lr], -r4 │ │ sub sp, sp, #16 │ │ ldr r7, [r1, #4] │ │ ldr r3, [r0, #16] │ │ ldr r6, [pc, #152] @ 235f7cc │ │ cmn r7, #13 │ │ mvn r4, r7 │ │ @@ -1071145,15 +1071144,15 @@ │ │ ldr r2, [sp, #4] │ │ movw r0, #457 @ 0x1c9 │ │ ldr r1, [pc, #16] @ 235fa74 │ │ mov r3, r5 │ │ ldr r1, [pc, r1] │ │ add r1, r1, r0 │ │ b 235fa40 │ │ - stc2l 1, cr9, [fp, #264]! @ 0x108 │ │ + stc2l 1, cr9, [fp, #444]! @ 0x1bc │ │ eorseq r8, lr, r8, lsl #19 │ │ ldrhteq r8, [lr], -r8 │ │ ldr r3, [pc, #8] @ 235fa8c │ │ ldr r3, [pc, r3] │ │ add r2, r3, r2 │ │ bl 235f9c0 │ │ eorseq r8, lr, ip, ror #18 │ │ @@ -1071254,15 +1071253,15 @@ │ │ cmp r3, #0 │ │ addne r3, r0, r3, lsl #3 │ │ add r1, pc, r1 │ │ mov r0, r4 │ │ bl 236ac30 │ │ add sp, sp, #8 │ │ pop {r4, pc} │ │ - stc2l 10, cr0, [ip, #308]! @ 0x134 @ │ │ + stc2l 10, cr0, [ip, #488]! @ 0x1e8 @ │ │ │ │ 0235fc00 : │ │ sub sp, sp, #16 │ │ str r2, [sp, #8] │ │ add r2, sp, #8 │ │ mov r4, r0 │ │ str r3, [sp, #12] │ │ @@ -1077987,15 +1077986,15 @@ │ │ cmp r0, #0 │ │ beq 23664e4 │ │ mov r0, #1 │ │ pop {r4, r5, r6, r7, r8, pc} │ │ mov r0, r8 │ │ pop {r4, r5, r6, r7, r8, pc} │ │ ldc2l 8, cr15, [r6, #456]! @ 0x1c8 │ │ - stc2l 11, cr2, [ip, #560]! @ 0x230 @ │ │ + stc2l 11, cr2, [ip, #740]! @ 0x2e4 @ │ │ cmn r1, #-67108862 @ 0xfc000002 │ │ bxhi lr │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #12 │ │ ldr fp, [r0, #8] │ │ mov r7, r1 │ │ ldrb r1, [fp, #17] │ │ @@ -1080579,15 +1080578,15 @@ │ │ add r1, r8, r7, lsl #2 │ │ add r5, r5, r6 │ │ add r7, r7, #1 │ │ cmp r4, #0 │ │ str r0, [r1, #288] @ 0x120 │ │ bne 2368d60 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - stc2l 1, cr6, [ip, #760]! @ 0x2f8 │ │ + stc2l 1, cr6, [ip, #940]! @ 0x3ac │ │ push {r4, r5, fp, lr} │ │ mov r5, r1 │ │ mov r1, r2 │ │ mov r4, r0 │ │ bl 2367990 │ │ cmp r0, #0 │ │ ldrne r1, [r0, #4] │ │ @@ -1082082,15 +1082081,15 @@ │ │ bne 236a500 │ │ subs r1, r1, #1 │ │ bxeq lr │ │ b 236a500 │ │ ldr r0, [pc, #4] @ 236a524 │ │ add r0, pc, r0 │ │ bx lr │ │ - stc2l 1, cr6, [fp, #100]! @ 0x64 │ │ + stc2l 1, cr6, [fp, #280]! @ 0x118 │ │ push {r4, lr} │ │ ldr lr, [r0, #4] │ │ mov ip, r0 │ │ mov r0, #0 │ │ cmn lr, #9 │ │ bne 236a5c4 │ │ ldr ip, [ip] │ │ @@ -1082126,16 +1082125,16 @@ │ │ bne 236a5b0 │ │ subs r1, r1, #1 │ │ bne 236a5b0 │ │ pop {r4, pc} │ │ ldr r0, [pc, #4] @ 236a5d4 │ │ add r0, pc, r0 │ │ pop {r4, pc} │ │ - stc2l 0, cr6, [fp, #420]! @ 0x1a4 │ │ - stc2l 0, cr6, [fp, #804]! @ 0x324 │ │ + stc2l 0, cr6, [fp, #600]! @ 0x258 │ │ + stc2l 0, cr6, [fp, #984]! @ 0x3d8 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #20 │ │ str r3, [sp, #4] │ │ mov r4, r1 │ │ str r2, [sp, #12] │ │ add sl, r0, #64 @ 0x40 │ │ add r6, sp, #16 │ │ @@ -1082304,20 +1082303,20 @@ │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [pc, #24] @ 236a8a4 │ │ add r0, pc, r0 │ │ add sp, sp, #20 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldc2l 9, cr11, [r6, #192]! @ 0xc0 @ │ │ ldc2l 8, cr11, [r6, #864]! @ 0x360 │ │ - stc2l 10, cr1, [fp, #132]! @ 0x84 @ │ │ - stc2l 8, cr14, [fp, #716]! @ 0x2cc │ │ - stc2l 3, cr4, [sp, #716]! @ 0x2cc │ │ - stc2l 13, cr5, [fp, #804]! @ 0x324 │ │ - stc2l 13, cr9, [sp, #436]! @ 0x1b4 │ │ - stc2l 6, cr6, [ip, #292]! @ 0x124 │ │ + stc2l 10, cr1, [fp, #312]! @ 0x138 @ │ │ + vcmla.f16 q15, , q8, #270 │ │ + stc2l 3, cr4, [sp, #896]! @ 0x380 │ │ + stc2l 13, cr5, [fp, #984]! @ 0x3d8 │ │ + stc2l 13, cr9, [sp, #616]! @ 0x268 │ │ + stc2l 6, cr6, [ip, #472]! @ 0x1d8 │ │ push {r4, r5, r6, r7, r8, lr} │ │ mov r8, r2 │ │ mov r2, r1 │ │ ldr r1, [r0, #28] │ │ mov r4, #0 │ │ cmp r1, r2 │ │ bcs 236a9a0 │ │ @@ -1082372,15 +1082371,15 @@ │ │ ldr r4, [pc, #20] @ 236a9ac │ │ add r0, r0, #20 │ │ str r0, [r8] │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ pop {r4, r5, r6, r7, r8, pc} │ │ ldc2l 6, cr11, [r6, #256]! @ 0x100 │ │ - stc2l 8, cr0, [fp, #584]! @ 0x248 │ │ + stc2l 8, cr0, [fp, #764]! @ 0x2fc │ │ push {r4, r5, r6, lr} │ │ ldrb r3, [r1, #6] │ │ mov ip, r0 │ │ mvn r0, #0 │ │ cmp r3, #0 │ │ popne {r4, r5, r6, pc} │ │ cmp r2, #0 │ │ @@ -1082529,18 +1082528,18 @@ │ │ cmn r6, #1 │ │ ldr r1, [pc, #28] @ 236ac2c │ │ add r2, pc, r2 │ │ add r1, pc, r1 │ │ movne r1, r2 │ │ pop {r4, r5, r6, lr} │ │ b 270ade0 │ │ - stc2l 13, cr9, [ip, #636]! @ 0x27c │ │ - stc2l 0, cr6, [sp, #40]! @ 0x28 │ │ - stc2l 4, cr6, [fp, #860]! @ 0x35c │ │ - stc2l 15, cr13, [ip, #972]! @ 0x3cc │ │ + stc2l 13, cr9, [ip, #816]! @ 0x330 │ │ + stc2l 0, cr6, [sp, #220]! @ 0xdc │ │ + stc2l 5, cr6, [fp, #16]! │ │ + stc2l 0, cr14, [ip, #128]! @ 0x80 │ │ push {r4, r5, r6, r7, fp, lr} │ │ sub sp, sp, #64 @ 0x40 │ │ mov r4, r1 │ │ cmp r2, #0 │ │ beq 236ac54 │ │ ldr r5, [r2] │ │ ldrb r1, [r5, #6] │ │ @@ -1082602,16 +1082601,16 @@ │ │ add r1, pc, r1 │ │ str r4, [sp] │ │ bl 237139c │ │ add sp, sp, #64 @ 0x40 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldr r1, [r7, r1, lsl #2] │ │ b 236acbc │ │ - stc2l 14, cr9, [sl, #392]! @ 0x188 │ │ - stc2l 4, cr2, [ip, #660]! @ 0x294 │ │ + stc2l 14, cr9, [sl, #572]! @ 0x23c │ │ + stc2l 4, cr2, [ip, #840]! @ 0x348 │ │ push {r4, r5, r6, lr} │ │ ldrd r4, [r1, #40] @ 0x28 │ │ mov r3, #0 │ │ ldr r6, [r1, #8] │ │ ldr ip, [r4, #16] │ │ cmp r6, r2 │ │ bcc 236adc0 │ │ @@ -1082682,17 +1082681,17 @@ │ │ ldr r1, [pc, #20] @ 236ae84 │ │ add r1, pc, r1 │ │ pop {r4, r5, r6, lr} │ │ b 237139c │ │ ldr r2, [lr, r2, lsl #2] │ │ b 236ad80 │ │ stc2l 4, cr3, [lr, #120]! @ 0x78 │ │ - stc2l 13, cr3, [sp, #856]! @ 0x358 │ │ - stc2l 9, cr13, [sp, #486]! @ 0x1e6 @ │ │ - stc2l 14, cr7, [sl, #192]! @ 0xc0 │ │ + stc2l 14, cr3, [sp, #12]! │ │ + stc2l 10, cr13, [sp, #128]! @ 0x80 @ │ │ + stc2l 14, cr7, [sl, #372]! @ 0x174 │ │ stc2l 3, cr3, [lr, #840]! @ 0x348 │ │ │ │ 0236ae94 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ sub sp, sp, #8 │ │ mov r4, #0 │ │ mov r3, r2 │ │ @@ -1082903,17 +1082902,17 @@ │ │ cmp r2, #0 │ │ bne 236b1d0 │ │ subs r1, r1, #1 │ │ bne 236b1d0 │ │ b 236b15c │ │ ldr r9, [sp, #4] │ │ b 236b15c │ │ - stc2l 6, cr7, [sp, #132]! @ 0x84 │ │ + stc2l 6, cr7, [sp, #312]! @ 0x138 │ │ ldc2l 14, cr10, [r6, #960]! @ 0x3c0 │ │ - stc2l 12, cr7, [fp, #52]! @ 0x34 │ │ + stc2l 12, cr7, [fp, #232]! @ 0xe8 │ │ │ │ 0236b1fc : │ │ push {r4, lr} │ │ sub sp, sp, #8 │ │ mov r3, r2 │ │ mov r4, r0 │ │ mov r0, #0 │ │ @@ -1083226,19 +1083225,19 @@ │ │ cmp r1, r3 │ │ bcc 236b5e8 │ │ mov r0, r5 │ │ bl 236c8e8 │ │ mov r0, #1 │ │ add sp, sp, #20 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 9, cr5, [ip, #334]! @ 0x14e @ │ │ - stc2l 13, cr10, [sp, #620]! @ 0x26c │ │ - stc2l 11, cr0, [sp, #956]! @ 0x3bc @ │ │ + stc2l 9, cr5, [ip, #424]! @ 0x1a8 @ │ │ + stc2l 13, cr10, [sp, #800]! @ 0x320 │ │ + stc2l 12, cr0, [sp, #112]! @ 0x70 │ │ stc2l 14, cr2, [lr, #288]! @ 0x120 │ │ - stc2l 2, cr5, [fp, #68]! @ 0x44 │ │ + stc2l 2, cr5, [fp, #248]! @ 0xf8 │ │ │ │ 0236b708 : │ │ mov r3, #0 │ │ b 236b24c │ │ │ │ 0236b710 : │ │ push {r4, r5, r6, r7, r8, lr} │ │ @@ -1083588,15 +1083587,15 @@ │ │ ldr r1, [sp, #28] │ │ cmp r1, #0 │ │ ldrne r0, [r4, #8] │ │ addne r0, r0, r1 │ │ strne r0, [r4] │ │ add sp, sp, #36 @ 0x24 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 8, cr11, [sl, #968]! @ 0x3c8 │ │ + stc2l 9, cr11, [sl, #62]! @ 0x3e @ │ │ push {r4, r6, r7, lr} │ │ ldrd r6, [r1, #40] @ 0x28 │ │ cmn r7, #1 │ │ beq 236bd04 │ │ ldrb r1, [r6, #20] │ │ mov r3, r2 │ │ cmp r1, #64 @ 0x40 │ │ @@ -1083649,16 +1083648,16 @@ │ │ mov r0, #1 │ │ pop {r4, r6, r7, pc} │ │ mov r0, r4 │ │ mov r1, #1 │ │ bl 23659c8 │ │ mov r1, r4 │ │ b 236bd34 │ │ - stc2l 14, cr4, [sp, #664]! @ 0x298 │ │ - stc2l 3, cr5, [fp, #600]! @ 0x258 │ │ + stc2l 14, cr4, [sp, #844]! @ 0x34c │ │ + stc2l 3, cr5, [fp, #780]! @ 0x30c │ │ │ │ 0236bd88 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #108 @ 0x6c │ │ mov r5, r1 │ │ mov r8, r0 │ │ ldrd r0, [r0, #16] │ │ @@ -1083910,25 +1083909,25 @@ │ │ sub r0, r1, r0 │ │ ldr r1, [sp, #4] │ │ rsb r1, r1, r0, asr #3 │ │ mov r0, r8 │ │ bl 270bbf0 │ │ add sp, sp, #108 @ 0x6c │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 15, cr0, [fp, #636]! @ 0x27c │ │ - stc2l 2, cr13, [fp, #680]! @ 0x2a8 │ │ - stc2l 15, cr2, [ip, #980]! @ 0x3d4 │ │ - stc2l 3, cr15, [sl, #516]! @ 0x204 │ │ + stc2l 15, cr0, [fp, #816]! @ 0x330 │ │ + stc2l 2, cr13, [fp, #860]! @ 0x35c │ │ + stc2l 0, cr3, [ip, #136]! @ 0x88 │ │ + stc2l 3, cr15, [sl, #696]! @ 0x2b8 │ │ stc2l 4, cr0, [lr, #716]! @ 0x2cc │ │ - stc2l 6, cr8, [sp, #980]! @ 0x3d4 │ │ - stc2l 4, cr11, [sl, #896]! @ 0x380 │ │ - stc2l 15, cr4, [ip, #464]! @ 0x1d0 │ │ - stc2l 3, cr13, [sl, #100]! @ 0x64 │ │ - stc2l 10, cr12, [ip, #804]! @ 0x324 @ │ │ - stc2l 2, cr11, [sl, #656]! @ 0x290 │ │ + stc2l 7, cr8, [sp, #136]! @ 0x88 │ │ + stc2l 5, cr11, [sl, #52]! @ 0x34 │ │ + stc2l 15, cr4, [ip, #644]! @ 0x284 │ │ + stc2l 3, cr13, [sl, #280]! @ 0x118 │ │ + stc2l 10, cr12, [ip, #984]! @ 0x3d8 @ │ │ + stc2l 2, cr11, [sl, #836]! @ 0x344 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ add r1, pc, #168 @ 0xa8 │ │ vld1.64 {d18-d19}, [r0] │ │ vmov.i32 q10, #0 @ 0x00000000 │ │ vld1.64 {d16-d17}, [r1 :128] │ │ add r1, pc, #168 @ 0xa8 │ │ @@ -1084130,15 +1084129,15 @@ │ │ streq r2, [r0] │ │ streq r1, [r0, #4] │ │ mov r0, r4 │ │ bl 236c1c0 │ │ mov r5, #1 │ │ mov r0, r5 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 3, cr6, [sp, #476]! @ 0x1dc │ │ + stc2l 3, cr6, [sp, #656]! @ 0x290 │ │ push {r4, r5, r6, lr} │ │ ldr r6, [r0, #44] @ 0x2c │ │ movw r1, #65507 @ 0xffe3 │ │ cmp r6, r1 │ │ popcc {r4, r5, r6, pc} │ │ ldr r1, [r0, #20] │ │ ldr r4, [r0, #28] │ │ @@ -1086177,17 +1086176,17 @@ │ │ add r0, pc, r0 │ │ ldr r1, [r8] │ │ bl 270bc60 │ │ ldr r1, [r8] │ │ mov r0, #10 │ │ bl 270abb0 │ │ b 236e430 │ │ - stc2l 11, cr12, [fp, #672]! @ 0x2a0 @ │ │ + stc2l 11, cr12, [fp, #852]! @ 0x354 @ │ │ eorseq r9, ip, r0, ror #17 │ │ - stc2l 6, cr10, [sl, #504]! @ 0x1f8 │ │ + stc2l 6, cr10, [sl, #684]! @ 0x2ac │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ push {fp, lr} │ │ vpush {d8} │ │ ldr ip, [sp, #16] │ │ vmov d8, r0, r1 │ │ cmp ip, #10 │ │ bhi 236e5a4 │ │ @@ -1087880,15 +1087879,15 @@ │ │ strb r6, [r0, #2] │ │ add r0, r0, #10 │ │ pop {r4, r5, r6, pc} │ │ movw r1, #21838 @ 0x554e │ │ movt r1, #19532 @ 0x4c4c │ │ str r1, [r0], #4 │ │ bx lr │ │ - stc2l 13, cr7, [sp, #604]! @ 0x25c │ │ + stc2l 13, cr7, [sp, #784]! @ 0x310 │ │ cmp r1, #128 @ 0x80 │ │ strbcc r1, [r0], #1 │ │ bxcc lr │ │ orr r2, r1, #128 @ 0x80 │ │ strb r2, [r0], #1 │ │ lsr r2, r1, #7 │ │ lsrs r1, r1, #14 │ │ @@ -1088032,15 +1088031,15 @@ │ │ movw r1, #21838 @ 0x554e │ │ strh r1, [r2] │ │ add r1, r2, #4 │ │ strb r3, [r2, #3] │ │ strb r3, [r2, #2] │ │ str r1, [r0] │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 11, cr7, [sp, #412]! @ 0x19c @ │ │ + stc2l 11, cr7, [sp, #592]! @ 0x250 @ │ │ ldr r2, [r1, #16] │ │ add r1, r1, #20 │ │ b 23701c8 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #4 │ │ ldrd r6, [r0] │ │ cmp r7, r6 │ │ @@ -1088474,16 +1088473,16 @@ │ │ cmp ip, #0 │ │ bne 2370714 │ │ b 2370728 │ │ sub r5, r5, #1 │ │ cmp ip, #0 │ │ bne 2370714 │ │ b 2370728 │ │ - stc2l 4, cr8, [sl, #40]! @ 0x28 │ │ - stc2l 7, cr7, [sp, #12]! │ │ + stc2l 4, cr8, [sl, #220]! @ 0xdc │ │ + stc2l 7, cr7, [sp, #192]! @ 0xc0 │ │ push {r4, r5, r6, lr} │ │ mov r6, r1 │ │ mov r4, r0 │ │ mov r0, r2 │ │ mov r1, r3 │ │ bl 26fd9b4 │ │ mov r5, r0 │ │ @@ -1089012,19 +1089011,19 @@ │ │ add r0, r6, #6 │ │ sub r2, r0, r8 │ │ mov r0, r9 │ │ mov r1, r8 │ │ bl 2366964 │ │ add sp, sp, #32 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - stc2l 12, cr1, [sl, #848]! @ 0x350 │ │ + stc2l 13, cr1, [sl, #4]! │ │ stc2l 1, cr1, [sl, #312]! @ 0x138 │ │ - stc2l 1, cr13, [fp, #912]! @ 0x390 │ │ + stc2l 2, cr13, [fp, #68]! @ 0x44 │ │ ldrshteq r8, [fp], -ip │ │ - stc2l 11, cr6, [sp, #1020]! @ 0x3fc @ │ │ + stc2l 12, cr6, [sp, #176]! @ 0xb0 │ │ push {r4, r5, fp, lr} │ │ sub sp, sp, #16 │ │ add r5, sp, #5 │ │ mov r4, r0 │ │ mov r0, r5 │ │ bl 236fd00 │ │ sub r2, r0, r5 │ │ @@ -1090178,16 +1090177,16 @@ │ │ bcc 2372348 │ │ ldr r1, [r8, r1, lsl #2] │ │ ldr r2, [sp, #224] @ 0xe0 │ │ cmp r1, r2 │ │ bne 2372534 │ │ sub r4, r4, #9 │ │ b 2372350 │ │ - stc2l 6, cr3, [sl, #1008]! @ 0x3f0 │ │ - stc2l 12, cr5, [fp, #684]! @ 0x2ac │ │ + stc2l 7, cr3, [sl, #164]! @ 0xa4 │ │ + stc2l 12, cr5, [fp, #864]! @ 0x360 │ │ mov r3, r1 │ │ mov r0, ip │ │ str r4, [sp, #88] @ 0x58 │ │ ldr r1, [r0] │ │ movw r0, #15241 @ 0x3b89 │ │ ldr r2, [r8, r3, lsl #2] │ │ movt r0, #21990 @ 0x55e6 │ │ @@ -1098546,17 +1098545,17 @@ │ │ tst r1, #1 │ │ ldreq r1, [pc, #24] @ 237a330 │ │ addeq r1, pc, r1 │ │ ldrne r1, [pc, #8] @ 237a328 │ │ addne r1, pc, r1 │ │ b 237139c │ │ ldc2l 10, cr11, [r5, #296]! @ 0x128 @ │ │ - stc2l 0, cr15, [r9, #928]! @ 0x3a0 │ │ + stc2l 1, cr15, [r9, #84]! @ 0x54 │ │ eorseq pc, sl, ip, lsr #20 │ │ - stc2l 8, cr14, [fp, #992]! @ 0x3e0 │ │ + stc2l 9, cr14, [fp, #74]! @ 0x4a @ │ │ sub sp, sp, #16 │ │ mov r4, r2 │ │ mov r2, #0 │ │ cmp r1, #0 │ │ str r3, [sp, #12] │ │ beq 237a3e4 │ │ movw r2, #286 @ 0x11e │ │ @@ -1098610,16 +1098609,16 @@ │ │ mov r1, #1 │ │ bl 23659c8 │ │ mov r1, r0 │ │ mov r0, r5 │ │ b 237a370 │ │ eorseq pc, sl, r4, lsl #19 │ │ ldc2l 9, cr11, [r5, #308]! @ 0x134 @ │ │ - vcmla.f16 q15, , q2, #270 │ │ - stc2l 0, cr15, [r9, #192]! @ 0xc0 │ │ + stc2l 8, cr14, [fp, #452]! @ 0x1c4 │ │ + stc2l 0, cr15, [r9, #372]! @ 0x174 │ │ push {r4, r5, r6, r7, fp, lr} │ │ ldr r7, [pc, #68] @ 237a480 │ │ mov r4, r0 │ │ mov r6, #0 │ │ add r7, pc, r7 │ │ ldr r5, [r7, r6, lsl #2] │ │ mov r0, r5 │ │ @@ -1099260,15 +1099259,15 @@ │ │ strd r0, [r4, #52] @ 0x34 │ │ b 237add0 │ │ ldr r2, [pc, #12] @ 237ae50 │ │ mov r0, r4 │ │ mov r1, #67108864 @ 0x4000000 │ │ add r2, pc, r2 │ │ bl 237d884 │ │ - stc2l 3, cr0, [sl, #984]! @ 0x3d8 │ │ + stc2l 4, cr0, [sl, #140]! @ 0x8c │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #124 @ 0x7c │ │ mov r4, r0 │ │ ldr r0, [r0, #108] @ 0x6c │ │ add r0, r0, #1 │ │ str r0, [r4, #108] @ 0x6c │ │ cmp r0, #199 @ 0xc7 │ │ @@ -1101381,24 +1101380,24 @@ │ │ movw r1, #2426 @ 0x97a │ │ bl 237d8c8 │ │ mov r0, r4 │ │ mov r1, #0 │ │ movw r2, #2461 @ 0x99d │ │ movw r3, #65476 @ 0xffc4 │ │ bl 237a334 │ │ - stc2l 4, cr0, [ip, #72]! @ 0x48 │ │ - stc2l 4, cr4, [ip, #528]! @ 0x210 │ │ - stc2l 4, cr0, [ip, #168]! @ 0xa8 │ │ - stc2l 4, cr4, [ip, #112]! @ 0x70 │ │ - stc2l 6, cr10, [r9, #328]! @ 0x148 │ │ - stc2l 4, cr10, [r9, #808]! @ 0x328 │ │ - stc2l 5, cr10, [r9, #568]! @ 0x238 │ │ - stc2l 6, cr10, [r9, #552]! @ 0x228 │ │ - stc2l 5, cr10, [r9, #440]! @ 0x1b8 │ │ - stc2l 6, cr10, [r9, #840]! @ 0x348 │ │ + stc2l 4, cr0, [ip, #252]! @ 0xfc │ │ + stc2l 4, cr4, [ip, #708]! @ 0x2c4 │ │ + stc2l 4, cr0, [ip, #348]! @ 0x15c │ │ + stc2l 4, cr4, [ip, #292]! @ 0x124 │ │ + stc2l 6, cr10, [r9, #508]! @ 0x1fc │ │ + stc2l 4, cr10, [r9, #988]! @ 0x3dc │ │ + stc2l 5, cr10, [r9, #748]! @ 0x2ec │ │ + stc2l 6, cr10, [r9, #732]! @ 0x2dc │ │ + stc2l 5, cr10, [r9, #620]! @ 0x26c │ │ + stc2l 6, cr10, [r9, #1020]! @ 0x3fc │ │ mov r4, r0 │ │ ldr r5, [r0, #36] @ 0x24 │ │ bl 237a2d8 │ │ mov r3, r0 │ │ mov r0, r4 │ │ mov r1, r5 │ │ movw r2, #2385 @ 0x951 │ │ @@ -1101892,15 +1101891,15 @@ │ │ add r2, r6, r2 │ │ ldr r7, [r3], #8 │ │ subs r1, r1, #1 │ │ sub r7, r7, r0 │ │ str r7, [r2], #4 │ │ bne 237d758 │ │ b 237d638 │ │ - stc2l 13, cr1, [sl, #112]! @ 0x70 │ │ + stc2l 13, cr1, [sl, #292]! @ 0x124 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #4 │ │ cmn r1, #1 │ │ beq 237d870 │ │ ldr ip, [sp, #40] @ 0x28 │ │ movw r9, #32768 @ 0x8000 │ │ ldr r6, [r0, #52] @ 0x34 │ │ @@ -1104357,16 +1104356,16 @@ │ │ movw r2, #2574 @ 0xa0e │ │ bl 237a334 │ │ mov r0, r4 │ │ mov r1, #0 │ │ movw r2, #2461 @ 0x99d │ │ movw r3, #65476 @ 0xffc4 │ │ bl 237a334 │ │ - stc2l 2, cr3, [r9, #696]! @ 0x2b8 │ │ - stc2l 6, cr7, [r9, #808]! @ 0x328 │ │ + stc2l 2, cr3, [r9, #876]! @ 0x36c │ │ + stc2l 6, cr7, [r9, #988]! @ 0x3dc │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #52 @ 0x34 │ │ mov r4, r0 │ │ ldr r5, [r0] │ │ ldr r0, [r0, #36] @ 0x24 │ │ mov r6, r1 │ │ movw r1, #287 @ 0x11f │ │ @@ -1106339,15 +1106338,15 @@ │ │ mov r1, #200 @ 0xc8 │ │ ldr r0, [r5] │ │ add r2, pc, r2 │ │ bl 237d884 │ │ ldr r0, [r7, #4] │ │ movw r1, #2426 @ 0x97a │ │ bl 237d8c8 │ │ - stc2l 13, cr0, [fp, #52]! @ 0x34 │ │ + stc2l 13, cr0, [fp, #232]! @ 0xe8 │ │ │ │ 02381cf0 : │ │ push {r4, r5, r6, lr} │ │ sub sp, sp, #120 @ 0x78 │ │ mov r4, r0 │ │ ldr r0, [pc, #132] @ 2381d88 │ │ ldr r5, [pc, #132] @ 2381d8c │ │ @@ -1106380,15 +1106379,15 @@ │ │ bcs 2381d7c │ │ mov r0, r5 │ │ add sp, sp, #120 @ 0x78 │ │ pop {r4, r5, r6, pc} │ │ mov r0, r4 │ │ bl 23642f4 │ │ b 2381d70 │ │ - stc2l 14, cr6, [r9, #72]! @ 0x48 │ │ + stc2l 14, cr6, [r9, #252]! @ 0xfc │ │ andeq r0, r0, r8, ror r0 │ │ push {r4, r5, r6, r7, r8, lr} │ │ mov r8, r0 │ │ ldr r0, [r0, #40] @ 0x28 │ │ mvn r1, #0 │ │ mov r5, r2 │ │ str r1, [r0, #24] │ │ @@ -1106489,15 +1106488,15 @@ │ │ mov r0, r5 │ │ add sp, sp, #120 @ 0x78 │ │ pop {r4, r5, r6, pc} │ │ mov r0, r4 │ │ bl 23642f4 │ │ b 2381f18 │ │ @ instruction: 0xfffffed8 │ │ - stc2l 12, cr6, [r9, #392]! @ 0x188 │ │ + stc2l 12, cr6, [r9, #572]! @ 0x23c │ │ │ │ 02381f38 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ sub sp, sp, #1152 @ 0x480 │ │ mov r7, r2 │ │ mov r5, r1 │ │ mov r4, r0 │ │ @@ -1106600,23 +1106599,23 @@ │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ mov r0, r8 │ │ add sp, sp, #1152 @ 0x480 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ mov r0, r4 │ │ bl 23642f4 │ │ b 2382050 │ │ - stc2l 8, cr0, [ip, #492]! @ 0x1ec │ │ - stc2l 5, cr14, [sl, #456]! @ 0x1c8 │ │ - stc2l 10, cr0, [fp, #272]! @ 0x110 @ │ │ + vcmla.f16 d16, d28, d24, #270 │ │ + stc2l 5, cr14, [sl, #636]! @ 0x27c │ │ + stc2l 10, cr0, [fp, #452]! @ 0x1c4 @ │ │ stc2l 2, cr12, [ip, #504]! @ 0x1f8 │ │ eorseq r9, fp, r4, lsr r3 │ │ andeq r0, r0, ip, lsl r1 │ │ @ instruction: 0xfffffd94 │ │ - stc2l 11, cr6, [r9, #168]! @ 0xa8 @ │ │ - stc2l 3, cr5, [r9, #424]! @ 0x1a8 │ │ + stc2l 11, cr6, [r9, #348]! @ 0x15c @ │ │ + stc2l 3, cr5, [r9, #604]! @ 0x25c │ │ push {r4, r5, fp, lr} │ │ ldr r0, [r1] │ │ mov r5, r2 │ │ mov r4, r1 │ │ bl 2703060 │ │ mov r1, r0 │ │ mov r0, #0 │ │ @@ -1106677,15 +1106676,15 @@ │ │ bcs 2382200 │ │ mov r0, r5 │ │ add sp, sp, #128 @ 0x80 │ │ pop {r4, r5, r6, pc} │ │ mov r0, r4 │ │ bl 23642f4 │ │ b 23821f4 │ │ - stc2l 9, cr6, [r9, #316]! @ 0x13c @ │ │ + stc2l 9, cr6, [r9, #406]! @ 0x196 @ │ │ muleq r0, r0, r0 │ │ @ instruction: 0xfffffc00 │ │ ldr r0, [r1, #4] │ │ cmp r0, #0 │ │ moveq r0, #0 │ │ strne r0, [r2] │ │ movne r2, #0 │ │ @@ -1106733,15 +1106732,15 @@ │ │ add sp, sp, #128 @ 0x80 │ │ pop {r4, r5, r6, pc} │ │ mov r0, r4 │ │ bl 23642f4 │ │ b 23822c4 │ │ @ instruction: 0xffffffbc │ │ @ instruction: 0xfffffb30 │ │ - stc2l 8, cr6, [r9, #744]! @ 0x2e8 │ │ + vcmla.f16 q11, , , #270 │ │ │ │ 023822e8 : │ │ push {r4, r5, r6, lr} │ │ sub sp, sp, #128 @ 0x80 │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r5, r1 │ │ @@ -1106783,15 +1106782,15 @@ │ │ add sp, sp, #128 @ 0x80 │ │ pop {r4, r5, r6, pc} │ │ mov r0, r4 │ │ bl 23642f4 │ │ b 2382384 │ │ @ instruction: 0xfffffefc │ │ @ instruction: 0xfffffa64 │ │ - stc2l 7, cr6, [r9, #1000]! @ 0x3e8 │ │ + vcmla.f16 d22, d9, d23, #270 │ │ │ │ 023823a8 : │ │ mov ip, r2 │ │ mov r2, r1 │ │ ldr r1, [r0, #20] │ │ ldr r3, [r1, #-4] │ │ cmn r3, #9 │ │ @@ -1107389,16 +1107388,16 @@ │ │ add r3, r0, r1 │ │ mov r0, r4 │ │ mov r1, ip │ │ bl 237139c │ │ mov r0, r4 │ │ mov r1, #3 │ │ bl 235f30c │ │ - stc2l 15, cr11, [fp, #408]! @ 0x198 │ │ - stc2l 15, cr15, [r8, #540]! @ 0x21c │ │ + stc2l 15, cr11, [fp, #588]! @ 0x24c │ │ + stc2l 15, cr15, [r8, #720]! @ 0x2d0 │ │ ldrshteq r5, [ip], -r8 │ │ push {r4, r5, r6, lr} │ │ add r5, r0, #24 │ │ mov r6, r0 │ │ mov r4, r1 │ │ mov r0, r5 │ │ bl 2366344 │ │ @@ -1108515,15 +1108514,15 @@ │ │ mvn r1, #4 │ │ strd r0, [r4] │ │ mov r0, r8 │ │ mov r1, r6 │ │ bl 236e3e8 │ │ mov r0, r5 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - stc2l 7, cr0, [ip, #484]! @ 0x1e4 │ │ + stc2l 7, cr0, [ip, #664]! @ 0x298 │ │ add r1, pc, #56 @ 0x38 │ │ movw r2, #655 @ 0x28f │ │ vld1.64 {d16-d17}, [r1 :128] │ │ add r1, pc, #60 @ 0x3c │ │ vld1.64 {d18-d19}, [r1 :128] │ │ add r1, r0, r2 │ │ bic r1, r1, #15 │ │ @@ -1109269,16 +1109268,16 @@ │ │ ldrh r1, [r0, #60] @ 0x3c │ │ ldrh r2, [r0, #72] @ 0x48 │ │ strh r2, [r4, #72] @ 0x48 │ │ add r1, r1, #1 │ │ strh r1, [r0, #60] @ 0x3c │ │ strh r8, [r0, #72] @ 0x48 │ │ b 23848a8 │ │ - stc2l 8, cr1, [ip, #1020]! @ 0x3fc │ │ - stc2l 4, cr0, [fp, #228]! @ 0xe4 │ │ + stc2l 9, cr1, [ip, #88]! @ 0x58 @ │ │ + stc2l 4, cr0, [fp, #408]! @ 0x198 │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ mov r6, r1 │ │ mov r4, r0 │ │ mov r7, #126 @ 0x7e │ │ movw r5, #1532 @ 0x5fc │ │ bl 2702800 │ │ mov r9, r0 │ │ @@ -1109998,15 +1109997,15 @@ │ │ mov r0, r5 │ │ mov r1, r8 │ │ bl 236e3e8 │ │ mov r0, r4 │ │ add sp, sp, #8 │ │ pop {r4, r5, r6, r7, r8, r9, fp, lr} │ │ b 238b3a8 │ │ - stc2l 8, cr13, [r8, #104]! @ 0x68 │ │ + vcmla.f16 , q4, , #270 │ │ b 26fdd50 │ │ mov r1, r0 │ │ ldr r0, [r0, #2324] @ 0x914 │ │ mov r2, #0 │ │ cmp r0, #0 │ │ str r2, [r1, #2340] @ 0x924 │ │ str r2, [r1, #2324] @ 0x914 │ │ @@ -1147561,15 +1147560,15 @@ │ │ b 23a6234 │ │ add r0, r6, r1, lsl #3 │ │ ldrsb r0, [r0, #6] │ │ cmn r0, #1 │ │ ble 23aab24 │ │ uxtb r8, r0 │ │ b 23aab38 │ │ - stc2l 15, cr15, [r7, #76]! @ 0x4c │ │ + stc2l 15, cr15, [r7, #256]! @ 0x100 │ │ add r0, sp, #112 @ 0x70 │ │ movw r1, #8191 @ 0x1fff │ │ bl 23adf68 │ │ mov r8, r0 │ │ mov r0, #1 │ │ lsl r0, r0, r8 │ │ ldr r1, [sp, #260] @ 0x104 │ │ @@ -1148242,15 +1148241,15 @@ │ │ cmp r2, #0 │ │ bmi 23aab74 │ │ uxtb r1, r2 │ │ bic r0, r7, r0, lsl r1 │ │ str r0, [sp, #264] @ 0x108 │ │ ldrb r0, [r5, #6] │ │ b 23ab350 │ │ - stc2l 4, cr15, [r7, #908]! @ 0x38c │ │ + stc2l 5, cr15, [r7, #64]! @ 0x40 │ │ lsl r9, r0, r8 │ │ ldrh r0, [r5, #2] │ │ ldr r2, [sp, #328] @ 0x148 │ │ cmp r2, r0 │ │ bcs 23ab340 │ │ sxth r2, r0 │ │ cmp r2, #0 │ │ @@ -1158744,18 +1158743,18 @@ │ │ movw r2, #26996 @ 0x6974 │ │ movt r2, #25964 @ 0x656c │ │ str r2, [r1, #4] │ │ str r1, [sp, #48] @ 0x30 │ │ tst r0, #33554432 @ 0x2000000 │ │ beq 23b4f20 │ │ b 23b4ec8 │ │ - stc2l 12, cr3, [r6, #200]! @ 0xc8 │ │ - stc2l 7, cr2, [r7, #928]! @ 0x3a0 │ │ + stc2l 12, cr3, [r6, #380]! @ 0x17c │ │ + stc2l 8, cr2, [r7, #84]! @ 0x54 │ │ stc2l 5, cr11, [r9, #12]! │ │ - stc2l 14, cr1, [r8, #840]! @ 0x348 │ │ + stc2l 14, cr1, [r8, #1020]! @ 0x3fc │ │ push {r4, r5, r6, r7, r8, r9, sl, lr} │ │ sub sp, sp, #24 │ │ ldr r1, [sp, #56] @ 0x38 │ │ movw r6, #19532 @ 0x4c4c │ │ mov ip, sp │ │ strh r6, [sp, #22] │ │ cmp r1, #0 │ │ @@ -1158983,16 +1158982,16 @@ │ │ mvn r1, #4 │ │ strd r0, [r6] │ │ mov r1, #247 @ 0xf7 │ │ ldr r0, [r4, #8] │ │ strb r1, [r5, #6] │ │ str r5, [r0, #440] @ 0x1b8 │ │ pop {r4, r5, r6, pc} │ │ - stc2l 7, cr13, [r7, #76]! @ 0x4c │ │ - stc2l 0, cr0, [r7, #264]! @ 0x108 │ │ + stc2l 7, cr13, [r7, #256]! @ 0x100 │ │ + stc2l 0, cr0, [r7, #444]! @ 0x1bc │ │ push {r4, r5, r6, r7, fp, lr} │ │ ldr r4, [r0, #252] @ 0xfc │ │ cmp r4, #0 │ │ beq 23b53d4 │ │ mov r5, r0 │ │ mov r0, r4 │ │ bl 23b7d70 │ │ @@ -1163698,16 +1163697,16 @@ │ │ mov r0, r4 │ │ mov r1, #41 @ 0x29 │ │ bl 23bad68 │ │ mov r0, r4 │ │ mov r1, #256 @ 0x100 │ │ movw r2, #2216 @ 0x8a8 │ │ bl 23bab70 │ │ - stc2l 0, cr3, [r8, #104]! @ 0x68 │ │ - stc2l 0, cr15, [r7, #316]! @ 0x13c │ │ + stc2l 0, cr3, [r8, #284]! @ 0x11c │ │ + stc2l 0, cr15, [r7, #496]! @ 0x1f0 │ │ mov r2, r1 │ │ mov r1, #0 │ │ bl 23bab70 │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ sub sp, sp, #8 │ │ ldr r6, [pc, #3528] @ 23baadc │ │ mov r4, r0 │ │ @@ -1164724,19 +1164723,19 @@ │ │ mov r1, #1 │ │ mov r6, r2 │ │ bl 23659c8 │ │ mov r2, r6 │ │ b 23babd4 │ │ eorseq pc, r6, r4, lsr r9 @ │ │ ldc2l 1, cr11, [r1, #232]! @ 0xe8 │ │ - stc2l 15, cr13, [r7, #912]! @ 0x390 │ │ - stc2l 7, cr14, [r5, #832]! @ 0x340 │ │ + stc2l 0, cr14, [r7, #68]! @ 0x44 │ │ + stc2l 7, cr14, [r5, #1012]! @ 0x3f4 │ │ mlaseq r8, ip, r7, sp │ │ eorseq sp, r8, ip, ror #14 │ │ - stc2l 4, cr12, [r6, #792]! @ 0x318 │ │ + stc2l 4, cr12, [r6, #972]! @ 0x3cc │ │ mov r2, r1 │ │ cmp r1, #256 @ 0x100 │ │ blt 23bad2c │ │ ldr r0, [pc, #64] @ 23bad60 │ │ add r0, pc, r0 │ │ add r0, r0, r2, lsl #2 │ │ ldr r0, [r0, #-1024] @ 0xfffffc00 │ │ @@ -1164749,17 +1164748,17 @@ │ │ tst r1, #1 │ │ ldreq r1, [pc, #24] @ 23bad64 │ │ addeq r1, pc, r1 │ │ ldrne r1, [pc, #8] @ 23bad5c │ │ addne r1, pc, r1 │ │ b 237139c │ │ ldc2l 0, cr11, [r1, #88]! @ 0x58 │ │ - stc2l 6, cr14, [r5, #720]! @ 0x2d0 │ │ + stc2l 6, cr14, [r5, #900]! @ 0x384 │ │ eorseq pc, r6, r0, asr #15 │ │ - stc2l 14, cr13, [r7, #784]! @ 0x310 │ │ + stc2l 14, cr13, [r7, #964]! @ 0x3c4 │ │ mov r4, r0 │ │ ldr r5, [r0, #4] │ │ bl 23bad0c │ │ mov r3, r0 │ │ mov r0, r4 │ │ mov r1, r5 │ │ movw r2, #2385 @ 0x951 │ │ @@ -1166160,21 +1166159,21 @@ │ │ bl 23b9cf8 │ │ mov r0, r4 │ │ movw r1, #3031 @ 0xbd7 │ │ bl 23b9cf8 │ │ mov r0, r4 │ │ movw r1, #537 @ 0x219 │ │ bl 23b9cf8 │ │ - stc2l 7, cr13, [r5, #308]! @ 0x134 │ │ - stc2l 4, cr11, [r5, #564]! @ 0x234 │ │ - stc2l 4, cr13, [r5, #676]! @ 0x2a4 │ │ - stc2l 3, cr13, [r5, #900]! @ 0x384 │ │ - stc2l 1, cr13, [r5, #964]! @ 0x3c4 │ │ - stc2l 3, cr13, [r5, #420]! @ 0x1a4 │ │ - stc2l 2, cr13, [r5, #420]! @ 0x1a4 │ │ + stc2l 7, cr13, [r5, #488]! @ 0x1e8 │ │ + stc2l 4, cr11, [r5, #744]! @ 0x2e8 │ │ + stc2l 4, cr13, [r5, #856]! @ 0x358 │ │ + stc2l 4, cr13, [r5, #56]! @ 0x38 │ │ + stc2l 2, cr13, [r5, #120]! @ 0x78 │ │ + stc2l 3, cr13, [r5, #600]! @ 0x258 │ │ + stc2l 2, cr13, [r5, #600]! @ 0x258 │ │ stc2l 7, cr0, [r9, #680]! @ 0x2a8 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #660 @ 0x294 │ │ sub sp, sp, #1024 @ 0x400 │ │ mov r5, r1 │ │ mov r8, r0 │ │ bl 23bea6c │ │ @@ -1169221,15 +1169220,15 @@ │ │ str r2, [r7, #12] │ │ str r7, [r3, #36] @ 0x24 │ │ b 23befd0 │ │ mov r0, sl │ │ movw r1, #1993 @ 0x7c9 │ │ mov r2, r7 │ │ bl 235f92c │ │ - stc2l 10, cr5, [r7, #396]! @ 0x18c @ │ │ + stc2l 10, cr5, [r7, #576]! @ 0x240 @ │ │ push {r4, r5, fp, lr} │ │ mov r4, r2 │ │ mov r2, r3 │ │ mov r5, r0 │ │ bl 2704c40 │ │ ldr r0, [r5, #20] │ │ ldr r0, [r0, #-8] │ │ @@ -1169260,15 +1169259,15 @@ │ │ str r5, [r0, #8] │ │ mov r0, r4 │ │ bl 2705300 │ │ ldr r0, [r4, #20] │ │ sub r0, r0, #8 │ │ str r0, [r4, #20] │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 14, cr10, [r8, #112]! @ 0x70 │ │ + stc2l 14, cr10, [r8, #292]! @ 0x124 │ │ push {r4, r5, r6, r8, r9, lr} │ │ mov r5, r2 │ │ mov r2, #0 │ │ mov r6, r3 │ │ mov r4, r0 │ │ bl 2704c40 │ │ ldr r0, [r4, #20] │ │ @@ -1171607,16 +1171606,16 @@ │ │ strd r6, [r0] │ │ ldr r0, [r4, #8] │ │ ldr r1, [r0, #616] @ 0x268 │ │ bic r1, r1, #16 │ │ str r1, [r0, #616] @ 0x268 │ │ mov r0, #3 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 4, cr1, [r5, #284]! @ 0x11c │ │ - stc2l 8, cr11, [r6, #740]! @ 0x2e4 │ │ + stc2l 4, cr1, [r5, #464]! @ 0x1d0 │ │ + vcmla.f16 , q11, q11, #270 │ │ │ │ 023c1884 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ mov r4, r0 │ │ adds r0, r1, #1 │ │ bcc 23c18f8 │ │ bl 2702800 │ │ @@ -1171678,17 +1171677,17 @@ │ │ ldr r0, [r4, #20] │ │ mvn r7, #13 │ │ add r1, r0, #8 │ │ str r1, [r4, #20] │ │ strd r6, [r0] │ │ mov r0, #3 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 14, cr0, [r8, #796]! @ 0x31c │ │ + stc2l 14, cr0, [r8, #976]! @ 0x3d0 │ │ stc2l 12, cr13, [r8, #12]! │ │ - stc2l 8, cr11, [r6, #244]! @ 0xf4 │ │ + vcmla.f16 , q3, q13, #270 │ │ │ │ 023c199c : │ │ push {r4, r5, r6, r7, r8, lr} │ │ mov r8, r3 │ │ mov r6, r2 │ │ mov r4, r0 │ │ bl 2704fe0 │ │ @@ -1171797,15 +1171796,15 @@ │ │ mvn r1, #1 │ │ pop {r4, r5, r6, r7, fp, lr} │ │ b 2704fa0 │ │ mov r0, r4 │ │ movw r1, #1993 @ 0x7c9 │ │ mov r2, r5 │ │ bl 235f92c │ │ - stc2l 14, cr2, [r7, #604]! @ 0x25c │ │ + stc2l 14, cr2, [r7, #784]! @ 0x310 │ │ │ │ 023c1b60 : │ │ push {r4, r5, r6, lr} │ │ mov r4, r3 │ │ mov r5, r2 │ │ mov r6, r0 │ │ cmp r1, #0 │ │ @@ -1171873,15 +1171872,15 @@ │ │ subs r4, r4, #1 │ │ bne 23c1c54 │ │ b 23c1c1c │ │ mvn r1, r9 │ │ mov r0, r5 │ │ pop {r4, r5, r6, r7, r8, r9, fp, lr} │ │ b 2704b00 │ │ - stc2l 13, cr4, [r7, #364]! @ 0x16c │ │ + stc2l 13, cr4, [r7, #544]! @ 0x220 │ │ │ │ 023c1c80 : │ │ push {r4, r5, fp, lr} │ │ mov r5, r2 │ │ mov r4, r0 │ │ cmp r1, #0 │ │ beq 23c1cd0 │ │ @@ -1171923,15 +1171922,15 @@ │ │ add r5, r5, #8 │ │ cmp r0, #0 │ │ bne 23c1cfc │ │ mov r0, r4 │ │ mvn r1, #0 │ │ pop {r4, r5, fp, lr} │ │ b 2704b00 │ │ - stc2l 12, cr4, [r7, #428]! @ 0x1ac │ │ + stc2l 12, cr4, [r7, #608]! @ 0x260 │ │ │ │ 023c1d40 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #20 │ │ sub sp, sp, #1024 @ 0x400 │ │ mov r8, r0 │ │ mov r0, r2 │ │ @@ -1172420,16 +1172419,16 @@ │ │ mov r0, #10 │ │ bl 270abb0 │ │ ldr r0, [r5] │ │ bl 270b3f0 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ ldrshteq r5, [r7], -r0 │ │ - stc2l 6, cr10, [r7, #724]! @ 0x2d4 │ │ - stc2l 6, cr6, [r5, #648]! @ 0x288 │ │ + stc2l 6, cr10, [r7, #904]! @ 0x388 │ │ + stc2l 6, cr6, [r5, #828]! @ 0x33c │ │ push {r4, r5, fp, lr} │ │ mvn r1, #0 │ │ mov r2, #0 │ │ bl 2704ba0 │ │ ldr r5, [pc, #80] @ 23c2520 │ │ mov r4, r0 │ │ mov r1, #20 │ │ @@ -1172449,16 +1172448,16 @@ │ │ mov r0, #10 │ │ bl 270abb0 │ │ ldr r0, [r5] │ │ bl 270b3f0 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ eorseq r5, r7, r0, ror r8 │ │ - stc2l 12, cr7, [r8, #788]! @ 0x314 │ │ - stc2l 6, cr6, [r5, #136]! @ 0x88 │ │ + stc2l 12, cr7, [r8, #968]! @ 0x3c8 │ │ + stc2l 6, cr6, [r5, #316]! @ 0x13c │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ ldr r2, [r1, #20] │ │ sub r3, r2, #8 │ │ str r3, [r1, #20] │ │ ldr r1, [r0, #20] │ │ ldrd r2, [r2, #-8] │ │ strd r2, [r1] │ │ @@ -1172535,21 +1172534,21 @@ │ │ ldr r3, [pc, #52] @ 23c2694 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ add r3, pc, r3 │ │ bl 23beea4 │ │ mov r0, #2 │ │ pop {r4, r5, r6, r8, r9, pc} │ │ - stc2l 12, cr8, [r5, #832]! @ 0x340 │ │ - stc2l 9, cr14, [r6, #72]! @ 0x48 @ │ │ - stc2l 4, cr0, [r7, #156]! @ 0x9c │ │ - stc2l 9, cr12, [r6, #318]! @ 0x13e @ │ │ + stc2l 12, cr8, [r5, #1012]! @ 0x3f4 │ │ + stc2l 9, cr14, [r6, #162]! @ 0xa2 @ │ │ + stc2l 4, cr0, [r7, #336]! @ 0x150 │ │ + stc2l 9, cr12, [r6, #408]! @ 0x198 @ │ │ ldc2l 2, cr5, [r1, #592]! @ 0x250 │ │ ldrsbteq r7, [r6], -ip │ │ - stc2l 12, cr3, [r8, #320]! @ 0x140 │ │ + stc2l 12, cr3, [r8, #500]! @ 0x1f4 │ │ ldc2l 3, cr5, [r1, #712]! @ 0x2c8 │ │ eorseq r7, r6, r4, lsl pc │ │ mov r1, #1 │ │ mov r4, r0 │ │ bl 23bf488 │ │ ldrd r2, [r4, #16] │ │ add r1, r2, #8 │ │ @@ -1173308,15 +1173307,15 @@ │ │ pop {r4, r5, r6, r7, r8, pc} │ │ ldr r0, [r4, #8] │ │ bl 2364cfc │ │ mov r0, #1 │ │ add sp, sp, #8 │ │ pop {r4, r5, r6, r7, r8, pc} │ │ muleq r0, r4, r5 │ │ - stc2l 6, cr5, [r8, #532]! @ 0x214 │ │ + stc2l 6, cr5, [r8, #712]! @ 0x2c8 │ │ b 23c30f4 │ │ push {r4, r5, fp, lr} │ │ mov r1, #1 │ │ mov r4, r0 │ │ bl 23bf4f8 │ │ mov r1, r0 │ │ ldr r0, [r4, #20] │ │ @@ -1173647,15 +1173646,15 @@ │ │ strd r6, [r2, #32] │ │ mov r2, r4 │ │ pop {r4, r5, r6, r7, fp, lr} │ │ b 2704ba0 │ │ mov r0, r5 │ │ movw r1, #1014 @ 0x3f6 │ │ bl 235f968 │ │ - stc2l 0, cr5, [r8, #900]! @ 0x384 │ │ + stc2l 1, cr5, [r8, #56]! @ 0x38 │ │ push {fp, lr} │ │ ldrd r2, [r0, #16] │ │ cmp r3, r2 │ │ bls 23c3880 │ │ ldr r1, [r2, #4] │ │ cmn r1, #7 │ │ bne 23c3880 │ │ @@ -1173693,20 +1173692,20 @@ │ │ movne r1, ip │ │ bl 2704b40 │ │ mov r0, #1 │ │ pop {fp, pc} │ │ mov r1, #1 │ │ movw r2, #566 @ 0x236 │ │ bl 235fa7c │ │ - stc2l 11, cr5, [r5, #952]! @ 0x3b8 @ │ │ - stc2l 3, cr5, [r7, #1004]! @ 0x3ec │ │ - stc2l 5, cr9, [r5, #1012]! @ 0x3f4 │ │ - stc2l 4, cr0, [r8, #776]! @ 0x308 │ │ - stc2l 3, cr5, [r7, #700]! @ 0x2bc │ │ - stc2l 5, cr9, [r5, #916]! @ 0x394 │ │ + stc2l 12, cr5, [r5, #108]! @ 0x6c │ │ + stc2l 4, cr5, [r7, #160]! @ 0xa0 │ │ + stc2l 6, cr9, [r5, #168]! @ 0xa8 │ │ + stc2l 4, cr0, [r8, #956]! @ 0x3bc │ │ + stc2l 3, cr5, [r7, #880]! @ 0x370 │ │ + stc2l 6, cr9, [r5, #72]! @ 0x48 │ │ push {r4, lr} │ │ mov r4, r0 │ │ bl 270bd40 │ │ cmp r0, #0 │ │ ldrne r0, [r4, #20] │ │ addne r1, r0, #8 │ │ strne r1, [r4, #20] │ │ @@ -1173892,15 +1173891,15 @@ │ │ sbcsge r7, r2, r7, asr r7 │ │ stclpl 6, cr10, [sl, #-316] @ 0xfffffec4 │ │ strbvc r2, [sl], -ip, ror #18 │ │ streq sp, [sl, -sl, lsr #29] │ │ @ instruction: 0x51220704 │ │ ldrge fp, [r7, r7, lsr #18]! │ │ bcs 2d89a78 <_nl_msg_cat_cntr@@Base+0x5f8548> │ │ - stc2l 10, cr10, [r6, #716]! @ 0x2cc @ │ │ + stc2l 10, cr10, [r6, #896]! @ 0x380 @ │ │ ldc2l 14, cr3, [r1, #924]! @ 0x39c │ │ eorseq r6, r6, ip, lsr #20 │ │ push {fp, lr} │ │ mov r1, #1 │ │ bl 23bf558 │ │ mov r0, #0 │ │ pop {fp, pc} │ │ @@ -1174186,18 +1174185,18 @@ │ │ ldr r1, [pc, #32] @ 23c403c │ │ ldr r2, [pc, #32] @ 23c4040 │ │ add r1, pc, r1 │ │ ldr r2, [pc, r2] │ │ bl 23bf370 │ │ mov r0, #1 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 11, cr0, [r6, #616]! @ 0x268 @ │ │ + stc2l 11, cr0, [r6, #796]! @ 0x31c @ │ │ ldc2l 11, cr3, [r1, #484]! @ 0x1e4 @ │ │ ldrshteq r6, [r6], -r8 │ │ - stc2l 3, cr5, [r5, #1016]! @ 0x3f8 │ │ + stc2l 4, cr5, [r5, #172]! @ 0xac │ │ ldrsbteq r7, [r7], -ip │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ mov r1, #1 │ │ mov r4, r0 │ │ mov r9, #1 │ │ bl 23bf4ac │ │ mov r8, r0 │ │ @@ -1174719,15 +1174718,15 @@ │ │ bl 235f92c │ │ mov r0, r7 │ │ mov r1, #3 │ │ mov r2, #656 @ 0x290 │ │ bl 235fa7c │ │ movw r1, #1909 @ 0x775 │ │ bl 235f968 │ │ - stc2l 12, cr6, [r5, #428]! @ 0x1ac │ │ + stc2l 12, cr6, [r5, #608]! @ 0x260 │ │ ldc2l 6, cr1, [r1, #664]! @ 0x298 │ │ push {r4, r5, fp, lr} │ │ mov r4, r0 │ │ mov r0, #0 │ │ ldr r5, [r4, #8] │ │ rsb r3, r0, #0 │ │ mov r0, r4 │ │ @@ -1174912,16 +1174911,16 @@ │ │ bl 23c55f0 │ │ add r7, r7, #1 │ │ cmp r5, r7 │ │ bne 23c4b5c │ │ mov r0, r5 │ │ add sp, sp, #292 @ 0x124 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 7, cr6, [r5, #988]! @ 0x3dc │ │ - stc2l 7, cr6, [r5, #108]! @ 0x6c │ │ + vcmla.f16 d22, d5, d20, #270 │ │ + stc2l 7, cr6, [r5, #288]! @ 0x120 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #12 │ │ mov r9, r0 │ │ ldr r0, [r0, #16] │ │ mov r8, r1 │ │ cmp r0, #199 @ 0xc7 │ │ add r1, r0, #1 │ │ @@ -1175677,15 +1175676,15 @@ │ │ bl 23c55f0 │ │ add r7, r7, #1 │ │ cmp r6, r7 │ │ bne 23c5750 │ │ mov r0, r6 │ │ add sp, sp, #280 @ 0x118 │ │ pop {r4, r5, r6, r7, r8, r9, sl, pc} │ │ - stc2l 11, cr5, [r5, #188]! @ 0xbc @ │ │ + stc2l 11, cr5, [r5, #368]! @ 0x170 @ │ │ │ │ 023c5780 : │ │ push {r4, lr} │ │ ldr r1, [pc, #96] @ 23c57ec │ │ mov r4, r0 │ │ ldr r2, [pc, #92] @ 23c57f0 │ │ ldr r3, [pc, #92] @ 23c57f4 │ │ @@ -1175707,37 +1175706,37 @@ │ │ ldr r3, [r0, #-8] │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ mov r0, r4 │ │ bl 23bf370 │ │ mov r0, #1 │ │ pop {r4, pc} │ │ - stc2l 11, cr6, [r7, #748]! @ 0x2ec @ │ │ + stc2l 11, cr6, [r7, #928]! @ 0x3a0 @ │ │ ldc2l 3, cr2, [r1, #1020]! @ 0x3fc │ │ eorseq r4, r6, r4, asr #28 │ │ - stc2l 9, cr11, [r5, #118]! @ 0x76 @ │ │ + stc2l 9, cr11, [r5, #208]! @ 0xd0 @ │ │ andeq r0, r0, r8, asr #32 │ │ - stc2l 12, cr3, [r5, #336]! @ 0x150 │ │ + stc2l 12, cr3, [r5, #516]! @ 0x204 │ │ andeq r0, r0, r8, asr #32 │ │ ldr r1, [pc, #16] @ 23c5820 │ │ mov r2, #94 @ 0x5e │ │ ldr r3, [pc, #12] @ 23c5824 │ │ add r1, pc, r1 │ │ add r3, pc, r3 │ │ b 23bf3dc │ │ andeq r0, r0, ip, ror #15 │ │ - stc2l 3, cr7, [r7, #188]! @ 0xbc │ │ + stc2l 3, cr7, [r7, #368]! @ 0x170 │ │ ldr r1, [pc, #16] @ 23c5840 │ │ mov r2, #95 @ 0x5f │ │ ldr r3, [pc, #12] @ 23c5844 │ │ add r1, pc, r1 │ │ add r3, pc, r3 │ │ b 23bf3dc │ │ andeq r0, r0, r4, lsl #16 │ │ - stc2l 6, cr14, [r6, #272]! @ 0x110 │ │ + stc2l 6, cr14, [r6, #452]! @ 0x1c4 │ │ push {r4, lr} │ │ mov r1, #1 │ │ mov r4, r0 │ │ bl 23bf7e4 │ │ ldr r2, [r0, #8] │ │ ldr r1, [r0, #24] │ │ sub r2, r2, #4 │ │ @@ -1176337,24 +1176336,24 @@ │ │ str r1, [r3, #16] │ │ mvn r1, #1 │ │ bl 2705300 │ │ mov r0, #1 │ │ pop {r4, r5, r6, r7, r8, pc} │ │ ldc2l 13, cr1, [r1, #156]! @ 0x9c │ │ eorseq r4, r6, r0, lsl #11 │ │ - stc2l 7, cr2, [r8, #668]! @ 0x29c │ │ - stc2l 10, cr6, [r6, #736]! @ 0x2e0 @ │ │ + stc2l 7, cr2, [r8, #848]! @ 0x350 │ │ + stc2l 10, cr6, [r6, #916]! @ 0x394 @ │ │ ldc2l 13, cr1, [r1, #128]! @ 0x80 │ │ eorseq r4, r6, r4, asr r5 │ │ eorseq r5, r7, r8, lsr #4 │ │ - stc2l 11, cr8, [r7, #316]! @ 0x13c @ │ │ + stc2l 11, cr8, [r7, #496]! @ 0x1f0 @ │ │ eorseq r1, r7, ip, lsr ip │ │ stc2l 4, cr6, [r8, #764]! @ 0x2fc │ │ eorseq r1, r7, r0, ror #23 │ │ - stc2l 10, cr8, [r7, #756]! @ 0x2f4 @ │ │ + stc2l 10, cr8, [r7, #936]! @ 0x3a8 @ │ │ push {r4, r5, fp, lr} │ │ ldrd r2, [r0, #16] │ │ cmp r2, r3 │ │ bcs 23c621c │ │ ldr r1, [r2, #4] │ │ cmn r1, #13 │ │ ldreq r5, [r2] │ │ @@ -1176402,16 +1176401,16 @@ │ │ str r2, [r3, #4] │ │ mov r2, #26 │ │ bl 2704dd0 │ │ mov r0, #2 │ │ pop {r4, r5, fp, pc} │ │ movw r1, #1531 @ 0x5fb │ │ bl 235f968 │ │ - stc2l 14, cr10, [r5, #356]! @ 0x164 │ │ - stc2l 6, cr2, [r8, #188]! @ 0xbc │ │ + stc2l 14, cr10, [r5, #536]! @ 0x218 │ │ + stc2l 6, cr2, [r8, #368]! @ 0x170 │ │ push {fp, lr} │ │ ldrd r2, [r0, #16] │ │ cmp r2, r3 │ │ bcs 23c62f0 │ │ ldr r1, [r2, #4] │ │ cmn r1, #13 │ │ ldreq r1, [r2] │ │ @@ -1176426,15 +1176425,15 @@ │ │ cmp r2, #0 │ │ beq 23c6318 │ │ mov r2, #1 │ │ pop {fp, lr} │ │ b 23c67a8 │ │ movw r1, #1531 @ 0x5fb │ │ bl 235f968 │ │ - stc2l 5, cr2, [r8, #300]! @ 0x12c │ │ + stc2l 5, cr2, [r8, #480]! @ 0x1e0 │ │ push {fp, lr} │ │ ldrd r2, [r0, #16] │ │ cmp r2, r3 │ │ bcs 23c634c │ │ ldr r1, [r2, #4] │ │ cmn r1, #13 │ │ ldreq r1, [r2] │ │ @@ -1176449,15 +1176448,15 @@ │ │ cmp r2, #0 │ │ beq 23c6374 │ │ mov r2, #1 │ │ pop {fp, lr} │ │ b 23c6bf0 │ │ movw r1, #1531 @ 0x5fb │ │ bl 235f968 │ │ - stc2l 4, cr2, [r8, #956]! @ 0x3bc │ │ + stc2l 5, cr2, [r8, #112]! @ 0x70 │ │ push {r4, lr} │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ cmp r0, r1 │ │ bcs 23c63ac │ │ ldr r1, [r0, #4] │ │ cmn r1, #13 │ │ @@ -1176479,15 +1176478,15 @@ │ │ lsr r1, r0, #5 │ │ mov r0, r4 │ │ pop {r4, lr} │ │ b 270bee0 │ │ mov r0, r4 │ │ movw r1, #1531 @ 0x5fb │ │ bl 235f968 │ │ - stc2l 4, cr2, [r8, #556]! @ 0x22c │ │ + stc2l 4, cr2, [r8, #736]! @ 0x2e0 │ │ push {r4, r5, r6, lr} │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ cmp r0, r1 │ │ bcs 23c6424 │ │ ldr r1, [r0, #4] │ │ cmn r1, #13 │ │ @@ -1176550,16 +1176549,16 @@ │ │ mov r0, r4 │ │ movw r1, #1531 @ 0x5fb │ │ bl 235f968 │ │ mov r0, r4 │ │ mov r1, #3 │ │ mov r2, #3 │ │ bl 235fb8c │ │ - stc2l 12, cr6, [r6, #744]! @ 0x2e8 │ │ - stc2l 4, cr2, [r8, #76]! @ 0x4c │ │ + stc2l 12, cr6, [r6, #924]! @ 0x39c │ │ + stc2l 4, cr2, [r8, #256]! @ 0x100 │ │ push {r4, r5, r6, lr} │ │ ldrd r2, [r0, #16] │ │ cmp r2, r3 │ │ bcs 23c6540 │ │ ldr r1, [r2, #4] │ │ cmn r1, #13 │ │ ldreq r1, [r2] │ │ @@ -1176593,16 +1176592,16 @@ │ │ mov r2, #0 │ │ lsr r1, r0, #5 │ │ mov r0, r5 │ │ pop {r4, r5, r6, lr} │ │ b 270bee0 │ │ movw r1, #1531 @ 0x5fb │ │ bl 235f968 │ │ - stc2l 10, cr8, [r6, #312]! @ 0x138 @ │ │ - stc2l 2, cr2, [r8, #1004]! @ 0x3ec │ │ + stc2l 10, cr8, [r6, #492]! @ 0x1ec @ │ │ + stc2l 3, cr2, [r8, #160]! @ 0xa0 │ │ push {r5, lr} │ │ ldr r2, [r0, #16] │ │ ldr r5, [r0, #20] │ │ cmp r2, r5 │ │ bcs 23c65f0 │ │ ldr r1, [r2, #4] │ │ cmn r1, #13 │ │ @@ -1176627,15 +1176626,15 @@ │ │ mov r0, #1 │ │ pop {r5, pc} │ │ movw r1, #1531 @ 0x5fb │ │ bl 235f968 │ │ movw r1, #987 @ 0x3db │ │ bl 235f968 │ │ andeq r0, r0, ip, lsl #13 │ │ - stc2l 2, cr2, [r8, #300]! @ 0x12c │ │ + stc2l 2, cr2, [r8, #480]! @ 0x1e0 │ │ push {r4, r5, fp, lr} │ │ ldrd r2, [r0, #16] │ │ cmp r2, r3 │ │ bcs 23c6670 │ │ ldr r1, [r2, #4] │ │ cmn r1, #13 │ │ ldreq r5, [r2] │ │ @@ -1176683,16 +1176682,16 @@ │ │ mvn r2, #0 │ │ add r1, pc, r1 │ │ str r2, [r3, #4] │ │ mov r2, #26 │ │ bl 2704dd0 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 9, cr10, [r5, #474]! @ 0x1da @ │ │ - stc2l 1, cr2, [r8, #812]! @ 0x32c │ │ + stc2l 10, cr10, [r5, #104]! @ 0x68 @ │ │ + stc2l 1, cr2, [r8, #992]! @ 0x3e0 │ │ push {fp, lr} │ │ ldrd r2, [r0, #16] │ │ cmp r2, r3 │ │ bcs 23c6754 │ │ ldr r1, [r2, #4] │ │ cmn r1, #13 │ │ ldreq r1, [r2] │ │ @@ -1176713,17 +1176712,17 @@ │ │ pop {fp, pc} │ │ ldr r1, [pc, #20] @ 23c67a0 │ │ mov r2, #13 │ │ add r1, pc, r1 │ │ bl 2704dd0 │ │ mov r0, #1 │ │ pop {fp, pc} │ │ - stc2l 4, cr8, [r7, #944]! @ 0x3b0 │ │ - stc2l 9, cr6, [r6, #286]! @ 0x11e @ │ │ - stc2l 0, cr2, [r8, #924]! @ 0x39c │ │ + stc2l 5, cr8, [r7, #100]! @ 0x64 │ │ + stc2l 9, cr6, [r6, #376]! @ 0x178 @ │ │ + stc2l 1, cr2, [r8, #80]! @ 0x50 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #20 │ │ ldr fp, [r1] │ │ mov r4, r0 │ │ ldrd r6, [r0, #16] │ │ mov sl, r2 │ │ mov r0, fp │ │ @@ -1176918,17 +1176917,17 @@ │ │ mov r0, r4 │ │ mov r2, #1184 @ 0x4a0 │ │ bl 235fa7c │ │ add r1, sl, #1 │ │ mov r0, r4 │ │ movw r2, #1219 @ 0x4c3 │ │ bl 235fa7c │ │ - stc2l 10, cr4, [r5, #260]! @ 0x104 @ │ │ - stc2l 3, cr14, [r4, #452]! @ 0x1c4 │ │ - stc2l 1, cr14, [r4, #276]! @ 0x114 │ │ + stc2l 10, cr4, [r5, #440]! @ 0x1b8 @ │ │ + stc2l 3, cr14, [r4, #632]! @ 0x278 │ │ + stc2l 1, cr14, [r4, #456]! @ 0x1c8 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #4 │ │ mov sl, r1 │ │ mov r1, #1024 @ 0x400 │ │ mov r4, r2 │ │ mov r9, r0 │ │ mov r5, #1024 @ 0x400 │ │ @@ -1177128,15 +1177127,15 @@ │ │ movw r1, #1531 @ 0x5fb │ │ bl 235f968 │ │ ldr r0, [r4, #20] │ │ ldr r0, [r0, #-16] │ │ add r1, r0, #20 │ │ mov r0, r4 │ │ bl 235f870 │ │ - stc2l 3, cr10, [r5, #116]! @ 0x74 │ │ + stc2l 3, cr10, [r5, #296]! @ 0x128 │ │ push {r4, r5, r6, r7, r8, lr} │ │ mov r1, #1 │ │ mov r4, r0 │ │ mov r8, #1 │ │ bl 23bf4ac │ │ mov r5, r0 │ │ mov r0, r4 │ │ @@ -1177169,15 +1177168,15 @@ │ │ mov r0, #1 │ │ pop {r4, r5, r6, r7, r8, pc} │ │ mov r0, r4 │ │ mov r1, #0 │ │ mov r2, r5 │ │ pop {r4, r5, r6, r7, r8, lr} │ │ b 270bee0 │ │ - stc2l 12, cr7, [r7, #552]! @ 0x228 │ │ + stc2l 12, cr7, [r7, #732]! @ 0x2dc │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ mov r1, #1 │ │ mov r4, r0 │ │ mov r9, #1 │ │ bl 23bf4ac │ │ mov r5, r0 │ │ mov r0, r4 │ │ @@ -1177211,15 +1177210,15 @@ │ │ mov r0, #1 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ mov r0, r4 │ │ mov r1, #0 │ │ mov r2, r5 │ │ pop {r4, r5, r6, r7, r8, r9, fp, lr} │ │ b 270bee0 │ │ - stc2l 11, cr7, [r7, #872]! @ 0x368 @ │ │ + stc2l 12, cr7, [r7, #28]! │ │ push {r4, r5, fp, lr} │ │ mov r1, #8 │ │ mov r4, r0 │ │ bl 2704bc0 │ │ mov r5, r0 │ │ ldrd r0, [r4, #16] │ │ ldr r1, [r1, #-8] │ │ @@ -1177319,16 +1177318,16 @@ │ │ pop {r4, pc} │ │ ldr r2, [pc, #20] @ 23c7118 │ │ mov r1, #1 │ │ add r2, pc, r2 │ │ bl 235fa90 │ │ movw r1, #1531 @ 0x5fb │ │ bl 235f968 │ │ - stc2l 10, cr7, [r7, #184]! @ 0xb8 @ │ │ - stc2l 7, cr1, [r8, #252]! @ 0xfc │ │ + stc2l 10, cr7, [r7, #364]! @ 0x16c @ │ │ + stc2l 7, cr1, [r8, #432]! @ 0x1b0 │ │ push {r4, lr} │ │ ldrd r2, [r0, #16] │ │ cmp r2, r3 │ │ bcs 23c7168 │ │ ldr r1, [r2, #4] │ │ cmn r1, #1 │ │ beq 23c7168 │ │ @@ -1177365,16 +1177364,16 @@ │ │ pop {r4, pc} │ │ ldr r2, [pc, #20] @ 23c71d0 │ │ mov r1, #1 │ │ add r2, pc, r2 │ │ bl 235fa90 │ │ movw r1, #1531 @ 0x5fb │ │ bl 235f968 │ │ - stc2l 6, cr1, [r8, #740]! @ 0x2e4 │ │ - stc2l 6, cr1, [r8, #540]! @ 0x21c │ │ + stc2l 6, cr1, [r8, #920]! @ 0x398 │ │ + stc2l 6, cr1, [r8, #720]! @ 0x2d0 │ │ push {r4, r5, fp, lr} │ │ ldrd r4, [r0, #16] │ │ cmp r4, r5 │ │ bne 23c71f8 │ │ add r1, r4, #8 │ │ str r1, [r0, #20] │ │ mvn r1, #0 │ │ @@ -1177411,15 +1177410,15 @@ │ │ ldr r1, [pc, #24] @ 23c7288 │ │ add r1, pc, r1 │ │ bl 2704c40 │ │ mov r0, #1 │ │ pop {r4, r5, fp, pc} │ │ movw r1, #987 @ 0x3db │ │ bl 235f968 │ │ - stc2l 8, cr7, [r7, #984]! @ 0x3d8 │ │ + stc2l 9, cr7, [r7, #70]! @ 0x46 @ │ │ @ instruction: 0xfffffa40 │ │ push {r4, lr} │ │ mov r1, #1 │ │ mov r4, r0 │ │ bl 23bf488 │ │ ldr r1, [r0, #4] │ │ cmn r1, #13 │ │ @@ -1177447,15 +1177446,15 @@ │ │ mov r0, r4 │ │ mov r2, #11 │ │ add r1, pc, r1 │ │ bl 2704dd0 │ │ mov r0, #1 │ │ pop {r4, pc} │ │ stc2l 3, cr5, [r8, #312]! @ 0x138 │ │ - stc2l 10, cr11, [r5, #456]! @ 0x1c8 @ │ │ + stc2l 10, cr11, [r5, #636]! @ 0x27c @ │ │ push {r4, r5, r6, r7, r8, lr} │ │ mov r7, r1 │ │ mov r1, #1 │ │ mov r4, r0 │ │ mov r8, #1 │ │ bl 23bf4ac │ │ mov r6, r0 │ │ @@ -1177492,15 +1177491,15 @@ │ │ bl 237139c │ │ mov r2, r0 │ │ mov r0, r4 │ │ mov r1, #1 │ │ bl 270bb40 │ │ mov r0, r5 │ │ pop {r4, r5, r6, r7, r8, pc} │ │ - vcmla.f16 , q10, , #270 │ │ + stc2l 8, cr11, [r4, #1008]! @ 0x3f0 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 023c73d0 : │ │ push {fp, lr} │ │ ldr r1, [pc, #28] @ 23c73f8 │ │ ldr r2, [pc, #28] @ 23c73fc │ │ ldr r3, [pc, #28] @ 23c7400 │ │ @@ -1177888,25 +1177887,25 @@ │ │ mov r0, r8 │ │ mov r1, r2 │ │ bl 23658c0 │ │ mov fp, r0 │ │ ldrd r0, [r9, #132] @ 0x84 │ │ sub r1, r0, r1 │ │ b 23c7780 │ │ - stc2l 6, cr1, [r7, #16]! │ │ - stc2l 5, cr7, [r7, #936]! @ 0x3a8 │ │ - stc2l 6, cr9, [r6, #688]! @ 0x2b0 │ │ - stc2l 7, cr1, [r5, #40]! @ 0x28 │ │ - stc2l 11, cr12, [r4, #344]! @ 0x158 @ │ │ + stc2l 6, cr1, [r7, #196]! @ 0xc4 │ │ + stc2l 6, cr7, [r7, #92]! @ 0x5c │ │ + stc2l 6, cr9, [r6, #868]! @ 0x364 │ │ + stc2l 7, cr1, [r5, #220]! @ 0xdc │ │ + stc2l 11, cr12, [r4, #524]! @ 0x20c @ │ │ stc2l 2, cr6, [r8, #916]! @ 0x394 │ │ stc2l 14, cr7, [r8, #40]! @ 0x28 │ │ - stc2l 5, cr12, [r7, #632]! @ 0x278 │ │ - stc2l 5, cr9, [r6, #896]! @ 0x380 │ │ - stc2l 9, cr3, [r5, #176]! @ 0xb0 @ │ │ - stc2l 11, cr15, [r4, #248]! @ 0xf8 @ │ │ + stc2l 5, cr12, [r7, #812]! @ 0x32c │ │ + stc2l 6, cr9, [r6, #52]! @ 0x34 │ │ + stc2l 9, cr3, [r5, #266]! @ 0x10a @ │ │ + stc2l 11, cr15, [r4, #428]! @ 0x1ac @ │ │ push {r4, r5, r6, lr} │ │ sub sp, sp, #48 @ 0x30 │ │ mov r1, #1 │ │ mov r4, r0 │ │ bl 2704b60 │ │ cmp r0, #0 │ │ ble 23c7b28 │ │ @@ -1178077,24 +1178076,24 @@ │ │ add r2, pc, r2 │ │ b 23c7cd8 │ │ ldr r2, [pc, #44] @ 23c7d04 │ │ add r2, pc, r2 │ │ mov r0, r4 │ │ movw r1, #1621 @ 0x655 │ │ bl 235f92c │ │ - stc2l 4, cr9, [r6, #496]! @ 0x1f0 │ │ - stc2l 4, cr1, [r5, #680]! @ 0x2a8 │ │ - vcmla.f16 q14, q10, q7, #270 │ │ + stc2l 4, cr9, [r6, #676]! @ 0x2a4 │ │ + stc2l 4, cr1, [r5, #860]! @ 0x35c │ │ + stc2l 8, cr12, [r4, #1004]! @ 0x3ec │ │ stc2l 0, cr6, [r8, #68]! @ 0x44 │ │ stc2l 14, cr5, [r8, #740]! @ 0x2e4 │ │ stc2l 11, cr7, [r8, #72]! @ 0x48 @ │ │ stc2l 9, cr7, [r8, #492]! @ 0x1ec @ │ │ - stc2l 2, cr12, [r7, #520]! @ 0x208 │ │ - stc2l 1, cr12, [r7, #664]! @ 0x298 │ │ - vcmla.f16 , q2, q3, #270 │ │ + stc2l 2, cr12, [r7, #700]! @ 0x2bc │ │ + stc2l 1, cr12, [r7, #844]! @ 0x34c │ │ + stc2l 8, cr15, [r4, #460]! @ 0x1cc │ │ push {r4, r5, r6, lr} │ │ mov r1, #1 │ │ mov r4, r0 │ │ bl 270bce0 │ │ vmov.i32 d16, #0 @ 0x00000000 │ │ mov r5, r0 │ │ mov r6, r1 │ │ @@ -1178131,15 +1178130,15 @@ │ │ mov r1, r5 │ │ bl 2700dc0 │ │ mov r1, r0 │ │ mov r0, r4 │ │ bl 2704b40 │ │ mov r0, #1 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 10, cr10, [r7, #360]! @ 0x168 @ │ │ + stc2l 10, cr10, [r7, #540]! @ 0x21c @ │ │ │ │ 023c7dc0 : │ │ push {r4, r5, r6, lr} │ │ sub sp, sp, #8 │ │ ldr r1, [pc, #600] @ 23c8028 │ │ mov r4, r0 │ │ add r1, pc, r1 │ │ @@ -1178288,52 +1178287,52 @@ │ │ bl 270bf10 │ │ mov r0, r4 │ │ mvn r1, #1 │ │ bl 2704b00 │ │ mov r0, #1 │ │ add sp, sp, #8 │ │ pop {r4, r5, r6, pc} │ │ - stc2l 1, cr9, [r6, #84]! @ 0x54 │ │ + stc2l 1, cr9, [r6, #264]! @ 0x108 │ │ muleq r0, r8, r2 │ │ - stc2l 7, cr0, [r7, #260]! @ 0x104 │ │ - stc2l 3, cr12, [r6, #116]! @ 0x74 │ │ + stc2l 7, cr0, [r7, #440]! @ 0x1b8 │ │ + stc2l 3, cr12, [r6, #296]! @ 0x128 │ │ eorseq r2, r6, r8, asr r8 │ │ andeq r0, r0, r8, lsl #18 │ │ andeq r0, r0, ip, lsl sl │ │ andeq r0, r0, r4, lsl #22 │ │ strdeq r0, [r0], -r4 │ │ - stc2l 12, cr4, [r7, #364]! @ 0x16c │ │ - stc2l 13, cr10, [r4, #512]! @ 0x200 │ │ - stc2l 5, cr2, [r7, #808]! @ 0x328 │ │ - stc2l 10, cr14, [r6, #132]! @ 0x84 @ │ │ - stc2l 10, cr10, [r6, #820]! @ 0x334 @ │ │ - stc2l 0, cr7, [r6, #432]! @ 0x1b0 │ │ - stc2l 1, cr1, [r6, #272]! @ 0x110 │ │ - stc2l 13, cr6, [r7, #20]! │ │ + stc2l 12, cr4, [r7, #544]! @ 0x220 │ │ + stc2l 13, cr10, [r4, #692]! @ 0x2b4 │ │ + stc2l 5, cr2, [r7, #988]! @ 0x3dc │ │ + stc2l 10, cr14, [r6, #312]! @ 0x138 @ │ │ + stc2l 10, cr10, [r6, #1000]! @ 0x3e8 @ │ │ + stc2l 0, cr7, [r6, #612]! @ 0x264 │ │ + stc2l 1, cr1, [r6, #452]! @ 0x1c4 │ │ + stc2l 13, cr6, [r7, #200]! @ 0xc8 │ │ stc2l 15, cr7, [r8, #132]! @ 0x84 │ │ stc2l 2, cr6, [r8, #724]! @ 0x2d4 │ │ - stc2l 9, cr12, [r6, #350]! @ 0x15e @ │ │ - stc2l 1, cr5, [r6, #436]! @ 0x1b4 │ │ - stc2l 1, cr2, [r8, #816]! @ 0x330 │ │ - stc2l 4, cr15, [r4, #672]! @ 0x2a0 │ │ + stc2l 9, cr12, [r6, #440]! @ 0x1b8 @ │ │ + stc2l 1, cr5, [r6, #616]! @ 0x268 │ │ + stc2l 1, cr2, [r8, #996]! @ 0x3e4 │ │ + stc2l 4, cr15, [r4, #852]! @ 0x354 │ │ eorseq r2, r6, r4, lsl #13 │ │ push {r4, lr} │ │ ldr r2, [pc, #40] @ 23c80bc │ │ mov r1, #1 │ │ add r2, pc, r2 │ │ bl 270bd80 │ │ mov r4, r0 │ │ ldr r0, [r0] │ │ cmp r0, #0 │ │ beq 23c80b0 │ │ bl 27029b0 │ │ mov r0, #0 │ │ str r0, [r4] │ │ pop {r4, pc} │ │ - stc2l 14, cr8, [r6, #324]! @ 0x144 │ │ + stc2l 14, cr8, [r6, #504]! @ 0x1f8 │ │ push {r4, r5, r6, lr} │ │ mov r5, r0 │ │ mov r0, r2 │ │ mov r6, r3 │ │ mov r4, r1 │ │ bl 2704220 │ │ mov r1, r0 │ │ @@ -1178362,16 +1178361,16 @@ │ │ mov r1, r6 │ │ bl 2704b40 │ │ mov r0, r5 │ │ mvn r1, #1 │ │ mov r2, r4 │ │ pop {r4, r5, r6, lr} │ │ b 2705300 │ │ - stc2l 15, cr2, [r6, #164]! @ 0xa4 │ │ - stc2l 10, cr12, [r4, #708]! @ 0x2c4 @ │ │ + stc2l 15, cr2, [r6, #344]! @ 0x158 │ │ + stc2l 10, cr12, [r4, #888]! @ 0x378 @ │ │ stc2l 5, cr4, [r8, #44]! @ 0x2c │ │ push {r4, r5, r6, lr} │ │ mov r1, #1 │ │ mov r2, #0 │ │ mov r4, r0 │ │ mov r5, #1 │ │ bl 270bd10 │ │ @@ -1178400,16 +1178399,16 @@ │ │ add r1, pc, r1 │ │ movne r1, r0 │ │ mov r0, r4 │ │ bl 2704b40 │ │ mov r5, #3 │ │ mov r0, r5 │ │ pop {r4, r5, r6, pc} │ │ - stc2l 7, cr12, [r6, #604]! @ 0x25c │ │ - stc2l 0, cr3, [r5, #724]! @ 0x2d4 │ │ + stc2l 7, cr12, [r6, #784]! @ 0x310 │ │ + stc2l 0, cr3, [r5, #904]! @ 0x388 │ │ push {r4, r5, r6, r7, r8, lr} │ │ sub sp, sp, #8 │ │ mov r1, #1 │ │ mov r2, #0 │ │ mov r4, r0 │ │ mov r8, #1 │ │ bl 270bd10 │ │ @@ -1178445,16 +1178444,16 @@ │ │ mov r0, r4 │ │ mvn r1, #1 │ │ bl 270bc90 │ │ mov r8, #2 │ │ mov r0, r8 │ │ add sp, sp, #8 │ │ pop {r4, r5, r6, r7, r8, pc} │ │ - stc2l 14, cr8, [r5, #912]! @ 0x390 │ │ - stc2l 14, cr6, [r5, #852]! @ 0x354 │ │ + stc2l 15, cr8, [r5, #68]! @ 0x44 │ │ + stc2l 15, cr6, [r5, #8]! │ │ push {r4, lr} │ │ mov r1, #1 │ │ mov r2, #5 │ │ mov r4, r0 │ │ bl 270bcb0 │ │ mov r0, r4 │ │ mov r1, #1 │ │ @@ -1178478,15 +1178477,15 @@ │ │ ldr r2, [pc, #20] @ 23c8320 │ │ mov r0, r4 │ │ mvn r1, #1 │ │ add r2, pc, r2 │ │ bl 2705300 │ │ mov r0, #0 │ │ pop {r4, pc} │ │ - stc2l 6, cr1, [r8, #372]! @ 0x174 │ │ + stc2l 6, cr1, [r8, #552]! @ 0x228 │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ mov r4, r0 │ │ mov r0, r1 │ │ mov r8, r3 │ │ mov r9, r2 │ │ mov r6, r1 │ │ bl 26ffe30 │ │ @@ -1178653,24 +1178652,24 @@ │ │ mov r1, r5 │ │ mvn r2, #0 │ │ mov r3, r9 │ │ bl 270be60 │ │ cmp r0, #0 │ │ movwne r0, #3 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - stc2l 12, cr6, [r6, #488]! @ 0x1e8 │ │ - stc2l 4, cr0, [r8, #876]! @ 0x36c │ │ - stc2l 11, cr8, [r6, #52]! @ 0x34 @ │ │ - stc2l 4, cr0, [r8, #348]! @ 0x15c │ │ - stc2l 12, cr8, [r5, #512]! @ 0x200 │ │ - stc2l 9, cr11, [r6, #360]! @ 0x168 @ │ │ - stc2l 14, cr12, [r5, #732]! @ 0x2dc │ │ - stc2l 11, cr8, [r5, #752]! @ 0x2f0 @ │ │ - stc2l 8, cr11, [r6, #960]! @ 0x3c0 │ │ - stc2l 6, cr8, [r7, #324]! @ 0x144 │ │ + stc2l 12, cr6, [r6, #668]! @ 0x29c │ │ + stc2l 5, cr0, [r8, #32]! │ │ + stc2l 11, cr8, [r6, #232]! @ 0xe8 @ │ │ + stc2l 4, cr0, [r8, #528]! @ 0x210 │ │ + stc2l 12, cr8, [r5, #692]! @ 0x2b4 │ │ + stc2l 9, cr11, [r6, #450]! @ 0x1c2 @ │ │ + stc2l 14, cr12, [r5, #912]! @ 0x390 │ │ + stc2l 11, cr8, [r5, #932]! @ 0x3a4 @ │ │ + stc2l 9, cr11, [r6, #58]! @ 0x3a @ │ │ + stc2l 6, cr8, [r7, #504]! @ 0x1f8 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #20 │ │ sub sp, sp, #1024 @ 0x400 │ │ mov r5, r1 │ │ add r1, sp, #8 │ │ mov r7, r3 │ │ mov r6, r2 │ │ @@ -1178748,17 +1178747,17 @@ │ │ mov r6, #0 │ │ b 23c8748 │ │ bl 2703030 │ │ mov r0, r6 │ │ add sp, sp, #20 │ │ add sp, sp, #1024 @ 0x400 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 4, cr0, [r5, #760]! @ 0x2f8 │ │ - stc2l 4, cr6, [r7, #664]! @ 0x298 │ │ - stc2l 4, cr4, [r7, #956]! @ 0x3bc │ │ + stc2l 4, cr0, [r5, #940]! @ 0x3ac │ │ + stc2l 4, cr6, [r7, #844]! @ 0x34c │ │ + stc2l 5, cr4, [r7, #112]! @ 0x70 │ │ push {r4, r5, r6, lr} │ │ mov r1, #1 │ │ mov r2, #0 │ │ mov r4, r0 │ │ bl 270bd10 │ │ ldr r2, [pc, #264] @ 23c8888 │ │ movw r1, #55535 @ 0xd8ef │ │ @@ -1178824,20 +1178823,20 @@ │ │ ldr r1, [pc, #40] @ 23c889c │ │ mov r0, r4 │ │ mov r2, r5 │ │ add r1, pc, r1 │ │ bl 270bbe0 │ │ mov r0, #1 │ │ pop {r4, r5, r6, pc} │ │ - stc2l 13, cr14, [r4, #32]! │ │ - stc2l 6, cr4, [r5, #632]! @ 0x278 │ │ - stc2l 9, cr8, [r5, #32]! @ │ │ - stc2l 6, cr11, [r6, #256]! @ 0x100 │ │ - stc2l 3, cr8, [r7, #644]! @ 0x284 │ │ - stc2l 3, cr8, [r7, #360]! @ 0x168 │ │ + stc2l 13, cr14, [r4, #212]! @ 0xd4 │ │ + stc2l 6, cr4, [r5, #812]! @ 0x32c │ │ + stc2l 9, cr8, [r5, #122]! @ 0x7a @ │ │ + stc2l 6, cr11, [r6, #436]! @ 0x1b4 │ │ + stc2l 3, cr8, [r7, #824]! @ 0x338 │ │ + stc2l 3, cr8, [r7, #540]! @ 0x21c │ │ push {r4, r5, r6, lr} │ │ sub sp, sp, #8 │ │ mov r1, #1 │ │ mov r2, #0 │ │ mov r4, r0 │ │ bl 270bd10 │ │ ldr r2, [pc, #216] @ 23c8998 │ │ @@ -1178892,20 +1178891,20 @@ │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ mov r3, r5 │ │ bl 270bb60 │ │ mov r0, #1 │ │ add sp, sp, #8 │ │ pop {r4, r5, r6, pc} │ │ - stc2l 12, cr1, [r7, #248]! @ 0xf8 │ │ - stc2l 5, cr8, [r6, #1012]! @ 0x3f4 │ │ - stc2l 12, cr1, [r7, #24]! │ │ - stc2l 7, cr8, [r5, #1008]! @ 0x3f0 │ │ - vcmla.f16 d22, d5, d5, #270 │ │ - stc2l 15, cr13, [r6, #936]! @ 0x3a8 │ │ + stc2l 12, cr1, [r7, #428]! @ 0x1ac │ │ + stc2l 6, cr8, [r6, #168]! @ 0xa8 │ │ + stc2l 12, cr1, [r7, #204]! @ 0xcc │ │ + vcmla.f16 d24, d5, d25, #270 │ │ + stc2l 8, cr6, [r5, #200]! @ 0xc8 │ │ + stc2l 0, cr14, [r6, #92]! @ 0x5c │ │ push {r4, r5, r6, lr} │ │ sub sp, sp, #8 │ │ mov r1, #1 │ │ mov r2, #0 │ │ mov r4, r0 │ │ bl 270bd10 │ │ ldr r2, [pc, #224] @ 23c8ab0 │ │ @@ -1178962,20 +1178961,20 @@ │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ mov r3, r6 │ │ bl 270bb60 │ │ mov r0, #1 │ │ add sp, sp, #8 │ │ pop {r4, r5, r6, pc} │ │ - stc2l 5, cr6, [r6, #960]! @ 0x3c0 │ │ - stc2l 4, cr8, [r6, #948]! @ 0x3b4 │ │ - stc2l 5, cr6, [r6, #736]! @ 0x2e0 │ │ - stc2l 6, cr8, [r5, #944]! @ 0x3b0 │ │ - stc2l 6, cr6, [r5, #980]! @ 0x3d4 │ │ - stc2l 14, cr13, [r6, #840]! @ 0x348 │ │ + stc2l 6, cr6, [r6, #116]! @ 0x74 │ │ + stc2l 5, cr8, [r6, #104]! @ 0x68 │ │ + stc2l 5, cr6, [r6, #916]! @ 0x394 │ │ + stc2l 7, cr8, [r5, #100]! @ 0x64 │ │ + stc2l 7, cr6, [r5, #136]! @ 0x88 │ │ + stc2l 14, cr13, [r6, #1020]! @ 0x3fc │ │ push {r4, r5, r6, r7, r8, lr} │ │ sub sp, sp, #8 │ │ mov r1, #1 │ │ mov r2, #0 │ │ mov r4, r0 │ │ mov r6, #0 │ │ bl 270bd10 │ │ @@ -1179055,21 +1179054,21 @@ │ │ mov r2, r5 │ │ mov r3, r7 │ │ add r1, pc, r1 │ │ bl 270bbe0 │ │ mov r0, r6 │ │ add sp, sp, #8 │ │ pop {r4, r5, r6, r7, r8, pc} │ │ - stc2l 4, cr6, [r6, #640]! @ 0x280 │ │ - stc2l 3, cr8, [r6, #628]! @ 0x274 │ │ - stc2l 4, cr6, [r6, #416]! @ 0x1a0 │ │ - stc2l 5, cr8, [r5, #624]! @ 0x270 │ │ - stc2l 5, cr6, [r5, #660]! @ 0x294 │ │ - stc2l 13, cr13, [r6, #472]! @ 0x1d8 │ │ - stc2l 0, cr10, [r4, #504]! @ 0x1f8 │ │ + stc2l 4, cr6, [r6, #820]! @ 0x334 │ │ + stc2l 3, cr8, [r6, #808]! @ 0x328 │ │ + stc2l 4, cr6, [r6, #596]! @ 0x254 │ │ + stc2l 5, cr8, [r5, #804]! @ 0x324 │ │ + stc2l 5, cr6, [r5, #840]! @ 0x348 │ │ + stc2l 13, cr13, [r6, #652]! @ 0x28c │ │ + stc2l 0, cr10, [r4, #684]! @ 0x2ac │ │ push {r4, r5, r6, r7, r8, lr} │ │ sub sp, sp, #104 @ 0x68 │ │ mov r1, #1 │ │ mov r2, #0 │ │ mov r4, r0 │ │ bl 270bd10 │ │ mov r5, r0 │ │ @@ -1179175,20 +1179174,20 @@ │ │ mov r2, #0 │ │ bl 2705230 │ │ cmp r6, r5 │ │ bne 23c8dc4 │ │ mov r0, #0 │ │ add sp, sp, #104 @ 0x68 │ │ pop {r4, r5, r6, r7, r8, pc} │ │ - stc2l 0, cr10, [r4, #176]! @ 0xb0 │ │ - stc2l 11, cr15, [r7, #588]! @ 0x24c @ │ │ - stc2l 15, cr9, [r4, #800]! @ 0x320 │ │ - stc2l 14, cr11, [r4, #596]! @ 0x254 │ │ - stc2l 14, cr15, [r6, #756]! @ 0x2f4 │ │ - stc2l 15, cr9, [r4, #152]! @ 0x98 │ │ + stc2l 0, cr10, [r4, #356]! @ 0x164 │ │ + stc2l 11, cr15, [r7, #768]! @ 0x300 @ │ │ + stc2l 15, cr9, [r4, #980]! @ 0x3d4 │ │ + stc2l 14, cr11, [r4, #776]! @ 0x308 │ │ + stc2l 14, cr15, [r6, #936]! @ 0x3a8 │ │ + stc2l 15, cr9, [r4, #332]! @ 0x14c │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ mov r1, #1 │ │ mov r2, #0 │ │ mov r4, r0 │ │ bl 270bd10 │ │ mov r5, r0 │ │ mov r0, r4 │ │ @@ -1179334,33 +1179333,33 @@ │ │ bl 2704fe0 │ │ mov r0, r4 │ │ mov r1, #2 │ │ mov r2, r5 │ │ bl 2705300 │ │ mov r0, #1 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - stc2l 11, cr11, [r6, #28]! @ │ │ - stc2l 12, cr3, [r7, #728]! @ 0x2d8 │ │ - stc2l 12, cr3, [r7, #524]! @ 0x20c │ │ - stc2l 3, cr2, [r5, #616]! @ 0x268 │ │ - stc2l 7, cr7, [r5, #212]! @ 0xd4 │ │ - stc2l 9, cr9, [r7, #2]! @ │ │ + stc2l 11, cr11, [r6, #208]! @ 0xd0 @ │ │ + stc2l 12, cr3, [r7, #908]! @ 0x38c │ │ + stc2l 12, cr3, [r7, #704]! @ 0x2c0 │ │ + stc2l 3, cr2, [r5, #796]! @ 0x31c │ │ + stc2l 7, cr7, [r5, #392]! @ 0x188 │ │ + stc2l 9, cr9, [r7, #92]! @ 0x5c @ │ │ │ │ 023c9098 : │ │ push {fp, lr} │ │ ldr r1, [pc, #28] @ 23c90c0 │ │ ldr r2, [pc, #28] @ 23c90c4 │ │ ldr r3, [pc, #28] @ 23c90c8 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ add r3, pc, r3 │ │ bl 23beea4 │ │ mov r0, #1 │ │ pop {fp, pc} │ │ - stc2l 10, cr13, [r4, #680]! @ 0x2a8 @ │ │ + stc2l 10, cr13, [r4, #860]! @ 0x35c @ │ │ ldc2l 13, cr14, [r0, #812]! @ 0x32c │ │ ldrshteq r1, [r6], -r4 │ │ ldr r2, [r0, #20] │ │ ldr r1, [r0, #8] │ │ add r3, r2, #8 │ │ str r3, [r0, #20] │ │ ldrd r0, [r1, #184] @ 0xb8 │ │ @@ -1179696,29 +1179695,29 @@ │ │ mov r1, r8 │ │ mov r2, #1184 @ 0x4a0 │ │ bl 235fa7c │ │ mov r0, r4 │ │ mov r1, r7 │ │ movw r2, #629 @ 0x275 │ │ bl 235fa7c │ │ - stc2l 7, cr11, [r6, #368]! @ 0x170 │ │ - stc2l 14, cr3, [r6, #656]! @ 0x290 │ │ - stc2l 12, cr5, [r6, #880]! @ 0x370 │ │ - stc2l 5, cr15, [r7, #344]! @ 0x158 │ │ - stc2l 13, cr15, [r5, #720]! @ 0x2d0 │ │ - stc2l 1, cr0, [r5, #48]! @ 0x30 │ │ - stc2l 13, cr15, [r5, #424]! @ 0x1a8 │ │ - vcmla.f16 , q3, , #270 │ │ - stc2l 9, cr9, [r5, #492]! @ 0x1ec @ │ │ + stc2l 7, cr11, [r6, #548]! @ 0x224 │ │ + stc2l 14, cr3, [r6, #836]! @ 0x344 │ │ + stc2l 13, cr5, [r6, #36]! @ 0x24 │ │ + stc2l 5, cr15, [r7, #524]! @ 0x20c │ │ + stc2l 13, cr15, [r5, #900]! @ 0x384 │ │ + stc2l 1, cr0, [r5, #228]! @ 0xe4 │ │ + stc2l 13, cr15, [r5, #604]! @ 0x25c │ │ + stc2l 8, cr9, [r6, #448]! @ 0x1c0 │ │ + stc2l 10, cr9, [r5, #140]! @ 0x8c @ │ │ stc2l 14, cr4, [r8, #656]! @ 0x290 │ │ stc2l 1, cr3, [r8, #180]! @ 0xb4 │ │ - stc2l 10, cr8, [r7, #676]! @ 0x2a4 @ │ │ - stc2l 13, cr12, [r7, #504]! @ 0x1f8 │ │ - stc2l 11, cr15, [r5, #164]! @ 0xa4 @ │ │ - stc2l 5, cr11, [r4, #840]! @ 0x348 │ │ + stc2l 10, cr8, [r7, #856]! @ 0x358 @ │ │ + stc2l 13, cr12, [r7, #684]! @ 0x2ac │ │ + stc2l 11, cr15, [r5, #344]! @ 0x158 @ │ │ + stc2l 5, cr11, [r4, #1020]! @ 0x3fc │ │ push {r4, r5, r6, r7, fp, lr} │ │ sub sp, sp, #104 @ 0x68 │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ mov r7, #0 │ │ cmp r0, r1 │ │ bcs 23c9690 │ │ @@ -1180110,15 +1180109,15 @@ │ │ mov r1, r0 │ │ mov r0, r4 │ │ bl 2704c30 │ │ mov r0, #3 │ │ add sp, sp, #8 │ │ pop {r4, r5, fp, pc} │ │ andeq r0, r0, r0, asr #5 │ │ - stc2l 7, cr11, [r5, #376]! @ 0x178 │ │ + stc2l 7, cr11, [r5, #556]! @ 0x22c │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #260 @ 0x104 │ │ mov r4, r0 │ │ ldr r0, [pc, #292] @ 23c9dd4 │ │ ldr r7, [pc, #292] @ 23c9dd8 │ │ mov r1, #11 │ │ add r0, pc, r0 │ │ @@ -1180192,18 +1180191,18 @@ │ │ bne 23c9d0c │ │ mov r0, #0 │ │ add sp, sp, #260 @ 0x104 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stc2l 1, cr6, [r8, #976]! @ 0x3d0 │ │ eorseq lr, r6, ip, lsl #1 │ │ eorseq r1, r7, r4, lsr #12 │ │ - stc2l 15, cr14, [r6, #156]! @ 0x9c │ │ - stc2l 4, cr7, [r5, #88]! @ 0x58 │ │ + stc2l 15, cr14, [r6, #336]! @ 0x150 │ │ + stc2l 4, cr7, [r5, #268]! @ 0x10c │ │ stc2l 1, cr6, [r8, #656]! @ 0x290 │ │ - stc2l 14, cr10, [r4, #748]! @ 0x2ec │ │ + stc2l 14, cr10, [r4, #928]! @ 0x3a0 │ │ push {r4, r5, r6, r7, fp, lr} │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ mov r7, #0 │ │ cmp r0, r1 │ │ bcs 23c9e20 │ │ ldr r1, [r0, #4] │ │ @@ -1180393,20 +1180392,20 @@ │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldc2l 15, cr13, [r0, #700]! @ 0x2bc │ │ eorseq r0, r6, r8, lsl #15 │ │ ldc2l 0, cr14, [r0, #88]! @ 0x58 │ │ eorseq r0, r6, r4, lsr #15 │ │ ldc2l 0, cr14, [r0, #40]! @ 0x28 │ │ eorseq r0, r6, ip, lsl #15 │ │ - stc2l 2, cr1, [r5, #640]! @ 0x280 │ │ - stc2l 13, cr4, [r7, #40]! @ 0x28 │ │ + stc2l 2, cr1, [r5, #820]! @ 0x334 │ │ + stc2l 13, cr4, [r7, #220]! @ 0xdc │ │ ldc2l 15, cr13, [r0, #680]! @ 0x2a8 │ │ eorseq r0, r6, ip, lsl r7 │ │ - stc2l 9, cr10, [r6, #6]! @ │ │ - stc2l 11, cr14, [r6, #612]! @ 0x264 @ │ │ + stc2l 9, cr10, [r6, #96]! @ 0x60 @ │ │ + stc2l 11, cr14, [r6, #792]! @ 0x318 @ │ │ push {r4, r5, fp, lr} │ │ sub sp, sp, #16 │ │ mov r4, r0 │ │ ldr r0, [r0, #8] │ │ ldr r5, [r0, #252] @ 0xfc │ │ mov r0, #0 │ │ str r0, [sp, #12] │ │ @@ -1180762,18 +1180761,18 @@ │ │ mov r0, r4 │ │ bl 23642f4 │ │ b 23ca5e0 │ │ mov r0, r4 │ │ mov r1, #1 │ │ mov r2, #10 │ │ bl 235fb8c │ │ - stc2l 4, cr10, [r6, #504]! @ 0x1f8 │ │ - stc2l 5, cr2, [r7, #452]! @ 0x1c4 │ │ - stc2l 5, cr6, [r7, #604]! @ 0x25c │ │ - stc2l 5, cr6, [r7, #908]! @ 0x38c │ │ + stc2l 4, cr10, [r6, #684]! @ 0x2ac │ │ + stc2l 5, cr2, [r7, #632]! @ 0x278 │ │ + stc2l 5, cr6, [r7, #784]! @ 0x310 │ │ + stc2l 6, cr6, [r7, #64]! @ 0x40 │ │ mov r1, #20 │ │ b 23cab90 │ │ mov r1, #21 │ │ b 23cab90 │ │ push {r4, r5, r6, r7, fp, lr} │ │ mov r4, r0 │ │ ldr r0, [r1] │ │ @@ -1181023,15 +1181022,15 @@ │ │ mov r1, r0 │ │ mov r0, sl │ │ bl 235f30c │ │ mov r0, sl │ │ mov r1, #2 │ │ movw r2, #551 @ 0x227 │ │ bl 235fa7c │ │ - stc2l 14, cr11, [r6, #992]! @ 0x3e0 │ │ + stc2l 15, cr11, [r6, #148]! @ 0x94 │ │ push {r4, r5, fp, lr} │ │ sub sp, sp, #88 @ 0x58 │ │ ldrd r4, [r0, #16] │ │ cmp r4, r5 │ │ bcs 23cab70 │ │ ldr r3, [r4, #4] │ │ cmn r3, #11 │ │ @@ -1181069,15 +1181068,15 @@ │ │ ldr r2, [pc, #20] @ 23cab8c │ │ mov r1, #1 │ │ add r2, pc, r2 │ │ bl 235fa90 │ │ mov r1, #1 │ │ movw r2, #3176 @ 0xc68 │ │ bl 235fa7c │ │ - stc2l 14, cr11, [r6, #128]! @ 0x80 │ │ + stc2l 14, cr11, [r6, #308]! @ 0x134 │ │ push {r4, r5, r6, lr} │ │ mov r4, r0 │ │ ldr r0, [r0, #8] │ │ ldrd r2, [r4, #16] │ │ ldr r0, [r0, #252] @ 0xfc │ │ cmp r2, r3 │ │ str r4, [r0, #12] │ │ @@ -1181517,15 +1181516,15 @@ │ │ mov r0, sl │ │ mov r1, #1 │ │ add r2, pc, r2 │ │ bl 235fa90 │ │ mov r1, r0 │ │ mov r0, sl │ │ bl 235f30c │ │ - stc2l 7, cr11, [r6, #128]! @ 0x80 │ │ + stc2l 7, cr11, [r6, #308]! @ 0x134 │ │ push {r4, r5, r6, lr} │ │ mov r4, r0 │ │ ldr r0, [r0, #8] │ │ ldr r1, [r4, #16] │ │ ldr r5, [r0, #252] @ 0xfc │ │ add r2, r1, #8 │ │ mov r0, r4 │ │ @@ -1181662,18 +1181661,18 @@ │ │ mov r0, #1 │ │ add sp, sp, #8 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ mov r0, r4 │ │ mov r1, #1 │ │ movw r2, #551 @ 0x227 │ │ bl 235fa7c │ │ - stc2l 9, cr7, [r4, #148]! @ 0x94 @ │ │ - stc2l 5, cr0, [r8, #872]! @ 0x368 │ │ - stc2l 7, cr9, [r4, #808]! @ 0x328 │ │ - stc2l 11, cr6, [r7, #324]! @ 0x144 @ │ │ + stc2l 9, cr7, [r4, #238]! @ 0xee @ │ │ + stc2l 6, cr0, [r8, #28]! │ │ + stc2l 7, cr9, [r4, #988]! @ 0x3dc │ │ + stc2l 11, cr6, [r7, #504]! @ 0x1f8 @ │ │ push {r4, r5, r6, r7, fp, lr} │ │ sub sp, sp, #88 @ 0x58 │ │ ldr r1, [r0, #8] │ │ mov r4, r0 │ │ ldr r3, [r0, #20] │ │ ldr r0, [r0, #16] │ │ ldr r5, [r1, #252] @ 0xfc │ │ @@ -1181782,15 +1181781,15 @@ │ │ mov r0, r4 │ │ mov r1, #1 │ │ add r2, pc, r2 │ │ bl 235fa90 │ │ mov r1, r0 │ │ mov r0, r4 │ │ bl 235f30c │ │ - stc2l 2, cr11, [r6, #1008]! @ 0x3f0 │ │ + stc2l 3, cr11, [r6, #164]! @ 0xa4 │ │ push {r4, r5, r6, lr} │ │ sub sp, sp, #88 @ 0x58 │ │ ldr r1, [r0, #8] │ │ mov r4, r0 │ │ ldr r3, [r0, #20] │ │ ldr r0, [r0, #16] │ │ ldr r5, [r1, #252] @ 0xfc │ │ @@ -1181886,15 +1181885,15 @@ │ │ mov r1, r0 │ │ mov r0, r4 │ │ bl 235f30c │ │ mov r0, r4 │ │ mov r1, #2 │ │ movw r2, #551 @ 0x227 │ │ bl 235fa7c │ │ - stc2l 1, cr11, [r6, #432]! @ 0x1b0 │ │ + stc2l 1, cr11, [r6, #612]! @ 0x264 │ │ push {r4, r5, fp, lr} │ │ sub sp, sp, #88 @ 0x58 │ │ ldr r1, [r0, #8] │ │ mov r4, r0 │ │ ldr r3, [r0, #20] │ │ ldr r0, [r0, #16] │ │ ldr r5, [r1, #252] @ 0xfc │ │ @@ -1181945,15 +1181944,15 @@ │ │ mov r0, r4 │ │ mov r1, #1 │ │ add r2, pc, r2 │ │ bl 235fa90 │ │ mov r1, r0 │ │ mov r0, r4 │ │ bl 235f30c │ │ - stc2l 0, cr11, [r6, #448]! @ 0x1c0 │ │ + stc2l 0, cr11, [r6, #628]! @ 0x274 │ │ push {r4, r5, r6, r7, fp, lr} │ │ sub sp, sp, #88 @ 0x58 │ │ ldr r1, [r0, #8] │ │ mov r4, r0 │ │ ldr r3, [r0, #20] │ │ ldr r0, [r0, #16] │ │ ldr r5, [r1, #252] @ 0xfc │ │ @@ -1182045,15 +1182044,15 @@ │ │ mov r0, r4 │ │ mov r1, #1 │ │ add r2, pc, r2 │ │ bl 235fa90 │ │ mov r1, r0 │ │ mov r0, r4 │ │ bl 235f30c │ │ - stc2l 14, cr10, [r6, #896]! @ 0x380 │ │ + stc2l 15, cr10, [r6, #52]! @ 0x34 │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ sub sp, sp, #8 │ │ mov r4, r0 │ │ bl 2702800 │ │ ldrd r8, [r4, #16] │ │ ldr r6, [r0] │ │ cmp r9, r8 │ │ @@ -1182306,15 +1182305,15 @@ │ │ cmn r0, #1 │ │ mvngt r2, #2 │ │ str r2, [r1, #-4] │ │ ldr r0, [r4, #8] │ │ str r2, [r0, #156] @ 0x9c │ │ mov r0, #1 │ │ pop {r4, pc} │ │ - stc2l 4, cr9, [r5, #816]! @ 0x330 │ │ + stc2l 4, cr9, [r5, #996]! @ 0x3e4 │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ sub sp, sp, #88 @ 0x58 │ │ ldr r1, [r0, #8] │ │ mov r4, r0 │ │ ldr r3, [r0, #20] │ │ ldr r0, [r0, #16] │ │ ldr r6, [r1, #252] @ 0xfc │ │ @@ -1182418,15 +1182417,15 @@ │ │ bl 235fa90 │ │ mov r0, r4 │ │ movw r1, #951 @ 0x3b7 │ │ bl 235f968 │ │ mov r1, r0 │ │ mov r0, r4 │ │ bl 235f30c │ │ - stc2l 9, cr10, [r6, #48]! @ 0x30 @ │ │ + stc2l 9, cr10, [r6, #138]! @ 0x8a @ │ │ push {r4, r5, r6, lr} │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ cmp r0, r1 │ │ bcs 23cc13c │ │ ldr r1, [r0, #4] │ │ cmn r1, #11 │ │ @@ -1182737,18 +1182736,18 @@ │ │ movne r1, r9 │ │ bl 235f870 │ │ mov r9, #0 │ │ b 23cc570 │ │ bl 270ace0 │ │ mov r9, r0 │ │ b 23cc570 │ │ - stc2l 12, cr14, [r5, #640]! @ 0x280 │ │ - stc2l 2, cr8, [r7, #268]! @ 0x10c │ │ - stc2l 6, cr2, [r7, #776]! @ 0x308 │ │ - stc2l 4, cr8, [r6, #992]! @ 0x3e0 │ │ + stc2l 12, cr14, [r5, #820]! @ 0x334 │ │ + stc2l 2, cr8, [r7, #448]! @ 0x1c0 │ │ + stc2l 6, cr2, [r7, #956]! @ 0x3bc │ │ + stc2l 5, cr8, [r6, #148]! @ 0x94 │ │ stc2l 12, cr1, [r8, #852]! @ 0x354 │ │ ldr r1, [r0] │ │ add r2, r1, #1 │ │ cmp r2, #2 │ │ bcc 23cc5d8 │ │ push {r4, lr} │ │ mov r4, r0 │ │ @@ -1182823,15 +1182822,15 @@ │ │ mov r0, r4 │ │ bl 2366964 │ │ add r0, r0, #20 │ │ pop {r4, r5, fp, pc} │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ stc2l 15, cr15, [r7, #932]! @ 0x3a4 │ │ - stc2l 5, cr6, [r6, #268]! @ 0x10c │ │ + stc2l 5, cr6, [r6, #448]! @ 0x1c0 │ │ │ │ 023cc6f8 : │ │ push {r4, lr} │ │ ldr r2, [pc, #96] @ 23cc764 │ │ mov r1, #0 │ │ ldr r3, [pc, #92] @ 23cc768 │ │ mov r4, r0 │ │ @@ -1182855,16 +1182854,16 @@ │ │ add r2, pc, r2 │ │ add r3, pc, r3 │ │ bl 23beea4 │ │ mov r0, #1 │ │ pop {r4, pc} │ │ ldc2l 9, cr11, [r0, #180]! @ 0xb4 @ │ │ eorseq lr, r5, r8, lsl #1 │ │ - stc2l 2, cr15, [r7, #656]! @ 0x290 │ │ - stc2l 4, cr6, [r6, #532]! @ 0x214 │ │ + stc2l 2, cr15, [r7, #836]! @ 0x344 │ │ + stc2l 4, cr6, [r6, #712]! @ 0x2c8 │ │ ldc2l 9, cr11, [r0, #308]! @ 0x134 @ │ │ eorseq lr, r5, r4, lsl #1 │ │ push {r4, r5, r7, lr} │ │ ldrd r2, [r0, #16] │ │ cmp r2, r3 │ │ bcs 23cc7a4 │ │ ldr r1, [r2, #4] │ │ @@ -1182903,15 +1182902,15 @@ │ │ str r1, [r4, #44] @ 0x2c │ │ str r1, [r4, #24] │ │ add r1, r2, #8 │ │ str r1, [r0, #20] │ │ mov r0, #1 │ │ str r3, [r4, #36] @ 0x24 │ │ pop {r4, r5, r7, pc} │ │ - stc2l 3, cr0, [r7, #956]! @ 0x3bc │ │ + stc2l 4, cr0, [r7, #112]! @ 0x70 │ │ push {r4, lr} │ │ ldr r4, [r0, #16] │ │ ldr r3, [r0, #20] │ │ cmp r4, r3 │ │ bcs 23cc85c │ │ ldr r1, [r4, #4] │ │ cmn r1, #13 │ │ @@ -1182937,15 +1182936,15 @@ │ │ str r3, [r1, #28] │ │ str r3, [r1, #44] @ 0x2c │ │ str r3, [r1, #24] │ │ add r1, r4, #8 │ │ str r1, [r0, #20] │ │ mov r0, #1 │ │ pop {r4, pc} │ │ - stc2l 3, cr0, [r7, #220]! @ 0xdc │ │ + stc2l 3, cr0, [r7, #400]! @ 0x190 │ │ push {r4, r5, fp, lr} │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ cmp r0, r1 │ │ bcs 23cc8e4 │ │ ldr r1, [r0, #4] │ │ cmn r1, #13 │ │ @@ -1182977,15 +1182976,15 @@ │ │ streq r1, [r5, #24] │ │ ldr r0, [r4, #16] │ │ str r1, [r5, #44] @ 0x2c │ │ add r0, r0, #8 │ │ str r0, [r4, #20] │ │ mov r0, #1 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 2, cr0, [r7, #684]! @ 0x2ac │ │ + stc2l 2, cr0, [r7, #864]! @ 0x360 │ │ push {r4, r5, r6, r7, fp, lr} │ │ sub sp, sp, #8 │ │ ldrd r2, [r0, #16] │ │ mov r4, r0 │ │ cmp r2, r3 │ │ bcs 23cc988 │ │ ldr r0, [r2, #4] │ │ @@ -1183063,15 +1183062,15 @@ │ │ mov r0, #1 │ │ add sp, sp, #8 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldr r0, [r4, #8] │ │ mov r1, r5 │ │ bl 2364cfc │ │ b 23cca84 │ │ - stc2l 2, cr0, [r7, #28]! │ │ + stc2l 2, cr0, [r7, #208]! @ 0xd0 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #4 │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ cmp r0, r1 │ │ bcs 23ccae0 │ │ ldr r2, [r0, #4] │ │ @@ -1183197,16 +1183196,16 @@ │ │ mov r0, r4 │ │ add r2, pc, r2 │ │ bl 235fa90 │ │ add r1, r5, #1 │ │ mov r0, r4 │ │ movw r2, #3762 @ 0xeb2 │ │ bl 235fa7c │ │ - stc2l 12, cr9, [r6, #972]! @ 0x3cc │ │ - stc2l 0, cr0, [r7, #700]! @ 0x2bc │ │ + stc2l 13, cr9, [r6, #128]! @ 0x80 │ │ + stc2l 0, cr0, [r7, #880]! @ 0x370 │ │ push {r4, lr} │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ cmp r0, r1 │ │ bcs 23cccf8 │ │ ldr r1, [r0, #4] │ │ cmn r1, #13 │ │ @@ -1183238,15 +1183237,15 @@ │ │ bcs 23ccd58 │ │ mov r0, #1 │ │ pop {r4, pc} │ │ mov r0, r4 │ │ bl 23642f4 │ │ mov r0, #1 │ │ pop {r4, pc} │ │ - stc2l 14, cr15, [r6, #604]! @ 0x25c │ │ + stc2l 14, cr15, [r6, #784]! @ 0x310 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ sub sp, sp, #4 │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ cmp r0, r1 │ │ bcs 23ccd9c │ │ ldr r2, [r0, #4] │ │ @@ -1183323,15 +1183322,15 @@ │ │ bcs 23cceb0 │ │ sub r0, r5, #1 │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, r4 │ │ bl 23642f4 │ │ b 23ccea4 │ │ - stc2l 13, cr15, [r6, #972]! @ 0x3cc │ │ + stc2l 14, cr15, [r6, #128]! @ 0x80 │ │ push {r4, r5, fp, lr} │ │ sub sp, sp, #8 │ │ ldrd r2, [r0, #16] │ │ mov r4, r0 │ │ cmp r2, r3 │ │ bcs 23ccef0 │ │ ldr r0, [r2, #4] │ │ @@ -1183379,16 +1183378,16 @@ │ │ add sp, sp, #8 │ │ pop {r4, r5, fp, pc} │ │ ldr r2, [pc, #12] @ 23ccf9c │ │ mov r0, r4 │ │ mov r1, #2 │ │ add r2, pc, r2 │ │ bl 235fa90 │ │ - stc2l 9, cr9, [r6, #340]! @ 0x154 @ │ │ - stc2l 12, cr15, [r6, #636]! @ 0x27c │ │ + stc2l 9, cr9, [r6, #430]! @ 0x1ae @ │ │ + stc2l 12, cr15, [r6, #816]! @ 0x330 │ │ push {r4, r5, r6, r7, fp, lr} │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ cmp r0, r1 │ │ bcs 23ccfd0 │ │ ldr r1, [r0, #4] │ │ cmn r1, #13 │ │ @@ -1183451,15 +1183450,15 @@ │ │ add r1, r0, #8 │ │ str r1, [r4, #20] │ │ strd r2, [r0] │ │ mov r0, #2 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ bl 23659c8 │ │ b 23cd028 │ │ - stc2l 11, cr15, [r6, #764]! @ 0x2fc @ │ │ + stc2l 11, cr15, [r6, #944]! @ 0x3b0 @ │ │ push {r4, r5, fp, lr} │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ cmp r0, r1 │ │ bcs 23cd0ec │ │ ldr r1, [r0, #4] │ │ cmn r1, #13 │ │ @@ -1183488,15 +1183487,15 @@ │ │ strls r0, [r4, #20] │ │ movls r0, #1 │ │ popls {r4, r5, fp, pc} │ │ mov r0, r4 │ │ mov r1, #2 │ │ movw r2, #1094 @ 0x446 │ │ bl 235fa7c │ │ - stc2l 10, cr15, [r6, #652]! @ 0x28c @ │ │ + stc2l 10, cr15, [r6, #832]! @ 0x340 @ │ │ push {r4, r5, r6, r7, fp, lr} │ │ ldrd r6, [r0, #16] │ │ mov r4, r0 │ │ cmp r6, r7 │ │ bcs 23cd180 │ │ ldr r0, [r6, #4] │ │ cmn r0, #13 │ │ @@ -1183540,15 +1183539,15 @@ │ │ add r3, r0, #8 │ │ str r3, [r4, #20] │ │ mvn r3, #13 │ │ sub r2, r1, r2 │ │ strd r2, [r0] │ │ mov r0, #2 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 10, cr15, [r6, #60]! @ 0x3c @ │ │ + stc2l 10, cr15, [r6, #240]! @ 0xf0 @ │ │ push {r4, r5, fp, lr} │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ cmp r0, r1 │ │ bcs 23cd250 │ │ ldr r1, [r0, #4] │ │ cmn r1, #13 │ │ @@ -1183579,15 +1183578,15 @@ │ │ add r0, r0, #8 │ │ str r0, [r4, #20] │ │ mov r0, #1 │ │ pop {r4, r5, fp, pc} │ │ mov r0, r4 │ │ bl 23642f4 │ │ b 23cd29c │ │ - stc2l 9, cr15, [r6, #126]! @ 0x7e @ │ │ + stc2l 9, cr15, [r6, #216]! @ 0xd8 @ │ │ push {r4, r5, fp, lr} │ │ mov r4, r0 │ │ ldrd r0, [r0, #16] │ │ cmp r0, r1 │ │ bcs 23cd2ec │ │ ldr r2, [r0, #4] │ │ cmn r2, #13 │ │ @@ -1183619,15 +1183618,15 @@ │ │ bcs 23cd34c │ │ mov r0, #1 │ │ pop {r4, r5, fp, pc} │ │ mov r0, r4 │ │ bl 23642f4 │ │ mov r0, #1 │ │ pop {r4, r5, fp, pc} │ │ - vcmla.f16 d31, d22, d19, #270 │ │ + stc2l 8, cr15, [r6, #832]! @ 0x340 │ │ push {r4, r5, r7, lr} │ │ ldrd r2, [r0, #16] │ │ cmp r2, r3 │ │ bcs 23cd388 │ │ ldr r1, [r2, #4] │ │ cmn r1, #13 │ │ ldreq r4, [r2] │ │ @@ -1183661,15 +1183660,15 @@ │ │ mov r0, #0 │ │ str r1, [r4, #24] │ │ str r1, [r4, #28] │ │ str r1, [r4, #32] │ │ str r1, [r4, #40] @ 0x28 │ │ str r1, [r4, #44] @ 0x2c │ │ pop {r4, r5, r7, pc} │ │ - vcmla.f16 d31, d6, d11, #270 │ │ + stc2l 8, cr15, [r6, #224]! @ 0xe0 │ │ push {r4, r5, fp, lr} │ │ mov r4, r0 │ │ ldr r5, [r0, #20] │ │ ldr r0, [r0, #16] │ │ cmp r0, r5 │ │ bcs 23cd438 │ │ ldr r1, [r0, #4] │ │ @@ -1183696,15 +1183695,15 @@ │ │ bcs 23cd480 │ │ mov r0, #1 │ │ pop {r4, r5, fp, pc} │ │ mov r0, r4 │ │ bl 23642f4 │ │ mov r0, #1 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 7, cr15, [r6, #348]! @ 0x15c │ │ + stc2l 7, cr15, [r6, #528]! @ 0x210 │ │ ldr r2, [r0, #16] │ │ ldr r1, [r0, #20] │ │ cmp r2, r1 │ │ bcs 23cd4bc │ │ ldr r3, [r2, #4] │ │ cmn r3, #13 │ │ ldreq r2, [r2] │ │ @@ -1183719,15 +1183718,15 @@ │ │ ldr r0, [r2, #24] │ │ mvn r3, #13 │ │ ldr r2, [r2, #44] @ 0x2c │ │ sub r2, r0, r2 │ │ mov r0, #1 │ │ strd r2, [r1, #-8] │ │ bx lr │ │ - stc2l 6, cr15, [r6, #844]! @ 0x34c │ │ + stc2l 7, cr15, [r6] │ │ push {r4, r5, r6, r7, r8, lr} │ │ ldrd r2, [r0, #16] │ │ mov r4, r0 │ │ mov r7, #0 │ │ mov r1, #1 │ │ cmp r2, r3 │ │ bcs 23cd524 │ │ @@ -1183828,16 +1183827,16 @@ │ │ ldrd r2, [r4, #16] │ │ mov r1, #2 │ │ b 23cd528 │ │ mov r0, r4 │ │ bl 23642f4 │ │ mov r0, #1 │ │ pop {r4, r5, r6, r7, r8, pc} │ │ - stc2l 13, cr8, [r7, #428]! @ 0x1ac │ │ - stc2l 7, cr5, [r4, #252]! @ 0xfc │ │ + stc2l 13, cr8, [r7, #608]! @ 0x260 │ │ + stc2l 7, cr5, [r4, #432]! @ 0x1b0 │ │ push {r4, r5, fp, lr} │ │ mov r1, #1 │ │ mov r4, r0 │ │ bl 23bf488 │ │ ldr r5, [r4, #20] │ │ mov r1, r0 │ │ add r0, r5, #8 │ │ @@ -1183890,15 +1183889,15 @@ │ │ strb r1, [r0, #533] @ 0x215 │ │ bx lr │ │ push {fp, lr} │ │ mov fp, sp │ │ ldr r1, [pc, #4] @ 23cd790 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 4, cr11, [r6, #644]! @ 0x284 │ │ + stc2l 4, cr11, [r6, #824]! @ 0x338 │ │ │ │ 023cd794 : │ │ mov r3, r2 │ │ mov r2, #8 │ │ cmp r3, #8 │ │ bhi 23cd7b0 │ │ cmp r3, #0 │ │ @@ -1183937,15 +1183936,15 @@ │ │ b 270c0c0 │ │ ldr r1, [pc, #16] @ 23cd83c │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0d0 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 13, cr6, [r7, #884]! @ 0x374 │ │ + stc2l 14, cr6, [r7, #40]! @ 0x28 │ │ │ │ 023cd840 : │ │ b 270c0f0 │ │ │ │ 023cd844 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ @@ -1184092,17 +1184091,17 @@ │ │ bl 270c130 │ │ mov r0, r4 │ │ mov r1, r7 │ │ bl 270c0d0 │ │ mov r0, r6 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 3, cr13, [r6, #648]! @ 0x288 │ │ - stc2l 15, cr8, [r6, #416]! @ 0x1a0 │ │ - stc2l 1, cr3, [r6, #784]! @ 0x310 │ │ + stc2l 3, cr13, [r6, #828]! @ 0x33c │ │ + stc2l 15, cr8, [r6, #596]! @ 0x254 │ │ + stc2l 1, cr3, [r6, #964]! @ 0x3c4 │ │ nop {0} │ │ nop {0} │ │ nop {0} │ │ │ │ 023cdaa0 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ @@ -1184565,15 +1184564,15 @@ │ │ str r0, [r1, #244] @ 0xf4 │ │ bx lr │ │ push {fp, lr} │ │ mov fp, sp │ │ ldr r1, [pc, #4] @ 23ce1bc │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 10, cr10, [r6, #600]! @ 0x258 @ │ │ + stc2l 10, cr10, [r6, #780]! @ 0x30c @ │ │ │ │ 023ce1c0 : │ │ cmp r0, #0 │ │ ldrne r0, [r0, #288] @ 0x120 │ │ moveq r0, #0 │ │ bx lr │ │ │ │ @@ -1184711,15 +1184710,15 @@ │ │ mov r1, #29 │ │ add r3, pc, r3 │ │ bl 270c130 │ │ mov r0, #1 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldc2l 14, cr9, [r0, #352]! @ 0x160 │ │ - stc2l 7, cr14, [r6, #856]! @ 0x358 │ │ + vcmla.f16 d30, d6, d3, #270 │ │ │ │ 023ce3e8 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, #0 │ │ cmp r0, #0 │ │ beq 23ce414 │ │ @@ -1184734,39 +1184733,39 @@ │ │ ldr r1, [pc, #20] @ 23ce438 │ │ mov r0, r5 │ │ add r1, pc, r1 │ │ bl 270c0d0 │ │ mov r4, #0 │ │ mov r0, r4 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 14, cr7, [r7, #640]! @ 0x280 │ │ + stc2l 14, cr7, [r7, #820]! @ 0x334 │ │ │ │ 023ce43c : │ │ ldr r0, [pc, #4] @ 23ce448 │ │ add r0, pc, r0 │ │ bx lr │ │ - stc2l 12, cr2, [r5, #924]! @ 0x39c │ │ + stc2l 13, cr2, [r5, #80]! @ 0x50 │ │ │ │ 023ce44c : │ │ ldr r0, [pc, #4] @ 23ce458 │ │ add r0, pc, r0 │ │ bx lr │ │ - stc2l 7, cr2, [r6, #880]! @ 0x370 │ │ + vcmla.f16 d18, d6, d9, #270 │ │ │ │ 023ce45c : │ │ ldr r0, [pc, #4] @ 23ce468 │ │ add r0, pc, r0 │ │ bx lr │ │ - stc2l 7, cr2, [r6, #816]! @ 0x330 │ │ + stc2l 7, cr2, [r6, #996]! @ 0x3e4 │ │ │ │ 023ce46c : │ │ ldr r0, [pc, #4] @ 23ce478 │ │ add r0, pc, r0 │ │ bx lr │ │ - stc2l 14, cr7, [r7, #448]! @ 0x1c0 │ │ + stc2l 14, cr7, [r7, #628]! @ 0x274 │ │ nop {0} │ │ │ │ 023ce480 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ cmp r1, #0 │ │ beq 23ce584 │ │ @@ -1184921,15 +1184920,15 @@ │ │ ldr r1, [r2, r1, lsl #2] │ │ str r1, [r0, #348] @ 0x15c │ │ bx lr │ │ ldr r1, [pc, #8] @ 23ce6d4 │ │ add r1, pc, r1 │ │ str r1, [r0, #348] @ 0x15c │ │ bx lr │ │ - stc2l 7, cr14, [r4, #688]! @ 0x2b0 │ │ + stc2l 7, cr14, [r4, #868]! @ 0x364 │ │ eorseq ip, r5, r0, lsr r1 │ │ nop {0} │ │ │ │ 023ce6e0 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ movw r3, #16831 @ 0x41bf │ │ @@ -1185022,18 +1185021,18 @@ │ │ b 270c220 │ │ andeq r0, r0, r0 │ │ rscsmi r6, r8, r0, lsl #20 │ │ @ instruction: 0xffc00000 │ │ ldrshmi pc, [pc, #255] @ 23ce95b @ │ │ andeq r0, r0, r0 │ │ mvngt r0, r0 │ │ - stc2l 10, cr2, [r5, #1000]! @ 0x3e8 @ │ │ + stc2l 11, cr2, [r5, #156]! @ 0x9c @ │ │ stc2l 14, cr13, [r7, #264]! @ 0x108 │ │ - stc2l 1, cr6, [r6, #596]! @ 0x254 │ │ - stc2l 4, cr4, [r4, #784]! @ 0x310 │ │ + stc2l 1, cr6, [r6, #776]! @ 0x308 │ │ + stc2l 4, cr4, [r4, #964]! @ 0x3c4 │ │ │ │ 023ce870 : │ │ ldrsh r2, [r1, #114] @ 0x72 │ │ ldr r3, [r1, #8] │ │ cmn r2, #1 │ │ ble 23ce8b0 │ │ movw r0, #63483 @ 0xf7fb │ │ @@ -1185205,17 +1185204,17 @@ │ │ ldrh r0, [r4, #74] @ 0x4a │ │ ldr r1, [pc, #24] @ 23ceb2c │ │ orr r0, r0, #32768 @ 0x8000 │ │ strh r0, [r4, #74] @ 0x4a │ │ add r1, pc, r1 │ │ mov r0, r8 │ │ bl 270c0b0 │ │ - stc2l 6, cr8, [r5, #804]! @ 0x324 │ │ - stc2l 7, cr2, [r5, #300]! @ 0x12c │ │ - stc2l 0, cr4, [r6, #768]! @ 0x300 │ │ + stc2l 6, cr8, [r5, #984]! @ 0x3d8 │ │ + stc2l 7, cr2, [r5, #480]! @ 0x1e0 │ │ + stc2l 0, cr4, [r6, #948]! @ 0x3b4 │ │ ldc2l 6, cr9, [r0, #944]! @ 0x3b0 │ │ nop {0} │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d12} │ │ sub sp, sp, #72 @ 0x48 │ │ @@ -1186246,17 +1186245,17 @@ │ │ bl 270c0b0 │ │ andeq r0, r0, r0 │ │ rscsmi r6, r8, r0, lsl #20 │ │ @ instruction: 0xffc00000 │ │ ldrshmi pc, [pc, #255] @ 23cfc5b @ │ │ andeq r0, r0, r0 │ │ mvngt r0, r0 │ │ - stc2l 6, cr7, [r5, #756]! @ 0x2f4 │ │ - stc2l 10, cr11, [r5, #632]! @ 0x278 @ │ │ - stc2l 0, cr3, [r6, #608]! @ 0x260 │ │ + stc2l 6, cr7, [r5, #936]! @ 0x3a8 │ │ + stc2l 10, cr11, [r5, #812]! @ 0x32c @ │ │ + stc2l 0, cr3, [r6, #788]! @ 0x314 │ │ ldc2l 10, cr8, [r0, #864]! @ 0x360 @ │ │ │ │ 023cfb70 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ mov r4, r2 │ │ @@ -1186384,23 +1186383,23 @@ │ │ rscsmi r6, r8, r0, lsl #20 │ │ andeq r0, r0, r0 │ │ rscmi r3, r6, r0, ror #3 │ │ @ instruction: 0xffc00000 │ │ ldrshmi pc, [pc, #255] @ 23cfe7b @ │ │ andeq r0, r0, r0 │ │ mvngt r0, r0 │ │ - stc2l 12, cr2, [r7, #552]! @ 0x228 │ │ - stc2l 8, cr9, [r4, #604]! @ 0x25c │ │ - stc2l 10, cr2, [r7, #872]! @ 0x368 @ │ │ - stc2l 4, cr7, [r5, #160]! @ 0xa0 │ │ - stc2l 0, cr11, [r6, #676]! @ 0x2a4 │ │ + stc2l 12, cr2, [r7, #732]! @ 0x2dc │ │ + vcmla.f16 , q10, q2, #270 │ │ + stc2l 11, cr2, [r7, #28]! @ │ │ + stc2l 4, cr7, [r5, #340]! @ 0x154 │ │ + stc2l 0, cr11, [r6, #856]! @ 0x358 │ │ ldc2l 5, cr8, [r0, #496]! @ 0x1f0 │ │ stc2l 6, cr14, [r7, #284]! @ 0x11c │ │ ldc2l 5, cr8, [r0, #224]! @ 0xe0 │ │ - stc2l 0, cr3, [r4, #208]! @ 0xd0 │ │ + stc2l 0, cr3, [r4, #388]! @ 0x184 │ │ ldc2l 4, cr8, [r0, #336]! @ 0x150 │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #224 @ 0xe0 │ │ mov r5, r1 │ │ cmp r1, #0 │ │ mov r9, r0 │ │ @@ -1186526,17 +1186525,17 @@ │ │ cmp r0, #95 @ 0x5f │ │ strb r3, [r2, #4] │ │ movcc r4, ip │ │ strb r1, [r2, #3] │ │ strb r4, [r2, #1] │ │ add r2, r6, #8 │ │ b 23cff0c │ │ - stc2l 11, cr4, [r6, #816]! @ 0x330 @ │ │ - stc2l 3, cr10, [r7, #852]! @ 0x354 │ │ - stc2l 2, cr15, [r4, #280]! @ 0x118 │ │ + stc2l 11, cr4, [r6, #996]! @ 0x3e4 @ │ │ + stc2l 4, cr10, [r7, #8]! │ │ + stc2l 2, cr15, [r4, #460]! @ 0x1cc │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ ldr lr, [r1, #24] │ │ mov ip, r0 │ │ ldr r3, [r0, #24] │ │ mov r0, #0 │ │ sub r4, lr, r2 │ │ @@ -1186625,16 +1186624,16 @@ │ │ add ip, pc, ip │ │ str ip, [sp] │ │ bl 23cfda8 │ │ mov ip, #0 │ │ mov r0, ip │ │ mov sp, fp │ │ pop {fp, pc} │ │ - stc2l 12, cr14, [r6, #380]! @ 0x17c │ │ - stc2l 15, cr8, [r5, #708]! @ 0x2c4 │ │ + stc2l 12, cr14, [r6, #560]! @ 0x230 │ │ + stc2l 15, cr8, [r5, #888]! @ 0x378 │ │ │ │ 023d0144 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ ldr r6, [fp, #8] │ │ ldr r7, [r6] │ │ @@ -1186829,30 +1186828,30 @@ │ │ b 23d0180 │ │ ldr r3, [pc, #68] @ 23d0498 │ │ add r3, pc, r3 │ │ str r3, [sp] │ │ movw r3, #28267 @ 0x6e6b │ │ movt r3, #27753 @ 0x6c69 │ │ b 23d01d0 │ │ - stc2l 10, cr2, [r6, #460]! @ 0x1cc @ │ │ - stc2l 14, cr10, [r5, #788]! @ 0x314 │ │ - stc2l 10, cr8, [r6, #704]! @ 0x2c0 @ │ │ - stc2l 9, cr4, [r4, #496]! @ 0x1f0 @ │ │ - stc2l 2, cr9, [r4, #260]! @ 0x104 │ │ - stc2l 9, cr8, [r6, #296]! @ 0x128 @ │ │ + stc2l 10, cr2, [r6, #640]! @ 0x280 @ │ │ + stc2l 14, cr10, [r5, #968]! @ 0x3c8 │ │ + stc2l 10, cr8, [r6, #884]! @ 0x374 @ │ │ + stc2l 10, cr4, [r4, #148]! @ 0x94 @ │ │ + stc2l 2, cr9, [r4, #440]! @ 0x1b8 │ │ + stc2l 9, cr8, [r6, #386]! @ 0x182 @ │ │ ldc2l 15, cr7, [r0, #160]! @ 0xa0 │ │ stc2l 3, cr12, [r7, #880]! @ 0x370 │ │ - stc2l 11, cr12, [r4, #720]! @ 0x2d0 @ │ │ - stc2l 13, cr12, [r5, #832]! @ 0x340 │ │ - stc2l 12, cr14, [r5, #660]! @ 0x294 │ │ + stc2l 11, cr12, [r4, #900]! @ 0x384 @ │ │ + stc2l 13, cr12, [r5, #1012]! @ 0x3f4 │ │ + stc2l 12, cr14, [r5, #840]! @ 0x348 │ │ stc2l 10, cr15, [r7, #944]! @ 0x3b0 @ │ │ - stc2l 11, cr0, [r6, #368]! @ 0x170 @ │ │ - stc2l 12, cr10, [r5] │ │ - stc2l 13, cr9, [r7, #836]! @ 0x344 │ │ - stc2l 7, cr4, [r4, #804]! @ 0x324 │ │ + stc2l 11, cr0, [r6, #548]! @ 0x224 @ │ │ + stc2l 12, cr10, [r5, #180]! @ 0xb4 │ │ + stc2l 13, cr9, [r7, #1016]! @ 0x3f8 │ │ + stc2l 7, cr4, [r4, #984]! @ 0x3d8 │ │ │ │ 023d04a4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ mov r5, r3 │ │ ldr r3, [fp, #8] │ │ @@ -1186905,16 +1186904,16 @@ │ │ bl 23cfda8 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, #1 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 9, cr10, [r6, #64]! @ 0x40 @ │ │ - stc2l 15, cr6, [r4, #232]! @ 0xe8 │ │ + stc2l 9, cr10, [r6, #154]! @ 0x9a @ │ │ + stc2l 15, cr6, [r4, #412]! @ 0x19c │ │ │ │ 023d0594 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ ldr r7, [r0, #716] @ 0x2cc │ │ str r3, [sp, #4] │ │ @@ -1187026,17 +1187025,17 @@ │ │ mov r0, r6 │ │ ldr r2, [r8, #64] @ 0x40 │ │ rev r2, r2 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 270c280 │ │ ldc2l 3, cr8, [r0, #752]! @ 0x2f0 │ │ - stc2l 4, cr12, [r6, #540]! @ 0x21c │ │ - stc2l 1, cr2, [r7, #108]! @ 0x6c │ │ - stc2l 9, cr8, [r5, #498]! @ 0x1f2 @ │ │ + stc2l 4, cr12, [r6, #720]! @ 0x2d0 │ │ + stc2l 1, cr2, [r7, #288]! @ 0x120 │ │ + stc2l 10, cr8, [r5, #152]! @ 0x98 @ │ │ │ │ 023d0774 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ ldrsh r7, [r1, #74] @ 0x4a │ │ mov r4, #0 │ │ @@ -1187073,15 +1187072,15 @@ │ │ mov r2, r9 │ │ mov r3, #0 │ │ bl 270c2c0 │ │ mov r4, #1 │ │ mov r0, r4 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - stc2l 5, cr14, [r6, #764]! @ 0x2fc │ │ + stc2l 5, cr14, [r6, #944]! @ 0x3b0 │ │ │ │ 023d0820 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ ldrb r1, [r0, #777] @ 0x309 │ │ cmp r1, #0 │ │ @@ -1187257,15 +1187256,15 @@ │ │ andeq r0, r0, r0 │ │ rscmi r0, r0, r0 │ │ andeq r0, r0, r0 │ │ mvngt r0, r0 │ │ @ instruction: 0xffc00000 │ │ ldrshmi pc, [pc, #255] @ 23d0bf3 @ │ │ stc2l 11, cr11, [r7, #696]! @ 0x2b8 @ │ │ - stc2l 6, cr6, [r5, #860]! @ 0x35c │ │ + stc2l 7, cr6, [r5, #16]! │ │ │ │ 023d0af8 : │ │ cmp r3, #0 │ │ moveq r0, #0 │ │ bxeq lr │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ @@ -1187463,30 +1187462,30 @@ │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0d0 │ │ ldr r1, [pc, #68] @ 23d0e58 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 0, cr4, [r4, #132]! @ 0x84 │ │ - stc2l 2, cr12, [r4, #908]! @ 0x38c │ │ + stc2l 0, cr4, [r4, #312]! @ 0x138 │ │ + stc2l 3, cr12, [r4, #64]! @ 0x40 │ │ stc2l 10, cr11, [r7, #688]! @ 0x2b0 @ │ │ - stc2l 0, cr4, [r4, #100]! @ 0x64 │ │ - stc2l 0, cr14, [r6, #920]! @ 0x398 │ │ - stc2l 6, cr10, [r4, #392]! @ 0x188 │ │ - stc2l 3, cr14, [r5, #644]! @ 0x284 │ │ - stc2l 0, cr10, [r6, #360]! @ 0x168 │ │ - stc2l 2, cr12, [r4, #92]! @ 0x5c │ │ - stc2l 15, cr1, [r6, #36]! @ 0x24 │ │ - stc2l 15, cr1, [r6, #104]! @ 0x68 │ │ - stc2l 3, cr14, [r4, #844]! @ 0x34c │ │ - stc2l 3, cr8, [r5, #224]! @ 0xe0 │ │ - stc2l 6, cr6, [r4, #856]! @ 0x358 │ │ - stc2l 13, cr11, [r6, #660]! @ 0x294 │ │ - stc2l 14, cr1, [r6, #364]! @ 0x16c │ │ + stc2l 0, cr4, [r4, #280]! @ 0x118 │ │ + stc2l 1, cr14, [r6, #76]! @ 0x4c │ │ + stc2l 6, cr10, [r4, #572]! @ 0x23c │ │ + stc2l 3, cr14, [r5, #824]! @ 0x338 │ │ + stc2l 0, cr10, [r6, #540]! @ 0x21c │ │ + stc2l 2, cr12, [r4, #272]! @ 0x110 │ │ + stc2l 15, cr1, [r6, #216]! @ 0xd8 │ │ + stc2l 15, cr1, [r6, #284]! @ 0x11c │ │ + stc2l 4, cr14, [r4] │ │ + stc2l 3, cr8, [r5, #404]! @ 0x194 │ │ + stc2l 7, cr6, [r4, #12]! │ │ + stc2l 13, cr11, [r6, #840]! @ 0x348 │ │ + stc2l 14, cr1, [r6, #544]! @ 0x220 │ │ │ │ 023d0e5c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ ldr ip, [r3] │ │ ldr lr, [r2] │ │ cmp ip, r1 │ │ @@ -1188044,15 +1188043,15 @@ │ │ mov r4, ip │ │ beq 23d16b0 │ │ b 23d1670 │ │ ldr r0, [sp] │ │ ldr r1, [pc, #4] @ 23d1718 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 11, cr4, [r7, #1020]! @ 0x3fc @ │ │ + stc2l 12, cr4, [r7, #176]! @ 0xb0 │ │ │ │ 023d171c : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #16 │ │ cmp r2, #13 │ │ bcc 23d1990 │ │ @@ -1188207,15 +1188206,15 @@ │ │ mov r0, #0 │ │ strb r0, [r1] │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ ldr r1, [pc, #4] @ 23d199c │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 9, cr4, [r7, #246]! @ 0xf6 @ │ │ + stc2l 9, cr4, [r7, #336]! @ 0x150 @ │ │ │ │ 023d19a0 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ vmov.f64 d16, #96 @ 0x3f000000 0.5 │ │ mov r4, r0 │ │ vldr d17, [pc, #72] @ 23d1a00 │ │ @@ -1188292,15 +1188291,15 @@ │ │ mov r0, ip │ │ pop {r4, sl, fp, pc} │ │ nop {0} │ │ @ instruction: 0xffc00000 │ │ ldrshmi pc, [pc, #255] @ 23d1bdb @ │ │ andeq r0, r0, r0 │ │ mvngt r0, r0 │ │ - stc2l 4, cr11, [r4, #248]! @ 0xf8 │ │ + stc2l 4, cr11, [r4, #428]! @ 0x1ac │ │ nop {0} │ │ │ │ 023d1ae8 : │ │ push {fp, lr} │ │ mov fp, sp │ │ vmov s0, r0 │ │ vldr d17, [pc, #76] @ 23d1b48 │ │ @@ -1189378,15 +1189377,15 @@ │ │ mvngt r0, r0 │ │ @ instruction: 0xffc00000 │ │ ldrshmi pc, [pc, #255] @ 23d2c8b @ │ │ andcs r0, r0, r0 │ │ andmi sl, r2, #95 @ 0x5f │ │ andeq r0, r0, r0 │ │ rsbmi lr, pc, r0 │ │ - stc2l 0, cr9, [r5, #768]! @ 0x300 │ │ + stc2l 0, cr9, [r5, #948]! @ 0x3b4 │ │ nop {0} │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d11} │ │ sub sp, sp, #16 │ │ mov r4, r2 │ │ @@ -1189923,16 +1189922,16 @@ │ │ bl 270aba0 │ │ ldr r1, [r5] │ │ mov r0, #10 │ │ bl 270abb0 │ │ mov r0, r4 │ │ mov r1, #1 │ │ bl 270c440 │ │ - stc2l 12, cr11, [r5, #500]! @ 0x1f4 │ │ - vcmla.f16 d17, d20, d16, #270 │ │ + stc2l 12, cr11, [r5, #680]! @ 0x2a8 │ │ + vcmla.f16 , q10, , #270 │ │ eorseq r4, r6, r0, ror r9 │ │ │ │ 023d3408 : │ │ mov ip, r2 │ │ cmp r0, #0 │ │ beq 23d3440 │ │ cmp ip, r1 │ │ @@ -1190039,15 +1190038,15 @@ │ │ moveq r3, #0 │ │ strbeq ip, [r1, #-1]! │ │ mov r7, #5 │ │ movne r3, r5 │ │ b 23d34c0 │ │ mov r0, r1 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 4, cr5, [r4, #936]! @ 0x3a8 │ │ + stc2l 5, cr5, [r4, #92]! @ 0x5c │ │ │ │ 023d35c0 : │ │ cmp r0, #0 │ │ beq 23d36cc │ │ ldrb r3, [r1] │ │ mov r2, #0 │ │ cmp r3, #35 @ 0x23 │ │ @@ -1190124,15 +1190123,15 @@ │ │ mov r1, r3 │ │ ldr r0, [r4] │ │ bl 270aba0 │ │ ldr r1, [r4] │ │ mov r0, #10 │ │ pop {r4, sl, fp, lr} │ │ b 270abb0 │ │ - stc2l 6, cr15, [r3, #240]! @ 0xf0 │ │ + stc2l 6, cr15, [r3, #420]! @ 0x1a4 │ │ eorseq r4, r6, r0, ror #12 │ │ │ │ 023d3710 : │ │ sub r3, r1, #1 │ │ cmp r3, #7 │ │ bxhi lr │ │ push {fp, lr} │ │ @@ -1190276,15 +1190275,15 @@ │ │ strb lr, [r0, r2] │ │ bhi 23d3920 │ │ ldrb lr, [r3, r2] │ │ mov r2, r4 │ │ cmp lr, #0 │ │ bne 23d3934 │ │ b 23d3920 │ │ - stc2l 1, cr5, [r4, #728]! @ 0x2d8 │ │ + stc2l 1, cr5, [r4, #908]! @ 0x38c │ │ │ │ 023d395c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ add r4, sp, #16 │ │ vmov.i32 q8, #0 @ 0x00000000 │ │ @@ -1190414,15 +1190413,15 @@ │ │ strb ip, [r0, r2] │ │ bhi 23d3b40 │ │ ldrb ip, [r3, r2] │ │ mov r2, r4 │ │ cmp ip, #0 │ │ bne 23d3b54 │ │ b 23d3b40 │ │ - stc2l 15, cr4, [r4, #792]! @ 0x318 │ │ + stc2l 15, cr4, [r4, #972]! @ 0x3cc │ │ │ │ 023d3b7c : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #192 @ 0xc0 │ │ ldr lr, [pc, #244] @ 23d3c84 │ │ mov ip, r1 │ │ @@ -1190483,15 +1190482,15 @@ │ │ cmp r8, #191 @ 0xbf │ │ bcc 23d3bb0 │ │ mov r2, #0 │ │ strb r2, [r1, r8] │ │ bl 270c0d0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - stc2l 4, cr7, [r5, #1000]! @ 0x3e8 │ │ + stc2l 5, cr7, [r5, #156]! @ 0x9c │ │ │ │ 023d3c88 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #216 @ 0xd8 │ │ mov r2, r1 │ │ ldrb r3, [r0, #314] @ 0x13a │ │ @@ -1190547,15 +1190546,15 @@ │ │ ldr r0, [r4] │ │ bl 270aba0 │ │ ldr r1, [r4] │ │ mov r0, #10 │ │ sub sp, fp, #8 │ │ pop {r4, r5, fp, lr} │ │ b 270abb0 │ │ - stc2l 15, cr14, [r3, #832]! @ 0x340 │ │ + stc2l 15, cr14, [r3, #1012]! @ 0x3f4 │ │ ldrshteq r3, [r6], -r4 │ │ │ │ 023d3d7c : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #216 @ 0xd8 │ │ mov r2, r1 │ │ @@ -1190842,16 +1190841,16 @@ │ │ str r7, [r5, #264] @ 0x108 │ │ str r1, [r0, #256] @ 0x100 │ │ mov r0, r4 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldr r1, [pc, #8] @ 23d41dc │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 3, cr3, [r4, #512]! @ 0x200 │ │ - stc2l 2, cr5, [r4, #664]! @ 0x298 │ │ + stc2l 3, cr3, [r4, #692]! @ 0x2b4 │ │ + stc2l 2, cr5, [r4, #844]! @ 0x34c │ │ │ │ 023d41e0 : │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #256 @ 0x100 │ │ @@ -1191903,15 +1191902,15 @@ │ │ push {fp, lr} │ │ mov fp, sp │ │ ldr r1, [pc, #12] @ 23d50f4 │ │ add r1, pc, r1 │ │ bl 270c0d0 │ │ mov r0, #0 │ │ pop {fp, pc} │ │ - stc2l 12, cr9, [r6, #516]! @ 0x204 │ │ + stc2l 12, cr9, [r6, #696]! @ 0x2b8 │ │ │ │ 023d50f8 : │ │ mov ip, r0 │ │ mov r0, #0 │ │ cmp ip, #0 │ │ bxeq lr │ │ cmp r1, #0 │ │ @@ -1192110,16 +1192109,16 @@ │ │ str r0, [sp] │ │ mov r0, r4 │ │ bl 270c350 │ │ str r0, [r6] │ │ mov r0, #16384 @ 0x4000 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 13, cr9, [r4, #600]! @ 0x258 │ │ - stc2l 15, cr0, [r7, #324]! @ 0x144 │ │ + stc2l 13, cr9, [r4, #780]! @ 0x30c │ │ + stc2l 15, cr0, [r7, #504]! @ 0x1f8 │ │ │ │ 023d5408 : │ │ mov ip, r0 │ │ mov r0, #0 │ │ cmp ip, #0 │ │ bxeq lr │ │ cmp r1, #0 │ │ @@ -1192447,15 +1192446,15 @@ │ │ bl 26fe344 │ │ mov r0, r6 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ ldr r1, [pc, #8] @ 23d5894 │ │ mov r0, r5 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 13, cr14, [r4, #984]! @ 0x3d8 │ │ + stc2l 14, cr14, [r4, #140]! @ 0x8c │ │ │ │ 023d5898 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ beq 23d58cc │ │ mov r4, r0 │ │ @@ -1192473,15 +1192472,15 @@ │ │ bl 2701920 │ │ cmp r0, #0 │ │ popne {r4, sl, fp, pc} │ │ ldr r1, [pc, #8] @ 23d58f4 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 13, cr14, [r4, #600]! @ 0x258 │ │ + stc2l 13, cr14, [r4, #780]! @ 0x30c │ │ │ │ 023d58f8 : │ │ cmp r1, #0 │ │ moveq r0, #0 │ │ bxeq lr │ │ cmp r0, #0 │ │ ldrne r2, [r0, #800] @ 0x320 │ │ @@ -1192512,15 +1192511,15 @@ │ │ bx lr │ │ bx r2 │ │ push {fp, lr} │ │ mov fp, sp │ │ ldr r1, [pc, #4] @ 23d5980 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 3, cr13, [r5, #36]! @ 0x24 │ │ + stc2l 3, cr13, [r5, #216]! @ 0xd8 │ │ │ │ 023d5984 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ cmp r2, #0 │ │ bmi 23d5a5c │ │ cmp r3, #1 │ │ @@ -1192592,15 +1192591,15 @@ │ │ popne {r4, sl, fp, pc} │ │ ldr r1, [pc, #16] @ 23d5ab0 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - stc2l 1, cr7, [r6, #272]! @ 0x110 │ │ + stc2l 1, cr7, [r6, #452]! @ 0x1c4 │ │ │ │ 023d5ab4 : │ │ mov r2, r0 │ │ mov r0, #0 │ │ cmp r2, #0 │ │ bxeq lr │ │ push {r4, sl, fp, lr} │ │ @@ -1192625,15 +1192624,15 @@ │ │ ldr r1, [pc, #20] @ 23d5b2c │ │ mov r0, r2 │ │ add r1, pc, r1 │ │ bl 270c0d0 │ │ mov r0, #0 │ │ pop {r4, sl, fp, lr} │ │ bx lr │ │ - stc2l 11, cr14, [r4, #424]! @ 0x1a8 @ │ │ + stc2l 11, cr14, [r4, #604]! @ 0x25c @ │ │ │ │ 023d5b30 : │ │ cmp r0, #0 │ │ cmpne r1, #0 │ │ bxeq lr │ │ mov r0, r1 │ │ b 27018e0 │ │ @@ -1193005,17 +1193004,17 @@ │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ ldr r1, [pc, #16] @ 23d60f4 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 11, cr2, [r7, #792]! @ 0x318 @ │ │ - stc2l 0, cr7, [r5, #552]! @ 0x228 │ │ - stc2l 0, cr1, [r5, #980]! @ 0x3d4 │ │ + stc2l 11, cr2, [r7, #972]! @ 0x3cc @ │ │ + stc2l 0, cr7, [r5, #732]! @ 0x2dc │ │ + stc2l 1, cr1, [r5, #136]! @ 0x88 │ │ │ │ 023d60f8 : │ │ cmp r0, #0 │ │ bxeq lr │ │ ldrb r2, [r0, #312] @ 0x138 │ │ tst r2, #64 @ 0x40 │ │ bne 23d6130 │ │ @@ -1193027,27 +1193026,27 @@ │ │ mov r0, r4 │ │ mov r1, r5 │ │ pop {r4, r5, fp, lr} │ │ b 270c6e0 │ │ ldr r1, [pc, #4] @ 23d613c │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 0, cr9, [r4, #132]! @ 0x84 │ │ + stc2l 0, cr9, [r4, #312]! @ 0x138 │ │ │ │ 023d6140 : │ │ cmp r0, #0 │ │ bxeq lr │ │ ldrb r1, [r0, #312] @ 0x138 │ │ tst r1, #64 @ 0x40 │ │ bne 23d6158 │ │ b 270c6d0 │ │ ldr r1, [pc, #4] @ 23d6164 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 0, cr1, [r5, #600]! @ 0x258 │ │ + stc2l 0, cr1, [r5, #780]! @ 0x30c │ │ │ │ 023d6168 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #16 │ │ cmp r0, #0 │ │ beq 23d6580 │ │ @@ -1193319,17 +1193318,17 @@ │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldr r1, [pc, #8] @ 23d65b8 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ stc2l 9, cr9, [r7, #130]! @ 0x82 @ │ │ - stc2l 7, cr12, [r4, #1016]! @ 0x3f8 │ │ - stc2l 6, cr10, [r6, #388]! @ 0x184 │ │ - stc2l 10, cr6, [r4, #380]! @ 0x17c @ │ │ + vcmla.f16 d28, d4, d27, #270 │ │ + stc2l 6, cr10, [r6, #568]! @ 0x238 │ │ + stc2l 10, cr6, [r4, #560]! @ 0x230 @ │ │ │ │ 023d65c8 : │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ cmp r1, #0 │ │ @@ -1193433,16 +1193432,16 @@ │ │ bl 270c6f0 │ │ subs r7, r7, #1 │ │ bne 23d674c │ │ b 23d6730 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ bx lr │ │ - stc2l 10, cr0, [r5, #888]! @ 0x378 @ │ │ - stc2l 12, cr15, [r6, #356]! @ 0x164 │ │ + stc2l 11, cr0, [r5, #44]! @ 0x2c @ │ │ + stc2l 12, cr15, [r6, #536]! @ 0x218 │ │ │ │ 023d677c : │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ @@ -1193760,17 +1193759,17 @@ │ │ mov r1, r4 │ │ mov r2, r7 │ │ mov r3, #0 │ │ b 23d68d4 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ bx lr │ │ - stc2l 13, cr0, [r4, #116]! @ 0x74 │ │ - stc2l 11, cr2, [r4, #868]! @ 0x364 @ │ │ - vcmla.f16 d20, d21, d16, #270 │ │ + stc2l 13, cr0, [r4, #296]! @ 0x128 │ │ + stc2l 12, cr2, [r4, #24]! │ │ + vcmla.f16 q10, , , #270 │ │ │ │ 023d6c94 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ cmp r0, #0 │ │ ldrne r4, [r0] │ │ movne r5, r0 │ │ @@ -1194024,16 +1194023,16 @@ │ │ orr r0, r0, #64 @ 0x40 │ │ str r0, [r5, #244] @ 0xf4 │ │ b 23d6f64 │ │ ldr r1, [pc, #12] @ 23d7094 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 2, cr8, [r4, #100]! @ 0x64 │ │ - stc2l 12, cr11, [r3, #684]! @ 0x2ac │ │ + stc2l 2, cr8, [r4, #280]! @ 0x118 │ │ + stc2l 12, cr11, [r3, #864]! @ 0x360 │ │ │ │ 023d7098 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ beq 23d70f4 │ │ ldr r2, [r0, #4] │ │ @@ -1194062,16 +1194061,16 @@ │ │ pop {r4, r5, fp, lr} │ │ b 270c430 │ │ ldr r1, [pc, #12] @ 23d7120 │ │ add r1, pc, r1 │ │ pop {r4, r5, fp, lr} │ │ b 270c430 │ │ andeq r0, r0, r8, asr #3 │ │ - stc2l 11, cr13, [r3, #408]! @ 0x198 @ │ │ - stc2l 0, cr8, [r4, #572]! @ 0x23c │ │ + stc2l 11, cr13, [r3, #588]! @ 0x24c @ │ │ + stc2l 0, cr8, [r4, #752]! @ 0x2f0 │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #24 │ │ mov r4, r0 │ │ ldr r0, [r0] │ │ cmp r0, #0 │ │ beq 23d715c │ │ @@ -1194158,19 +1194157,19 @@ │ │ bl 270a230 │ │ ldr r1, [pc, #28] @ 23d72ac │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c430 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 10, cr9, [r5, #752]! @ 0x2f0 @ │ │ + stc2l 10, cr9, [r5, #932]! @ 0x3a4 @ │ │ mlaseq r6, ip, r1, r4 │ │ mlaseq r6, r8, r1, r4 │ │ - stc2l 10, cr1, [r6, #40]! @ 0x28 @ │ │ - stc2l 10, cr9, [r6, #828]! @ 0x33c @ │ │ + stc2l 10, cr1, [r6, #220]! @ 0xdc @ │ │ + stc2l 10, cr9, [r6, #1008]! @ 0x3f0 @ │ │ push {r4, r6, r7, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ ldr r0, [r0] │ │ mov r1, #1 │ │ ldrd r6, [r0] │ │ mov r0, r6 │ │ @@ -1194272,18 +1194271,18 @@ │ │ mov r0, r4 │ │ pop {r4, r5, fp, lr} │ │ b 270c430 │ │ mov r0, r5 │ │ bl 2703030 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 1, cr9, [r5, #168]! @ 0xa8 │ │ + stc2l 1, cr9, [r5, #348]! @ 0x15c │ │ @ instruction: 0xfffffea8 │ │ - stc2l 15, cr13, [r4, #456]! @ 0x1c8 │ │ - stc2l 13, cr2, [r7, #868]! @ 0x364 │ │ + stc2l 15, cr13, [r4, #636]! @ 0x27c │ │ + stc2l 14, cr2, [r7, #24]! │ │ │ │ 023d7470 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ cmp r0, #0 │ │ beq 23d7508 │ │ mov r6, r1 │ │ @@ -1194320,16 +1194319,16 @@ │ │ str r4, [r3, #288] @ 0x120 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ b 270c4e0 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ andeq r0, r0, r8, lsr r0 │ │ @ instruction: 0xfffffdc4 │ │ - stc2l 7, cr11, [r5, #996]! @ 0x3e4 │ │ - stc2l 11, cr7, [r5, #648]! @ 0x288 @ │ │ + vcmla.f16 d27, d5, d22, #270 │ │ + stc2l 11, cr7, [r5, #828]! @ 0x33c @ │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ cmp r0, #0 │ │ beq 23d7584 │ │ ldr r3, [r0, #288] @ 0x120 │ │ cmp r3, #0 │ │ ldrne r6, [r3] │ │ @@ -1194351,16 +1194350,16 @@ │ │ sub r1, r7, r5 │ │ add r0, r4, r5 │ │ strd r0, [r6, #12] │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldr r1, [pc, #4] @ 23d7594 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 9, cr9, [r5, #404]! @ 0x194 @ │ │ - stc2l 8, cr3, [r6, #1008]! @ 0x3f0 │ │ + stc2l 9, cr9, [r5, #494]! @ 0x1ee @ │ │ + stc2l 9, cr3, [r6, #82]! @ 0x52 @ │ │ │ │ 023d759c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #52 @ 0x34 │ │ cmp r0, #0 │ │ beq 23d760c │ │ @@ -1194476,18 +1194475,18 @@ │ │ bl 270c420 │ │ mov r0, r5 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ andeq r0, r0, ip, asr r0 │ │ andeq r1, r0, r0, lsr r5 │ │ strdeq r1, [r0], -r0 │ │ - stc2l 6, cr7, [r6, #800]! @ 0x320 │ │ - stc2l 1, cr1, [r7, #828]! @ 0x33c │ │ - stc2l 2, cr11, [r6, #8]! │ │ - stc2l 11, cr7, [r4, #800]! @ 0x320 @ │ │ + stc2l 6, cr7, [r6, #980]! @ 0x3d4 │ │ + stc2l 1, cr1, [r7, #1008]! @ 0x3f0 │ │ + stc2l 2, cr11, [r6, #188]! @ 0xbc │ │ + stc2l 11, cr7, [r4, #980]! @ 0x3d4 @ │ │ stc2l 12, cr6, [r7, #392]! @ 0x188 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #76 @ 0x4c │ │ ldr r3, [r0] │ │ mov r8, r0 │ │ mov r7, #2 │ │ @@ -1195785,50 +1195784,50 @@ │ │ ldr r0, [sp, #32] │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldrhteq r2, [r6], -r8 │ │ mlaseq r6, r8, r8, r2 │ │ eorseq r2, r6, ip, asr #22 │ │ eorseq r2, r6, ip, lsr #22 │ │ - stc2l 0, cr8, [r6, #796]! @ 0x31c │ │ - stc2l 4, cr4, [r4, #24]! │ │ + stc2l 0, cr8, [r6, #976]! @ 0x3d0 │ │ + stc2l 4, cr4, [r4, #204]! @ 0xcc │ │ eorseq r2, r6, ip, lsl #25 │ │ eorseq r2, r6, r4, ror #20 │ │ eorseq r2, r6, r4, asr #20 │ │ eorseq r3, r6, r8, lsl #7 │ │ eorseq r3, r6, r0, ror #6 │ │ eorseq r3, r6, ip, lsl #5 │ │ eorseq r3, r6, r8, asr r2 │ │ ldrhteq r3, [r6], -r0 │ │ mlaseq r6, r8, r1, r3 │ │ eorseq r3, r6, r8, asr #2 │ │ eorseq r3, r6, r0, lsr r1 │ │ eorseq r3, r6, r8, ror #1 │ │ eorseq r3, r6, r4, asr #4 │ │ eorseq r3, r6, ip, lsr #4 │ │ - stc2l 2, cr10, [r3, #480]! @ 0x1e0 │ │ + stc2l 2, cr10, [r3, #660]! @ 0x294 │ │ ldrhteq r3, [r6], -r4 │ │ mlaseq r6, ip, r5, r3 │ │ eorseq r3, r6, r0, lsr #10 │ │ eorseq r3, r6, r8, lsl #10 │ │ mlaseq r6, r8, r4, r3 │ │ eorseq r3, r6, r0, lsl #9 │ │ - stc2l 4, cr8, [r5, #264]! @ 0x108 │ │ - stc2l 2, cr6, [r6, #796]! @ 0x31c │ │ - stc2l 7, cr8, [r4, #152]! @ 0x98 │ │ - stc2l 14, cr11, [r5, #440]! @ 0x1b8 │ │ - stc2l 1, cr10, [r5, #400]! @ 0x190 │ │ - stc2l 6, cr14, [r4, #832]! @ 0x340 │ │ - stc2l 1, cr10, [r5, #224]! @ 0xe0 │ │ - stc2l 12, cr9, [r6, #664]! @ 0x298 │ │ - stc2l 6, cr6, [r4, #432]! @ 0x1b0 │ │ - stc2l 7, cr2, [r4, #124]! @ 0x7c │ │ - stc2l 4, cr6, [r5, #992]! @ 0x3e0 │ │ - stc2l 9, cr14, [r3, #180]! @ 0xb4 @ │ │ - stc2l 1, cr0, [r6, #624]! @ 0x270 │ │ + stc2l 4, cr8, [r5, #444]! @ 0x1bc │ │ + stc2l 2, cr6, [r6, #976]! @ 0x3d0 │ │ + stc2l 7, cr8, [r4, #332]! @ 0x14c │ │ + stc2l 14, cr11, [r5, #620]! @ 0x26c │ │ + stc2l 1, cr10, [r5, #580]! @ 0x244 │ │ + stc2l 6, cr14, [r4, #1012]! @ 0x3f4 │ │ + stc2l 1, cr10, [r5, #404]! @ 0x194 │ │ + stc2l 12, cr9, [r6, #844]! @ 0x34c │ │ + stc2l 6, cr6, [r4, #612]! @ 0x264 │ │ + stc2l 7, cr2, [r4, #304]! @ 0x130 │ │ + stc2l 5, cr6, [r5, #148]! @ 0x94 │ │ + stc2l 9, cr14, [r3, #270]! @ 0x10e @ │ │ + stc2l 1, cr0, [r6, #804]! @ 0x324 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ ldr r9, [r0] │ │ mov sl, r0 │ │ mov r1, #1 │ │ mov r2, #0 │ │ @@ -1195980,16 +1195979,16 @@ │ │ mov r0, r8 │ │ mov r1, r6 │ │ bl 270c0f0 │ │ mov r0, r5 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stc2l 13, cr15, [pc, #672]! @ 23d91a4 │ │ - stc2l 4, cr6, [r4, #212]! @ 0xd4 │ │ - stc2l 8, cr11, [r6, #112]! @ 0x70 │ │ + stc2l 4, cr6, [r4, #392]! @ 0x188 │ │ + vcmla.f16 , q3, , #270 │ │ andeq r1, r0, ip, lsr #32 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ ldr r1, [r0] │ │ mov r4, r0 │ │ str r1, [sp, #24] │ │ @@ -1196349,21 +1196348,21 @@ │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldr r1, [pc, #36] @ 23d94dc │ │ mov r0, r8 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ stc2l 8, cr15, [pc, #608]! @ 23d9728 │ │ - stc2l 15, cr5, [r4, #100]! @ 0x64 │ │ - stc2l 9, cr15, [r5, #38]! @ 0x26 @ │ │ + stc2l 15, cr5, [r4, #280]! @ 0x118 │ │ + stc2l 9, cr15, [r5, #128]! @ 0x80 @ │ │ andeq r0, r0, ip, lsl pc │ │ muleq r0, ip, r1 │ │ - stc2l 3, cr15, [r6, #984]! @ 0x3d8 │ │ - stc2l 15, cr0, [r7, #804]! @ 0x324 │ │ - stc2l 3, cr9, [r6, #952]! @ 0x3b8 │ │ + stc2l 4, cr15, [r6, #140]! @ 0x8c │ │ + stc2l 15, cr0, [r7, #984]! @ 0x3d8 │ │ + stc2l 4, cr9, [r6, #108]! @ 0x6c │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ ldr r6, [r0] │ │ mov r5, #1 │ │ ldr ip, [fp, #8] │ │ mov r8, r3 │ │ @@ -1196760,16 +1196759,16 @@ │ │ eorseq r1, r6, r8, ror fp │ │ eorseq r1, r6, r8, asr fp │ │ eorseq r1, r6, ip, ror sp │ │ ldrsbteq r1, [r6], -r8 │ │ eorseq r1, r6, r0, asr #23 │ │ mlaseq r6, r8, sl, r1 │ │ eorseq r1, r6, r0, ror sl │ │ - stc2l 5, cr5, [r5, #772]! @ 0x304 │ │ - stc2l 6, cr15, [r4, #292]! @ 0x124 │ │ + stc2l 5, cr5, [r5, #952]! @ 0x3b8 │ │ + stc2l 6, cr15, [r4, #472]! @ 0x1d8 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ mov r4, r0 │ │ mov r5, #0 │ │ mov r8, #115 @ 0x73 │ │ movw r9, #7093 @ 0x1bb5 │ │ @@ -1197003,15 +1197002,15 @@ │ │ ldr r0, [r5] │ │ ldr r0, [r0] │ │ ldr r1, [pc, #12] @ 23d9efc │ │ ldr r0, [r0] │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ eorseq r1, r6, ip, lsr r4 │ │ - stc2l 6, cr13, [r3, #340]! @ 0x154 │ │ + stc2l 6, cr13, [r3, #520]! @ 0x208 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #36 @ 0x24 │ │ str r0, [sp, #24] │ │ mov r2, #1 │ │ ldr r0, [r0] │ │ str r2, [sp, #4] │ │ @@ -1197220,15 +1197219,15 @@ │ │ mov r0, #1 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [pc, #8] @ 23da260 │ │ ldr r0, [sp, #32] │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 10, cr8, [r5, #776]! @ 0x308 @ │ │ + stc2l 10, cr8, [r5, #956]! @ 0x3bc @ │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ str r0, [sp, #32] │ │ mov r2, #1 │ │ ldr r0, [r0] │ │ str r2, [sp, #4] │ │ @@ -1197424,15 +1197423,15 @@ │ │ eorseq r1, r6, r8, lsr #32 │ │ mlaseq r6, ip, lr, r0 │ │ eorseq r0, r6, r0, lsl #29 │ │ eorseq r0, r6, r0, asr #28 │ │ eorseq r0, r6, r4, lsr #28 │ │ eorseq r0, r6, ip, ror #27 │ │ ldrsbteq r0, [r6], -r0 │ │ - stc2l 7, cr8, [r5, #696]! @ 0x2b8 │ │ + stc2l 7, cr8, [r5, #876]! @ 0x36c │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #76 @ 0x4c │ │ ldr r4, [r0] │ │ str r0, [fp, #-48] @ 0xffffffd0 │ │ ldr r0, [r4] │ │ ldr r1, [r0] │ │ @@ -1197834,32 +1197833,32 @@ │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldrhteq r0, [r6], -r8 │ │ eorseq r0, r6, r0, asr #21 │ │ ldrhteq r0, [r6], -ip │ │ mlaseq r6, r4, fp, r0 │ │ mlaseq r6, r0, fp, r0 │ │ - stc2l 1, cr10, [r3, #112]! @ 0x70 │ │ - stc2l 10, cr9, [r6, #744]! @ 0x2e8 @ │ │ - stc2l 8, cr14, [r3, #1020]! @ 0x3fc │ │ - stc2l 14, cr11, [r5, #100]! @ 0x64 │ │ - stc2l 1, cr8, [r5, #312]! @ 0x138 │ │ - stc2l 0, cr2, [r6, #88]! @ 0x58 │ │ + stc2l 1, cr10, [r3, #292]! @ 0x124 │ │ + stc2l 10, cr9, [r6, #924]! @ 0x39c @ │ │ + stc2l 9, cr14, [r3, #88]! @ 0x58 @ │ │ + stc2l 14, cr11, [r5, #280]! @ 0x118 │ │ + stc2l 1, cr8, [r5, #492]! @ 0x1ec │ │ + stc2l 0, cr2, [r6, #268]! @ 0x10c │ │ │ │ 023dac10 : │ │ ldr r3, [r0, #284] @ 0x11c │ │ cmp r3, #0 │ │ beq 23dac20 │ │ bx r3 │ │ push {fp, lr} │ │ mov fp, sp │ │ ldr r1, [pc, #4] @ 23dac34 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 13, cr9, [r5, #708]! @ 0x2c4 │ │ + stc2l 13, cr9, [r5, #888]! @ 0x378 │ │ │ │ 023dac38 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ beq 23dac78 │ │ ldr r3, [r0, #288] @ 0x120 │ │ @@ -1197871,15 +1197870,15 @@ │ │ cmp r0, r5 │ │ popeq {r4, r5, fp, pc} │ │ ldr r1, [pc, #12] @ 23dac7c │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 4, cr0, [r5, #268]! @ 0x10c │ │ + stc2l 4, cr0, [r5, #448]! @ 0x1c0 │ │ │ │ 023dac80 : │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ @@ -1197899,15 +1197898,15 @@ │ │ add r1, pc, r1 │ │ bl 270c0d0 │ │ mov r0, #0 │ │ str r0, [r4, #568] @ 0x238 │ │ pop {r4, sl, fp, lr} │ │ bx lr │ │ eorseq r0, r6, r4, lsl #13 │ │ - stc2l 0, cr8, [r4, #924]! @ 0x39c │ │ + stc2l 1, cr8, [r4, #80]! @ 0x50 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 023dacf0 : │ │ cmp r0, #0 │ │ bxeq lr │ │ sub r1, r1, #2 │ │ @@ -1197962,15 +1197961,15 @@ │ │ ldr r1, [r0, #312] @ 0x138 │ │ orr r1, r1, #768 @ 0x300 │ │ b 23dadd0 │ │ ldr r1, [r0, #312] @ 0x138 │ │ bic r1, r1, #768 @ 0x300 │ │ str r1, [r0, #312] @ 0x138 │ │ bx lr │ │ - stc2l 15, cr5, [r6, #208]! @ 0xd0 │ │ + stc2l 15, cr5, [r6, #388]! @ 0x184 │ │ │ │ 023daddc : │ │ push {fp, lr} │ │ mov fp, sp │ │ cmp r0, #0 │ │ beq 23dae60 │ │ ldr lr, [r0, #312] @ 0x138 │ │ @@ -1198007,16 +1198006,16 @@ │ │ add r1, pc, r1 │ │ pop {fp, lr} │ │ b 270c4b0 │ │ ldr r1, [pc, #12] @ 23dae88 │ │ add r1, pc, r1 │ │ pop {fp, lr} │ │ b 270c0d0 │ │ - stc2l 15, cr15, [r5, #960]! @ 0x3c0 │ │ - stc2l 14, cr9, [r3, #260]! @ 0x104 │ │ + stc2l 0, cr0, [r6, #116]! @ 0x74 │ │ + stc2l 14, cr9, [r3, #440]! @ 0x1b8 │ │ │ │ 023dae8c : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r4, r3 │ │ mov r6, r2 │ │ @@ -1198070,17 +1198069,17 @@ │ │ b 270c4b0 │ │ ldr r1, [pc, #24] @ 23daf80 │ │ mov r0, r7 │ │ add r1, pc, r1 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, lr} │ │ b 270c0d0 │ │ - stc2l 2, cr4, [r5, #136]! @ 0x88 │ │ - stc2l 15, cr15, [r5, #32]! │ │ - stc2l 13, cr9, [r3, #324]! @ 0x144 │ │ + stc2l 2, cr4, [r5, #316]! @ 0x13c │ │ + stc2l 15, cr15, [r5, #212]! @ 0xd4 │ │ + stc2l 13, cr9, [r3, #504]! @ 0x1f8 │ │ │ │ 023daf84 : │ │ cmp r0, #0 │ │ bxeq lr │ │ ldr r1, [r0, #312] @ 0x138 │ │ tst r1, #64 @ 0x40 │ │ bne 23dafb0 │ │ @@ -1198089,15 +1198088,15 @@ │ │ str r1, [r0, #312] @ 0x138 │ │ orr r2, r2, #67108864 @ 0x4000000 │ │ str r2, [r0, #316] @ 0x13c │ │ bx lr │ │ ldr r1, [pc, #4] @ 23dafbc │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 14, cr15, [r5, #656]! @ 0x290 │ │ + stc2l 14, cr15, [r5, #836]! @ 0x344 │ │ │ │ 023dafc0 : │ │ cmp r0, #0 │ │ bxeq lr │ │ ldr r1, [r0, #312] @ 0x138 │ │ tst r1, #64 @ 0x40 │ │ bne 23dafec │ │ @@ -1198106,15 +1198105,15 @@ │ │ str r1, [r0, #312] @ 0x138 │ │ orr r2, r2, #1024 @ 0x400 │ │ str r2, [r0, #316] @ 0x13c │ │ bx lr │ │ ldr r1, [pc, #4] @ 23daff8 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 14, cr15, [r5, #416]! @ 0x1a0 │ │ + stc2l 14, cr15, [r5, #596]! @ 0x254 │ │ │ │ 023daffc : │ │ cmp r0, #0 │ │ bxeq lr │ │ ldr r1, [r0, #312] @ 0x138 │ │ tst r1, #64 @ 0x40 │ │ bne 23db028 │ │ @@ -1198123,15 +1198122,15 @@ │ │ str r1, [r0, #312] @ 0x138 │ │ orr r2, r2, #262144 @ 0x40000 │ │ str r2, [r0, #316] @ 0x13c │ │ bx lr │ │ ldr r1, [pc, #4] @ 23db034 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 14, cr15, [r5, #176]! @ 0xb0 │ │ + stc2l 14, cr15, [r5, #356]! @ 0x164 │ │ │ │ 023db038 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ cmp r0, #0 │ │ beq 23db1f4 │ │ mov r5, r1 │ │ @@ -1198248,18 +1198247,18 @@ │ │ ldr r1, [pc, #24] @ 23db224 │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldr r1, [pc, #4] @ 23db220 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 7, cr9, [r5, #896]! @ 0x380 │ │ - stc2l 11, cr7, [r4, #924]! @ 0x39c @ │ │ - stc2l 13, cr15, [r5, #768]! @ 0x300 │ │ - stc2l 8, cr9, [r5, #124]! @ 0x7c │ │ + vcmla.f16 d25, d5, d13, #270 │ │ + stc2l 12, cr7, [r4, #80]! @ 0x50 │ │ + stc2l 13, cr15, [r5, #948]! @ 0x3b4 │ │ + vcmla.f16 , , q6, #270 │ │ │ │ 023db230 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ vldr d18, [pc, #144] @ 23db2d0 │ │ vmov d17, r2, r3 │ │ vldr d16, [pc, #128] @ 23db2c8 │ │ @@ -1198300,15 +1198299,15 @@ │ │ rscsmi r6, r8, r0, lsl #20 │ │ andeq r0, r0, r0 │ │ rsbmi r0, r0, r0 │ │ @ instruction: 0xffc00000 │ │ ldrshmi pc, [pc, #255] @ 23db3e3 @ │ │ @ instruction: 0xffc00000 │ │ ldrshgt pc, [pc, #255] @ 23db3eb @ │ │ - stc2l 13, cr15, [r4, #1016]! @ 0x3f8 │ │ + stc2l 14, cr15, [r4, #172]! @ 0xac │ │ │ │ 023db2ec : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #60 @ 0x3c │ │ cmp r0, #0 │ │ str r1, [sp, #24] │ │ @@ -1198887,15 +1198886,15 @@ │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [fp, #-36] @ 0xffffffdc │ │ ldr r1, [sp, #40] @ 0x28 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 270c0f0 │ │ - stc2l 9, cr15, [r5, #488]! @ 0x1e8 @ │ │ + stc2l 10, cr15, [r5, #132]! @ 0x84 @ │ │ │ │ 023dbc10 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ beq 23dbd10 │ │ ldr r3, [r0, #312] @ 0x138 │ │ @@ -1198961,17 +1198960,17 @@ │ │ pop {r4, sl, fp, pc} │ │ ldr r1, [pc, #24] @ 23dbd34 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldr r1, [pc, #4] @ 23dbd2c │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 7, cr13, [r3, #624]! @ 0x270 │ │ - stc2l 1, cr15, [r5, #976]! @ 0x3d0 │ │ - stc2l 0, cr3, [r6, #836]! @ 0x344 │ │ + stc2l 7, cr13, [r3, #804]! @ 0x324 │ │ + stc2l 2, cr15, [r5, #132]! @ 0x84 │ │ + stc2l 0, cr3, [r6, #1016]! @ 0x3f8 │ │ │ │ 023dbd38 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ vpush {d8-d13} │ │ vldr d11, [pc, #228] @ 23dbe30 │ │ vmov d16, r2, r3 │ │ @@ -1199034,15 +1199033,15 @@ │ │ rscsmi r6, r8, r0, lsl #20 │ │ andeq r0, r0, r0 │ │ rsbmi r0, r0, r0 │ │ @ instruction: 0xffc00000 │ │ ldrshmi pc, [pc, #255] @ 23dbf43 @ │ │ @ instruction: 0xffc00000 │ │ ldrshgt pc, [pc, #255] @ 23dbf4b @ │ │ - stc2l 2, cr15, [r4, #648]! @ 0x288 │ │ + stc2l 2, cr15, [r4, #828]! @ 0x33c │ │ │ │ 023dbe4c : │ │ cmp r0, #0 │ │ bxeq lr │ │ ldr r1, [r0, #312] @ 0x138 │ │ tst r1, #64 @ 0x40 │ │ bne 23dbe7c │ │ @@ -1199052,15 +1199051,15 @@ │ │ orr r1, r1, #4096 @ 0x1000 │ │ orr r1, r1, #33554432 @ 0x2000000 │ │ str r1, [r0, #316] @ 0x13c │ │ bx lr │ │ ldr r1, [pc, #4] @ 23dbe88 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 15, cr14, [r5, #864]! @ 0x360 │ │ + stc2l 0, cr15, [r5, #20]! │ │ │ │ 023dbe8c : │ │ cmp r0, #0 │ │ bxeq lr │ │ ldr r1, [r0, #312] @ 0x138 │ │ tst r1, #64 @ 0x40 │ │ bne 23dbebc │ │ @@ -1199070,15 +1199069,15 @@ │ │ orr r1, r1, #4096 @ 0x1000 │ │ orr r1, r1, #33554432 @ 0x2000000 │ │ str r1, [r0, #316] @ 0x13c │ │ bx lr │ │ ldr r1, [pc, #4] @ 23dbec8 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 15, cr14, [r5, #608]! @ 0x260 │ │ + stc2l 15, cr14, [r5, #788]! @ 0x314 │ │ │ │ 023dbecc : │ │ cmp r0, #0 │ │ bxeq lr │ │ ldr r1, [r0, #312] @ 0x138 │ │ tst r1, #64 @ 0x40 │ │ bne 23dbef8 │ │ @@ -1199087,15 +1199086,15 @@ │ │ str r1, [r0, #312] @ 0x138 │ │ orr r2, r2, #4096 @ 0x1000 │ │ str r2, [r0, #316] @ 0x13c │ │ bx lr │ │ ldr r1, [pc, #4] @ 23dbf04 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 15, cr14, [r5, #368]! @ 0x170 │ │ + stc2l 15, cr14, [r5, #548]! @ 0x224 │ │ │ │ 023dbf08 : │ │ cmp r0, #0 │ │ bxeq lr │ │ ldr r1, [r0, #312] @ 0x138 │ │ tst r1, #64 @ 0x40 │ │ bne 23dbf38 │ │ @@ -1199105,15 +1199104,15 @@ │ │ orr r1, r1, #4096 @ 0x1000 │ │ orr r1, r1, #33554432 @ 0x2000000 │ │ str r1, [r0, #316] @ 0x13c │ │ bx lr │ │ ldr r1, [pc, #4] @ 23dbf44 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 15, cr14, [r5, #112]! @ 0x70 │ │ + stc2l 15, cr14, [r5, #292]! @ 0x124 │ │ │ │ 023dbf48 : │ │ cmp r0, #0 │ │ bxeq lr │ │ ldr r1, [r0, #312] @ 0x138 │ │ tst r1, #64 @ 0x40 │ │ bne 23dbf78 │ │ @@ -1199123,15 +1199122,15 @@ │ │ orr r1, r1, #4608 @ 0x1200 │ │ orr r1, r1, #33554432 @ 0x2000000 │ │ str r1, [r0, #316] @ 0x13c │ │ bx lr │ │ ldr r1, [pc, #4] @ 23dbf84 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 14, cr14, [r5, #880]! @ 0x370 │ │ + stc2l 15, cr14, [r5, #36]! @ 0x24 │ │ │ │ 023dbf88 : │ │ cmp r0, #0 │ │ bxeq lr │ │ ldr r1, [r0, #312] @ 0x138 │ │ tst r1, #64 @ 0x40 │ │ bne 23dbfb4 │ │ @@ -1199140,15 +1199139,15 @@ │ │ str r1, [r0, #312] @ 0x138 │ │ orr r2, r2, #20480 @ 0x5000 │ │ str r2, [r0, #316] @ 0x13c │ │ bx lr │ │ ldr r1, [pc, #4] @ 23dbfc0 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 14, cr14, [r5, #640]! @ 0x280 │ │ + stc2l 14, cr14, [r5, #820]! @ 0x334 │ │ │ │ 023dbfc4 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ cmp r0, #0 │ │ beq 23dc0f0 │ │ ldr ip, [r0, #312] @ 0x138 │ │ @@ -1199222,18 +1199221,18 @@ │ │ movweq r0, #6968 @ 0x1b38 │ │ movteq r0, #23434 @ 0x5b8a │ │ streq r0, [r6] │ │ pop {r4, r5, r6, sl, fp, pc} │ │ ldr r1, [pc, #4] @ 23dc100 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 13, cr2, [r6, #92]! @ 0x5c │ │ - stc2l 0, cr3, [r5, #116]! @ 0x74 │ │ - stc2l 14, cr14, [r5, #352]! @ 0x160 │ │ - stc2l 1, cr1, [r5, #684]! @ 0x2ac │ │ + stc2l 13, cr2, [r6, #272]! @ 0x110 │ │ + stc2l 0, cr3, [r5, #296]! @ 0x128 │ │ + stc2l 14, cr14, [r5, #532]! @ 0x214 │ │ + stc2l 1, cr1, [r5, #864]! @ 0x360 │ │ │ │ 023dc110 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r5, r0 │ │ ldr r0, [pc, #76] @ 23dc174 │ │ @@ -1199253,16 +1199252,16 @@ │ │ mov r3, r0 │ │ mov r0, r5 │ │ mov r1, r4 │ │ mov r2, r6 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ b 270c860 │ │ - stc2l 11, cr12, [r5, #864]! @ 0x360 @ │ │ - stc2l 2, cr10, [r6, #216]! @ 0xd8 │ │ + stc2l 12, cr12, [r5, #20]! │ │ + stc2l 2, cr10, [r6, #396]! @ 0x18c │ │ │ │ 023dc17c : │ │ ldr r2, [r0, #316] @ 0x13c │ │ str r1, [r0, #292] @ 0x124 │ │ orr r1, r2, #1048576 @ 0x100000 │ │ str r1, [r0, #316] @ 0x13c │ │ bx lr │ │ @@ -1200046,16 +1200045,16 @@ │ │ ldr r0, [sl, #316] @ 0x13c │ │ bic r0, r0, #128 @ 0x80 │ │ b 23dcca0 │ │ ldr r1, [pc, #12] @ 23dcdcc │ │ mov r0, sl │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 9, cr2, [r5, #24]! @ │ │ - stc2l 3, cr2, [r5, #564]! @ 0x234 │ │ + stc2l 9, cr2, [r5, #114]! @ 0x72 @ │ │ + stc2l 3, cr2, [r5, #744]! @ 0x2e8 │ │ │ │ 023dcdd0 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ ldr r2, [r0, #316] @ 0x13c │ │ tst r2, #4096 @ 0x1000 │ │ beq 23dce24 │ │ @@ -1200197,15 +1200196,15 @@ │ │ lsr r2, r2, #3 │ │ str r2, [r0, #496] @ 0x1f0 │ │ str r2, [r1, #12] │ │ pop {r4, sl, fp, pc} │ │ ldr r1, [pc, #4] @ 23dd01c │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 11, cr15, [r5, #972]! @ 0x3cc @ │ │ + stc2l 12, cr15, [r5, #128]! @ 0x80 │ │ │ │ 023dd020 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #68 @ 0x44 │ │ mov r8, r0 │ │ ldr r0, [r0, #484] @ 0x1e4 │ │ @@ -1201787,15 +1201786,15 @@ │ │ strb r5, [r7] │ │ strb r3, [r7, #-2] │ │ sub r7, r7, #4 │ │ bne 23de8b8 │ │ mov r6, #2 │ │ mov r7, #2 │ │ b 23deda8 │ │ - stc2l 11, cr11, [r3, #720]! @ 0x2d0 @ │ │ + stc2l 11, cr11, [r3, #900]! @ 0x384 @ │ │ tst r7, #128 @ 0x80 │ │ bne 23ded2c │ │ mov r7, #3 │ │ mov lr, #64 @ 0x40 │ │ mov r6, #4 │ │ cmp ip, #0 │ │ beq 23deda8 │ │ @@ -1202586,15 +1202585,15 @@ │ │ cmp sl, #0 │ │ beq 23deb00 │ │ cmp r0, #0 │ │ beq 23dd978 │ │ rsb ip, r0, #0 │ │ mov r1, #0 │ │ b 23df5a4 │ │ - stc2l 9, cr2, [r5, #178]! @ 0xb2 @ │ │ + stc2l 9, cr2, [r5, #268]! @ 0x10c @ │ │ ldr r2, [sp, #44] @ 0x2c │ │ ldrh r0, [r2, #32] │ │ ldrh r6, [r2, #30] │ │ ldrh r7, [r2, #34] @ 0x22 │ │ rev16 r0, r0 │ │ strh r0, [r3, #3] │ │ lsr r0, r6, #8 │ │ @@ -1203144,18 +1203143,18 @@ │ │ mov r0, r8 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldr r1, [pc, #16] @ 23dfe28 │ │ mov r0, r8 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 14, cr12, [r5, #256]! @ 0x100 │ │ - stc2l 7, cr7, [r3, #456]! @ 0x1c8 │ │ - stc2l 6, cr9, [r3, #816]! @ 0x330 │ │ - stc2l 3, cr13, [r4, #444]! @ 0x1bc │ │ + stc2l 14, cr12, [r5, #436]! @ 0x1b4 │ │ + stc2l 7, cr7, [r3, #636]! @ 0x27c │ │ + stc2l 6, cr9, [r3, #996]! @ 0x3e4 │ │ + stc2l 3, cr13, [r4, #624]! @ 0x270 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ ldrb r3, [r0, #8] │ │ ldr r9, [r0] │ │ cmp r3, #0 │ │ beq 23dfef8 │ │ @@ -1203545,15 +1203544,15 @@ │ │ movgt r0, r1 │ │ bxgt lr │ │ push {fp, lr} │ │ mov fp, sp │ │ ldr r1, [pc, #4] @ 23e045c │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 11, cr0, [r5, #344]! @ 0x158 @ │ │ + stc2l 11, cr0, [r5, #524]! @ 0x20c @ │ │ │ │ 023e0460 : │ │ ldr r0, [r0] │ │ rev r0, r0 │ │ bx lr │ │ │ │ 023e046c : │ │ @@ -1203614,16 +1203613,16 @@ │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldr r1, [pc, #12] @ 23e0554 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 3, cr8, [r6, #580]! @ 0x244 │ │ - stc2l 8, cr2, [r4, #760]! @ 0x2f8 │ │ + stc2l 3, cr8, [r6, #760]! @ 0x2f8 │ │ + vcmla.f16 q9, q10, , #270 │ │ │ │ 023e0558 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ mov r4, r0 │ │ mov r0, #33 @ 0x21 │ │ @@ -1203732,17 +1203731,17 @@ │ │ mov r0, r8 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ ldr r1, [pc, #12] @ 23e0724 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 10, cr12, [r4, #952]! @ 0x3b8 @ │ │ - stc2l 8, cr0, [r5, #584]! @ 0x248 │ │ - stc2l 2, cr2, [r6, #728]! @ 0x2d8 │ │ + stc2l 11, cr12, [r4, #108]! @ 0x6c @ │ │ + stc2l 8, cr0, [r5, #764]! @ 0x2fc │ │ + stc2l 2, cr2, [r6, #908]! @ 0x38c │ │ │ │ 023e072c : │ │ mvn r2, #122 @ 0x7a │ │ uxtab r2, r2, r1 │ │ cmn r2, #58 @ 0x3a │ │ mvncs r2, #90 @ 0x5a │ │ uxtabcs r2, r2, r1 │ │ @@ -1203771,15 +1203770,15 @@ │ │ bcs 23e07b0 │ │ push {fp, lr} │ │ mov fp, sp │ │ ldr r1, [pc, #8] @ 23e07b4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ bx lr │ │ - stc2l 1, cr2, [r6, #264]! @ 0x108 │ │ + stc2l 1, cr2, [r6, #444]! @ 0x1bc │ │ │ │ 023e07b8 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ mov r4, r0 │ │ mov r8, r1 │ │ ldr r5, [r4, #840] @ 0x348 │ │ @@ -1203830,15 +1203829,15 @@ │ │ cmp r7, r8 │ │ bcs 23e0874 │ │ ldr r1, [pc, #12] @ 23e0898 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ pop {r4, r5, r6, r7, r8, sl, fp, lr} │ │ b 270c260 │ │ - stc2l 9, cr12, [r4, #172]! @ 0xac @ │ │ + stc2l 9, cr12, [r4, #262]! @ 0x106 @ │ │ │ │ 023e089c : │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ @@ -1203916,16 +1203915,16 @@ │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ tst r0, #512 @ 0x200 │ │ beq 23e09ac │ │ ldr r1, [pc, #8] @ 23e09e0 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 0, cr6, [r5, #116]! @ 0x74 │ │ - stc2l 0, cr6, [r5, #260]! @ 0x104 │ │ + stc2l 0, cr6, [r5, #296]! @ 0x128 │ │ + stc2l 0, cr6, [r5, #440]! @ 0x1b8 │ │ │ │ 023e09e8 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r4, r0 │ │ ldr r5, [r0, #312] @ 0x138 │ │ @@ -1203971,15 +1203970,15 @@ │ │ add r0, r0, #324 @ 0x144 │ │ b 270ab80 │ │ ldr r1, [pc, #12] @ 23e0aac │ │ add r1, pc, r1 │ │ str r1, [r0, #348] @ 0x15c │ │ mvn r0, #2 │ │ bx lr │ │ - stc2l 1, cr0, [r6, #980]! @ 0x3d4 │ │ + stc2l 2, cr0, [r6, #136]! @ 0x88 │ │ │ │ 023e0ab0 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #40 @ 0x28 │ │ mov r4, r0 │ │ ldr r0, [r0, #308] @ 0x134 │ │ @@ -1204057,17 +1204056,17 @@ │ │ add r1, pc, r1 │ │ bl 270c480 │ │ ldr r1, [pc, #16] @ 23e0c00 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ stc2l 0, cr8, [pc, #144]! @ 23e0c90 │ │ - stc2l 1, cr4, [r3, #40]! @ 0x28 │ │ + stc2l 1, cr4, [r3, #220]! @ 0xdc │ │ stc2l 0, cr13, [r6, #312]! @ 0x138 │ │ - stc2l 4, cr0, [r5, #472]! @ 0x1d8 │ │ + stc2l 4, cr0, [r5, #652]! @ 0x28c │ │ │ │ 023e0c08 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #780 @ 0x30c │ │ ldr r3, [r0, #308] @ 0x134 │ │ mov r4, r0 │ │ @@ -1204207,22 +1204206,22 @@ │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ ldr r1, [pc, #40] @ 23e0e6c │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 0, cr4, [r3, #488]! @ 0x1e8 │ │ + stc2l 0, cr4, [r3, #668]! @ 0x29c │ │ stc2l 10, cr11, [r6, #508]! @ 0x1fc @ │ │ stc2l 14, cr12, [r6, #648]! @ 0x288 │ │ stc2l 4, cr13, [r6, #844]! @ 0x34c │ │ - stc2l 5, cr4, [r4, #880]! @ 0x370 │ │ - stc2l 3, cr14, [r4, #332]! @ 0x14c │ │ + stc2l 6, cr4, [r4, #36]! @ 0x24 │ │ + stc2l 3, cr14, [r4, #512]! @ 0x200 │ │ stc2l 5, cr13, [r6, #204]! @ 0xcc │ │ - stc2l 5, cr4, [r4, #604]! @ 0x25c │ │ + stc2l 5, cr4, [r4, #784]! @ 0x310 │ │ stc2l 8, cr11, [r6, #88]! @ 0x58 │ │ │ │ 023e0e70 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #308] @ 0x134 │ │ @@ -1204243,15 +1204242,15 @@ │ │ pop {r4, r5, fp, lr} │ │ b 270c4c0 │ │ pop {r4, r5, fp, pc} │ │ ldr r1, [pc, #8] @ 23e0ed4 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 14, cr3, [r3, #120]! @ 0x78 │ │ + stc2l 14, cr3, [r3, #300]! @ 0x12c │ │ stc2l 13, cr12, [r6, #552]! @ 0x228 │ │ │ │ 023e0edc : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ ldr r3, [r0, #308] @ 0x134 │ │ @@ -1204304,17 +1204303,17 @@ │ │ mov r1, r4 │ │ bl 270c240 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ ldr r1, [pc, #12] @ 23e0fc8 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 13, cr3, [r3, #888]! @ 0x378 │ │ + stc2l 14, cr3, [r3, #44]! @ 0x2c │ │ stc2l 12, cr12, [r6, #808]! @ 0x328 │ │ - stc2l 4, cr4, [r4, #76]! @ 0x4c │ │ + stc2l 4, cr4, [r4, #256]! @ 0x100 │ │ │ │ 023e0fcc : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ ldr r3, [r0, #308] @ 0x134 │ │ tst r3, #1 │ │ @@ -1204445,18 +1204444,18 @@ │ │ add r1, pc, r1 │ │ bl 270c4c0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ ldr r1, [pc, #16] @ 23e11f8 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 12, cr3, [r3, #952]! @ 0x3b8 │ │ + stc2l 13, cr3, [r3, #108]! @ 0x6c │ │ stc2l 5, cr11, [r6, #424]! @ 0x1a8 │ │ stc2l 10, cr12, [r6, #440]! @ 0x1b8 @ │ │ - stc2l 1, cr4, [r4, #924]! @ 0x39c │ │ + stc2l 2, cr4, [r4, #80]! @ 0x50 │ │ stc2l 11, cr12, [r6, #488]! @ 0x1e8 @ │ │ │ │ 023e1200 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #64 @ 0x40 │ │ ldr r3, [r0, #308] @ 0x134 │ │ @@ -1204576,19 +1204575,19 @@ │ │ bl 270c240 │ │ ldr r1, [pc, #28] @ 23e13fc │ │ add r1, pc, r1 │ │ b 23e1360 │ │ ldr r1, [pc, #20] @ 23e1400 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 10, cr3, [r3, #744]! @ 0x2e8 @ │ │ + stc2l 10, cr3, [r3, #924]! @ 0x39c @ │ │ stc2l 9, cr12, [r6, #332]! @ 0x14c @ │ │ - stc2l 5, cr1, [r6, #456]! @ 0x1c8 │ │ + stc2l 5, cr1, [r6, #636]! @ 0x27c │ │ stc2l 2, cr11, [r6, #504]! @ 0x1f8 │ │ - stc2l 15, cr3, [r4, #908]! @ 0x38c │ │ + stc2l 0, cr4, [r4, #64]! @ 0x40 │ │ │ │ 023e1404 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0, #308] @ 0x134 │ │ @@ -1204657,18 +1204656,18 @@ │ │ bl 270c4c0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ ldr r1, [pc, #20] @ 23e1538 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 8, cr3, [r3, #712]! @ 0x2c8 │ │ + stc2l 8, cr3, [r3, #892]! @ 0x37c │ │ stc2l 7, cr12, [r6, #648]! @ 0x288 │ │ - stc2l 14, cr3, [r4, #892]! @ 0x37c │ │ - stc2l 14, cr3, [r4, #668]! @ 0x29c │ │ + stc2l 15, cr3, [r4, #48]! @ 0x30 │ │ + stc2l 14, cr3, [r4, #848]! @ 0x350 │ │ │ │ 023e153c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #260 @ 0x104 │ │ sub sp, sp, #1024 @ 0x400 │ │ ldr r3, [r0, #308] @ 0x134 │ │ @@ -1204981,25 +1204980,25 @@ │ │ ldr r7, [pc, #52] @ 23e1a54 │ │ str r5, [r4, #320] @ 0x140 │ │ add r7, pc, r7 │ │ b 23e1650 │ │ ldr r1, [pc, #40] @ 23e1a58 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 7, cr3, [r3, #472]! @ 0x1d8 │ │ - stc2l 7, cr13, [r5, #796]! @ 0x31c │ │ - stc2l 13, cr3, [r4, #668]! @ 0x29c │ │ + stc2l 7, cr3, [r3, #652]! @ 0x28c │ │ + stc2l 7, cr13, [r5, #976]! @ 0x3d0 │ │ + stc2l 13, cr3, [r4, #848]! @ 0x350 │ │ stc2l 15, cr10, [r6, #944]! @ 0x3b0 │ │ - stc2l 9, cr9, [r4, #508]! @ 0x1fc @ │ │ - stc2l 9, cr8, [r6, #408]! @ 0x198 @ │ │ - stc2l 1, cr3, [r5, #264]! @ 0x108 │ │ - stc2l 1, cr3, [r5, #88]! @ 0x58 │ │ - stc2l 8, cr8, [r6, #192]! @ 0xc0 │ │ - stc2l 9, cr3, [r4, #318]! @ 0x13e @ │ │ - stc2l 7, cr13, [r5, #204]! @ 0xcc │ │ + stc2l 10, cr9, [r4, #172]! @ 0xac @ │ │ + stc2l 9, cr8, [r6, #498]! @ 0x1f2 @ │ │ + stc2l 1, cr3, [r5, #444]! @ 0x1bc │ │ + stc2l 1, cr3, [r5, #268]! @ 0x10c │ │ + stc2l 8, cr8, [r6, #372]! @ 0x174 │ │ + stc2l 9, cr3, [r4, #408]! @ 0x198 @ │ │ + stc2l 7, cr13, [r5, #384]! @ 0x180 │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #64 @ 0x40 │ │ mov r4, r0 │ │ ldr r0, [r0, #320] @ 0x140 │ │ mov r5, r1 │ │ cmp r0, #0 │ │ @@ -1205055,16 +1205054,16 @@ │ │ bl 270c200 │ │ b 23e1b50 │ │ str r5, [r4, #320] @ 0x140 │ │ mov r6, #0 │ │ mov r0, r6 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 3, cr1, [r4, #664]! @ 0x298 │ │ - stc2l 14, cr2, [r5, #144]! @ 0x90 │ │ + stc2l 3, cr1, [r4, #844]! @ 0x34c │ │ + stc2l 14, cr2, [r5, #324]! @ 0x144 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ mov r4, r0 │ │ mov r8, r1 │ │ ldr r0, [r0, #320] @ 0x140 │ │ ldr r1, [r4, #476] @ 0x1dc │ │ @@ -1205152,16 +1205151,16 @@ │ │ str r2, [r4, #340] @ 0x154 │ │ add r0, r3, r0 │ │ str r0, [r9] │ │ mov r0, r4 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 270c200 │ │ - stc2l 15, cr14, [r5, #900]! @ 0x384 │ │ - stc2l 0, cr1, [r5, #724]! @ 0x2d4 │ │ + stc2l 0, cr15, [r5, #56]! @ 0x38 │ │ + stc2l 0, cr1, [r5, #904]! @ 0x388 │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ ldr r4, [r0, #868] @ 0x364 │ │ mov r7, r2 │ │ mov r6, r1 │ │ mov r5, r0 │ │ cmp r4, #0 │ │ @@ -1205195,15 +1205194,15 @@ │ │ cmp r7, #0 │ │ add r1, pc, r1 │ │ beq 23e1d88 │ │ bl 270c490 │ │ mov r0, r4 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ bl 270c480 │ │ - stc2l 4, cr7, [r4, #96]! @ 0x60 │ │ + stc2l 4, cr7, [r4, #276]! @ 0x114 │ │ │ │ 023e1d90 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r4, r0 │ │ ldr r0, [r0, #836] @ 0x344 │ │ @@ -1205386,22 +1205385,22 @@ │ │ ldrb r7, [r3, #3] │ │ add r3, r3, #4 │ │ b 23e2028 │ │ ldr r1, [pc, #28] @ 23e2094 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 0, cr1, [r4, #276]! @ 0x114 │ │ - stc2l 14, cr2, [r3, #232]! @ 0xe8 │ │ - stc2l 7, cr2, [r6, #84]! @ 0x54 │ │ - stc2l 11, cr2, [r5, #256]! @ 0x100 @ │ │ - stc2l 2, cr8, [r6, #904]! @ 0x388 │ │ - stc2l 3, cr3, [r4, #332]! @ 0x14c │ │ - stc2l 3, cr8, [r6, #80]! @ 0x50 │ │ - stc2l 2, cr8, [r6, #568]! @ 0x238 │ │ + stc2l 0, cr1, [r4, #456]! @ 0x1c8 │ │ + stc2l 14, cr2, [r3, #412]! @ 0x19c │ │ + stc2l 7, cr2, [r6, #264]! @ 0x108 │ │ + stc2l 11, cr2, [r5, #436]! @ 0x1b4 @ │ │ + stc2l 3, cr8, [r6, #60]! @ 0x3c │ │ + stc2l 3, cr3, [r4, #512]! @ 0x200 │ │ + stc2l 3, cr8, [r6, #260]! @ 0x104 │ │ + stc2l 2, cr8, [r6, #748]! @ 0x2ec │ │ │ │ 023e20a0 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #272 @ 0x110 │ │ ldr r3, [r0, #308] @ 0x134 │ │ tst r3, #1 │ │ @@ -1205536,20 +1205535,20 @@ │ │ mov r1, r9 │ │ bl 270c9a0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ ldr r1, [pc, #24] @ 23e22e4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 10, cr2, [r3, #984]! @ 0x3d8 @ │ │ + stc2l 11, cr2, [r3, #140]! @ 0x8c @ │ │ stc2l 5, cr10, [r6, #56]! @ 0x38 │ │ stc2l 10, cr11, [r6, #456]! @ 0x1c8 @ │ │ stc2l 9, cr11, [r6, #500]! @ 0x1f4 @ │ │ - stc2l 0, cr8, [r6, #504]! @ 0x1f8 │ │ - stc2l 1, cr3, [r4, #12]! │ │ + stc2l 0, cr8, [r6, #684]! @ 0x2ac │ │ + stc2l 1, cr3, [r4, #192]! @ 0xc0 │ │ │ │ 023e22e8 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ ldr r7, [r0, #308] @ 0x134 │ │ tst r7, #1 │ │ @@ -1205699,21 +1205698,21 @@ │ │ mov r2, sp │ │ bl 270c9b0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldr r1, [pc, #28] @ 23e256c │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 9, cr2, [r3, #156]! @ 0x9c @ │ │ + stc2l 9, cr2, [r3, #246]! @ 0xf6 @ │ │ stc2l 2, cr10, [r6, #520]! @ 0x208 │ │ stc2l 8, cr11, [r6, #504]! @ 0x1f8 │ │ - stc2l 14, cr3, [r6, #736]! @ 0x2e0 │ │ - stc2l 8, cr14, [r5, #360]! @ 0x168 │ │ - vcmla.f16 q15, , , #270 │ │ - stc2l 14, cr2, [r4, #508]! @ 0x1fc │ │ + stc2l 14, cr3, [r6, #916]! @ 0x394 │ │ + vcmla.f16 d30, d21, d7, #270 │ │ + stc2l 8, cr14, [r5, #456]! @ 0x1c8 │ │ + stc2l 14, cr2, [r4, #688]! @ 0x2b0 │ │ │ │ 023e2570 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ mov r4, r0 │ │ ldrb r0, [r0, #308] @ 0x134 │ │ @@ -1205837,19 +1205836,19 @@ │ │ ldr r1, [pc, #28] @ 23e277c │ │ add r1, pc, r1 │ │ b 23e2704 │ │ ldr r1, [pc, #24] @ 23e2784 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 7, cr12, [r5, #716]! @ 0x2cc │ │ + stc2l 7, cr12, [r5, #896]! @ 0x380 │ │ stc2l 15, cr9, [r6, #360]! @ 0x168 │ │ - stc2l 10, cr7, [r6, #976]! @ 0x3d0 @ │ │ - vcmla.f16 d30, d20, d20, #270 │ │ - stc2l 12, cr2, [r4, #380]! @ 0x17c │ │ + stc2l 11, cr7, [r6, #132]! @ 0x84 @ │ │ + stc2l 8, cr14, [r4, #836]! @ 0x344 │ │ + stc2l 12, cr2, [r4, #560]! @ 0x230 │ │ │ │ 023e2788 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #520 @ 0x208 │ │ mov r4, r0 │ │ ldr r0, [r0, #308] @ 0x134 │ │ @@ -1205924,17 +1205923,17 @@ │ │ bl 270c9d0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ ldr r1, [pc, #16] @ 23e28d0 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 4, cr2, [r3, #568]! @ 0x238 │ │ + stc2l 4, cr2, [r3, #748]! @ 0x2ec │ │ stc2l 13, cr9, [r6, #824]! @ 0x338 │ │ - stc2l 11, cr2, [r4, #44]! @ 0x2c @ │ │ + stc2l 11, cr2, [r4, #224]! @ 0xe0 @ │ │ stc2l 3, cr11, [r6, #808]! @ 0x328 │ │ │ │ 023e28d8 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ ldr r3, [r0, #308] @ 0x134 │ │ @@ -1205997,18 +1205996,18 @@ │ │ mov r1, r4 │ │ bl 270c9e0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ ldr r1, [pc, #16] @ 23e29f0 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 3, cr2, [r3, #520]! @ 0x208 │ │ + stc2l 3, cr2, [r3, #700]! @ 0x2bc │ │ stc2l 12, cr9, [r6, #776]! @ 0x308 │ │ stc2l 2, cr11, [r6, #760]! @ 0x2f8 │ │ - stc2l 9, cr2, [r4, #478]! @ 0x1de @ │ │ + stc2l 10, cr2, [r4, #112]! @ 0x70 @ │ │ │ │ 023e29f4 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ ldr r3, [r0, #308] @ 0x134 │ │ tst r3, #1 │ │ @@ -1206110,18 +1206109,18 @@ │ │ str r6, [sp] │ │ bl 270c9f0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ ldr r1, [pc, #16] @ 23e2bac │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 2, cr2, [r3, #408]! @ 0x198 │ │ + stc2l 2, cr2, [r3, #588]! @ 0x24c │ │ stc2l 11, cr9, [r6, #664]! @ 0x298 @ │ │ stc2l 1, cr11, [r6, #648]! @ 0x288 │ │ - stc2l 8, cr2, [r4, #204]! @ 0xcc │ │ + vcmla.f16 q9, q2, q8, #270 │ │ │ │ 023e2bb0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #36 @ 0x24 │ │ mov r4, r0 │ │ ldr r0, [r0, #308] @ 0x134 │ │ @@ -1206331,22 +1206330,22 @@ │ │ ldr r1, [pc, #44] @ 23e2f24 │ │ add r1, pc, r1 │ │ b 23e2c9c │ │ ldr r1, [pc, #36] @ 23e2f28 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 0, cr2, [r3, #328]! @ 0x148 │ │ + stc2l 0, cr2, [r3, #508]! @ 0x1fc │ │ stc2l 9, cr9, [r6, #316]! @ 0x13c @ │ │ stc2l 15, cr10, [r6, #312]! @ 0x138 │ │ - stc2l 15, cr15, [r2, #544]! @ 0x220 │ │ - stc2l 3, cr10, [r4, #636]! @ 0x27c │ │ - stc2l 5, cr7, [r6, #288]! @ 0x120 │ │ - stc2l 9, cr15, [r5, #466]! @ 0x1d2 @ │ │ - stc2l 4, cr2, [r4, #796]! @ 0x31c │ │ + stc2l 15, cr15, [r2, #724]! @ 0x2d4 │ │ + stc2l 3, cr10, [r4, #816]! @ 0x330 │ │ + stc2l 5, cr7, [r6, #468]! @ 0x1d4 │ │ + stc2l 10, cr15, [r5, #88]! @ 0x58 @ │ │ + stc2l 4, cr2, [r4, #976]! @ 0x3d0 │ │ │ │ 023e2f2c : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #16 │ │ mov r4, r0 │ │ ldr r0, [r0, #308] @ 0x134 │ │ @@ -1206504,24 +1206503,24 @@ │ │ ldr r1, [pc, #48] @ 23e31d4 │ │ add r1, pc, r1 │ │ b 23e30d4 │ │ ldr r1, [pc, #40] @ 23e31d8 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 13, cr1, [r3, #360]! @ 0x168 │ │ + stc2l 13, cr1, [r3, #540]! @ 0x21c │ │ stc2l 5, cr9, [r6, #1000]! @ 0x3e8 │ │ stc2l 12, cr10, [r6, #792]! @ 0x318 │ │ - stc2l 13, cr11, [r5, #156]! @ 0x9c │ │ - stc2l 2, cr8, [r3, #128]! @ 0x80 │ │ - stc2l 0, cr4, [r4, #808]! @ 0x328 │ │ - stc2l 0, cr4, [r4, #836]! @ 0x344 │ │ - stc2l 11, cr1, [r3, #348]! @ 0x15c @ │ │ - stc2l 2, cr2, [r4, #108]! @ 0x6c │ │ - stc2l 1, cr7, [r6, #400]! @ 0x190 │ │ + stc2l 13, cr11, [r5, #336]! @ 0x150 │ │ + stc2l 2, cr8, [r3, #308]! @ 0x134 │ │ + stc2l 0, cr4, [r4, #988]! @ 0x3dc │ │ + stc2l 0, cr4, [r4, #1016]! @ 0x3f8 │ │ + stc2l 11, cr1, [r3, #528]! @ 0x210 @ │ │ + stc2l 2, cr2, [r4, #288]! @ 0x120 │ │ + stc2l 1, cr7, [r6, #580]! @ 0x244 │ │ │ │ 023e31e0 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ mov r4, r0 │ │ ldr r0, [r0, #308] @ 0x134 │ │ @@ -1206583,15 +1206582,15 @@ │ │ pop {r4, r5, r6, sl, fp, pc} │ │ ldr r1, [pc, #16] @ 23e32ec │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ stc2l 3, cr9, [r6, #824]! @ 0x338 │ │ stc2l 9, cr10, [r6, #404]! @ 0x194 @ │ │ - stc2l 0, cr2, [r4, #956]! @ 0x3bc │ │ + stc2l 1, cr2, [r4, #112]! @ 0x70 │ │ │ │ 023e32f0 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #32 │ │ mov r4, r0 │ │ ldr r0, [r0, #836] @ 0x344 │ │ @@ -1206702,19 +1206701,19 @@ │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, lr} │ │ b 270c4c0 │ │ ldr r1, [pc, #16] @ 23e34c8 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 15, cr7, [r3, #724]! @ 0x2d4 │ │ - stc2l 8, cr1, [r3, #588]! @ 0x24c │ │ - stc2l 15, cr1, [r4, #76]! @ 0x4c │ │ - stc2l 12, cr5, [r4, #1008]! @ 0x3f0 │ │ - stc2l 13, cr6, [r6, #720]! @ 0x2d0 │ │ + stc2l 15, cr7, [r3, #904]! @ 0x388 │ │ + vcmla.f16 , , q0, #270 │ │ + stc2l 15, cr1, [r4, #256]! @ 0x100 │ │ + stc2l 13, cr5, [r4, #164]! @ 0xa4 │ │ + stc2l 13, cr6, [r6, #900]! @ 0x384 │ │ │ │ 023e34d4 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #32 │ │ mov r4, r0 │ │ ldr r0, [r0, #836] @ 0x344 │ │ @@ -1206864,22 +1206863,22 @@ │ │ bl 270c4c0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ ldr r1, [pc, #32] @ 23e3758 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 13, cr7, [r3, #836]! @ 0x344 │ │ + stc2l 13, cr7, [r3, #1016]! @ 0x3f8 │ │ stc2l 1, cr9, [r6] │ │ - stc2l 3, cr3, [r5, #604]! @ 0x25c │ │ - stc2l 10, cr5, [r4, #1020]! @ 0x3fc @ │ │ - stc2l 13, cr5, [r3, #988]! @ 0x3dc │ │ - stc2l 6, cr11, [r5, #184]! @ 0xb8 │ │ - stc2l 12, cr1, [r4, #588]! @ 0x24c │ │ - stc2l 12, cr6, [r6, #16]! │ │ + stc2l 3, cr3, [r5, #784]! @ 0x310 │ │ + stc2l 11, cr5, [r4, #176]! @ 0xb0 @ │ │ + stc2l 14, cr5, [r3, #144]! @ 0x90 │ │ + stc2l 6, cr11, [r5, #364]! @ 0x16c │ │ + stc2l 12, cr1, [r4, #768]! @ 0x300 │ │ + stc2l 12, cr6, [r6, #196]! @ 0xc4 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r5, r2 │ │ ldr r2, [r0, #840] @ 0x348 │ │ mov r7, r3 │ │ mov r4, r0 │ │ @@ -1206996,15 +1206995,15 @@ │ │ mov r0, r4 │ │ mvn r1, #3 │ │ bl 270c200 │ │ mvn r0, #3 │ │ str sl, [r4, #320] @ 0x140 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 1, cr1, [r5, #264]! @ 0x108 │ │ + stc2l 1, cr1, [r5, #444]! @ 0x1bc │ │ │ │ 023e3954 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #36 @ 0x24 │ │ mov r4, r0 │ │ ldr r0, [r0, #836] @ 0x344 │ │ @@ -1207206,23 +1207205,23 @@ │ │ cmp r2, #0 │ │ bne 23e3c1c │ │ b 23e3b9c │ │ ldr r1, [pc, #32] @ 23e3ca8 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 9, cr7, [r3, #162]! @ 0xa2 @ │ │ + stc2l 9, cr7, [r3, #252]! @ 0xfc @ │ │ stc2l 12, cr8, [r6, #496]! @ 0x1f0 │ │ - stc2l 15, cr2, [r5, #60]! @ 0x3c │ │ - stc2l 4, cr9, [r3, #316]! @ 0x13c │ │ - stc2l 13, cr2, [r5, #732]! @ 0x2dc │ │ - stc2l 1, cr11, [r5, #168]! @ 0xa8 │ │ - stc2l 7, cr1, [r4, #268]! @ 0x10c │ │ - stc2l 6, cr5, [r4, #768]! @ 0x300 │ │ - stc2l 7, cr6, [r6, #432]! @ 0x1b0 │ │ + stc2l 15, cr2, [r5, #240]! @ 0xf0 │ │ + stc2l 4, cr9, [r3, #496]! @ 0x1f0 │ │ + stc2l 13, cr2, [r5, #912]! @ 0x390 │ │ + stc2l 1, cr11, [r5, #348]! @ 0x15c │ │ + stc2l 7, cr1, [r4, #448]! @ 0x1c0 │ │ + stc2l 6, cr5, [r4, #948]! @ 0x3b4 │ │ + stc2l 7, cr6, [r6, #612]! @ 0x264 │ │ │ │ 023e3cb4 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ ldr r0, [r0, #760] @ 0x2f8 │ │ mov r6, r3 │ │ @@ -1207325,19 +1207324,19 @@ │ │ add r1, pc, r1 │ │ bl 270c480 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldr r1, [pc, #20] @ 23e3e70 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ - stc2l 5, cr13, [r3, #292]! @ 0x124 │ │ - stc2l 4, cr11, [r4, #280]! @ 0x118 │ │ - stc2l 5, cr7, [r3, #148]! @ 0x94 │ │ - stc2l 13, cr8, [r5, #880]! @ 0x370 │ │ - stc2l 6, cr5, [r3, #908]! @ 0x38c │ │ + stc2l 5, cr13, [r3, #472]! @ 0x1d8 │ │ + stc2l 4, cr11, [r4, #460]! @ 0x1cc │ │ + stc2l 5, cr7, [r3, #328]! @ 0x148 │ │ + stc2l 14, cr8, [r5, #36]! @ 0x24 │ │ + stc2l 7, cr5, [r3, #64]! @ 0x40 │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r5, r1 │ │ ldr r1, [r0, #852] @ 0x354 │ │ mov r4, r0 │ │ cmp r1, #0 │ │ beq 23e3ea4 │ │ @@ -1207393,15 +1207392,15 @@ │ │ pop {r4, r5, r6, sl, fp, pc} │ │ str r0, [r4, #852] @ 0x354 │ │ mov r0, r4 │ │ mov r1, #0 │ │ bl 270c780 │ │ mov r0, #1 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 4, cr2, [r6, #376]! @ 0x178 │ │ + stc2l 4, cr2, [r6, #556]! @ 0x22c │ │ │ │ 023e3f78 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ ldrb r4, [r0, #535] @ 0x217 │ │ cmp r4, #0 │ │ @@ -1207802,18 +1207801,18 @@ │ │ ldr r1, [pc, #32] @ 23e45dc │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ stc2l 8, cr4, [pc, #1008]! @ 23e49b8 │ │ stc2l 6, cr4, [pc, #304]! @ 23e46fc │ │ stc2l 9, cr4, [pc, #480]! @ 23e47b0 @ │ │ stc2l 6, cr4, [pc, #416]! @ 23e4774 │ │ - stc2l 7, cr0, [r3, #644]! @ 0x284 │ │ - stc2l 15, cr2, [r3, #832]! @ 0x340 │ │ - vcmla.f16 d30, d2, d4, #270 │ │ - stc2l 15, cr4, [r3, #560]! @ 0x230 │ │ + stc2l 7, cr0, [r3, #824]! @ 0x338 │ │ + stc2l 15, cr2, [r3, #1012]! @ 0x3f4 │ │ + stc2l 8, cr14, [r2, #196]! @ 0xc4 │ │ + stc2l 15, cr4, [r3, #740]! @ 0x2e4 │ │ │ │ 023e45e0 : │ │ cmp r0, #0 │ │ cmpne r1, #0 │ │ bne 23e45f0 │ │ bx lr │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ @@ -1208262,19 +1208261,19 @@ │ │ bl 270c0b0 │ │ ldr r1, [pc, #32] @ 23e4cf8 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c480 │ │ mov r0, r4 │ │ bl 270c480 │ │ - stc2l 3, cr12, [r4, #140]! @ 0x8c │ │ - stc2l 0, cr12, [r5, #452]! @ 0x1c4 │ │ - stc2l 6, cr5, [r6, #260]! @ 0x104 │ │ - stc2l 0, cr14, [r4, #660]! @ 0x294 │ │ - stc2l 4, cr4, [r4, #720]! @ 0x2d0 │ │ + stc2l 3, cr12, [r4, #320]! @ 0x140 │ │ + stc2l 0, cr12, [r5, #632]! @ 0x278 │ │ + stc2l 6, cr5, [r6, #440]! @ 0x1b8 │ │ + stc2l 0, cr14, [r4, #840]! @ 0x348 │ │ + stc2l 4, cr4, [r4, #900]! @ 0x384 │ │ │ │ 023e4cfc : │ │ ldrb r1, [r0, #312] @ 0x138 │ │ tst r1, #8 │ │ bne 23e4d50 │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ @@ -1208619,15 +1208618,15 @@ │ │ b 23e50b4 │ │ ldr r1, [pc, #16] @ 23e5264 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ stc2l 12, cr3, [pc, #424]! @ 23e540c │ │ stc2l 12, cr3, [pc, #420]! @ 23e540c │ │ - stc2l 0, cr5, [r6, #460]! @ 0x1cc │ │ + stc2l 0, cr5, [r6, #640]! @ 0x280 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ sub sp, sp, #1024 @ 0x400 │ │ mov r4, r0 │ │ ldr r0, [r0, #320] @ 0x140 │ │ cmp r0, r1 │ │ @@ -1208731,16 +1208730,16 @@ │ │ mov r0, r4 │ │ mov r1, r2 │ │ mov r4, r2 │ │ bl 270c200 │ │ mov r0, r4 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - vcmla.f16 , , , #270 │ │ - stc2l 10, cr13, [r4, #532]! @ 0x214 @ │ │ + stc2l 8, cr11, [r5, #1000]! @ 0x3e8 │ │ + stc2l 10, cr13, [r4, #712]! @ 0x2c8 @ │ │ ldrb r3, [r0, #11] │ │ ldr r2, [r0, #4] │ │ add r0, r3, #7 │ │ cmp r2, r0, lsr #3 │ │ bxls lr │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ @@ -1209350,22 +1209349,22 @@ │ │ ldrhne r0, [r4, #114] @ 0x72 │ │ orrne r0, r0, #16 │ │ strhne r0, [r4, #114] @ 0x72 │ │ mov r0, r5 │ │ bl 270c230 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 5, cr7, [r4, #680]! @ 0x2a8 │ │ - stc2l 12, cr2, [r6, #512]! @ 0x200 │ │ - stc2l 13, cr0, [r5, #444]! @ 0x1bc │ │ - stc2l 5, cr7, [r4, #348]! @ 0x15c │ │ - stc2l 15, cr10, [r5, #1020]! @ 0x3fc │ │ - stc2l 0, cr13, [r2, #820]! @ 0x334 │ │ - stc2l 4, cr3, [r4, #632]! @ 0x278 │ │ - stc2l 5, cr11, [r3, #348]! @ 0x15c │ │ + stc2l 5, cr7, [r4, #860]! @ 0x35c │ │ + stc2l 12, cr2, [r6, #692]! @ 0x2b4 │ │ + stc2l 13, cr0, [r5, #624]! @ 0x270 │ │ + stc2l 5, cr7, [r4, #528]! @ 0x210 │ │ + stc2l 0, cr11, [r5, #176]! @ 0xb0 │ │ + stc2l 0, cr13, [r2, #1000]! @ 0x3e8 │ │ + stc2l 4, cr3, [r4, #812]! @ 0x32c │ │ + stc2l 5, cr11, [r3, #528]! @ 0x210 │ │ │ │ 023e5dd0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #52 @ 0x34 │ │ mov r5, r0 │ │ ldr r0, [pc, #388] @ 23e5f6c │ │ @@ -1209463,29 +1209462,29 @@ │ │ ldrhne r0, [r4, #114] @ 0x72 │ │ orrne r0, r0, #16 │ │ strhne r0, [r4, #114] @ 0x72 │ │ mov r0, r5 │ │ bl 270c230 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 12, cr0, [r5, #92]! @ 0x5c │ │ - stc2l 3, cr7, [r4, #1020]! @ 0x3fc │ │ - stc2l 3, cr9, [r4, #648]! @ 0x288 │ │ - stc2l 14, cr10, [r5, #540]! @ 0x21c │ │ - stc2l 15, cr12, [r2, #340]! @ 0x154 │ │ - stc2l 14, cr14, [r2, #792]! @ 0x318 │ │ - stc2l 3, cr3, [r4, #24]! │ │ - stc2l 3, cr11, [r3, #764]! @ 0x2fc │ │ - stc2l 1, cr11, [r4, #100]! @ 0x64 │ │ + stc2l 12, cr0, [r5, #272]! @ 0x110 │ │ + stc2l 4, cr7, [r4, #176]! @ 0xb0 │ │ + stc2l 3, cr9, [r4, #828]! @ 0x33c │ │ + stc2l 14, cr10, [r5, #720]! @ 0x2d0 │ │ + stc2l 15, cr12, [r2, #520]! @ 0x208 │ │ + stc2l 14, cr14, [r2, #972]! @ 0x3cc │ │ + stc2l 3, cr3, [r4, #204]! @ 0xcc │ │ + stc2l 3, cr11, [r3, #944]! @ 0x3b0 │ │ + stc2l 1, cr11, [r4, #280]! @ 0x118 │ │ │ │ 023e5f90 : │ │ ldr r1, [pc, #4] @ 23e5f9c │ │ add r1, pc, r1 │ │ b 270c0d0 │ │ - stc2l 9, cr2, [r6, #210]! @ 0xd2 @ │ │ + stc2l 9, cr2, [r6, #300]! @ 0x12c @ │ │ │ │ 023e5fa0 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ cmp r0, #0 │ │ cmpne r1, #0 │ │ bne 23e5fb8 │ │ @@ -1209520,15 +1209519,15 @@ │ │ str r0, [r8, #8] │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ ldr r1, [pc, #12] @ 23e6040 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ pop {r4, r5, r6, r7, r8, sl, fp, lr} │ │ b 270c0d0 │ │ - stc2l 13, cr14, [r2, #156]! @ 0x9c │ │ + stc2l 13, cr14, [r2, #336]! @ 0x150 │ │ │ │ 023e6044 : │ │ cmp r0, #0 │ │ cmpne r1, #0 │ │ bxeq lr │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ @@ -1209563,15 +1209562,15 @@ │ │ mov r0, r5 │ │ bl 270c210 │ │ mov r0, r5 │ │ mov r1, r4 │ │ sub sp, fp, #8 │ │ pop {r4, r5, fp, lr} │ │ b 270c230 │ │ - stc2l 1, cr11, [r3, #1020]! @ 0x3fc │ │ + stc2l 2, cr11, [r3, #176]! @ 0xb0 │ │ │ │ 023e60e0 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ cmp r0, #0 │ │ cmpne r1, #0 │ │ bne 23e60f8 │ │ @@ -1209614,16 +1209613,16 @@ │ │ str r2, [r1, #244] @ 0xf4 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldr r1, [pc, #16] @ 23e61a4 │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ pop {r4, r5, r6, r7, fp, lr} │ │ b 270c0d0 │ │ - stc2l 1, cr11, [r3, #576]! @ 0x240 │ │ - stc2l 0, cr7, [r4, #504]! @ 0x1f8 │ │ + stc2l 1, cr11, [r3, #756]! @ 0x2f4 │ │ + stc2l 0, cr7, [r4, #684]! @ 0x2ac │ │ │ │ 023e61a8 : │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r6, r7, r8, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ @@ -1209856,20 +1209855,20 @@ │ │ ldr r1, [pc, #40] @ 23e6564 │ │ add r1, pc, r1 │ │ mov r0, r9 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 270c0d0 │ │ stc2l 11, cr9, [r6, #836]! @ 0x344 @ │ │ - stc2l 14, cr8, [r3, #828]! @ 0x33c │ │ - stc2l 1, cr14, [r5, #536]! @ 0x218 │ │ - stc2l 12, cr8, [r4, #836]! @ 0x344 │ │ - stc2l 14, cr15, [r5, #696]! @ 0x2b8 │ │ - stc2l 11, cr4, [r4, #724]! @ 0x2d4 @ │ │ - stc2l 13, cr10, [r3, #600]! @ 0x258 │ │ + stc2l 14, cr8, [r3, #1008]! @ 0x3f0 │ │ + stc2l 1, cr14, [r5, #716]! @ 0x2cc │ │ + stc2l 12, cr8, [r4, #1016]! @ 0x3f8 │ │ + stc2l 14, cr15, [r5, #876]! @ 0x36c │ │ + stc2l 11, cr4, [r4, #904]! @ 0x388 @ │ │ + stc2l 13, cr10, [r3, #780]! @ 0x30c │ │ │ │ 023e6568 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ cmp r0, #0 │ │ movne r4, r1 │ │ @@ -1209963,19 +1209962,19 @@ │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 270c0d0 │ │ ldr r1, [pc, #16] @ 23e66fc │ │ mov r0, r9 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 3, cr0, [r5, #360]! @ 0x168 │ │ - stc2l 3, cr0, [r5, #232]! @ 0xe8 │ │ - stc2l 2, cr2, [r6, #256]! @ 0x100 │ │ - stc2l 7, cr12, [r2, #984]! @ 0x3d8 │ │ - vcmla.f16 d24, d5, d20, #270 │ │ + stc2l 3, cr0, [r5, #540]! @ 0x21c │ │ + stc2l 3, cr0, [r5, #412]! @ 0x19c │ │ + stc2l 2, cr2, [r6, #436]! @ 0x1b4 │ │ + vcmla.f16 d28, d2, d19, #270 │ │ + stc2l 8, cr8, [r5, #324]! @ 0x144 │ │ │ │ 023e6708 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ vpush {d8} │ │ sub sp, sp, #48 @ 0x30 │ │ vldr d16, [fp, #8] │ │ @@ -1210017,16 +1210016,16 @@ │ │ b 23e67b4 │ │ ldr r1, [pc, #20] @ 23e67c8 │ │ add r1, pc, r1 │ │ sub sp, fp, #32 │ │ vpop {d8} │ │ pop {r4, r5, r6, r7, r8, sl, fp, lr} │ │ b 270c0d0 │ │ - stc2l 10, cr0, [r4, #844]! @ 0x34c @ │ │ - stc2l 10, cr8, [r4, #296]! @ 0x128 @ │ │ + stc2l 11, cr0, [r4] @ │ │ + stc2l 10, cr8, [r4, #476]! @ 0x1dc @ │ │ │ │ 023e67cc : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #40 @ 0x28 │ │ cmp r3, #0 │ │ ble 23e6840 │ │ @@ -1210058,16 +1210057,16 @@ │ │ add r1, pc, r1 │ │ b 23e6854 │ │ ldr r1, [pc, #16] @ 23e6864 │ │ add r1, pc, r1 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, lr} │ │ b 270c0d0 │ │ - stc2l 10, cr0, [r4, #204]! @ 0xcc @ │ │ - stc2l 9, cr8, [r4, #340]! @ 0x154 @ │ │ + stc2l 10, cr0, [r4, #384]! @ 0x180 @ │ │ + stc2l 9, cr8, [r4, #430]! @ 0x1ae @ │ │ │ │ 023e6868 : │ │ cmp r0, #0 │ │ cmpne r1, #0 │ │ ldrne r0, [sp] │ │ strbne r0, [r1, #200] @ 0xc8 │ │ ldrne r0, [r1, #8] │ │ @@ -1210142,17 +1210141,17 @@ │ │ strh r5, [r6, #20] │ │ str r0, [r6, #8] │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ ldr r1, [pc, #16] @ 23e69a8 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 0, cr12, [r5, #132]! @ 0x84 │ │ - stc2l 0, cr12, [r5, #36]! @ 0x24 │ │ - stc2l 4, cr4, [r5, #1004]! @ 0x3ec │ │ + stc2l 0, cr12, [r5, #312]! @ 0x138 │ │ + stc2l 0, cr12, [r5, #216]! @ 0xd8 │ │ + stc2l 5, cr4, [r5, #160]! @ 0xa0 │ │ │ │ 023e69ac : │ │ cmp r0, #0 │ │ bxeq lr │ │ cmp r1, #0 │ │ cmpne r2, #0 │ │ bne 23e69c4 │ │ @@ -1210288,30 +1210287,30 @@ │ │ bl 270c0f0 │ │ ldr r1, [pc, #24] @ 23e6bd0 │ │ add r1, pc, r1 │ │ mov r0, r5 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 270c260 │ │ - stc2l 6, cr4, [r4, #308]! @ 0x134 │ │ - stc2l 11, cr13, [r5, #16]! @ │ │ - stc2l 6, cr8, [r4, #392]! @ 0x188 │ │ + stc2l 6, cr4, [r4, #488]! @ 0x1e8 │ │ + stc2l 11, cr13, [r5, #196]! @ 0xc4 @ │ │ + stc2l 6, cr8, [r4, #572]! @ 0x23c │ │ │ │ 023e6bd4 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ bl 270ca30 │ │ cmp r0, #0 │ │ popeq {r4, sl, fp, pc} │ │ ldr r1, [pc, #8] @ 23e6bfc │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 9, cr2, [r3, #230]! @ 0xe6 @ │ │ + stc2l 9, cr2, [r3, #320]! @ 0x140 @ │ │ │ │ 023e6c00 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r4, r0 │ │ mov r0, #0 │ │ @@ -1210500,17 +1210499,17 @@ │ │ ldr r0, [sp, #12] │ │ add r1, pc, r1 │ │ mov r2, #1 │ │ bl 270c220 │ │ mov r0, #1 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 11, cr13, [r4, #632]! @ 0x278 @ │ │ + stc2l 11, cr13, [r4, #812]! @ 0x32c @ │ │ stc2l 10, cr5, [r6, #128]! @ 0x80 @ │ │ - stc2l 2, cr4, [r4, #212]! @ 0xd4 │ │ + stc2l 2, cr4, [r4, #392]! @ 0x188 │ │ │ │ 023e6f14 : │ │ cmp r0, #0 │ │ beq 23e6f28 │ │ cmp r1, #0 │ │ cmpne r2, #0 │ │ bne 23e6f2c │ │ @@ -1210541,15 +1210540,15 @@ │ │ ldr r3, [r2, #4] │ │ ldr r2, [r1, #8] │ │ str r0, [r1, #140] @ 0x8c │ │ orr r0, r2, #512 @ 0x200 │ │ str r3, [r1, #144] @ 0x90 │ │ str r0, [r1, #8] │ │ bx lr │ │ - stc2l 3, cr15, [r5, #288]! @ 0x120 │ │ + stc2l 3, cr15, [r5, #468]! @ 0x1d4 │ │ │ │ 023e6fa8 : │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ mov r4, r1 │ │ @@ -1210632,15 +1210631,15 @@ │ │ str r1, [r4, #244] @ 0xf4 │ │ pop {r4, r5, r6, r7, r8, r9, fp, lr} │ │ bx lr │ │ ldrh r1, [r9, #6] │ │ cmp r1, r0 │ │ bhi 23e70a8 │ │ b 23e70b8 │ │ - stc2l 1, cr8, [r3, #544]! @ 0x220 │ │ + stc2l 1, cr8, [r3, #724]! @ 0x2d4 │ │ │ │ 023e710c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ cmp r2, #0 │ │ beq 23e7134 │ │ @@ -1210738,17 +1210737,17 @@ │ │ ldr r1, [pc, #28] @ 23e72b0 │ │ add r1, pc, r1 │ │ mov r0, r9 │ │ mov r2, #1 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 270c220 │ │ - stc2l 11, cr11, [r3, #884]! @ 0x374 @ │ │ - stc2l 3, cr2, [r3, #948]! @ 0x3b4 │ │ - stc2l 13, cr9, [r4, #500]! @ 0x1f4 │ │ + stc2l 12, cr11, [r3, #40]! @ 0x28 │ │ + stc2l 4, cr2, [r3, #104]! @ 0x68 │ │ + stc2l 13, cr9, [r4, #680]! @ 0x2a8 │ │ │ │ 023e72b4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ cmp r2, #0 │ │ beq 23e72dc │ │ @@ -1210846,18 +1210845,18 @@ │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 270c220 │ │ ldr r1, [pc, #20] @ 23e745c │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 9, cr1, [r5, #240]! @ 0xf0 @ │ │ - stc2l 14, cr7, [r3, #328]! @ 0x148 │ │ - stc2l 14, cr5, [r4, #40]! @ 0x28 │ │ - stc2l 14, cr2, [r6, #812]! @ 0x32c │ │ + stc2l 9, cr1, [r5, #330]! @ 0x14a @ │ │ + stc2l 14, cr7, [r3, #508]! @ 0x1fc │ │ + stc2l 14, cr5, [r4, #220]! @ 0xdc │ │ + stc2l 14, cr2, [r6, #992]! @ 0x3e0 │ │ │ │ 023e7460 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ cmp r0, #0 │ │ cmpne r1, #0 │ │ bne 23e7478 │ │ @@ -1210914,17 +1210913,17 @@ │ │ add r2, r2, r2, lsl #2 │ │ add r1, r1, r2, lsl #2 │ │ strb r0, [r1, #16] │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldr r1, [pc, #12] @ 23e7560 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 14, cr2, [r6, #272]! @ 0x110 │ │ - vcmla.f16 d17, d5, d16, #270 │ │ - stc2l 13, cr2, [r6, #780]! @ 0x30c │ │ + stc2l 14, cr2, [r6, #452]! @ 0x1c4 │ │ + vcmla.f16 , , , #270 │ │ + stc2l 13, cr2, [r6, #960]! @ 0x3c0 │ │ │ │ 023e7564 : │ │ cmp r0, #0 │ │ moveq r0, #0 │ │ movne r2, r0 │ │ andne r0, r1, #5 │ │ strne r0, [r2, #788] @ 0x314 │ │ @@ -1211066,18 +1211065,18 @@ │ │ mov r0, r5 │ │ str r4, [r0, #772] @ 0x304 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r4, #0 │ │ mov r1, #0 │ │ b 23e776c │ │ - stc2l 4, cr13, [r4, #988]! @ 0x3dc │ │ + stc2l 5, cr13, [r4, #144]! @ 0x90 │ │ stc2l 5, cr1, [pc, #852]! @ 23e7b08 │ │ stc2l 1, cr5, [r6, #136]! @ 0x88 │ │ - stc2l 7, cr11, [r4, #636]! @ 0x27c │ │ + stc2l 7, cr11, [r4, #816]! @ 0x330 │ │ │ │ 023e77b8 : │ │ cmp r0, #0 │ │ strne r1, [r0, #756] @ 0x2f4 │ │ strne r2, [r0, #760] @ 0x2f8 │ │ bx lr │ │ │ │ @@ -1211141,17 +1211140,17 @@ │ │ mov r1, r2 │ │ bl 270ca90 │ │ str r5, [r4, #384] @ 0x180 │ │ pop {r4, r5, fp, pc} │ │ ldr r1, [pc, #4] @ 23e78bc │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 14, cr12, [r5, #88]! @ 0x58 │ │ - stc2l 10, cr7, [r3, #172]! @ 0xac @ │ │ - stc2l 13, cr15, [r2, #144]! @ 0x90 │ │ + stc2l 14, cr12, [r5, #268]! @ 0x10c │ │ + stc2l 10, cr7, [r3, #352]! @ 0x160 @ │ │ + stc2l 13, cr15, [r2, #324]! @ 0x144 │ │ │ │ 023e78c8 : │ │ cmp r0, #0 │ │ cmpne r1, #0 │ │ ldrne r0, [r1, #8] │ │ bicne r0, r0, r2 │ │ strne r0, [r1, #8] │ │ @@ -1211278,16 +1211277,16 @@ │ │ mov r1, r4 │ │ add r2, pc, r2 │ │ bl 270c470 │ │ mov r8, r5 │ │ mov r0, r8 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - vcmla.f16 d21, d4, d14, #270 │ │ - vcmla.f16 , , , #270 │ │ + stc2l 8, cr5, [r4, #236]! @ 0xec │ │ + stc2l 8, cr9, [r3, #584]! @ 0x248 │ │ │ │ 023e7ab0 : │ │ cmp r0, #0 │ │ ldrne r1, [r0, #316] @ 0x13c │ │ orrne r1, r1, #1 │ │ strne r1, [r0, #316] @ 0x13c │ │ bx lr │ │ @@ -1211382,16 +1211381,16 @@ │ │ b 23e7bbc │ │ ldr r1, [pc, #20] @ 23e7c14 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ ldr r1, [pc, #4] @ 23e7c10 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 7, cr2, [r6, #216]! @ 0xd8 │ │ - stc2l 5, cr3, [r4, #268]! @ 0x10c │ │ + stc2l 7, cr2, [r6, #396]! @ 0x18c │ │ + stc2l 5, cr3, [r4, #448]! @ 0x1c0 │ │ │ │ 023e7c18 : │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ ldrb r3, [r0, #309] @ 0x135 │ │ @@ -1211432,16 +1211431,16 @@ │ │ mov r0, r4 │ │ ldr r1, [r0, #316] @ 0x13c │ │ tst r1, #32768 @ 0x8000 │ │ pop {r4, sl, fp, lr} │ │ orrne r1, r1, #16777216 @ 0x1000000 │ │ strne r1, [r0, #316] @ 0x13c │ │ bx lr │ │ - stc2l 6, cr2, [r6, #600]! @ 0x258 │ │ - stc2l 4, cr3, [r4, #652]! @ 0x28c │ │ + stc2l 6, cr2, [r6, #780]! @ 0x30c │ │ + stc2l 4, cr3, [r4, #832]! @ 0x340 │ │ │ │ 023e7cd8 : │ │ cmp r0, #0 │ │ ldrne r1, [r0, #316] @ 0x13c │ │ orrne r1, r1, #131072 @ 0x20000 │ │ strne r1, [r0, #316] @ 0x13c │ │ bx lr │ │ @@ -1211938,15 +1211937,15 @@ │ │ strb r3, [r0, #305] @ 0x131 │ │ strb r2, [r0, #304] @ 0x130 │ │ str r1, [r0, #300] @ 0x12c │ │ bx lr │ │ ldr r1, [pc, #4] @ 23e8468 │ │ add r1, pc, r1 │ │ b 270c4b0 │ │ - stc2l 9, cr12, [r2, #70]! @ 0x46 @ │ │ + stc2l 9, cr12, [r2, #160]! @ 0xa0 @ │ │ │ │ 023e846c : │ │ cmp r0, #0 │ │ ldrne r0, [r0, #300] @ 0x12c │ │ moveq r0, #0 │ │ bx lr │ │ │ │ @@ -1211968,15 +1211967,15 @@ │ │ beq 23e84ac │ │ bx r3 │ │ push {fp, lr} │ │ mov fp, sp │ │ ldr r1, [pc, #4] @ 23e84c0 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 14, cr6, [r3, #56]! @ 0x38 │ │ + stc2l 14, cr6, [r3, #236]! @ 0xec │ │ │ │ 023e84c4 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ beq 23e8504 │ │ ldr r3, [r0, #288] @ 0x120 │ │ @@ -1211988,15 +1211987,15 @@ │ │ cmp r0, r5 │ │ popeq {r4, r5, fp, pc} │ │ ldr r1, [pc, #12] @ 23e8508 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 7, cr4, [r5, #320]! @ 0x140 │ │ + stc2l 7, cr4, [r5, #500]! @ 0x1f4 │ │ │ │ 023e850c : │ │ ldr r1, [r0, #568] @ 0x238 │ │ cmp r1, #0 │ │ bxeq lr │ │ bx r1 │ │ │ │ @@ -1212027,15 +1212026,15 @@ │ │ mov r2, #0 │ │ str r2, [r0, #284] @ 0x11c │ │ add r1, pc, r1 │ │ b 270c0d0 │ │ bx lr │ │ eorseq r2, r5, ip, ror #27 │ │ ldrsbteq r2, [r5], -r4 │ │ - stc2l 8, cr10, [r3, #220]! @ 0xdc │ │ + vcmla.f16 q13, , q10, #270 │ │ │ │ 023e8590 : │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #16 │ │ @@ -1212131,16 +1212130,16 @@ │ │ ldr r1, [pc, #20] @ 23e8724 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0d0 │ │ mov r0, #0 │ │ str r0, [r4, #788] @ 0x314 │ │ b 23e85dc │ │ - stc2l 9, cr0, [r4, #440]! @ 0x1b8 @ │ │ - stc2l 15, cr14, [r2, #344]! @ 0x158 │ │ + stc2l 10, cr0, [r4, #36]! @ 0x24 @ │ │ + stc2l 15, cr14, [r2, #524]! @ 0x20c │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ mov r5, r0 │ │ ldr r0, [r1, #252] @ 0xfc │ │ cmp r0, #0 │ │ beq 23e87ec │ │ cmp r0, #1 │ │ @@ -1212182,15 +1212181,15 @@ │ │ b 23e8768 │ │ mov r0, r5 │ │ mov r1, r8 │ │ bl 270c0d0 │ │ ldr r3, [r6, #12] │ │ b 23e8774 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - stc2l 11, cr14, [r3, #412]! @ 0x19c @ │ │ + stc2l 11, cr14, [r3, #592]! @ 0x250 @ │ │ │ │ 023e87f4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ cmp r0, #0 │ │ movne r5, r1 │ │ @@ -1212413,15 +1212412,15 @@ │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 23e872c │ │ ldr r1, [pc, #8] @ 23e8b84 │ │ mov r0, sl │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 11, cr11, [r5, #440]! @ 0x1b8 @ │ │ + stc2l 11, cr11, [r5, #620]! @ 0x26c @ │ │ │ │ 023e8b88 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ cmp r0, #0 │ │ beq 23e8d3c │ │ @@ -1212531,16 +1212530,16 @@ │ │ b 270cc50 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [pc, #12] @ 23e8d58 │ │ mov r0, sl │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 7, cr6, [r3, #40]! @ 0x28 │ │ - stc2l 1, cr10, [r3, #56]! @ 0x38 │ │ + stc2l 7, cr6, [r3, #220]! @ 0xdc │ │ + stc2l 1, cr10, [r3, #236]! @ 0xec │ │ │ │ 023e8d5c : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ ldm r1, {ip, lr} │ │ ldr r2, [r1, #8] │ │ ldr r3, [r1, #12] │ │ @@ -1212921,16 +1212920,16 @@ │ │ blx r3 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ ldr r1, [pc, #8] @ 23e933c │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 14, cr1, [r4, #208]! @ 0xd0 │ │ - stc2l 0, cr2, [r4, #868]! @ 0x364 │ │ + stc2l 14, cr1, [r4, #388]! @ 0x184 │ │ + stc2l 1, cr2, [r4, #24]! │ │ │ │ 023e9344 : │ │ cmp r0, #0 │ │ bxeq lr │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ mov r4, r1 │ │ @@ -1213138,17 +1213137,17 @@ │ │ str r0, [r4, #492] @ 0x1ec │ │ strb r5, [r4, #526] @ 0x20e │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldr r1, [pc, #16] @ 23e9680 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 3, cr15, [r5, #1000]! @ 0x3e8 │ │ - stc2l 7, cr9, [r4, #808]! @ 0x328 │ │ - stc2l 13, cr0, [r6, #24]! │ │ + stc2l 4, cr15, [r5, #156]! @ 0x9c │ │ + stc2l 7, cr9, [r4, #988]! @ 0x3dc │ │ + stc2l 13, cr0, [r6, #204]! @ 0xcc │ │ │ │ 023e9684 : │ │ bx lr │ │ │ │ 023e9688 : │ │ bx lr │ │ │ │ @@ -1213190,15 +1213189,15 @@ │ │ add r1, pc, r1 │ │ mov r0, r4 │ │ bl 270c0d0 │ │ str r5, [r4, #396] @ 0x18c │ │ pop {r4, r5, fp, lr} │ │ bx lr │ │ stc2l 0, cr3, [r6, #428]! @ 0x1ac │ │ - stc2l 8, cr3, [r3, #496]! @ 0x1f0 │ │ + vcmla.f16 d19, d19, d25, #270 │ │ │ │ 023e971c : │ │ cmp r0, #0 │ │ bxeq lr │ │ cmp r1, #8 │ │ beq 23e9758 │ │ push {r4, r5, fp, lr} │ │ @@ -1213210,15 +1213209,15 @@ │ │ mov r1, r2 │ │ bl 270c0d0 │ │ mov r0, r4 │ │ mov r1, r5 │ │ pop {r4, r5, fp, lr} │ │ str r1, [r0, #392] @ 0x188 │ │ bx lr │ │ - stc2l 11, cr7, [r3, #864]! @ 0x360 @ │ │ + stc2l 12, cr7, [r3, #20]! │ │ │ │ 023e9764 : │ │ cmp r0, #0 │ │ strne r1, [r0, #408] @ 0x198 │ │ bx lr │ │ │ │ 023e9770 : │ │ @@ -1213251,15 +1213250,15 @@ │ │ add r1, pc, r1 │ │ mov r0, r4 │ │ bl 270c0d0 │ │ str r5, [r4, #416] @ 0x1a0 │ │ pop {r4, r5, fp, lr} │ │ bx lr │ │ stc2l 15, cr2, [r6, #636]! @ 0x27c │ │ - stc2l 7, cr3, [r3, #704]! @ 0x2c0 │ │ + stc2l 7, cr3, [r3, #884]! @ 0x374 │ │ │ │ 023e97e8 : │ │ cmp r0, #0 │ │ bxeq lr │ │ cmp r1, #8 │ │ beq 23e9824 │ │ push {r4, r5, fp, lr} │ │ @@ -1213271,15 +1213270,15 @@ │ │ mov r1, r2 │ │ bl 270c0d0 │ │ mov r0, r4 │ │ mov r1, r5 │ │ pop {r4, r5, fp, lr} │ │ str r1, [r0, #412] @ 0x19c │ │ bx lr │ │ - stc2l 11, cr7, [r3, #48]! @ 0x30 @ │ │ + stc2l 11, cr7, [r3, #228]! @ 0xe4 @ │ │ │ │ 023e9830 : │ │ cmp r0, #0 │ │ strne r1, [r0, #644] @ 0x284 │ │ bx lr │ │ │ │ 023e983c : │ │ @@ -1213403,16 +1213402,16 @@ │ │ tst r6, #8 │ │ beq 23e9970 │ │ mov r0, r4 │ │ bl 270c7d0 │ │ tst r6, #1024 @ 0x400 │ │ bne 23e9978 │ │ b 23e9980 │ │ - stc2l 13, cr10, [r5, #852]! @ 0x354 │ │ - stc2l 0, cr9, [r5, #560]! @ 0x230 │ │ + stc2l 14, cr10, [r5, #8]! │ │ + stc2l 0, cr9, [r5, #740]! @ 0x2e4 │ │ │ │ 023e9a2c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #52 @ 0x34 │ │ mov r4, #0 │ │ cmp r0, #0 │ │ @@ -1213476,16 +1213475,16 @@ │ │ movwhi r5, #0 │ │ mov r4, r5 │ │ str r0, [r9] │ │ mov r0, r4 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ andeq r0, r0, r8, ror #3 │ │ - stc2l 3, cr5, [r5, #960]! @ 0x3c0 │ │ - stc2l 3, cr11, [r2, #328]! @ 0x148 │ │ + stc2l 4, cr5, [r5, #116]! @ 0x74 │ │ + stc2l 3, cr11, [r2, #508]! @ 0x1fc │ │ nop {0} │ │ nop {0} │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #24 │ │ mov r5, #0 │ │ mov r4, r0 │ │ @@ -1213564,18 +1213563,18 @@ │ │ @ instruction: 0xffffffff │ │ andeq r0, r0, r8 │ │ andeq r0, r0, pc │ │ andeq r0, r0, r8 │ │ andeq r0, r0, r1 │ │ @ instruction: 0xffffffff │ │ andeq r0, r0, r8 │ │ - stc2l 0, cr7, [r4, #736]! @ 0x2e0 │ │ + stc2l 0, cr7, [r4, #916]! @ 0x394 │ │ mlaseq r5, r8, r7, r1 │ │ mlaseq r5, r4, r7, r1 │ │ - stc2l 9, cr15, [r2, #112]! @ 0x70 @ │ │ + stc2l 9, cr15, [r2, #202]! @ 0xca @ │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0] │ │ mov r1, r4 │ │ ldr r0, [r0] │ │ ldr r2, [pc, #28] @ 23e9cec │ │ @@ -1213640,16 +1213639,16 @@ │ │ mov r4, r0 │ │ mov r0, r5 │ │ bl 270c420 │ │ mov r0, r4 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ andeq r0, r0, r8, lsr r0 │ │ - stc2l 0, cr11, [r2, #836]! @ 0x344 │ │ - stc2l 2, cr7, [r4, #944]! @ 0x3b0 │ │ + stc2l 0, cr11, [r2, #1016]! @ 0x3f8 │ │ + stc2l 3, cr7, [r4, #100]! @ 0x64 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #140 @ 0x8c │ │ sub sp, sp, #1024 @ 0x400 │ │ ldr sl, [r0] │ │ mov r9, r0 │ │ mov r4, #0 │ │ @@ -1214366,34 +1214365,34 @@ │ │ ldr r0, [r0] │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldr r1, [pc, #84] @ 23ea96c │ │ mov r0, r7 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 9, cr12, [r3, #450]! @ 0x1c2 @ │ │ - stc2l 10, cr15, [r5, #636]! @ 0x27c @ │ │ - stc2l 8, cr14, [r3, #872]! @ 0x368 │ │ + stc2l 10, cr12, [r3, #56]! @ 0x38 @ │ │ + stc2l 10, cr15, [r5, #816]! @ 0x330 @ │ │ + stc2l 9, cr14, [r3, #14]! @ │ │ ldrhteq r1, [r5], -r0 │ │ eorseq r1, r5, ip, ror r0 │ │ eorseq r1, r5, r8, rrx │ │ eorseq r0, r5, ip, lsl pc │ │ eorseq r0, r5, r0, lsl #30 │ │ eorseq r0, r5, r0, ror pc │ │ eorseq r0, r5, r4, asr #30 │ │ ldrsbteq r0, [r5], -r8 │ │ eorseq r0, r5, r0, asr #27 │ │ eorseq r0, r5, r4, lsr sp │ │ eorseq r0, r5, ip, lsl sp │ │ eorseq r0, r5, ip, lsl #29 │ │ eorseq r0, r5, r4, ror lr │ │ - stc2l 15, cr4, [r5, #16]! │ │ + stc2l 15, cr4, [r5, #196]! @ 0xc4 │ │ andeq r0, r0, r8, asr r5 │ │ andeq r0, r0, r8, asr r3 │ │ - stc2l 4, cr14, [r4, #224]! @ 0xe0 │ │ + stc2l 4, cr14, [r4, #404]! @ 0x194 │ │ │ │ 023ea970 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #52 @ 0x34 │ │ mov r6, #0 │ │ cmp r0, #0 │ │ @@ -1214502,19 +1214501,19 @@ │ │ cmp r0, #0 │ │ beq 23eab30 │ │ bl 2702800 │ │ ldr r7, [r0] │ │ b 23eaad0 │ │ mov r6, #1 │ │ b 23eab08 │ │ - stc2l 14, cr15, [r2, #804]! @ 0x324 │ │ + stc2l 14, cr15, [r2, #984]! @ 0x3d8 │ │ @ instruction: 0xfffff388 │ │ - stc2l 5, cr6, [r4, #592]! @ 0x250 │ │ - vcmla.f16 q9, q10, q0, #270 │ │ - vcmla.f16 q14, , q9, #270 │ │ + stc2l 5, cr6, [r4, #772]! @ 0x304 │ │ + vcmla.f16 q9, q10, , #270 │ │ + stc2l 9, cr12, [r3, #30]! @ │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r4, [r0, #288] @ 0x120 │ │ ldr r3, [r4, #40] @ 0x28 │ │ adds r5, r3, r2 │ │ bcs 23eab90 │ │ cmp r2, #0 │ │ @@ -1214527,15 +1214526,15 @@ │ │ add r0, r0, r3 │ │ bl 26fe32c │ │ str r5, [r4, #40] @ 0x28 │ │ pop {r4, r5, fp, pc} │ │ ldr r1, [pc, #4] @ 23eab9c │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 0, cr2, [r5, #784]! @ 0x310 │ │ + stc2l 0, cr2, [r5, #964]! @ 0x3c4 │ │ bx lr │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ str r0, [sp, #16] │ │ ldr r0, [r0] │ │ ldr r1, [r0] │ │ @@ -1214654,15 +1214653,15 @@ │ │ mov r0, #1 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [pc, #8] @ 23ead98 │ │ ldr r0, [sp, #12] │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 15, cr5, [r5, #304]! @ 0x130 │ │ + stc2l 15, cr5, [r5, #484]! @ 0x1e4 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ ldr r3, [r0] │ │ ldr r8, [r0, #20] │ │ ldr r9, [r0, #28] │ │ ldr r1, [r3, #16] │ │ @@ -1215854,23 +1215853,23 @@ │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldr r1, [pc, #12] @ 23ec00c │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - vcmla.f16 d29, d2, d12, #270 │ │ - stc2l 3, cr14, [r5, #708]! @ 0x2c4 │ │ - stc2l 11, cr6, [r5, #196]! @ 0xc4 @ │ │ - stc2l 2, cr5, [r4, #184]! @ 0xb8 │ │ - stc2l 5, cr14, [r5, #996]! @ 0x3e4 │ │ - stc2l 3, cr3, [r3, #112]! @ 0x70 │ │ - stc2l 7, cr11, [r2, #672]! @ 0x2a0 │ │ - stc2l 13, cr0, [r5, #796]! @ 0x31c │ │ - stc2l 4, cr15, [r2, #276]! @ 0x114 │ │ + stc2l 8, cr13, [r2, #228]! @ 0xe4 │ │ + stc2l 3, cr14, [r5, #888]! @ 0x378 │ │ + stc2l 11, cr6, [r5, #376]! @ 0x178 @ │ │ + stc2l 2, cr5, [r4, #364]! @ 0x16c │ │ + stc2l 6, cr14, [r5, #152]! @ 0x98 │ │ + stc2l 3, cr3, [r3, #292]! @ 0x124 │ │ + stc2l 7, cr11, [r2, #852]! @ 0x354 │ │ + stc2l 13, cr0, [r5, #976]! @ 0x3d0 │ │ + stc2l 4, cr15, [r2, #456]! @ 0x1c8 │ │ │ │ 023ec02c : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ mov r4, r0 │ │ ldrb r0, [r0, #527] @ 0x20f │ │ @@ -1215967,17 +1215966,17 @@ │ │ pop {r4, r5, r6, r7, fp, pc} │ │ ldr r1, [pc, #20] @ 23ec1c8 │ │ add r1, pc, r1 │ │ mov r0, r4 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, lr} │ │ b 270c0d0 │ │ - stc2l 13, cr6, [r4, #252]! @ 0xfc │ │ - stc2l 12, cr6, [r4, #44]! @ 0x2c │ │ - stc2l 3, cr10, [r5, #292]! @ 0x124 │ │ + stc2l 13, cr6, [r4, #432]! @ 0x1b0 │ │ + stc2l 12, cr6, [r4, #224]! @ 0xe0 │ │ + stc2l 3, cr10, [r5, #472]! @ 0x1d8 │ │ │ │ 023ec1d0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ mov r4, r0 │ │ ldr r0, [r0, #320] @ 0x140 │ │ @@ -1216218,15 +1216217,15 @@ │ │ eor r0, r0, #31 │ │ strb r0, [r9, #5] │ │ b 23ec488 │ │ ldr r1, [pc, #8] @ 23ec5a8 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 4, cr10, [r4, #612]! @ 0x264 │ │ + stc2l 4, cr10, [r4, #792]! @ 0x318 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #84 @ 0x54 │ │ mov r4, r0 │ │ ldr r0, [r0, #320] @ 0x140 │ │ movw r6, #16724 @ 0x4154 │ │ mov r8, r2 │ │ @@ -1216373,18 +1216372,18 @@ │ │ ldreq r0, [r4, #440] @ 0x1b8 │ │ cmpeq r0, r3 │ │ bne 23ec720 │ │ ldr r0, [r4, #444] @ 0x1bc │ │ cmp r0, sl │ │ bne 23ec720 │ │ b 23ec75c │ │ - vcmla.f16 d22, d3, d18, #270 │ │ - stc2l 11, cr10, [r3, #944]! @ 0x3b0 @ │ │ - stc2l 1, cr8, [r4, #624]! @ 0x270 │ │ - stc2l 12, cr0, [r4, #312]! @ 0x138 │ │ + vcmla.f16 q11, , , #270 │ │ + stc2l 12, cr10, [r3, #100]! @ 0x64 │ │ + stc2l 1, cr8, [r4, #804]! @ 0x324 │ │ + stc2l 12, cr0, [r4, #492]! @ 0x1ec │ │ ldr r3, [r0, #464] @ 0x1d0 │ │ mov r1, r0 │ │ lsrs r0, r3, #15 │ │ mvn r0, #0 │ │ bxne lr │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ @@ -1216536,15 +1216535,15 @@ │ │ add r2, sp, #7 │ │ movt r1, #29522 @ 0x7352 │ │ mov r3, #1 │ │ strb r4, [sp, #7] │ │ bl 23ebbec │ │ sub sp, fp, #8 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 3, cr8, [r2, #800]! @ 0x320 │ │ + stc2l 3, cr8, [r2, #980]! @ 0x3d4 │ │ │ │ 023eca8c : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #1136 @ 0x470 │ │ mov r9, r0 │ │ cmp r2, #0 │ │ @@ -1216687,19 +1216686,19 @@ │ │ ldr r1, [r9, #348] @ 0x15c │ │ mov r0, r9 │ │ bl 270c0b0 │ │ ldr r1, [pc, #24] @ 23eccec │ │ mov r0, r9 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 1, cr6, [r2, #340]! @ 0x154 │ │ - stc2l 6, cr10, [r3, #416]! @ 0x1a0 │ │ - stc2l 1, cr14, [r4, #1004]! @ 0x3ec │ │ - stc2l 7, cr8, [r3, #276]! @ 0x114 │ │ - stc2l 1, cr6, [r2, #140]! @ 0x8c │ │ + stc2l 1, cr6, [r2, #520]! @ 0x208 │ │ + stc2l 6, cr10, [r3, #596]! @ 0x254 │ │ + stc2l 2, cr14, [r4, #160]! @ 0xa0 │ │ + stc2l 7, cr8, [r3, #456]! @ 0x1c8 │ │ + stc2l 1, cr6, [r2, #320]! @ 0x140 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ mov r9, r2 │ │ ldr r2, [r2, #4] │ │ mov sl, r3 │ │ mov r5, r0 │ │ @@ -1216832,15 +1216831,15 @@ │ │ strb r1, [r9, #13] │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mvn r0, #3 │ │ ldr r1, [r5, #340] @ 0x154 │ │ mov r7, #1 │ │ b 23ecddc │ │ - stc2l 8, cr12, [r2, #80]! @ 0x50 │ │ + vcmla.f16 q14, q1, , #270 │ │ │ │ 023ecf24 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #132 @ 0x84 │ │ mov r2, r1 │ │ ldr r1, [r1] │ │ @@ -1217060,15 +1217059,15 @@ │ │ add r3, r3, #1 │ │ movw r1, #18772 @ 0x4954 │ │ add r2, sp, #4 │ │ movt r1, #29506 @ 0x7342 │ │ bl 23ebbec │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ - stc2l 15, cr11, [r3, #420]! @ 0x1a4 │ │ + stc2l 15, cr11, [r3, #600]! @ 0x258 │ │ │ │ 023ed2a4 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #32 │ │ mov r6, r1 │ │ ldr r1, [r1, #24] │ │ @@ -1217177,18 +1217176,18 @@ │ │ movw ip, #20051 @ 0x4e53 │ │ mov r2, r1 │ │ movt ip, #29778 @ 0x7452 │ │ mov r1, ip │ │ mov sp, fp │ │ pop {fp, lr} │ │ b 23ebbec │ │ - stc2l 15, cr1, [r3, #700]! @ 0x2bc │ │ - stc2l 5, cr11, [r5, #152]! @ 0x98 │ │ - stc2l 15, cr3, [r3, #456]! @ 0x1c8 │ │ - stc2l 9, cr5, [r4, #414]! @ 0x19e @ │ │ + stc2l 15, cr1, [r3, #880]! @ 0x370 │ │ + stc2l 5, cr11, [r5, #332]! @ 0x14c │ │ + stc2l 15, cr3, [r3, #636]! @ 0x27c │ │ + stc2l 9, cr5, [r4, #504]! @ 0x1f8 @ │ │ │ │ 023ed474 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #8 │ │ cmp r2, #3 │ │ bne 23ed4bc │ │ @@ -1217255,17 +1217254,17 @@ │ │ movw r1, #18244 @ 0x4744 │ │ movt r1, #25163 @ 0x624b │ │ add r2, sp, #2 │ │ mov r3, #1 │ │ bl 23ebbec │ │ mov sp, fp │ │ pop {fp, pc} │ │ - stc2l 1, cr10, [r2, #444]! @ 0x1bc │ │ - stc2l 4, cr11, [r5, #376]! @ 0x178 │ │ - stc2l 10, cr15, [r2, #292]! @ 0x124 @ │ │ + stc2l 1, cr10, [r2, #624]! @ 0x270 │ │ + stc2l 4, cr11, [r5, #556]! @ 0x22c │ │ + stc2l 10, cr15, [r2, #472]! @ 0x1d8 @ │ │ │ │ 023ed5a0 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ mov r5, r2 │ │ mov r6, r1 │ │ @@ -1217402,15 +1217401,15 @@ │ │ rev r0, r0 │ │ str r0, [sp, #12] │ │ mov r0, r4 │ │ mov r2, #4 │ │ bl 270cac0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 2, cr5, [r5, #536]! @ 0x218 │ │ + stc2l 2, cr5, [r5, #716]! @ 0x2cc │ │ │ │ 023ed7d4 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #88 @ 0x58 │ │ mov r5, r2 │ │ mov r2, sp │ │ @@ -1217502,16 +1217501,16 @@ │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldr r1, [pc, #12] @ 23ed95c │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 9, cr9, [r3, #428]! @ 0x1ac @ │ │ - stc2l 9, cr15, [r3, #124]! @ 0x7c @ │ │ + stc2l 10, cr9, [r3, #12]! @ │ │ + stc2l 9, cr15, [r3, #214]! @ 0xd6 @ │ │ │ │ 023ed960 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #1136 @ 0x470 │ │ mov r6, r2 │ │ mov r9, r0 │ │ @@ -1217643,17 +1217642,17 @@ │ │ ldr r1, [r9, #348] @ 0x15c │ │ mov r0, r9 │ │ bl 270c0b0 │ │ ldr r1, [pc, #16] @ 23edb8c │ │ mov r0, r9 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 6, cr1, [r4, #968]! @ 0x3c8 │ │ - stc2l 7, cr1, [r3, #1016]! @ 0x3f8 │ │ - stc2l 2, cr5, [r2, #492]! @ 0x1ec │ │ + stc2l 7, cr1, [r4, #124]! @ 0x7c │ │ + vcmla.f16 d17, d3, d27, #270 │ │ + stc2l 2, cr5, [r2, #672]! @ 0x2a0 │ │ │ │ 023edb90 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #132 @ 0x84 │ │ sub sp, sp, #1024 @ 0x400 │ │ sub r5, fp, #122 @ 0x7a │ │ @@ -1217876,19 +1217875,19 @@ │ │ mov r0, sl │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldr r1, [pc, #12] @ 23edf24 │ │ mov r0, sl │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 10, cr2, [r3, #276]! @ 0x114 @ │ │ - stc2l 14, cr4, [r2, #892]! @ 0x37c │ │ - stc2l 4, cr1, [r3, #608]! @ 0x260 │ │ - stc2l 5, cr12, [r5, #24]! │ │ - stc2l 0, cr15, [r2, #900]! @ 0x384 │ │ + stc2l 10, cr2, [r3, #456]! @ 0x1c8 @ │ │ + stc2l 15, cr4, [r2, #48]! @ 0x30 │ │ + stc2l 4, cr1, [r3, #788]! @ 0x314 │ │ + stc2l 5, cr12, [r5, #204]! @ 0xcc │ │ + stc2l 1, cr15, [r2, #56]! @ 0x38 │ │ │ │ 023edf34 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ mov r5, r3 │ │ mov r6, r2 │ │ @@ -1217913,15 +1217912,15 @@ │ │ movt r1, #28486 @ 0x6f46 │ │ mov r2, r7 │ │ mov r3, #9 │ │ strb r5, [sp, #15] │ │ bl 23ebbec │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 6, cr9, [r2, #912]! @ 0x390 │ │ + stc2l 7, cr9, [r2, #68]! @ 0x44 │ │ │ │ 023edfb0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #116 @ 0x74 │ │ mov r7, r0 │ │ ldr r0, [fp, #8] │ │ @@ -1218090,16 +1218089,16 @@ │ │ mov r0, r7 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ ldr r1, [pc, #12] @ 23ee26c │ │ mov r0, r7 │ │ add r1, pc, r1 │ │ bl 270c0b0 │ │ - stc2l 3, cr11, [r2, #616]! @ 0x268 │ │ - stc2l 4, cr6, [r5, #944]! @ 0x3b0 │ │ + stc2l 3, cr11, [r2, #796]! @ 0x31c │ │ + stc2l 5, cr6, [r5, #100]! @ 0x64 │ │ │ │ 023ee270 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #68 @ 0x44 │ │ mov r8, r0 │ │ mov r0, r2 │ │ @@ -1218136,15 +1218135,15 @@ │ │ mov r0, r8 │ │ movt r1, #29507 @ 0x7343 │ │ mov r2, sl │ │ mov r3, r6 │ │ bl 23ebbec │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 7, cr8, [r4, #640]! @ 0x280 │ │ + stc2l 7, cr8, [r4, #820]! @ 0x334 │ │ │ │ 023ee31c : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ mov r6, r3 │ │ mov r5, r2 │ │ @@ -1218174,15 +1218173,15 @@ │ │ mov r3, #9 │ │ strb r6, [sp, #15] │ │ strb r5, [sp, #14] │ │ strb r4, [sp, #10] │ │ bl 23ebbec │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 11, cr4, [r3, #196]! @ 0xc4 @ │ │ + stc2l 11, cr4, [r3, #376]! @ 0x178 @ │ │ │ │ 023ee3ac : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ ldrb r2, [r1, #2] │ │ sub r3, r2, #13 │ │ @@ -1218215,15 +1218214,15 @@ │ │ mov r3, #7 │ │ strb ip, [sp, #5] │ │ strb r4, [sp, #4] │ │ strb lr, [sp, #7] │ │ bl 23ebbec │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ - stc2l 10, cr4, [r3, #684]! @ 0x2ac @ │ │ + stc2l 10, cr4, [r3, #864]! @ 0x360 @ │ │ │ │ 023ee448 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ ldrb r0, [r0, #532] @ 0x214 │ │ ldrb r1, [r4, #529] @ 0x211 │ │ @@ -1220777,25 +1220776,25 @@ │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ ldr r0, [pc, #32] @ 23f0be0 │ │ add r0, pc, r0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ b 270cdd0 │ │ - stc2l 3, cr2, [r2, #108]! @ 0x6c │ │ - vcmla.f16 d25, d21, d24, #270 │ │ - stc2l 3, cr2, [r3, #308]! @ 0x134 │ │ - stc2l 4, cr1, [r5, #292]! @ 0x124 │ │ - stc2l 14, cr1, [r5, #32]! │ │ - stc2l 2, cr2, [r2, #428]! @ 0x1ac │ │ - stc2l 6, cr10, [r3, #200]! @ 0xc8 │ │ - stc2l 3, cr2, [r3, #132]! @ 0x84 │ │ - stc2l 4, cr1, [r5, #116]! @ 0x74 │ │ - stc2l 7, cr10, [r2, #552]! @ 0x228 │ │ - stc2l 2, cr2, [r2, #876]! @ 0x36c │ │ + stc2l 3, cr2, [r2, #288]! @ 0x120 │ │ + stc2l 8, cr9, [r5, #852]! @ 0x354 │ │ + stc2l 3, cr2, [r3, #488]! @ 0x1e8 │ │ + stc2l 4, cr1, [r5, #472]! @ 0x1d8 │ │ + stc2l 14, cr1, [r5, #212]! @ 0xd4 │ │ + stc2l 2, cr2, [r2, #608]! @ 0x260 │ │ + stc2l 6, cr10, [r3, #380]! @ 0x17c │ │ + stc2l 3, cr2, [r3, #312]! @ 0x138 │ │ + stc2l 4, cr1, [r5, #296]! @ 0x128 │ │ + stc2l 7, cr10, [r2, #732]! @ 0x2dc │ │ + stc2l 3, cr2, [r2, #32]! │ │ │ │ 023f0bf8 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ mov r4, r3 │ │ mov r5, r2 │ │ mov r6, r1 │ │ @@ -1220816,15 +1220815,15 @@ │ │ mov r3, r4 │ │ bl 270ce30 │ │ mov r0, r8 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - stc2l 6, cr12, [r3, #532]! @ 0x214 │ │ + stc2l 6, cr12, [r3, #712]! @ 0x2c8 │ │ │ │ 023f0c64 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ bl 270ced0 │ │ cmp r0, #0 │ │ @@ -1220907,25 +1220906,25 @@ │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ ldr r0, [pc, #44] @ 23f0de4 │ │ add r0, pc, r0 │ │ bl 270cdd0 │ │ ldr r0, [r6] │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 5, cr8, [r3, #408]! @ 0x198 │ │ - stc2l 15, cr11, [r4, #292]! @ 0x124 │ │ - stc2l 1, cr2, [r3, #372]! @ 0x174 │ │ - stc2l 6, cr4, [r3, #652]! @ 0x28c │ │ - stc2l 4, cr8, [r3, #472]! @ 0x1d8 │ │ - stc2l 0, cr4, [r2, #768]! @ 0x300 │ │ - stc2l 1, cr2, [r3, #148]! @ 0x94 │ │ - stc2l 12, cr7, [r5, #216]! @ 0xd8 │ │ - stc2l 4, cr8, [r3, #248]! @ 0xf8 │ │ - stc2l 15, cr15, [r4, #868]! @ 0x364 │ │ - stc2l 1, cr2, [r3, #548]! @ 0x224 │ │ + stc2l 5, cr8, [r3, #588]! @ 0x24c │ │ + stc2l 15, cr11, [r4, #472]! @ 0x1d8 │ │ + stc2l 1, cr2, [r3, #552]! @ 0x228 │ │ + stc2l 6, cr4, [r3, #832]! @ 0x340 │ │ + stc2l 4, cr8, [r3, #652]! @ 0x28c │ │ + stc2l 0, cr4, [r2, #948]! @ 0x3b4 │ │ + stc2l 1, cr2, [r3, #328]! @ 0x148 │ │ + stc2l 12, cr7, [r5, #396]! @ 0x18c │ │ + stc2l 4, cr8, [r3, #428]! @ 0x1ac │ │ + stc2l 0, cr0, [r5, #24]! │ │ + stc2l 1, cr2, [r3, #728]! @ 0x2d8 │ │ │ │ 023f0df0 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ beq 23f0e24 │ │ ldrb r1, [r0] │ │ @@ -1220966,24 +1220965,24 @@ │ │ bl 270cdf0 │ │ ldr r0, [pc, #52] @ 23f0ecc │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r4 │ │ pop {r4, sl, fp, lr} │ │ b 270cdd0 │ │ - stc2l 0, cr2, [r3, #620]! @ 0x26c │ │ - stc2l 5, cr9, [r5, #848]! @ 0x350 │ │ - stc2l 0, cr2, [r3, #484]! @ 0x1e4 │ │ - stc2l 3, cr9, [r5, #456]! @ 0x1c8 │ │ - stc2l 11, cr1, [r5, #208]! @ 0xd0 @ │ │ - stc2l 0, cr2, [r3, #380]! @ 0x17c │ │ - stc2l 3, cr10, [r3, #312]! @ 0x138 │ │ - stc2l 0, cr2, [r3, #244]! @ 0xf4 │ │ - stc2l 3, cr9, [r5, #216]! @ 0xd8 │ │ - stc2l 4, cr10, [r2, #664]! @ 0x298 │ │ + stc2l 0, cr2, [r3, #800]! @ 0x320 │ │ + stc2l 6, cr9, [r5, #4]! │ │ + stc2l 0, cr2, [r3, #664]! @ 0x298 │ │ + stc2l 3, cr9, [r5, #636]! @ 0x27c │ │ + stc2l 11, cr1, [r5, #388]! @ 0x184 @ │ │ + stc2l 0, cr2, [r3, #560]! @ 0x230 │ │ + stc2l 3, cr10, [r3, #492]! @ 0x1ec │ │ + stc2l 0, cr2, [r3, #424]! @ 0x1a8 │ │ + stc2l 3, cr9, [r5, #396]! @ 0x18c │ │ + stc2l 4, cr10, [r2, #844]! @ 0x34c │ │ │ │ 023f0ed0 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ cmp r0, #0 │ │ beq 23f0f04 │ │ mov r4, r0 │ │ @@ -1221014,21 +1221013,21 @@ │ │ bl 270ce00 │ │ mov r0, r4 │ │ bl 26ffe30 │ │ mov r1, r0 │ │ mov r0, r4 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ b 270ce40 │ │ - stc2l 10, cr1, [r5, #512]! @ 0x200 @ │ │ - stc2l 4, cr9, [r5, #1008]! @ 0x3f0 │ │ - stc2l 4, cr10, [r2, #264]! @ 0x108 │ │ - stc2l 2, cr10, [r3, #792]! @ 0x318 │ │ - stc2l 4, cr0, [r3, #440]! @ 0x1b8 │ │ - stc2l 15, cr1, [r3, #564]! @ 0x234 │ │ - stc2l 2, cr9, [r5, #536]! @ 0x218 │ │ + stc2l 10, cr1, [r5, #692]! @ 0x2b4 @ │ │ + stc2l 5, cr9, [r5, #164]! @ 0xa4 │ │ + stc2l 4, cr10, [r2, #444]! @ 0x1bc │ │ + stc2l 2, cr10, [r3, #972]! @ 0x3cc │ │ + stc2l 4, cr0, [r3, #620]! @ 0x26c │ │ + stc2l 15, cr1, [r3, #744]! @ 0x2e8 │ │ + stc2l 2, cr9, [r5, #716]! @ 0x2cc │ │ │ │ 023f0f7c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r2 │ │ mov r6, r1 │ │ mov r5, r0 │ │ @@ -1221149,39 +1221148,39 @@ │ │ mov r0, r5 │ │ mov r1, r4 │ │ bl 270d910 │ │ mov r0, r6 │ │ mov r1, r4 │ │ bl 270d920 │ │ b 23f10f0 │ │ - stc2l 3, cr6, [r3, #672]! @ 0x2a0 │ │ - stc2l 3, cr9, [r5, #976]! @ 0x3d0 │ │ - stc2l 14, cr1, [r3, #612]! @ 0x264 │ │ - stc2l 3, cr10, [r2, #132]! @ 0x84 │ │ - vcmla.f16 d17, d21, d20, #270 │ │ - stc2l 1, cr10, [r3, #552]! @ 0x228 │ │ - stc2l 14, cr1, [r3, #484]! @ 0x1e4 │ │ - stc2l 3, cr10, [r2, #4]! │ │ - stc2l 2, cr10, [r2, #904]! @ 0x388 │ │ - stc2l 10, cr15, [r3, #12]! @ │ │ - stc2l 3, cr9, [r5, #272]! @ 0x110 │ │ - stc2l 13, cr1, [r3, #932]! @ 0x3a4 │ │ - stc2l 13, cr1, [r4, #168]! @ 0xa8 │ │ - stc2l 0, cr10, [r3, #760]! @ 0x2f8 │ │ - stc2l 13, cr1, [r3, #692]! @ 0x2b4 │ │ - stc2l 12, cr1, [r4, #952]! @ 0x3b8 │ │ + stc2l 3, cr6, [r3, #852]! @ 0x354 │ │ + stc2l 4, cr9, [r5, #132]! @ 0x84 │ │ + stc2l 14, cr1, [r3, #792]! @ 0x318 │ │ + stc2l 3, cr10, [r2, #312]! @ 0x138 │ │ + stc2l 8, cr1, [r5, #836]! @ 0x344 │ │ + stc2l 1, cr10, [r3, #732]! @ 0x2dc │ │ + stc2l 14, cr1, [r3, #664]! @ 0x298 │ │ + stc2l 3, cr10, [r2, #184]! @ 0xb8 │ │ + stc2l 3, cr10, [r2, #60]! @ 0x3c │ │ + stc2l 10, cr15, [r3, #192]! @ 0xc0 @ │ │ + stc2l 3, cr9, [r5, #452]! @ 0x1c4 │ │ + stc2l 14, cr1, [r3, #88]! @ 0x58 │ │ + stc2l 13, cr1, [r4, #348]! @ 0x15c │ │ + stc2l 0, cr10, [r3, #940]! @ 0x3ac │ │ + stc2l 13, cr1, [r3, #872]! @ 0x368 │ │ + stc2l 13, cr1, [r4, #108]! @ 0x6c │ │ stc2l 7, cr11, [r5, #292]! @ 0x124 │ │ - stc2l 15, cr11, [r2, #504]! @ 0x1f8 │ │ - stc2l 14, cr1, [r3, #148]! @ 0x94 │ │ - stc2l 13, cr1, [r4, #408]! @ 0x198 │ │ - stc2l 3, cr5, [r5, #436]! @ 0x1b4 │ │ - stc2l 11, cr11, [r4, #628]! @ 0x274 @ │ │ - stc2l 13, cr1, [r3, #564]! @ 0x234 │ │ - stc2l 2, cr14, [r2, #296]! @ 0x128 │ │ - stc2l 2, cr6, [r3, #336]! @ 0x150 │ │ + stc2l 15, cr11, [r2, #684]! @ 0x2ac │ │ + stc2l 14, cr1, [r3, #328]! @ 0x148 │ │ + stc2l 13, cr1, [r4, #588]! @ 0x24c │ │ + stc2l 3, cr5, [r5, #616]! @ 0x268 │ │ + stc2l 11, cr11, [r4, #808]! @ 0x328 @ │ │ + stc2l 13, cr1, [r3, #744]! @ 0x2e8 │ │ + stc2l 2, cr14, [r2, #476]! @ 0x1dc │ │ + stc2l 2, cr6, [r3, #516]! @ 0x204 │ │ │ │ 023f11d8 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ cmp r0, #0 │ │ beq 23f1250 │ │ mov r4, r1 │ │ @@ -1221279,23 +1221278,23 @@ │ │ cmp r1, ip │ │ beq 23f1370 │ │ mov r0, r2 │ │ bl 270d930 │ │ cmp r0, #0 │ │ movwne r0, #1 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - stc2l 12, cr13, [r4, #320]! @ 0x140 │ │ - stc2l 1, cr9, [r5, #672]! @ 0x2a0 │ │ - stc2l 12, cr1, [r3, #308]! @ 0x134 │ │ - stc2l 0, cr8, [r2, #80]! @ 0x50 │ │ - stc2l 6, cr1, [r5, #864]! @ 0x360 │ │ - stc2l 12, cr13, [r4, #128]! @ 0x80 │ │ - stc2l 1, cr9, [r5, #480]! @ 0x1e0 │ │ - stc2l 12, cr1, [r3, #116]! @ 0x74 │ │ - stc2l 12, cr1, [r3, #140]! @ 0x8c │ │ + stc2l 12, cr13, [r4, #500]! @ 0x1f4 │ │ + stc2l 1, cr9, [r5, #852]! @ 0x354 │ │ + stc2l 12, cr1, [r3, #488]! @ 0x1e8 │ │ + stc2l 0, cr8, [r2, #260]! @ 0x104 │ │ + stc2l 7, cr1, [r5, #20]! │ │ + stc2l 12, cr13, [r4, #308]! @ 0x134 │ │ + stc2l 1, cr9, [r5, #660]! @ 0x294 │ │ + stc2l 12, cr1, [r3, #296]! @ 0x128 │ │ + stc2l 12, cr1, [r3, #320]! @ 0x140 │ │ │ │ 023f1398 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #112 @ 0x70 │ │ mov r7, r0 │ │ ldr r0, [pc, #580] @ 23f15f4 │ │ @@ -1221441,29 +1221440,29 @@ │ │ mov r0, r4 │ │ mov r1, #73 @ 0x49 │ │ bl 270d990 │ │ ldr r0, [pc, #48] @ 23f161c │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ b 23f14a4 │ │ - stc2l 15, cr13, [r2, #952]! @ 0x3b8 │ │ + stc2l 0, cr14, [r2, #108]! @ 0x6c │ │ stc2l 3, cr11, [r5, #708]! @ 0x2c4 │ │ - stc2l 9, cr3, [r2, #348]! @ 0x15c @ │ │ - stc2l 15, cr8, [r5, #436]! @ 0x1b4 │ │ + stc2l 9, cr3, [r2, #438]! @ 0x1b6 @ │ │ + stc2l 15, cr8, [r5, #616]! @ 0x268 │ │ eorseq r6, r5, r0, lsl #30 │ │ - stc2l 5, cr15, [r3, #668]! @ 0x29c │ │ + stc2l 5, cr15, [r3, #848]! @ 0x350 │ │ ldrsbteq r6, [r5], -r0 │ │ eorseq r6, r5, r4, lsr #29 │ │ eorseq r6, r5, r8, asr lr │ │ - stc2l 5, cr3, [r4, #52]! @ 0x34 │ │ - stc2l 12, cr7, [r3, #52]! @ 0x34 │ │ + stc2l 5, cr3, [r4, #232]! @ 0xe8 │ │ + stc2l 12, cr7, [r3, #232]! @ 0xe8 │ │ eorseq r6, r5, r4, lsr #31 │ │ - stc2l 14, cr11, [r3, #336]! @ 0x150 │ │ - stc2l 14, cr13, [r2, #936]! @ 0x3a8 │ │ - stc2l 14, cr13, [r2, #200]! @ 0xc8 │ │ + stc2l 14, cr11, [r3, #516]! @ 0x204 │ │ + stc2l 15, cr13, [r2, #92]! @ 0x5c │ │ + stc2l 14, cr13, [r2, #380]! @ 0x17c │ │ │ │ 023f1630 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ cmp r0, #0 │ │ beq 23f1690 │ │ ldrb r2, [r0] │ │ @@ -1221539,32 +1221538,32 @@ │ │ bl 270cdf0 │ │ ldr r0, [pc, #52] @ 23f1798 │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r4 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ b 270cdd0 │ │ - stc2l 4, cr3, [r4, #432]! @ 0x1b0 │ │ - stc2l 13, cr8, [r5, #416]! @ 0x1a0 │ │ - vcmla.f16 d17, d3, d13, #270 │ │ - stc2l 11, cr9, [r3, #152]! @ 0x98 @ │ │ - stc2l 2, cr1, [r5, #416]! @ 0x1a0 │ │ - stc2l 4, cr3, [r4, #240]! @ 0xf0 │ │ - stc2l 10, cr9, [r3, #952]! @ 0x3b8 @ │ │ - stc2l 7, cr1, [r3, #884]! @ 0x374 │ │ - stc2l 10, cr9, [r3, #984]! @ 0x3d8 @ │ │ - stc2l 11, cr9, [r2, #872]! @ 0x368 @ │ │ - stc2l 4, cr3, [r4, #48]! @ 0x30 │ │ - stc2l 13, cr8, [r5, #32]! │ │ - stc2l 7, cr1, [r3, #692]! @ 0x2b4 │ │ - stc2l 4, cr3, [r3, #216]! @ 0xd8 │ │ - stc2l 3, cr3, [r4, #832]! @ 0x340 │ │ - stc2l 10, cr9, [r3, #520]! @ 0x208 @ │ │ - stc2l 7, cr1, [r3, #452]! @ 0x1c4 │ │ - stc2l 3, cr3, [r3, #1000]! @ 0x3e8 │ │ + stc2l 4, cr3, [r4, #612]! @ 0x264 │ │ + stc2l 13, cr8, [r5, #596]! @ 0x254 │ │ + stc2l 8, cr1, [r3, #232]! @ 0xe8 │ │ + stc2l 11, cr9, [r3, #332]! @ 0x14c @ │ │ + stc2l 2, cr1, [r5, #596]! @ 0x254 │ │ + stc2l 4, cr3, [r4, #420]! @ 0x1a4 │ │ + stc2l 11, cr9, [r3, #108]! @ 0x6c @ │ │ + vcmla.f16 d17, d3, d10, #270 │ │ + stc2l 11, cr9, [r3, #140]! @ 0x8c @ │ │ + stc2l 12, cr9, [r2, #28]! │ │ + stc2l 4, cr3, [r4, #228]! @ 0xe4 │ │ + stc2l 13, cr8, [r5, #212]! @ 0xd4 │ │ + stc2l 7, cr1, [r3, #872]! @ 0x368 │ │ + stc2l 4, cr3, [r3, #396]! @ 0x18c │ │ + stc2l 3, cr3, [r4, #1012]! @ 0x3f4 │ │ + stc2l 10, cr9, [r3, #700]! @ 0x2bc @ │ │ + stc2l 7, cr1, [r3, #632]! @ 0x278 │ │ + stc2l 4, cr3, [r3, #156]! @ 0x9c │ │ │ │ 023f17bc : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #644 @ 0x284 │ │ sub sp, sp, #3072 @ 0xc00 │ │ mov r9, r3 │ │ @@ -1221786,25 +1221785,25 @@ │ │ bl 270d970 │ │ add r0, sp, #8 │ │ mov r1, #1840 @ 0x730 │ │ bl 270da50 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 5, cr5, [r2, #540]! @ 0x21c │ │ + stc2l 5, cr5, [r2, #720]! @ 0x2d0 │ │ eorseq r6, r5, ip, lsr #20 │ │ eorseq r6, r5, r8, asr #18 │ │ - stc2l 3, cr5, [r2, #188]! @ 0xbc │ │ + stc2l 3, cr5, [r2, #368]! @ 0x170 │ │ eorseq r6, r5, ip, lsr fp │ │ eorseq r6, r5, ip, asr #19 │ │ - stc2l 3, cr5, [r2, #684]! @ 0x2ac │ │ - stc2l 5, cr5, [r2, #28]! │ │ + stc2l 3, cr5, [r2, #864]! @ 0x360 │ │ + stc2l 5, cr5, [r2, #208]! @ 0xd0 │ │ eorseq r6, r5, r8, lsr #21 │ │ mlaseq r5, r0, r9, r6 │ │ - stc2l 2, cr5, [r2, #908]! @ 0x38c │ │ + stc2l 3, cr5, [r2, #64]! @ 0x40 │ │ │ │ 023f1b74 : │ │ cmp r0, #1 │ │ ldreq r0, [pc, #32] @ 23f1ba0 │ │ ldreq r0, [pc, r0] │ │ bxeq lr │ │ ldr r0, [pc, #16] @ 23f1b9c │ │ @@ -1221879,24 +1221878,24 @@ │ │ ldr r0, [pc, #56] @ 23f1cc0 │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r4 │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, lr} │ │ b 270cdd0 │ │ - stc2l 7, cr15, [r2, #476]! @ 0x1dc │ │ - stc2l 7, cr8, [r5, #912]! @ 0x390 │ │ - stc2l 2, cr1, [r3, #548]! @ 0x224 │ │ - stc2l 5, cr9, [r3, #648]! @ 0x288 │ │ - stc2l 13, cr0, [r5, #272]! @ 0x110 │ │ - stc2l 7, cr15, [r2, #236]! @ 0xec │ │ - stc2l 5, cr9, [r3, #376]! @ 0x178 │ │ - stc2l 2, cr1, [r3, #308]! @ 0x134 │ │ - stc2l 5, cr9, [r3, #408]! @ 0x198 │ │ - stc2l 6, cr9, [r2, #728]! @ 0x2d8 │ │ + stc2l 7, cr15, [r2, #656]! @ 0x290 │ │ + stc2l 8, cr8, [r5, #68]! @ 0x44 │ │ + stc2l 2, cr1, [r3, #728]! @ 0x2d8 │ │ + stc2l 5, cr9, [r3, #828]! @ 0x33c │ │ + stc2l 13, cr0, [r5, #452]! @ 0x1c4 │ │ + stc2l 7, cr15, [r2, #416]! @ 0x1a0 │ │ + stc2l 5, cr9, [r3, #556]! @ 0x22c │ │ + stc2l 2, cr1, [r3, #488]! @ 0x1e8 │ │ + stc2l 5, cr9, [r3, #588]! @ 0x24c │ │ + stc2l 6, cr9, [r2, #908]! @ 0x38c │ │ │ │ 023f1cc4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #652 @ 0x28c │ │ sub sp, sp, #3072 @ 0xc00 │ │ mov r5, r2 │ │ @@ -1222077,15 +1222076,15 @@ │ │ cmp r0, r1 │ │ bne 23f1f70 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ add r5, r1, #1 │ │ mov r0, r5 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 14, cr4, [r2, #812]! @ 0x32c │ │ + stc2l 14, cr4, [r2, #992]! @ 0x3e0 │ │ │ │ 023f1fa0 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #152] @ 23f204c │ │ add r0, pc, r0 │ │ @@ -1222123,24 +1222122,24 @@ │ │ ldr r0, [pc, #52] @ 23f206c │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ ldr r0, [pc, #44] @ 23f2070 │ │ add r0, pc, r0 │ │ pop {r4, sl, fp, lr} │ │ b 270cdd0 │ │ - stc2l 3, cr5, [r3, #644]! @ 0x284 │ │ - stc2l 4, cr8, [r5, #144]! @ 0x90 │ │ - stc2l 14, cr0, [r3, #804]! @ 0x324 │ │ + stc2l 3, cr5, [r3, #824]! @ 0x338 │ │ + stc2l 4, cr8, [r5, #324]! @ 0x144 │ │ + stc2l 14, cr0, [r3, #984]! @ 0x3d8 │ │ stc2l 6, cr10, [r5, #136]! @ 0x88 │ │ - stc2l 9, cr0, [r5, #264]! @ 0x108 @ │ │ - stc2l 1, cr9, [r3, #696]! @ 0x2b8 │ │ - stc2l 14, cr0, [r3, #628]! @ 0x274 │ │ + stc2l 9, cr0, [r5, #354]! @ 0x162 @ │ │ + stc2l 1, cr9, [r3, #876]! @ 0x36c │ │ + stc2l 14, cr0, [r3, #808]! @ 0x328 │ │ stc2l 5, cr10, [r5, #984]! @ 0x3d8 │ │ - stc2l 3, cr9, [r2, #24]! │ │ - stc2l 3, cr5, [r3, #68]! @ 0x44 │ │ + stc2l 3, cr9, [r2, #204]! @ 0xcc │ │ + stc2l 3, cr5, [r3, #248]! @ 0xf8 │ │ │ │ 023f2074 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r6, r0 │ │ ldr r0, [pc, #288] @ 23f21a8 │ │ mov r5, r2 │ │ @@ -1222212,31 +1222211,31 @@ │ │ mov r0, r6 │ │ mov r1, r5 │ │ bl 270dcd0 │ │ mov r0, r4 │ │ mov r1, r5 │ │ bl 270d920 │ │ b 23f216c │ │ - stc2l 13, cr2, [r2, #992]! @ 0x3e0 │ │ - stc2l 3, cr8, [r5, #80]! @ 0x50 │ │ - stc2l 13, cr0, [r3, #740]! @ 0x2e4 │ │ - stc2l 9, cr4, [r4, #232]! @ 0xe8 @ │ │ - vcmla.f16 d16, d5, d24, #270 │ │ - stc2l 0, cr9, [r3, #680]! @ 0x2a8 │ │ - stc2l 13, cr0, [r3, #612]! @ 0x264 │ │ - stc2l 9, cr4, [r4, #168]! @ 0xa8 @ │ │ - stc2l 2, cr9, [r2, #8]! │ │ - stc2l 2, cr8, [r5, #800]! @ 0x320 │ │ - stc2l 13, cr0, [r3, #436]! @ 0x1b4 │ │ - stc2l 5, cr5, [r2, #72]! @ 0x48 │ │ - stc2l 15, cr10, [r2, #312]! @ 0x138 │ │ - stc2l 13, cr0, [r3, #980]! @ 0x3d4 │ │ - stc2l 5, cr5, [r2, #616]! @ 0x268 │ │ - stc2l 3, cr4, [r5, #244]! @ 0xf4 │ │ - stc2l 13, cr2, [r2, #80]! @ 0x50 │ │ + stc2l 14, cr2, [r2, #148]! @ 0x94 │ │ + stc2l 3, cr8, [r5, #260]! @ 0x104 │ │ + stc2l 13, cr0, [r3, #920]! @ 0x398 │ │ + stc2l 9, cr4, [r4, #322]! @ 0x142 @ │ │ + stc2l 8, cr0, [r5, #340]! @ 0x154 │ │ + stc2l 0, cr9, [r3, #860]! @ 0x35c │ │ + stc2l 13, cr0, [r3, #792]! @ 0x318 │ │ + stc2l 9, cr4, [r4, #258]! @ 0x102 @ │ │ + stc2l 2, cr9, [r2, #188]! @ 0xbc │ │ + stc2l 2, cr8, [r5, #980]! @ 0x3d4 │ │ + stc2l 13, cr0, [r3, #616]! @ 0x268 │ │ + stc2l 5, cr5, [r2, #252]! @ 0xfc │ │ + stc2l 15, cr10, [r2, #492]! @ 0x1ec │ │ + stc2l 14, cr0, [r3, #136]! @ 0x88 │ │ + stc2l 5, cr5, [r2, #796]! @ 0x31c │ │ + stc2l 3, cr4, [r5, #424]! @ 0x1a8 │ │ + stc2l 13, cr2, [r2, #260]! @ 0x104 │ │ │ │ 023f21ec : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #184 @ 0xb8 │ │ add r4, sp, #14 │ │ mov r8, r3 │ │ @@ -1222322,20 +1222321,20 @@ │ │ b 23f234c │ │ mov r0, r5 │ │ mov r1, r8 │ │ bl 270da10 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - stc2l 3, cr7, [r2, #964]! @ 0x3c4 │ │ - stc2l 0, cr9, [r2, #976]! @ 0x3d0 │ │ - stc2l 10, cr14, [r4, #932]! @ 0x3a4 @ │ │ + stc2l 4, cr7, [r2, #120]! @ 0x78 │ │ + stc2l 1, cr9, [r2, #132]! @ 0x84 │ │ + stc2l 11, cr14, [r4, #88]! @ 0x58 @ │ │ eorseq r6, r5, r0, ror #2 │ │ - stc2l 13, cr14, [r3, #776]! @ 0x308 │ │ - stc2l 3, cr5, [r2, #456]! @ 0x1c8 │ │ + stc2l 13, cr14, [r3, #956]! @ 0x3bc │ │ + stc2l 3, cr5, [r2, #636]! @ 0x27c │ │ │ │ 023f2370 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r5, r1 │ │ ldr r1, [pc, #2544] @ 23f2d74 │ │ mov r4, r3 │ │ @@ -1222971,113 +1222970,113 @@ │ │ b 23f2a38 │ │ ldr r1, [pc, #404] @ 23f2ef8 │ │ mov r0, r5 │ │ mov r2, r4 │ │ mov r3, #25 │ │ add r1, pc, r1 │ │ b 23f2ac8 │ │ - stc2l 0, cr8, [r5, #772]! @ 0x304 │ │ - stc2l 9, cr4, [r3, #316]! @ 0x13c @ │ │ - stc2l 2, cr5, [r2, #848]! @ 0x350 │ │ - stc2l 9, cr8, [r2, #264]! @ 0x108 @ │ │ + stc2l 0, cr8, [r5, #952]! @ 0x3b8 │ │ + stc2l 9, cr4, [r3, #406]! @ 0x196 @ │ │ + stc2l 3, cr5, [r2, #4]! │ │ + stc2l 9, cr8, [r2, #354]! @ 0x162 @ │ │ stc2l 14, cr11, [r5, #968]! @ 0x3c8 │ │ - stc2l 3, cr14, [r4, #456]! @ 0x1c8 │ │ - stc2l 0, cr8, [r5, #436]! @ 0x1b4 │ │ - stc2l 7, cr8, [r3, #852]! @ 0x354 │ │ - stc2l 14, cr12, [r3, #324]! @ 0x144 │ │ + stc2l 3, cr14, [r4, #636]! @ 0x27c │ │ + stc2l 0, cr8, [r5, #616]! @ 0x268 │ │ + vcmla.f16 d24, d3, d2, #270 │ │ + stc2l 14, cr12, [r3, #504]! @ 0x1f8 │ │ stc2l 13, cr9, [r5, #612]! @ 0x264 │ │ - stc2l 0, cr4, [r5, #60]! @ 0x3c │ │ - stc2l 7, cr8, [r3, #888]! @ 0x378 │ │ - stc2l 15, cr4, [r3, #264]! @ 0x108 │ │ - stc2l 10, cr3, [r5, #48]! @ 0x30 @ │ │ - stc2l 10, cr12, [r4, #240]! @ 0xf0 @ │ │ - stc2l 7, cr6, [r3, #680]! @ 0x2a8 │ │ - stc2l 5, cr6, [r5, #416]! @ 0x1a0 │ │ - stc2l 7, cr8, [r3, #728]! @ 0x2d8 │ │ - stc2l 6, cr2, [r4, #352]! @ 0x160 │ │ - stc2l 9, cr4, [r3, #68]! @ 0x44 @ │ │ - stc2l 14, cr14, [r2, #800]! @ 0x320 │ │ - stc2l 2, cr10, [r4, #424]! @ 0x1a8 │ │ - vcmla.f16 d22, d20, d12, #270 │ │ - vcmla.f16 q13, , , #270 │ │ - stc2l 14, cr14, [r2, #636]! @ 0x27c │ │ + stc2l 0, cr4, [r5, #240]! @ 0xf0 │ │ + vcmla.f16 d24, d3, d11, #270 │ │ + stc2l 15, cr4, [r3, #444]! @ 0x1bc │ │ + stc2l 10, cr3, [r5, #228]! @ 0xe4 @ │ │ + stc2l 10, cr12, [r4, #420]! @ 0x1a4 @ │ │ + stc2l 7, cr6, [r3, #860]! @ 0x35c │ │ + stc2l 5, cr6, [r5, #596]! @ 0x254 │ │ + stc2l 7, cr8, [r3, #908]! @ 0x38c │ │ + stc2l 6, cr2, [r4, #532]! @ 0x214 │ │ + stc2l 9, cr4, [r3, #158]! @ 0x9e @ │ │ + stc2l 14, cr14, [r2, #980]! @ 0x3d4 │ │ + stc2l 2, cr10, [r4, #604]! @ 0x25c │ │ + stc2l 8, cr6, [r4, #740]! @ 0x2e4 │ │ + stc2l 8, cr10, [r3, #480]! @ 0x1e0 │ │ + stc2l 14, cr14, [r2, #816]! @ 0x330 │ │ stc2l 4, cr13, [r5, #432]! @ 0x1b0 │ │ - stc2l 4, cr6, [r5, #900]! @ 0x384 │ │ - stc2l 2, cr14, [r4, #700]! @ 0x2bc │ │ - stc2l 14, cr8, [r2, #216]! @ 0xd8 │ │ - stc2l 3, cr0, [r3, #884]! @ 0x374 │ │ - stc2l 12, cr6, [r3, #548]! @ 0x224 │ │ - stc2l 0, cr2, [r4, #84]! @ 0x54 │ │ + stc2l 5, cr6, [r5, #56]! @ 0x38 │ │ + stc2l 2, cr14, [r4, #880]! @ 0x370 │ │ + stc2l 14, cr8, [r2, #396]! @ 0x18c │ │ + stc2l 4, cr0, [r3, #40]! @ 0x28 │ │ + stc2l 12, cr6, [r3, #728]! @ 0x2d8 │ │ + stc2l 0, cr2, [r4, #264]! @ 0x108 │ │ stc2l 13, cr11, [r5, #292]! @ 0x124 │ │ - stc2l 7, cr6, [r3, #152]! @ 0x98 │ │ - stc2l 14, cr4, [r3, #188]! @ 0xbc │ │ - stc2l 11, cr4, [r2, #388]! @ 0x184 @ │ │ - stc2l 14, cr2, [r3, #344]! @ 0x158 │ │ - stc2l 3, cr12, [r4, #448]! @ 0x1c0 │ │ - stc2l 8, cr0, [r4, #116]! @ 0x74 │ │ - stc2l 7, cr6, [r3, #80]! @ 0x50 │ │ - stc2l 8, cr0, [r4, #68]! @ 0x44 │ │ - stc2l 2, cr0, [r4, #772]! @ 0x304 │ │ - stc2l 7, cr14, [r4, #532]! @ 0x214 │ │ - vcmla.f16 , , , #270 │ │ - stc2l 12, cr12, [r3, #148]! @ 0x94 │ │ - stc2l 1, cr6, [r4, #1000]! @ 0x3e8 │ │ - stc2l 15, cr4, [r2, #1016]! @ 0x3f8 │ │ - stc2l 2, cr2, [r2, #932]! @ 0x3a4 │ │ - stc2l 12, cr12, [r2, #1000]! @ 0x3e8 │ │ - stc2l 3, cr0, [r3, #292]! @ 0x124 │ │ - stc2l 13, cr2, [r3, #572]! @ 0x23c │ │ - vcmla.f16 d30, d2, d9, #270 │ │ - stc2l 13, cr7, [r5, #764]! @ 0x2fc │ │ - vcmla.f16 d20, d3, d18, #270 │ │ - stc2l 11, cr8, [r3, #436]! @ 0x1b4 @ │ │ + stc2l 7, cr6, [r3, #332]! @ 0x14c │ │ + stc2l 14, cr4, [r3, #368]! @ 0x170 │ │ + stc2l 11, cr4, [r2, #568]! @ 0x238 @ │ │ + stc2l 14, cr2, [r3, #524]! @ 0x20c │ │ + stc2l 3, cr12, [r4, #628]! @ 0x274 │ │ + vcmla.f16 q8, q2, q5, #270 │ │ + stc2l 7, cr6, [r3, #260]! @ 0x104 │ │ + stc2l 8, cr0, [r4, #248]! @ 0xf8 │ │ + stc2l 2, cr0, [r4, #952]! @ 0x3b8 │ │ + stc2l 7, cr14, [r4, #712]! @ 0x2c8 │ │ + stc2l 9, cr7, [r5, #56]! @ 0x38 @ │ │ + stc2l 12, cr12, [r3, #328]! @ 0x148 │ │ + stc2l 2, cr6, [r4, #156]! @ 0x9c │ │ + stc2l 0, cr5, [r2, #172]! @ 0xac │ │ + stc2l 3, cr2, [r2, #88]! @ 0x58 │ │ + stc2l 13, cr12, [r2, #156]! @ 0x9c │ │ + stc2l 3, cr0, [r3, #472]! @ 0x1d8 │ │ + stc2l 13, cr2, [r3, #752]! @ 0x2f0 │ │ + stc2l 8, cr14, [r2, #216]! @ 0xd8 │ │ + stc2l 13, cr7, [r5, #944]! @ 0x3b0 │ │ + vcmla.f16 q10, , , #270 │ │ + stc2l 11, cr8, [r3, #616]! @ 0x268 @ │ │ stc2l 7, cr11, [r5, #16]! │ │ - stc2l 11, cr12, [r3, #496]! @ 0x1f0 @ │ │ - stc2l 15, cr1, [r4, #248]! @ 0xf8 │ │ - stc2l 13, cr7, [r5, #480]! @ 0x1e0 │ │ - stc2l 1, cr10, [r4, #132]! @ 0x84 │ │ - stc2l 6, cr10, [r4, #80]! @ 0x50 │ │ - stc2l 8, cr4, [r3, #68]! @ 0x44 │ │ - stc2l 11, cr8, [r3, #24]! @ │ │ + stc2l 11, cr12, [r3, #676]! @ 0x2a4 @ │ │ + stc2l 15, cr1, [r4, #428]! @ 0x1ac │ │ + stc2l 13, cr7, [r5, #660]! @ 0x294 │ │ + stc2l 1, cr10, [r4, #312]! @ 0x138 │ │ + stc2l 6, cr10, [r4, #260]! @ 0x104 │ │ + stc2l 8, cr4, [r3, #248]! @ 0xf8 │ │ + stc2l 11, cr8, [r3, #204]! @ 0xcc @ │ │ stc2l 3, cr13, [r5, #68]! @ 0x44 │ │ stc2l 7, cr13, [r5, #908]! @ 0x38c │ │ - stc2l 2, cr2, [r2, #484]! @ 0x1e4 │ │ - stc2l 5, cr10, [r4, #792]! @ 0x318 │ │ - stc2l 2, cr12, [r4, #644]! @ 0x284 │ │ - stc2l 10, cr6, [r3, #836]! @ 0x344 @ │ │ - stc2l 8, cr3, [r5, #116]! @ 0x74 │ │ + stc2l 2, cr2, [r2, #664]! @ 0x298 │ │ + stc2l 5, cr10, [r4, #972]! @ 0x3cc │ │ + stc2l 2, cr12, [r4, #824]! @ 0x338 │ │ + stc2l 10, cr6, [r3, #1016]! @ 0x3f8 @ │ │ + vcmla.f16 , , q5, #270 │ │ stc2l 7, cr13, [r5, #604]! @ 0x25c │ │ - stc2l 2, cr12, [r4, #572]! @ 0x23c │ │ - stc2l 1, cr0, [r5, #572]! @ 0x23c │ │ + stc2l 2, cr12, [r4, #752]! @ 0x2f0 │ │ + stc2l 1, cr0, [r5, #752]! @ 0x2f0 │ │ stc2l 6, cr11, [r5, #556]! @ 0x22c │ │ - stc2l 5, cr6, [r4, #536]! @ 0x218 │ │ + stc2l 5, cr6, [r4, #716]! @ 0x2cc │ │ stc2l 6, cr11, [r5, #664]! @ 0x298 │ │ - stc2l 10, cr10, [r3, #800]! @ 0x320 @ │ │ - stc2l 5, cr12, [r3, #932]! @ 0x3a4 │ │ - stc2l 7, cr10, [r2, #772]! @ 0x304 │ │ + stc2l 10, cr10, [r3, #980]! @ 0x3d4 @ │ │ + stc2l 6, cr12, [r3, #88]! @ 0x58 │ │ + stc2l 7, cr10, [r2, #952]! @ 0x3b8 │ │ stc2l 11, cr9, [r5, #52]! @ 0x34 @ │ │ - stc2l 11, cr4, [r3, #904]! @ 0x388 @ │ │ - stc2l 0, cr10, [r4, #692]! @ 0x2b4 │ │ - stc2l 1, cr6, [r5, #480]! @ 0x1e0 │ │ - stc2l 6, cr12, [r2, #772]! @ 0x304 │ │ + stc2l 12, cr4, [r3, #60]! @ 0x3c │ │ + stc2l 0, cr10, [r4, #872]! @ 0x368 │ │ + stc2l 1, cr6, [r5, #660]! @ 0x294 │ │ + stc2l 6, cr12, [r2, #952]! @ 0x3b8 │ │ stc2l 6, cr13, [r5, #828]! @ 0x33c │ │ - stc2l 1, cr8, [r4, #848]! @ 0x350 │ │ - stc2l 7, cr10, [r2, #360]! @ 0x168 │ │ - stc2l 5, cr12, [r3, #824]! @ 0x338 │ │ - stc2l 10, cr8, [r2, #572]! @ 0x23c @ │ │ - stc2l 7, cr4, [r3, #388]! @ 0x184 │ │ - stc2l 9, cr6, [r3, #270]! @ 0x10e @ │ │ - stc2l 7, cr3, [r5, #556]! @ 0x22c │ │ - stc2l 6, cr12, [r4, #20]! │ │ - vcmla.f16 q11, q9, , #270 │ │ - stc2l 7, cr14, [r3, #612]! @ 0x264 │ │ - stc2l 7, cr4, [r3, #364]! @ 0x16c │ │ + stc2l 2, cr8, [r4, #4]! │ │ + stc2l 7, cr10, [r2, #540]! @ 0x21c │ │ + stc2l 5, cr12, [r3, #1004]! @ 0x3ec │ │ + stc2l 10, cr8, [r2, #752]! @ 0x2f0 @ │ │ + stc2l 7, cr4, [r3, #568]! @ 0x238 │ │ + stc2l 9, cr6, [r3, #360]! @ 0x168 @ │ │ + stc2l 7, cr3, [r5, #736]! @ 0x2e0 │ │ + stc2l 6, cr12, [r4, #200]! @ 0xc8 │ │ + stc2l 9, cr6, [r2, #48]! @ 0x30 @ │ │ + stc2l 7, cr14, [r3, #792]! @ 0x318 │ │ + stc2l 7, cr4, [r3, #544]! @ 0x220 │ │ stc2l 14, cr9, [r5, #552]! @ 0x228 │ │ - stc2l 1, cr2, [r2, #492]! @ 0x1ec │ │ - stc2l 4, cr4, [r2, #364]! @ 0x16c │ │ + stc2l 1, cr2, [r2, #672]! @ 0x2a0 │ │ + stc2l 4, cr4, [r2, #544]! @ 0x220 │ │ │ │ 023f2f00 : │ │ mov ip, #0 │ │ cmp r2, r3 │ │ blt 23f2f60 │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ @@ -1223205,21 +1223204,21 @@ │ │ add r1, sl, r2 │ │ mov r0, r6 │ │ mov r2, r8 │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 14, cr3, [r2, #508]! @ 0x1fc │ │ + stc2l 14, cr3, [r2, #688]! @ 0x2b0 │ │ stc2l 14, cr5, [lr, #796]! @ 0x31c │ │ - stc2l 11, cr1, [r4, #132]! @ 0x84 @ │ │ - stc2l 1, cr8, [r3, #892]! @ 0x37c │ │ + stc2l 11, cr1, [r4, #312]! @ 0x138 @ │ │ + stc2l 2, cr8, [r3, #48]! @ 0x30 │ │ stc2l 15, cr5, [lr, #284]! @ 0x11c │ │ - stc2l 2, cr8, [r3, #412]! @ 0x19c │ │ - stc2l 11, cr1, [r4, #356]! @ 0x164 @ │ │ + stc2l 2, cr8, [r3, #592]! @ 0x250 │ │ + stc2l 11, cr1, [r4, #536]! @ 0x218 @ │ │ │ │ 023f3120 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ ldr r4, [r1] │ │ cmp r4, #1 │ │ blt 23f3174 │ │ @@ -1223277,19 +1223276,19 @@ │ │ bl 270ce00 │ │ mov r0, r4 │ │ bl 270cdd0 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ mov r0, #1 │ │ pop {r4, sl, fp, pc} │ │ - stc2l 1, cr8, [r2, #964]! @ 0x3c4 │ │ - stc2l 2, cr7, [r5, #224]! @ 0xe0 │ │ - stc2l 12, cr15, [r2, #884]! @ 0x374 │ │ - stc2l 9, cr1, [r3, #204]! @ 0xcc @ │ │ - stc2l 7, cr15, [r4, #608]! @ 0x260 │ │ + stc2l 2, cr8, [r2, #120]! @ 0x78 │ │ + stc2l 2, cr7, [r5, #404]! @ 0x194 │ │ + stc2l 13, cr15, [r2, #40]! @ 0x28 │ │ + stc2l 9, cr1, [r3, #294]! @ 0x126 @ │ │ + stc2l 7, cr15, [r4, #788]! @ 0x314 │ │ │ │ 023f3228 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #52 @ 0x34 │ │ mov r8, r0 │ │ ldr r0, [pc, #632] @ 23f34b8 │ │ @@ -1223448,44 +1223447,44 @@ │ │ ldr r2, [sp, #36] @ 0x24 │ │ add r0, pc, r0 │ │ ldr r1, [fp, #-36] @ 0xffffffdc │ │ str r1, [r2] │ │ bl 270cdd0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 2, cr4, [r3, #556]! @ 0x22c │ │ - stc2l 1, cr7, [r5, #384]! @ 0x180 │ │ - stc2l 12, cr15, [r2, #20]! │ │ - stc2l 1, cr14, [r2, #168]! @ 0xa8 │ │ - stc2l 5, cr15, [r4, #608]! @ 0x260 │ │ - stc2l 0, cr4, [r3, #828]! @ 0x33c │ │ - stc2l 14, cr7, [r3, #984]! @ 0x3d8 │ │ - stc2l 11, cr15, [r2, #916]! @ 0x394 @ │ │ - stc2l 1, cr14, [r2, #40]! @ 0x28 │ │ - stc2l 0, cr8, [r2, #312]! @ 0x138 │ │ - stc2l 1, cr7, [r5, #80]! @ 0x50 │ │ - stc2l 11, cr15, [r2, #740]! @ 0x2e4 @ │ │ + stc2l 2, cr4, [r3, #736]! @ 0x2e0 │ │ + stc2l 1, cr7, [r5, #564]! @ 0x234 │ │ + stc2l 12, cr15, [r2, #200]! @ 0xc8 │ │ + stc2l 1, cr14, [r2, #348]! @ 0x15c │ │ + stc2l 5, cr15, [r4, #788]! @ 0x314 │ │ + stc2l 0, cr4, [r3, #1008]! @ 0x3f0 │ │ + stc2l 15, cr7, [r3, #140]! @ 0x8c │ │ + stc2l 12, cr15, [r2, #72]! @ 0x48 │ │ + stc2l 1, cr14, [r2, #220]! @ 0xdc │ │ + stc2l 0, cr8, [r2, #492]! @ 0x1ec │ │ + stc2l 1, cr7, [r5, #260]! @ 0x104 │ │ + stc2l 11, cr15, [r2, #920]! @ 0x398 @ │ │ stc2l 3, cr9, [r5, #72]! @ 0x48 │ │ - stc2l 13, cr9, [r2, #568]! @ 0x238 │ │ - stc2l 12, cr15, [r2, #212]! @ 0xd4 │ │ + stc2l 13, cr9, [r2, #748]! @ 0x2ec │ │ + stc2l 12, cr15, [r2, #392]! @ 0x188 │ │ stc2l 3, cr9, [r5, #568]! @ 0x238 │ │ - stc2l 0, cr3, [r5, #388]! @ 0x184 │ │ - stc2l 0, cr7, [r5, #704]! @ 0x2c0 │ │ - stc2l 11, cr15, [r2, #340]! @ 0x154 @ │ │ - stc2l 10, cr5, [r4, #348]! @ 0x15c @ │ │ - stc2l 12, cr9, [r2, #888]! @ 0x378 │ │ - stc2l 11, cr15, [r2, #532]! @ 0x214 @ │ │ - stc2l 10, cr5, [r4, #540]! @ 0x21c @ │ │ - stc2l 0, cr7, [r5, #224]! @ 0xe0 │ │ - stc2l 10, cr15, [r2, #884]! @ 0x374 @ │ │ - stc2l 2, cr6, [r2, #504]! @ 0x1f8 │ │ - stc2l 12, cr9, [r2, #456]! @ 0x1c8 │ │ - stc2l 11, cr15, [r2, #100]! @ 0x64 @ │ │ - stc2l 2, cr6, [r2, #744]! @ 0x2e8 │ │ - stc2l 0, cr4, [r3, #188]! @ 0xbc │ │ + stc2l 0, cr3, [r5, #568]! @ 0x238 │ │ + stc2l 0, cr7, [r5, #884]! @ 0x374 │ │ + stc2l 11, cr15, [r2, #520]! @ 0x208 @ │ │ + stc2l 10, cr5, [r4, #528]! @ 0x210 @ │ │ + stc2l 13, cr9, [r2, #44]! @ 0x2c │ │ + stc2l 11, cr15, [r2, #712]! @ 0x2c8 @ │ │ + stc2l 10, cr5, [r4, #720]! @ 0x2d0 @ │ │ + stc2l 0, cr7, [r5, #404]! @ 0x194 │ │ + stc2l 11, cr15, [r2, #40]! @ 0x28 @ │ │ + stc2l 2, cr6, [r2, #684]! @ 0x2ac │ │ + stc2l 12, cr9, [r2, #636]! @ 0x27c │ │ + stc2l 11, cr15, [r2, #280]! @ 0x118 @ │ │ + stc2l 2, cr6, [r2, #924]! @ 0x39c │ │ + stc2l 0, cr4, [r3, #368]! @ 0x170 │ │ │ │ 023f3530 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #220 @ 0xdc │ │ sub sp, sp, #1024 @ 0x400 │ │ sub r0, r0, #1 │ │ @@ -1224474,15 +1224473,15 @@ │ │ ldr r4, [pc, #3712] @ 23f5324 │ │ add r5, pc, r5 │ │ ldr r6, [pc, #3708] @ 23f5328 │ │ mov r8, #0 │ │ add r4, pc, r4 │ │ add r6, pc, r6 │ │ b 23f4588 │ │ - stc2l 11, cr13, [r3, #428]! @ 0x1ac @ │ │ + stc2l 11, cr13, [r3, #608]! @ 0x260 @ │ │ eorseq lr, r9, r8, lsr r4 │ │ ldr r0, [pc, #3684] @ 23f532c │ │ mov r1, r8 │ │ mov r2, r6 │ │ movw r3, #3260 @ 0xcbc │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1224546,22 +1224545,22 @@ │ │ add r0, pc, r0 │ │ str sl, [r0, r8, lsl #2] │ │ b 23f455c │ │ subeq sp, lr, ip, lsr r6 │ │ mov r0, #0 │ │ str r0, [r1] │ │ b 23f6dc8 │ │ - stc2l 10, cr9, [r2, #488]! @ 0x1e8 @ │ │ - stc2l 14, cr3, [r3, #828]! @ 0x33c │ │ - stc2l 4, cr3, [r4, #412]! @ 0x19c │ │ + stc2l 10, cr9, [r2, #668]! @ 0x29c @ │ │ + stc2l 14, cr3, [r3, #1008]! @ 0x3f0 │ │ + stc2l 4, cr3, [r4, #592]! @ 0x250 │ │ ldrhteq lr, [r9], -ip │ │ - stc2l 10, cr13, [r3, #876]! @ 0x36c @ │ │ + stc2l 11, cr13, [r3, #32]! @ │ │ eorseq r4, r5, ip, ror #27 │ │ - stc2l 4, cr1, [r4, #996]! @ 0x3e4 │ │ - stc2l 8, cr15, [r2, #116]! @ 0x74 │ │ + stc2l 5, cr1, [r4, #152]! @ 0x98 │ │ + vcmla.f16 , q1, q5, #270 │ │ ldr r0, [pc, #3412] @ 23f5354 │ │ mov r1, r5 │ │ ldr r6, [pc, #3408] @ 23f5358 │ │ movw r3, #2949 @ 0xb85 │ │ add r0, pc, r0 │ │ add r6, pc, r6 │ │ mov r2, r6 │ │ @@ -1224604,48 +1224603,48 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ rsb r1, r1, r1, lsl #8 │ │ ldr r0, [fp, #20] │ │ add r1, r9, r1 │ │ mov r2, sl │ │ b 23f52dc │ │ - stc2l 12, cr11, [r3, #472]! @ 0x1d8 │ │ + stc2l 12, cr11, [r3, #652]! @ 0x28c │ │ ldr r3, [sp, #48] @ 0x30 │ │ b 23f4cbc │ │ eorseq r4, r5, r4, asr sp │ │ ldr r0, [pc, #4004] @ 23f567c │ │ ldr r1, [pc, #4004] @ 23f5680 │ │ ldr r2, [fp, #8] │ │ add r0, pc, r0 │ │ ldr r1, [pc, r1] │ │ str r1, [r2] │ │ b 23f6dc0 │ │ - stc2l 6, cr5, [r4, #872]! @ 0x368 │ │ - stc2l 10, cr13, [r3, #108]! @ 0x6c @ │ │ - stc2l 4, cr1, [r4, #912]! @ 0x390 │ │ + stc2l 7, cr5, [r4, #28]! │ │ + stc2l 10, cr13, [r3, #288]! @ 0x120 @ │ │ + stc2l 5, cr1, [r4, #68]! @ 0x44 │ │ ldrsbteq lr, [r9], -r0 │ │ subeq sp, lr, r0, lsr r5 │ │ - stc2l 7, cr15, [r2, #852]! @ 0x354 │ │ - stc2l 7, cr9, [r4, #292]! @ 0x124 │ │ + vcmla.f16 d31, d2, d2, #270 │ │ + stc2l 7, cr9, [r4, #472]! @ 0x1d8 │ │ strheq r7, [pc], #-172 @ │ │ - stc2l 10, cr7, [r3, #992]! @ 0x3e0 @ │ │ - stc2l 12, cr7, [r2, #904]! @ 0x388 │ │ - stc2l 13, cr2, [r5, #628]! @ 0x274 │ │ - stc2l 1, cr15, [r4, #288]! @ 0x120 │ │ - stc2l 12, cr3, [r3, #740]! @ 0x2e4 │ │ - stc2l 11, cr6, [r5, #964]! @ 0x3c4 @ │ │ + stc2l 11, cr7, [r3, #148]! @ 0x94 @ │ │ + stc2l 13, cr7, [r2, #60]! @ 0x3c │ │ + stc2l 13, cr2, [r5, #808]! @ 0x328 │ │ + stc2l 1, cr15, [r4, #468]! @ 0x1d4 │ │ + stc2l 12, cr3, [r3, #920]! @ 0x398 │ │ + stc2l 12, cr6, [r5, #120]! @ 0x78 │ │ subeq r7, pc, r8, lsr r9 @ │ │ - stc2l 11, cr6, [r5, #740]! @ 0x2e4 @ │ │ - stc2l 11, cr6, [r5, #580]! @ 0x244 @ │ │ + stc2l 11, cr6, [r5, #920]! @ 0x398 @ │ │ + stc2l 11, cr6, [r5, #760]! @ 0x2f8 @ │ │ ldrdeq r7, [pc], #-136 @ │ │ - stc2l 11, cr6, [r5, #356]! @ 0x164 @ │ │ + stc2l 11, cr6, [r5, #536]! @ 0x218 @ │ │ subeq r7, pc, r0, lsr #17 │ │ - stc2l 11, cr6, [r5, #132]! @ 0x84 @ │ │ + stc2l 11, cr6, [r5, #312]! @ 0x138 @ │ │ subeq r7, pc, r8, ror #16 │ │ - stc2l 4, cr3, [r2, #236]! @ 0xec │ │ + stc2l 4, cr3, [r2, #416]! @ 0x1a0 │ │ eorseq sp, r9, r4, asr #31 │ │ mov r0, #0 │ │ mov r6, #0 │ │ str r0, [sp, #48] @ 0x30 │ │ mov r7, #0 │ │ str r0, [sp, #40] @ 0x28 │ │ mov r5, #0 │ │ @@ -1224866,21 +1224865,21 @@ │ │ ldr r0, [pc, #4084] @ 23f5ab8 │ │ mov r1, #17 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4072] @ 23f5abc │ │ add r0, pc, r0 │ │ b 23f6dc0 │ │ - stc2l 9, cr6, [r5, #408]! @ 0x198 @ │ │ - stc2l 9, cr7, [r2, #268]! @ 0x10c @ │ │ - stc2l 9, cr3, [r3, #458]! @ 0x1ca @ │ │ - stc2l 13, cr14, [r4, #960]! @ 0x3c0 │ │ - stc2l 2, cr9, [r4, #668]! @ 0x29c │ │ - stc2l 9, cr2, [r5, #274]! @ 0x112 @ │ │ - stc2l 6, cr7, [r3, #176]! @ 0xb0 │ │ + stc2l 9, cr6, [r5, #498]! @ 0x1f2 @ │ │ + stc2l 9, cr7, [r2, #358]! @ 0x166 @ │ │ + stc2l 10, cr3, [r3, #72]! @ 0x48 @ │ │ + stc2l 14, cr14, [r4, #116]! @ 0x74 │ │ + stc2l 2, cr9, [r4, #848]! @ 0x350 │ │ + stc2l 9, cr2, [r5, #364]! @ 0x16c @ │ │ + stc2l 6, cr7, [r3, #356]! @ 0x164 │ │ ldr r1, [fp, #24] │ │ mov r0, #1 │ │ ldr r5, [sp, #32] │ │ movw sl, #5300 @ 0x14b4 │ │ ldr r6, [fp, #32] │ │ str r0, [r1] │ │ ldr r0, [r5] │ │ @@ -1224985,15 +1224984,15 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ rsb r0, r1, r1, lsl #8 │ │ mov r2, r9 │ │ add r1, r8, r0 │ │ b 23f52d8 │ │ stc2l 3, cr12, [r5, #20]! │ │ - stc2l 1, cr3, [r2, #204]! @ 0xcc │ │ + stc2l 1, cr3, [r2, #384]! @ 0x180 │ │ mov r3, #1 │ │ ldr r1, [pc, #3932] @ 23f5c20 │ │ mov r2, #0 │ │ ldr r0, [pc, #3928] @ 23f5c24 │ │ add r1, pc, r1 │ │ str r3, [fp, #-68] @ 0xffffffbc │ │ add r0, pc, r0 │ │ @@ -1225002,27 +1225001,27 @@ │ │ mov r2, #6 │ │ bl 270dea0 │ │ ldr r0, [pc, #3900] @ 23f5c28 │ │ add r0, pc, r0 │ │ b 23f6dc0 │ │ ldrsbteq sp, [r9], -ip │ │ ldrsbteq sp, [r9], -ip │ │ - stc2l 1, cr9, [r4, #116]! @ 0x74 │ │ - stc2l 1, cr15, [r2, #644]! @ 0x284 │ │ + stc2l 1, cr9, [r4, #296]! @ 0x128 │ │ + stc2l 1, cr15, [r2, #824]! @ 0x338 │ │ subeq ip, lr, r4, ror #29 │ │ subeq r7, pc, r0, ror #8 │ │ subeq r7, lr, ip, lsl #23 │ │ eorseq sp, r9, r8, lsl ip │ │ - stc2l 12, cr4, [r5, #276]! @ 0x114 │ │ - stc2l 6, cr6, [r5] │ │ - stc2l 5, cr7, [r2, #760]! @ 0x2f8 │ │ - stc2l 6, cr3, [r3, #116]! @ 0x74 │ │ - stc2l 10, cr14, [r4, #144]! @ 0x90 @ │ │ - stc2l 14, cr8, [r4, #860]! @ 0x35c │ │ - stc2l 5, cr2, [r5, #724]! @ 0x2d4 │ │ + stc2l 12, cr4, [r5, #456]! @ 0x1c8 │ │ + stc2l 6, cr6, [r5, #180]! @ 0xb4 │ │ + stc2l 5, cr7, [r2, #940]! @ 0x3ac │ │ + stc2l 6, cr3, [r3, #296]! @ 0x128 │ │ + stc2l 10, cr14, [r4, #324]! @ 0x144 @ │ │ + stc2l 15, cr8, [r4, #16]! │ │ + stc2l 5, cr2, [r5, #904]! @ 0x388 │ │ ldr r1, [sp, #48] @ 0x30 │ │ movw r0, #5301 @ 0x14b5 │ │ sub r2, r1, #1 │ │ cmp r1, r0 │ │ str r2, [fp, #-36] @ 0xffffffdc │ │ mov r8, r2 │ │ mov r0, r2 │ │ @@ -1225208,15 +1225207,15 @@ │ │ bl 270d960 │ │ cmp r0, #0 │ │ mov r2, r8 │ │ addne r9, r9, #1 │ │ b 23f503c │ │ mov r5, r2 │ │ b 23f503c │ │ - stc2l 2, cr7, [r3, #336]! @ 0x150 │ │ + stc2l 2, cr7, [r3, #516]! @ 0x204 │ │ mov r2, r8 │ │ mov r5, r8 │ │ ldr r1, [pc, #3968] @ 23f5fc4 │ │ add r0, sl, #1 │ │ ldr r1, [pc, r1] │ │ cmp sl, r1 │ │ bge 23f505c │ │ @@ -1225224,19 +1225223,19 @@ │ │ mov sl, r0 │ │ blt 23f4f10 │ │ str r5, [fp, #-40] @ 0xffffffd8 │ │ ldr r4, [pc, #3936] @ 23f5fc8 │ │ add r4, pc, r4 │ │ b 23f5378 │ │ stc2l 15, cr11, [r5, #148]! @ 0x94 │ │ - stc2l 3, cr11, [r2, #408]! @ 0x198 │ │ + stc2l 3, cr11, [r2, #588]! @ 0x24c │ │ eorseq sp, r9, ip, lsr #18 │ │ eorseq sp, r9, r0, lsl r9 │ │ - stc2l 1, cr5, [r3, #868]! @ 0x364 │ │ - stc2l 14, cr14, [r2, #180]! @ 0xb4 │ │ + stc2l 2, cr5, [r3, #24]! │ │ + stc2l 14, cr14, [r2, #360]! @ 0x168 │ │ ldr r2, [fp, #24] │ │ mov r1, #1 │ │ ldr r0, [fp, #-68] @ 0xffffffbc │ │ movw r5, #5300 @ 0x14b4 │ │ str r1, [r2] │ │ sub r1, r0, #1 │ │ cmp r1, r5 │ │ @@ -1225282,16 +1225281,16 @@ │ │ ldr r0, [pc, #4016] @ 23f60f4 │ │ ldr r2, [fp, #16] │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ str r0, [r2] │ │ b 23f5258 │ │ stc2l 6, cr8, [r5, #848]! @ 0x350 │ │ - stc2l 12, cr8, [r4, #284]! @ 0x11c │ │ - stc2l 2, cr6, [r5, #884]! @ 0x374 │ │ + stc2l 12, cr8, [r4, #464]! @ 0x1d0 │ │ + stc2l 3, cr6, [r5, #40]! @ 0x28 │ │ eorseq sp, r9, ip, asr #16 │ │ subeq ip, lr, r4, lsr #21 │ │ ldr r0, [pc, #4088] @ 23f6168 │ │ add r1, sp, #416 @ 0x1a0 │ │ mov r2, #6 │ │ add r0, pc, r0 │ │ bl 270dea0 │ │ @@ -1225314,23 +1225313,23 @@ │ │ bl 270df00 │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 23f5704 │ │ ldr r0, [pc, #4004] @ 23f6178 │ │ add r0, pc, r0 │ │ b 23f6dc0 │ │ - stc2l 12, cr8, [r4, #676]! @ 0x2a4 │ │ - stc2l 13, cr14, [r2, #180]! @ 0xb4 │ │ - stc2l 2, cr7, [r2, #744]! @ 0x2e8 │ │ - stc2l 12, cr8, [r4, #324]! @ 0x144 │ │ - stc2l 12, cr14, [r2, #852]! @ 0x354 │ │ - stc2l 2, cr3, [r3, #996]! @ 0x3e4 │ │ - stc2l 11, cr8, [r4, #996]! @ 0x3e4 @ │ │ - stc2l 12, cr14, [r2, #500]! @ 0x1f4 │ │ - stc2l 6, cr14, [r4, #960]! @ 0x3c0 │ │ + stc2l 12, cr8, [r4, #856]! @ 0x358 │ │ + stc2l 13, cr14, [r2, #360]! @ 0x168 │ │ + stc2l 2, cr7, [r2, #924]! @ 0x39c │ │ + stc2l 12, cr8, [r4, #504]! @ 0x1f8 │ │ + stc2l 13, cr14, [r2, #8]! │ │ + stc2l 3, cr3, [r3, #152]! @ 0x98 │ │ + stc2l 12, cr8, [r4, #152]! @ 0x98 │ │ + stc2l 12, cr14, [r2, #680]! @ 0x2a8 │ │ + stc2l 7, cr14, [r4, #116]! @ 0x74 │ │ ldr r0, [pc, #3960] @ 23f617c │ │ movw r3, #2602 @ 0xa2a │ │ ldr r2, [pc, #3956] @ 23f6180 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3944] @ 23f6184 │ │ @@ -1225382,48 +1225381,48 @@ │ │ rsb r0, r1, r1, lsl #8 │ │ mov r2, sl │ │ add r1, r4, r0 │ │ mov r0, r5 │ │ mov r3, #255 @ 0xff │ │ bl 270d970 │ │ b 23f6dc8 │ │ - stc2l 11, cr8, [r4, #644]! @ 0x284 @ │ │ - stc2l 12, cr14, [r2, #148]! @ 0x94 │ │ - stc2l 11, cr8, [r4, #540]! @ 0x21c @ │ │ - stc2l 11, cr8, [r4, #292]! @ 0x124 @ │ │ - stc2l 11, cr14, [r2, #820]! @ 0x334 @ │ │ - stc2l 2, cr2, [r5, #340]! @ 0x154 │ │ - stc2l 10, cr8, [r4, #948]! @ 0x3b4 @ │ │ - stc2l 11, cr14, [r2, #452]! @ 0x1c4 @ │ │ - stc2l 14, cr6, [r3, #848]! @ 0x350 │ │ - stc2l 10, cr8, [r4, #580]! @ 0x244 @ │ │ - stc2l 11, cr14, [r2, #84]! @ 0x54 @ │ │ + stc2l 11, cr8, [r4, #824]! @ 0x338 @ │ │ + stc2l 12, cr14, [r2, #328]! @ 0x148 │ │ + stc2l 11, cr8, [r4, #720]! @ 0x2d0 @ │ │ + stc2l 11, cr8, [r4, #472]! @ 0x1d8 @ │ │ + stc2l 11, cr14, [r2, #1000]! @ 0x3e8 @ │ │ + stc2l 2, cr2, [r5, #520]! @ 0x208 │ │ + stc2l 11, cr8, [r4, #104]! @ 0x68 @ │ │ + stc2l 11, cr14, [r2, #632]! @ 0x278 @ │ │ + stc2l 15, cr6, [r3, #4]! │ │ + stc2l 10, cr8, [r4, #760]! @ 0x2f8 @ │ │ + stc2l 11, cr14, [r2, #264]! @ 0x108 @ │ │ stc2l 11, cr11, [r5, #564]! @ 0x234 @ │ │ - stc2l 5, cr4, [r5, #836]! @ 0x344 │ │ + stc2l 5, cr4, [r5, #1016]! @ 0x3f8 │ │ eorseq sp, r9, ip, ror r5 │ │ eorseq sp, r9, ip, asr r5 │ │ - stc2l 9, cr2, [r2, #190]! @ 0xbe @ │ │ - stc2l 10, cr14, [r2, #452]! @ 0x1c4 @ │ │ - stc2l 13, cr4, [r3, #996]! @ 0x3e4 │ │ + stc2l 9, cr2, [r2, #280]! @ 0x118 @ │ │ + stc2l 10, cr14, [r2, #632]! @ 0x278 @ │ │ + stc2l 14, cr4, [r3, #152]! @ 0x98 │ │ eorseq sp, r9, r4, lsl r5 │ │ - stc2l 15, cr5, [r5, #740]! @ 0x2e4 │ │ + stc2l 15, cr5, [r5, #920]! @ 0x398 │ │ strdeq r6, [pc], #-204 @ │ │ - stc2l 6, cr0, [r4, #824]! @ 0x338 │ │ + stc2l 6, cr0, [r4, #1004]! @ 0x3ec │ │ subeq r7, lr, r8, lsl #8 │ │ - stc2l 9, cr8, [r4, #146]! @ 0x92 @ │ │ + stc2l 9, cr8, [r4, #236]! @ 0xec @ │ │ subeq ip, lr, ip, lsl #14 │ │ subeq r6, pc, r8, ror #24 │ │ subeq r7, lr, ip, lsl #7 │ │ - stc2l 14, cr5, [r5, #740]! @ 0x2e4 │ │ - stc2l 9, cr14, [r2, #42]! @ 0x2a @ │ │ + stc2l 14, cr5, [r5, #920]! @ 0x398 │ │ + stc2l 9, cr14, [r2, #132]! @ 0x84 @ │ │ strdeq r6, [pc], #-180 @ │ │ - stc2l 5, cr0, [r4, #776]! @ 0x308 │ │ + stc2l 5, cr0, [r4, #956]! @ 0x3bc │ │ subeq r7, lr, r4, lsl #6 │ │ - stc2l 5, cr0, [r4, #600]! @ 0x258 │ │ - stc2l 8, cr14, [r2, #740]! @ 0x2e4 │ │ + stc2l 5, cr0, [r4, #780]! @ 0x30c │ │ + vcmla.f16 q15, q9, q11, #270 │ │ mov r9, #0 │ │ mov r0, #1 │ │ str r0, [sp, #428] @ 0x1ac │ │ sub r0, r9, #1 │ │ clz r0, r0 │ │ lsr r9, r0, #5 │ │ ldr r1, [sp, #48] @ 0x30 │ │ @@ -1225609,17 +1225608,17 @@ │ │ str r1, [sp, #32] │ │ add sl, pc, sl │ │ str r1, [sp, #28] │ │ str r1, [sp, #24] │ │ str r1, [sp, #36] @ 0x24 │ │ b 23f58dc │ │ ldrdeq r7, [lr], #-32 @ 0xffffffe0 │ │ - stc2l 12, cr4, [r3, #180]! @ 0xb4 │ │ - vcmla.f16 d30, d18, d1, #270 │ │ - stc2l 3, cr4, [r5, #388]! @ 0x184 │ │ + stc2l 12, cr4, [r3, #360]! @ 0x168 │ │ + vcmla.f16 d30, d18, d30, #270 │ │ + stc2l 3, cr4, [r5, #568]! @ 0x238 │ │ eorseq sp, r9, r8, lsl r3 │ │ mov r0, #0 │ │ mov r7, #1 │ │ cmp r9, #0 │ │ str r0, [sp, #44] @ 0x2c │ │ beq 23f56dc │ │ ldr r1, [sp, #48] @ 0x30 │ │ @@ -1225641,18 +1225640,18 @@ │ │ bl 270dec0 │ │ mov r5, #1 │ │ mov r4, #1 │ │ mov r6, #1 │ │ mov sl, #1 │ │ b 23f6470 │ │ eorseq sp, r9, r4, ror r2 │ │ - stc2l 6, cr8, [r4, #868]! @ 0x364 │ │ - stc2l 7, cr14, [r2, #372]! @ 0x174 │ │ + stc2l 7, cr8, [r4, #24]! │ │ + stc2l 7, cr14, [r2, #552]! @ 0x228 │ │ umaaleq ip, lr, ip, r4 │ │ - stc2l 12, cr6, [r2, #904]! @ 0x388 │ │ + stc2l 13, cr6, [r2, #60]! @ 0x3c │ │ ldr r0, [pc, #4076] @ 23f66f8 │ │ movw r4, #5300 @ 0x14b4 │ │ ldr r3, [pc, #4072] @ 23f66fc │ │ add r0, pc, r0 │ │ ldr r3, [pc, r3] │ │ str r3, [fp, #-36] @ 0xffffffdc │ │ cmp r3, r4 │ │ @@ -1225705,18 +1225704,18 @@ │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ bhi 23f61b0 │ │ ldr r0, [pc, #4048] @ 23f67b8 │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 23f620c │ │ - stc2l 6, cr8, [r4, #484]! @ 0x1e4 │ │ - stc2l 6, cr14, [r2, #1012]! @ 0x3f4 │ │ + stc2l 6, cr8, [r4, #664]! @ 0x298 │ │ + stc2l 7, cr14, [r2, #168]! @ 0xa8 │ │ subeq ip, lr, ip, lsr r4 │ │ - stc2l 13, cr2, [r3, #100]! @ 0x64 │ │ + stc2l 13, cr2, [r3, #280]! @ 0x118 │ │ mov r5, #1 │ │ mov r7, #0 │ │ cmp r9, #0 │ │ beq 23f5858 │ │ ldr r1, [sp, #48] @ 0x30 │ │ movw r0, #5301 @ 0x14b5 │ │ str r8, [fp, #-36] @ 0xffffffdc │ │ @@ -1225733,37 +1225732,37 @@ │ │ ldr r0, [pc, #3956] @ 23f67c4 │ │ add r0, pc, r0 │ │ add r0, r0, r8, lsl #2 │ │ bl 270cfd0 │ │ mov r4, #1 │ │ mov r6, #1 │ │ b 23f6464 │ │ - stc2l 6, cr8, [r4, #100]! @ 0x64 │ │ - stc2l 6, cr14, [r2, #628]! @ 0x274 │ │ + stc2l 6, cr8, [r4, #280]! @ 0x118 │ │ + stc2l 6, cr14, [r2, #808]! @ 0x328 │ │ ldrdeq ip, [lr], #-60 @ 0xffffffc4 │ │ - stc2l 1, cr14, [r4, #32]! │ │ - stc2l 5, cr8, [r4, #724]! @ 0x2d4 │ │ - stc2l 6, cr14, [r2, #228]! @ 0xe4 │ │ + stc2l 1, cr14, [r4, #212]! @ 0xd4 │ │ + stc2l 5, cr8, [r4, #904]! @ 0x388 │ │ + stc2l 6, cr14, [r2, #408]! @ 0x198 │ │ subeq ip, lr, r8, ror r3 │ │ - stc2l 5, cr8, [r4, #588]! @ 0x24c │ │ - stc2l 5, cr8, [r4, #340]! @ 0x154 │ │ - stc2l 5, cr14, [r2, #868]! @ 0x364 │ │ + stc2l 5, cr8, [r4, #768]! @ 0x300 │ │ + stc2l 5, cr8, [r4, #520]! @ 0x208 │ │ + stc2l 6, cr14, [r2, #24]! │ │ subeq ip, lr, r8, lsl r3 │ │ - stc2l 12, cr1, [r5, #356]! @ 0x164 │ │ - stc2l 4, cr8, [r4, #964]! @ 0x3c4 │ │ - stc2l 5, cr14, [r2, #468]! @ 0x1d4 │ │ + stc2l 12, cr1, [r5, #536]! @ 0x218 │ │ + stc2l 5, cr8, [r4, #120]! @ 0x78 │ │ + stc2l 5, cr14, [r2, #648]! @ 0x288 │ │ strheq ip, [lr], #-36 @ 0xffffffdc │ │ - stc2l 8, cr6, [r3, #832]! @ 0x340 │ │ - stc2l 4, cr8, [r4, #580]! @ 0x244 │ │ - stc2l 5, cr14, [r2, #84]! @ 0x54 │ │ + stc2l 8, cr6, [r3, #1012]! @ 0x3f4 │ │ + stc2l 4, cr8, [r4, #760]! @ 0x2f8 │ │ + stc2l 5, cr14, [r2, #264]! @ 0x108 │ │ subeq ip, lr, r4, asr r2 │ │ stc2l 5, cr11, [r5, #532]! @ 0x214 │ │ eorseq ip, r9, r0, ror pc │ │ - stc2l 9, cr6, [r2, #68]! @ 0x44 @ │ │ - stc2l 4, cr14, [r2, #68]! @ 0x44 │ │ + stc2l 9, cr6, [r2, #158]! @ 0x9e @ │ │ + stc2l 4, cr14, [r2, #248]! @ 0xf8 │ │ eorseq r3, r5, r8, lsl #19 │ │ mov r1, r0 │ │ ldr r2, [fp, #-36] @ 0xffffffdc │ │ sub r0, r1, #1 │ │ str r0, [sp, #428] @ 0x1ac │ │ cmp r1, r2 │ │ ble 23f76f8 │ │ @@ -1225882,24 +1225881,24 @@ │ │ ldr r0, [pc, #4012] @ 23f6a50 │ │ ldr r0, [pc, r0] │ │ cmp r0, #1 │ │ blt 23f5c54 │ │ mov r5, #1 │ │ mov r9, #0 │ │ b 23f5b1c │ │ - stc2l 7, cr6, [r3, #808]! @ 0x328 │ │ - stc2l 6, cr12, [r3, #300]! @ 0x12c │ │ - stc2l 7, cr4, [r3, #612]! @ 0x264 │ │ - stc2l 3, cr14, [r2, #948]! @ 0x3b4 │ │ + stc2l 7, cr6, [r3, #988]! @ 0x3dc │ │ + stc2l 6, cr12, [r3, #480]! @ 0x1e0 │ │ + stc2l 7, cr4, [r3, #792]! @ 0x318 │ │ + stc2l 4, cr14, [r2, #104]! @ 0x68 │ │ eorseq ip, r9, ip, lsr #29 │ │ - stc2l 3, cr8, [r4, #68]! @ 0x44 │ │ - stc2l 3, cr14, [r2, #596]! @ 0x254 │ │ + stc2l 3, cr8, [r4, #248]! @ 0xf8 │ │ + stc2l 3, cr14, [r2, #776]! @ 0x308 │ │ ldrdeq ip, [lr], #-8 │ │ - vcmla.f16 , , , #270 │ │ - stc2l 3, cr14, [r2, #276]! @ 0x114 │ │ + stc2l 9, cr5, [r5, #44]! @ 0x2c @ │ │ + stc2l 3, cr14, [r2, #456]! @ 0x1c8 │ │ subeq r6, pc, ip, lsr #12 │ │ ldr r1, [pc, #3944] @ 23f6a54 │ │ add r0, r8, r6, lsl #3 │ │ mov r2, #8 │ │ mov r3, #4 │ │ add r1, pc, r1 │ │ bl 270d960 │ │ @@ -1225965,34 +1225964,34 @@ │ │ mov r1, r6 │ │ mov r2, sl │ │ movw r3, #3988 @ 0xf94 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r6, r0 │ │ b 23f5ae4 │ │ - stc2l 15, cr15, [r3, #904]! @ 0x388 │ │ - stc2l 3, cr14, [r2, #20]! │ │ + stc2l 0, cr0, [r4, #60]! @ 0x3c │ │ + stc2l 3, cr14, [r2, #200]! @ 0xc8 │ │ subeq r6, lr, ip, lsl sp │ │ - stc2l 15, cr15, [r3, #616]! @ 0x268 │ │ - stc2l 2, cr14, [r2, #756]! @ 0x2f4 │ │ - stc2l 6, cr4, [r3, #228]! @ 0xe4 │ │ - stc2l 2, cr14, [r2, #564]! @ 0x234 │ │ + stc2l 15, cr15, [r3, #796]! @ 0x31c │ │ + stc2l 2, cr14, [r2, #936]! @ 0x3a8 │ │ + stc2l 6, cr4, [r3, #408]! @ 0x198 │ │ + stc2l 2, cr14, [r2, #744]! @ 0x2e8 │ │ eorseq ip, r9, r0, lsr sp │ │ - stc2l 4, cr12, [r3, #300]! @ 0x12c │ │ - stc2l 15, cr15, [r3, #96]! @ 0x60 │ │ - stc2l 1, cr8, [r4, #244]! @ 0xf4 │ │ - stc2l 1, cr14, [r2, #772]! @ 0x304 │ │ + stc2l 4, cr12, [r3, #480]! @ 0x1e0 │ │ + stc2l 15, cr15, [r3, #276]! @ 0x114 │ │ + stc2l 1, cr8, [r4, #424]! @ 0x1a8 │ │ + stc2l 1, cr14, [r2, #952]! @ 0x3b8 │ │ subeq fp, lr, r0, lsl #30 │ │ - stc2l 5, cr6, [r3, #144]! @ 0x90 │ │ - stc2l 0, cr8, [r4, #900]! @ 0x384 │ │ - stc2l 1, cr14, [r2, #404]! @ 0x194 │ │ - stc2l 6, cr6, [r2, #968]! @ 0x3c8 │ │ - stc2l 0, cr8, [r4, #548]! @ 0x224 │ │ - stc2l 1, cr14, [r2, #52]! @ 0x34 │ │ - stc2l 7, cr2, [r3, #196]! @ 0xc4 │ │ + stc2l 5, cr6, [r3, #324]! @ 0x144 │ │ + stc2l 1, cr8, [r4, #56]! @ 0x38 │ │ + stc2l 1, cr14, [r2, #584]! @ 0x248 │ │ + stc2l 7, cr6, [r2, #124]! @ 0x7c │ │ + stc2l 0, cr8, [r4, #728]! @ 0x2d8 │ │ + stc2l 1, cr14, [r2, #232]! @ 0xe8 │ │ + stc2l 7, cr2, [r3, #376]! @ 0x178 │ │ mov r9, #0 │ │ sub r0, r9, #1 │ │ ldr r4, [pc, #3892] @ 23f6b98 │ │ clz r0, r0 │ │ add r4, pc, r4 │ │ lsr r9, r0, #5 │ │ ldr r0, [sp, #428] @ 0x1ac │ │ @@ -1226108,17 +1226107,17 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ add r0, r7, r1, lsl #2 │ │ bl 270d7e0 │ │ ldr r4, [pc, #4084] @ 23f6e30 │ │ add r4, pc, r4 │ │ b 23f5ff4 │ │ - stc2l 0, cr8, [r4, #212]! @ 0xd4 │ │ - stc2l 0, cr14, [r2, #740]! @ 0x2e4 │ │ - stc2l 11, cr13, [r4, #176]! @ 0xb0 @ │ │ + stc2l 0, cr8, [r4, #392]! @ 0x188 │ │ + stc2l 0, cr14, [r2, #920]! @ 0x398 │ │ + stc2l 11, cr13, [r4, #356]! @ 0x164 @ │ │ mov r0, #1 │ │ cmp r9, #0 │ │ str r0, [sp, #40] @ 0x28 │ │ beq 23f5ff4 │ │ ldr r0, [sp, #428] @ 0x1ac │ │ sub r1, r0, #1 │ │ movw r0, #5300 @ 0x14b4 │ │ @@ -1226130,43 +1226129,43 @@ │ │ movw r3, #4009 @ 0xfa9 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ add r0, r7, r1, lsl #2 │ │ bl 270dec0 │ │ b 23f5ff4 │ │ - stc2l 15, cr7, [r4, #900]! @ 0x384 │ │ - stc2l 0, cr14, [r2, #404]! @ 0x194 │ │ + stc2l 0, cr8, [r4, #56]! @ 0x38 │ │ + stc2l 0, cr14, [r2, #584]! @ 0x248 │ │ cmp r9, #0 │ │ beq 23f5f60 │ │ ldr r0, [sp, #428] @ 0x1ac │ │ sub r1, r0, #1 │ │ movw r0, #5300 @ 0x14b4 │ │ cmp r1, r0 │ │ str r1, [fp, #-40] @ 0xffffffd8 │ │ bcs 23f5f74 │ │ mov r0, #1 │ │ str r0, [sp, #36] @ 0x24 │ │ b 23f5f94 │ │ - stc2l 6, cr1, [r5, #948]! @ 0x3b4 │ │ + stc2l 7, cr1, [r5, #104]! @ 0x68 │ │ eorseq ip, r9, r8, lsl #22 │ │ cmp r9, #0 │ │ beq 23f5fa0 │ │ ldr r0, [sp, #428] @ 0x1ac │ │ sub r1, r0, #1 │ │ movw r0, #5300 @ 0x14b4 │ │ cmp r1, r0 │ │ str r1, [fp, #-40] @ 0xffffffd8 │ │ bcs 23f5fcc │ │ mov r0, #1 │ │ str r0, [sp, #32] │ │ b 23f5fec │ │ subeq r6, pc, ip, lsl #6 │ │ - stc2l 5, cr5, [r5, #580]! @ 0x244 │ │ - stc2l 15, cr13, [r2, #948]! @ 0x3b4 │ │ + stc2l 5, cr5, [r5, #760]! @ 0x2f8 │ │ + stc2l 0, cr14, [r2, #104]! @ 0x68 │ │ mov r0, #1 │ │ cmp r9, #0 │ │ str r0, [sp, #28] │ │ beq 23f5ff4 │ │ ldr r0, [sp, #428] @ 0x1ac │ │ sub r1, r0, #1 │ │ movw r0, #5300 @ 0x14b4 │ │ @@ -1226178,21 +1226177,21 @@ │ │ movw r3, #4033 @ 0xfc1 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ add r0, r7, r1, lsl #2 │ │ bl 270dee0 │ │ b 23f5ff4 │ │ - stc2l 5, cr5, [r5, #372]! @ 0x174 │ │ - stc2l 15, cr13, [r2, #740]! @ 0x2e4 │ │ + stc2l 5, cr5, [r5, #552]! @ 0x228 │ │ + stc2l 15, cr13, [r2, #920]! @ 0x398 │ │ mov r0, #1 │ │ str r0, [sp, #36] @ 0x24 │ │ b 23f5ff4 │ │ - stc2l 14, cr7, [r4, #1012]! @ 0x3f4 │ │ - stc2l 15, cr13, [r2, #516]! @ 0x204 │ │ + stc2l 15, cr7, [r4, #168]! @ 0xa8 │ │ + stc2l 15, cr13, [r2, #696]! @ 0x2b8 │ │ mov r0, #1 │ │ mov r2, sl │ │ str r0, [sp, #36] @ 0x24 │ │ movw r3, #4017 @ 0xfb1 │ │ ldr r0, [pc, #4084] @ 23f6f80 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1226201,18 +1226200,18 @@ │ │ bl 270cfd0 │ │ b 23f5ff4 │ │ mov r0, #1 │ │ str r0, [sp, #32] │ │ b 23f5ff4 │ │ subeq fp, lr, r4, asr #25 │ │ stc2l 15, cr10, [r5, #980]! @ 0x3d4 │ │ - stc2l 14, cr7, [r4, #692]! @ 0x2b4 │ │ - stc2l 15, cr13, [r2, #196]! @ 0xc4 │ │ + stc2l 14, cr7, [r4, #872]! @ 0x368 │ │ + stc2l 15, cr13, [r2, #376]! @ 0x178 │ │ subeq fp, lr, r4, ror ip │ │ - stc2l 14, cr7, [r4, #572]! @ 0x23c │ │ + stc2l 14, cr7, [r4, #752]! @ 0x2f0 │ │ ldrhteq ip, [r9], -r4 │ │ subeq fp, lr, r4, lsl ip │ │ mov r0, #1 │ │ mov r2, sl │ │ str r0, [sp, #32] │ │ movw r3, #4025 @ 0xfb9 │ │ ldr r0, [pc, #4000] @ 23f6f84 │ │ @@ -1226259,16 +1226258,16 @@ │ │ ldr r0, [pc, #3856] @ 23f6f98 │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-40] @ 0xffffffd8 │ │ cmp r1, r0 │ │ bgt 23f6160 │ │ sub r6, r1, #1 │ │ b 23f60c0 │ │ - stc2l 2, cr4, [r3, #100]! @ 0x64 │ │ - stc2l 14, cr13, [r2, #436]! @ 0x1b4 │ │ + stc2l 2, cr4, [r3, #280]! @ 0x118 │ │ + stc2l 14, cr13, [r2, #616]! @ 0x268 │ │ eorseq ip, r9, ip, lsr #18 │ │ sub r1, r5, #1 │ │ str r1, [r4, r0, lsl #2] │ │ ldr r0, [fp, #-40] @ 0xffffffd8 │ │ add r6, r6, #1 │ │ cmp r6, r0 │ │ bge 23f615c │ │ @@ -1226278,16 +1226277,16 @@ │ │ bhi 23f60f8 │ │ ldr r5, [r4, r6, lsl #2] │ │ ldr r0, [sp, #428] @ 0x1ac │ │ cmp r5, r0 │ │ mov r0, r6 │ │ bgt 23f60a8 │ │ b 23f60b0 │ │ - stc2l 13, cr7, [r4, #628]! @ 0x274 │ │ - stc2l 14, cr13, [r2, #132]! @ 0x84 │ │ + stc2l 13, cr7, [r4, #808]! @ 0x328 │ │ + stc2l 14, cr13, [r2, #312]! @ 0x138 │ │ subeq fp, lr, r4, ror #22 │ │ ldrdeq r6, [pc], #-4 @ │ │ ldr r0, [pc, #3988] @ 23f7094 │ │ mov r1, r6 │ │ mov r2, sl │ │ movw r3, #4068 @ 0xfe4 │ │ add r0, pc, r0 │ │ @@ -1226310,32 +1226309,32 @@ │ │ movw r3, #4073 @ 0xfe9 │ │ str r6, [fp, #-44] @ 0xffffffd4 │ │ bl 270d9c0 │ │ b 23f60a8 │ │ ldr r1, [sp, #428] @ 0x1ac │ │ ldr r9, [sp, #44] @ 0x2c │ │ b 23f58c8 │ │ - stc2l 15, cr11, [r3, #668]! @ 0x29c │ │ + stc2l 15, cr11, [r3, #848]! @ 0x350 │ │ str r0, [sp, #24] │ │ b 23f5ff4 │ │ - stc2l 12, cr3, [r4, #356]! @ 0x164 │ │ - stc2l 15, cr11, [r3, #300]! @ 0x12c │ │ - stc2l 2, cr5, [r5, #740]! @ 0x2e4 │ │ - stc2l 13, cr13, [r2, #84]! @ 0x54 │ │ + stc2l 12, cr3, [r4, #536]! @ 0x218 │ │ + stc2l 15, cr11, [r3, #480]! @ 0x1e0 │ │ + stc2l 2, cr5, [r5, #920]! @ 0x398 │ │ + stc2l 13, cr13, [r2, #264]! @ 0x108 │ │ strdeq r5, [pc], #-252 @ │ │ - stc2l 9, cr15, [r3, #356]! @ 0x164 @ │ │ - stc2l 12, cr13, [r2, #852]! @ 0x354 │ │ + stc2l 9, cr15, [r3, #446]! @ 0x1be @ │ │ + stc2l 13, cr13, [r2, #8]! │ │ subeq r6, lr, ip, ror #13 │ │ - stc2l 9, cr15, [r3, #220]! @ 0xdc @ │ │ - stc2l 12, cr13, [r2, #580]! @ 0x244 │ │ - stc2l 0, cr4, [r3, #52]! @ 0x34 │ │ - stc2l 12, cr13, [r2, #388]! @ 0x184 │ │ - stc2l 10, cr7, [r4, #948]! @ 0x3b4 @ │ │ - stc2l 11, cr13, [r2, #452]! @ 0x1c4 @ │ │ - stc2l 14, cr5, [r3, #848]! @ 0x350 │ │ + stc2l 9, cr15, [r3, #310]! @ 0x136 @ │ │ + stc2l 12, cr13, [r2, #760]! @ 0x2f8 │ │ + stc2l 0, cr4, [r3, #232]! @ 0xe8 │ │ + stc2l 12, cr13, [r2, #568]! @ 0x238 │ │ + stc2l 11, cr7, [r4, #104]! @ 0x68 @ │ │ + stc2l 11, cr13, [r2, #632]! @ 0x278 @ │ │ + stc2l 15, cr5, [r3, #4]! │ │ ldr r0, [pc, #3960] @ 23f7130 │ │ movw r3, #1471 @ 0x5bf │ │ ldr r2, [pc, #3956] @ 23f7134 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3944] @ 23f7138 │ │ @@ -1226463,28 +1226462,28 @@ │ │ ldr r0, [pc, #3796] @ 23f728c │ │ mov r1, #19 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3784] @ 23f7290 │ │ add r0, pc, r0 │ │ b 23f6dc0 │ │ - stc2l 10, cr7, [r4, #580]! @ 0x244 @ │ │ - stc2l 11, cr13, [r2, #84]! @ 0x54 @ │ │ - stc2l 0, cr6, [r2, #664]! @ 0x298 │ │ - stc2l 10, cr7, [r4, #228]! @ 0xe4 @ │ │ - stc2l 10, cr13, [r2, #756]! @ 0x2f4 @ │ │ - stc2l 0, cr2, [r3, #916]! @ 0x394 │ │ - stc2l 9, cr7, [r4, #450]! @ 0x1c2 @ │ │ - stc2l 10, cr13, [r2, #404]! @ 0x194 @ │ │ - stc2l 0, cr1, [r5, #964]! @ 0x3c4 │ │ - stc2l 9, cr7, [r4, #274]! @ 0x112 @ │ │ - stc2l 10, cr13, [r2, #52]! @ 0x34 @ │ │ - stc2l 4, cr13, [r4, #528]! @ 0x210 │ │ - stc2l 9, cr7, [r4, #98]! @ 0x62 @ │ │ - stc2l 9, cr13, [r2, #362]! @ 0x16a @ │ │ + stc2l 10, cr7, [r4, #760]! @ 0x2f8 @ │ │ + stc2l 11, cr13, [r2, #264]! @ 0x108 @ │ │ + stc2l 0, cr6, [r2, #844]! @ 0x34c │ │ + stc2l 10, cr7, [r4, #408]! @ 0x198 @ │ │ + stc2l 10, cr13, [r2, #936]! @ 0x3a8 @ │ │ + stc2l 1, cr2, [r3, #72]! @ 0x48 │ │ + stc2l 10, cr7, [r4, #56]! @ 0x38 @ │ │ + stc2l 10, cr13, [r2, #584]! @ 0x248 @ │ │ + stc2l 1, cr1, [r5, #120]! @ 0x78 │ │ + stc2l 9, cr7, [r4, #364]! @ 0x16c @ │ │ + stc2l 10, cr13, [r2, #232]! @ 0xe8 @ │ │ + stc2l 4, cr13, [r4, #708]! @ 0x2c4 │ │ + stc2l 9, cr7, [r4, #188]! @ 0xbc @ │ │ + stc2l 9, cr13, [r2, #452]! @ 0x1c4 @ │ │ stc2l 10, cr10, [r5, #196]! @ 0xc4 @ │ │ mov r6, #0 │ │ mov r7, #1 │ │ cmp r9, #0 │ │ beq 23f645c │ │ ldr r1, [sp, #48] @ 0x30 │ │ movw r0, #5301 @ 0x14b5 │ │ @@ -1226577,23 +1226576,23 @@ │ │ ldr sl, [pc, #4056] @ 23f7558 │ │ add r7, pc, r7 │ │ ldr r8, [pc, #4052] @ 23f755c │ │ add r9, pc, r9 │ │ add sl, pc, sl │ │ add r8, pc, r8 │ │ b 23f65e8 │ │ - vcmla.f16 , q10, , #270 │ │ - stc2l 9, cr13, [r2, #202]! @ 0xca @ │ │ - vcmla.f16 , q10, , #270 │ │ + stc2l 9, cr7, [r4, #28]! @ │ │ + stc2l 9, cr13, [r2, #292]! @ 0x124 @ │ │ + stc2l 8, cr7, [r4, #976]! @ 0x3d0 │ │ eorseq ip, r9, ip, ror #7 │ │ strdeq r6, [lr], #-40 @ 0xffffffd8 │ │ subeq r5, pc, r4, asr #23 │ │ - vcmla.f16 , q9, , #270 │ │ - stc2l 14, cr4, [r5, #20]! │ │ - vcmla.f16 , q1, , #270 │ │ + stc2l 8, cr13, [r2, #968]! @ 0x3c8 │ │ + stc2l 14, cr4, [r5, #200]! @ 0xc8 │ │ + vcmla.f16 d29, d18, d14, #270 │ │ subeq r5, pc, r8, asr #22 │ │ ldr r0, [pc, #4084] @ 23f75b8 │ │ add r1, sp, #416 @ 0x1a0 │ │ mov r2, #6 │ │ add r0, pc, r0 │ │ bl 270dea0 │ │ ldr r1, [fp, #-68] @ 0xffffffbc │ │ @@ -1226668,16 +1226667,16 @@ │ │ cmp r0, #0 │ │ bne 23f65d0 │ │ mov r0, #1 │ │ str r0, [sp, #428] @ 0x1ac │ │ b 23f6728 │ │ eorseq ip, r9, r8, ror #5 │ │ eorseq ip, r9, r4, ror #5 │ │ - stc2l 11, cr3, [r3, #548]! @ 0x224 @ │ │ - stc2l 7, cr13, [r2, #884]! @ 0x374 │ │ + stc2l 11, cr3, [r3, #728]! @ 0x2d8 @ │ │ + vcmla.f16 d29, d2, d10, #270 │ │ add r0, r7, r1, lsl #5 │ │ mov r1, #32 │ │ bl 270df60 │ │ ldr r1, [sp, #428] @ 0x1ac │ │ add r0, r1, #1 │ │ cmp r1, #3 │ │ str r0, [sp, #428] @ 0x1ac │ │ @@ -1226690,16 +1226689,16 @@ │ │ mov r2, sl │ │ movw r3, #4135 @ 0x1027 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23f6708 │ │ mlaseq r9, ip, r2, ip │ │ eorseq ip, r9, r4, lsl #5 │ │ - stc2l 7, cr7, [r4, #20]! │ │ - stc2l 7, cr13, [r2, #548]! @ 0x224 │ │ + stc2l 7, cr7, [r4, #200]! @ 0xc8 │ │ + stc2l 7, cr13, [r2, #728]! @ 0x2d8 │ │ subeq fp, lr, r8, asr #9 │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp r0, #0 │ │ bne 23f68a8 │ │ ldr r0, [pc, #4040] @ 23f7740 │ │ mov r1, #1 │ │ ldr r0, [pc, r0] │ │ @@ -1226715,16 +1226714,16 @@ │ │ add r6, pc, r6 │ │ add r7, pc, r7 │ │ movw r8, #5299 @ 0x14b3 │ │ add sl, pc, sl │ │ b 23f680c │ │ eorseq ip, r9, r0, lsr r2 │ │ subeq r5, pc, r0, lsr sl @ │ │ - stc2l 12, cr4, [r5, #548]! @ 0x224 │ │ - stc2l 6, cr13, [r2, #916]! @ 0x394 │ │ + stc2l 12, cr4, [r5, #728]! @ 0x2d8 │ │ + stc2l 7, cr13, [r2, #72]! @ 0x48 │ │ subeq r5, pc, ip, asr #19 │ │ str r4, [fp, #-44] @ 0xffffffd4 │ │ mov r1, r4 │ │ ldr r2, [pc, #4084] @ 23f77cc │ │ rsb r0, r4, r4, lsl #8 │ │ add r2, pc, r2 │ │ add r0, r2, r0 │ │ @@ -1226773,15 +1226772,15 @@ │ │ ldr r0, [pc, #4032] @ 23f7850 │ │ mov r2, r7 │ │ movw r3, #4156 @ 0x103c │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23f67d0 │ │ - stc2l 2, cr15, [r3, #1016]! @ 0x3f8 │ │ + stc2l 3, cr15, [r3, #172]! @ 0xac │ │ ldr r0, [sp, #36] @ 0x24 │ │ ldr r5, [sp, #48] @ 0x30 │ │ cmp r0, #0 │ │ bne 23f69f4 │ │ ldr r0, [pc, #4060] @ 23f789c │ │ mov r1, #1 │ │ ldr r0, [pc, r0] │ │ @@ -1226796,19 +1226795,19 @@ │ │ ldr r7, [pc, #4028] @ 23f78a8 │ │ add r6, pc, r6 │ │ ldr sl, [pc, #4024] @ 23f78ac │ │ add r9, pc, r9 │ │ add r7, pc, r7 │ │ add sl, pc, sl │ │ b 23f6954 │ │ - stc2l 5, cr7, [r4, #372]! @ 0x174 │ │ - stc2l 9, cr5, [r3, #144]! @ 0x90 @ │ │ - stc2l 5, cr7, [r4, #52]! @ 0x34 │ │ - stc2l 11, cr5, [r2, #136]! @ 0x88 @ │ │ - stc2l 4, cr7, [r4, #772]! @ 0x304 │ │ + stc2l 5, cr7, [r4, #552]! @ 0x228 │ │ + stc2l 9, cr5, [r3, #234]! @ 0xea @ │ │ + stc2l 5, cr7, [r4, #232]! @ 0xe8 │ │ + stc2l 11, cr5, [r2, #316]! @ 0x13c @ │ │ + stc2l 4, cr7, [r4, #952]! @ 0x3b8 │ │ mov r1, r4 │ │ ldr r2, [pc, #4088] @ 23f7918 │ │ rsb r0, r4, r4, lsl #8 │ │ add r2, pc, r2 │ │ add r0, r2, r0 │ │ ldr r2, [pc, #4076] @ 23f791c │ │ add r2, pc, r2 │ │ @@ -1226854,17 +1226853,17 @@ │ │ ldr r0, [pc, #3920] @ 23f7924 │ │ mov r2, r7 │ │ movw r3, #4170 @ 0x104a │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23f6918 │ │ - stc2l 11, cr1, [r3, #436]! @ 0x1b4 @ │ │ - stc2l 4, cr7, [r4, #468]! @ 0x1d4 │ │ - stc2l 15, cr12, [r4, #448]! @ 0x1c0 │ │ + stc2l 11, cr1, [r3, #616]! @ 0x268 @ │ │ + stc2l 4, cr7, [r4, #648]! @ 0x288 │ │ + stc2l 15, cr12, [r4, #628]! @ 0x274 │ │ ldr r0, [sp, #32] │ │ cmp r0, #0 │ │ bne 23f6b38 │ │ ldr r0, [pc, #3872] @ 23f7928 │ │ mov r1, #1 │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-36] @ 0xffffffdc │ │ @@ -1226878,18 +1226877,18 @@ │ │ ldr r7, [pc, #3840] @ 23f7934 │ │ add r6, pc, r6 │ │ ldr sl, [pc, #3836] @ 23f7938 │ │ add r9, pc, r9 │ │ add r7, pc, r7 │ │ add sl, pc, sl │ │ b 23f6a9c │ │ - stc2l 4, cr7, [r4, #164]! @ 0xa4 │ │ - stc2l 11, cr0, [r5, #228]! @ 0xe4 @ │ │ + stc2l 4, cr7, [r4, #344]! @ 0x158 │ │ + stc2l 11, cr0, [r5, #408]! @ 0x198 @ │ │ eorseq fp, r9, r8, asr pc │ │ - stc2l 3, cr7, [r4, #684]! @ 0x2ac │ │ + stc2l 3, cr7, [r4, #864]! @ 0x360 │ │ ldrshteq fp, [r9], -r0 │ │ mov r1, r4 │ │ ldr r2, [pc, #4072] @ 23f7a50 │ │ rsb r0, r4, r4, lsl #8 │ │ add r2, pc, r2 │ │ add r0, r2, r0 │ │ ldr r2, [pc, #4060] @ 23f7a54 │ │ @@ -1226936,16 +1226935,16 @@ │ │ ldr r0, [pc, #3888] @ 23f7a4c │ │ mov r2, r7 │ │ movw r3, #4185 @ 0x1059 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23f6a60 │ │ - stc2l 9, cr4, [r5, #258]! @ 0x102 @ │ │ - stc2l 9, cr4, [r5, #162]! @ 0xa2 @ │ │ + stc2l 9, cr4, [r5, #348]! @ 0x15c @ │ │ + stc2l 9, cr4, [r5, #252]! @ 0xfc @ │ │ ldr r0, [sp, #40] @ 0x28 │ │ cmp r0, #0 │ │ bne 23f6c78 │ │ ldr r0, [pc, #3852] @ 23f7a58 │ │ mov r1, #1 │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-36] @ 0xffffffdc │ │ @@ -1226959,17 +1226958,17 @@ │ │ ldr r7, [pc, #3820] @ 23f7a64 │ │ add r6, pc, r6 │ │ ldr sl, [pc, #3816] @ 23f7a68 │ │ add r9, pc, r9 │ │ add r7, pc, r7 │ │ add sl, pc, sl │ │ b 23f6bdc │ │ - stc2l 2, cr7, [r4, #948]! @ 0x3b4 │ │ + stc2l 3, cr7, [r4, #104]! @ 0x68 │ │ stc2l 3, cr10, [r5, #964]! @ 0x3c4 │ │ - stc2l 2, cr7, [r4, #660]! @ 0x294 │ │ + stc2l 2, cr7, [r4, #840]! @ 0x348 │ │ subeq r5, lr, r4, ror #25 │ │ mov r1, r4 │ │ ldr r2, [pc, #3788] @ 23f7a74 │ │ rsb r0, r4, r4, lsl #8 │ │ add r2, pc, r2 │ │ add r0, r2, r0 │ │ ldr r2, [pc, #3776] @ 23f7a78 │ │ @@ -1227016,16 +1227015,16 @@ │ │ ldr r0, [pc, #3604] @ 23f7a70 │ │ mov r2, r7 │ │ movw r3, #4200 @ 0x1068 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23f6ba0 │ │ - stc2l 2, cr7, [r4, #52]! @ 0x34 │ │ - stc2l 5, cr5, [r3, #992]! @ 0x3e0 │ │ + stc2l 2, cr7, [r4, #232]! @ 0xe8 │ │ + stc2l 6, cr5, [r3, #148]! @ 0x94 │ │ cmp r5, #0 │ │ ldr r5, [pc, #3576] @ 23f7a7c │ │ add r5, pc, r5 │ │ bne 23f6db8 │ │ ldr r0, [pc, #3568] @ 23f7a80 │ │ mov r1, #1 │ │ ldr r0, [pc, r0] │ │ @@ -1227040,20 +1227039,20 @@ │ │ ldr r7, [pc, #3536] @ 23f7a8c │ │ add r6, pc, r6 │ │ ldr sl, [pc, #3532] @ 23f7a90 │ │ add r9, pc, r9 │ │ add r7, pc, r7 │ │ add sl, pc, sl │ │ b 23f6d28 │ │ - stc2l 1, cr7, [r4, #756]! @ 0x2f4 │ │ - stc2l 7, cr5, [r2, #840]! @ 0x348 │ │ - stc2l 1, cr7, [r4, #452]! @ 0x1c4 │ │ - stc2l 8, cr1, [r3, #116]! @ 0x74 │ │ - stc2l 1, cr7, [r4, #148]! @ 0x94 │ │ - stc2l 8, cr0, [r5, #212]! @ 0xd4 │ │ + stc2l 1, cr7, [r4, #936]! @ 0x3a8 │ │ + stc2l 7, cr5, [r2, #1020]! @ 0x3fc │ │ + stc2l 1, cr7, [r4, #632]! @ 0x278 │ │ + vcmla.f16 , , q5, #270 │ │ + stc2l 1, cr7, [r4, #328]! @ 0x148 │ │ + vcmla.f16 q8, , q9, #270 │ │ mov r1, r4 │ │ ldr r2, [pc, #3492] @ 23f7a98 │ │ rsb r0, r4, r4, lsl #8 │ │ add r2, pc, r2 │ │ add r0, r2, r0 │ │ ldr r2, [pc, #3480] @ 23f7a9c │ │ add r2, pc, r2 │ │ @@ -1227097,31 +1227096,31 @@ │ │ ldr r0, [pc, #3316] @ 23f7a94 │ │ mov r2, r7 │ │ movw r3, #4214 @ 0x1076 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23f6cec │ │ - stc2l 0, cr7, [r4, #868]! @ 0x364 │ │ + stc2l 1, cr7, [r4, #24]! │ │ ldr r0, [pc, #3296] @ 23f7aa0 │ │ add r0, pc, r0 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 11, cr12, [r4, #848]! @ 0x350 @ │ │ + stc2l 12, cr12, [r4, #4]! │ │ ldr r9, [pc, #3168] @ 23f7a40 │ │ movw r5, #5300 @ 0x14b4 │ │ ldr r4, [pc, #3164] @ 23f7a44 │ │ movw r8, #5299 @ 0x14b3 │ │ add r9, pc, r9 │ │ add r4, pc, r4 │ │ b 23f6e1c │ │ - stc2l 6, cr4, [r5, #644]! @ 0x284 │ │ + stc2l 6, cr4, [r5, #824]! @ 0x338 │ │ ldr r7, [r6, r1, lsl #2] │ │ str r1, [fp, #-40] @ 0xffffffd8 │ │ sub r0, r7, #1 │ │ str r0, [r6, r1, lsl #2] │ │ ldr r1, [fp, #-36] @ 0xffffffdc │ │ add r0, r2, #1 │ │ str r0, [sp, #428] @ 0x1ac │ │ @@ -1227129,15 +1227128,15 @@ │ │ bge 23f6534 │ │ sub r1, r0, #1 │ │ cmp r1, r5 │ │ bcs 23f6e38 │ │ mov r2, r0 │ │ b 23f6e50 │ │ subeq r5, lr, r0, lsl fp │ │ - stc2l 6, cr4, [r5, #260]! @ 0x104 │ │ + stc2l 6, cr4, [r5, #440]! @ 0x1b8 │ │ mov r0, r9 │ │ mov r2, r4 │ │ movw r3, #4105 @ 0x1009 │ │ bl 270d9c0 │ │ ldr r2, [sp, #428] @ 0x1ac │ │ mov r1, r0 │ │ ldr r0, [r6, r1, lsl #2] │ │ @@ -1227161,15 +1227160,15 @@ │ │ mov r0, r9 │ │ mov r2, r4 │ │ movw r3, #4110 @ 0x100e │ │ bl 270d9c0 │ │ ldr r2, [sp, #428] @ 0x1ac │ │ mov r1, r0 │ │ b 23f6e00 │ │ - stc2l 5, cr4, [r5, #516]! @ 0x204 │ │ + stc2l 5, cr4, [r5, #696]! @ 0x2b8 │ │ mov r0, #0 │ │ str r0, [fp, #-80] @ 0xffffffb0 │ │ ldr r0, [pc, #2696] @ 23f7950 │ │ ldr r0, [pc, r0] │ │ sub r3, r0, #1 │ │ movw r0, #5300 @ 0x14b4 │ │ cmp r3, r0 │ │ @@ -1227212,16 +1227211,16 @@ │ │ beq 23f75bc │ │ ldr r6, [pc, #2552] @ 23f7968 │ │ add r9, sp, #68 @ 0x44 │ │ sub r8, fp, #72 @ 0x48 │ │ mov r4, #80 @ 0x50 │ │ add r6, pc, r6 │ │ b 23f7028 │ │ - stc2l 5, cr4, [r5, #228]! @ 0xe4 │ │ - stc2l 4, cr4, [r5, #900]! @ 0x384 │ │ + stc2l 5, cr4, [r5, #408]! @ 0x198 │ │ + stc2l 5, cr4, [r5, #56]! @ 0x38 │ │ ldrshteq fp, [r9], -r4 │ │ eorseq r2, r5, ip, lsl r4 │ │ ldrsbteq fp, [r9], -r4 │ │ eorseq fp, r9, r4, lsl #19 │ │ eorseq fp, r9, r4, ror r9 │ │ ldr r0, [pc, #2640] @ 23f79f4 │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ @@ -1227281,16 +1227280,16 @@ │ │ mov r3, #255 @ 0xff │ │ add r1, pc, r1 │ │ bl 270dfb0 │ │ cmp r0, #1 │ │ blt 23f72b0 │ │ mov sl, r0 │ │ b 23f7100 │ │ - stc2l 10, cr14, [r3, #968]! @ 0x3c8 @ │ │ - stc2l 10, cr14, [r3, #808]! @ 0x328 @ │ │ + stc2l 11, cr14, [r3, #124]! @ 0x7c @ │ │ + stc2l 10, cr14, [r3, #988]! @ 0x3dc @ │ │ ldr r2, [fp, #-64] @ 0xffffffc0 │ │ sub r0, fp, #340 @ 0x154 │ │ str r3, [sp, #8] │ │ mov r3, r5 │ │ add r1, r2, r1 │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ sub r1, fp, #64 @ 0x40 │ │ @@ -1227320,16 +1227319,16 @@ │ │ cmp r0, #1 │ │ str r1, [fp, #-60] @ 0xffffffc4 │ │ mov r1, #1 │ │ str sl, [fp, #-64] @ 0xffffffc0 │ │ str r0, [fp, #-36] @ 0xffffffdc │ │ bge 23f718c │ │ b 23f70cc │ │ - stc2l 3, cr4, [r5, #20]! │ │ - stc2l 13, cr12, [r2, #388]! @ 0x184 │ │ + stc2l 3, cr4, [r5, #200]! @ 0xc8 │ │ + stc2l 13, cr12, [r2, #568]! @ 0x238 │ │ subeq r5, pc, ip, asr #32 │ │ eorseq fp, r9, r0, lsr #16 │ │ sub r0, fp, #40 @ 0x28 │ │ str r0, [sp] │ │ sub r0, fp, #44 @ 0x2c │ │ sub r2, fp, #76 @ 0x4c │ │ sub r3, fp, #340 @ 0x154 │ │ @@ -1227369,19 +1227368,19 @@ │ │ add r3, r1, #1 │ │ add r1, r1, r0 │ │ str r3, [fp, #-40] @ 0xffffffd8 │ │ str r1, [fp, #-44] @ 0xffffffd4 │ │ bgt 23f7140 │ │ ldr r1, [fp, #-68] @ 0xffffffbc │ │ b 23f7178 │ │ - stc2l 9, cr14, [r3, #508]! @ 0x1fc @ │ │ - stc2l 13, cr12, [r2, #132]! @ 0x84 │ │ + stc2l 10, cr14, [r3, #172]! @ 0xac @ │ │ + stc2l 13, cr12, [r2, #312]! @ 0x138 │ │ subeq r5, lr, r0, lsr r7 │ │ - stc2l 14, cr10, [r3, #1020]! @ 0x3fc │ │ - stc2l 2, cr1, [r3, #540]! @ 0x21c │ │ + stc2l 15, cr10, [r3, #176]! @ 0xb0 │ │ + stc2l 2, cr1, [r3, #720]! @ 0x2d0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ mov r1, #1 │ │ cmp r0, #1 │ │ blt 23f70cc │ │ add r0, sp, #56 @ 0x38 │ │ str r0, [sp, #4] │ │ mov r0, #11 │ │ @@ -1227400,25 +1227399,25 @@ │ │ ldr r3, [fp, #-72] @ 0xffffffb8 │ │ ldr r1, [fp, #-60] @ 0xffffffc4 │ │ add r2, r3, r2 │ │ sub r2, r1, r2 │ │ cmn r2, #256 @ 0x100 │ │ bge 23f709c │ │ b 23f767c │ │ - stc2l 7, cr0, [r4, #972]! @ 0x3cc │ │ - stc2l 3, cr3, [r2, #836]! @ 0x344 │ │ - stc2l 7, cr0, [r4, #652]! @ 0x28c │ │ - stc2l 3, cr3, [r2, #532]! @ 0x214 │ │ + vcmla.f16 d16, d4, d16, #270 │ │ + stc2l 3, cr3, [r2, #1016]! @ 0x3f8 │ │ + stc2l 7, cr0, [r4, #832]! @ 0x340 │ │ + stc2l 3, cr3, [r2, #712]! @ 0x2c8 │ │ subeq sl, lr, r8, lsl #18 │ │ - stc2l 0, cr9, [r2, #360]! @ 0x168 │ │ - stc2l 11, cr12, [r2, #180]! @ 0xb4 @ │ │ + stc2l 0, cr9, [r2, #540]! @ 0x21c │ │ + stc2l 11, cr12, [r2, #360]! @ 0x168 @ │ │ stc2l 4, cr6, [r5, #972]! @ 0x3cc │ │ - stc2l 13, cr10, [r3, #348]! @ 0x15c │ │ - stc2l 0, cr4, [r5, #532]! @ 0x214 │ │ - stc2l 10, cr12, [r2, #900]! @ 0x384 @ │ │ + stc2l 13, cr10, [r3, #528]! @ 0x210 │ │ + stc2l 0, cr4, [r5, #712]! @ 0x2c8 │ │ + stc2l 11, cr12, [r2, #56]! @ 0x38 @ │ │ subeq r4, pc, r8, asr #27 │ │ eorseq r1, r5, r8, lsr #31 │ │ eorseq fp, r9, r0, ror #10 │ │ eorseq fp, r9, r8, asr r5 │ │ subeq sl, lr, r8, lsr #15 │ │ ldr r1, [pc, #1760] @ 23f7998 │ │ add r5, sp, #428 @ 0x1ac │ │ @@ -1227583,19 +1227582,19 @@ │ │ ldr r0, [pc, #1272] @ 23f7a30 │ │ add r0, pc, r0 │ │ add r0, r0, r8, lsl #2 │ │ bl 270dee0 │ │ mov r5, #1 │ │ b 23f585c │ │ eorseq fp, r9, ip, lsr #9 │ │ - stc2l 9, cr6, [r4, #86]! @ 0x56 @ │ │ + stc2l 9, cr6, [r4, #176]! @ 0xb0 @ │ │ umaaleq sl, lr, ip, r6 │ │ - stc2l 7, cr12, [r2, #560]! @ 0x230 │ │ - stc2l 9, cr12, [r2, #306]! @ 0x132 @ │ │ - stc2l 9, cr6, [r4, #26]! @ │ │ + stc2l 7, cr12, [r2, #740]! @ 0x2e4 │ │ + stc2l 9, cr12, [r2, #396]! @ 0x18c @ │ │ + stc2l 9, cr6, [r4, #116]! @ 0x74 @ │ │ mov r5, #0 │ │ mov r7, #1 │ │ cmp r9, #0 │ │ beq 23f5858 │ │ ldr r1, [sp, #48] @ 0x30 │ │ movw r0, #5301 @ 0x14b5 │ │ str r8, [fp, #-36] @ 0xffffffdc │ │ @@ -1227610,15 +1227609,15 @@ │ │ bl 270d9c0 │ │ mov r8, r0 │ │ ldr r0, [pc, #1168] @ 23f7a3c │ │ add r0, pc, r0 │ │ add r0, r0, r8, lsl #2 │ │ bl 270d7e0 │ │ b 23f5858 │ │ - stc2l 11, cr10, [r3, #332]! @ 0x14c @ │ │ + stc2l 11, cr10, [r3, #512]! @ 0x200 @ │ │ mov r2, #1 │ │ str r2, [fp, #-68] @ 0xffffffbc │ │ ldr r5, [pc, #1100] @ 23f7a18 │ │ ldr r4, [pc, #1100] @ 23f7a1c │ │ ldr r6, [pc, #1100] @ 23f7a20 │ │ add r5, pc, r5 │ │ add r4, pc, r4 │ │ @@ -1227657,15 +1227656,15 @@ │ │ mov r7, #1 │ │ mov r5, #1 │ │ mov r4, #1 │ │ mov r6, #1 │ │ b 23f646c │ │ mov r5, #1 │ │ b 23f585c │ │ - stc2l 12, cr2, [r3, #276]! @ 0x114 │ │ + stc2l 12, cr2, [r3, #456]! @ 0x1c8 │ │ eorseq fp, r9, r4, ror #6 │ │ ldr r0, [pc, #776] @ 23f798c │ │ mov r1, #205 @ 0xcd │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #764] @ 23f7990 │ │ mov r2, #1 │ │ @@ -1227709,17 +1227708,17 @@ │ │ clz r0, r0 │ │ lsr r7, r0, #5 │ │ ldr r0, [sp, #40] @ 0x28 │ │ clz r0, r0 │ │ lsr r0, r0, #5 │ │ b 23f646c │ │ eorseq fp, r9, r0, lsl #5 │ │ - stc2l 11, cr4, [r3] @ │ │ - stc2l 7, cr12, [r2, #500]! @ 0x1f4 │ │ - stc2l 6, cr6, [r4, #948]! @ 0x3b4 │ │ + stc2l 11, cr4, [r3, #180]! @ 0xb4 @ │ │ + stc2l 7, cr12, [r2, #680]! @ 0x2a8 │ │ + stc2l 7, cr6, [r4, #104]! @ 0x68 │ │ ldr r0, [pc, #484] @ 23f793c │ │ mov r1, #115 @ 0x73 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #472] @ 23f7940 │ │ mov r2, #1 │ │ ldr r1, [sp, #28] │ │ @@ -1227775,16 +1227774,16 @@ │ │ ldr r6, [pc, #376] @ 23f79b0 │ │ ldr r4, [pc, #376] @ 23f79b4 │ │ ldr r7, [pc, #376] @ 23f79b8 │ │ add r6, pc, r6 │ │ add r4, pc, r4 │ │ add r7, pc, r7 │ │ b 23f7874 │ │ - stc2l 10, cr2, [r3, #388]! @ 0x184 @ │ │ - stc2l 12, cr3, [r5, #180]! @ 0xb4 │ │ + stc2l 10, cr2, [r3, #568]! @ 0x238 @ │ │ + stc2l 12, cr3, [r5, #360]! @ 0x168 │ │ add r0, r6, r1, lsl #5 │ │ mov r1, #32 │ │ bl 270df60 │ │ ldr r1, [fp, #-68] @ 0xffffffbc │ │ add r0, r1, #1 │ │ cmp r1, #3 │ │ str r0, [fp, #-68] @ 0xffffffbc │ │ @@ -1227796,18 +1227795,18 @@ │ │ mov r0, r4 │ │ mov r2, r7 │ │ movw r3, #1722 @ 0x6ba │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23f7854 │ │ eorseq fp, r9, r8, lsr r1 │ │ - stc2l 11, cr4, [r2, #904]! @ 0x388 @ │ │ - stc2l 9, cr2, [r3, #434]! @ 0x1b2 @ │ │ - stc2l 6, cr12, [r2, #180]! @ 0xb4 │ │ - stc2l 5, cr6, [r4, #644]! @ 0x284 │ │ + stc2l 12, cr4, [r2, #60]! @ 0x3c │ │ + stc2l 10, cr2, [r3, #24]! @ │ │ + stc2l 6, cr12, [r2, #360]! @ 0x168 │ │ + stc2l 5, cr6, [r4, #824]! @ 0x338 │ │ ldr r4, [pc, #260] @ 23f79bc │ │ add r1, sp, #416 @ 0x1a0 │ │ mov r2, #6 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270dea0 │ │ ldr r0, [pc, #240] @ 23f79c0 │ │ @@ -1227829,110 +1227828,110 @@ │ │ ldr r0, [pc, #184] @ 23f79c8 │ │ mov r1, #23 │ │ add r0, pc, r0 │ │ b 23f4184 │ │ ldrsbteq fp, [r9], -ip │ │ subeq r4, pc, ip, ror #17 │ │ strdeq sl, [lr], #-44 @ 0xffffffd4 │ │ - stc2l 10, cr3, [r5, #932]! @ 0x3a4 @ │ │ + stc2l 11, cr3, [r5, #88]! @ 0x58 @ │ │ ldrshteq sl, [r9], -r0 │ │ - stc2l 11, cr0, [r3, #196]! @ 0xc4 @ │ │ - stc2l 8, cr2, [r3, #580]! @ 0x244 │ │ - stc2l 4, cr12, [r2, #916]! @ 0x394 │ │ - stc2l 4, cr6, [r4, #356]! @ 0x164 │ │ + stc2l 11, cr0, [r3, #376]! @ 0x178 @ │ │ + stc2l 8, cr2, [r3, #760]! @ 0x2f8 │ │ + stc2l 5, cr12, [r2, #72]! @ 0x48 │ │ + stc2l 4, cr6, [r4, #536]! @ 0x218 │ │ stc2l 0, cr5, [r5, #892]! @ 0x37c │ │ - stc2l 7, cr11, [r2, #340]! @ 0x154 │ │ + stc2l 7, cr11, [r2, #520]! @ 0x208 │ │ mlaseq r5, r0, ip, r0 │ │ - stc2l 12, cr13, [r2, #624]! @ 0x270 │ │ - stc2l 9, cr9, [r3, #174]! @ 0xae @ │ │ + stc2l 12, cr13, [r2, #804]! @ 0x324 │ │ + stc2l 9, cr9, [r3, #264]! @ 0x108 @ │ │ eorseq sl, r9, r4, lsr fp │ │ - stc2l 15, cr5, [r4, #692]! @ 0x2b4 │ │ - stc2l 0, cr12, [r2, #196]! @ 0xc4 │ │ - stc2l 15, cr5, [r4, #588]! @ 0x24c │ │ - stc2l 1, cr6, [r2, #232]! @ 0xe8 │ │ - stc2l 7, cr2, [r2, #260]! @ 0x104 │ │ + stc2l 15, cr5, [r4, #872]! @ 0x368 │ │ + stc2l 0, cr12, [r2, #376]! @ 0x178 │ │ + stc2l 15, cr5, [r4, #768]! @ 0x300 │ │ + stc2l 1, cr6, [r2, #412]! @ 0x19c │ │ + stc2l 7, cr2, [r2, #440]! @ 0x1b8 │ │ eorseq r1, r5, r8, asr #9 │ │ - stc2l 13, cr15, [r2, #32]! │ │ - stc2l 6, cr11, [r2, #836]! @ 0x344 │ │ + stc2l 13, cr15, [r2, #212]! @ 0xd4 │ │ + stc2l 6, cr11, [r2, #1016]! @ 0x3f8 │ │ ldrhteq sl, [r9], -r0 │ │ - vcmla.f16 , q1, q7, #270 │ │ - stc2l 2, cr6, [r3, #720]! @ 0x2d0 │ │ - stc2l 3, cr0, [r3, #140]! @ 0x8c │ │ - vcmla.f16 , , , #270 │ │ - stc2l 4, cr2, [r2, #148]! @ 0x94 │ │ - stc2l 14, cr14, [r4, #460]! @ 0x1cc │ │ - vcmla.f16 d27, d2, d25, #270 │ │ - stc2l 2, cr6, [r3, #272]! @ 0x110 │ │ - stc2l 4, cr13, [r4, #648]! @ 0x288 │ │ - stc2l 0, cr8, [r3, #264]! @ 0x108 │ │ - stc2l 4, cr5, [r3, #108]! @ 0x6c │ │ - stc2l 0, cr8, [r3, #72]! @ 0x48 │ │ + stc2l 8, cr5, [r2, #492]! @ 0x1ec │ │ + stc2l 2, cr6, [r3, #900]! @ 0x384 │ │ + stc2l 3, cr0, [r3, #320]! @ 0x140 │ │ + stc2l 8, cr15, [r3, #448]! @ 0x1c0 │ │ + stc2l 4, cr2, [r2, #328]! @ 0x148 │ │ + stc2l 14, cr14, [r4, #640]! @ 0x280 │ │ + stc2l 8, cr11, [r2, #344]! @ 0x158 │ │ + stc2l 2, cr6, [r3, #452]! @ 0x1c4 │ │ + stc2l 4, cr13, [r4, #828]! @ 0x33c │ │ + stc2l 0, cr8, [r3, #444]! @ 0x1bc │ │ + stc2l 4, cr5, [r3, #288]! @ 0x120 │ │ + stc2l 0, cr8, [r3, #252]! @ 0xfc │ │ stc2l 12, cr8, [r5, #276]! @ 0x114 │ │ - stc2l 13, cr9, [r3, #572]! @ 0x23c │ │ + stc2l 13, cr9, [r3, #752]! @ 0x2f0 │ │ ldrdeq r9, [lr], #-60 @ 0xffffffc4 │ │ - stc2l 4, cr11, [r2, #832]! @ 0x340 │ │ - stc2l 6, cr11, [r2, #884]! @ 0x374 │ │ - stc2l 8, cr9, [r3, #380]! @ 0x17c │ │ - stc2l 13, cr1, [r2, #636]! @ 0x27c │ │ - stc2l 5, cr11, [r2, #884]! @ 0x374 │ │ - stc2l 11, cr3, [r2, #648]! @ 0x288 @ │ │ + stc2l 4, cr11, [r2, #1012]! @ 0x3f4 │ │ + stc2l 7, cr11, [r2, #40]! @ 0x28 │ │ + vcmla.f16 d25, d19, d12, #270 │ │ + stc2l 13, cr1, [r2, #816]! @ 0x330 │ │ + stc2l 6, cr11, [r2, #40]! @ 0x28 │ │ + stc2l 11, cr3, [r2, #828]! @ 0x33c @ │ │ eorseq sl, r9, r4, asr r6 │ │ eorseq sl, r9, r4, asr #12 │ │ strheq r9, [lr], #-128 @ 0xffffff80 │ │ - stc2l 14, cr1, [r3, #948]! @ 0x3b4 │ │ - stc2l 11, cr11, [r2, #260]! @ 0x104 @ │ │ + stc2l 15, cr1, [r3, #104]! @ 0x68 │ │ + stc2l 11, cr11, [r2, #440]! @ 0x1b8 @ │ │ eorseq sl, r9, r0, lsl #12 │ │ eorseq sl, r9, r8, ror #11 │ │ - stc2l 10, cr5, [r4, #404]! @ 0x194 @ │ │ - stc2l 10, cr11, [r2, #932]! @ 0x3a4 @ │ │ + stc2l 10, cr5, [r4, #584]! @ 0x248 @ │ │ + stc2l 11, cr11, [r2, #88]! @ 0x58 @ │ │ mlaseq r9, r8, r5, sl │ │ subeq r4, pc, r4, ror r2 @ │ │ - stc2l 0, cr3, [r5, #244]! @ 0xf4 │ │ - stc2l 10, cr11, [r2, #612]! @ 0x264 @ │ │ + stc2l 0, cr3, [r5, #424]! @ 0x1a8 │ │ + stc2l 10, cr11, [r2, #792]! @ 0x318 @ │ │ subeq r3, pc, r0, lsl #27 │ │ eorseq sl, r9, r4, asr r5 │ │ - stc2l 7, cr13, [r3, #200]! @ 0xc8 │ │ + stc2l 7, cr13, [r3, #380]! @ 0x17c │ │ subeq r4, lr, r0, ror r9 │ │ - stc2l 0, cr6, [r2, #312]! @ 0x138 │ │ - stc2l 6, cr2, [r2, #356]! @ 0x164 │ │ + stc2l 0, cr6, [r2, #492]! @ 0x1ec │ │ + stc2l 6, cr2, [r2, #536]! @ 0x218 │ │ subeq r9, lr, r8, asr #12 │ │ - stc2l 7, cr11, [r2, #240]! @ 0xf0 │ │ - stc2l 9, cr11, [r2, #146]! @ 0x92 @ │ │ - stc2l 10, cr9, [r3, #908]! @ 0x38c @ │ │ - stc2l 15, cr2, [r5, #644]! @ 0x284 │ │ - stc2l 9, cr11, [r2, #506]! @ 0x1fa @ │ │ + stc2l 7, cr11, [r2, #420]! @ 0x1a4 │ │ + stc2l 9, cr11, [r2, #236]! @ 0xec @ │ │ + stc2l 11, cr9, [r3, #64]! @ 0x40 @ │ │ + stc2l 15, cr2, [r5, #824]! @ 0x338 │ │ + stc2l 10, cr11, [r2, #168]! @ 0xa8 @ │ │ subeq r3, pc, r4, ror #25 │ │ - stc2l 15, cr2, [r5, #180]! @ 0xb4 │ │ - stc2l 9, cr11, [r2, #274]! @ 0x112 @ │ │ + stc2l 15, cr2, [r5, #360]! @ 0x168 │ │ + stc2l 9, cr11, [r2, #364]! @ 0x16c @ │ │ subeq r3, pc, r0, ror ip @ │ │ - stc2l 14, cr13, [r3, #72]! @ 0x48 │ │ - stc2l 1, cr12, [r2, #212]! @ 0xd4 │ │ + stc2l 14, cr13, [r3, #252]! @ 0xfc │ │ + stc2l 1, cr12, [r2, #392]! @ 0x188 │ │ strheq sl, [lr], #-20 @ 0xffffffec │ │ - stc2l 9, cr3, [r5, #322]! @ 0x142 @ │ │ + stc2l 9, cr3, [r5, #412]! @ 0x19c @ │ │ mlaseq r9, r4, pc, sl @ │ │ subeq r4, pc, r4, lsr #15 │ │ eorseq sl, r9, ip, lsr #29 │ │ - stc2l 10, cr15, [r4, #324]! @ 0x144 @ │ │ - stc2l 7, cr2, [r3, #308]! @ 0x134 │ │ - stc2l 3, cr12, [r2, #644]! @ 0x284 │ │ - stc2l 3, cr6, [r4, #84]! @ 0x54 │ │ + stc2l 10, cr15, [r4, #504]! @ 0x1f8 @ │ │ + stc2l 7, cr2, [r3, #488]! @ 0x1e8 │ │ + stc2l 3, cr12, [r2, #824]! @ 0x338 │ │ + stc2l 3, cr6, [r4, #264]! @ 0x108 │ │ subeq sl, lr, r4, ror r0 │ │ - vcmla.f16 , , , #270 │ │ + vcmla.f16 d19, d21, d14, #270 │ │ eorseq sl, r9, r4, asr lr │ │ subeq r4, pc, r4, ror #12 │ │ strdeq r9, [lr], #-248 @ 0xffffff08 │ │ eorseq sl, r9, r8, ror #26 │ │ - stc2l 12, cr11, [r4, #992]! @ 0x3e0 │ │ - stc2l 6, cr2, [r3, #36]! @ 0x24 │ │ - stc2l 2, cr12, [r2, #372]! @ 0x174 │ │ - stc2l 1, cr6, [r4, #836]! @ 0x344 │ │ - stc2l 7, cr3, [r5, #116]! @ 0x74 │ │ + stc2l 13, cr11, [r4, #148]! @ 0x94 │ │ + stc2l 6, cr2, [r3, #216]! @ 0xd8 │ │ + stc2l 2, cr12, [r2, #552]! @ 0x228 │ │ + stc2l 1, cr6, [r4, #1016]! @ 0x3f8 │ │ + stc2l 7, cr3, [r5, #296]! @ 0x128 │ │ eorseq sl, r9, r8, lsl #26 │ │ subeq r4, pc, r8, lsl r5 @ │ │ - stc2l 6, cr8, [r2, #424]! @ 0x1a8 │ │ + stc2l 6, cr8, [r2, #604]! @ 0x25c │ │ │ │ 023f7aa4 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ ldr r4, [pc, #64] @ 23f7af4 │ │ mov r1, #6 │ │ add r4, pc, r4 │ │ @@ -1227948,16 +1227947,16 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ stc2l 13, cr4, [r5, #496]! @ 0x1f0 │ │ - stc2l 2, cr5, [r4, #956]! @ 0x3bc │ │ - stc2l 9, cr2, [r5, #266]! @ 0x10a @ │ │ + stc2l 3, cr5, [r4, #112]! @ 0x70 │ │ + stc2l 9, cr2, [r5, #356]! @ 0x164 @ │ │ │ │ 023f7b00 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #40 @ 0x28 │ │ mov r3, r0 │ │ mov r0, #0 │ │ @@ -1229094,17 +1229093,17 @@ │ │ ldr r0, [pc, #4012] @ 23f9c40 │ │ str r5, [fp, #-56] @ 0xffffffc8 │ │ add r0, pc, r0 │ │ add r0, r0, r5, lsl #3 │ │ vstr d8, [r0] │ │ mov r0, r5 │ │ b 23f8d58 │ │ - stc2l 1, cr13, [r1, #532]! @ 0x214 │ │ + stc2l 1, cr13, [r1, #712]! @ 0x2c8 │ │ ldrhteq r0, [r5], -r0 │ │ - stc2l 8, cr14, [r4, #196]! @ 0xc4 │ │ + stc2l 8, cr14, [r4, #376]! @ 0x178 │ │ subeq r8, pc, r4, asr #14 │ │ subseq r0, r1, r4, lsl #28 │ │ sbcseq r6, sl, r8, asr r2 │ │ ldr r0, [pc, #3964] @ 23f9c44 │ │ mov r1, r5 │ │ mov r2, sl │ │ movw r3, #3157 @ 0xc55 │ │ @@ -1229175,18 +1229174,18 @@ │ │ ldr r0, [pc, #3880] @ 23f9d00 │ │ ldr r1, [pc, #3880] @ 23f9d04 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ b 23f82a4 │ │ subeq r8, pc, r0, lsl #14 │ │ addseq r0, r6, r0, lsl #12 │ │ - stc2l 12, cr0, [r5, #176]! @ 0xb0 │ │ - stc2l 9, cr12, [r4, #252]! @ 0xfc @ │ │ + stc2l 12, cr0, [r5, #356]! @ 0x164 │ │ + stc2l 9, cr12, [r4, #342]! @ 0x156 @ │ │ subeq r8, pc, r4, lsl #13 │ │ - stc2l 9, cr12, [r4, #26]! @ │ │ + stc2l 9, cr12, [r4, #116]! @ 0x74 @ │ │ subeq r8, pc, ip, lsr r6 @ │ │ ldr r0, [pc, #3840] @ 23f9d08 │ │ add r0, pc, r0 │ │ bl 270d2b0 │ │ bl 270db20 │ │ cmp r0, #0 │ │ bne 23fd448 │ │ @@ -1229242,23 +1229241,23 @@ │ │ umaaleq r8, pc, r4, r5 @ │ │ ldrdeq r9, [r6], #92 @ 0x5c @ │ │ rsceq r9, r6, ip, asr #11 │ │ subeq r8, pc, r0, ror r5 @ │ │ addseq r1, r5, r0, lsr #20 │ │ addseq r0, r6, r8, ror r4 │ │ mlaseq r5, r0, r4, r0 │ │ - stc2l 11, cr0, [r2, #392]! @ 0x188 @ │ │ + stc2l 11, cr0, [r2, #572]! @ 0x23c @ │ │ vcmla.f16 q10, , q13, #270 │ │ eorseq r0, r5, r0, asr r4 │ │ - stc2l 5, cr14, [r4, #836]! @ 0x344 │ │ + stc2l 5, cr14, [r4, #1016]! @ 0x3f8 │ │ strdeq r8, [pc], #-76 @ │ │ eorseq r0, r5, r0, lsr #8 │ │ - stc2l 4, cr2, [r5, #680]! @ 0x2a8 │ │ + stc2l 4, cr2, [r5, #860]! @ 0x35c │ │ ldrshteq r0, [r5], -r8 │ │ - stc2l 7, cr12, [r4, #296]! @ 0x128 │ │ + stc2l 7, cr12, [r4, #476]! @ 0x1dc │ │ sbcseq r5, sl, r0, asr #31 │ │ @ instruction: 0x009603b0 │ │ ldr r0, [pc, #3576] @ 23f9d24 │ │ mov r2, sl │ │ movw r3, #3023 @ 0xbcf │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1229336,17 +1229335,17 @@ │ │ ldr r1, [pc, #3336] @ 23f9d64 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ b 23f82ac │ │ ldr r1, [pc, #3324] @ 23f9d68 │ │ ldr r1, [pc, r1] │ │ b 23f90b4 │ │ - stc2l 4, cr3, [r2, #340]! @ 0x154 │ │ + stc2l 4, cr3, [r2, #520]! @ 0x208 │ │ ldrhteq r0, [r5], -r4 │ │ - stc2l 5, cr14, [r4, #212]! @ 0xd4 │ │ + stc2l 5, cr14, [r4, #392]! @ 0x188 │ │ subeq r8, pc, r8, asr #8 │ │ subseq r0, r1, r8, lsl #22 │ │ sbcseq r5, sl, ip, asr pc │ │ strdeq r8, [pc], #-56 @ │ │ subseq r0, r1, ip, asr #21 │ │ @ instruction: 0x009602fc │ │ ldr r0, [pc, #3280] @ 23f9d6c │ │ @@ -1229382,20 +1229381,20 @@ │ │ ldr r0, [pc, #3184] @ 23f9d84 │ │ mov r2, sl │ │ movw r3, #3292 @ 0xcdc │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23f9094 │ │ - stc2l 3, cr2, [r5, #576]! @ 0x240 │ │ - stc2l 6, cr12, [r4, #376]! @ 0x178 │ │ + stc2l 3, cr2, [r5, #756]! @ 0x2f4 │ │ + stc2l 6, cr12, [r4, #556]! @ 0x22c │ │ umaaleq r8, pc, r4, r3 @ │ │ addseq r0, r6, r0, lsr #5 │ │ addseq r6, r5, r4, asr #12 │ │ - stc2l 6, cr12, [r4, #88]! @ 0x58 │ │ + stc2l 6, cr12, [r4, #268]! @ 0x10c │ │ cmp r1, r6 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ bcc 23f9164 │ │ ldr r0, [pc, #3124] @ 23f9d88 │ │ mov r2, sl │ │ mov r3, #3296 @ 0xce0 │ │ add r0, pc, r0 │ │ @@ -1229414,22 +1229413,22 @@ │ │ add r1, pc, r1 │ │ mov r2, #40 @ 0x28 │ │ mov r3, #12 │ │ bl 270d970 │ │ mov r0, #0 │ │ str r0, [sp, #4] │ │ b 23f82b0 │ │ - stc2l 3, cr2, [r5, #16]! │ │ - stc2l 2, cr2, [r5, #848]! @ 0x350 │ │ - vcmla.f16 q15, , , #270 │ │ - vcmla.f16 q15, , , #270 │ │ - stc2l 0, cr5, [r3, #776]! @ 0x308 │ │ - stc2l 2, cr15, [r2, #900]! @ 0x384 │ │ + stc2l 3, cr2, [r5, #196]! @ 0xc4 │ │ + stc2l 3, cr2, [r5, #4]! │ │ + stc2l 8, cr14, [r3, #624]! @ 0x270 │ │ + stc2l 8, cr14, [r3, #464]! @ 0x1d0 │ │ + stc2l 0, cr5, [r3, #956]! @ 0x3bc │ │ + stc2l 3, cr15, [r2, #56]! @ 0x38 │ │ eorseq r0, r5, r8, lsr #3 │ │ - stc2l 11, cr10, [r1, #576]! @ 0x240 @ │ │ + stc2l 11, cr10, [r1, #756]! @ 0x2f4 @ │ │ ldr r0, [pc, #4068] @ 23fa1b4 │ │ add r0, pc, r0 │ │ bl 270d2d0 │ │ bl 270db20 │ │ cmp r0, #0 │ │ bne 23fd448 │ │ ldr r0, [pc, #4048] @ 23fa1b8 │ │ @@ -1229481,18 +1229480,18 @@ │ │ add r1, pc, r1 │ │ bl 270d970 │ │ ldr r0, [sp, #4] │ │ add r0, r0, #1 │ │ str r0, [sp, #4] │ │ b 23f82b0 │ │ eorseq r0, r5, r4, lsl #3 │ │ - stc2l 2, cr2, [r5, #56]! @ 0x38 │ │ + stc2l 2, cr2, [r5, #236]! @ 0xec │ │ eorseq r0, r5, r0, ror r1 │ │ - vcmla.f16 d16, d2, d30, #270 │ │ - stc2l 9, cr12, [r3, #46]! @ 0x2e @ │ │ + stc2l 8, cr0, [r2, #364]! @ 0x16c │ │ + stc2l 9, cr12, [r3, #136]! @ 0x88 @ │ │ ldr r0, [pc, #3852] @ 23fa1d8 │ │ mov r2, #40 @ 0x28 │ │ ldr r1, [pc, #3848] @ 23fa1dc │ │ mov r3, #1 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ @@ -1229502,21 +1229501,21 @@ │ │ cmp r1, r8 │ │ bhi 23f9a34 │ │ ldr r2, [pc, #4076] @ 23fa2e8 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ add r2, pc, r2 │ │ ldr r4, [r2, r1, lsl #2] │ │ b 23f9a98 │ │ - stc2l 11, cr10, [r1, #16]! @ │ │ - stc2l 4, cr1, [r2, #392]! @ 0x188 │ │ - stc2l 6, cr10, [r4, #284]! @ 0x11c │ │ - stc2l 15, cr6, [r3, #716]! @ 0x2cc │ │ - stc2l 3, cr12, [r4, #1020]! @ 0x3fc │ │ - vcmla.f16 q14, , q11, #270 │ │ - stc2l 13, cr4, [r2, #36]! @ 0x24 │ │ + stc2l 11, cr10, [r1, #196]! @ 0xc4 @ │ │ + stc2l 4, cr1, [r2, #572]! @ 0x23c │ │ + stc2l 6, cr10, [r4, #464]! @ 0x1d0 │ │ + stc2l 15, cr6, [r3, #896]! @ 0x380 │ │ + stc2l 4, cr12, [r4, #176]! @ 0xb0 │ │ + stc2l 8, cr12, [r3, #588]! @ 0x24c │ │ + stc2l 13, cr4, [r2, #216]! @ 0xd8 │ │ ldr r0, [pc, #4032] @ 23fa2ec │ │ mov r2, sl │ │ movw r3, #3023 @ 0xbcf │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4016] @ 23fa2f0 │ │ add r1, pc, r1 │ │ @@ -1229562,27 +1229561,27 @@ │ │ movw r3, #3042 @ 0xbe2 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r2, [pc, #3960] @ 23fa368 │ │ mov r1, r0 │ │ ldr r2, [pc, r2] │ │ b 23f8f84 │ │ - stc2l 5, cr10, [r4, #708]! @ 0x2c4 │ │ - stc2l 5, cr10, [r4, #624]! @ 0x270 │ │ - stc2l 12, cr8, [r3, #856]! @ 0x358 │ │ - stc2l 10, cr10, [r2, #756]! @ 0x2f4 @ │ │ - stc2l 10, cr6, [r4, #920]! @ 0x398 @ │ │ - stc2l 0, cr3, [r2, #156]! @ 0x9c │ │ + stc2l 5, cr10, [r4, #888]! @ 0x378 │ │ + stc2l 5, cr10, [r4, #804]! @ 0x324 │ │ + stc2l 13, cr8, [r3, #12]! │ │ + stc2l 10, cr10, [r2, #936]! @ 0x3a8 @ │ │ + stc2l 11, cr6, [r4, #76]! @ 0x4c @ │ │ + stc2l 0, cr3, [r2, #336]! @ 0x150 │ │ smlaleq r9, r6, r0, r0 │ │ - stc2l 10, cr2, [r4, #264]! @ 0x108 @ │ │ + stc2l 10, cr2, [r4, #444]! @ 0x1bc @ │ │ eorseq pc, r4, r0, asr #30 │ │ rsceq r9, r6, r0, asr #32 │ │ rsceq r9, r6, r4, lsr r0 │ │ addseq pc, r5, r4, ror #29 │ │ - stc2l 15, cr12, [r2, #132]! @ 0x84 │ │ + stc2l 15, cr12, [r2, #312]! @ 0x138 │ │ umaaleq r7, pc, r0, pc @ │ │ ldr r0, [pc, #4076] @ 23fa424 │ │ add r0, pc, r0 │ │ ldrb r0, [r0] │ │ cmp r0, #1 │ │ bne 23f94ec │ │ bl 270d6c0 │ │ @@ -1229654,24 +1229653,24 @@ │ │ mov r2, #40 @ 0x28 │ │ ldr r1, [pc, #4036] @ 23fa51c │ │ mov r3, #8 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ b 23f82ac │ │ addeq r5, lr, r4, lsl #27 │ │ - stc2l 5, cr14, [r3, #60]! @ 0x3c │ │ + stc2l 5, cr14, [r3, #240]! @ 0xf0 │ │ addseq r6, r5, r4, lsr r2 │ │ addseq pc, r5, r8, ror #28 │ │ - stc2l 4, cr0, [r5, #496]! @ 0x1f0 │ │ + stc2l 4, cr0, [r5, #676]! @ 0x2a4 │ │ addseq pc, r5, r8, lsr lr @ │ │ addseq pc, r5, r0, lsr lr @ │ │ subseq fp, r0, r4, lsl #15 │ │ - stc2l 15, cr13, [r4, #740]! @ 0x2e4 │ │ + stc2l 15, cr13, [r4, #920]! @ 0x398 │ │ addseq pc, r5, r4, ror #27 │ │ - stc2l 9, cr6, [r4, #106]! @ 0x6a @ │ │ + stc2l 9, cr6, [r4, #196]! @ 0xc4 @ │ │ subeq r7, pc, r4, asr #29 │ │ subeq r7, pc, r0, asr #29 │ │ subseq fp, r0, r8, lsl r7 │ │ subeq r7, pc, ip, ror #28 │ │ addseq pc, r5, r0, ror sp @ │ │ subseq r1, r0, r0, lsr #21 │ │ addseq pc, r5, r0, asr #26 │ │ @@ -1229764,35 +1229763,35 @@ │ │ addseq sl, r5, r0, asr #29 │ │ strheq r7, [pc], #-216 @ │ │ subeq r7, pc, r4, lsr #27 │ │ umullseq sl, r5, r0, lr │ │ addseq r6, r5, ip, asr r0 │ │ umullseq pc, r5, r0, ip @ │ │ addseq pc, r5, r0, lsl #25 │ │ - stc2l 12, cr12, [r2, #756]! @ 0x2f4 │ │ + stc2l 12, cr12, [r2, #936]! @ 0x3a8 │ │ addseq pc, r5, ip, asr #24 │ │ addeq r5, lr, r0, lsr #22 │ │ - stc2l 2, cr14, [r3, #684]! @ 0x2ac │ │ - stc2l 2, cr14, [r3, #524]! @ 0x20c │ │ + stc2l 2, cr14, [r3, #864]! @ 0x360 │ │ + stc2l 2, cr14, [r3, #704]! @ 0x2c0 │ │ @ instruction: 0x0095fbf0 │ │ addseq r5, r5, r0, lsr #31 │ │ - stc2l 12, cr12, [r2, #132]! @ 0x84 │ │ + stc2l 12, cr12, [r2, #312]! @ 0x138 │ │ addeq r5, lr, ip, lsl #21 │ │ addseq pc, r5, r4, lsr #23 │ │ - stc2l 12, cr1, [r5, #272]! @ 0x110 │ │ + stc2l 12, cr1, [r5, #452]! @ 0x1c4 │ │ subseq r0, r1, ip, lsr #6 │ │ eorseq pc, r4, ip, lsl #23 │ │ - stc2l 14, cr0, [r2, #968]! @ 0x3c8 │ │ + stc2l 15, cr0, [r2, #124]! @ 0x7c │ │ addseq sl, r5, r4, lsl sp │ │ addseq sl, r5, ip, lsl #26 │ │ - stc2l 1, cr14, [r3, #484]! @ 0x1e4 │ │ + stc2l 1, cr14, [r3, #664]! @ 0x298 │ │ @ instruction: 0x0095acbc │ │ - stc2l 1, cr14, [r3, #308]! @ 0x134 │ │ + stc2l 1, cr14, [r3, #488]! @ 0x1e8 │ │ addseq sl, r5, ip, lsl #25 │ │ - stc2l 10, cr12, [r2, #876]! @ 0x36c @ │ │ + stc2l 11, cr12, [r2, #32]! @ │ │ addseq sl, r5, r0, asr ip │ │ subseq fp, r0, r0, lsl #8 │ │ sbcseq r5, sl, ip, asr r6 │ │ addseq sl, r5, r0, lsl #24 │ │ addseq pc, r5, ip, lsl sl @ │ │ rsceq r8, r6, r8, asr #22 │ │ umullseq r0, r5, r8, pc @ │ │ @@ -1229954,20 +1229953,20 @@ │ │ ldr r0, [pc, #3948] @ 23fa970 │ │ mov r2, sl │ │ mov r3, #3504 @ 0xdb0 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23f95b0 │ │ - stc2l 5, cr6, [r4, #220]! @ 0xdc │ │ + stc2l 5, cr6, [r4, #400]! @ 0x190 │ │ addseq r0, r5, r0, ror #30 │ │ - stc2l 0, cr14, [r3, #260]! @ 0x104 │ │ + stc2l 0, cr14, [r3, #440]! @ 0x1b8 │ │ addseq sl, r5, r4, lsl #23 │ │ subeq r7, pc, r8, ror sl @ │ │ - stc2l 0, cr14, [r3, #12]! │ │ + stc2l 0, cr14, [r3, #192]! @ 0xc0 │ │ addseq r5, r5, r0, lsr #26 │ │ ldr r7, [pc, #3896] @ 23fa974 │ │ mov r2, sl │ │ movw r3, #3240 @ 0xca8 │ │ add r7, pc, r7 │ │ mov r0, r7 │ │ bl 270d9c0 │ │ @@ -1229990,36 +1229989,36 @@ │ │ ldr r7, [pc, #3824] @ 23fa984 │ │ movw r8, #4999 @ 0x1387 │ │ add r7, pc, r7 │ │ ldr r0, [sp, #4] │ │ add r0, r4, r0 │ │ str r0, [r2, r1, lsl #2] │ │ b 23f82b0 │ │ - stc2l 9, cr12, [r2, #330]! @ 0x14a @ │ │ + stc2l 9, cr12, [r2, #420]! @ 0x1a4 @ │ │ bl 270dda0 │ │ mov r5, r0 │ │ ldr r0, [pc, #3788] @ 23fa988 │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-56] @ 0xffffffc8 │ │ cmp r0, #1 │ │ blt 23fa1e0 │ │ mov r4, #0 │ │ mov r8, #0 │ │ b 23f9b3c │ │ addeq r5, lr, r4, lsl r8 │ │ subeq r7, pc, ip, lsl #20 │ │ - stc2l 15, cr13, [r3, #604]! @ 0x25c │ │ + stc2l 15, cr13, [r3, #784]! @ 0x310 │ │ @ instruction: 0x00955cb4 │ │ subseq fp, r0, r4, ror r2 │ │ addseq ip, r4, r0, asr r0 │ │ addseq pc, r5, ip, asr #17 │ │ @ instruction: 0x0095f8b8 │ │ - stc2l 3, cr2, [r4, #608]! @ 0x260 │ │ + stc2l 3, cr2, [r4, #788]! @ 0x314 │ │ @ instruction: 0x0094bff8 │ │ - vcmla.f16 q14, q9, , #270 │ │ + stc2l 8, cr12, [r2, #976]! @ 0x3d0 │ │ subseq fp, r0, r8, ror #3 │ │ ldr r0, [pc, #3712] @ 23fa98c │ │ clz r2, r8 │ │ mov r1, #0 │ │ add r0, pc, r0 │ │ lsr r2, r2, #5 │ │ ldr r0, [r0, r7, lsl #2] │ │ @@ -1230059,18 +1230058,18 @@ │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3964] @ 23fab2c │ │ mov r8, r4 │ │ add r1, pc, r1 │ │ ldr r5, [r1, r0, lsl #2] │ │ b 23f9b30 │ │ - stc2l 14, cr15, [r4, #480]! @ 0x1e0 │ │ + stc2l 14, cr15, [r4, #660]! @ 0x294 │ │ addseq pc, r5, r4, lsr r8 @ │ │ addseq pc, r5, ip, lsl r8 @ │ │ - stc2l 4, cr4, [r2, #952]! @ 0x3b8 │ │ + stc2l 5, cr4, [r2, #108]! @ 0x6c │ │ sbcseq r0, sl, ip, ror #11 │ │ ldr r0, [pc, #3928] @ 23fab30 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, r6 │ │ bcc 23f9bfc │ │ ldr r0, [pc, #3912] @ 23fab34 │ │ @@ -1230088,20 +1230087,20 @@ │ │ cmp r1, r8 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ bhi 23fa2f4 │ │ ldr r0, [pc, #3864] @ 23fab40 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 23fa328 │ │ - stc2l 9, cr13, [r4, #298]! @ 0x12a @ │ │ + stc2l 9, cr13, [r4, #388]! @ 0x184 @ │ │ strheq r7, [pc], #-136 @ │ │ sbcseq r5, r6, r0, lsl #24 │ │ sbcseq fp, r9, r4, asr r7 │ │ ldrheq r1, [r0], #-68 @ 0xffffffbc │ │ - stc2l 2, cr6, [r4, #628]! @ 0x274 │ │ + stc2l 2, cr6, [r4, #808]! @ 0x328 │ │ mov r0, r5 │ │ bl 270e050 │ │ cmp r0, #0 │ │ beq 23fa428 │ │ add r1, sp, #12 │ │ mov r0, r5 │ │ bl 270e060 │ │ @@ -1230131,61 +1230130,61 @@ │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 23fa59c │ │ subseq r1, r0, r0, ror #8 │ │ stc2l 6, cr5, [r5, #652]! @ 0x28c │ │ sbcseq r5, r6, r4, ror #22 │ │ - stc2l 6, cr8, [r2, #796]! @ 0x31c │ │ + stc2l 6, cr8, [r2, #976]! @ 0x3d0 │ │ smullseq fp, r9, r8, r6 │ │ stc2l 11, cr3, [r5, #444]! @ 0x1bc @ │ │ sbcseq sl, r6, r0, lsr r9 │ │ - stc2l 0, cr14, [r1, #604]! @ 0x25c │ │ - stc2l 5, cr6, [r3, #608]! @ 0x260 │ │ + stc2l 0, cr14, [r1, #784]! @ 0x310 │ │ + stc2l 5, cr6, [r3, #788]! @ 0x314 │ │ sbcseq r5, sl, r0, ror #4 │ │ sbcseq r4, r3, ip, ror sp │ │ eorseq pc, r4, ip, lsr #13 │ │ eorseq pc, r4, ip, ror #12 │ │ - stc2l 11, cr9, [r4, #860]! @ 0x35c @ │ │ + stc2l 12, cr9, [r4, #16]! │ │ rsceq r8, r6, r8, asr #14 │ │ rsceq r8, r6, r0, lsr r7 │ │ eorseq pc, r4, ip, lsr #12 │ │ eorseq pc, r4, ip, lsr #12 │ │ ldrdeq r8, [r6], #108 @ 0x6c @ │ │ - stc2l 9, cr0, [r2, #36]! @ 0x24 @ │ │ - stc2l 2, cr4, [r2, #260]! @ 0x104 │ │ - stc2l 11, cr13, [r3, #420]! @ 0x1a4 @ │ │ + stc2l 9, cr0, [r2, #126]! @ 0x7e @ │ │ + stc2l 2, cr4, [r2, #440]! @ 0x1b8 │ │ + stc2l 11, cr13, [r3, #600]! @ 0x258 @ │ │ @ instruction: 0x0095f4d4 │ │ addseq sl, r5, r4, lsr #13 │ │ smullseq r0, sl, ip, r2 │ │ addseq sl, r5, ip, ror r6 │ │ sbcseq r0, sl, ip, ror r2 │ │ addseq pc, r5, ip, lsl #9 │ │ - stc2l 4, cr12, [r2, #748]! @ 0x2ec │ │ + stc2l 4, cr12, [r2, #928]! @ 0x3a0 │ │ addseq pc, r5, r4, asr r4 @ │ │ ldrsbeq sl, [r0], #-220 @ 0xffffff24 │ │ - stc2l 10, cr13, [r3, #724]! @ 0x2d4 @ │ │ + stc2l 10, cr13, [r3, #904]! @ 0x388 @ │ │ addseq pc, r5, r0, lsl r4 @ │ │ addseq sl, r5, r0, ror #11 │ │ - stc2l 4, cr12, [r2, #236]! @ 0xec │ │ + stc2l 4, cr12, [r2, #416]! @ 0x1a0 │ │ subseq sl, r0, ip, asr sp │ │ eorseq pc, r4, ip, ror #7 │ │ - stc2l 7, cr11, [r4, #316]! @ 0x13c │ │ + stc2l 7, cr11, [r4, #496]! @ 0x1f0 │ │ subeq r7, pc, r4, lsl #9 │ │ addseq r5, r5, r0, lsr r7 │ │ addseq pc, r5, r4, ror #6 │ │ addseq pc, r5, r4, asr r3 @ │ │ - stc2l 14, cr1, [r4, #192]! @ 0xc0 │ │ + stc2l 14, cr1, [r4, #372]! @ 0x174 │ │ addseq pc, r5, ip, lsl r3 @ │ │ addseq fp, r4, r8, lsl #21 │ │ - stc2l 9, cr13, [r3, #246]! @ 0xf6 @ │ │ - stc2l 3, cr1, [r5, #464]! @ 0x1d0 │ │ + stc2l 9, cr13, [r3, #336]! @ 0x150 @ │ │ + stc2l 3, cr1, [r5, #644]! @ 0x284 │ │ subseq pc, r0, ip, asr sl @ │ │ ldrhteq pc, [r4], -ip @ │ │ - stc2l 1, cr6, [r3, #716]! @ 0x2cc │ │ + stc2l 1, cr6, [r3, #896]! @ 0x380 │ │ ldr r7, [pc, #3508] @ 23fab54 │ │ cmp r8, #0 │ │ add r7, pc, r7 │ │ beq 23fa1e0 │ │ sub r5, r8, #1 │ │ movw r0, #5001 @ 0x1389 │ │ cmp r8, r0 │ │ @@ -1230446,20 +1230445,20 @@ │ │ str r5, [fp, #-56] @ 0xffffffc8 │ │ b 23fb2c4 │ │ rsceq r8, r6, r0, lsl #7 │ │ rsceq r8, r6, r8, ror #6 │ │ eorseq pc, r4, r4, ror #4 │ │ eorseq pc, r4, r4, ror #4 │ │ rsceq r8, r6, r4, lsl r3 │ │ - stc2l 0, cr6, [r3, #876]! @ 0x36c │ │ - stc2l 7, cr9, [r4, #260]! @ 0x104 │ │ + stc2l 1, cr6, [r3, #32]! │ │ + stc2l 7, cr9, [r4, #440]! @ 0x1b8 │ │ ldrhteq pc, [r4], -r0 @ │ │ - stc2l 12, cr5, [r4, #872]! @ 0x368 │ │ + stc2l 13, cr5, [r4, #28]! │ │ eorseq pc, r4, r0, ror r1 @ │ │ - vcmla.f16 , , q1, #270 │ │ + vcmla.f16 , , , #270 │ │ ldr r0, [pc, #3908] @ 23fb12c │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ cmp r1, #2 │ │ bcc 23fa210 │ │ ldr r0, [pc, #3888] @ 23fb130 │ │ @@ -1230519,15 +1230518,15 @@ │ │ mov r0, #0 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ str r0, [r4, r1, lsl #2] │ │ mov r4, #0 │ │ b 23fa778 │ │ addseq pc, r5, ip, lsr #2 │ │ addseq sl, r5, ip, ror #5 │ │ - stc2l 13, cr3, [r2, #760]! @ 0x2f8 │ │ + stc2l 13, cr3, [r2, #940]! @ 0x3ac │ │ ldrheq pc, [r9], #236 @ 0xec @ │ │ ldr r0, [pc, #3892] @ 23fb230 │ │ mov r2, sl │ │ movw r3, #3342 @ 0xd0e │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3876] @ 23fb234 │ │ @@ -1230543,21 +1230542,21 @@ │ │ add r2, pc, r2 │ │ ldr r0, [r2, r1, lsl #2] │ │ add r4, r0, r3 │ │ str r4, [r2, r1, lsl #2] │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ b 23f9038 │ │ addseq pc, r5, r4, asr #1 │ │ - stc2l 7, cr13, [r3, #180]! @ 0xb4 │ │ + stc2l 7, cr13, [r3, #360]! @ 0x168 │ │ addseq sl, r5, r0, ror r2 │ │ addseq pc, r5, ip, lsl #1 │ │ - stc2l 13, cr3, [r2, #296]! @ 0x128 │ │ + stc2l 13, cr3, [r2, #476]! @ 0x1dc │ │ sbcseq pc, r9, r4, asr #28 │ │ addseq pc, r5, r0, asr r0 @ │ │ - stc2l 6, cr15, [r4, #400]! @ 0x190 │ │ + stc2l 6, cr15, [r4, #580]! @ 0x244 │ │ addseq pc, r5, r0, lsr #32 │ │ mov r0, r5 │ │ bl 270e050 │ │ cmp r0, #0 │ │ beq 23fadf8 │ │ add r1, sp, #12 │ │ mov r0, r5 │ │ @@ -1230605,18 +1230604,18 @@ │ │ ldr r1, [pc, #3624] @ 23fb258 │ │ sub r0, fp, #108 @ 0x6c │ │ mov r2, #40 @ 0x28 │ │ mov r3, #12 │ │ add r1, pc, r1 │ │ b 23fae0c │ │ @ instruction: 0x0095efbc │ │ - stc2l 1, cr13, [r4, #388]! @ 0x184 │ │ + stc2l 1, cr13, [r4, #568]! @ 0x238 │ │ subeq r7, pc, r0, lsl #1 │ │ addseq lr, r5, ip, ror #30 │ │ - stc2l 10, cr5, [r4, #676]! @ 0x2a4 @ │ │ + stc2l 10, cr5, [r4, #856]! @ 0x358 @ │ │ subseq r0, r0, r0, ror ip │ │ ldr r0, [pc, #3580] @ 23fb25c │ │ mov r2, sl │ │ movw r3, #3343 @ 0xd0f │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r2, [pc, #3564] @ 23fb260 │ │ @@ -1230655,30 +1230654,30 @@ │ │ mov r2, #40 @ 0x28 │ │ ldr r1, [pc, #3456] @ 23fb27c │ │ mov r3, #20 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ b 23fa890 │ │ - stc2l 9, cr1, [r4, #480]! @ 0x1e0 @ │ │ + stc2l 10, cr1, [r4, #116]! @ 0x74 @ │ │ addseq fp, r4, r8, asr r6 │ │ addseq r5, r5, ip, lsl #5 │ │ eorseq lr, r4, ip, ror #29 │ │ - stc2l 15, cr0, [r5, #472]! @ 0x1d8 │ │ + stc2l 15, cr0, [r5, #652]! @ 0x28c │ │ addseq r3, r6, r0, ror ip │ │ subseq sl, r0, r4, lsr #15 │ │ - stc2l 9, cr1, [r4, #20]! @ │ │ + stc2l 9, cr1, [r4, #110]! @ 0x6e @ │ │ subseq r4, r1, ip, asr #7 │ │ @ instruction: 0x0095edd8 │ │ - stc2l 15, cr12, [r4, #516]! @ 0x204 │ │ + stc2l 15, cr12, [r4, #696]! @ 0x2b8 │ │ subeq r6, pc, r0, lsr #29 │ │ - stc2l 8, cr1, [r4, #504]! @ 0x1f8 │ │ + vcmla.f16 d17, d20, d27, #270 │ │ subseq r4, r1, r0, asr #6 │ │ addseq lr, r5, r4, asr sp │ │ - stc2l 14, cr12, [r4, #964]! @ 0x3c4 │ │ + stc2l 15, cr12, [r4, #120]! @ 0x78 │ │ subeq r6, pc, r4, lsl lr @ │ │ ldr r0, [pc, #4092] @ 23fb554 │ │ mov r2, sl │ │ movw r3, #3714 @ 0xe82 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [sp, #12] │ │ @@ -1230781,23 +1230780,23 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3876] @ 23fb61c │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 23fb070 │ │ ldrsheq sl, [r0], #-80 @ 0xffffffb0 │ │ - stc2l 7, cr1, [r4, #312]! @ 0x138 │ │ + stc2l 7, cr1, [r4, #492]! @ 0x1ec │ │ subseq r4, r1, r0, lsl r2 │ │ addseq lr, r5, ip, lsl ip │ │ - stc2l 7, cr5, [r4, #372]! @ 0x174 │ │ + stc2l 7, cr5, [r4, #552]! @ 0x228 │ │ subseq r0, r0, r4, lsr #18 │ │ - stc2l 6, cr1, [r4, #776]! @ 0x308 │ │ + stc2l 6, cr1, [r4, #956]! @ 0x3bc │ │ subseq r4, r1, r4, lsl #3 │ │ umullseq lr, r5, r8, fp │ │ - stc2l 6, cr5, [r4, #820]! @ 0x334 │ │ + stc2l 6, cr5, [r4, #1000]! @ 0x3e8 │ │ ldr r0, [pc, #3824] @ 23fb620 │ │ mov r2, sl │ │ movw r3, #3620 @ 0xe24 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, #0 │ │ str r1, [r4, r0, lsl #2] │ │ @@ -1230886,15 +1230885,15 @@ │ │ mov r4, #0 │ │ ldr r0, [pc, #4020] @ 23fb84c │ │ add r0, pc, r0 │ │ str r4, [r0] │ │ b 23f82b0 │ │ @ instruction: 0x00500898 │ │ subseq sl, r0, ip, asr #9 │ │ - stc2l 6, cr1, [r4, #136]! @ 0x88 │ │ + stc2l 6, cr1, [r4, #316]! @ 0x13c │ │ ldr r1, [fp, #-68] @ 0xffffffbc │ │ mov r4, #0 │ │ ldr r0, [pc, #3988] @ 23fb850 │ │ cmp r1, #1 │ │ add r0, pc, r0 │ │ bge 23fa928 │ │ rsb r0, r1, #0 │ │ @@ -1230911,15 +1230910,15 @@ │ │ bl 270e030 │ │ ldr r0, [pc, #3932] @ 23fb858 │ │ add r0, pc, r0 │ │ strb r4, [r0] │ │ b 23fbbe4 │ │ subseq r4, r1, r0, ror #1 │ │ subseq sl, r0, r4, ror #8 │ │ - stc2l 5, cr1, [r4, #792]! @ 0x318 │ │ + stc2l 5, cr1, [r4, #972]! @ 0x3cc │ │ ldr r0, [pc, #3908] @ 23fb85c │ │ ldr r1, [r5, r1, lsl #2] │ │ add r0, pc, r0 │ │ str r1, [fp, #-68] @ 0xffffffbc │ │ cmp r1, #0 │ │ ble 23fa8c4 │ │ ldr r1, [pc, #3888] @ 23fb860 │ │ @@ -1230934,18 +1230933,18 @@ │ │ bhi 23fa990 │ │ ldr r3, [pc, #4064] @ 23fb938 │ │ add r3, pc, r3 │ │ ldr r4, [r3, r1, lsl #2] │ │ b 23fa9e8 │ │ subseq r4, r1, r4, lsl #1 │ │ addseq lr, r5, r8, lsl #21 │ │ - stc2l 5, cr1, [r4, #384]! @ 0x180 │ │ + stc2l 5, cr1, [r4, #564]! @ 0x234 │ │ rsbeq sl, r9, r8, lsl sl │ │ - stc2l 13, cr10, [r4, #696]! @ 0x2b8 │ │ - stc2l 0, cr13, [r3, #356]! @ 0x164 │ │ + stc2l 13, cr10, [r4, #876]! @ 0x36c │ │ + stc2l 0, cr13, [r3, #536]! @ 0x218 │ │ addseq lr, r5, r0, asr #19 │ │ addseq r9, r5, r8, lsl #23 │ │ addseq r9, r5, r0, ror #22 │ │ addseq lr, r5, r8, ror r9 │ │ subeq r6, pc, r8, lsr sl @ │ │ @ instruction: 0x00959ad8 │ │ mov r2, sl │ │ @@ -1231044,29 +1231043,29 @@ │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3908] @ 23fba5c │ │ add r0, pc, r0 │ │ b 23fac84 │ │ addseq lr, r5, r8, asr #17 │ │ - stc2l 15, cr12, [r3, #180]! @ 0xb4 │ │ + stc2l 15, cr12, [r3, #360]! @ 0x168 │ │ addseq r9, r5, r0, ror sl │ │ - stc2l 14, cr12, [r3, #996]! @ 0x3e4 │ │ + stc2l 15, cr12, [r3, #152]! @ 0x98 │ │ addseq r9, r5, r8, lsr sl │ │ addseq lr, r5, r8, lsr r8 │ │ - stc2l 14, cr12, [r3, #652]! @ 0x28c │ │ + stc2l 14, cr12, [r3, #832]! @ 0x340 │ │ addseq lr, r5, r0, lsl r8 │ │ addseq r4, r5, r0, asr #23 │ │ addseq sl, r4, r4, ror #30 │ │ addseq lr, r5, r4, lsr #15 │ │ - vcmla.f16 q8, , q2, #270 │ │ + stc2l 8, cr0, [r5, #452]! @ 0x1c4 │ │ subseq lr, r0, r4, lsl pc │ │ addeq r9, lr, r4, asr #8 │ │ addseq lr, r5, ip, ror #12 │ │ - stc2l 6, cr11, [r2, #604]! @ 0x25c │ │ + stc2l 6, cr11, [r2, #784]! @ 0x310 │ │ subseq r9, r0, r4, asr #31 │ │ ldr r0, [fp, #-68] @ 0xffffffbc │ │ ldr r1, [pc, #3828] @ 23fba60 │ │ add r1, pc, r1 │ │ vldr d8, [r1] │ │ mvn r1, #1 │ │ add r1, r1, r0, lsl #1 │ │ @@ -1231245,40 +1231244,40 @@ │ │ ldr r0, [pc, #4020] @ 23fbde4 │ │ mov r2, #40 @ 0x28 │ │ ldr r1, [pc, #4016] @ 23fbde8 │ │ mov r3, #7 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ b 23f82ac │ │ - stc2l 1, cr5, [r4, #76]! @ 0x4c │ │ + stc2l 1, cr5, [r4, #256]! @ 0x100 │ │ addseq pc, r4, r0, asr #22 │ │ - stc2l 0, cr5, [r4, #860]! @ 0x35c │ │ + stc2l 1, cr5, [r4, #16]! │ │ addseq pc, r4, ip, lsl #22 │ │ subeq r6, pc, r8, asr #12 │ │ - stc2l 11, cr12, [r3, #852]! @ 0x354 @ │ │ + stc2l 12, cr12, [r3, #8]! │ │ addseq r9, r5, r8, lsl #14 │ │ - stc2l 11, cr12, [r3, #612]! @ 0x264 @ │ │ + stc2l 11, cr12, [r3, #792]! @ 0x318 @ │ │ @ instruction: 0x009596dc │ │ ldrdeq r6, [pc], #-88 @ │ │ - stc2l 5, cr11, [r2, #228]! @ 0xe4 │ │ + stc2l 5, cr11, [r2, #408]! @ 0x198 │ │ addeq r4, lr, r0, lsr #7 │ │ - stc2l 4, cr11, [r2, #1012]! @ 0x3f4 │ │ + stc2l 5, cr11, [r2, #168]! @ 0xa8 │ │ addeq r4, lr, ip, ror #6 │ │ subeq r6, pc, r8, ror #10 │ │ - stc2l 15, cr0, [r4, #432]! @ 0x1b0 │ │ + stc2l 15, cr0, [r4, #612]! @ 0x264 │ │ @ instruction: 0x0094abd0 │ │ - stc2l 15, cr0, [r4, #192]! @ 0xc0 │ │ + stc2l 15, cr0, [r4, #372]! @ 0x174 │ │ umullseq sl, r4, ip, fp │ │ strdeq r6, [pc], #-72 @ │ │ - stc2l 4, cr11, [r2, #332]! @ 0x14c │ │ + stc2l 4, cr11, [r2, #512]! @ 0x200 │ │ subseq r9, r0, r8, ror sp │ │ - stc2l 4, cr11, [r2, #92]! @ 0x5c │ │ + stc2l 4, cr11, [r2, #272]! @ 0x110 │ │ subseq r9, r0, r4, asr #26 │ │ subeq r6, pc, r8, lsl #9 │ │ - stc2l 5, cr12, [r4, #324]! @ 0x144 │ │ + stc2l 5, cr12, [r4, #504]! @ 0x1f8 │ │ ldr r0, [pc, #4080] @ 23fbea4 │ │ mov r2, sl │ │ movw r3, #3757 @ 0xead │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [sp, #12] │ │ ldr r2, [pc, #4060] @ 23fbea8 │ │ @@ -1231391,17 +1231390,17 @@ │ │ ldr r0, [pc, #3772] @ 23fbf34 │ │ mov r2, #40 @ 0x28 │ │ ldr r1, [pc, #3768] @ 23fbf38 │ │ mov r3, #6 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ b 23f82ac │ │ - stc2l 14, cr4, [r4, #852]! @ 0x354 │ │ + stc2l 15, cr4, [r4, #8]! │ │ subeq r6, pc, r8, ror #8 │ │ - stc2l 5, cr12, [r4, #20]! │ │ + stc2l 5, cr12, [r4, #200]! @ 0xc8 │ │ subeq r6, pc, ip, lsr #8 │ │ subeq r6, pc, r4, lsl #8 │ │ subseq r0, r0, r0, lsr r0 │ │ ldr r0, [pc, #3728] @ 23fbf3c │ │ mov r2, sl │ │ movw r3, #3804 @ 0xedc │ │ add r0, pc, r0 │ │ @@ -1231429,18 +1231428,18 @@ │ │ add r1, pc, r1 │ │ cmp r0, #1 │ │ str r0, [r1] │ │ bge 23fb14c │ │ b 23fbbe4 │ │ strdeq pc, [pc], #-248 @ │ │ umaaleq r6, pc, r0, r3 @ │ │ - stc2l 2, cr7, [r2, #460]! @ 0x1cc │ │ + stc2l 2, cr7, [r2, #640]! @ 0x280 │ │ sbcseq sl, r9, r8, asr #4 │ │ rsceq r7, r6, ip, ror #6 │ │ - stc2l 13, cr0, [r4, #120]! @ 0x78 │ │ + stc2l 13, cr0, [r4, #300]! @ 0x12c │ │ ldr r0, [r5, r1, lsl #2] │ │ ldr r1, [pc, #3604] @ 23fbf54 │ │ add r1, pc, r1 │ │ cmp r0, #0 │ │ str r0, [r1] │ │ ble 23fbbe4 │ │ movw r2, #34464 @ 0x86a0 │ │ @@ -1231491,39 +1231490,39 @@ │ │ mov r2, sl │ │ movw r3, #3823 @ 0xeef │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23fb134 │ │ sbcseq r3, sl, ip, ror #27 │ │ - stc2l 7, cr8, [r4, #564]! @ 0x234 │ │ + stc2l 7, cr8, [r4, #744]! @ 0x2e8 │ │ addseq lr, r5, r0, asr #3 │ │ - stc2l 1, cr11, [r2, #988]! @ 0x3dc │ │ + stc2l 2, cr11, [r2, #144]! @ 0x90 │ │ subseq r9, r0, r0, lsr #22 │ │ addseq lr, r5, r4, asr r1 │ │ - stc2l 12, cr0, [r4, #64]! @ 0x40 │ │ + stc2l 12, cr0, [r4, #244]! @ 0xf4 │ │ addseq sl, r4, ip, ror r8 │ │ ldrsheq lr, [r5], r8 │ │ @ instruction: 0x009592b8 │ │ addseq lr, r5, r0, lsl #1 │ │ - stc2l 1, cr0, [r5, #128]! @ 0x80 │ │ + stc2l 1, cr0, [r5, #308]! @ 0x134 │ │ ldrsheq lr, [r0], #-112 @ 0xffffff90 │ │ addeq r8, lr, r0, lsr #26 │ │ addseq lr, r5, r8, lsl r0 │ │ sbcseq lr, r9, r0, ror #27 │ │ - stc2l 12, cr2, [r2, #756]! @ 0x2f4 │ │ - stc2l 6, cr12, [r3, #212]! @ 0xd4 │ │ + stc2l 12, cr2, [r2, #936]! @ 0x3a8 │ │ + stc2l 6, cr12, [r3, #392]! @ 0x188 │ │ addseq r9, r5, r8, ror r1 │ │ umullseq sp, r5, r4, pc @ │ │ - stc2l 5, cr12, [r3, #980]! @ 0x3d4 │ │ + stc2l 6, cr12, [r3, #136]! @ 0x88 │ │ addseq r9, r5, r8, lsr r1 │ │ addseq sp, r5, r4, asr pc │ │ - stc2l 15, cr10, [r2, #556]! @ 0x22c │ │ + stc2l 15, cr10, [r2, #736]! @ 0x2e0 │ │ eorseq sp, r4, r8, asr #30 │ │ - stc2l 4, cr8, [r4, #800]! @ 0x320 │ │ + stc2l 4, cr8, [r4, #980]! @ 0x3d4 │ │ ldr r0, [pc, #3312] @ 23fbf78 │ │ mov r1, r5 │ │ mov r2, sl │ │ movw r3, #3662 @ 0xe4e │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3292] @ 23fbf7c │ │ @@ -1231697,31 +1231696,31 @@ │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ ldr r5, [pc, #3784] @ 23fc414 │ │ movw r8, #4999 @ 0x1387 │ │ add r5, pc, r5 │ │ b 23f82b0 │ │ - stc2l 6, cr10, [r3, #684]! @ 0x2ac │ │ + stc2l 6, cr10, [r3, #864]! @ 0x360 │ │ umulleq r8, lr, r4, fp │ │ - stc2l 4, cr14, [r4, #748]! @ 0x2ec │ │ + stc2l 4, cr14, [r4, #928]! @ 0x3a0 │ │ ldr r2, [pc, #3760] @ 23fc418 │ │ mov r4, #0 │ │ ldr r2, [pc, r2] │ │ ldr r0, [pc, #3752] @ 23fc41c │ │ cmp r2, #1 │ │ add r0, pc, r0 │ │ blt 23fb9d0 │ │ ldr r1, [pc, #3740] @ 23fc420 │ │ ldr r1, [pc, r1] │ │ cmp r1, #0 │ │ bne 23fb5b4 │ │ b 23fb960 │ │ umullseq r2, r6, r1, ip │ │ - stc2l 9, cr0, [r4, #100]! @ 0x64 @ │ │ + stc2l 9, cr0, [r4, #190]! @ 0xbe @ │ │ ldr r0, [pc, #3716] @ 23fc424 │ │ add r0, pc, r0 │ │ bl 270d2d0 │ │ ldr r0, [pc, #3708] @ 23fc428 │ │ ldr r0, [pc, r0] │ │ cmp r0, #0 │ │ beq 23fb950 │ │ @@ -1231736,27 +1231735,27 @@ │ │ cmp r1, r8 │ │ bhi 23fb624 │ │ ldr r2, [pc, #3664] @ 23fc434 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ add r2, pc, r2 │ │ ldr r4, [r2, r1, lsl #2] │ │ b 23fb684 │ │ - stc2l 8, cr0, [r4, #1008]! @ 0x3f0 │ │ + stc2l 9, cr0, [r4, #82]! @ 0x52 @ │ │ ldrheq r3, [r1], #-56 @ 0xffffffc8 │ │ rsbeq r9, r9, ip, lsr #27 │ │ eorseq sp, r4, r4, lsr #28 │ │ eorseq sp, r4, r4, lsr #28 │ │ addseq sp, r5, r0, lsr #27 │ │ smullseq r3, sl, r4, r9 │ │ - stc2l 13, cr10, [r2, #828]! @ 0x33c │ │ + stc2l 13, cr10, [r2, #1008]! @ 0x3f0 │ │ ldrsheq r9, [r0], #-100 @ 0xffffff9c │ │ addseq sp, r5, ip, asr #26 │ │ - stc2l 13, cr10, [r2, #524]! @ 0x20c │ │ + stc2l 13, cr10, [r2, #704]! @ 0x2c0 │ │ subseq r9, r0, ip, lsr #13 │ │ - stc2l 13, cr10, [r2, #204]! @ 0xcc │ │ + stc2l 13, cr10, [r2, #384]! @ 0x180 │ │ ldr r7, [pc, #3596] @ 23fc438 │ │ mov r2, sl │ │ movw r3, #4078 @ 0xfee │ │ add r7, pc, r7 │ │ mov r0, r7 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3576] @ 23fc43c │ │ @@ -1231823,18 +1231822,18 @@ │ │ add r0, r2, r1, lsl #3 │ │ vldr d16, [r0] │ │ vcmp.f64 d16, d8 │ │ vmrs APSR_nzcv, fpscr │ │ vmovge.f64 d8, d16 │ │ b 23fb8d4 │ │ addseq sp, r5, r4, asr #25 │ │ - stc2l 3, cr12, [r3, #180]! @ 0xb4 │ │ + stc2l 3, cr12, [r3, #360]! @ 0x168 │ │ addseq r8, r5, ip, ror #28 │ │ subeq r5, pc, r4, ror #26 │ │ - stc2l 2, cr12, [r3, #956]! @ 0x3bc │ │ + stc2l 3, cr12, [r3, #112]! @ 0x70 │ │ vldr d8, [sp, #40] @ 0x28 │ │ vcmp.f64 d16, d8 │ │ vmrs APSR_nzcv, fpscr │ │ bpl 23fb8dc │ │ ldr r0, [pc, #4016] @ 23fc724 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ @@ -1231847,18 +1231846,18 @@ │ │ vldr d16, [r0] │ │ vcmp.f64 d16, d8 │ │ vmrs APSR_nzcv, fpscr │ │ vmovls.f64 d8, d16 │ │ b 23fb8d4 │ │ addseq sp, r5, ip, asr ip │ │ addseq r4, r5, ip │ │ - stc2l 12, cr10, [r2, #564]! @ 0x234 │ │ + stc2l 12, cr10, [r2, #744]! @ 0x2e8 │ │ strdeq r3, [lr], r8 │ │ strdeq r5, [pc], #-192 @ │ │ - stc2l 2, cr12, [r3, #492]! @ 0x1ec │ │ + stc2l 2, cr12, [r3, #672]! @ 0x2a0 │ │ addseq r3, r5, r0, lsr #31 │ │ @ instruction: 0x0095dbdc │ │ mov r8, r5 │ │ ldr r5, [pc, #4060] @ 23fc7ac │ │ mov r2, sl │ │ movw r3, #4105 @ 0x1009 │ │ add r5, pc, r5 │ │ @@ -1231883,23 +1231882,23 @@ │ │ movw r3, #4105 @ 0x1009 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r2, [pc, #4088] @ 23fc82c │ │ mov r5, r8 │ │ add r2, pc, r2 │ │ b 23fb8d0 │ │ - stc2l 6, cr0, [r4, #752]! @ 0x2f0 │ │ + stc2l 6, cr0, [r4, #932]! @ 0x3a4 │ │ addseq sl, r4, ip, lsl r3 │ │ eorseq sp, r4, r4, asr #23 │ │ - stc2l 1, cr8, [r4, #188]! @ 0xbc │ │ + stc2l 1, cr8, [r4, #368]! @ 0x170 │ │ strhteq r6, [r6], #204 @ 0xcc │ │ - stc2l 8, cr2, [r2, #200]! @ 0xc8 │ │ + stc2l 8, cr2, [r2, #380]! @ 0x17c │ │ ldrsbeq lr, [r0], #-36 @ 0xffffffdc │ │ strdeq r5, [pc], #-176 @ │ │ - stc2l 7, cr2, [r2, #856]! @ 0x358 │ │ + vcmla.f16 d18, d2, d3, #270 │ │ addseq r2, r6, r8, lsl #18 │ │ ldr r8, [pc, #4080] @ 23fc85c │ │ mov r2, sl │ │ movw r3, #4114 @ 0x1012 │ │ add r8, pc, r8 │ │ mov r0, r8 │ │ bl 270d9c0 │ │ @@ -1231998,41 +1231997,41 @@ │ │ movw r3, #4225 @ 0x1081 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #4060] @ 23fc9dc │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 23f9548 │ │ - stc2l 4, cr0, [r4, #952]! @ 0x3b8 │ │ + stc2l 5, cr0, [r4, #108]! @ 0x6c │ │ subseq r2, r1, ip, lsr #31 │ │ ldr r4, [sp, #12] │ │ ldr r0, [pc, #4092] @ 23fca18 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ cmp r1, r6 │ │ bcc 23fa6f0 │ │ ldr r0, [pc, #4088] @ 23fca2c │ │ mov r2, sl │ │ movw r3, #3773 @ 0xebd │ │ add r0, pc, r0 │ │ b 23fa6e8 │ │ @ instruction: 0x0095d9b8 │ │ - stc2l 11, cr11, [r4, #388]! @ 0x184 @ │ │ + stc2l 11, cr11, [r4, #568]! @ 0x238 @ │ │ subeq r5, pc, r0, lsl #21 │ │ - stc2l 4, cr0, [r4, #376]! @ 0x178 │ │ + stc2l 4, cr0, [r4, #556]! @ 0x22c │ │ subseq r2, r1, r0, lsr #30 │ │ addseq sp, r5, r4, lsr r9 │ │ - stc2l 10, cr11, [r4, #836]! @ 0x344 @ │ │ + stc2l 10, cr11, [r4, #1016]! @ 0x3f8 @ │ │ strdeq r5, [pc], #-148 @ │ │ subseq r9, r0, r0, lsr #4 │ │ - stc2l 3, cr0, [r4, #504]! @ 0x1f8 │ │ + stc2l 3, cr0, [r4, #684]! @ 0x2ac │ │ subseq r2, r1, r0, asr #28 │ │ addseq sp, r5, ip, asr #16 │ │ - stc2l 3, cr4, [r4, #564]! @ 0x234 │ │ + stc2l 3, cr4, [r4, #744]! @ 0x2e8 │ │ ldr r5, [pc, #4072] @ 23fca64 │ │ cmp r4, #0 │ │ add r5, pc, r5 │ │ ble 23fbbe4 │ │ ldr r1, [pc, #4060] @ 23fca68 │ │ mov r0, #1 │ │ add r1, pc, r1 │ │ @@ -1232124,18 +1232123,18 @@ │ │ ldr r0, [pc, #3948] @ 23fcb58 │ │ mov r2, #40 @ 0x28 │ │ ldr r1, [pc, #3944] @ 23fcb5c │ │ mov r3, #15 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ b 23f82ac │ │ - stc2l 2, cr0, [r4, #968]! @ 0x3c8 │ │ + stc2l 3, cr0, [r4, #124]! @ 0x7c │ │ ldrheq r2, [r1], #-212 @ 0xffffff2c │ │ addseq sp, r5, r8, asr #15 │ │ - stc2l 2, cr4, [r4, #1012]! @ 0x3f4 │ │ + stc2l 3, cr4, [r4, #168]! @ 0xa8 │ │ ldr r1, [pc, #4084] @ 23fcc0c │ │ ldr r1, [pc, r1] │ │ ldr r2, [pc, #4080] @ 23fcc10 │ │ cmp r1, #2 │ │ add r0, r1, #1 │ │ add r2, pc, r2 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ @@ -1232158,15 +1232157,15 @@ │ │ add r1, sp, #60 @ 0x3c │ │ mov r2, #40 @ 0x28 │ │ mov r3, #40 @ 0x28 │ │ add r0, pc, r0 │ │ b 23f82ac │ │ subeq pc, pc, r8, asr #9 │ │ ldrsheq r9, [r0], #-12 │ │ - stc2l 2, cr0, [r4, #328]! @ 0x148 │ │ + stc2l 2, cr0, [r4, #508]! @ 0x1fc │ │ subseq r2, r1, r0, lsl sp │ │ ldr r0, [pc, #4056] @ 23fcc70 │ │ ldr r2, [fp, #32] │ │ ldr r0, [pc, r0] │ │ cmp r0, #0 │ │ bne 23fbcc0 │ │ ldr r0, [pc, #4040] @ 23fcc74 │ │ @@ -1232183,32 +1232182,32 @@ │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 23fc86c │ │ ldr r0, [pc, #3992] @ 23fcc7c │ │ add r0, pc, r0 │ │ b 23fe1a8 │ │ @ instruction: 0x00509094 │ │ - stc2l 1, cr0, [r4, #984]! @ 0x3d8 │ │ + stc2l 2, cr0, [r4, #140]! @ 0x8c │ │ ldr r0, [pc, #3976] @ 23fcc80 │ │ ldr r0, [pc, r0] │ │ cmp r0, #1 │ │ blt 23fca1c │ │ ldr r5, [pc, #3964] @ 23fcc84 │ │ sub r6, fp, #68 @ 0x44 │ │ ldr r4, [pc, #3960] @ 23fcc88 │ │ mov r1, #1 │ │ ldr r7, [sp, #8] │ │ add r5, pc, r5 │ │ add r4, pc, r4 │ │ b 23fbd60 │ │ ldrheq r2, [r1], #-196 @ 0xffffff3c │ │ @ instruction: 0x0095d6b8 │ │ - stc2l 1, cr0, [r4, #576]! @ 0x240 │ │ + stc2l 1, cr0, [r4, #756]! @ 0x2f4 │ │ rsbeq r9, r9, r8, asr #12 │ │ - stc2l 9, cr9, [r4, #436]! @ 0x1b4 @ │ │ + stc2l 10, cr9, [r4, #28]! @ │ │ ldr r1, [pc, #3920] @ 23fcc8c │ │ add r1, pc, r1 │ │ ldr r0, [r1, r0, lsl #2] │ │ cmp r0, #0 │ │ ble 23fbfb4 │ │ ldr r1, [sp, #4] │ │ ldr sl, [pc, #3900] @ 23fcc90 │ │ @@ -1232243,18 +1232242,18 @@ │ │ ldr r0, [pc, #3796] @ 23fcc9c │ │ mov r1, sl │ │ mov r2, r4 │ │ mov r3, #2048 @ 0x800 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ b 23fbd34 │ │ - stc2l 11, cr7, [r4, #724]! @ 0x2d4 @ │ │ - stc2l 14, cr9, [r3, #72]! @ 0x48 │ │ + stc2l 11, cr7, [r4, #904]! @ 0x388 @ │ │ + stc2l 14, cr9, [r3, #252]! @ 0xfc │ │ eorseq sp, r4, ip, lsl #12 │ │ - stc2l 1, cr4, [r4, #216]! @ 0xd8 │ │ + stc2l 1, cr4, [r4, #396]! @ 0x18c │ │ ldr r1, [pc, #3756] @ 23fcca0 │ │ add r1, pc, r1 │ │ str r8, [r1, r0, lsl #2] │ │ mov r0, r6 │ │ mov r1, r6 │ │ mov r2, r5 │ │ bl 270e030 │ │ @@ -1232293,17 +1232292,17 @@ │ │ ldr r0, [pc, #3612] @ 23fccac │ │ add r0, pc, r0 │ │ ldr r0, [r0, sl, lsl #2] │ │ cmp r9, r0 │ │ mov r0, sl │ │ beq 23fbdec │ │ b 23fbdf8 │ │ - stc2l 13, cr9, [r3, #316]! @ 0x13c │ │ + stc2l 13, cr9, [r3, #496]! @ 0x1f0 │ │ addeq r8, lr, r8, lsr r2 │ │ - stc2l 11, cr13, [r4, #380]! @ 0x17c @ │ │ + stc2l 11, cr13, [r4, #560]! @ 0x230 @ │ │ ldr r0, [pc, #3576] @ 23fccb0 │ │ mov r1, sl │ │ mov r2, r4 │ │ movw r3, #2028 @ 0x7ec │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3556] @ 23fccb4 │ │ @@ -1232316,58 +1232315,58 @@ │ │ ldr r0, [pc, #3532] @ 23fccb8 │ │ mov r2, r4 │ │ movw r3, #2029 @ 0x7ed │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ b 23fbdec │ │ addseq r2, r6, r5, lsr r3 │ │ - stc2l 15, cr15, [r3, #856]! @ 0x358 │ │ - stc2l 15, cr15, [r3, #640]! @ 0x280 │ │ + stc2l 0, cr0, [r4, #12]! │ │ + stc2l 15, cr15, [r3, #820]! @ 0x334 │ │ subseq r2, r1, ip, asr sl │ │ rsbeq r9, r9, r0, asr r4 │ │ eorseq sp, r4, r8, asr #9 │ │ eorseq sp, r4, r8, asr #9 │ │ addseq sp, r5, r4, asr #8 │ │ sbcseq r3, sl, r8, lsr r0 │ │ - stc2l 4, cr10, [r2, #460]! @ 0x1cc │ │ + stc2l 4, cr10, [r2, #640]! @ 0x280 │ │ @ instruction: 0x00508d9c │ │ @ instruction: 0x0095d3f8 │ │ - stc2l 4, cr10, [r2, #188]! @ 0xbc │ │ + stc2l 4, cr10, [r2, #368]! @ 0x170 │ │ subseq r8, r0, r8, asr sp │ │ eorseq sp, r4, r4, asr #7 │ │ - stc2l 4, cr0, [r2, #316]! @ 0x13c │ │ - stc2l 0, cr2, [r2, #248]! @ 0xf8 │ │ + stc2l 4, cr0, [r2, #496]! @ 0x1f0 │ │ + stc2l 0, cr2, [r2, #428]! @ 0x1ac │ │ sbcseq lr, r9, r8, lsr r1 │ │ addseq sp, r5, r4, asr #6 │ │ - stc2l 3, cr10, [r2, #492]! @ 0x1ec │ │ + stc2l 3, cr10, [r2, #672]! @ 0x2a0 │ │ subseq r8, r0, r4, lsr #25 │ │ ldrheq sp, [r0], #-168 @ 0xffffff58 │ │ subseq sp, r0, r4, lsl #21 │ │ - stc2l 10, cr9, [r3, #588]! @ 0x24c @ │ │ + stc2l 10, cr9, [r3, #768]! @ 0x300 @ │ │ addseq sp, r5, r8, lsl #5 │ │ addeq r7, lr, ip, ror pc │ │ - stc2l 3, cr15, [r4, #128]! @ 0x80 │ │ + stc2l 3, cr15, [r4, #308]! @ 0x134 │ │ subseq sp, r0, r8, lsl #20 │ │ ldrsheq sp, [r0], #-148 @ 0xffffff6c │ │ sbcseq r2, sl, r8, lsr #28 │ │ - stc2l 5, cr9, [r4, #696]! @ 0x2b8 │ │ - stc2l 1, cr6, [r2, #380]! @ 0x17c │ │ + stc2l 5, cr9, [r4, #876]! @ 0x36c │ │ + stc2l 1, cr6, [r2, #560]! @ 0x230 │ │ sbcseq r9, r9, r0, lsr r1 │ │ stc2l 6, cr1, [r5, #28]! │ │ subeq r5, pc, r8, lsr #4 │ │ stc2l 5, cr1, [r5, #876]! @ 0x36c │ │ smullseq r8, r6, r8, r3 │ │ ldrdeq r5, [pc], #-24 @ │ │ stc2l 0, cr3, [r5, #428]! @ 0x1ac │ │ sbcseq r3, r6, r0, lsr r5 │ │ stc2l 0, cr3, [r5, #188]! @ 0xbc │ │ ldrsheq r3, [r6], #76 @ 0x4c │ │ subeq r5, pc, r8, ror #2 │ │ - stc2l 6, cr13, [r4, #640]! @ 0x280 │ │ - stc2l 13, cr1, [r2, #216]! @ 0xd8 │ │ + stc2l 6, cr13, [r4, #820]! @ 0x334 │ │ + stc2l 13, cr1, [r2, #396]! @ 0x18c │ │ addseq sp, r5, r4, asr r0 │ │ ldr r0, [pc, #3988] @ 23fcf50 │ │ ldr r0, [pc, r0] │ │ ldr r1, [sp, #4] │ │ cmp r1, r0 │ │ beq 23fc66c │ │ sub r1, r0, #1 │ │ @@ -1232623,42 +1232622,42 @@ │ │ movw r1, #5000 @ 0x1388 │ │ cmp sl, r1 │ │ bcs 23fc454 │ │ str r8, [r0, sl, lsl #2] │ │ mov r8, sl │ │ str sl, [fp, #-56] @ 0xffffffc8 │ │ b 23fc494 │ │ - stc2l 6, cr13, [r4, #368]! @ 0x170 │ │ - stc2l 12, cr1, [r2, #1000]! @ 0x3e8 │ │ + stc2l 6, cr13, [r4, #548]! @ 0x224 │ │ + stc2l 13, cr1, [r2, #156]! @ 0x9c │ │ addseq sp, r5, r8, lsl r0 │ │ subeq r5, pc, r8, ror #1 │ │ sbcseq sp, r9, r4, asr #27 │ │ - stc2l 12, cr1, [r2, #584]! @ 0x248 │ │ + stc2l 12, cr1, [r2, #764]! @ 0x2fc │ │ sbcseq sp, r9, ip, lsl #27 │ │ subeq r5, pc, r8, ror r0 @ │ │ - stc2l 14, cr3, [r3, #592]! @ 0x250 │ │ - stc2l 14, cr3, [r3, #416]! @ 0x1a0 │ │ + stc2l 14, cr3, [r3, #772]! @ 0x304 │ │ + stc2l 14, cr3, [r3, #596]! @ 0x254 │ │ sbcseq r2, r3, r8, asr r6 │ │ eorseq ip, r4, r4, lsl #31 │ │ strdeq r4, [pc], #-244 @ │ │ addseq ip, r5, r4, lsl #30 │ │ @ instruction: 0x0095cef4 │ │ subeq r4, pc, r8, asr #31 │ │ eorseq ip, r4, ip, lsl #30 │ │ - stc2l 15, cr15, [r1, #604]! @ 0x25c │ │ + stc2l 15, cr15, [r1, #784]! @ 0x310 │ │ sbcseq r2, sl, ip, asr #21 │ │ addseq ip, r5, r4, lsr #29 │ │ - stc2l 11, cr1, [r2, #488]! @ 0x1e8 @ │ │ + stc2l 11, cr1, [r2, #668]! @ 0x29c @ │ │ rsceq r5, r6, ip, asr #31 │ │ strhteq r5, [r6], #240 @ 0xf0 │ │ rsceq r5, r6, r4, lsr #31 │ │ addseq r1, r6, ip, ror ip │ │ addseq ip, r5, r4, asr #28 │ │ sbcseq sp, r9, r4, lsl ip │ │ - stc2l 10, cr1, [r2, #760]! @ 0x2f8 @ │ │ + stc2l 10, cr1, [r2, #940]! @ 0x3ac @ │ │ @ instruction: 0x0095cdd0 │ │ sbcseq sp, r9, r8, lsr #23 │ │ sbcseq sp, r9, r0, lsl #23 │ │ addseq ip, r5, ip, lsl #27 │ │ eorseq ip, r4, r8, asr #27 │ │ eorseq ip, r4, r8, asr #27 │ │ mov r9, r0 │ │ @@ -1232871,15 +1232870,15 @@ │ │ movw r3, #2091 @ 0x82b │ │ bl 270d9c0 │ │ mov r7, r0 │ │ b 23fc6c4 │ │ ldr r0, [pc, #3380] @ 23fd4dc │ │ add r0, pc, r0 │ │ b 23fe1a8 │ │ - stc2l 14, cr10, [r4, #4]! │ │ + stc2l 14, cr10, [r4, #184]! @ 0xb8 │ │ subeq r4, pc, r0, lsr #26 │ │ addseq ip, r5, ip, lsl ip │ │ ldr r0, [fp, #28] │ │ mov r4, #0 │ │ str r4, [r0] │ │ ldr r0, [pc, #3348] @ 23fd4e0 │ │ ldr r0, [pc, r0] │ │ @@ -1232915,15 +1232914,15 @@ │ │ ldr r0, [pc, #4048] @ 23fd818 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4036] @ 23fd81c │ │ add r0, pc, r0 │ │ b 23fe1a8 │ │ - stc2l 6, cr3, [r4, #1012]! @ 0x3f4 │ │ + stc2l 7, cr3, [r4, #168]! @ 0xa8 │ │ subeq lr, pc, r4, asr #17 │ │ addseq ip, r5, r0, lsl #23 │ │ subeq lr, pc, ip, ror r8 @ │ │ ldr r1, [pc, #4012] @ 23fd820 │ │ mov r0, r4 │ │ ldr r2, [pc, #4008] @ 23fd824 │ │ add r1, pc, r1 │ │ @@ -1232953,20 +1232952,20 @@ │ │ add sl, pc, sl │ │ add r9, pc, r9 │ │ b 23fc928 │ │ ldrheq r8, [r0], #-68 @ 0xffffffbc │ │ @ instruction: 0x00508490 │ │ @ instruction: 0x0095caf0 │ │ @ instruction: 0x0095cab8 │ │ - stc2l 7, cr1, [r2, #584]! @ 0x248 │ │ - stc2l 11, cr14, [r4, #240]! @ 0xf0 @ │ │ + stc2l 7, cr1, [r2, #764]! @ 0x2fc │ │ + stc2l 11, cr14, [r4, #420]! @ 0x1a4 @ │ │ subseq sp, r0, r4, lsr #4 │ │ smlaleq r5, r6, ip, fp │ │ addseq ip, r5, r0, asr sl │ │ - stc2l 7, cr1, [r2, #152]! @ 0x98 │ │ + stc2l 7, cr1, [r2, #332]! @ 0x14c │ │ addseq ip, r5, ip, lsr sl │ │ ldr r0, [fp, #-56] @ 0xffffffc8 │ │ add r1, r4, #1 │ │ str r8, [sl, r5, lsl #2] │ │ cmp r4, r0 │ │ mov r4, r1 │ │ bge 23fca30 │ │ @@ -1233031,15 +1233030,15 @@ │ │ strb r2, [r1] │ │ b 23fe1a8 │ │ @ instruction: 0x0095c9f8 │ │ str r0, [fp, #-56] @ 0xffffffc8 │ │ ldr r0, [pc, #4000] @ 23fd9c8 │ │ add r0, pc, r0 │ │ b 23fe1a8 │ │ - stc2l 10, cr9, [r2, #188]! @ 0xbc @ │ │ + stc2l 10, cr9, [r2, #368]! @ 0x170 @ │ │ ldr r0, [pc, #3988] @ 23fd9cc │ │ ldr r0, [pc, r0] │ │ cmp r0, #1 │ │ blt 23fd05c │ │ ldr r9, [pc, #3976] @ 23fd9d0 │ │ movw r5, #34464 @ 0x86a0 │ │ ldr r4, [pc, #3972] @ 23fd9d4 │ │ @@ -1233048,18 +1233047,18 @@ │ │ mov r1, #1 │ │ add r4, pc, r4 │ │ movt r5, #1 │ │ b 23fcab4 │ │ smullseq r2, sl, ip, r5 │ │ subeq r4, pc, ip, asr sl @ │ │ addseq ip, r5, r8, ror r9 │ │ - stc2l 9, cr9, [r2, #342]! @ 0x156 @ │ │ + stc2l 9, cr9, [r2, #432]! @ 0x1b0 @ │ │ ldrsbeq r8, [r0], #-36 @ 0xffffffdc │ │ addseq ip, r5, r0, lsr r9 │ │ - stc2l 9, cr9, [r2, #206]! @ 0xce @ │ │ + stc2l 9, cr9, [r2, #296]! @ 0x128 @ │ │ subseq r8, r0, ip, lsl #5 │ │ addseq ip, r5, r4, ror #17 │ │ ldr r1, [pc, #3912] @ 23fd9d8 │ │ add r1, pc, r1 │ │ ldr r0, [r1, r0, lsl #2] │ │ cmp r0, #0 │ │ ble 23fccbc │ │ @@ -1233098,24 +1233097,24 @@ │ │ mov r1, sl │ │ ldr r2, [pc, #3784] @ 23fd9f0 │ │ movw r3, #1565 @ 0x61d │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ b 23fca88 │ │ - stc2l 10, cr10, [r4, #548]! @ 0x224 @ │ │ + stc2l 10, cr10, [r4, #728]! @ 0x2d8 @ │ │ subeq r4, pc, r8, lsr #19 │ │ umullseq ip, r5, r4, r8 │ │ - stc2l 3, cr3, [r4, #836]! @ 0x344 │ │ + stc2l 3, cr3, [r4, #1016]! @ 0x3f8 │ │ umaaleq lr, pc, r8, r5 @ │ │ sbcseq r2, sl, r8, asr r4 │ │ eorseq ip, r4, r0, ror r8 │ │ - stc2l 5, cr5, [r3, #296]! @ 0x128 │ │ + stc2l 5, cr5, [r3, #476]! @ 0x1dc │ │ eorseq ip, r4, r0, asr r8 │ │ - stc2l 3, cr7, [r2, #196]! @ 0xc4 │ │ + stc2l 3, cr7, [r2, #376]! @ 0x178 │ │ ldr r1, [pc, #3724] @ 23fd9f4 │ │ add r1, pc, r1 │ │ str r6, [r1, r0, lsl #2] │ │ cmp r6, #0 │ │ str r6, [fp, #-68] @ 0xffffffbc │ │ ble 23fcb04 │ │ mov r0, r7 │ │ @@ -1233153,15 +1233152,15 @@ │ │ ldr r0, [r0, sl, lsl #2] │ │ cmp r8, r0 │ │ mov r0, sl │ │ beq 23fcb60 │ │ b 23fcb6c │ │ rsceq r5, r6, ip, lsr r9 │ │ rsceq r5, r6, ip, lsr #18 │ │ - stc2l 2, cr15, [r3, #904]! @ 0x388 │ │ + stc2l 3, cr15, [r3, #60]! @ 0x3c │ │ ldr r0, [pc, #3556] @ 23fda04 │ │ mov r1, sl │ │ ldr r2, [pc, #3552] @ 23fda08 │ │ movw r3, #1547 @ 0x60b │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1233179,30 +1233178,30 @@ │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ b 23fcb60 │ │ eorseq ip, r4, ip, asr #15 │ │ subeq r4, pc, r4, asr r8 @ │ │ ldrhteq ip, [r4], -ip │ │ sbcseq r2, sl, r4, ror #6 │ │ - stc2l 2, cr9, [r1, #132]! @ 0x84 │ │ + stc2l 2, cr9, [r1, #312]! @ 0x138 │ │ strdeq r4, [pc], #-124 @ │ │ sbcseq r2, sl, r4, lsl #6 │ │ - stc2l 10, cr8, [r4, #536]! @ 0x218 @ │ │ + stc2l 10, cr8, [r4, #716]! @ 0x2cc @ │ │ subseq r8, r0, r8, rrx │ │ umaaleq r4, pc, ip, r7 @ │ │ - stc2l 6, cr9, [r2, #876]! @ 0x36c │ │ + stc2l 7, cr9, [r2, #32]! │ │ subseq r8, r0, r8 │ │ - stc2l 6, cr9, [r2, #604]! @ 0x25c │ │ + stc2l 6, cr9, [r2, #784]! @ 0x310 │ │ ldrheq r7, [r0], #-240 @ 0xffffff10 │ │ - stc2l 13, cr8, [r3, #732]! @ 0x2dc │ │ + stc2l 13, cr8, [r3, #912]! @ 0x390 │ │ addeq r7, lr, r8, lsr #5 │ │ subseq r7, r0, r4, lsl pc │ │ - stc2l 5, cr9, [r2, #668]! @ 0x29c │ │ + stc2l 5, cr9, [r2, #848]! @ 0x350 │ │ ldrsbeq r7, [r0], #-228 @ 0xffffff1c │ │ - stc2l 5, cr9, [r2, #476]! @ 0x1dc │ │ + stc2l 5, cr9, [r2, #656]! @ 0x290 │ │ ldr r0, [pc, #3412] @ 23fda18 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ bcc 23fccf0 │ │ ldr r0, [pc, #3392] @ 23fda1c │ │ @@ -1233394,17 +1233393,17 @@ │ │ str r0, [r2, r1, lsl #2] │ │ ldr r0, [pc, #3916] @ 23fdf14 │ │ ldr r1, [pc, #3916] @ 23fdf18 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ strb r4, [r1] │ │ b 23fe1a8 │ │ - stc2l 15, cr2, [r4, #524]! @ 0x20c │ │ + stc2l 15, cr2, [r4, #704]! @ 0x2c0 │ │ @ instruction: 0x0094d9b0 │ │ - stc2l 15, cr2, [r4, #284]! @ 0x11c │ │ + stc2l 15, cr2, [r4, #464]! @ 0x1d0 │ │ addseq sp, r4, ip, ror r9 │ │ strheq r4, [pc], #-72 @ │ │ ldr r1, [pc, #3880] @ 23fdf1c │ │ movw r0, #5000 @ 0x1388 │ │ ldr r1, [pc, r1] │ │ cmp r1, r0 │ │ bne 23fd05c │ │ @@ -1233421,20 +1233420,20 @@ │ │ add r1, pc, r1 │ │ bl 270da90 │ │ ldr r0, [pc, #4084] @ 23fe02c │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 23fbcdc │ │ - stc2l 10, cr10, [r3, #260]! @ 0x104 @ │ │ + stc2l 10, cr10, [r3, #440]! @ 0x1b8 @ │ │ addseq r7, r5, ip, ror r5 │ │ - stc2l 10, cr10, [r3, #20]! @ │ │ + stc2l 10, cr10, [r3, #200]! @ 0xc8 @ │ │ addseq r7, r5, r8, asr #10 │ │ subeq r4, pc, r4, asr #8 │ │ - stc2l 3, cr9, [r2, #644]! @ 0x284 │ │ + stc2l 3, cr9, [r2, #824]! @ 0x338 │ │ ldr r4, [pc, #4044] @ 23fe030 │ │ ldr r4, [pc, r4] │ │ bl 270dda0 │ │ sub r0, r0, #1 │ │ cmp r4, r0 │ │ bge 23fd0dc │ │ ldr r8, [pc, #4024] @ 23fe034 │ │ @@ -1233458,15 +1233457,15 @@ │ │ bhi 23fd350 │ │ ldr r0, [pc, #3964] @ 23fe044 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ add r0, pc, r0 │ │ str r5, [r0, r1, lsl #2] │ │ b 23fd3b4 │ │ addeq r2, lr, r8, lsl #4 │ │ - stc2l 3, cr9, [r2, #404]! @ 0x194 │ │ + stc2l 3, cr9, [r2, #584]! @ 0x248 │ │ ldr r0, [pc, #3940] @ 23fe048 │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-56] @ 0xffffffc8 │ │ cmp r0, #1 │ │ blt 23fd3cc │ │ ldr r9, [pc, #3924] @ 23fe04c │ │ mov r8, #1 │ │ @@ -1233475,22 +1233474,22 @@ │ │ add r9, pc, r9 │ │ add r5, pc, r5 │ │ add r4, pc, r4 │ │ mov r6, r5 │ │ b 23fd1e0 │ │ ldrdeq r2, [lr], r4 │ │ ldrdeq r4, [pc], #-48 @ │ │ - stc2l 13, cr14, [r3, #832]! @ 0x340 │ │ + stc2l 13, cr14, [r3, #1012]! @ 0x3f4 │ │ addseq r8, r4, r4, lsr sl │ │ - stc2l 13, cr14, [r3, #592]! @ 0x250 │ │ + stc2l 13, cr14, [r3, #772]! @ 0x304 │ │ addseq r8, r4, r0, lsl #20 │ │ subeq r4, pc, ip, asr r3 @ │ │ - stc2l 2, cr9, [r2, #716]! @ 0x2cc │ │ + stc2l 2, cr9, [r2, #896]! @ 0x380 │ │ ldrsbeq r7, [r0], #-184 @ 0xffffff48 │ │ - stc2l 2, cr9, [r2, #476]! @ 0x1dc │ │ + stc2l 2, cr9, [r2, #656]! @ 0x290 │ │ subseq r7, r0, r4, lsr #23 │ │ subeq r4, pc, r8, ror #5 │ │ ldr r7, [pc, #3852] @ 23fe058 │ │ mov r1, sl │ │ ldr r2, [pc, #3848] @ 23fe05c │ │ movw r3, #1667 @ 0x683 │ │ add r7, pc, r7 │ │ @@ -1233538,20 +1233537,20 @@ │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270de00 │ │ bic r4, r0, r0, asr #31 │ │ mov r0, sl │ │ mov r7, r5 │ │ b 23fd28c │ │ - stc2l 3, cr10, [r4, #692]! @ 0x2b4 │ │ + stc2l 3, cr10, [r4, #872]! @ 0x368 │ │ subeq r4, pc, ip, asr #5 │ │ - stc2l 3, cr10, [r4, #436]! @ 0x1b4 │ │ + stc2l 3, cr10, [r4, #616]! @ 0x268 │ │ umaaleq r4, pc, r4, r2 @ │ │ subeq r4, pc, ip, ror #4 │ │ - stc2l 12, cr2, [r4, #804]! @ 0x324 │ │ + stc2l 12, cr2, [r4, #984]! @ 0x3d8 │ │ umaaleq sp, pc, r0, lr @ │ │ ldr r0, [pc, #3984] @ 23fe1cc │ │ mov r1, sl │ │ mov r2, r4 │ │ movw r3, #1643 @ 0x66b │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1233586,15 +1233585,15 @@ │ │ ldr r4, [pc, #4064] @ 23fe2a4 │ │ add r1, pc, r1 │ │ add r4, pc, r4 │ │ bgt 23fd1c0 │ │ mov r0, #0 │ │ str r0, [r9] │ │ b 23fd334 │ │ - stc2l 12, cr2, [r4, #548]! @ 0x224 │ │ + stc2l 12, cr2, [r4, #728]! @ 0x2d8 │ │ subeq sp, pc, r8, asr lr @ │ │ strdeq r4, [pc], #-16 @ │ │ stc2l 0, cr2, [r5, #508]! @ 0x1fc │ │ sbcseq r2, r6, r4, asr #10 │ │ mov r0, r7 │ │ ldr r7, [pc, #4016] @ 23fe2a8 │ │ mov r1, sl │ │ @@ -1233614,15 +1233613,15 @@ │ │ mov r0, #0 │ │ mov r4, r7 │ │ str r0, [r5, sl, lsl #2] │ │ b 23fd1c4 │ │ stc2l 0, cr2, [r5, #268]! @ 0x10c │ │ sbcseq r2, r6, r0, lsl r5 │ │ subeq r4, pc, ip, ror r1 @ │ │ - stc2l 0, cr5, [r2, #364]! @ 0x16c │ │ + stc2l 0, cr5, [r2, #544]! @ 0x220 │ │ sbcseq r8, r9, r0, lsr r0 │ │ ldr r0, [pc, #3928] @ 23fe2b0 │ │ movw r3, #1711 @ 0x6af │ │ ldr r2, [pc, #3924] @ 23fe2b4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1233681,49 +1233680,49 @@ │ │ bl 270d9c0 │ │ ldr r1, [fp, #-56] @ 0xffffffc8 │ │ mov r2, r0 │ │ b 23fd40c │ │ ldr r0, [pc, #3984] @ 23fe3e0 │ │ add r0, pc, r0 │ │ b 23fe1a8 │ │ - stc2l 15, cr4, [r2, #556]! @ 0x22c │ │ + stc2l 15, cr4, [r2, #736]! @ 0x2e0 │ │ ldr r6, [pc, #3972] @ 23fe3e4 │ │ add r6, pc, r6 │ │ mov r8, r6 │ │ b 23fd08c │ │ stc2l 4, cr0, [r5, #220]! @ 0xdc │ │ subeq r4, pc, r8, asr r0 @ │ │ stc2l 4, cr0, [r5, #28]! │ │ sbcseq r7, r6, r4, asr #3 │ │ subeq r4, pc, r4 │ │ - stc2l 5, cr12, [r4, #224]! @ 0xe0 │ │ + stc2l 5, cr12, [r4, #404]! @ 0x194 │ │ @ instruction: 0x0095bef4 │ │ - stc2l 4, cr12, [r4, #1008]! @ 0x3f0 │ │ + stc2l 5, cr12, [r4, #164]! @ 0xa4 │ │ addseq fp, r5, r0, asr #29 │ │ umaaleq r3, pc, r0, pc @ │ │ - stc2l 11, cr0, [r2, #440]! @ 0x1b8 @ │ │ + stc2l 11, cr0, [r2, #620]! @ 0x26c @ │ │ sbcseq ip, r9, r4, ror #24 │ │ - stc2l 11, cr0, [r2, #200]! @ 0xc8 @ │ │ + stc2l 11, cr0, [r2, #380]! @ 0x17c @ │ │ sbcseq ip, r9, r0, lsr ip │ │ subeq r3, pc, ip, lsl pc @ │ │ - stc2l 13, cr2, [r3, #208]! @ 0xd0 │ │ - stc2l 13, cr2, [r3, #16]! │ │ + stc2l 13, cr2, [r3, #388]! @ 0x184 │ │ + stc2l 13, cr2, [r3, #196]! @ 0xc4 │ │ ldrsheq r1, [r3], #68 @ 0x44 │ │ eorseq fp, r4, r0, lsr #28 │ │ umaaleq r3, pc, r0, lr @ │ │ subeq r3, pc, r0, lsl #29 │ │ - stc2l 3, cr12, [r4, #656]! @ 0x290 │ │ - stc2l 0, cr8, [r4, #1000]! @ 0x3e8 │ │ - stc2l 13, cr4, [r2, #268]! @ 0x10c │ │ + stc2l 3, cr12, [r4, #836]! @ 0x344 │ │ + stc2l 1, cr8, [r4, #156]! @ 0x9c │ │ + stc2l 13, cr4, [r2, #448]! @ 0x1c0 │ │ addseq fp, r5, ip, asr #26 │ │ addseq fp, r5, r4, lsr #26 │ │ ldrsbeq r7, [r9], #192 @ 0xc0 │ │ @ instruction: 0x0095bcd0 │ │ sbcseq r7, r9, ip, ror #24 │ │ - stc2l 13, cr14, [r1, #164]! @ 0xa4 │ │ + stc2l 13, cr14, [r1, #344]! @ 0x158 │ │ addseq fp, r5, r8, asr #24 │ │ mvn r1, #1 │ │ movw r2, #3392 @ 0xd40 │ │ add r1, r1, r0, lsl #1 │ │ movt r2, #3 │ │ cmp r1, r2 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ @@ -1233906,45 +1233905,45 @@ │ │ bhi 23fdd70 │ │ ldr r0, [pc, #4008] @ 23fe770 │ │ add r0, pc, r0 │ │ add r0, r0, r1, lsl #3 │ │ vstr d9, [r0] │ │ b 23fddcc │ │ addseq fp, r5, r0, lsr #24 │ │ - stc2l 11, cr0, [r3, #192]! @ 0xc0 @ │ │ + stc2l 11, cr0, [r3, #372]! @ 0x174 @ │ │ sub r1, r2, #1 │ │ movw r0, #4999 @ 0x1387 │ │ cmp r1, r0 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ bhi 23fd854 │ │ ldr r0, [pc, #4060] @ 23fe7d4 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ add r0, pc, r0 │ │ ldr r5, [fp, #28] │ │ ldr r0, [r0, r1, lsl #2] │ │ str r0, [r9] │ │ b 23fd8b8 │ │ - stc2l 13, cr8, [r2, #48]! @ 0x30 │ │ - stc2l 15, cr7, [r4, #516]! @ 0x204 │ │ + stc2l 13, cr8, [r2, #228]! @ 0xe4 │ │ + stc2l 15, cr7, [r4, #696]! @ 0x2b8 │ │ stc2l 7, cr3, [r5, #520]! @ 0x208 │ │ - stc2l 13, cr9, [r4, #584]! @ 0x248 │ │ + stc2l 13, cr9, [r4, #764]! @ 0x2fc │ │ stc2l 0, cr0, [r5, #456]! @ 0x1c8 │ │ subeq r3, pc, r4, ror ip @ │ │ subseq ip, r0, r8, asr #6 │ │ addseq fp, r5, r0, lsl #23 │ │ subeq r3, pc, r4, asr #24 │ │ subeq r3, pc, r0, asr #24 │ │ addseq fp, r5, ip, asr #22 │ │ @ instruction: 0x00951ef0 │ │ - stc2l 14, cr7, [r4, #776]! @ 0x308 │ │ - stc2l 11, cr13, [r4, #544]! @ 0x220 @ │ │ + stc2l 14, cr7, [r4, #956]! @ 0x3bc │ │ + stc2l 11, cr13, [r4, #724]! @ 0x2d4 @ │ │ subseq ip, r0, ip, ror #4 │ │ - stc2l 11, cr13, [r4, #336]! @ 0x150 @ │ │ + stc2l 11, cr13, [r4, #516]! @ 0x204 @ │ │ subseq ip, r0, ip, lsr r2 │ │ - stc2l 0, cr10, [r3, #940]! @ 0x3ac │ │ + stc2l 1, cr10, [r3, #96]! @ 0x60 │ │ ldr r0, [pc, #3964] @ 23fe7d8 │ │ mov r3, #2992 @ 0xbb0 │ │ ldr r2, [pc, #3960] @ 23fe7dc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3948] @ 23fe7e0 │ │ @@ -1234025,45 +1234024,45 @@ │ │ add r1, pc, r1 │ │ mov r2, #40 @ 0x28 │ │ mov r3, #10 │ │ bl 270d970 │ │ ldr r0, [pc, #3972] @ 23fe934 │ │ add r0, pc, r0 │ │ b 23fe1a8 │ │ - stc2l 0, cr10, [r3, #796]! @ 0x31c │ │ + stc2l 0, cr10, [r3, #976]! @ 0x3d0 │ │ eorseq fp, r4, r4, asr sl │ │ - stc2l 2, cr8, [r3, #188]! @ 0xbc │ │ + stc2l 2, cr8, [r3, #368]! @ 0x170 │ │ addseq r0, r6, ip, lsr #16 │ │ - stc2l 13, cr7, [r4, #612]! @ 0x264 │ │ - stc2l 10, cr14, [r1, #676]! @ 0x2a4 @ │ │ + stc2l 13, cr7, [r4, #792]! @ 0x318 │ │ + stc2l 10, cr14, [r1, #856]! @ 0x358 @ │ │ strheq r3, [pc], #-172 @ │ │ sbcseq r1, sl, r8, asr #11 │ │ @ instruction: 0x008e66b0 │ │ subseq r7, r0, r4, lsl r3 │ │ subeq r3, pc, r8, asr #20 │ │ - stc2l 9, cr8, [r2, #270]! @ 0x10e @ │ │ - stc2l 12, cr7, [r4, #744]! @ 0x2e8 │ │ + stc2l 9, cr8, [r2, #360]! @ 0x168 @ │ │ + stc2l 12, cr7, [r4, #924]! @ 0x39c │ │ ldrheq r7, [r0], #-32 @ 0xffffffe0 │ │ - stc2l 9, cr8, [r2, #126]! @ 0x7e @ │ │ - stc2l 12, cr7, [r4, #456]! @ 0x1c8 │ │ + stc2l 9, cr8, [r2, #216]! @ 0xd8 @ │ │ + stc2l 12, cr7, [r4, #636]! @ 0x27c │ │ subseq r7, r0, ip, lsr r2 │ │ - stc2l 0, cr8, [r3, #380]! @ 0x17c │ │ - stc2l 11, cr7, [r4, #968]! @ 0x3c8 @ │ │ + stc2l 0, cr8, [r3, #560]! @ 0x230 │ │ + stc2l 12, cr7, [r4, #124]! @ 0x7c │ │ subseq r7, r0, ip, lsr #3 │ │ - stc2l 8, cr8, [r2, #252]! @ 0xfc │ │ - stc2l 11, cr7, [r4, #456]! @ 0x1c8 @ │ │ + vcmla.f16 q12, q1, q14, #270 │ │ + stc2l 11, cr7, [r4, #636]! @ 0x27c @ │ │ subseq r7, r0, r8, ror #2 │ │ - vcmla.f16 d24, d2, d11, #270 │ │ - stc2l 11, cr7, [r4, #248]! @ 0xf8 @ │ │ + stc2l 8, cr8, [r2, #224]! @ 0xe0 │ │ + stc2l 11, cr7, [r4, #428]! @ 0x1ac @ │ │ subeq r3, pc, r0, lsr r8 @ │ │ - stc2l 2, cr2, [r4, #540]! @ 0x21c │ │ - stc2l 10, cr7, [r4, #744]! @ 0x2e8 @ │ │ + stc2l 2, cr2, [r4, #720]! @ 0x2d0 │ │ + stc2l 10, cr7, [r4, #924]! @ 0x39c @ │ │ @ instruction: 0x0094ccb0 │ │ - stc2l 2, cr2, [r4, #284]! @ 0x11c │ │ - stc2l 10, cr7, [r4, #488]! @ 0x1e8 @ │ │ + stc2l 2, cr2, [r4, #464]! @ 0x1d0 │ │ + stc2l 10, cr7, [r4, #668]! @ 0x29c @ │ │ mvn r1, #1 │ │ movw r2, #3392 @ 0xd40 │ │ add r1, r1, r0, lsl #1 │ │ movt r2, #3 │ │ cmp r1, r2 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ bcc 23fda6c │ │ @@ -1234248,30 +1234247,30 @@ │ │ ldr r0, [pc, #3988] @ 23fecb0 │ │ add r0, pc, r0 │ │ add r0, r0, r1, lsl #3 │ │ vstr d9, [r0] │ │ b 23fe330 │ │ addseq ip, r4, r8, ror ip │ │ strheq r3, [pc], #-116 @ │ │ - stc2l 13, cr9, [r3, #244]! @ 0xf4 │ │ - stc2l 10, cr7, [r4, #248]! @ 0xf8 @ │ │ + stc2l 13, cr9, [r3, #424]! @ 0x1a8 │ │ + stc2l 10, cr7, [r4, #428]! @ 0x1ac @ │ │ addseq r6, r5, r4, ror r8 │ │ - stc2l 12, cr9, [r3, #1012]! @ 0x3f4 │ │ - stc2l 9, cr7, [r4, #508]! @ 0x1fc @ │ │ + stc2l 13, cr9, [r3, #168]! @ 0xa8 │ │ + stc2l 10, cr7, [r4, #172]! @ 0xac @ │ │ addseq r6, r5, ip, lsr r8 │ │ subeq r3, pc, r8, lsr r7 @ │ │ - stc2l 6, cr8, [r2, #596]! @ 0x254 │ │ - stc2l 9, cr7, [r4, #388]! @ 0x184 @ │ │ + stc2l 6, cr8, [r2, #776]! @ 0x308 │ │ + stc2l 9, cr7, [r4, #478]! @ 0x1de @ │ │ strdeq r1, [lr], r8 │ │ - stc2l 6, cr8, [r2, #340]! @ 0x154 │ │ - stc2l 9, cr7, [r4, #260]! @ 0x104 @ │ │ + stc2l 6, cr8, [r2, #520]! @ 0x208 │ │ + stc2l 9, cr7, [r4, #350]! @ 0x15e @ │ │ addeq r1, lr, r0, asr #9 │ │ strheq r3, [pc], #-108 @ │ │ - stc2l 0, cr14, [r3, #752]! @ 0x2f0 │ │ - stc2l 9, cr7, [r4, #140]! @ 0x8c @ │ │ + stc2l 0, cr14, [r3, #932]! @ 0x3a4 │ │ + stc2l 9, cr7, [r4, #230]! @ 0xe6 @ │ │ ldr r0, [pc, #3900] @ 23fecb4 │ │ movw r3, #3464 @ 0xd88 │ │ ldr r2, [pc, #3896] @ 23fecb8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3884] @ 23fecbc │ │ @@ -1234326,20 +1234325,20 @@ │ │ ldr r4, [r9] │ │ ldr r0, [pc, #3720] @ 23fece0 │ │ add r0, pc, r0 │ │ add r0, r0, r1, lsl #3 │ │ vstr d8, [r0] │ │ b 23fdec4 │ │ addseq r7, r4, ip, lsl sp │ │ - stc2l 0, cr14, [r3, #496]! @ 0x1f0 │ │ - stc2l 9, cr7, [r4, #12]! @ │ │ + stc2l 0, cr14, [r3, #676]! @ 0x2a4 │ │ + stc2l 9, cr7, [r4, #102]! @ 0x66 @ │ │ addseq r7, r4, r4, ror #25 │ │ subeq r3, pc, r0, asr #12 │ │ - stc2l 5, cr8, [r2, #604]! @ 0x25c │ │ - vcmla.f16 , q10, q5, #270 │ │ + stc2l 5, cr8, [r2, #784]! @ 0x310 │ │ + stc2l 8, cr7, [r4, #988]! @ 0x3dc │ │ ldr r0, [pc, #3676] @ 23fece4 │ │ movw r3, #3465 @ 0xd89 │ │ ldr r2, [pc, #3672] @ 23fece8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r4, [r9] │ │ @@ -1234357,31 +1234356,31 @@ │ │ ldr r0, [pc, #3624] @ 23fecf8 │ │ add r5, pc, r5 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 23fdf90 │ │ ldrheq r6, [r0], #-232 @ 0xffffff18 │ │ - stc2l 5, cr8, [r2, #364]! @ 0x16c │ │ - vcmla.f16 d23, d20, d14, #270 │ │ + stc2l 5, cr8, [r2, #544]! @ 0x220 │ │ + stc2l 8, cr7, [r4, #748]! @ 0x2ec │ │ subseq r6, r0, ip, ror lr │ │ subeq r3, pc, r0, asr #11 │ │ strheq r3, [pc], #-84 @ │ │ - stc2l 10, cr11, [r4, #912]! @ 0x390 @ │ │ - stc2l 8, cr7, [r4, #232]! @ 0xe8 │ │ + stc2l 11, cr11, [r4, #68]! @ 0x44 @ │ │ + vcmla.f16 , q2, , #270 │ │ addseq fp, r5, r0, lsr #9 │ │ umullseq fp, r5, r0, r4 │ │ - stc2l 1, cr0, [r2, #312]! @ 0x138 │ │ - stc2l 7, cr7, [r4, #1000]! @ 0x3e8 │ │ + stc2l 1, cr0, [r2, #492]! @ 0x1ec │ │ + vcmla.f16 d23, d4, d23, #270 │ │ sbcseq ip, r9, r0, asr #4 │ │ stc2l 8, cr15, [r4, #1016]! @ 0x3f8 │ │ addseq r0, r6, r8, ror #4 │ │ strdeq r3, [pc], #-72 @ │ │ - stc2l 4, cr8, [r2, #396]! @ 0x18c │ │ - stc2l 14, cr5, [r2, #628]! @ 0x274 │ │ + stc2l 4, cr8, [r2, #576]! @ 0x240 │ │ + stc2l 14, cr5, [r2, #808]! @ 0x328 │ │ eorseq fp, r4, r8, asr #8 │ │ ldr r0, [pc, #3528] @ 23fecfc │ │ movw r3, #3471 @ 0xd8f │ │ ldr r2, [pc, #3524] @ 23fed00 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1234439,31 +1234438,31 @@ │ │ ldr r2, [pc, #3348] @ 23fed2c │ │ add r0, r0, r0, lsl #2 │ │ sub r3, r0, #5 │ │ str r3, [fp, #-56] @ 0xffffffc8 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ b 23fe0dc │ │ - stc2l 11, cr7, [r3, #852]! @ 0x354 @ │ │ + stc2l 12, cr7, [r3, #8]! │ │ umaaleq r3, pc, r4, r4 @ │ │ subeq r3, pc, ip, ror r4 @ │ │ subeq r3, pc, r8, ror #8 │ │ subeq r3, pc, r4, ror #8 │ │ subeq r3, pc, r8, asr r4 @ │ │ ldrsheq fp, [r0], #-172 @ 0xffffff54 │ │ subeq r3, pc, r0, lsl r4 @ │ │ addseq r7, r4, r8, lsl #21 │ │ addeq r1, lr, r4, ror #3 │ │ - stc2l 6, cr7, [r4, #600]! @ 0x258 │ │ - stc2l 13, cr13, [r3, #752]! @ 0x2f0 │ │ - stc2l 6, cr7, [r4, #280]! @ 0x118 │ │ + stc2l 6, cr7, [r4, #780]! @ 0x30c │ │ + stc2l 13, cr13, [r3, #932]! @ 0x3a4 │ │ + stc2l 6, cr7, [r4, #460]! @ 0x1cc │ │ addseq r7, r4, r8, lsl sl │ │ subeq r3, pc, r4, ror r3 @ │ │ addseq r1, r5, ip, asr #12 │ │ - stc2l 5, cr7, [r4, #1016]! @ 0x3f8 │ │ + stc2l 6, cr7, [r4, #172]! @ 0xac │ │ addseq r7, r4, ip, asr #19 │ │ ldr r0, [pc, #3252] @ 23fed30 │ │ movw r3, #3473 @ 0xd91 │ │ ldr r2, [pc, #3248] @ 23fed34 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1234543,18 +1234542,18 @@ │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ strdeq r3, [pc], #-32 @ │ │ addseq r1, r5, r8, asr #11 │ │ - stc2l 2, cr8, [r2, #164]! @ 0xa4 │ │ + stc2l 2, cr8, [r2, #344]! @ 0x158 │ │ umaaleq r3, pc, r0, r2 @ │ │ addseq r1, r5, r8, ror #10 │ │ - stc2l 1, cr8, [r2, #948]! @ 0x3b4 │ │ + stc2l 2, cr8, [r2, #104]! @ 0x68 │ │ ldr r0, [pc, #3196] @ 23fee60 │ │ add r3, sp, #16 │ │ ldr r1, [pc, #3192] @ 23fee64 │ │ ldr r2, [fp, #20] │ │ add r0, pc, r0 │ │ str r2, [sp] │ │ add r1, pc, r1 │ │ @@ -1234597,26 +1234596,26 @@ │ │ cmp r1, r0 │ │ bcs 23fe69c │ │ mov r0, r1 │ │ b 23fe6c0 │ │ subeq r3, pc, r4, asr #4 │ │ addseq r1, r5, ip, lsl r5 │ │ addseq r7, r4, r8, asr #17 │ │ - stc2l 4, cr7, [r4, #872]! @ 0x368 │ │ - stc2l 4, cr7, [r4, #648]! @ 0x288 │ │ - stc2l 1, cr8, [r2, #308]! @ 0x134 │ │ - stc2l 1, cr13, [r4, #448]! @ 0x1c0 │ │ - stc2l 4, cr7, [r4, #248]! @ 0xf8 │ │ + stc2l 5, cr7, [r4, #28]! │ │ + stc2l 4, cr7, [r4, #828]! @ 0x33c │ │ + stc2l 1, cr8, [r2, #488]! @ 0x1e8 │ │ + stc2l 1, cr13, [r4, #628]! @ 0x274 │ │ + stc2l 4, cr7, [r4, #428]! @ 0x1ac │ │ subseq fp, r0, r8, asr r8 │ │ subeq r3, pc, r4, ror r1 @ │ │ subeq r3, pc, r4, ror #2 │ │ - stc2l 6, cr9, [r3, #956]! @ 0x3bc │ │ - stc2l 3, cr7, [r4, #984]! @ 0x3d8 │ │ + stc2l 7, cr9, [r3, #112]! @ 0x70 │ │ + stc2l 4, cr7, [r4, #140]! @ 0x8c │ │ addseq r1, r5, ip, lsl #8 │ │ - stc2l 11, cr7, [r1, #260]! @ 0x104 @ │ │ + stc2l 11, cr7, [r1, #440]! @ 0x1b8 @ │ │ ldr r0, [pc, #2712] @ 23fed74 │ │ movw r3, #3971 @ 0xf83 │ │ ldr r2, [pc, #2708] @ 23fed78 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #2696] @ 23fed7c │ │ @@ -1234674,16 +1234673,16 @@ │ │ add r0, pc, r0 │ │ add r0, r0, r1, lsl #3 │ │ vstr d8, [r0] │ │ b 23fe430 │ │ subeq r3, pc, ip, lsl r1 @ │ │ @ instruction: 0x009513d4 │ │ strdeq r3, [pc], #-0 @ │ │ - stc2l 6, cr9, [r3, #588]! @ 0x24c │ │ - stc2l 3, cr7, [r4, #616]! @ 0x268 │ │ + stc2l 6, cr9, [r3, #768]! @ 0x300 │ │ + stc2l 3, cr7, [r4, #796]! @ 0x31c │ │ stc2l 4, cr15, [r4, #488]! @ 0x1e8 │ │ umaaleq r3, pc, r0, r0 @ │ │ ldr r0, [pc, #2484] @ 23feda4 │ │ movw r3, #3972 @ 0xf84 │ │ ldr r2, [pc, #2480] @ 23feda8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1234741,24 +1234740,24 @@ │ │ ldr r2, [pc, #2324] @ 23fede4 │ │ add r0, r0, r0, lsl #2 │ │ sub r3, r0, #5 │ │ str r3, [fp, #-56] @ 0xffffffc8 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ b 23fe574 │ │ - stc2l 10, cr13, [r3, #40]! @ 0x28 @ │ │ - stc2l 2, cr7, [r4, #568]! @ 0x238 │ │ + stc2l 10, cr13, [r3, #220]! @ 0xdc @ │ │ + stc2l 2, cr7, [r4, #748]! @ 0x2ec │ │ subseq r0, r1, r8, lsr #9 │ │ - stc2l 9, cr13, [r3, #384]! @ 0x180 @ │ │ - stc2l 2, cr7, [r4, #248]! @ 0xf8 │ │ + stc2l 9, cr13, [r3, #474]! @ 0x1da @ │ │ + stc2l 2, cr7, [r4, #428]! @ 0x1ac │ │ ldrshteq sl, [r4], -ip │ │ ldrshteq sl, [r4], -r8 │ │ rsbeq r6, r9, r0, ror #28 │ │ - stc2l 4, cr11, [r4, #588]! @ 0x24c │ │ - stc2l 1, cr7, [r4, #904]! @ 0x388 │ │ + stc2l 4, cr11, [r4, #768]! @ 0x300 │ │ + stc2l 2, cr7, [r4, #60]! @ 0x3c │ │ ldr r0, [pc, #2260] @ 23fede8 │ │ movw r3, #3979 @ 0xf8b │ │ ldr r2, [pc, #2256] @ 23fedec │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #2244] @ 23fedf0 │ │ @@ -1234797,21 +1234796,21 @@ │ │ bhi 23fe5e0 │ │ ldr r2, [pc, #2136] @ 23fee0c │ │ mov r0, #1 │ │ add r2, pc, r2 │ │ str r0, [r2, r1, lsl #2] │ │ b 23fe61c │ │ addseq pc, r5, sp, asr ip @ │ │ - stc2l 5, cr7, [r3, #1020]! @ 0x3fc │ │ - stc2l 1, cr7, [r4, #584]! @ 0x248 │ │ + stc2l 6, cr7, [r3, #176]! @ 0xb0 │ │ + stc2l 1, cr7, [r4, #764]! @ 0x2fc │ │ addeq r5, lr, ip, ror #21 │ │ @ instruction: 0x0095fbfc │ │ subseq r6, r0, r4, lsr r7 │ │ - stc2l 8, cr13, [r3, #600]! @ 0x258 │ │ - stc2l 1, cr7, [r4, #104]! @ 0x68 │ │ + vcmla.f16 , , , #270 │ │ + stc2l 1, cr7, [r4, #284]! @ 0x11c │ │ ldr r0, [pc, #2088] @ 23fee10 │ │ movw r3, #3983 @ 0xf8f │ │ ldr r2, [pc, #2084] @ 23fee14 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r2, [pc, #2072] @ 23fee18 │ │ @@ -1234848,16 +1234847,16 @@ │ │ movw r3, #4001 @ 0xfa1 │ │ ldr r2, [pc, #2012] @ 23fee5c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ b 23fe178 │ │ subseq r0, r1, r4, asr r3 │ │ ldrsbeq r6, [r0], #-96 @ 0xffffffa0 │ │ - stc2l 8, cr13, [r3, #216]! @ 0xd8 │ │ - stc2l 0, cr7, [r4, #744]! @ 0x2e8 │ │ + vcmla.f16 , , , #270 │ │ + stc2l 0, cr7, [r4, #924]! @ 0x39c │ │ ldrsheq r0, [r1], #-36 @ 0xffffffdc │ │ ldr r0, [pc, #2012] @ 23fee80 │ │ movw r3, #4146 @ 0x1032 │ │ ldr r2, [pc, #2008] @ 23fee84 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1234879,16 +1234878,16 @@ │ │ ldr r0, [pc, #1944] @ 23fee90 │ │ add r0, pc, r0 │ │ add r0, r0, r1, lsl #3 │ │ vstr d8, [r0] │ │ mov r0, r1 │ │ b 23fe8c4 │ │ addseq sl, r5, r0, lsl #26 │ │ - stc2l 14, cr8, [r4, #660]! @ 0x294 │ │ - stc2l 0, cr7, [r4, #424]! @ 0x1a8 │ │ + stc2l 14, cr8, [r4, #840]! @ 0x348 │ │ + stc2l 0, cr7, [r4, #604]! @ 0x25c │ │ subeq r2, pc, r0, asr #27 │ │ ldr r0, [pc, #1908] @ 23fee94 │ │ movw r3, #4146 @ 0x1032 │ │ ldr r2, [pc, #1904] @ 23fee98 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1234900,16 +1234899,16 @@ │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ bcs 23fe8a0 │ │ mov r0, r1 │ │ b 23fe8c4 │ │ - stc2l 7, cr13, [r3, #632]! @ 0x278 │ │ - stc2l 0, cr7, [r4, #136]! @ 0x88 │ │ + stc2l 7, cr13, [r3, #812]! @ 0x32c │ │ + stc2l 0, cr7, [r4, #316]! @ 0x13c │ │ subseq r0, r1, ip, asr r2 │ │ addseq sl, r5, r0, ror ip │ │ subeq r2, pc, r4, asr #26 │ │ ldr r0, [pc, #1596] @ 23fedb8 │ │ movw r3, #3977 @ 0xf89 │ │ ldr r2, [pc, #1592] @ 23fedbc │ │ add r0, pc, r0 │ │ @@ -1234930,16 +1234929,16 @@ │ │ ldr r2, [pc, #1544] @ 23fedcc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23fe440 │ │ sbcseq r6, r9, r0, ror #23 │ │ - stc2l 11, cr3, [r2, #572]! @ 0x23c @ │ │ - stc2l 15, cr6, [r4, #232]! @ 0xe8 │ │ + stc2l 11, cr3, [r2, #752]! @ 0x2f0 @ │ │ + stc2l 15, cr6, [r4, #412]! @ 0x19c │ │ sbcseq r6, r9, r4, ror #22 │ │ umullseq sl, r5, r0, fp │ │ ldr r0, [pc, #1588] @ 23fee24 │ │ movw r3, #3988 @ 0xf94 │ │ ldr r2, [pc, #1584] @ 23fee28 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1234975,19 +1234974,19 @@ │ │ ldr r2, [pc, #1492] @ 23fee4c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23fe638 │ │ stc2l 0, cr15, [r4, #92]! @ 0x5c │ │ - stc2l 14, cr6, [r4, #968]! @ 0x3c8 │ │ + stc2l 15, cr6, [r4, #124]! @ 0x7c │ │ ldrsbeq r5, [r6], #208 @ 0xd0 │ │ addseq sl, r5, r0, lsr fp │ │ - stc2l 10, cr1, [r3, #176]! @ 0xb0 @ │ │ - stc2l 14, cr6, [r4, #568]! @ 0x238 │ │ + stc2l 10, cr1, [r3, #356]! @ 0x164 @ │ │ + stc2l 14, cr6, [r4, #748]! @ 0x2ec │ │ ldr r0, [pc, #1532] @ 23feea4 │ │ movw r3, #4147 @ 0x1033 │ │ ldr r2, [pc, #1528] @ 23feea8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #1516] @ 23feeac │ │ @@ -1235011,20 +1235010,20 @@ │ │ add r0, pc, r0 │ │ add r0, r0, r1, lsl #3 │ │ vstr d8, [r0] │ │ b 23fe980 │ │ eorseq sl, r4, ip, asr #22 │ │ sbcseq r0, r3, ip, lsl #4 │ │ addseq sl, r5, ip, asr #21 │ │ - stc2l 11, cr7, [r2, #12]! @ │ │ - stc2l 14, cr6, [r4, #216]! @ 0xd8 │ │ + stc2l 11, cr7, [r2, #192]! @ 0xc0 @ │ │ + stc2l 14, cr6, [r4, #396]! @ 0x18c │ │ subseq r6, r0, r4, lsr #8 │ │ subeq r2, pc, r8, ror fp @ │ │ ldrhteq sl, [r4], -r4 │ │ - stc2l 14, cr6, [r4, #76]! @ 0x4c │ │ + stc2l 14, cr6, [r4, #256]! @ 0x100 │ │ stc2l 15, cr14, [r4, #104]! @ 0x68 │ │ ldr r0, [pc, #1400] @ 23feeb8 │ │ movw r3, #4147 @ 0x1033 │ │ ldr r2, [pc, #1396] @ 23feebc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1235063,19 +1235062,19 @@ │ │ ldr r2, [pc, #1300] @ 23feeec │ │ add r0, r0, r0, lsl #2 │ │ sub r3, r0, #5 │ │ str r3, [fp, #-56] @ 0xffffffc8 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ b 23fea68 │ │ - stc2l 4, cr13, [r3, #760]! @ 0x2f8 │ │ - stc2l 13, cr6, [r4, #264]! @ 0x108 │ │ + stc2l 4, cr13, [r3, #940]! @ 0x3ac │ │ + stc2l 13, cr6, [r4, #444]! @ 0x1bc │ │ subseq pc, r0, ip, asr pc @ │ │ - stc2l 4, cr13, [r3, #464]! @ 0x1d0 │ │ - stc2l 12, cr6, [r4, #968]! @ 0x3c8 │ │ + stc2l 4, cr13, [r3, #644]! @ 0x284 │ │ + stc2l 13, cr6, [r4, #124]! @ 0x7c │ │ ldr r0, [pc, #1256] @ 23feef0 │ │ movw r3, #4155 @ 0x103b │ │ ldr r2, [pc, #1252] @ 23feef4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #1240] @ 23feef8 │ │ @@ -1235116,19 +1235115,19 @@ │ │ mov r0, #1 │ │ add r2, pc, r2 │ │ str r0, [r2, r1, lsl #2] │ │ b 23feb10 │ │ ldrhteq sl, [r4], -r0 │ │ eorseq sl, r4, ip, lsr #19 │ │ rsbeq r6, r9, r4, lsl r9 │ │ - stc2l 15, cr10, [r4, #284]! @ 0x11c │ │ - stc2l 12, cr6, [r4, #600]! @ 0x258 │ │ + stc2l 15, cr10, [r4, #464]! @ 0x1d0 │ │ + stc2l 12, cr6, [r4, #780]! @ 0x30c │ │ addseq pc, r5, r1, lsl r7 @ │ │ - stc2l 0, cr7, [r3, #716]! @ 0x2cc │ │ - stc2l 12, cr6, [r4, #280]! @ 0x118 │ │ + stc2l 0, cr7, [r3, #896]! @ 0x380 │ │ + stc2l 12, cr6, [r4, #460]! @ 0x1cc │ │ ldr r0, [pc, #1084] @ 23fef18 │ │ mov r3, #4160 @ 0x1040 │ │ ldr r2, [pc, #1080] @ 23fef1c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r2, [pc, #1068] @ 23fef20 │ │ @@ -1235160,16 +1235159,16 @@ │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ strb r1, [r2] │ │ b 23fe1a8 │ │ umulleq r5, lr, ip, r5 │ │ @ instruction: 0x0095f6b0 │ │ subseq r6, r0, r8, ror #3 │ │ - stc2l 3, cr13, [r3, #296]! @ 0x128 │ │ - stc2l 11, cr6, [r4, #824]! @ 0x338 @ │ │ + stc2l 3, cr13, [r3, #476]! @ 0x1dc │ │ + stc2l 11, cr6, [r4, #1004]! @ 0x3ec @ │ │ ldr r0, [pc, #844] @ 23feecc │ │ movw r3, #4153 @ 0x1039 │ │ ldr r2, [pc, #840] @ 23feed0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #828] @ 23feed4 │ │ @@ -1235189,20 +1235188,20 @@ │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23fe990 │ │ subseq pc, r0, r8, lsl #28 │ │ sbcseq r0, sl, r4, lsr #8 │ │ subseq r6, r0, ip, ror r1 │ │ - stc2l 2, cr13, [r3, #904]! @ 0x388 │ │ - stc2l 11, cr6, [r4, #408]! @ 0x198 @ │ │ + stc2l 3, cr13, [r3, #60]! @ 0x3c │ │ + stc2l 11, cr6, [r4, #588]! @ 0x24c @ │ │ subseq pc, r0, r0, lsr #27 │ │ addseq sl, r5, ip, lsr #15 │ │ - stc2l 9, cr8, [r4, #162]! @ 0xa2 @ │ │ - stc2l 11, cr6, [r4, #88]! @ 0x58 @ │ │ + stc2l 9, cr8, [r4, #252]! @ 0xfc @ │ │ + stc2l 11, cr6, [r4, #268]! @ 0x10c @ │ │ ldr r0, [pc, #808] @ 23fef2c │ │ movw r3, #4166 @ 0x1046 │ │ ldr r2, [pc, #804] @ 23fef30 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #792] @ 23fef34 │ │ @@ -1235236,188 +1235235,188 @@ │ │ ldr r2, [pc, #712] @ 23fef54 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 23feb30 │ │ subeq r2, pc, ip, ror #16 │ │ - stc2l 2, cr13, [r3, #296]! @ 0x128 │ │ - stc2l 10, cr6, [r4, #824]! @ 0x338 @ │ │ + stc2l 2, cr13, [r3, #476]! @ 0x1dc │ │ + stc2l 10, cr6, [r4, #1004]! @ 0x3ec @ │ │ subseq pc, r0, r8, lsl #26 │ │ addseq sl, r5, ip, lsl r7 │ │ strdeq r2, [pc], #-112 @ │ │ - stc2l 8, cr8, [r4, #356]! @ 0x164 │ │ - stc2l 10, cr6, [r4, #120]! @ 0x78 @ │ │ + vcmla.f16 d24, d20, d6, #270 │ │ + stc2l 10, cr6, [r4, #300]! @ 0x12c @ │ │ subeq r2, pc, ip, ror r7 @ │ │ addseq sl, r5, r4, ror r6 │ │ - stc2l 1, cr1, [r4, #708]! @ 0x2c4 │ │ - stc2l 9, cr6, [r4, #444]! @ 0x1bc @ │ │ + stc2l 1, cr1, [r4, #888]! @ 0x378 │ │ + stc2l 10, cr6, [r4, #44]! @ 0x2c @ │ │ subeq ip, pc, r4, ror r3 @ │ │ - stc2l 1, cr13, [r3, #72]! @ 0x48 │ │ - stc2l 9, cr6, [r4, #300]! @ 0x12c @ │ │ + stc2l 1, cr13, [r3, #252]! @ 0xfc │ │ + stc2l 9, cr6, [r4, #390]! @ 0x186 @ │ │ subseq pc, r0, ip, asr #23 │ │ addseq sl, r5, r0, ror #11 │ │ strdeq ip, [pc], #-36 @ │ │ - stc2l 0, cr1, [r4, #900]! @ 0x384 │ │ - stc2l 9, cr6, [r4, #28]! @ │ │ + stc2l 1, cr1, [r4, #56]! @ 0x38 │ │ + stc2l 9, cr6, [r4, #118]! @ 0x76 @ │ │ subeq ip, pc, r8, lsr #5 │ │ addseq sl, r5, r0, ror #10 │ │ sbcseq r0, sl, ip, asr #2 │ │ sbcseq r6, r9, r4, lsl #10 │ │ - stc2l 4, cr3, [r2, #732]! @ 0x2dc │ │ - vcmla.f16 q11, q2, q9, #270 │ │ + stc2l 4, cr3, [r2, #912]! @ 0x390 │ │ + vcmla.f16 d22, d20, d15, #270 │ │ smullseq r6, r9, r0, r4 │ │ @ instruction: 0x0095a4bc │ │ stc2l 9, cr14, [r4, #142]! @ 0x8e @ │ │ - vcmla.f16 d22, d4, d18, #270 │ │ + vcmla.f16 q11, q2, , #270 │ │ sbcseq r0, sl, ip, lsl #1 │ │ ldrsheq r5, [r6], #104 @ 0x68 │ │ - stc2l 15, cr12, [r3, #272]! @ 0x110 │ │ - stc2l 7, cr6, [r4, #776]! @ 0x308 │ │ + stc2l 15, cr12, [r3, #452]! @ 0x1c4 │ │ + stc2l 7, cr6, [r4, #956]! @ 0x3bc │ │ addseq sl, r5, r4, lsr #8 │ │ strdeq r6, [r9], #-52 @ 0xffffffcc @ │ │ sbcseq r0, r6, r8, asr r8 │ │ stc2l 3, cr0, [r5, #124]! @ 0x7c │ │ - stc2l 7, cr6, [r4, #104]! @ 0x68 │ │ + stc2l 7, cr6, [r4, #284]! @ 0x11c │ │ sbcseq r0, r6, r8, ror #15 │ │ addseq sl, r5, r4, ror r3 │ │ - stc2l 2, cr1, [r3, #432]! @ 0x1b0 │ │ - stc2l 6, cr6, [r4, #824]! @ 0x338 │ │ + stc2l 2, cr1, [r3, #612]! @ 0x264 │ │ + stc2l 6, cr6, [r4, #1004]! @ 0x3ec │ │ mlaseq r4, r0, r3, sl │ │ sbcseq pc, r2, r0, asr sl @ │ │ addseq sl, r5, r4, lsl r3 │ │ - stc2l 9, cr10, [r4, #72]! @ 0x48 @ │ │ - stc2l 6, cr6, [r4, #488]! @ 0x1e8 │ │ + stc2l 9, cr10, [r4, #162]! @ 0xa2 @ │ │ + stc2l 6, cr6, [r4, #668]! @ 0x29c │ │ @ instruction: 0x0095a2dc │ │ - stc2l 6, cr6, [r4, #280]! @ 0x118 │ │ - stc2l 6, cr6, [r4, #168]! @ 0xa8 │ │ + stc2l 6, cr6, [r4, #460]! @ 0x1cc │ │ + stc2l 6, cr6, [r4, #348]! @ 0x15c │ │ subeq r2, pc, r8, ror #6 │ │ stc2l 7, cr14, [r4, #184]! @ 0xb8 │ │ umullseq pc, r5, r4, r0 @ │ │ - stc2l 2, cr8, [r4, #980]! @ 0x3d4 │ │ - stc2l 4, cr6, [r4, #744]! @ 0x2e8 │ │ + stc2l 3, cr8, [r4, #136]! @ 0x88 │ │ + stc2l 4, cr6, [r4, #924]! @ 0x39c │ │ subeq r2, pc, r8, lsl r2 @ │ │ addseq sl, r5, r0, lsl r1 │ │ - stc2l 12, cr0, [r4, #308]! @ 0x134 │ │ - stc2l 4, cr6, [r4, #488]! @ 0x1e8 │ │ + stc2l 12, cr0, [r4, #488]! @ 0x1e8 │ │ + stc2l 4, cr6, [r4, #668]! @ 0x29c │ │ subeq fp, pc, r0, lsl lr @ │ │ - stc2l 11, cr12, [r3, #696]! @ 0x2b8 @ │ │ - stc2l 4, cr6, [r4, #200]! @ 0xc8 │ │ + stc2l 11, cr12, [r3, #876]! @ 0x36c @ │ │ + stc2l 4, cr6, [r4, #380]! @ 0x17c │ │ subseq pc, r0, r8, ror #12 │ │ addseq sl, r5, ip, ror r0 │ │ subeq fp, pc, ip, lsl #27 │ │ - stc2l 11, cr0, [r4, #484]! @ 0x1e4 @ │ │ - stc2l 3, cr6, [r4, #664]! @ 0x298 │ │ + stc2l 11, cr0, [r4, #664]! @ 0x298 @ │ │ + stc2l 3, cr6, [r4, #844]! @ 0x34c │ │ subeq fp, pc, ip, lsr sp @ │ │ @ instruction: 0x00959ff4 │ │ sbcseq r5, r9, r0, lsr #31 │ │ - stc2l 12, cr2, [r2, #444]! @ 0x1bc │ │ - stc2l 0, cr6, [r4, #104]! @ 0x68 │ │ + stc2l 12, cr2, [r2, #624]! @ 0x270 │ │ + stc2l 0, cr6, [r4, #284]! @ 0x11c │ │ sbcseq r5, r9, r8, asr #24 │ │ addseq r9, r5, r4, ror ip │ │ stc2l 0, cr14, [r4, #1020]! @ 0x3fc │ │ - stc2l 15, cr5, [r4, #872]! @ 0x368 │ │ + stc2l 0, cr6, [r4, #28]! │ │ sbcseq r5, r6, r8, asr #4 │ │ - stc2l 10, cr12, [r3, #560]! @ 0x230 @ │ │ - stc2l 3, cr6, [r4, #40]! @ 0x28 │ │ + stc2l 10, cr12, [r3, #740]! @ 0x2e4 @ │ │ + stc2l 3, cr6, [r4, #220]! @ 0xdc │ │ addseq r9, r5, ip, ror #30 │ │ rsbeq r5, r9, ip, lsr pc │ │ sbcseq r0, r6, r0, lsr #7 │ │ stc2l 14, cr15, [r4, #540]! @ 0x21c │ │ - stc2l 2, cr6, [r4, #520]! @ 0x208 │ │ + stc2l 2, cr6, [r4, #700]! @ 0x2bc │ │ sbcseq r0, r6, r0, asr r3 │ │ @ instruction: 0x00959edc │ │ - stc2l 13, cr0, [r3, #848]! @ 0x350 │ │ - stc2l 2, cr6, [r4, #216]! @ 0xd8 │ │ + stc2l 14, cr0, [r3, #4]! │ │ + stc2l 2, cr6, [r4, #396]! @ 0x18c │ │ ldrshteq r9, [r4], -r8 │ │ ldrheq pc, [r2], #88 @ 0x58 @ │ │ addseq r9, r5, r8, ror lr │ │ addseq r9, r5, r0, ror #28 │ │ - stc2l 4, cr10, [r4, #352]! @ 0x160 │ │ - stc2l 1, cr6, [r4, #696]! @ 0x2b8 │ │ + stc2l 4, cr10, [r4, #532]! @ 0x214 │ │ + stc2l 1, cr6, [r4, #876]! @ 0x36c │ │ addseq r9, r5, r4, lsl lr │ │ addseq r9, r5, r4, lsl #28 │ │ addseq r4, r5, r8, asr #31 │ │ - stc2l 2, cr8, [r3, #660]! @ 0x294 │ │ - stc2l 15, cr5, [r4, #664]! @ 0x298 │ │ + stc2l 2, cr8, [r3, #840]! @ 0x348 │ │ + stc2l 15, cr5, [r4, #844]! @ 0x34c │ │ addseq r9, r5, ip, lsl #24 │ │ @ instruction: 0x00954dd8 │ │ sbcseq sl, r9, ip, asr #23 │ │ - stc2l 8, cr14, [r1, #760]! @ 0x2f8 │ │ - stc2l 15, cr5, [r4, #424]! @ 0x1a8 │ │ + vcmla.f16 q15, , , #270 │ │ + stc2l 15, cr5, [r4, #604]! @ 0x25c │ │ ldrheq sl, [r9], #152 @ 0x98 │ │ @ instruction: 0x00959bbc │ │ - stc2l 2, cr8, [r3, #148]! @ 0x94 │ │ - stc2l 15, cr5, [r4, #152]! @ 0x98 │ │ + stc2l 2, cr8, [r3, #328]! @ 0x148 │ │ + stc2l 15, cr5, [r4, #332]! @ 0x14c │ │ addseq r4, r5, ip, lsr #31 │ │ ldrsbeq pc, [r9], #144 @ 0x90 @ │ │ - stc2l 1, cr6, [r4, #232]! @ 0xe8 │ │ - stc2l 1, cr6, [r4, #120]! @ 0x78 │ │ + stc2l 1, cr6, [r4, #412]! @ 0x19c │ │ + stc2l 1, cr6, [r4, #300]! @ 0x12c │ │ eorseq sl, r4, ip, lsl #5 │ │ eorseq sl, r4, r8, lsl #5 │ │ @ instruction: 0x0095a1fc │ │ - stc2l 2, cr12, [r4, #608]! @ 0x260 │ │ - stc2l 5, cr6, [r4, #408]! @ 0x198 │ │ + stc2l 2, cr12, [r4, #788]! @ 0x314 │ │ + stc2l 5, cr6, [r4, #588]! @ 0x24c │ │ subseq sl, r0, ip, ror r9 │ │ addseq lr, r5, ip, asr #31 │ │ umullseq sl, r5, r4, r1 │ │ - stc2l 15, cr7, [r4, #180]! @ 0xb4 │ │ - stc2l 0, cr6, [r4, #968]! @ 0x3c8 │ │ + stc2l 15, cr7, [r4, #360]! @ 0x168 │ │ + stc2l 1, cr6, [r4, #124]! @ 0x7c │ │ addseq r9, r5, r8, asr sp │ │ subeq r1, pc, ip, lsr lr @ │ │ subeq r1, pc, r4, lsl lr @ │ │ - stc2l 14, cr7, [r4, #708]! @ 0x2c4 │ │ - stc2l 0, cr6, [r4, #472]! @ 0x1d8 │ │ + stc2l 14, cr7, [r4, #888]! @ 0x378 │ │ + stc2l 0, cr6, [r4, #652]! @ 0x28c │ │ ldrdeq r1, [pc], #-212 @ │ │ addseq r9, r5, ip, asr #25 │ │ - stc2l 6, cr0, [r4, #772]! @ 0x304 │ │ - stc2l 14, cr5, [r4, #952]! @ 0x3b8 │ │ + stc2l 6, cr0, [r4, #952]! @ 0x3b8 │ │ + stc2l 15, cr5, [r4, #108]! @ 0x6c │ │ addseq r9, r5, r4, asr fp │ │ subeq fp, pc, r4, ror r8 @ │ │ subeq fp, pc, r8, asr #16 │ │ - stc2l 6, cr0, [r4, #164]! @ 0xa4 │ │ - stc2l 14, cr5, [r4, #344]! @ 0x158 │ │ + stc2l 6, cr0, [r4, #344]! @ 0x158 │ │ + stc2l 14, cr5, [r4, #524]! @ 0x20c │ │ subeq fp, pc, ip, ror #15 │ │ addseq r9, r5, r4, lsr #21 │ │ sbcseq r5, r9, r0, asr sl │ │ - vcmla.f16 q9, q1, , #270 │ │ - stc2l 12, cr5, [r4, #88]! @ 0x58 │ │ + stc2l 8, cr2, [r2, #608]! @ 0x260 │ │ + stc2l 12, cr5, [r4, #268]! @ 0x10c │ │ sbcseq r5, r9, r4, asr #16 │ │ addseq r9, r5, r0, ror r8 │ │ stc2l 12, cr13, [r4, #1004]! @ 0x3ec │ │ - stc2l 11, cr5, [r4, #856]! @ 0x358 @ │ │ + stc2l 12, cr5, [r4, #12]! │ │ ldrsheq r4, [r6], #200 @ 0xc8 │ │ addseq r9, r5, r4, asr sl │ │ smullseq pc, r5, r8, lr @ │ │ stc2l 9, cr15, [r4, #294]! @ 0x126 @ │ │ - stc2l 13, cr5, [r4, #568]! @ 0x238 │ │ + stc2l 13, cr5, [r4, #748]! @ 0x2ec │ │ sbcseq pc, r5, ip, asr lr @ │ │ addseq r9, r5, r8, ror #19 │ │ - vcmla.f16 q8, , q8, #270 │ │ - stc2l 13, cr5, [r4, #264]! @ 0x108 │ │ + stc2l 9, cr0, [r3, #26]! @ │ │ + stc2l 13, cr5, [r4, #444]! @ 0x1bc │ │ eorseq r9, r4, r4, lsl #20 │ │ sbcseq pc, r2, r4, asr #1 │ │ addseq r9, r5, r4, lsl #19 │ │ addseq r9, r5, ip, ror #18 │ │ - stc2l 15, cr9, [r4, #400]! @ 0x190 │ │ - stc2l 12, cr5, [r4, #744]! @ 0x2e8 │ │ + stc2l 15, cr9, [r4, #580]! @ 0x244 │ │ + stc2l 12, cr5, [r4, #924]! @ 0x39c │ │ addseq r9, r5, r0, lsr #18 │ │ addseq r9, r5, r0, lsl r9 │ │ @ instruction: 0x00954ad4 │ │ - stc2l 14, cr7, [r3, #580]! @ 0x244 │ │ - stc2l 11, cr5, [r4, #584]! @ 0x248 @ │ │ + stc2l 14, cr7, [r3, #760]! @ 0x2f8 │ │ + stc2l 11, cr5, [r4, #764]! @ 0x2fc @ │ │ @ instruction: 0x009597f8 │ │ addseq r4, r5, r4, asr #19 │ │ ldrsbeq sl, [r9], #100 @ 0x64 │ │ - stc2l 4, cr14, [r1, #680]! @ 0x2a8 │ │ - stc2l 11, cr5, [r4, #344]! @ 0x158 @ │ │ + stc2l 4, cr14, [r1, #860]! @ 0x35c │ │ + stc2l 11, cr5, [r4, #524]! @ 0x20c @ │ │ sbcseq sl, r9, r4, lsr #11 │ │ addseq r9, r5, r8, lsr #15 │ │ - stc2l 14, cr7, [r3, #68]! @ 0x44 │ │ - stc2l 11, cr5, [r4, #72]! @ 0x48 @ │ │ + stc2l 14, cr7, [r3, #248]! @ 0xf8 │ │ + stc2l 11, cr5, [r4, #252]! @ 0xfc @ │ │ @ instruction: 0x00954ab4 │ │ rsceq r2, r6, ip, lsl #20 │ │ stc2l 13, cr13, [r4, #456]! @ 0x1c8 │ │ @ instruction: 0x0095e6dc │ │ │ │ 023fef68 : │ │ push {r4, sl, fp, lr} │ │ @@ -1235437,16 +1235436,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - stc2l 3, cr14, [r2, #664]! @ 0x298 │ │ - stc2l 5, cr8, [r2, #788]! @ 0x314 │ │ + stc2l 3, cr14, [r2, #844]! @ 0x34c │ │ + stc2l 5, cr8, [r2, #968]! @ 0x3c8 │ │ │ │ 023fefc4 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #32 │ │ mov r3, r1 │ │ mov r1, r0 │ │ @@ -1236599,15 +1236598,15 @@ │ │ ldr r0, [pc, #3616] @ 2400fb8 │ │ cmp r1, r6 │ │ add r0, pc, r0 │ │ str r5, [r0, r2, lsl #2] │ │ bcs 24001b4 │ │ mov r0, r1 │ │ b 24001d0 │ │ - stc2l 4, cr8, [r1, #868]! @ 0x364 │ │ + stc2l 5, cr8, [r1, #24]! │ │ rsceq r2, r6, r4, asr r3 │ │ ldr r0, [pc, #3584] @ 2400fbc │ │ mov r2, r7 │ │ movw r3, #3596 @ 0xe0c │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3568] @ 2400fc0 │ │ @@ -1236628,18 +1236627,18 @@ │ │ cmp r1, r6 │ │ str r5, [r8, r2, lsl #2] │ │ bcs 2400230 │ │ mov r0, r1 │ │ b 240024c │ │ ldrsbteq r9, [r4], -ip │ │ rsceq r6, r7, r4, ror #9 │ │ - stc2l 14, cr13, [r1, #760]! @ 0x2f8 │ │ - stc2l 0, cr12, [r2, #352]! @ 0x160 │ │ - stc2l 4, cr8, [r1, #356]! @ 0x164 │ │ - stc2l 7, cr3, [r4, #392]! @ 0x188 │ │ + stc2l 14, cr13, [r1, #940]! @ 0x3ac │ │ + stc2l 0, cr12, [r2, #532]! @ 0x214 │ │ + stc2l 4, cr8, [r1, #536]! @ 0x218 │ │ + stc2l 7, cr3, [r4, #572]! @ 0x23c │ │ ldr r0, [pc, #4004] @ 24011dc │ │ mov r2, r7 │ │ movw r3, #3597 @ 0xe0d │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3988] @ 24011e0 │ │ ldr r1, [pc, r1] │ │ @@ -1236674,21 +1236673,21 @@ │ │ ldr r5, [r4, r0, lsl #2] │ │ sub r2, r1, #1 │ │ cmp r2, r6 │ │ bcs 24000e8 │ │ mov r0, r1 │ │ b 240010c │ │ rsceq fp, r7, r0, ror #4 │ │ - stc2l 13, cr13, [r1, #968]! @ 0x3c8 │ │ + stc2l 14, cr13, [r1, #124]! @ 0x7c │ │ rsceq fp, r7, r0, lsl r2 │ │ - stc2l 11, cr11, [r3, #976]! @ 0x3d0 @ │ │ + stc2l 12, cr11, [r3, #132]! @ 0x84 │ │ stc2l 12, cr0, [r5, #836]! @ 0x344 │ │ - stc2l 11, cr3, [r2, #372]! @ 0x174 @ │ │ - stc2l 0, cr6, [r2, #812]! @ 0x32c │ │ - stc2l 10, cr3, [r1, #696]! @ 0x2b8 @ │ │ + stc2l 11, cr3, [r2, #552]! @ 0x228 @ │ │ + stc2l 0, cr6, [r2, #992]! @ 0x3e0 │ │ + stc2l 10, cr3, [r1, #876]! @ 0x36c @ │ │ rsceq r2, r6, r0, asr #3 │ │ ldr ip, [pc, #3828] @ 24011f4 │ │ mov r0, #8 │ │ ldr lr, [pc, #3824] @ 24011f8 │ │ mov r8, #60 @ 0x3c │ │ ldr r6, [pc, #3820] @ 24011fc │ │ add ip, pc, ip │ │ @@ -1236755,15 +1236754,15 @@ │ │ sub r1, fp, #40 @ 0x28 │ │ str r0, [fp, #-40] @ 0xffffffd8 │ │ mov r0, r4 │ │ bl 270da90 │ │ ldr r1, [pc, #3600] @ 2401228 │ │ add r1, pc, r1 │ │ b 23ffc24 │ │ - stc2l 10, cr5, [r1, #996]! @ 0x3e4 @ │ │ + stc2l 11, cr5, [r1, #152]! @ 0x98 @ │ │ rsceq r1, r7, ip, ror r3 │ │ ldr r0, [pc, #3584] @ 240122c │ │ ldr r5, [fp, #20] │ │ ldr r0, [pc, r0] │ │ ldr r6, [pc, #3576] @ 2401230 │ │ sub r9, r0, #1 │ │ add r6, pc, r6 │ │ @@ -1236777,16 +1236776,16 @@ │ │ b 2400ac8 │ │ rsceq r1, r7, r4, ror #6 │ │ rsceq r6, r7, r0, ror r1 │ │ rsceq r2, r6, r8, asr #17 │ │ ldrdeq r2, [r6], #4 @ │ │ rsceq r2, r6, r4, asr #17 │ │ rsceq r2, r6, ip, lsr #17 │ │ - stc2l 14, cr11, [r2, #76]! @ 0x4c │ │ - stc2l 2, cr5, [r4, #900]! @ 0x384 │ │ + stc2l 14, cr11, [r2, #256]! @ 0x100 │ │ + stc2l 3, cr5, [r4, #56]! @ 0x38 │ │ rsceq r2, r6, r0, ror r0 │ │ ldr r0, [pc, #4060] @ 2401464 │ │ movw r3, #1394 @ 0x572 │ │ ldr r2, [pc, #4056] @ 2401468 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1236812,15 +1236811,15 @@ │ │ add r0, pc, r0 │ │ str r3, [r2, r1, lsl #2] │ │ b 2400ac8 │ │ ldrshteq r8, [r4], -r8 │ │ rsceq r6, r7, r0, lsl #4 │ │ rsceq r2, r6, r0, asr #32 │ │ stc2l 3, cr13, [r4, #696]! @ 0x2b8 │ │ - stc2l 9, cr3, [r2, #250]! @ 0xfa @ │ │ + stc2l 9, cr3, [r2, #340]! @ 0x154 @ │ │ ldrhteq r8, [r4], -r0 │ │ ldr r1, [r4] │ │ mov r3, r4 │ │ sub r2, r1, #251 @ 0xfb │ │ cmn r2, #250 @ 0xfa │ │ bhi 240093c │ │ ldr r0, [pc, #4008] @ 24014cc │ │ @@ -1236838,17 +1236837,17 @@ │ │ mov r0, r5 │ │ add r1, pc, r1 │ │ mov r2, #1 │ │ bl 270da90 │ │ ldr r0, [pc, #3956] @ 24014d8 │ │ add r0, pc, r0 │ │ b 2400598 │ │ - stc2l 6, cr5, [r3, #832]! @ 0x340 │ │ - stc2l 2, cr5, [r4, #260]! @ 0x104 │ │ - stc2l 13, cr11, [r2, #48]! @ 0x30 │ │ + stc2l 6, cr5, [r3, #1012]! @ 0x3f4 │ │ + stc2l 2, cr5, [r4, #440]! @ 0x1b8 │ │ + stc2l 13, cr11, [r2, #228]! @ 0xe4 │ │ ldr r1, [pc, #4088] @ 2401574 │ │ ldr r0, [pc, #4088] @ 2401578 │ │ add r1, pc, r1 │ │ add r0, pc, r0 │ │ str r3, [r1] │ │ mov r1, #46 @ 0x2e │ │ bl 270d990 │ │ @@ -1236860,17 +1236859,17 @@ │ │ add r0, pc, r0 │ │ b 2400ac8 │ │ rsceq r1, r6, r8, lsr #31 │ │ eorseq r8, r4, r0, lsr pc │ │ rsceq r6, r7, r8, lsr r1 │ │ rsceq r1, r6, r8, ror pc │ │ stc2l 2, cr13, [r4, #904]! @ 0x388 │ │ - stc2l 8, cr3, [r2, #708]! @ 0x2c4 │ │ + stc2l 8, cr3, [r2, #888]! @ 0x378 │ │ eorseq r8, r4, r4, ror #29 │ │ - stc2l 6, cr5, [r3, #16]! │ │ + stc2l 6, cr5, [r3, #196]! @ 0xc4 │ │ ldr r1, [pc, #4088] @ 24015cc │ │ mov r0, r6 │ │ ldr r2, [pc, #4084] @ 24015d0 │ │ mov r3, #3 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270e140 │ │ @@ -1236893,42 +1236892,42 @@ │ │ ldr r0, [pc, #4016] @ 24015e0 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4004] @ 24015e4 │ │ add r0, pc, r0 │ │ b 2400ac8 │ │ - stc2l 12, cr11, [r2, #384]! @ 0x180 │ │ - stc2l 7, cr3, [r1, #900]! @ 0x384 │ │ + stc2l 12, cr11, [r2, #564]! @ 0x234 │ │ + vcmla.f16 d19, d1, d14, #270 │ │ rsceq r1, r7, r4, asr r1 │ │ rsceq r1, r7, r0, asr #2 │ │ rsceq r5, r7, ip, asr #30 │ │ rsceq r2, r6, r4, lsr #13 │ │ strhteq r1, [r6], #224 @ 0xe0 │ │ rsceq r2, r6, r0, lsr #13 │ │ rsceq r2, r6, r8, lsl #13 │ │ - stc2l 13, cr11, [r1, #984]! @ 0x3d8 │ │ - stc2l 7, cr3, [r2, #804]! @ 0x324 │ │ - stc2l 8, cr15, [r3, #360]! @ 0x168 │ │ + stc2l 14, cr11, [r1, #140]! @ 0x8c │ │ + stc2l 7, cr3, [r2, #984]! @ 0x3d8 │ │ + vcmla.f16 d31, d19, d7, #270 │ │ rsceq r1, r6, ip, lsr #28 │ │ ldrhteq r8, [r4], -r4 │ │ strhteq r5, [r7], #252 @ 0xfc │ │ strdeq r1, [r6], #216 @ 0xd8 @ │ │ stc2l 1, cr13, [r4, #392]! @ 0x188 │ │ - stc2l 7, cr3, [r2, #196]! @ 0xc4 │ │ + stc2l 7, cr3, [r2, #376]! @ 0x178 │ │ eorseq r8, r4, r4, ror #26 │ │ - stc2l 4, cr5, [r3, #512]! @ 0x200 │ │ - stc2l 7, cr15, [r3, #712]! @ 0x2c8 │ │ - stc2l 9, cr1, [r3, #162]! @ 0xa2 @ │ │ + stc2l 4, cr5, [r3, #692]! @ 0x2b4 │ │ + stc2l 7, cr15, [r3, #892]! @ 0x37c │ │ + stc2l 9, cr1, [r3, #252]! @ 0xfc @ │ │ rsceq r1, r6, r4, ror #26 │ │ rsceq ip, r6, r8, lsr #3 │ │ rsceq r5, r7, r0, ror #29 │ │ rsceq r2, r6, ip, lsr #10 │ │ - stc2l 14, cr7, [r1, #580]! @ 0x244 │ │ - stc2l 10, cr11, [r2, #208]! @ 0xd0 @ │ │ + stc2l 14, cr7, [r1, #760]! @ 0x2f8 │ │ + stc2l 10, cr11, [r2, #388]! @ 0x184 @ │ │ ldr r0, [r7] │ │ cmn r0, #1 │ │ ble 2400dd8 │ │ ldr r0, [fp, #36] @ 0x24 │ │ mov r4, #3 │ │ ldr r1, [pc, #4032] @ 2401690 │ │ ldr r2, [pc, #4032] @ 2401694 │ │ @@ -1237031,21 +1237030,21 @@ │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 2400fc4 │ │ ldr r0, [pc, #4044] @ 2401830 │ │ add r0, pc, r0 │ │ b 2400ac8 │ │ mlaseq r4, ip, ip, r8 │ │ - stc2l 10, cr9, [r2, #204]! @ 0xcc @ │ │ + stc2l 10, cr9, [r2, #384]! @ 0x180 @ │ │ strhteq r1, [r6], #192 @ 0xc0 │ │ eorseq r8, r4, r8, lsr ip │ │ rsceq r5, r7, r0, asr #28 │ │ rsceq r5, r7, r8, lsr #28 │ │ - stc2l 9, cr9, [r2, #462]! @ 0x1ce @ │ │ - stc2l 4, cr1, [r4, #916]! @ 0x394 │ │ + stc2l 10, cr9, [r2, #80]! @ 0x50 @ │ │ + stc2l 5, cr1, [r4, #72]! @ 0x48 │ │ ldrdeq r5, [r7], #196 @ 0xc4 @ │ │ rsceq r2, r6, ip, lsr #8 │ │ rsceq r1, r6, r4, lsr ip │ │ ldr r0, [pc, #3992] @ 2401834 │ │ movw r3, #1973 @ 0x7b5 │ │ ldr r2, [pc, #3988] @ 2401838 │ │ add r0, pc, r0 │ │ @@ -1237082,15 +1237081,15 @@ │ │ add r0, pc, r0 │ │ b 2400ac8 │ │ rsceq r2, r6, r0, lsr #8 │ │ rsceq r0, r7, ip, lsl #29 │ │ rsceq r0, r7, r8, ror lr │ │ strdeq r2, [r6], #48 @ 0x30 @ │ │ rsceq r5, r7, r4, ror ip │ │ - stc2l 4, cr1, [r4, #388]! @ 0x184 │ │ + stc2l 4, cr1, [r4, #568]! @ 0x238 │ │ add r1, r1, #1 │ │ add r0, r0, r1, lsr #1 │ │ cmp r0, #126 @ 0x7e │ │ bcc 2400c04 │ │ ldr r0, [pc, #4004] @ 24018f8 │ │ mov r1, #40 @ 0x28 │ │ mov r4, r3 │ │ @@ -1237108,15 +1237107,15 @@ │ │ str r0, [fp, #-40] @ 0xffffffd8 │ │ mov r0, r4 │ │ bl 270da90 │ │ ldr r1, [pc, #3944] @ 2401900 │ │ add r1, pc, r1 │ │ b 23ffbe0 │ │ stc2l 15, cr12, [r4, #176]! @ 0xb0 │ │ - stc2l 10, cr10, [r4, #676]! @ 0x2a4 @ │ │ + stc2l 10, cr10, [r4, #856]! @ 0x358 @ │ │ rsceq r5, r7, r8, lsl ip │ │ rsceq r2, r6, r0, ror r3 │ │ rsceq r1, r6, r8, ror fp │ │ rsceq r2, r6, r4, ror #6 │ │ ldrdeq r0, [r7], #208 @ 0xd0 @ │ │ strhteq r0, [r7], #220 @ 0xdc │ │ ldr r1, [pc, #3704] @ 240183c │ │ @@ -1237141,21 +1237140,21 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3640] @ 2401850 │ │ add r0, pc, r0 │ │ b 2400ac8 │ │ rsceq r5, r7, r4, ror #25 │ │ rsceq sl, r7, r0, lsl #22 │ │ - stc2l 4, cr11, [r3, #912]! @ 0x390 │ │ + stc2l 5, cr11, [r3, #68]! @ 0x44 │ │ rsceq r2, r6, r0, lsl #6 │ │ - stc2l 5, cr15, [r3, #260]! @ 0x104 │ │ - stc2l 4, cr3, [r2, #276]! @ 0x114 │ │ + stc2l 5, cr15, [r3, #440]! @ 0x1b8 │ │ + stc2l 4, cr3, [r2, #456]! @ 0x1c8 │ │ rsceq r5, r7, r8, asr fp │ │ - stc2l 4, cr5, [r1, #560]! @ 0x230 │ │ - stc2l 3, cr7, [r1, #300]! @ 0x12c │ │ + stc2l 4, cr5, [r1, #740]! @ 0x2e4 │ │ + stc2l 3, cr7, [r1, #480]! @ 0x1e0 │ │ ldr r0, [pc, #3596] @ 2401854 │ │ movw r3, #1432 @ 0x598 │ │ ldr r2, [pc, #3592] @ 2401858 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ str r6, [r4, r0, lsl #2] │ │ @@ -1237191,15 +1237190,15 @@ │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ rsceq sl, r7, r8, ror #20 │ │ rsceq sl, r7, ip, asr #20 │ │ rsceq fp, r6, r8, asr lr │ │ rsceq r5, r7, r4, lsr #21 │ │ - stc2l 14, cr2, [r4, #404]! @ 0x194 │ │ + stc2l 14, cr2, [r4, #584]! @ 0x248 │ │ rsceq r5, r7, r4, ror fp │ │ eorseq r8, r4, r0, ror r9 │ │ ldr r0, [pc, #3516] @ 24018bc │ │ movw r3, #1974 @ 0x7b6 │ │ ldr r2, [pc, #3512] @ 24018c0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1237235,40 +1237234,40 @@ │ │ ldr r2, [pc, #3424] @ 24018e8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24008f4 │ │ stc2l 7, cr14, [r4, #952]! @ 0x3b8 │ │ - stc2l 2, cr3, [r2, #980]! @ 0x3d4 │ │ + stc2l 3, cr3, [r2, #136]! @ 0x88 │ │ eorseq r8, r4, r4, lsr #18 │ │ stc2l 7, cr14, [r4, #680]! @ 0x2a8 │ │ - stc2l 2, cr3, [r2, #708]! @ 0x2c4 │ │ + stc2l 2, cr3, [r2, #888]! @ 0x378 │ │ eorseq r8, r4, r0, ror #17 │ │ - stc2l 2, cr11, [r3, #944]! @ 0x3b0 │ │ - stc2l 6, cr11, [r2, #384]! @ 0x180 │ │ - stc2l 3, cr15, [r3, #56]! @ 0x38 │ │ - stc2l 2, cr5, [r1, #556]! @ 0x22c │ │ - stc2l 2, cr3, [r2, #196]! @ 0xc4 │ │ - stc2l 2, cr15, [r3, #968]! @ 0x3c8 │ │ - stc2l 1, cr1, [r4, #244]! @ 0xf4 │ │ + stc2l 3, cr11, [r3, #100]! @ 0x64 │ │ + stc2l 6, cr11, [r2, #564]! @ 0x234 │ │ + stc2l 3, cr15, [r3, #236]! @ 0xec │ │ + stc2l 2, cr5, [r1, #736]! @ 0x2e0 │ │ + stc2l 2, cr3, [r2, #376]! @ 0x178 │ │ + stc2l 3, cr15, [r3, #124]! @ 0x7c │ │ + stc2l 1, cr1, [r4, #424]! @ 0x1a8 │ │ stc2l 3, cr0, [r5, #136]! @ 0x88 │ │ - stc2l 1, cr3, [r2, #916]! @ 0x394 │ │ + stc2l 2, cr3, [r2, #72]! @ 0x48 │ │ stc2l 12, cr12, [r4, #428]! @ 0x1ac │ │ - stc2l 2, cr5, [r1, #212]! @ 0xd4 │ │ - stc2l 5, cr11, [r2, #636]! @ 0x27c │ │ - stc2l 1, cr3, [r2, #660]! @ 0x294 │ │ - stc2l 0, cr1, [r4, #640]! @ 0x280 │ │ - stc2l 1, cr3, [r1, #4]! │ │ + stc2l 2, cr5, [r1, #392]! @ 0x188 │ │ + stc2l 5, cr11, [r2, #816]! @ 0x330 │ │ + stc2l 1, cr3, [r2, #840]! @ 0x348 │ │ + stc2l 0, cr1, [r4, #820]! @ 0x334 │ │ + stc2l 1, cr3, [r1, #184]! @ 0xb8 │ │ rsceq r1, r6, r8, lsl #16 │ │ rsceq fp, r6, ip, asr #24 │ │ rsceq r5, r7, r0, lsl #19 │ │ rsceq r0, r7, ip, lsr sl │ │ stc2l 11, cr12, [r4, #568]! @ 0x238 @ │ │ - stc2l 1, cr3, [r2, #36]! @ 0x24 │ │ + stc2l 1, cr3, [r2, #216]! @ 0xd8 │ │ ldr r0, [fp, #16] │ │ ldr r0, [r0] │ │ cmn r0, #1 │ │ ble 2400eec │ │ ldr r0, [fp, #36] @ 0x24 │ │ mov sl, #3 │ │ ldr r1, [pc, #3308] @ 2401910 │ │ @@ -1237373,44 +1237372,44 @@ │ │ bl 270e170 │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 240123c │ │ ldr r0, [pc, #2904] @ 2401918 │ │ add r0, pc, r0 │ │ b 2400ac8 │ │ - stc2l 1, cr15, [r3, #808]! @ 0x328 │ │ - stc2l 3, cr1, [r3, #388]! @ 0x184 │ │ - stc2l 1, cr5, [r1, #140]! @ 0x8c │ │ - stc2l 0, cr3, [r2, #804]! @ 0x324 │ │ - stc2l 1, cr15, [r3, #552]! @ 0x228 │ │ + stc2l 1, cr15, [r3, #988]! @ 0x3dc │ │ + stc2l 3, cr1, [r3, #568]! @ 0x238 │ │ + stc2l 1, cr5, [r1, #320]! @ 0x140 │ │ + stc2l 0, cr3, [r2, #984]! @ 0x3d8 │ │ + stc2l 1, cr15, [r3, #732]! @ 0x2dc │ │ ldr r0, [pc, #3168] @ 2401a40 │ │ mov r1, #64 @ 0x40 │ │ mov r4, r7 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3152] @ 2401a44 │ │ mov r1, r7 │ │ mov r2, #1 │ │ add r0, pc, r0 │ │ bl 270da90 │ │ ldr r0, [pc, #3136] @ 2401a48 │ │ add r0, pc, r0 │ │ b 23ff63c │ │ - stc2l 11, cr2, [r4, #904]! @ 0x388 @ │ │ - stc2l 15, cr0, [r4, #664]! @ 0x298 │ │ + stc2l 12, cr2, [r4, #60]! @ 0x3c │ │ + stc2l 15, cr0, [r4, #844]! @ 0x34c │ │ stc2l 10, cr12, [r4, #664]! @ 0x298 @ │ │ strhteq r5, [r7], #128 @ 0x80 │ │ - stc2l 5, cr13, [r2, #96]! @ 0x60 │ │ + stc2l 5, cr13, [r2, #276]! @ 0x114 │ │ stc2l 10, cr12, [r4, #408]! @ 0x198 @ │ │ rsceq r1, r6, r4, ror #29 │ │ rsceq r5, r7, ip, ror #16 │ │ stc2l 10, cr12, [r4, #212]! @ 0xd4 @ │ │ stc2l 10, cr12, [r4, #168]! @ 0xa8 @ │ │ rsceq r6, r6, r4, asr #25 │ │ - stc2l 2, cr1, [r3, #436]! @ 0x1b4 │ │ + stc2l 2, cr1, [r3, #616]! @ 0x268 │ │ ldr r0, [pc, #2600] @ 240186c │ │ movw r3, #1433 @ 0x599 │ │ ldr r2, [pc, #2596] @ 2401870 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #2584] @ 2401874 │ │ @@ -1237444,70 +1237443,70 @@ │ │ movw r3, #1435 @ 0x59b │ │ ldr r2, [pc, #2504] @ 2401898 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2400a9c │ │ - stc2l 6, cr5, [r2, #308]! @ 0x134 │ │ - stc2l 15, cr2, [r2, #772]! @ 0x304 │ │ + stc2l 6, cr5, [r2, #488]! @ 0x1e8 │ │ + stc2l 15, cr2, [r2, #952]! @ 0x3b8 │ │ ldrshteq r8, [r4], -r0 │ │ ldr r0, [pc, #2576] @ 2401904 │ │ mov r1, #64 @ 0x40 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #2564] @ 2401908 │ │ mov r2, #1 │ │ ldr r1, [fp, #16] │ │ add r0, pc, r0 │ │ bl 270da90 │ │ ldr r0, [pc, #2548] @ 240190c │ │ add r0, pc, r0 │ │ b 23ff570 │ │ - stc2l 4, cr1, [r2, #824]! @ 0x338 │ │ - stc2l 3, cr11, [r2, #464]! @ 0x1d0 │ │ + stc2l 4, cr1, [r2, #1004]! @ 0x3ec │ │ + stc2l 3, cr11, [r2, #644]! @ 0x284 │ │ stc2l 9, cr12, [r4, #428]! @ 0x1ac @ │ │ - stc2l 11, cr6, [r3, #300]! @ 0x12c @ │ │ - stc2l 8, cr4, [r4, #372]! @ 0x174 │ │ + stc2l 11, cr6, [r3, #480]! @ 0x1e0 @ │ │ + vcmla.f16 d20, d20, d10, #270 │ │ rsceq fp, r6, r4, lsr #20 │ │ rsceq r0, r7, r0, asr #16 │ │ rsceq sl, r7, ip, asr #11 │ │ rsceq r5, r7, r8, ror #14 │ │ strhteq r1, [r6], #220 @ 0xdc │ │ rsceq r0, r7, r4, lsr #16 │ │ rsceq sl, r7, r4, lsr #11 │ │ ldrdeq sl, [r7], #92 @ 0x5c @ │ │ rsceq r0, r7, ip, ror #15 │ │ rsceq r1, r6, r8, ror #10 │ │ rsceq r1, r6, r4, ror #10 │ │ smlaleq fp, r6, r0, r9 │ │ rsceq sl, r7, r0, lsr r5 │ │ - stc2l 13, cr0, [r4, #616]! @ 0x268 │ │ + stc2l 13, cr0, [r4, #796]! @ 0x31c │ │ stc2l 8, cr12, [r4, #616]! @ 0x268 │ │ rsceq r5, r7, r8, lsr #13 │ │ - stc2l 13, cr0, [r4, #408]! @ 0x198 │ │ + stc2l 13, cr0, [r4, #588]! @ 0x24c │ │ vcmla.f16 q14, q2, q11, #270 │ │ - stc2l 2, cr11, [r2, #64]! @ 0x40 │ │ + stc2l 2, cr11, [r2, #244]! @ 0xf4 │ │ rsceq sl, r7, r0, lsl #10 │ │ strdeq fp, [r6], #132 @ 0x84 @ │ │ rsceq r5, r7, r4, asr #12 │ │ rsceq r1, r6, r4, lsr #9 │ │ rsceq r1, r6, r4, lsl #25 │ │ rsceq r6, r6, r0, lsr #21 │ │ stc2l 7, cr12, [r4, #968]! @ 0x3c8 │ │ stc2l 7, cr12, [r4, #900]! @ 0x384 │ │ smlaleq fp, r6, r4, r8 │ │ rsceq fp, r6, r0, lsl #17 │ │ - stc2l 3, cr10, [r4, #544]! @ 0x220 │ │ + stc2l 3, cr10, [r4, #724]! @ 0x2d4 │ │ rsceq fp, r6, ip, asr #16 │ │ rsceq fp, r6, ip, asr #16 │ │ - stc2l 3, cr10, [r4, #320]! @ 0x140 │ │ + stc2l 3, cr10, [r4, #500]! @ 0x1f4 │ │ rsceq fp, r6, r0, lsl r8 │ │ rsceq fp, r6, ip, lsl #16 │ │ - stc2l 12, cr0, [r4, #56]! @ 0x38 │ │ + stc2l 12, cr0, [r4, #236]! @ 0xec │ │ ldrdeq fp, [r6], #112 @ 0x70 @ │ │ ldr r0, [r7] │ │ ldr r5, [pc, #2684] @ 2401a4c │ │ cmp r0, #1 │ │ add r5, pc, r5 │ │ blt 2401090 │ │ ldr r0, [pc, #2672] @ 2401a50 │ │ @@ -1237633,40 +1237632,40 @@ │ │ ldr r0, [pc, #2236] @ 2401a7c │ │ mov r1, #19 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #2224] @ 2401a80 │ │ add r0, pc, r0 │ │ b 2400ac8 │ │ - stc2l 11, cr0, [r4, #888]! @ 0x378 @ │ │ + stc2l 12, cr0, [r4, #44]! @ 0x2c │ │ smlaleq fp, r6, ip, r7 │ │ - stc2l 1, cr13, [r2, #272]! @ 0x110 │ │ + stc2l 1, cr13, [r2, #452]! @ 0x1c4 │ │ rsceq fp, r6, r4, asr r7 │ │ - stc2l 1, cr13, [r2, #80]! @ 0x50 │ │ + stc2l 1, cr13, [r2, #260]! @ 0x104 │ │ rsceq fp, r6, r0, lsr #14 │ │ stc2l 6, cr12, [r4, #180]! @ 0xb4 │ │ rsceq fp, r6, r4, ror #13 │ │ smlaleq fp, r6, r4, r6 │ │ strhteq r0, [r7], #64 @ 0x40 │ │ rsceq sl, r7, ip, lsr r2 │ │ ldrdeq r5, [r7], #56 @ 0x38 @ │ │ rsceq r1, r6, ip, lsr #20 │ │ smlaleq r0, r7, r4, r4 │ │ rsceq sl, r7, r4, lsl r2 │ │ rsceq sl, r7, ip, asr #4 │ │ rsceq r0, r7, ip, asr r4 │ │ ldrdeq r1, [r6], #28 @ │ │ strhteq sl, [r7], #16 │ │ - stc2l 10, cr2, [r3, #596]! @ 0x254 @ │ │ - stc2l 10, cr2, [r2, #820]! @ 0x334 @ │ │ + stc2l 10, cr2, [r3, #776]! @ 0x308 @ │ │ + stc2l 10, cr2, [r2, #1000]! @ 0x3e8 @ │ │ ldrshteq r8, [r4], -r4 │ │ rsceq r1, r6, r0, lsr r1 │ │ rsceq r1, r6, r4, lsr #2 │ │ strhteq r5, [r7], #44 @ 0x2c │ │ - stc2l 9, cr2, [r1, #460]! @ 0x1cc @ │ │ + stc2l 10, cr2, [r1, #76]! @ 0x4c @ │ │ ldr r0, [fp, #16] │ │ ldr r0, [r0] │ │ cmp r0, #1 │ │ blt 2401318 │ │ ldr r4, [pc, #1828] @ 2401978 │ │ mov r1, #1000 @ 0x3e8 │ │ add r4, pc, r4 │ │ @@ -1237797,15 +1237796,15 @@ │ │ ldr r0, [pc, #1360] @ 24019a0 │ │ mov r1, #19 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #1348] @ 24019a4 │ │ add r0, pc, r0 │ │ b 2400ac8 │ │ - stc2l 9, cr0, [r4, #132]! @ 0x84 @ │ │ + stc2l 9, cr0, [r4, #222]! @ 0xde @ │ │ stc2l 4, cr12, [r4, #264]! @ 0x108 │ │ rsceq r0, r7, ip, lsr #6 │ │ rsceq r5, r7, ip, asr #4 │ │ ldr r0, [pc, #1588] @ 2401ab0 │ │ movw r5, #4999 @ 0x1387 │ │ ldr r1, [pc, #1584] @ 2401ab4 │ │ add r0, pc, r0 │ │ @@ -1237819,22 +1237818,22 @@ │ │ bhi 24014dc │ │ ldr r0, [pc, #1548] @ 2401ab8 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ ldr r4, [pc, #1540] @ 2401abc │ │ ldr r4, [pc, r4] │ │ b 2401520 │ │ - stc2l 9, cr0, [r4, #20]! @ │ │ + stc2l 9, cr0, [r4, #110]! @ 0x6e @ │ │ stc2l 4, cr12, [r4, #40]! @ 0x28 │ │ rsceq r0, r7, ip, ror #5 │ │ - stc2l 1, cr7, [r1, #948]! @ 0x3b4 │ │ - stc2l 0, cr5, [r2, #68]! @ 0x44 │ │ - stc2l 9, cr2, [r2, #266]! @ 0x10a @ │ │ + stc2l 2, cr7, [r1, #104]! @ 0x68 │ │ + stc2l 0, cr5, [r2, #248]! @ 0xf8 │ │ + stc2l 9, cr2, [r2, #356]! @ 0x164 @ │ │ ldrhteq r7, [r4], -r4 │ │ - stc2l 14, cr0, [r2, #600]! @ 0x258 │ │ + stc2l 14, cr0, [r2, #780]! @ 0x30c │ │ ldr r0, [pc, #1500] @ 2401ac0 │ │ movw r3, #3170 @ 0xc62 │ │ ldr r2, [pc, #1496] @ 2401ac4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #1484] @ 2401ac8 │ │ @@ -1237866,17 +1237865,17 @@ │ │ mov r1, r2 │ │ ldr r0, [fp, #20] │ │ bl 270dd90 │ │ ldr r0, [pc, #1444] @ 2401b14 │ │ add r0, pc, r0 │ │ b 2400ac8 │ │ rsceq fp, r6, r0, lsr #8 │ │ - stc2l 14, cr14, [r1, #692]! @ 0x2b4 │ │ - stc2l 2, cr9, [r1, #156]! @ 0x9c │ │ - stc2l 2, cr4, [r4, #100]! @ 0x64 │ │ + stc2l 14, cr14, [r1, #872]! @ 0x368 │ │ + stc2l 2, cr9, [r1, #336]! @ 0x150 │ │ + stc2l 2, cr4, [r4, #280]! @ 0x118 │ │ ldr r0, [pc, #1100] @ 24019d8 │ │ movw r5, #4999 @ 0x1387 │ │ ldr r1, [pc, #1096] @ 24019dc │ │ add r0, pc, r0 │ │ ldr r1, [pc, r1] │ │ str r1, [fp, #-40] @ 0xffffffd8 │ │ add r2, r1, #1 │ │ @@ -1237887,21 +1237886,21 @@ │ │ bhi 24016ac │ │ ldr r0, [pc, #1060] @ 24019e0 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ ldr r4, [pc, #1052] @ 24019e4 │ │ ldr r4, [pc, r4] │ │ b 24016f0 │ │ - stc2l 12, cr10, [r2, #800]! @ 0x320 │ │ + stc2l 12, cr10, [r2, #980]! @ 0x3d4 │ │ strhteq r9, [r7], #248 @ 0xf8 │ │ - stc2l 14, cr9, [r4, #940]! @ 0x3ac │ │ - stc2l 8, cr2, [r2, #740]! @ 0x2e4 │ │ + stc2l 15, cr9, [r4, #96]! @ 0x60 │ │ + vcmla.f16 q9, q9, q11, #270 │ │ rsceq r9, r7, ip, lsl pc │ │ - stc2l 13, cr0, [r2, #508]! @ 0x1fc │ │ - stc2l 9, cr14, [r3, #124]! @ 0x7c @ │ │ + stc2l 13, cr0, [r2, #688]! @ 0x2b0 │ │ + stc2l 9, cr14, [r3, #214]! @ 0xd6 @ │ │ ldr r0, [pc, #1260] @ 2401adc │ │ movw r3, #3171 @ 0xc63 │ │ ldr r2, [pc, #1256] @ 2401ae0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #1244] @ 2401ae4 │ │ @@ -1237937,15 +1237936,15 @@ │ │ ldr r2, [pc, #1160] @ 2401b08 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2401544 │ │ stc2l 12, cr13, [r4, #968]! @ 0x3c8 │ │ - stc2l 11, cr10, [r2, #784]! @ 0x310 @ │ │ + stc2l 11, cr10, [r2, #964]! @ 0x3c4 @ │ │ rsceq r9, r7, r8, asr #28 │ │ rsceq r9, r7, ip, lsr #28 │ │ rsceq r9, r7, r4, ror #28 │ │ rsceq r0, r7, r4, lsl #1 │ │ rsceq fp, r6, r8, asr r2 │ │ ldr r0, [pc, #820] @ 24019e8 │ │ movw r3, #2612 @ 0xa34 │ │ @@ -1237982,27 +1237981,27 @@ │ │ mov r1, r2 │ │ ldr r0, [fp, #20] │ │ bl 270dd90 │ │ ldr r0, [pc, #764] @ 2401a3c │ │ add r0, pc, r0 │ │ b 2400ac8 │ │ rsceq r0, r6, r0, lsl lr │ │ - stc2l 6, cr6, [r1, #684]! @ 0x2ac │ │ + stc2l 6, cr6, [r1, #864]! @ 0x360 │ │ mlaseq r4, r4, sp, r7 │ │ ldrdeq r1, [r6], #20 @ │ │ eorseq r7, r4, r0, lsl #27 │ │ rsceq r1, r6, r4, asr #11 │ │ rsceq r0, r7, ip, lsr #32 │ │ - stc2l 10, cr10, [r2, #912]! @ 0x390 @ │ │ + stc2l 11, cr10, [r2, #68]! @ 0x44 @ │ │ ldrdeq r9, [r7], #212 @ 0xd4 @ │ │ rsceq r9, r7, r8, asr #27 │ │ - stc2l 9, cr12, [r1, #46]! @ 0x2e @ │ │ + stc2l 9, cr12, [r1, #136]! @ 0x88 @ │ │ strdeq r4, [r7], #236 @ 0xec @ │ │ rsceq r9, r7, r4, lsl #27 │ │ - stc2l 14, cr6, [r1, #768]! @ 0x300 │ │ + stc2l 14, cr6, [r1, #948]! @ 0x3b4 │ │ rsceq r9, r7, r0, lsr sp │ │ rsceq r9, r7, ip, ror #26 │ │ rsceq r9, r7, r8, lsr #26 │ │ ldr r0, [pc, #628] @ 2401a04 │ │ movw r3, #2613 @ 0xa35 │ │ ldr r2, [pc, #624] @ 2401a08 │ │ add r0, pc, r0 │ │ @@ -1238040,108 +1238039,108 @@ │ │ movw r3, #2615 @ 0xa37 │ │ ldr r2, [pc, #528] @ 2401a30 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2401714 │ │ - stc2l 10, cr10, [r2, #288]! @ 0x120 @ │ │ - stc2l 12, cr9, [r4, #176]! @ 0xb0 │ │ + stc2l 10, cr10, [r2, #468]! @ 0x1d4 @ │ │ + stc2l 12, cr9, [r4, #356]! @ 0x164 │ │ stc2l 0, cr12, [r4, #184]! @ 0xb8 │ │ - stc2l 8, cr10, [r2, #864]! @ 0x360 │ │ + stc2l 9, cr10, [r2, #10]! @ │ │ rsceq r9, r7, r8, asr #23 │ │ - stc2l 10, cr9, [r4, #1004]! @ 0x3ec @ │ │ - stc2l 4, cr2, [r2, #804]! @ 0x324 │ │ - stc2l 9, cr0, [r2, #334]! @ 0x14e @ │ │ - stc2l 12, cr6, [r1, #756]! @ 0x2f4 │ │ - stc2l 10, cr9, [r4, #512]! @ 0x200 @ │ │ + stc2l 11, cr9, [r4, #160]! @ 0xa0 @ │ │ + stc2l 4, cr2, [r2, #984]! @ 0x3d8 │ │ + stc2l 9, cr0, [r2, #424]! @ 0x1a8 @ │ │ + stc2l 12, cr6, [r1, #936]! @ 0x3a8 │ │ + stc2l 10, cr9, [r4, #692]! @ 0x2b4 @ │ │ stc2l 14, cr11, [r4, #520]! @ 0x208 │ │ strdeq r0, [r6], #172 @ 0xac @ │ │ rsceq r9, r7, r0, ror #21 │ │ ldrdeq r1, [r6], #44 @ 0x2c @ │ │ rsceq r9, r7, r4, lsl #22 │ │ - stc2l 5, cr12, [r2, #224]! @ 0xe0 │ │ + stc2l 5, cr12, [r2, #404]! @ 0x194 │ │ stc2l 10, cr11, [r4, #536]! @ 0x218 @ │ │ rsceq r0, r6, r0, lsl #30 │ │ strdeq r0, [r6], #100 @ 0x64 @ │ │ rsceq r9, r7, r4, lsl r7 │ │ rsceq r6, r6, r8, ror #1 │ │ stc2l 10, cr11, [r4, #292]! @ 0x124 @ │ │ stc2l 10, cr11, [r4, #248]! @ 0xf8 @ │ │ ldrdeq r5, [r6], #204 @ 0xcc @ │ │ strhteq r0, [r6], #96 @ 0x60 │ │ - stc2l 15, cr15, [r3, #8]! │ │ + stc2l 15, cr15, [r3, #188]! @ 0xbc │ │ stc2l 10, cr11, [r4, #8]! @ │ │ rsceq pc, r6, r4, lsr #26 │ │ rsceq r4, r7, r8, asr ip │ │ - stc2l 12, cr6, [r1, #52]! @ 0x34 │ │ + stc2l 12, cr6, [r1, #232]! @ 0xe8 │ │ strdeq fp, [r6], #4 @ │ │ rsceq r0, r6, r0, lsr #25 │ │ rsceq r9, r7, r4, lsl #25 │ │ rsceq r1, r6, r4, lsl #9 │ │ rsceq r9, r7, ip, lsr #25 │ │ - stc2l 8, cr12, [r2, #496]! @ 0x1f0 │ │ + vcmla.f16 d28, d18, d25, #270 │ │ stc2l 13, cr11, [r4, #808]! @ 0x328 │ │ rsceq r1, r6, r8, asr #4 │ │ rsceq r0, r6, ip, lsr sl │ │ rsceq r9, r7, ip, asr sl │ │ smlaleq r6, r6, r0, r2 @ │ │ stc2l 13, cr11, [r4, #580]! @ 0x244 │ │ stc2l 13, cr11, [r4, #536]! @ 0x218 │ │ rsceq r6, r6, r4, lsr #32 │ │ strdeq r0, [r6], #152 @ 0x98 @ │ │ - stc2l 2, cr0, [r4, #296]! @ 0x128 │ │ + stc2l 2, cr0, [r4, #476]! @ 0x1dc │ │ stc2l 13, cr11, [r4, #296]! @ 0x128 │ │ rsceq pc, r6, ip, asr #29 │ │ rsceq r4, r7, r0, lsl #28 │ │ - stc2l 6, cr14, [r3, #376]! @ 0x178 │ │ - stc2l 5, cr2, [r3, #84]! @ 0x54 │ │ - stc2l 5, cr2, [r2, #308]! @ 0x134 │ │ + stc2l 6, cr14, [r3, #556]! @ 0x22c │ │ + stc2l 5, cr2, [r3, #264]! @ 0x108 │ │ + stc2l 5, cr2, [r2, #488]! @ 0x1e8 │ │ eorseq r7, r4, r4, ror fp │ │ - stc2l 15, cr1, [r3, #648]! @ 0x288 │ │ - stc2l 15, cr1, [r2, #740]! @ 0x2e4 │ │ - stc2l 0, cr14, [r3, #436]! @ 0x1b4 │ │ + stc2l 15, cr1, [r3, #828]! @ 0x33c │ │ + stc2l 15, cr1, [r2, #920]! @ 0x398 │ │ + stc2l 0, cr14, [r3, #616]! @ 0x268 │ │ stc2l 7, cr13, [r4, #648]! @ 0x288 │ │ - stc2l 6, cr10, [r2, #464]! @ 0x1d0 │ │ - stc2l 10, cr3, [r4, #4]! @ │ │ + stc2l 6, cr10, [r2, #644]! @ 0x284 │ │ + stc2l 10, cr3, [r4, #184]! @ 0xb8 @ │ │ strdeq r9, [r7], #132 @ 0x84 @ │ │ ldrdeq r9, [r7], #136 @ 0x88 @ │ │ rsceq r9, r7, r0, lsl r9 │ │ rsceq pc, r6, r0, lsr fp @ │ │ rsceq sl, r6, r4, lsl #26 │ │ strhteq r0, [r6], #136 @ 0x88 │ │ - stc2l 1, cr6, [r1, #332]! @ 0x14c │ │ + stc2l 1, cr6, [r1, #512]! @ 0x200 │ │ eorseq r7, r4, ip, lsr r8 │ │ rsceq r0, r6, ip, ror ip │ │ eorseq r7, r4, r8, lsr #16 │ │ rsceq r1, r6, ip, rrx │ │ ldrdeq pc, [r6], #164 @ 0xa4 @ │ │ - stc2l 5, cr10, [r2, #560]! @ 0x230 │ │ + stc2l 5, cr10, [r2, #740]! @ 0x2e4 │ │ rsceq r9, r7, ip, ror r8 │ │ rsceq r9, r7, r0, ror r8 │ │ rsceq sl, r6, r0, asr ip │ │ - stc2l 3, cr12, [r1, #732]! @ 0x2dc │ │ + stc2l 3, cr12, [r1, #912]! @ 0x390 │ │ smlaleq r4, r7, ip, r9 │ │ rsceq r9, r7, r0, lsr #16 │ │ rsceq r4, r7, r0, lsl #19 │ │ rsceq r9, r7, ip, asr #15 │ │ rsceq r9, r7, r8, lsl #16 │ │ rsceq r9, r7, r4, asr #15 │ │ rsceq r0, r6, r4, lsl r3 │ │ ldrshteq r7, [r4], -r4 │ │ rsceq r9, r7, ip, lsr #5 │ │ eorseq r7, r4, ip, ror r2 │ │ rsceq r9, r7, r4, ror #5 │ │ - stc2l 14, cr9, [r2, #672]! @ 0x2a0 │ │ + stc2l 14, cr9, [r2, #852]! @ 0x354 │ │ eorseq r7, r4, r4, lsl r1 │ │ - stc2l 10, cr1, [r3, #796]! @ 0x31c @ │ │ - stc2l 10, cr1, [r2, #628]! @ 0x274 @ │ │ + stc2l 10, cr1, [r3, #976]! @ 0x3d0 @ │ │ + stc2l 10, cr1, [r2, #808]! @ 0x328 @ │ │ strdeq r9, [r7], #12 @ │ │ - stc2l 5, cr1, [r4, #584]! @ 0x248 │ │ - stc2l 3, cr3, [r4, #388]! @ 0x184 │ │ + stc2l 5, cr1, [r4, #764]! @ 0x2fc │ │ + stc2l 3, cr3, [r4, #568]! @ 0x238 │ │ smlaleq sl, r6, r8, r6 │ │ eorseq r7, r4, r4, ror r1 │ │ rsceq r9, r7, r0, ror r2 │ │ smlaleq pc, r6, r4, r4 @ │ │ strdeq r9, [r7], #24 @ │ │ ldrhteq r7, [r4], -r0 │ │ strdeq r0, [r6], #80 @ 0x50 @ │ │ @@ -1238150,53 +1238149,53 @@ │ │ rsceq pc, r6, r8, lsr #8 │ │ eorseq r7, r4, ip, asr #2 │ │ rsceq r0, r6, r0, lsr #3 │ │ rsceq pc, r5, ip, asr #31 │ │ rsceq pc, r5, r8, asr #31 │ │ rsceq sl, r6, ip, ror #7 │ │ rsceq r8, r7, ip, lsl #31 │ │ - stc2l 14, cr8, [r4, #80]! @ 0x50 │ │ + stc2l 14, cr8, [r4, #260]! @ 0x104 │ │ stc2l 2, cr11, [r4, #88]! @ 0x58 │ │ ldrdeq sl, [r6], #44 @ 0x2c @ │ │ rsceq pc, r5, r8, lsl #29 │ │ rsceq r8, r7, r8, ror #28 │ │ rsceq r0, r6, r8, ror #12 │ │ smlaleq r8, r7, r0, lr │ │ - stc2l 11, cr11, [r2, #944]! @ 0x3b0 @ │ │ + stc2l 12, cr11, [r2, #100]! @ 0x64 │ │ stc2l 1, cr11, [r4, #232]! @ 0xe8 │ │ strhteq r0, [r6], #88 @ 0x58 │ │ rsceq pc, r5, ip, lsr #27 │ │ rsceq r8, r7, r8, asr #27 │ │ rsceq r5, r6, r0, ror r4 │ │ stc2l 0, cr11, [r4, #1012]! @ 0x3f4 │ │ stc2l 0, cr11, [r4, #968]! @ 0x3c8 │ │ smlaleq r5, r6, r0, r3 │ │ rsceq pc, r5, r4, ror #26 │ │ - stc2l 5, cr15, [r3, #712]! @ 0x2c8 │ │ + stc2l 5, cr15, [r3, #892]! @ 0x37c │ │ stc2l 0, cr11, [r4, #712]! @ 0x2c8 │ │ rsceq pc, r6, ip, lsr #1 │ │ rsceq r3, r7, r0, ror #31 │ │ - stc2l 0, cr3, [r4, #516]! @ 0x204 │ │ - stc2l 0, cr2, [r3, #712]! @ 0x2c8 │ │ - stc2l 0, cr2, [r2, #804]! @ 0x324 │ │ - stc2l 1, cr14, [r3, #500]! @ 0x1f4 │ │ + stc2l 0, cr3, [r4, #696]! @ 0x2b8 │ │ + stc2l 0, cr2, [r3, #892]! @ 0x37c │ │ + stc2l 0, cr2, [r2, #984]! @ 0x3d8 │ │ + stc2l 1, cr14, [r3, #680]! @ 0x2a8 │ │ rsceq r9, r7, ip, ror #10 │ │ rsceq r0, r6, r8, lsl #11 │ │ rsceq sl, r6, r8, lsr #19 │ │ eorseq r7, r4, r4, lsr #9 │ │ ldrshteq r7, [r4], -r4 │ │ rsceq r0, r6, r8, asr #10 │ │ rsceq r9, r7, r8, ror #10 │ │ - stc2l 1, cr10, [r2, #224]! @ 0xe0 │ │ + stc2l 1, cr10, [r2, #404]! @ 0x194 │ │ eorseq r7, r4, r4, lsr #7 │ │ - stc2l 13, cr1, [r3, #348]! @ 0x15c │ │ - stc2l 13, cr1, [r2, #180]! @ 0xb4 │ │ + stc2l 13, cr1, [r3, #528]! @ 0x210 │ │ + stc2l 13, cr1, [r2, #360]! @ 0x168 │ │ rsceq r9, r7, ip, lsl #7 │ │ - vcmla.f16 d17, d4, d18, #270 │ │ - stc2l 0, cr10, [r2, #880]! @ 0x370 │ │ + vcmla.f16 , q2, , #270 │ │ + stc2l 1, cr10, [r2, #36]! @ 0x24 │ │ rsceq sl, r6, r0, lsr #18 │ │ eorseq r7, r4, r8, lsr r4 │ │ strdeq r9, [r7], #72 @ 0x48 @ │ │ rsceq pc, r6, ip, lsl r7 @ │ │ eorseq r7, r4, r0, asr #8 │ │ rsceq r0, r6, r0, lsl #17 │ │ eorseq r7, r4, r8, ror #7 │ │ @@ -1238204,36 +1238203,36 @@ │ │ strhteq pc, [r6], #104 @ 0x68 @ │ │ ldrsbteq r7, [r4], -ip │ │ rsceq r0, r6, r0, lsr r4 │ │ ldrdeq r0, [r6], #12 @ │ │ ldrdeq r0, [r6], #8 @ │ │ strdeq sl, [r6], #76 @ 0x4c @ │ │ smlaleq r9, r7, ip, r0 │ │ - stc2l 15, cr8, [r4, #912]! @ 0x390 │ │ + stc2l 0, cr9, [r4, #68]! @ 0x44 │ │ stc2l 3, cr11, [r4, #920]! @ 0x398 │ │ rsceq sl, r6, ip, lsr #9 │ │ rsceq r0, r6, r8, asr r0 │ │ rsceq r9, r7, r8, lsr r0 │ │ rsceq r0, r6, r8, lsr r8 │ │ rsceq r9, r7, r0, rrx │ │ - stc2l 13, cr11, [r2, #560]! @ 0x230 │ │ + stc2l 13, cr11, [r2, #740]! @ 0x2e4 │ │ stc2l 2, cr11, [r4, #872]! @ 0x368 │ │ rsceq r0, r6, r8, asr r7 │ │ rsceq pc, r5, ip, asr #30 │ │ rsceq r8, r7, r8, ror #30 │ │ rsceq r5, r6, r0, asr #12 │ │ stc2l 2, cr11, [r4, #628]! @ 0x274 │ │ stc2l 2, cr11, [r4, #584]! @ 0x248 │ │ rsceq r5, r6, r0, lsr r5 │ │ rsceq pc, r5, r4, lsl #30 │ │ - stc2l 7, cr15, [r3, #328]! @ 0x148 │ │ + stc2l 7, cr15, [r3, #508]! @ 0x1fc │ │ stc2l 2, cr11, [r4, #328]! @ 0x148 │ │ rsceq pc, r6, ip, ror r2 @ │ │ strhteq r4, [r7], #16 │ │ - stc2l 13, cr9, [r2, #240]! @ 0xf0 │ │ + stc2l 13, cr9, [r2, #420]! @ 0x1a4 │ │ │ │ 02401b18 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 2401b34 │ │ @@ -1238250,15 +1238249,15 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ stc2l 13, cr10, [r4, #576]! @ 0x240 │ │ - stc2l 9, cr8, [r4, #26]! @ │ │ + stc2l 9, cr8, [r4, #116]! @ 0x74 @ │ │ │ │ 02401b74 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #48 @ 0x30 │ │ mov r3, r0 │ │ mov r0, #0 │ │ @@ -1238440,16 +1238439,16 @@ │ │ bl 270e110 │ │ mov r0, r6 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 8, cr5, [r1, #996]! @ 0x3e4 │ │ - stc2l 4, cr9, [r2, #640]! @ 0x280 │ │ + stc2l 9, cr5, [r1, #76]! @ 0x4c @ │ │ + stc2l 4, cr9, [r2, #820]! @ 0x334 │ │ eorseq r6, r4, r8, lsl #14 │ │ │ │ 02401e3c : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #48 @ 0x30 │ │ mov r2, #0 │ │ @@ -1238552,20 +1238551,20 @@ │ │ bl 270d1b0 │ │ ldr r0, [pc, #36] @ 2401fe4 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 3, cr7, [r2, #380]! @ 0x17c │ │ + stc2l 3, cr7, [r2, #560]! @ 0x230 │ │ ldrdeq pc, [r5], #92 @ 0x5c @ │ │ eorseq r6, r4, r4, ror #10 │ │ rsceq r3, r7, ip, ror #14 │ │ rsceq r3, r7, r4, asr r7 │ │ - stc2l 3, cr7, [r2, #60]! @ 0x3c │ │ + stc2l 3, cr7, [r2, #240]! @ 0xf0 │ │ │ │ 02401fe8 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #48 @ 0x30 │ │ mov r3, #0 │ │ str r2, [sp, #40] @ 0x28 │ │ @@ -1238645,17 +1238644,17 @@ │ │ mov r0, r9 │ │ mov r2, r8 │ │ mov r3, #128 @ 0x80 │ │ bl 270d9f0 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - stc2l 13, cr4, [r1, #700]! @ 0x2bc │ │ - stc2l 13, cr4, [r1, #28]! │ │ - stc2l 14, cr2, [r1, #400]! @ 0x190 │ │ + stc2l 13, cr4, [r1, #880]! @ 0x370 │ │ + stc2l 13, cr4, [r1, #208]! @ 0xd0 │ │ + stc2l 14, cr2, [r1, #580]! @ 0x244 │ │ │ │ 02402140 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #260 @ 0x104 │ │ ldr r8, [r0, #8] │ │ mov r9, r0 │ │ @@ -1238946,29 +1238945,29 @@ │ │ bl 270e1b0 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ eorseq r9, r3, r0, asr #3 │ │ eorseq r9, r3, r4, ror #2 │ │ eorseq r9, r3, r8, ror #1 │ │ - stc2l 11, cr10, [r3, #480]! @ 0x1e0 @ │ │ - stc2l 15, cr6, [r2, #648]! @ 0x288 │ │ - stc2l 15, cr7, [r3, #720]! @ 0x2d0 │ │ + stc2l 11, cr10, [r3, #660]! @ 0x294 @ │ │ + stc2l 15, cr6, [r2, #828]! @ 0x33c │ │ + stc2l 15, cr7, [r3, #900]! @ 0x384 │ │ stc2l 13, cr15, [r0, #568]! @ 0x238 │ │ stc2l 13, cr15, [r0, #392]! @ 0x188 │ │ - stc2l 15, cr7, [r3, #272]! @ 0x110 │ │ + stc2l 15, cr7, [r3, #452]! @ 0x1c4 │ │ stc2l 12, cr15, [r0, #728]! @ 0x2d8 │ │ - stc2l 10, cr6, [r3, #32]! @ │ │ - stc2l 6, cr4, [r3, #384]! @ 0x180 │ │ - stc2l 14, cr7, [r3, #608]! @ 0x260 │ │ - stc2l 14, cr7, [r3, #432]! @ 0x1b0 │ │ + stc2l 10, cr6, [r3, #212]! @ 0xd4 @ │ │ + stc2l 6, cr4, [r3, #564]! @ 0x234 │ │ + stc2l 14, cr7, [r3, #788]! @ 0x314 │ │ + stc2l 14, cr7, [r3, #612]! @ 0x264 │ │ stc2l 12, cr15, [r0, #472]! @ 0x1d8 │ │ - stc2l 15, cr8, [r1, #684]! @ 0x2ac │ │ - vcmla.f16 , , q7, #270 │ │ - stc2l 8, cr0, [r1, #848]! @ 0x350 │ │ + stc2l 15, cr8, [r1, #864]! @ 0x360 │ │ + stc2l 8, cr15, [r3, #1004]! @ 0x3ec │ │ + stc2l 9, cr0, [r1, #2]! @ │ │ │ │ 0240261c : │ │ push {fp, lr} │ │ mov fp, sp │ │ bl 27030a0 │ │ bl 270e1c0 │ │ clz r0, r0 │ │ @@ -1239099,43 +1239098,43 @@ │ │ bl 270aba0 │ │ ldr r0, [pc, #128] @ 24028a4 │ │ mov r1, #1 │ │ add r0, pc, r0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, lr} │ │ b 270e1e0 │ │ - stc2l 13, cr10, [r2, #176]! @ 0xb0 │ │ + stc2l 13, cr10, [r2, #356]! @ 0x164 │ │ ldrsbteq r5, [r3], -r0 │ │ ldrhteq r5, [r3], -ip │ │ - stc2l 12, cr8, [r2, #336]! @ 0x150 │ │ - stc2l 14, cr4, [r2, #892]! @ 0x37c │ │ + stc2l 12, cr8, [r2, #516]! @ 0x204 │ │ + stc2l 15, cr4, [r2, #48]! @ 0x30 │ │ mlaseq r3, r4, ip, r8 │ │ eorseq r5, r3, r0, lsl #13 │ │ eorseq r8, r3, r8, ror ip │ │ eorseq r8, r3, r0, asr ip │ │ stc2l 12, cr11, [r4, #864]! @ 0x360 │ │ stc2l 12, cr11, [r4, #872]! @ 0x368 │ │ - vcmla.f16 q14, , , #270 │ │ - stc2l 9, cr12, [r3, #146]! @ 0x92 @ │ │ + stc2l 9, cr12, [r3, #48]! @ 0x30 @ │ │ + stc2l 9, cr12, [r3, #236]! @ 0xec @ │ │ eorseq r8, r3, r0, lsl #24 │ │ - stc2l 11, cr12, [r2, #896]! @ 0x380 @ │ │ - stc2l 13, cr2, [r2, #884]! @ 0x374 │ │ - stc2l 12, cr14, [r1, #640]! @ 0x280 │ │ + stc2l 12, cr12, [r2, #52]! @ 0x34 │ │ + stc2l 14, cr2, [r2, #40]! @ 0x28 │ │ + stc2l 12, cr14, [r1, #820]! @ 0x334 │ │ eorseq r8, r3, ip, asr #23 │ │ eorseq r8, r3, r4, asr #23 │ │ ldrhteq r8, [r3], -ip │ │ eorseq r8, r3, ip, lsr #23 │ │ - stc2l 3, cr4, [r3, #204]! @ 0xcc │ │ - stc2l 14, cr3, [r4, #176]! @ 0xb0 │ │ - stc2l 7, cr0, [r2, #324]! @ 0x144 │ │ - stc2l 6, cr10, [r3, #820]! @ 0x334 │ │ - stc2l 7, cr0, [r3, #96]! @ 0x60 │ │ - stc2l 15, cr1, [r4, #752]! @ 0x2f0 │ │ - stc2l 10, cr6, [r2, #1000]! @ 0x3e8 @ │ │ - stc2l 10, cr6, [r2, #996]! @ 0x3e4 @ │ │ + stc2l 3, cr4, [r3, #384]! @ 0x180 │ │ + stc2l 14, cr3, [r4, #356]! @ 0x164 │ │ + stc2l 7, cr0, [r2, #504]! @ 0x1f8 │ │ + stc2l 6, cr10, [r3, #1000]! @ 0x3e8 │ │ + stc2l 7, cr0, [r3, #276]! @ 0x114 │ │ + stc2l 15, cr1, [r4, #932]! @ 0x3a4 │ │ + stc2l 11, cr6, [r2, #156]! @ 0x9c @ │ │ + stc2l 11, cr6, [r2, #152]! @ 0x98 @ │ │ │ │ 024028a8 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r0, [pc, #164] @ 240295c │ │ mov r5, #1 │ │ ldr r0, [pc, r0] │ │ @@ -1239396,18 +1239395,18 @@ │ │ vld1.32 {d16-d17}, [r3]! │ │ subs r1, r1, #4 │ │ vst1.32 {d16-d17}, [r2]! │ │ bne 2402c94 │ │ cmp r0, ip │ │ bne 2402c00 │ │ b 2402c24 │ │ - stc2l 9, cr4, [r2, #446]! @ 0x1be @ │ │ - stc2l 6, cr8, [r2, #740]! @ 0x2e4 │ │ - stc2l 6, cr12, [r2, #20]! │ │ - stc2l 9, cr4, [r2, #86]! @ 0x56 @ │ │ + stc2l 10, cr4, [r2, #48]! @ 0x30 @ │ │ + stc2l 6, cr8, [r2, #920]! @ 0x398 │ │ + stc2l 6, cr12, [r2, #200]! @ 0xc8 │ │ + stc2l 9, cr4, [r2, #176]! @ 0xb0 @ │ │ │ │ 02402cc0 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r5, r0 │ │ bl 270ce10 │ │ mov r4, #0 │ │ @@ -1239469,24 +1239468,24 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #52] @ 2402df0 │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, r4 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - vcmla.f16 d23, d4, d27, #270 │ │ - stc2l 15, cr9, [r3, #292]! @ 0x124 │ │ - stc2l 1, cr0, [r2, #356]! @ 0x164 │ │ - stc2l 6, cr2, [r2, #620]! @ 0x26c │ │ - stc2l 0, cr2, [r1, #784]! @ 0x310 │ │ - stc2l 1, cr0, [r2, #164]! @ 0xa4 │ │ - stc2l 10, cr6, [r1, #716]! @ 0x2cc @ │ │ - stc2l 1, cr0, [r2, #564]! @ 0x234 │ │ - stc2l 12, cr5, [r4, #200]! @ 0xc8 │ │ - stc2l 7, cr7, [r4, #364]! @ 0x16c │ │ + stc2l 8, cr7, [r4, #352]! @ 0x160 │ │ + stc2l 15, cr9, [r3, #472]! @ 0x1d8 │ │ + stc2l 1, cr0, [r2, #536]! @ 0x218 │ │ + stc2l 6, cr2, [r2, #800]! @ 0x320 │ │ + stc2l 0, cr2, [r1, #964]! @ 0x3c4 │ │ + stc2l 1, cr0, [r2, #344]! @ 0x158 │ │ + stc2l 10, cr6, [r1, #896]! @ 0x380 @ │ │ + stc2l 1, cr0, [r2, #744]! @ 0x2e8 │ │ + stc2l 12, cr5, [r4, #380]! @ 0x17c │ │ + stc2l 7, cr7, [r4, #544]! @ 0x220 │ │ │ │ 02402df4 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #328 @ 0x148 │ │ mov r4, r2 │ │ mov r5, r1 │ │ @@ -1239572,27 +1239571,27 @@ │ │ ldr r0, [pc, #68] @ 2402f90 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - stc2l 8, cr4, [r1, #876]! @ 0x36c │ │ - stc2l 6, cr12, [r1, #100]! @ 0x64 │ │ + stc2l 9, cr4, [r1, #16]! @ │ │ + stc2l 6, cr12, [r1, #280]! @ 0x118 │ │ eorseq r5, r4, r0, lsr r7 │ │ - stc2l 9, cr1, [r4, #134]! @ 0x86 @ │ │ + stc2l 9, cr1, [r4, #224]! @ 0xe0 @ │ │ eorseq r5, r4, r4, lsl #14 │ │ - stc2l 7, cr3, [r4, #280]! @ 0x118 │ │ + stc2l 7, cr3, [r4, #460]! @ 0x1cc │ │ eorseq r5, r4, r8, asr #13 │ │ - vcmla.f16 , q10, , #270 │ │ + stc2l 9, cr1, [r4, #56]! @ 0x38 @ │ │ eorseq r5, r4, r8, lsr #13 │ │ - stc2l 1, cr14, [r1, #944]! @ 0x3b0 │ │ + stc2l 2, cr14, [r1, #100]! @ 0x64 │ │ rsceq r8, r7, ip, lsl #19 │ │ - stc2l 15, cr3, [r1, #396]! @ 0x18c │ │ - stc2l 7, cr4, [r1, #700]! @ 0x2bc │ │ + stc2l 15, cr3, [r1, #576]! @ 0x240 │ │ + stc2l 7, cr4, [r1, #880]! @ 0x370 │ │ │ │ 02402f94 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r5, r1 │ │ mov r4, r0 │ │ @@ -1239620,15 +1239619,15 @@ │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, r4 │ │ cmp r4, #0 │ │ movwne r0, #1 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 6, cr3, [r4, #284]! @ 0x11c │ │ + stc2l 6, cr3, [r4, #464]! @ 0x1d0 │ │ │ │ 0240301c : │ │ ldr r1, [r1] │ │ mov r3, r0 │ │ mov r0, #0 │ │ cmp r1, #1 │ │ bxlt lr │ │ @@ -1239751,22 +1239750,22 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 13, cr15, [r0, #260]! @ 0x104 │ │ - stc2l 4, cr8, [r1, #52]! @ 0x34 │ │ - stc2l 13, cr15, [r1, #564]! @ 0x234 │ │ - stc2l 2, cr12, [r2, #20]! │ │ - stc2l 13, cr9, [r3, #64]! @ 0x40 │ │ - stc2l 3, cr2, [r2, #616]! @ 0x268 │ │ - stc2l 12, cr15, [r1, #900]! @ 0x384 │ │ - stc2l 1, cr12, [r2, #436]! @ 0x1b4 │ │ + stc2l 13, cr15, [r0, #440]! @ 0x1b8 │ │ + stc2l 4, cr8, [r1, #232]! @ 0xe8 │ │ + stc2l 13, cr15, [r1, #744]! @ 0x2e8 │ │ + stc2l 2, cr12, [r2, #200]! @ 0xc8 │ │ + stc2l 13, cr9, [r3, #244]! @ 0xf4 │ │ + stc2l 3, cr2, [r2, #796]! @ 0x31c │ │ + stc2l 13, cr15, [r1, #56]! @ 0x38 │ │ + stc2l 1, cr12, [r2, #616]! @ 0x268 │ │ │ │ 0240322c : │ │ push {fp, lr} │ │ mov fp, sp │ │ mov r3, r2 │ │ mov r2, r1 │ │ mov r1, r0 │ │ @@ -1239868,19 +1239867,19 @@ │ │ ldr r0, [pc, #36] @ 24033d8 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - stc2l 9, cr1, [r3, #406]! @ 0x196 @ │ │ - stc2l 13, cr9, [r1, #588]! @ 0x24c │ │ - stc2l 11, cr15, [r1, #180]! @ 0xb4 @ │ │ - stc2l 10, cr5, [r3, #72]! @ 0x48 @ │ │ - vcmla.f16 d17, d19, d27, #270 │ │ + stc2l 9, cr1, [r3, #496]! @ 0x1f0 @ │ │ + stc2l 13, cr9, [r1, #768]! @ 0x300 │ │ + stc2l 11, cr15, [r1, #360]! @ 0x168 @ │ │ + stc2l 10, cr5, [r3, #252]! @ 0xfc @ │ │ + stc2l 8, cr1, [r3, #864]! @ 0x360 │ │ │ │ 024033dc : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [pc, #528] @ 2403600 │ │ ldr r0, [pc, r0] │ │ @@ -1240019,22 +1240018,22 @@ │ │ eorseq r7, r3, ip, ror pc │ │ eorseq r7, r3, ip, asr pc │ │ eorseq r7, r3, r8, lsl #31 │ │ eorseq r7, r3, r0, lsr pc │ │ eorseq r7, r3, r8, lsr #30 │ │ eorseq r7, r3, r8, lsl #30 │ │ ldrshteq r7, [r3], -r8 │ │ - stc2l 2, cr4, [r1, #216]! @ 0xd8 │ │ + stc2l 2, cr4, [r1, #396]! @ 0x18c │ │ ldrshteq r7, [r3], -r0 │ │ ldrsbteq r7, [r3], -r0 │ │ - stc2l 3, cr1, [r4, #12]! │ │ - stc2l 15, cr7, [r1, #984]! @ 0x3d8 │ │ - stc2l 15, cr7, [r1, #568]! @ 0x238 │ │ - stc2l 15, cr7, [r1, #424]! @ 0x1a8 │ │ - stc2l 2, cr1, [r4, #12]! │ │ + stc2l 3, cr1, [r4, #192]! @ 0xc0 │ │ + stc2l 0, cr8, [r1, #140]! @ 0x8c │ │ + stc2l 15, cr7, [r1, #748]! @ 0x2ec │ │ + stc2l 15, cr7, [r1, #604]! @ 0x25c │ │ + stc2l 2, cr1, [r4, #192]! @ 0xc0 │ │ │ │ 0240363c : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r1, [pc, #124] @ 24036c8 │ │ mov r4, r0 │ │ mov r0, #1 │ │ @@ -1240066,15 +1240065,15 @@ │ │ ldr r0, [r4] │ │ add r1, pc, r1 │ │ bl 270d8c0 │ │ ldr r0, [r4] │ │ pop {r4, r5, fp, pc} │ │ eorseq r7, r3, ip, lsl #26 │ │ eorseq r7, r3, r0, ror #25 │ │ - stc2l 8, cr1, [r1, #872]! @ 0x368 │ │ + stc2l 9, cr1, [r1, #14]! @ │ │ │ │ 024036d4 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r1, [pc, #120] @ 240375c │ │ mov r4, r0 │ │ mov r0, #0 │ │ @@ -1240105,15 +1240104,15 @@ │ │ ldr r0, [r4] │ │ add r1, pc, r1 │ │ bl 270d8c0 │ │ ldr r0, [r4] │ │ pop {r4, r5, fp, pc} │ │ eorseq r7, r3, r4, ror ip │ │ eorseq r7, r3, r8, asr #24 │ │ - stc2l 5, cr1, [r3, #104]! @ 0x68 │ │ + stc2l 5, cr1, [r3, #284]! @ 0x11c │ │ │ │ 02403768 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r4, [pc, #164] @ 240381c │ │ ldr r4, [pc, r4] │ │ ldr r0, [r4] │ │ @@ -1240157,15 +1240156,15 @@ │ │ bl 270d8c0 │ │ mov r0, #200 @ 0xc8 │ │ pop {r4, r5, fp, pc} │ │ ldrsbteq r7, [r3], -r8 │ │ eorseq r7, r3, ip, lsl #24 │ │ eorseq r7, r3, r0, asr #23 │ │ mlaseq r3, r8, fp, r7 │ │ - stc2l 11, cr11, [r2, #408]! @ 0x198 @ │ │ + stc2l 11, cr11, [r2, #588]! @ 0x24c @ │ │ │ │ 02403830 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r4, [pc, #164] @ 24038e4 │ │ ldr r4, [pc, r4] │ │ ldr r0, [r4] │ │ @@ -1240209,15 +1240208,15 @@ │ │ bl 270d8c0 │ │ mov r0, #200 @ 0xc8 │ │ pop {r4, r5, fp, pc} │ │ eorseq r7, r3, r0, lsl fp │ │ eorseq r7, r3, r4, asr #22 │ │ ldrshteq r7, [r3], -r8 │ │ ldrsbteq r7, [r3], -r0 │ │ - stc2l 10, cr11, [r2, #632]! @ 0x278 @ │ │ + stc2l 10, cr11, [r2, #812]! @ 0x32c @ │ │ │ │ 024038f8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ mov r5, r3 │ │ mov r7, r2 │ │ @@ -1241255,24 +1241254,24 @@ │ │ bcc 2404df0 │ │ ldr r0, [pc, #4048] @ 2405904 │ │ movw r3, #2691 @ 0xa83 │ │ ldr r2, [pc, #4044] @ 2405908 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ b 2404de0 │ │ - stc2l 12, cr1, [r2, #84]! @ 0x54 │ │ - stc2l 7, cr9, [r1, #504]! @ 0x1f8 │ │ - stc2l 11, cr1, [r2, #916]! @ 0x394 @ │ │ - stc2l 7, cr13, [r2, #528]! @ 0x210 │ │ + stc2l 12, cr1, [r2, #264]! @ 0x108 │ │ + stc2l 7, cr9, [r1, #684]! @ 0x2ac │ │ + stc2l 12, cr1, [r2, #72]! @ 0x48 │ │ + stc2l 7, cr13, [r2, #708]! @ 0x2c4 │ │ orreq r8, r2, r4, asr lr │ │ ldrsbteq r4, [r4], -r0 │ │ - stc2l 11, cr6, [r4, #132]! @ 0x84 @ │ │ - stc2l 10, cr11, [r1, #520]! @ 0x208 @ │ │ + stc2l 11, cr6, [r4, #312]! @ 0x138 @ │ │ + stc2l 10, cr11, [r1, #700]! @ 0x2bc @ │ │ smlaleq sp, r7, r8, r4 │ │ - stc2l 6, cr9, [r1, #920]! @ 0x398 │ │ + stc2l 7, cr9, [r1, #76]! @ 0x4c │ │ ldr sl, [pc, #4072] @ 240595c │ │ mov r0, #1 │ │ add sl, pc, sl │ │ str r0, [sl] │ │ ldr r0, [pc, #4060] @ 2405960 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4056] @ 2405964 │ │ @@ -1241314,31 +1241313,31 @@ │ │ bcc 24053d8 │ │ ldr r0, [pc, #4020] @ 24059d4 │ │ movw r3, #1687 @ 0x697 │ │ ldr r2, [pc, #4016] @ 24059d8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ b 24053c8 │ │ - stc2l 7, cr13, [r2, #16]! │ │ + stc2l 7, cr13, [r2, #196]! @ 0xc4 │ │ stc2l 15, cr8, [r4, #200]! @ 0xc8 │ │ @ instruction: 0x01828dbc │ │ eorseq r4, r4, r8, lsr fp │ │ - stc2l 10, cr6, [r4, #548]! @ 0x224 @ │ │ - stc2l 9, cr11, [r1, #468]! @ 0x1d4 @ │ │ + stc2l 10, cr6, [r4, #728]! @ 0x2d8 @ │ │ + stc2l 10, cr11, [r1, #92]! @ 0x5c @ │ │ rsceq sp, r7, r0, lsl #8 │ │ - stc2l 6, cr9, [r1, #312]! @ 0x138 │ │ + stc2l 6, cr9, [r1, #492]! @ 0x1ec │ │ stc2l 14, cr8, [r4, #712]! @ 0x2c8 │ │ - stc2l 10, cr7, [r1, #428]! @ 0x1ac @ │ │ - stc2l 6, cr9, [r1, #24]! │ │ - stc2l 10, cr7, [r1, #236]! @ 0xec @ │ │ - stc2l 2, cr13, [r3, #768]! @ 0x300 │ │ + stc2l 10, cr7, [r1, #608]! @ 0x260 @ │ │ + stc2l 6, cr9, [r1, #204]! @ 0xcc │ │ + stc2l 10, cr7, [r1, #416]! @ 0x1a0 @ │ │ + stc2l 2, cr13, [r3, #948]! @ 0x3b4 │ │ ldrdeq r8, [r2, ip] │ │ eorseq r4, r4, r8, asr sl │ │ - stc2l 9, cr6, [r4, #322]! @ 0x142 @ │ │ - stc2l 9, cr11, [r1, #4]! @ │ │ + stc2l 9, cr6, [r4, #412]! @ 0x19c @ │ │ + stc2l 9, cr11, [r1, #94]! @ 0x5e @ │ │ ldr r1, [pc, #4040] @ 2405a44 │ │ mov r0, #1 │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ ldr r0, [pc, #4028] @ 2405a48 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4024] @ 2405a4c │ │ @@ -1241401,18 +1241400,18 @@ │ │ add r0, pc, r0 │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ rsceq sp, r7, r8, lsl r3 │ │ - stc2l 5, cr9, [r1, #408]! @ 0x198 │ │ + stc2l 5, cr9, [r1, #588]! @ 0x24c │ │ orreq r8, r2, r8, asr ip │ │ orreq sp, r3, r4, ror #3 │ │ - stc2l 3, cr15, [r1, #292]! @ 0x124 │ │ + stc2l 3, cr15, [r1, #472]! @ 0x1d8 │ │ orreq r8, r2, r4, lsl ip │ │ mlaseq r4, r0, r9, r4 │ │ ldr r0, [pc, #4048] @ 2405b7c │ │ movw r3, #3238 @ 0xca6 │ │ ldr r2, [pc, #4044] @ 2405b80 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1241434,26 +1241433,26 @@ │ │ ldr r0, [r5, r1, lsl #2] │ │ cmp r0, #0 │ │ ble 24059dc │ │ ldr r0, [pc, #3980] @ 2405b94 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ b 2404b78 │ │ - vcmla.f16 q11, q10, , #270 │ │ - vcmla.f16 , , q1, #270 │ │ + stc2l 9, cr6, [r4, #28]! @ │ │ + vcmla.f16 , , , #270 │ │ rsceq sp, r7, r8, asr r2 │ │ - stc2l 2, cr7, [r3, #816]! @ 0x330 │ │ - stc2l 2, cr15, [r1, #804]! @ 0x324 │ │ - stc2l 8, cr1, [r2, #1008]! @ 0x3f0 │ │ + stc2l 2, cr7, [r3, #996]! @ 0x3e4 │ │ + stc2l 2, cr15, [r1, #984]! @ 0x3d8 │ │ + stc2l 9, cr1, [r2, #82]! @ 0x52 @ │ │ orreq r8, r2, r4, ror fp │ │ ldrshteq r4, [r4], -r0 │ │ - vcmla.f16 q11, q2, , #270 │ │ - stc2l 7, cr11, [r1, #648]! @ 0x288 │ │ + vcmla.f16 q11, q2, q15, #270 │ │ + stc2l 7, cr11, [r1, #828]! @ 0x33c │ │ strhteq sp, [r7], #24 │ │ - stc2l 4, cr9, [r1, #24]! │ │ + stc2l 4, cr9, [r1, #204]! @ 0xcc │ │ ldr r0, [pc, #3920] @ 2405b98 │ │ movw r3, #2227 @ 0x8b3 │ │ ldr r2, [pc, #3916] @ 2405b9c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r4, [pc, #3904] @ 2405ba0 │ │ @@ -1241500,39 +1241499,39 @@ │ │ sub r4, r0, #1 │ │ cmp r4, r5 │ │ bcs 2407158 │ │ mov r3, r4 │ │ b 24071b4 │ │ strdeq r8, [r2, r8] │ │ orreq sp, r3, r4, lsl #1 │ │ - stc2l 10, cr5, [r1, #884]! @ 0x374 @ │ │ + stc2l 11, cr5, [r1, #40]! @ 0x28 @ │ │ @ instruction: 0x01828ab4 │ │ eorseq r4, r4, r0, lsr r8 │ │ - stc2l 7, cr6, [r4, #516]! @ 0x204 │ │ - stc2l 6, cr11, [r1, #904]! @ 0x388 │ │ + stc2l 7, cr6, [r4, #696]! @ 0x2b8 │ │ + stc2l 7, cr11, [r1, #60]! @ 0x3c │ │ strdeq sp, [r7], #8 @ │ │ - stc2l 3, cr9, [r1, #280]! @ 0x118 │ │ - stc2l 10, cr5, [r1, #372]! @ 0x174 @ │ │ - stc2l 12, cr14, [r3, #80]! @ 0x50 │ │ + stc2l 3, cr9, [r1, #460]! @ 0x1cc │ │ + stc2l 10, cr5, [r1, #552]! @ 0x228 @ │ │ + stc2l 12, cr14, [r3, #260]! @ 0x104 │ │ orreq r8, r2, ip, lsl sl │ │ mlaseq r4, r8, r7, r4 │ │ - stc2l 6, cr6, [r4, #932]! @ 0x3a4 │ │ - stc2l 6, cr11, [r1, #296]! @ 0x128 │ │ + stc2l 7, cr6, [r4, #88]! @ 0x58 │ │ + stc2l 6, cr11, [r1, #476]! @ 0x1dc │ │ rsceq sp, r7, r0, rrx │ │ - stc2l 2, cr9, [r1, #696]! @ 0x2b8 │ │ - stc2l 11, cr14, [r3, #592]! @ 0x250 @ │ │ - stc2l 7, cr2, [r4, #580]! @ 0x244 │ │ - stc2l 2, cr9, [r1, #408]! @ 0x198 │ │ + stc2l 2, cr9, [r1, #876]! @ 0x36c │ │ + stc2l 11, cr14, [r3, #772]! @ 0x304 @ │ │ + stc2l 7, cr2, [r4, #760]! @ 0x2f8 │ │ + stc2l 2, cr9, [r1, #588]! @ 0x24c │ │ orreq r8, r2, ip, asr r9 │ │ rsceq r1, r8, r8, lsl #28 │ │ orreq fp, r4, r4, asr r9 │ │ eorseq r4, r4, ip, asr #13 │ │ strhteq ip, [r7], #244 @ 0xf4 │ │ - stc2l 5, cr11, [r1, #520]! @ 0x208 │ │ - stc2l 6, cr6, [r4, #100]! @ 0x64 │ │ + stc2l 5, cr11, [r1, #700]! @ 0x2bc │ │ + stc2l 6, cr6, [r4, #280]! @ 0x118 │ │ ldr r0, [pc, #3900] @ 2405cc0 │ │ movw r3, #2802 @ 0xaf2 │ │ ldr r2, [pc, #3896] @ 2405cc4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3884] @ 2405cc8 │ │ @@ -1241624,23 +1241623,23 @@ │ │ ldr r2, [pc, #3932] @ 2405e50 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ ldr r4, [pc, #3924] @ 2405e54 │ │ ldr r4, [pc, r4] │ │ b 24050f4 │ │ orreq r8, r2, r0, ror #17 │ │ - stc2l 8, cr0, [r4, #360]! @ 0x168 │ │ + vcmla.f16 d16, d20, d7, #270 │ │ orreq r8, r3, r0, lsr r0 │ │ orreq fp, r4, r0, lsr #17 │ │ - stc2l 15, cr0, [r1, #1012]! @ 0x3f4 │ │ - stc2l 0, cr7, [r3, #80]! @ 0x50 │ │ - stc2l 3, cr9, [r2, #964]! @ 0x3c4 │ │ + stc2l 0, cr1, [r1, #168]! @ 0xa8 │ │ + stc2l 0, cr7, [r3, #260]! @ 0x104 │ │ + stc2l 4, cr9, [r2, #120]! @ 0x78 │ │ orreq r8, r2, r0, asr #16 │ │ ldrhteq r4, [r4], -ip │ │ - stc2l 5, cr6, [r4, #52]! @ 0x34 │ │ + stc2l 5, cr6, [r4, #232]! @ 0xe8 │ │ ldr r0, [pc, #3876] @ 2405e58 │ │ movw r4, #5000 @ 0x1388 │ │ ldr r0, [pc, r0] │ │ sub r3, r0, #1 │ │ cmp r3, r4 │ │ bcc 2404f64 │ │ ldr r0, [pc, #3856] @ 2405e5c │ │ @@ -1241689,46 +1241688,46 @@ │ │ add r1, pc, r1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3968] @ 2405f80 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 2403b10 │ │ - stc2l 4, cr11, [r1, #440]! @ 0x1b8 │ │ + stc2l 4, cr11, [r1, #620]! @ 0x26c │ │ rsceq ip, r7, r4, lsl #29 │ │ - stc2l 14, cr6, [r3, #992]! @ 0x3e0 │ │ - stc2l 3, cr9, [r2, #452]! @ 0x1c4 │ │ - stc2l 2, cr7, [r2, #648]! @ 0x288 │ │ - stc2l 3, cr6, [r4, #916]! @ 0x394 │ │ - stc2l 15, cr0, [r1, #52]! @ 0x34 │ │ - stc2l 15, cr6, [r3, #144]! @ 0x90 │ │ - stc2l 0, cr13, [r2, #576]! @ 0x240 │ │ - stc2l 14, cr0, [r1, #900]! @ 0x384 │ │ - stc2l 14, cr6, [r3, #992]! @ 0x3e0 │ │ + stc2l 15, cr6, [r3, #148]! @ 0x94 │ │ + stc2l 3, cr9, [r2, #632]! @ 0x278 │ │ + stc2l 2, cr7, [r2, #828]! @ 0x33c │ │ + stc2l 4, cr6, [r4, #72]! @ 0x48 │ │ + stc2l 15, cr0, [r1, #232]! @ 0xe8 │ │ + stc2l 15, cr6, [r3, #324]! @ 0x144 │ │ + stc2l 0, cr13, [r2, #756]! @ 0x2f4 │ │ + stc2l 15, cr0, [r1, #56]! @ 0x38 │ │ + stc2l 15, cr6, [r3, #148]! @ 0x94 │ │ vcmla.f16 d24, d20, d26, #270 │ │ ldrdeq r7, [r7], #124 @ 0x7c @ │ │ eorseq r4, r4, r4, lsr #9 │ │ orreq lr, r2, r4, asr #4 │ │ orreq r8, r2, r4, lsl #14 │ │ orreq r7, r3, r8, ror lr │ │ - stc2l 3, cr11, [r1, #360]! @ 0x168 │ │ - stc2l 6, cr0, [r4, #296]! @ 0x128 │ │ + stc2l 3, cr11, [r1, #540]! @ 0x21c │ │ + stc2l 6, cr0, [r4, #476]! @ 0x1dc │ │ orreq r8, r2, r0, lsr #13 │ │ - stc2l 14, cr0, [r1, #68]! @ 0x44 │ │ - stc2l 14, cr6, [r3, #160]! @ 0xa0 │ │ - stc2l 13, cr0, [r1, #948]! @ 0x3b4 │ │ - stc2l 14, cr6, [r3, #16]! │ │ - stc2l 13, cr14, [r1, #468]! @ 0x1d4 │ │ + stc2l 14, cr0, [r1, #248]! @ 0xf8 │ │ + stc2l 14, cr6, [r3, #340]! @ 0x154 │ │ + stc2l 14, cr0, [r1, #104]! @ 0x68 │ │ + stc2l 14, cr6, [r3, #196]! @ 0xc4 │ │ + stc2l 13, cr14, [r1, #648]! @ 0x288 │ │ rsceq r7, r7, r8, ror #13 │ │ ldrhteq r4, [r4], -r0 │ │ orreq lr, r2, r0, asr r1 │ │ orreq r8, r2, r0, lsl r6 │ │ orreq r7, r3, r4, lsl #27 │ │ - stc2l 2, cr11, [r1, #408]! @ 0x198 │ │ - stc2l 5, cr0, [r4, #344]! @ 0x158 │ │ + stc2l 2, cr11, [r1, #588]! @ 0x24c │ │ + stc2l 5, cr0, [r4, #524]! @ 0x20c │ │ ldr r0, [pc, #3824] @ 2405f84 │ │ movw r3, #2838 @ 0xb16 │ │ ldr r2, [pc, #3820] @ 2405f88 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3808] @ 2405f8c │ │ @@ -1241842,23 +1241841,23 @@ │ │ vmov r5, s0 │ │ bhi 2405294 │ │ ldr r0, [pc, #4024] @ 240621c │ │ add r0, pc, r0 │ │ str r5, [r0, r1, lsl #2] │ │ b 24052cc │ │ orreq r8, r2, ip, lsr #11 │ │ - stc2l 13, cr0, [r1, #116]! @ 0x74 │ │ - stc2l 13, cr6, [r3, #208]! @ 0xd0 │ │ - stc2l 12, cr0, [r1, #996]! @ 0x3e4 │ │ - stc2l 13, cr6, [r3, #64]! @ 0x40 │ │ - stc2l 5, cr5, [r1, #468]! @ 0x1d4 │ │ - stc2l 12, cr0, [r1, #820]! @ 0x334 │ │ - stc2l 12, cr6, [r3, #912]! @ 0x390 │ │ - stc2l 7, cr14, [r3, #96]! @ 0x60 │ │ - stc2l 12, cr0, [r1, #644]! @ 0x284 │ │ + stc2l 13, cr0, [r1, #296]! @ 0x128 │ │ + stc2l 13, cr6, [r3, #388]! @ 0x184 │ │ + stc2l 13, cr0, [r1, #152]! @ 0x98 │ │ + stc2l 13, cr6, [r3, #244]! @ 0xf4 │ │ + stc2l 5, cr5, [r1, #648]! @ 0x288 │ │ + stc2l 12, cr0, [r1, #1000]! @ 0x3e8 │ │ + stc2l 13, cr6, [r3, #68]! @ 0x44 │ │ + stc2l 7, cr14, [r3, #276]! @ 0x114 │ │ + stc2l 12, cr0, [r1, #824]! @ 0x338 │ │ ldr r0, [pc, #3972] @ 2406220 │ │ movw r3, #2842 @ 0xb1a │ │ ldr r2, [pc, #3968] @ 2406224 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r4, [pc, #3956] @ 2406228 │ │ @@ -1241878,39 +1241877,39 @@ │ │ ldr r4, [r0, r1, lsl #2] │ │ ldr r2, [pc, #3912] @ 2406238 │ │ add r3, r4, #1 │ │ ldr r0, [pc, #3908] @ 240623c │ │ add r2, pc, r2 │ │ add r0, pc, r0 │ │ b 24058ec │ │ - stc2l 12, cr6, [r3, #736]! @ 0x2e0 │ │ - stc2l 0, cr9, [r2, #660]! @ 0x294 │ │ + stc2l 12, cr6, [r3, #916]! @ 0x394 │ │ + stc2l 0, cr9, [r2, #840]! @ 0x348 │ │ strdeq r8, [r2, r8] │ │ - stc2l 7, cr4, [r4, #228]! @ 0xe4 │ │ - stc2l 1, cr11, [r1, #232]! @ 0xe8 │ │ + stc2l 7, cr4, [r4, #408]! @ 0x198 │ │ + stc2l 1, cr11, [r1, #412]! @ 0x19c │ │ orreq ip, r3, r4, ror #20 │ │ @ instruction: 0x018284b4 │ │ @ instruction: 0x01828490 │ │ - stc2l 6, cr4, [r4, #836]! @ 0x344 │ │ - stc2l 0, cr11, [r1, #840]! @ 0x348 │ │ + stc2l 6, cr4, [r4, #1016]! @ 0x3f8 │ │ + stc2l 0, cr11, [r1, #1020]! @ 0x3fc │ │ strdeq ip, [r3, ip] │ │ orreq r8, r2, ip, asr #8 │ │ orreq r8, r2, r8, lsr #8 │ │ - stc2l 6, cr4, [r4, #420]! @ 0x1a4 │ │ - stc2l 0, cr11, [r1, #424]! @ 0x1a8 │ │ + stc2l 6, cr4, [r4, #600]! @ 0x258 │ │ + stc2l 0, cr11, [r1, #604]! @ 0x25c │ │ @ instruction: 0x0183c994 │ │ orreq r8, r2, r4, ror #7 │ │ orreq r8, r2, r0, asr #7 │ │ - stc2l 6, cr4, [r4, #4]! │ │ - stc2l 0, cr11, [r1, #8]! │ │ + stc2l 6, cr4, [r4, #184]! @ 0xb8 │ │ + stc2l 0, cr11, [r1, #188]! @ 0xbc │ │ orreq ip, r3, ip, lsr #18 │ │ orreq r8, r2, ip, ror r3 │ │ orreq r8, r2, r8, asr r3 │ │ - stc2l 0, cr6, [r4, #228]! @ 0xe4 │ │ - stc2l 15, cr10, [r1, #616]! @ 0x268 │ │ + stc2l 0, cr6, [r4, #408]! @ 0x198 │ │ + stc2l 15, cr10, [r1, #796]! @ 0x31c │ │ ldr r0, [pc, #3796] @ 2406240 │ │ movw r3, #1798 @ 0x706 │ │ ldr r2, [pc, #3792] @ 2406244 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3780] @ 2406248 │ │ @@ -1242001,31 +1242000,31 @@ │ │ bhi 2405690 │ │ ldr r2, [pc, #3532] @ 24062a8 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ ldr r4, [pc, #3524] @ 24062ac │ │ ldr r4, [pc, r4] │ │ b 24056f8 │ │ - stc2l 5, cr14, [r3, #16]! │ │ + stc2l 5, cr14, [r3, #196]! @ 0xc4 │ │ orreq r8, r2, r0, lsl r3 │ │ - stc2l 5, cr4, [r4, #324]! @ 0x144 │ │ - stc2l 15, cr10, [r1, #328]! @ 0x148 │ │ + stc2l 5, cr4, [r4, #504]! @ 0x1f8 │ │ + stc2l 15, cr10, [r1, #508]! @ 0x1fc │ │ orreq ip, r3, ip, ror r8 │ │ orreq r8, r2, ip, asr #5 │ │ eorseq r4, r4, ip, lsl r0 │ │ rsceq r7, r7, ip, lsr #6 │ │ orreq r8, r2, r4, ror r2 │ │ rsceq r1, r8, r0, lsr #14 │ │ orreq fp, r4, ip, ror #4 │ │ eorseq r3, r4, r4, ror #31 │ │ rsceq ip, r7, r8, asr #17 │ │ orreq r7, r3, ip, lsr #19 │ │ - stc2l 1, cr0, [r4, #760]! @ 0x2f8 │ │ - stc2l 14, cr10, [r1, #536]! @ 0x218 │ │ - stc2l 15, cr5, [r4, #116]! @ 0x74 │ │ + stc2l 1, cr0, [r4, #940]! @ 0x3ac │ │ + stc2l 14, cr10, [r1, #716]! @ 0x2cc │ │ + stc2l 15, cr5, [r4, #296]! @ 0x128 │ │ ldr r0, [pc, #4068] @ 240651c │ │ movw r4, #5000 @ 0x1388 │ │ ldr r0, [pc, r0] │ │ sub r3, r0, #1 │ │ cmp r3, r4 │ │ bcc 2405568 │ │ ldr r0, [pc, #4048] @ 2406520 │ │ @@ -1242093,17 +1242092,17 @@ │ │ rsceq r7, r7, r4, lsr #3 │ │ orreq r8, r2, ip, ror #1 │ │ smlaleq r1, r8, r8, r5 │ │ orreq fp, r4, r4, ror #1 │ │ eorseq r3, r4, ip, asr lr │ │ rsceq ip, r7, r0, asr #14 │ │ orreq r7, r3, r4, lsr #16 │ │ - stc2l 0, cr0, [r4, #216]! @ 0xd8 │ │ - stc2l 12, cr10, [r1, #1016]! @ 0x3f8 │ │ - stc2l 13, cr5, [r4, #596]! @ 0x254 │ │ + stc2l 0, cr0, [r4, #396]! @ 0x18c │ │ + stc2l 13, cr10, [r1, #172]! @ 0xac │ │ + stc2l 13, cr5, [r4, #776]! @ 0x308 │ │ orreq r8, r2, ip, asr r0 │ │ rsceq r1, r8, r8, lsl #10 │ │ orreq r8, r2, r4, lsr #32 │ │ orreq fp, r4, r8, lsl r0 │ │ orreq fp, r4, r0 │ │ eorseq r3, r4, ip, ror #26 │ │ eorseq r3, r4, r8, asr sp │ │ @@ -1242230,18 +1242229,18 @@ │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 24058c8 │ │ eorseq r3, r4, r4, lsr #26 │ │ strexeq sl, r8, [r4] │ │ orreq r7, r2, r8, lsl #31 │ │ eorseq r3, r4, r0, lsl #26 │ │ - stc2l 14, cr15, [r3, #968]! @ 0x3c8 │ │ - stc2l 11, cr10, [r1, #744]! @ 0x2e8 @ │ │ + stc2l 15, cr15, [r3, #124]! @ 0x7c │ │ + stc2l 11, cr10, [r1, #924]! @ 0x39c @ │ │ strdeq r1, [r8], #56 @ 0x38 @ │ │ - stc2l 14, cr15, [r3, #760]! @ 0x2f8 │ │ + stc2l 14, cr15, [r3, #940]! @ 0x3ac │ │ ldr r0, [pc, #4084] @ 240688c │ │ movw r3, #1843 @ 0x733 │ │ ldr r2, [pc, #4080] @ 2406890 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4068] @ 2406894 │ │ @@ -1242260,19 +1242259,19 @@ │ │ mov r3, #0 │ │ ldr r0, [pc, #4028] @ 24068a4 │ │ add r2, pc, r2 │ │ add r0, pc, r0 │ │ str r3, [r2, r1, lsl #2] │ │ mov r1, #6 │ │ b 2404b78 │ │ - stc2l 11, cr10, [r1, #536]! @ 0x218 @ │ │ + stc2l 11, cr10, [r1, #716]! @ 0x2cc @ │ │ orreq r7, r2, r8, lsl #30 │ │ eorseq r3, r4, r8, ror ip │ │ - stc2l 14, cr15, [r3, #504]! @ 0x1f8 │ │ - stc2l 11, cr10, [r1, #280]! @ 0x118 @ │ │ + stc2l 14, cr15, [r3, #684]! @ 0x2ac │ │ + stc2l 11, cr10, [r1, #460]! @ 0x1cc @ │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ bcc 2405934 │ │ ldr r0, [pc, #4072] @ 2406908 │ │ movw r3, #3668 @ 0xe54 │ │ ldr r2, [pc, #4068] @ 240690c │ │ add r0, pc, r0 │ │ @@ -1242288,16 +1242287,16 @@ │ │ ldr r0, [pc, #4032] @ 2406914 │ │ mov r1, #65 @ 0x41 │ │ add r0, pc, r0 │ │ b 2405c74 │ │ orreq sl, r4, ip, lsr #29 │ │ stlexeq r7, ip, [r2] │ │ eorseq r3, r4, r4, lsl ip │ │ - stc2l 14, cr15, [r3, #24]! │ │ - stc2l 10, cr10, [r1, #824]! @ 0x338 @ │ │ + stc2l 14, cr15, [r3, #204]! @ 0xcc │ │ + stc2l 10, cr10, [r1, #1004]! @ 0x3ec @ │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ bcc 2405998 │ │ ldr r0, [pc, #3988] @ 2406918 │ │ movw r3, #5067 @ 0x13cb │ │ ldr r2, [pc, #3984] @ 240691c │ │ add r0, pc, r0 │ │ @@ -1242311,20 +1242310,20 @@ │ │ mov r1, r4 │ │ bl 270d260 │ │ ldr r0, [pc, #4092] @ 24069b4 │ │ mov r1, #65 @ 0x41 │ │ add r0, pc, r0 │ │ b 2405f24 │ │ rsceq r1, r8, ip, lsl #6 │ │ - stc2l 13, cr15, [r3, #840]! @ 0x348 │ │ - stc2l 10, cr10, [r1, #616]! @ 0x268 @ │ │ + stc2l 13, cr15, [r3, #1020]! @ 0x3fc │ │ + stc2l 10, cr10, [r1, #796]! @ 0x31c @ │ │ orreq r7, r2, ip, lsl lr │ │ eorseq r3, r4, ip, lsl #23 │ │ - stc2l 13, cr15, [r3, #584]! @ 0x248 │ │ - stc2l 10, cr10, [r1, #360]! @ 0x168 @ │ │ + stc2l 13, cr15, [r3, #764]! @ 0x2fc │ │ + stc2l 10, cr10, [r1, #540]! @ 0x21c @ │ │ ldr r0, [pc, #4052] @ 24069b8 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ bcc 2405a10 │ │ ldr r0, [pc, #4032] @ 24069bc │ │ @@ -1242366,20 +1242365,20 @@ │ │ add r4, pc, r4 │ │ mov r1, r4 │ │ bl 270d260 │ │ ldr r0, [pc, #3988] @ 2406a2c │ │ mov r1, #65 @ 0x41 │ │ add r0, pc, r0 │ │ b 24061d8 │ │ - stc2l 12, cr15, [r3, #1016]! @ 0x3f8 │ │ - stc2l 9, cr10, [r1, #396]! @ 0x18c @ │ │ + stc2l 13, cr15, [r3, #172]! @ 0xac │ │ + stc2l 9, cr10, [r1, #486]! @ 0x1e6 @ │ │ rsceq r1, r8, r4, lsl #4 │ │ orreq r7, r3, r8, asr #9 │ │ - stc2l 12, cr15, [r3, #776]! @ 0x308 │ │ - stc2l 9, cr10, [r1, #276]! @ 0x114 @ │ │ + stc2l 12, cr15, [r3, #956]! @ 0x3bc │ │ + stc2l 9, cr10, [r1, #366]! @ 0x16e @ │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ bcc 2405ae0 │ │ ldr r0, [pc, #4088] @ 2406ac4 │ │ movw r3, #3934 @ 0xf5e │ │ ldr r2, [pc, #4084] @ 2406ac8 │ │ add r0, pc, r0 │ │ @@ -1242395,20 +1242394,20 @@ │ │ ldr r0, [pc, #4048] @ 2406ad0 │ │ mov r1, #65 @ 0x41 │ │ add r0, pc, r0 │ │ b 240660c │ │ @ instruction: 0x01837490 │ │ orreq r7, r2, r4, lsl #26 │ │ eorseq r3, r4, r4, ror sl │ │ - stc2l 12, cr15, [r3, #488]! @ 0x1e8 │ │ - stc2l 9, cr10, [r1, #132]! @ 0x84 @ │ │ + stc2l 12, cr15, [r3, #668]! @ 0x29c │ │ + stc2l 9, cr10, [r1, #222]! @ 0xde @ │ │ orreq r7, r2, ip, asr #25 │ │ eorseq r3, r4, r0, asr #20 │ │ orreq r7, r3, ip, lsr r4 │ │ - stc2l 10, cr1, [r4, #676]! @ 0x2a4 @ │ │ + stc2l 10, cr1, [r4, #856]! @ 0x358 @ │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ bcc 2405b54 │ │ ldr r0, [pc, #4084] @ 2406b34 │ │ movw r3, #4776 @ 0x12a8 │ │ ldr r2, [pc, #4080] @ 2406b38 │ │ add r0, pc, r0 │ │ @@ -1242421,23 +1242420,23 @@ │ │ add r4, pc, r4 │ │ mov r1, r4 │ │ bl 270d260 │ │ ldr r0, [pc, #4044] @ 2406b40 │ │ mov r1, #65 @ 0x41 │ │ add r0, pc, r0 │ │ b 24067c4 │ │ - stc2l 14, cr3, [r4, #820]! @ 0x334 │ │ - vcmla.f16 q13, , q7, #270 │ │ + stc2l 14, cr3, [r4, #1000]! @ 0x3e8 │ │ + stc2l 8, cr10, [r1, #1004]! @ 0x3ec │ │ strdeq ip, [r3, ip] │ │ orreq r7, r2, ip, asr #24 │ │ ldrdeq ip, [r3, r8] │ │ orreq ip, r3, ip, asr #3 │ │ - stc2l 1, cr12, [r3, #928]! @ 0x3a0 │ │ - stc2l 14, cr3, [r4, #196]! @ 0xc4 │ │ - stc2l 8, cr10, [r1, #200]! @ 0xc8 │ │ + stc2l 2, cr12, [r3, #84]! @ 0x54 │ │ + stc2l 14, cr3, [r4, #376]! @ 0x178 │ │ + stc2l 8, cr10, [r1, #380]! @ 0x17c │ │ orreq ip, r3, r0, ror #2 │ │ @ instruction: 0x01827bb0 │ │ orreq ip, r3, ip, lsr r1 │ │ orreq ip, r3, r0, lsr r1 │ │ orreq r8, r2, ip, lsl #17 │ │ ldr r0, [pc, #3976] @ 2406b44 │ │ movw r3, #3677 @ 0xe5d │ │ @@ -1242498,26 +1242497,26 @@ │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4024] @ 2406c60 │ │ add r0, pc, r0 │ │ b 2404b74 │ │ orreq r7, r2, r0, ror fp │ │ - stc2l 11, cr15, [r3, #204]! @ 0xcc @ │ │ - stc2l 7, cr10, [r1, #712]! @ 0x2c8 │ │ + stc2l 11, cr15, [r3, #384]! @ 0x180 @ │ │ + stc2l 7, cr10, [r1, #892]! @ 0x37c │ │ orreq r5, r4, ip, lsl sp │ │ orreq r7, r2, r4, lsr #22 │ │ - stc2l 10, cr15, [r3, #184]! @ 0xb8 @ │ │ - stc2l 6, cr10, [r1, #984]! @ 0x3d8 │ │ + stc2l 10, cr15, [r3, #364]! @ 0x16c @ │ │ + stc2l 7, cr10, [r1, #140]! @ 0x8c │ │ orreq r7, r3, r0, lsl #4 │ │ ldrshteq r3, [r4], -r8 │ │ orreq r7, r2, r8, ror #20 │ │ ldrsbteq r3, [r4], -r8 │ │ - stc2l 9, cr15, [r3, #444]! @ 0x1bc @ │ │ - stc2l 6, cr10, [r1, #664]! @ 0x298 │ │ + stc2l 10, cr15, [r3, #44]! @ 0x2c @ │ │ + stc2l 6, cr10, [r1, #844]! @ 0x34c │ │ orreq r7, r2, r0, lsr sl │ │ orreq r7, r3, r4, lsr #3 │ │ eorseq r3, r4, r0, lsr #15 │ │ strdeq r7, [r2, r0] │ │ @ instruction: 0x018285b8 │ │ @ instruction: 0x018286b4 │ │ movw r6, #5000 @ 0x1388 │ │ @@ -1242594,27 +1242593,27 @@ │ │ ldr r0, [pc, #4020] @ 2406dd0 │ │ add r0, pc, r0 │ │ b 2404b74 │ │ @ instruction: 0x018286b0 │ │ orreq r7, r2, ip, ror #19 │ │ rsceq fp, r7, r4, lsr #17 │ │ @ instruction: 0x018279bc │ │ - stc2l 15, cr3, [r3, #956]! @ 0x3bc │ │ - stc2l 5, cr10, [r1, #1016]! @ 0x3f8 │ │ + stc2l 0, cr4, [r3, #112]! @ 0x70 │ │ + stc2l 6, cr10, [r1, #172]! @ 0xac │ │ orreq r7, r2, r4, lsl #19 │ │ eorseq r3, r4, r0, lsl #14 │ │ eorseq r3, r4, r0, lsl #14 │ │ teqeq r4, ip, ror #18 │ │ orreq sl, r4, ip, asr r9 │ │ orreq r7, r2, r4, asr #18 │ │ rsceq fp, r7, r0, asr #31 │ │ orreq r7, r2, r4, lsr #18 │ │ orreq r7, r2, r8, ror #17 │ │ - stc2l 5, cr5, [r4, #804]! @ 0x324 │ │ - stc2l 5, cr10, [r1, #168]! @ 0xa8 │ │ + stc2l 5, cr5, [r4, #984]! @ 0x3d8 │ │ + stc2l 5, cr10, [r1, #348]! @ 0x15c │ │ ldr r0, [pc, #4028] @ 2406e28 │ │ movw r3, #5076 @ 0x13d4 │ │ ldr r2, [pc, #4024] @ 2406e2c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4012] @ 2406e30 │ │ @@ -1242671,24 +1242670,24 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4076] @ 2406f44 │ │ add r0, pc, r0 │ │ b 2404b74 │ │ rsceq fp, r7, r0, asr #30 │ │ orreq r8, r2, r8, ror #8 │ │ - stc2l 15, cr5, [r3, #776]! @ 0x308 │ │ + stc2l 15, cr5, [r3, #956]! @ 0x3bc │ │ orreq r7, r2, r8, lsl #17 │ │ - vcmla.f16 , , , #270 │ │ - stc2l 4, cr10, [r1, #824]! @ 0x338 │ │ + stc2l 8, cr15, [r3, #496]! @ 0x1f0 │ │ + stc2l 4, cr10, [r1, #1004]! @ 0x3ec │ │ orreq r5, r4, r0, lsr sl │ │ - stc2l 14, cr13, [r1, #964]! @ 0x3c4 │ │ + stc2l 15, cr13, [r1, #120]! @ 0x78 │ │ orreq r8, r2, ip, ror #7 │ │ - stc2l 14, cr3, [r3, #464]! @ 0x1d0 │ │ - stc2l 4, cr5, [r4, #532]! @ 0x214 │ │ - stc2l 3, cr10, [r1, #920]! @ 0x398 │ │ + stc2l 14, cr3, [r3, #644]! @ 0x284 │ │ + stc2l 4, cr5, [r4, #712]! @ 0x2c8 │ │ + stc2l 4, cr10, [r1, #76]! @ 0x4c │ │ rsceq fp, r7, r4, lsl #28 │ │ orreq r7, r2, r4, ror #14 │ │ orreq r7, r2, r8, asr r7 │ │ movw r5, #5000 @ 0x1388 │ │ cmp r3, r5 │ │ bcc 2405fc4 │ │ ldr r0, [pc, #4036] @ 2406f70 │ │ @@ -1242762,30 +1242761,30 @@ │ │ ldr r0, [pc, #4012] @ 2407068 │ │ ldr r0, [pc, r0] │ │ sub r4, r0, #1 │ │ cmp r4, r5 │ │ bcs 2406fa0 │ │ mov r1, r4 │ │ b 2406ff8 │ │ - stc2l 3, cr10, [r1, #692]! @ 0x2b4 │ │ - stc2l 3, cr10, [r1, #648]! @ 0x288 │ │ + stc2l 3, cr10, [r1, #872]! @ 0x368 │ │ + stc2l 3, cr10, [r1, #828]! @ 0x33c │ │ orreq r7, r2, ip, lsr #14 │ │ orreq r2, r3, r4, lsl #1 │ │ - stc2l 13, cr3, [r3, #332]! @ 0x14c │ │ - stc2l 3, cr10, [r1, #392]! @ 0x188 │ │ + stc2l 13, cr3, [r3, #512]! @ 0x200 │ │ + stc2l 3, cr10, [r1, #572]! @ 0x23c │ │ orreq r7, r2, ip, ror #13 │ │ - stc2l 6, cr15, [r3, #636]! @ 0x27c │ │ - stc2l 3, cr10, [r1, #120]! @ 0x78 │ │ + stc2l 6, cr15, [r3, #816]! @ 0x330 │ │ + stc2l 3, cr10, [r1, #300]! @ 0x12c │ │ orreq r7, r2, r8, lsr #13 │ │ orreq r5, r4, r0, lsl #17 │ │ - stc2l 12, cr3, [r3, #828]! @ 0x33c │ │ - stc2l 2, cr10, [r1, #888]! @ 0x378 │ │ + stc2l 12, cr3, [r3, #1008]! @ 0x3f0 │ │ + stc2l 3, cr10, [r1, #44]! @ 0x2c │ │ orreq r7, r2, r8, ror #12 │ │ - stc2l 12, cr3, [r3, #664]! @ 0x298 │ │ - stc2l 2, cr10, [r1, #616]! @ 0x268 │ │ + stc2l 12, cr3, [r3, #844]! @ 0x34c │ │ + stc2l 2, cr10, [r1, #796]! @ 0x31c │ │ orreq r7, r2, r4, lsr #12 │ │ ldrdeq r0, [r4, ip] │ │ ldr r0, [pc, #3916] @ 240706c │ │ movw r3, #4499 @ 0x1193 │ │ ldr r2, [pc, #4092] @ 2407124 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1242842,46 +1242841,46 @@ │ │ ldr r0, [pc, #3924] @ 2407150 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3912] @ 2407154 │ │ add r0, pc, r0 │ │ b 2404b74 │ │ - stc2l 12, cr3, [r3, #300]! @ 0x12c │ │ - stc2l 2, cr10, [r1, #360]! @ 0x168 │ │ + stc2l 12, cr3, [r3, #480]! @ 0x1e0 │ │ + stc2l 2, cr10, [r1, #540]! @ 0x21c │ │ orreq r7, r2, r4, ror #11 │ │ orreq r8, r2, r4, asr #5 │ │ - stc2l 7, cr13, [r3, #372]! @ 0x174 │ │ - stc2l 1, cr10, [r1, #888]! @ 0x378 │ │ + stc2l 7, cr13, [r3, #552]! @ 0x228 │ │ + stc2l 2, cr10, [r1, #44]! @ 0x2c │ │ orreq r8, r2, r4, ror r2 │ │ orreq r7, r2, r0, ror #10 │ │ strdeq r6, [r7], #80 @ 0x50 @ │ │ orreq r8, r2, r4, asr #4 │ │ orreq fp, r3, r8, asr #21 │ │ - stc2l 2, cr6, [r1, #364]! @ 0x16c │ │ - stc2l 4, cr15, [r3, #280]! @ 0x118 │ │ - stc2l 1, cr10, [r1, #56]! @ 0x38 │ │ + stc2l 2, cr6, [r1, #544]! @ 0x220 │ │ + stc2l 4, cr15, [r3, #460]! @ 0x1cc │ │ + stc2l 1, cr10, [r1, #236]! @ 0xec │ │ orreq r6, r3, r8, lsl ip │ │ eorseq r3, r4, r0, lsl r2 │ │ orreq r7, r2, r0, lsl #9 │ │ ldrshteq r3, [r4], -r0 │ │ - stc2l 3, cr15, [r3, #984]! @ 0x3d8 │ │ - stc2l 0, cr10, [r1, #760]! @ 0x2f8 │ │ + stc2l 4, cr15, [r3, #140]! @ 0x8c │ │ + stc2l 0, cr10, [r1, #940]! @ 0x3ac │ │ orreq r7, r2, r8, asr #8 │ │ @ instruction: 0x01836bbc │ │ ldrhteq r3, [r4], -r8 │ │ orreq r7, r2, r8, lsl #16 │ │ ldrdeq r7, [r2, r0] │ │ orreq r8, r2, ip, asr #1 │ │ orreq r8, r2, r8, asr #1 │ │ orreq r7, r2, r4, lsl #8 │ │ strhteq fp, [r7], #44 @ 0x2c │ │ ldrdeq r7, [r2, r4] │ │ - stc2l 10, cr3, [r3, #28]! @ │ │ - stc2l 0, cr10, [r1, #88]! @ 0x58 │ │ + stc2l 10, cr3, [r3, #208]! @ 0xd0 @ │ │ + stc2l 0, cr10, [r1, #268]! @ 0x10c │ │ orreq r7, r2, r4, lsl #15 │ │ eorseq r3, r4, r8, lsl r1 │ │ eorseq r3, r4, r8, lsl r1 │ │ teqeq r4, r4, lsl #7 │ │ orreq sl, r4, r4, ror r3 │ │ orreq r7, r2, ip, asr r3 │ │ ldrdeq fp, [r7], #152 @ 0x98 @ │ │ @@ -1243038,26 +1243037,26 @@ │ │ sub r4, r0, #1 │ │ str r4, [sp, #24] │ │ cmp r4, r5 │ │ bcs 2407070 │ │ mov r1, r4 │ │ b 24070c8 │ │ orreq r7, r2, r4, ror #5 │ │ - stc2l 15, cr4, [r4, #788]! @ 0x314 │ │ - stc2l 15, cr9, [r1, #152]! @ 0x98 │ │ + stc2l 15, cr4, [r4, #968]! @ 0x3c8 │ │ + stc2l 15, cr9, [r1, #332]! @ 0x14c │ │ rsceq fp, r7, ip, lsr r9 │ │ orreq r7, r2, r4, ror #28 │ │ - stc2l 9, cr5, [r3, #380]! @ 0x17c @ │ │ + stc2l 9, cr5, [r3, #470]! @ 0x1d6 @ │ │ orreq r7, r2, r4, lsl #5 │ │ - stc2l 2, cr15, [r3, #300]! @ 0x12c │ │ - stc2l 14, cr9, [r1, #808]! @ 0x328 │ │ + stc2l 2, cr15, [r3, #480]! @ 0x1e0 │ │ + stc2l 14, cr9, [r1, #988]! @ 0x3dc │ │ orreq r5, r4, ip, lsr #8 │ │ - vcmla.f16 , , , #270 │ │ + stc2l 9, cr13, [r1, #52]! @ 0x34 @ │ │ orreq r7, r2, r8, ror #27 │ │ - stc2l 8, cr3, [r3, #448]! @ 0x1c0 │ │ + stc2l 8, cr3, [r3, #628]! @ 0x274 │ │ ldr r0, [pc, #4040] @ 2407520 │ │ movw r3, #3943 @ 0xf67 │ │ ldr r2, [pc, #4036] @ 2407524 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4024] @ 2407528 │ │ @@ -1243111,16 +1243110,16 @@ │ │ ldr r0, [pc, #4056] @ 2407608 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4044] @ 240760c │ │ add r0, pc, r0 │ │ b 2404b74 │ │ - stc2l 14, cr4, [r4, #516]! @ 0x204 │ │ - stc2l 13, cr9, [r1, #904]! @ 0x388 │ │ + stc2l 14, cr4, [r4, #696]! @ 0x2b8 │ │ + stc2l 14, cr9, [r1, #60]! @ 0x3c │ │ rsceq fp, r7, r0, lsl #16 │ │ orreq r7, r2, r0, ror #2 │ │ movw r2, #5000 @ 0x1388 │ │ cmp r1, r2 │ │ bcc 2406684 │ │ ldr r0, [pc, #4008] @ 2407610 │ │ movw r3, #3961 @ 0xf79 │ │ @@ -1243144,30 +1243143,30 @@ │ │ mov r3, r1 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ add r0, r0, #1 │ │ str r0, [sp, #20] │ │ b 2407f38 │ │ orreq r7, r2, ip, lsr r5 │ │ - stc2l 13, cr9, [r1, #676]! @ 0x2a4 │ │ - stc2l 13, cr9, [r1, #632]! @ 0x278 │ │ + stc2l 13, cr9, [r1, #856]! @ 0x358 │ │ + stc2l 13, cr9, [r1, #812]! @ 0x32c │ │ orreq r7, r2, r8, lsr #2 │ │ orreq r1, r3, r0, lsl #21 │ │ - stc2l 7, cr3, [r3, #316]! @ 0x13c │ │ - stc2l 13, cr9, [r1, #376]! @ 0x178 │ │ + stc2l 7, cr3, [r3, #496]! @ 0x1f0 │ │ + stc2l 13, cr9, [r1, #556]! @ 0x22c │ │ orreq r7, r2, r8, ror #1 │ │ - stc2l 0, cr15, [r3, #620]! @ 0x26c │ │ - stc2l 13, cr9, [r1, #104]! @ 0x68 │ │ + stc2l 0, cr15, [r3, #800]! @ 0x320 │ │ + stc2l 13, cr9, [r1, #284]! @ 0x11c │ │ orreq r7, r2, r4, lsr #1 │ │ orreq r5, r4, ip, ror r2 │ │ - stc2l 6, cr3, [r3, #812]! @ 0x32c │ │ - stc2l 12, cr9, [r1, #872]! @ 0x368 │ │ + stc2l 6, cr3, [r3, #992]! @ 0x3e0 │ │ + stc2l 13, cr9, [r1, #28]! │ │ orreq r7, r2, r4, rrx │ │ - stc2l 6, cr3, [r3, #648]! @ 0x288 │ │ - stc2l 12, cr9, [r1, #600]! @ 0x258 │ │ + stc2l 6, cr3, [r3, #828]! @ 0x33c │ │ + stc2l 12, cr9, [r1, #780]! @ 0x30c │ │ ldr r0, [pc, #4064] @ 24076f0 │ │ movw r3, #4785 @ 0x12b1 │ │ ldr r2, [pc, #4060] @ 24076f4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4048] @ 24076f8 │ │ @@ -1243223,16 +1243222,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4028] @ 24077b4 │ │ add r0, pc, r0 │ │ b 2404b74 │ │ orreq r7, r2, r0, lsr #32 │ │ ldrdeq r0, [r4, r8] │ │ - stc2l 6, cr3, [r3, #284]! @ 0x11c │ │ - stc2l 12, cr9, [r1, #344]! @ 0x158 │ │ + stc2l 6, cr3, [r3, #464]! @ 0x1d0 │ │ + stc2l 12, cr9, [r1, #524]! @ 0x20c │ │ orreq r6, r2, r0, ror #31 │ │ orreq r7, r2, r0, asr #25 │ │ movw r2, #5000 @ 0x1388 │ │ cmp r1, r2 │ │ bcc 2406844 │ │ ldr r0, [pc, #4060] @ 2407804 │ │ movw r3, #4804 @ 0x12c4 │ │ @@ -1243257,21 +1243256,21 @@ │ │ ldr r0, [pc, #4000] @ 2407818 │ │ mov r3, r1 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ add r0, r0, #1 │ │ str r0, [sp, #20] │ │ b 24081c0 │ │ - stc2l 1, cr13, [r3, #388]! @ 0x184 │ │ - stc2l 11, cr9, [r1, #904]! @ 0x388 @ │ │ + stc2l 1, cr13, [r3, #568]! @ 0x238 │ │ + stc2l 12, cr9, [r1, #60]! @ 0x3c │ │ orreq r7, r2, r8, ror ip │ │ orreq r6, r2, r4, ror #30 │ │ strdeq r5, [r7], #244 @ 0xf4 @ │ │ ldrdeq fp, [r3, r8] │ │ - stc2l 12, cr15, [r1, #628]! @ 0x274 │ │ + stc2l 12, cr15, [r1, #808]! @ 0x328 │ │ ldr r0, [pc, #3948] @ 240781c │ │ add r0, pc, r0 │ │ bl 270d270 │ │ ldr r0, [pc, #3940] @ 2407820 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #3936] @ 2407824 │ │ cmn r0, #1 │ │ @@ -1243288,20 +1243287,20 @@ │ │ ldr r6, [pc, #3904] @ 2407834 │ │ add r5, pc, r5 │ │ ldr r7, [pc, #3900] @ 2407838 │ │ add r9, pc, r9 │ │ add r6, pc, r6 │ │ add r7, pc, r7 │ │ b 2406940 │ │ - stc2l 11, cr4, [r4, #996]! @ 0x3e4 @ │ │ - stc2l 11, cr9, [r1, #360]! @ 0x168 @ │ │ + stc2l 12, cr4, [r4, #152]! @ 0x98 │ │ + stc2l 11, cr9, [r1, #540]! @ 0x21c @ │ │ @ instruction: 0x01827a9c │ │ - stc2l 11, cr9, [r1, #240]! @ 0xf0 @ │ │ - stc2l 11, cr4, [r4, #596]! @ 0x254 @ │ │ - stc2l 10, cr9, [r1, #984]! @ 0x3d8 @ │ │ + stc2l 11, cr9, [r1, #420]! @ 0x1a4 @ │ │ + stc2l 11, cr4, [r4, #776]! @ 0x308 @ │ │ + stc2l 11, cr9, [r1, #140]! @ 0x8c @ │ │ orreq r7, r2, r8, lsr sl │ │ add r0, r6, r1, lsl #2 │ │ ldr r0, [r0] │ │ ldr r1, [pc, #3848] @ 240783c │ │ cmn r0, #1 │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ @@ -1243331,18 +1243330,18 @@ │ │ ldr r0, [pc, #3756] @ 240784c │ │ mov r2, r7 │ │ movw r3, #2728 @ 0xaa8 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2406924 │ │ - stc2l 10, cr9, [r1, #864]! @ 0x360 @ │ │ + stc2l 11, cr9, [r1, #20]! @ │ │ orreq r6, r2, ip, lsr lr │ │ - stc2l 4, cr3, [r3, #552]! @ 0x228 │ │ - stc2l 10, cr9, [r1, #504]! @ 0x1f8 @ │ │ + stc2l 4, cr3, [r3, #732]! @ 0x2dc │ │ + stc2l 10, cr9, [r1, #684]! @ 0x2ac @ │ │ orreq r0, r4, r8, asr #3 │ │ cmp r1, r8 │ │ bcc 24069f0 │ │ ldr r0, [pc, #3704] @ 2407850 │ │ mov r2, r7 │ │ mov r3, #2752 @ 0xac0 │ │ add r0, pc, r0 │ │ @@ -1243358,18 +1243357,18 @@ │ │ ldr r0, [pc, r0] │ │ cmp r2, r0 │ │ bne 2406a30 │ │ ldr r0, [pc, #3656] @ 2407860 │ │ add r0, pc, r0 │ │ b 2406a68 │ │ strdeq r6, [r2, r0] │ │ - stc2l 10, cr4, [r4, #724]! @ 0x2d4 @ │ │ - stc2l 10, cr9, [r1, #88]! @ 0x58 @ │ │ + stc2l 10, cr4, [r4, #904]! @ 0x388 @ │ │ + stc2l 10, cr9, [r1, #268]! @ 0x10c @ │ │ orreq r7, r2, r8, asr r9 │ │ - stc2l 9, cr9, [r1, #496]! @ 0x1f0 @ │ │ + stc2l 10, cr9, [r1, #148]! @ 0x94 @ │ │ ldr r0, [pc, #4076] @ 2407a24 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, r8 │ │ bcc 2406a64 │ │ ldr r0, [pc, #4060] @ 2407a28 │ │ mov r2, r7 │ │ @@ -1243399,18 +1243398,18 @@ │ │ add r0, pc, r0 │ │ str r2, [r0] │ │ ldr r0, [pc, #4076] @ 2407aa4 │ │ ldr r5, [pc, #4076] @ 2407aa8 │ │ add r0, pc, r0 │ │ add r5, pc, r5 │ │ b 2406928 │ │ - stc2l 10, cr4, [r4, #308]! @ 0x134 @ │ │ - stc2l 9, cr9, [r1, #348]! @ 0x15c @ │ │ + stc2l 10, cr4, [r4, #488]! @ 0x1e8 @ │ │ + stc2l 9, cr9, [r1, #438]! @ 0x1b6 @ │ │ strdeq r7, [r2, r0] │ │ - stc2l 9, cr9, [r1, #288]! @ 0x120 @ │ │ + stc2l 9, cr9, [r1, #378]! @ 0x17a @ │ │ ldr r0, [pc, #4048] @ 2407aac │ │ add r0, pc, r0 │ │ bl 270d270 │ │ ldr r0, [pc, #4040] @ 2407ab0 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4036] @ 2407ab4 │ │ cmn r0, #1 │ │ @@ -1243427,20 +1243426,20 @@ │ │ ldr r6, [pc, #4004] @ 2407ac4 │ │ add r5, pc, r5 │ │ ldr r7, [pc, #4000] @ 2407ac8 │ │ add r9, pc, r9 │ │ add r6, pc, r6 │ │ add r7, pc, r7 │ │ b 2406b6c │ │ - stc2l 9, cr4, [r4, #434]! @ 0x1b2 @ │ │ - stc2l 9, cr9, [r1, #116]! @ 0x74 @ │ │ + stc2l 10, cr4, [r4, #24]! @ │ │ + stc2l 9, cr9, [r1, #206]! @ 0xce @ │ │ orreq r7, r2, ip, ror r8 │ │ - stc2l 9, cr9, [r1, #56]! @ 0x38 @ │ │ - stc2l 14, cr2, [r4, #756]! @ 0x2f4 │ │ - stc2l 8, cr9, [r1, #760]! @ 0x2f8 │ │ + stc2l 9, cr9, [r1, #146]! @ 0x92 @ │ │ + stc2l 14, cr2, [r4, #936]! @ 0x3a8 │ │ + vcmla.f16 , , , #270 │ │ orreq r6, r2, ip, asr #24 │ │ add r0, r6, r1, lsl #2 │ │ ldr r0, [r0] │ │ ldr r1, [pc, #4044] @ 2407b2c │ │ cmn r0, #1 │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ @@ -1243470,20 +1243469,20 @@ │ │ ldr r0, [pc, #3952] @ 2407b3c │ │ mov r2, r7 │ │ movw r3, #1724 @ 0x6bc │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2406b50 │ │ - stc2l 14, cr12, [r3, #36]! @ 0x24 │ │ - vcmla.f16 d25, d17, d10, #270 │ │ + stc2l 14, cr12, [r3, #216]! @ 0xd8 │ │ + stc2l 8, cr9, [r1, #732]! @ 0x2dc │ │ orreq r7, r2, ip, lsl r9 │ │ orreq r6, r2, r4, lsl #24 │ │ - stc2l 8, cr4, [r4, #884]! @ 0x374 │ │ - stc2l 8, cr9, [r1, #248]! @ 0xf8 │ │ + stc2l 9, cr4, [r4, #20]! @ │ │ + vcmla.f16 , , , #270 │ │ sub r1, r2, #1 │ │ cmp r1, r8 │ │ bcc 2406c24 │ │ ldr r0, [pc, #3892] @ 2407b40 │ │ mov r2, r7 │ │ movw r3, #1748 @ 0x6d4 │ │ add r0, pc, r0 │ │ @@ -1243499,18 +1243498,18 @@ │ │ ldr r0, [pc, r0] │ │ cmp r2, r0 │ │ bne 2406c64 │ │ ldr r0, [pc, #3844] @ 2407b50 │ │ add r0, pc, r0 │ │ b 2406c9c │ │ orreq r7, r2, r0, lsl #15 │ │ - stc2l 2, cr13, [r2, #672]! @ 0x2a0 │ │ - stc2l 2, cr13, [r1, #228]! @ 0xe4 │ │ + stc2l 2, cr13, [r2, #852]! @ 0x354 │ │ + stc2l 2, cr13, [r1, #408]! @ 0x198 │ │ stc2l 12, cr6, [r4, #848]! @ 0x350 │ │ - stc2l 4, cr11, [r2, #608]! @ 0x260 │ │ + stc2l 4, cr11, [r2, #788]! @ 0x314 │ │ ldr r0, [pc, #3816] @ 2407b54 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, r8 │ │ bcc 2406c98 │ │ ldr r0, [pc, #3800] @ 2407b58 │ │ mov r2, r7 │ │ @@ -1243540,24 +1243539,24 @@ │ │ add r0, pc, r0 │ │ str r2, [r0] │ │ ldr r0, [pc, #3716] @ 2407b70 │ │ ldr r5, [pc, #3716] @ 2407b74 │ │ add r0, pc, r0 │ │ add r5, pc, r5 │ │ b 2406b54 │ │ - vcmla.f16 d20, d4, d9, #270 │ │ - stc2l 7, cr9, [r1, #424]! @ 0x1a8 │ │ + stc2l 8, cr4, [r4, #216]! @ 0xd8 │ │ + stc2l 7, cr9, [r1, #604]! @ 0x25c │ │ orreq r7, r2, r8, lsr #13 │ │ orreq r7, r2, r8, lsr #15 │ │ ldrdeq r9, [r4, r8] │ │ @ instruction: 0x01827794 │ │ orreq r7, r2, r0, lsl #13 │ │ @ instruction: 0x01826ab4 │ │ - stc2l 12, cr2, [r4, #996]! @ 0x3e4 │ │ - stc2l 6, cr9, [r1, #1000]! @ 0x3e8 │ │ + stc2l 13, cr2, [r4, #152]! @ 0x98 │ │ + stc2l 7, cr9, [r1, #156]! @ 0x9c │ │ orreq r6, r2, r4, lsl #21 │ │ orreq r9, r4, ip, ror sl │ │ orreq r7, r2, r8, ror #14 │ │ ldr r0, [pc, #3652] @ 2407b78 │ │ movw r3, #2843 @ 0xb1b │ │ ldr r2, [pc, #3648] @ 2407b7c │ │ add r0, pc, r0 │ │ @@ -1243590,19 +1243589,19 @@ │ │ movw r3, #2849 @ 0xb21 │ │ ldr r2, [pc, #4024] @ 2407d68 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24052e8 │ │ - stc2l 0, cr3, [r3, #540]! @ 0x21c │ │ - stc2l 6, cr9, [r1, #600]! @ 0x258 │ │ + stc2l 0, cr3, [r3, #720]! @ 0x2d0 │ │ + stc2l 6, cr9, [r1, #780]! @ 0x30c │ │ teqeq r4, r4, lsl sl │ │ orreq r9, r4, r4, lsl sl │ │ - stc2l 3, cr11, [r2, #144]! @ 0x90 │ │ + stc2l 3, cr11, [r2, #324]! @ 0x144 │ │ ldr r0, [pc, #3984] @ 2407d6c │ │ movw r3, #3238 @ 0xca6 │ │ ldr r2, [pc, #4092] @ 2407de0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ str r4, [r6, r0, lsl #2] │ │ @@ -1243616,19 +1243615,19 @@ │ │ movw r3, #3240 @ 0xca8 │ │ ldr r2, [pc, #4052] @ 2407dec │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2404bec │ │ - stc2l 12, cr2, [r4, #52]! @ 0x34 │ │ - stc2l 6, cr9, [r1, #56]! @ 0x38 │ │ + stc2l 12, cr2, [r4, #232]! @ 0xe8 │ │ + stc2l 6, cr9, [r1, #236]! @ 0xec │ │ @ instruction: 0x0182699c │ │ - stc2l 11, cr12, [r3, #356]! @ 0x164 @ │ │ - stc2l 5, cr9, [r1, #872]! @ 0x368 │ │ + stc2l 11, cr12, [r3, #536]! @ 0x218 @ │ │ + stc2l 6, cr9, [r1, #28]! │ │ orreq r7, r2, ip, ror #12 │ │ orreq r6, r2, r4, asr r9 │ │ ldr r0, [pc, #4004] @ 2407df0 │ │ movw r3, #2227 @ 0x8b3 │ │ ldr r2, [pc, #4000] @ 2407df4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1243657,19 +1243656,19 @@ │ │ movw r3, #2229 @ 0x8b5 │ │ ldr r2, [pc, #4064] @ 2407e9c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2404c94 │ │ - stc2l 6, cr4, [r4, #180]! @ 0xb4 │ │ - stc2l 5, cr9, [r1, #568]! @ 0x238 │ │ + stc2l 6, cr4, [r4, #360]! @ 0x168 │ │ + stc2l 5, cr9, [r1, #748]! @ 0x2ec │ │ ldrdeq r7, [r2, r0] │ │ - stc2l 15, cr12, [r2, #992]! @ 0x3e0 │ │ - stc2l 15, cr12, [r1, #548]! @ 0x224 │ │ + stc2l 0, cr13, [r2, #148]! @ 0x94 │ │ + stc2l 15, cr12, [r1, #728]! @ 0x2d8 │ │ ldr r0, [pc, #4024] @ 2407ea0 │ │ movw r3, #1844 @ 0x734 │ │ ldr r2, [pc, #4020] @ 2407ea4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4008] @ 2407ea8 │ │ @@ -1243698,24 +1243697,24 @@ │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ movw r0, #4999 @ 0x1387 │ │ cmp r1, r0 │ │ bhi 240759c │ │ ldr r4, [r9, r1, lsl #2] │ │ b 24075ec │ │ - stc2l 5, cr4, [r4, #420]! @ 0x1a4 │ │ - stc2l 4, cr9, [r1, #808]! @ 0x328 │ │ + stc2l 5, cr4, [r4, #600]! @ 0x258 │ │ + stc2l 4, cr9, [r1, #988]! @ 0x3dc │ │ orreq r7, r2, r8, lsl #8 │ │ orreq r7, r2, r8, lsl #10 │ │ orreq r9, r4, r8, lsr r8 │ │ strdeq r7, [r2, r4] │ │ orreq r7, r2, r0, ror #7 │ │ orreq r6, r2, r4, lsl r8 │ │ - stc2l 10, cr2, [r4, #356]! @ 0x164 @ │ │ - stc2l 4, cr9, [r1, #360]! @ 0x168 │ │ + stc2l 10, cr2, [r4, #536]! @ 0x218 @ │ │ + stc2l 4, cr9, [r1, #540]! @ 0x21c │ │ orreq r6, r2, r4, ror #15 │ │ ldrdeq r9, [r4, ip] │ │ ldr r0, [pc, #3860] @ 2407ebc │ │ mov r1, r4 │ │ ldr r2, [pc, #3856] @ 2407ec0 │ │ movw r3, #5106 @ 0x13f2 │ │ add r0, pc, r0 │ │ @@ -1243756,20 +1243755,20 @@ │ │ mov r0, r4 │ │ mov r1, r5 │ │ bl 270d3b0 │ │ ldr r0, [pc, #4072] @ 2408038 │ │ add r0, pc, r0 │ │ b 2404b74 │ │ orreq r7, r2, r0, asr #9 │ │ - stc2l 13, cr2, [r3, #924]! @ 0x39c │ │ - stc2l 3, cr9, [r1, #984]! @ 0x3d8 │ │ + stc2l 14, cr2, [r3, #80]! @ 0x50 │ │ + stc2l 4, cr9, [r1, #140]! @ 0x8c │ │ teqeq r4, r4, ror r7 │ │ orreq r9, r4, r4, ror r7 │ │ orreq r6, r2, r4, ror #14 │ │ - stc2l 9, cr2, [r4, #178]! @ 0xb2 @ │ │ + stc2l 9, cr2, [r4, #268]! @ 0x10c @ │ │ ldr r0, [pc, #4036] @ 240803c │ │ mov r1, r4 │ │ ldr r2, [pc, #4032] @ 2408040 │ │ movw r3, #4541 @ 0x11bd │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1243807,27 +1243806,27 @@ │ │ add r2, r8, r3, lsl #3 │ │ mov r0, r4 │ │ mov r1, r5 │ │ bl 270d3b0 │ │ ldr r0, [pc, #4088] @ 2408118 │ │ add r0, pc, r0 │ │ b 2404b74 │ │ - stc2l 3, cr9, [r1, #360]! @ 0x168 │ │ + stc2l 3, cr9, [r1, #540]! @ 0x21c │ │ orreq r6, r2, r8, ror #13 │ │ - vcmla.f16 d28, d19, d21, #270 │ │ - stc2l 3, cr9, [r1, #152]! @ 0x98 │ │ + stc2l 8, cr12, [r3, #840]! @ 0x348 │ │ + stc2l 3, cr9, [r1, #332]! @ 0x14c │ │ @ instruction: 0x018273b8 │ │ orreq r6, r2, r0, lsr #13 │ │ - stc2l 3, cr4, [r4, #484]! @ 0x1e4 │ │ - stc2l 2, cr9, [r1, #872]! @ 0x368 │ │ + stc2l 3, cr4, [r4, #664]! @ 0x298 │ │ + stc2l 3, cr9, [r1, #28]! │ │ orreq r7, r2, ip, lsl r2 │ │ - stc2l 13, cr12, [r2, #272]! @ 0x110 │ │ - stc2l 12, cr12, [r1, #852]! @ 0x354 │ │ + stc2l 13, cr12, [r2, #452]! @ 0x1c4 │ │ + stc2l 13, cr12, [r1, #8]! │ │ stc2l 7, cr6, [r4, #448]! @ 0x1c0 │ │ - stc2l 13, cr12, [r1, #228]! @ 0xe4 │ │ + stc2l 13, cr12, [r1, #408]! @ 0x198 │ │ ldr r0, [pc, #4028] @ 240811c │ │ mov r1, r4 │ │ ldr r2, [pc, #4024] @ 2408120 │ │ movw r3, #2257 @ 0x8d1 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1243909,29 +1243908,29 @@ │ │ ldr r2, [pc, #3772] @ 2408164 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ str r4, [r5, r1, lsl #2] │ │ b 2404c00 │ │ - stc2l 2, cr4, [r4, #324]! @ 0x144 │ │ - stc2l 1, cr9, [r1, #712]! @ 0x2c8 │ │ + stc2l 2, cr4, [r4, #504]! @ 0x1f8 │ │ + stc2l 1, cr9, [r1, #892]! @ 0x37c │ │ strdeq r7, [r2, r0] │ │ strdeq r7, [r2, r0] │ │ orreq r9, r4, r0, lsr #10 │ │ ldrdeq r7, [r2, ip] │ │ orreq r7, r2, r8, asr #1 │ │ strdeq r6, [r2, ip] │ │ - stc2l 7, cr2, [r4, #260]! @ 0x104 │ │ - stc2l 1, cr9, [r1, #264]! @ 0x108 │ │ + stc2l 7, cr2, [r4, #440]! @ 0x1b8 │ │ + stc2l 1, cr9, [r1, #444]! @ 0x1bc │ │ orreq r6, r2, ip, asr #9 │ │ orreq r9, r4, r4, asr #9 │ │ @ instruction: 0x018271b0 │ │ - stc2l 10, cr2, [r3, #828]! @ 0x33c @ │ │ - stc2l 0, cr9, [r1, #888]! @ 0x378 │ │ + stc2l 10, cr2, [r3, #1008]! @ 0x3f0 @ │ │ + stc2l 1, cr9, [r1, #44]! @ 0x2c │ │ teqeq r4, ip, asr r4 │ │ orreq r9, r4, ip, asr r4 │ │ orreq r6, r2, r0, lsr ip │ │ strdeq r6, [r2, r4] │ │ strdeq r7, [r2, r4] │ │ strdeq sl, [r7], #40 @ 0x28 @ │ │ rsceq sl, r7, ip, asr #13 │ │ @@ -1244006,16 +1244005,16 @@ │ │ add r0, pc, r0 │ │ str r3, [r0, r1, lsl #2] │ │ b 2407bdc │ │ orreq r7, r2, ip, lsl #1 │ │ orreq r6, r2, r4, lsl #23 │ │ orreq r6, r2, ip, lsl #7 │ │ orreq r7, r2, r4, lsl #1 │ │ - stc2l 9, cr2, [r3, #350]! @ 0x15e @ │ │ - stc2l 15, cr8, [r1, #760]! @ 0x2f8 │ │ + stc2l 9, cr2, [r3, #440]! @ 0x1b8 @ │ │ + stc2l 15, cr8, [r1, #940]! @ 0x3ac │ │ ldrdeq sl, [r7], #148 @ 0x94 @ │ │ orreq r6, r2, r4, lsl fp │ │ orreq r9, r4, r4, lsr r3 │ │ teqeq r4, ip, lsr #6 │ │ orreq r6, r2, ip, lsl r3 │ │ movw r4, #5000 @ 0x1388 │ │ cmp r1, r4 │ │ @@ -1244062,16 +1244061,16 @@ │ │ add r1, pc, r1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #4032] @ 24084d4 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 2407a90 │ │ - stc2l 5, cr2, [r4, #132]! @ 0x84 │ │ - stc2l 15, cr8, [r1, #136]! @ 0x88 │ │ + stc2l 5, cr2, [r4, #312]! @ 0x138 │ │ + stc2l 15, cr8, [r1, #316]! @ 0x13c │ │ @ instruction: 0x018262b0 │ │ ldr r0, [pc, #4004] @ 24084d8 │ │ movw r3, #2280 @ 0x8e8 │ │ ldr r2, [pc, #4000] @ 24084dc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1244086,20 +1244085,20 @@ │ │ ldr r5, [pc, #3964] @ 24084e8 │ │ sub r1, r2, #1 │ │ add r5, pc, r5 │ │ cmp r1, r4 │ │ bhi 2407864 │ │ ldr r4, [sl, r1, lsl #2] │ │ b 24078bc │ │ - stc2l 4, cr12, [r3, #436]! @ 0x1b4 │ │ - stc2l 14, cr8, [r1, #952]! @ 0x3b8 │ │ + stc2l 4, cr12, [r3, #616]! @ 0x268 │ │ + stc2l 15, cr8, [r1, #108]! @ 0x6c │ │ orreq r6, r2, r0, lsl #31 │ │ orreq r6, r2, r8, ror #4 │ │ - stc2l 15, cr3, [r4, #276]! @ 0x114 │ │ - stc2l 14, cr8, [r1, #664]! @ 0x298 │ │ + stc2l 15, cr3, [r4, #456]! @ 0x1c8 │ │ + stc2l 14, cr8, [r1, #844]! @ 0x34c │ │ orreq r6, r2, r8, ror #27 │ │ ldr r0, [pc, #3848] @ 24084ac │ │ movw r3, #2242 @ 0x8c2 │ │ ldr r2, [pc, #3844] @ 24084b0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1244118,20 +1244117,20 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3788] @ 24084c0 │ │ add r2, r4, #1 │ │ add r0, pc, r0 │ │ str r2, [r0, r1, lsl #2] │ │ b 2407a90 │ │ - stc2l 9, cr12, [r2, #32]! @ │ │ - vcmla.f16 d28, d17, d17, #270 │ │ + stc2l 9, cr12, [r2, #122]! @ 0x7a @ │ │ + vcmla.f16 q14, , q7, #270 │ │ stc2l 3, cr6, [r4, #240]! @ 0xf0 │ │ - stc2l 1, cr3, [r1, #996]! @ 0x3e4 │ │ - stc2l 6, cr14, [r2, #24]! │ │ - stc2l 14, cr8, [r1, #72]! @ 0x48 │ │ + stc2l 2, cr3, [r1, #152]! @ 0x98 │ │ + stc2l 6, cr14, [r2, #204]! @ 0xcc │ │ + stc2l 14, cr8, [r1, #252]! @ 0xfc │ │ @ instruction: 0x0182619c │ │ rsceq r5, r7, ip, lsr r2 │ │ orreq r0, r3, ip, asr #21 │ │ movw r4, #5000 @ 0x1388 │ │ cmp r1, r4 │ │ bcc 240764c │ │ ldr r0, [pc, #3896] @ 2408570 │ │ @@ -1244178,16 +1244177,16 @@ │ │ add r1, pc, r1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3764] @ 2408598 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 2404c00 │ │ - stc2l 3, cr2, [r4, #420]! @ 0x1a4 │ │ - stc2l 13, cr8, [r1, #424]! @ 0x1a8 │ │ + stc2l 3, cr2, [r4, #600]! @ 0x258 │ │ + stc2l 13, cr8, [r1, #604]! @ 0x25c │ │ strdeq r6, [r2, r8] │ │ ldr r0, [pc, #3736] @ 240859c │ │ movw r3, #3291 @ 0xcdb │ │ ldr r2, [pc, #3732] @ 24085a0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1244198,20 +1244197,20 @@ │ │ ldr r2, [pc, #3708] @ 24085a8 │ │ ldr r2, [pc, r2] │ │ sub r1, r2, #1 │ │ cmp r1, r4 │ │ bhi 2407b84 │ │ ldr r4, [r9, r1, lsl #2] │ │ b 2407bdc │ │ - stc2l 2, cr12, [r3, #724]! @ 0x2d4 │ │ - stc2l 13, cr8, [r1, #216]! @ 0xd8 │ │ + stc2l 2, cr12, [r3, #904]! @ 0x388 │ │ + stc2l 13, cr8, [r1, #396]! @ 0x18c │ │ orreq r6, r2, r8, asr #27 │ │ strheq r6, [r2, r0] │ │ - stc2l 13, cr3, [r4, #564]! @ 0x234 │ │ - stc2l 12, cr8, [r1, #952]! @ 0x3b8 │ │ + stc2l 13, cr3, [r4, #744]! @ 0x2e8 │ │ + stc2l 13, cr8, [r1, #108]! @ 0x6c │ │ ldr r0, [pc, #3820] @ 240864c │ │ movw r3, #3963 @ 0xf7b │ │ ldr r2, [pc, #3816] @ 2408650 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3804] @ 2408654 │ │ @@ -1244224,18 +1244223,18 @@ │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, r4 │ │ bcs 2407ee0 │ │ mov r3, r1 │ │ b 2407f38 │ │ orreq r6, r2, r0, lsr ip │ │ - stc2l 7, cr12, [r2, #352]! @ 0x160 │ │ - stc2l 6, cr12, [r1, #932]! @ 0x3a4 │ │ + stc2l 7, cr12, [r2, #532]! @ 0x214 │ │ + stc2l 7, cr12, [r1, #88]! @ 0x58 │ │ stc2l 1, cr6, [r4, #528]! @ 0x210 │ │ - stc2l 11, cr6, [r2, #804]! @ 0x324 @ │ │ + stc2l 11, cr6, [r2, #984]! @ 0x3d8 @ │ │ ldr r0, [pc, #3860] @ 24086d4 │ │ movw r3, #4806 @ 0x12c6 │ │ ldr r2, [pc, #3856] @ 24086d8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3844] @ 24086dc │ │ @@ -1244247,34 +1244246,34 @@ │ │ ldr r0, [pc, #3824] @ 24086e0 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, r4 │ │ bcs 2408168 │ │ mov r3, r1 │ │ b 24081c0 │ │ - stc2l 4, cr14, [r2, #280]! @ 0x118 │ │ - stc2l 12, cr8, [r1, #328]! @ 0x148 │ │ + stc2l 4, cr14, [r2, #460]! @ 0x1cc │ │ + stc2l 12, cr8, [r1, #508]! @ 0x1fc │ │ ldrdeq r5, [r2, ip] │ │ rsceq r5, r7, ip, ror r0 │ │ rsceq pc, r7, r0, lsl #9 │ │ orreq r0, r3, r4, lsl #18 │ │ @ instruction: 0x0182ba98 │ │ eorseq r1, r4, r4, ror #25 │ │ orreq r5, r2, r8, asr pc │ │ strdeq pc, [r7], #60 @ 0x3c @ │ │ rsceq sl, r7, r0, asr #11 │ │ orreq fp, r2, ip, asr #20 │ │ orreq r5, r3, r0, lsr #13 │ │ - stc2l 11, cr8, [r1, #520]! @ 0x208 @ │ │ + stc2l 11, cr8, [r1, #700]! @ 0x2bc @ │ │ orreq r5, r2, r8, ror #29 │ │ - stc2l 11, cr3, [r4, #788]! @ 0x314 @ │ │ + stc2l 11, cr3, [r4, #968]! @ 0x3c8 @ │ │ orreq r5, r2, r4, lsr #29 │ │ rsceq pc, r7, r4, asr #6 │ │ - stc2l 14, cr13, [r3, #72]! @ 0x48 │ │ - stc2l 13, cr13, [r3, #872]! @ 0x368 │ │ + stc2l 14, cr13, [r3, #252]! @ 0xfc │ │ + stc2l 14, cr13, [r3, #28]! │ │ orreq r5, r2, r0, lsr lr │ │ strdeq r6, [r2, ip] │ │ mlaseq r4, r8, fp, r1 │ │ eorseq r1, r4, r8, lsl #23 │ │ ldr r0, [pc, #3200] @ 24084ec │ │ movw r3, #2282 @ 0x8ea │ │ ldr r2, [pc, #3196] @ 24084f0 │ │ @@ -1244384,18 +1244383,18 @@ │ │ vldr d16, [r0] │ │ vcvt.s32.f64 s0, d16 │ │ vmov r4, s0 │ │ bhi 2407a3c │ │ str r4, [r9, r1, lsl #2] │ │ b 2407a6c │ │ smlaleq pc, r7, ip, r2 @ │ │ - stc2l 13, cr13, [r3, #408]! @ 0x198 │ │ + stc2l 13, cr13, [r3, #588]! @ 0x24c │ │ @ instruction: 0x01825dbc │ │ eorseq r1, r4, r0, lsr #22 │ │ - stc2l 13, cr13, [r3, #168]! @ 0xa8 │ │ + stc2l 13, cr13, [r3, #348]! @ 0x15c │ │ orreq r5, r2, r0, lsl #27 │ │ ldr r0, [pc, #2820] @ 2408548 │ │ movw r3, #2285 @ 0x8ed │ │ ldr r2, [pc, #2816] @ 240854c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1244424,15 +1244423,15 @@ │ │ orreq fp, r2, ip, ror #16 │ │ ldrhteq r1, [r4], -r8 │ │ orreq r5, r2, ip, lsr #26 │ │ ldrdeq pc, [r7], #16 @ │ │ smlaleq sl, r7, r4, r3 │ │ orreq fp, r2, r0, lsr #16 │ │ orreq r5, r3, r4, ror r4 │ │ - stc2l 9, cr8, [r1, #172]! @ 0xac @ │ │ + stc2l 9, cr8, [r1, #262]! @ 0x106 @ │ │ ldr r0, [pc, #2692] @ 2408558 │ │ movw r3, #2286 @ 0x8ee │ │ ldr r2, [pc, #2688] @ 240855c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #2676] @ 2408560 │ │ @@ -1244450,34 +1244449,34 @@ │ │ ldr r2, [pc, #2640] @ 240856c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2407a7c │ │ @ instruction: 0x01825cbc │ │ - stc2l 9, cr3, [r4, #306]! @ 0x132 @ │ │ + stc2l 9, cr3, [r4, #396]! @ 0x18c @ │ │ orreq r5, r2, r8, ror ip │ │ rsceq pc, r7, r8, lsl r1 @ │ │ - stc2l 11, cr13, [r3, #920]! @ 0x398 @ │ │ - stc2l 11, cr13, [r3, #664]! @ 0x298 @ │ │ + stc2l 12, cr13, [r3, #76]! @ 0x4c │ │ + stc2l 11, cr13, [r3, #844]! @ 0x34c @ │ │ strdeq r5, [r2, ip] │ │ orreq r6, r2, r8, asr #7 │ │ eorseq r1, r4, r4, ror #18 │ │ eorseq r1, r4, r4, asr r9 │ │ rsceq pc, r7, r8, rrx │ │ - stc2l 11, cr13, [r3, #200]! @ 0xc8 @ │ │ + stc2l 11, cr13, [r3, #380]! @ 0x17c @ │ │ orreq r5, r2, r8, lsl #23 │ │ eorseq r1, r4, ip, ror #17 │ │ - stc2l 10, cr13, [r3, #984]! @ 0x3d8 @ │ │ + stc2l 11, cr13, [r3, #140]! @ 0x8c @ │ │ orreq r5, r2, ip, asr #22 │ │ ldrhteq r1, [r4], -ip │ │ orreq r6, r2, r8, lsl #6 │ │ rsceq sl, r7, r0, asr #3 │ │ - stc2l 15, cr13, [r2, #232]! @ 0xe8 │ │ - stc2l 7, cr8, [r1, #280]! @ 0x118 │ │ + stc2l 15, cr13, [r2, #412]! @ 0x19c │ │ + stc2l 7, cr8, [r1, #460]! @ 0x1cc │ │ rsceq r4, r7, r8, ror fp │ │ ldr r0, [pc, #2592] @ 24085ac │ │ movw r3, #3293 @ 0xcdd │ │ ldr r2, [pc, #2588] @ 24085b0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1244588,20 +1244587,20 @@ │ │ vmov r4, s0 │ │ bhi 2407d70 │ │ ldr r0, [pc, #2236] @ 2408608 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 2407da8 │ │ orreq r5, r2, r4, asr #21 │ │ - stc2l 12, cr11, [r3, #532]! @ 0x214 │ │ - stc2l 7, cr8, [r1, #24]! │ │ + stc2l 12, cr11, [r3, #712]! @ 0x2c8 │ │ + stc2l 7, cr8, [r1, #204]! @ 0xcc │ │ @ instruction: 0x01825a94 │ │ - stc2l 12, cr1, [r4, #836]! @ 0x344 │ │ - stc2l 6, cr8, [r1, #840]! @ 0x348 │ │ - stc2l 12, cr1, [r4, #628]! @ 0x274 │ │ + stc2l 12, cr1, [r4, #1016]! @ 0x3f8 │ │ + stc2l 6, cr8, [r1, #1020]! @ 0x3fc │ │ + stc2l 12, cr1, [r4, #808]! @ 0x328 │ │ ldr r0, [pc, #2196] @ 240860c │ │ mov r3, #3296 @ 0xce0 │ │ ldr r2, [pc, #2192] @ 2408610 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r7, [pc, #2180] @ 2408614 │ │ @@ -1244622,23 +1244621,23 @@ │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ mov r1, #0 │ │ cmp r0, #0 │ │ movwgt r1, #1 │ │ str r1, [r8] │ │ b 2404c00 │ │ - stc2l 6, cr8, [r1, #632]! @ 0x278 │ │ + stc2l 6, cr8, [r1, #812]! @ 0x32c │ │ orreq r5, r2, r8, lsr #20 │ │ - stc2l 12, cr1, [r4, #420]! @ 0x1a4 │ │ - stc2l 6, cr8, [r1, #424]! @ 0x1a8 │ │ - stc2l 12, cr1, [r4, #180]! @ 0xb4 │ │ - stc2l 6, cr8, [r1, #184]! @ 0xb8 │ │ + stc2l 12, cr1, [r4, #600]! @ 0x258 │ │ + stc2l 6, cr8, [r1, #604]! @ 0x25c │ │ + stc2l 12, cr1, [r4, #360]! @ 0x168 │ │ + stc2l 6, cr8, [r1, #364]! @ 0x16c │ │ @ instruction: 0x018259b8 │ │ - stc2l 11, cr1, [r4, #996]! @ 0x3e4 @ │ │ - stc2l 5, cr8, [r1, #1000]! @ 0x3e8 │ │ + stc2l 12, cr1, [r4, #152]! @ 0x98 │ │ + stc2l 6, cr8, [r1, #156]! @ 0x9c │ │ ldr r0, [pc, #2072] @ 2408624 │ │ movw r3, #3297 @ 0xce1 │ │ ldr r2, [pc, #2068] @ 2408628 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #2056] @ 240862c │ │ @@ -1244668,32 +1244667,32 @@ │ │ ldr r2, [pc, #1984] @ 2408644 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2407dc0 │ │ orreq r5, r2, r8, lsl #19 │ │ - stc2l 11, cr11, [r3, #276]! @ 0x114 @ │ │ - stc2l 5, cr8, [r1, #792]! @ 0x318 │ │ - stc2l 13, cr13, [r2, #536]! @ 0x218 │ │ - stc2l 5, cr8, [r1, #584]! @ 0x248 │ │ + stc2l 11, cr11, [r3, #456]! @ 0x1c8 @ │ │ + stc2l 5, cr8, [r1, #972]! @ 0x3cc │ │ + stc2l 13, cr13, [r2, #716]! @ 0x2cc │ │ + stc2l 5, cr8, [r1, #764]! @ 0x2fc │ │ rsceq r4, r7, r4, asr #19 │ │ orreq r5, r2, r0, lsl r9 │ │ - stc2l 11, cr1, [r4, #324]! @ 0x144 @ │ │ - stc2l 5, cr8, [r1, #328]! @ 0x148 │ │ + stc2l 11, cr1, [r4, #504]! @ 0x1f8 @ │ │ + stc2l 5, cr8, [r1, #508]! @ 0x1fc │ │ orreq r5, r2, r8, asr #17 │ │ - stc2l 5, cr3, [r4, #436]! @ 0x1b4 │ │ - stc2l 4, cr8, [r1, #824]! @ 0x338 │ │ + stc2l 5, cr3, [r4, #616]! @ 0x268 │ │ + stc2l 4, cr8, [r1, #1004]! @ 0x3ec │ │ orreq r5, r2, r8, asr r8 │ │ - stc2l 4, cr8, [r1, #676]! @ 0x2a4 │ │ - stc2l 4, cr8, [r1, #632]! @ 0x278 │ │ + stc2l 4, cr8, [r1, #856]! @ 0x358 │ │ + stc2l 4, cr8, [r1, #812]! @ 0x32c │ │ orreq r5, r2, r8, lsr #16 │ │ orreq r0, r3, r4, ror r1 │ │ - stc2l 14, cr1, [r3, #284]! @ 0x11c │ │ - stc2l 4, cr8, [r1, #344]! @ 0x158 │ │ + stc2l 14, cr1, [r3, #464]! @ 0x1d0 │ │ + stc2l 4, cr8, [r1, #524]! @ 0x20c │ │ ldr r0, [pc, #1908] @ 240865c │ │ movw r3, #3963 @ 0xf7b │ │ ldr r2, [pc, #1904] @ 2408660 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ @@ -1244773,16 +1244772,16 @@ │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, r4 │ │ bcs 2408048 │ │ mov r0, r1 │ │ b 2408074 │ │ stc2l 9, cr5, [r4, #108]! @ 0x6c @ │ │ - stc2l 4, cr3, [r4, #628]! @ 0x274 │ │ - stc2l 3, cr8, [r1, #1016]! @ 0x3f8 │ │ + stc2l 4, cr3, [r4, #808]! @ 0x328 │ │ + stc2l 4, cr8, [r1, #172]! @ 0xac │ │ orreq r5, r2, r8, lsl #15 │ │ ldr r0, [pc, #1624] @ 24086a8 │ │ movw r3, #3980 @ 0xf8c │ │ ldr r2, [pc, #1620] @ 24086ac │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1244798,20 +1244797,20 @@ │ │ mul r4, r0, r2 │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ str r4, [r3] │ │ bcs 24080b8 │ │ mov r0, r4 │ │ b 24080e4 │ │ - stc2l 3, cr8, [r1, #868]! @ 0x364 │ │ - stc2l 3, cr8, [r1, #824]! @ 0x338 │ │ + stc2l 4, cr8, [r1, #24]! │ │ + stc2l 3, cr8, [r1, #1004]! @ 0x3ec │ │ orreq r5, r2, r8, asr r7 │ │ orreq r0, r3, r4, lsr #1 │ │ - stc2l 13, cr1, [r3, #476]! @ 0x1dc │ │ - stc2l 3, cr8, [r1, #536]! @ 0x218 │ │ + stc2l 13, cr1, [r3, #656]! @ 0x290 │ │ + stc2l 3, cr8, [r1, #716]! @ 0x2cc │ │ ldr r0, [pc, #1532] @ 24086bc │ │ movw r3, #3982 @ 0xf8e │ │ ldr r2, [pc, #1528] @ 24086c0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r2, [pc, #1516] @ 24086c4 │ │ @@ -1244828,34 +1244827,34 @@ │ │ mov r0, r5 │ │ mov r2, r9 │ │ add r1, r1, r4 │ │ bl 270d970 │ │ ldr r0, [pc, #1468] @ 24086d0 │ │ add r0, pc, r0 │ │ b 2404b74 │ │ - stc2l 14, cr11, [r1, #148]! @ 0x94 │ │ - stc2l 3, cr3, [r4, #724]! @ 0x2d4 │ │ - stc2l 3, cr8, [r1, #88]! @ 0x58 │ │ + stc2l 14, cr11, [r1, #328]! @ 0x148 │ │ + stc2l 3, cr3, [r4, #904]! @ 0x388 │ │ + stc2l 3, cr8, [r1, #268]! @ 0x10c │ │ orreq r5, r2, r0, lsr #13 │ │ - stc2l 6, cr13, [r3, #396]! @ 0x18c │ │ - stc2l 2, cr8, [r1, #904]! @ 0x388 │ │ + stc2l 6, cr13, [r3, #576]! @ 0x240 │ │ + stc2l 3, cr8, [r1, #60]! @ 0x3c │ │ orreq r5, r2, ip, ror #12 │ │ - stc2l 12, cr1, [r3, #572]! @ 0x23c │ │ - stc2l 2, cr8, [r1, #632]! @ 0x278 │ │ + stc2l 12, cr1, [r3, #752]! @ 0x2f0 │ │ + stc2l 2, cr8, [r1, #812]! @ 0x32c │ │ eorseq r1, r4, r8, lsr #7 │ │ eorseq r1, r4, r4, lsr #7 │ │ teqeq r4, r0, lsl r6 │ │ orreq r8, r4, r0, lsl r6 │ │ strdeq r5, [r2, r0] │ │ orreq r8, r4, r8, ror #11 │ │ rsceq r4, r7, r8, ror #12 │ │ teqeq r4, r8, lsr #11 │ │ @ instruction: 0x01825598 │ │ - stc2l 7, cr1, [r4, #868]! @ 0x364 │ │ - stc2l 1, cr8, [r1, #872]! @ 0x368 │ │ + vcmla.f16 d17, d4, d6, #270 │ │ + stc2l 2, cr8, [r1, #28]! │ │ ldr r0, [pc, #1396] @ 24086e4 │ │ movw r3, #4806 @ 0x12c6 │ │ ldr r2, [pc, #1392] @ 24086e8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ @@ -1244954,22 +1244953,22 @@ │ │ mul r4, r0, r2 │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ str r4, [r3] │ │ bcs 2408330 │ │ mov r3, r4 │ │ b 240835c │ │ - stc2l 1, cr3, [r4, #964]! @ 0x3c4 │ │ - stc2l 1, cr8, [r1, #328]! @ 0x148 │ │ + stc2l 2, cr3, [r4, #120]! @ 0x78 │ │ + stc2l 1, cr8, [r1, #508]! @ 0x1fc │ │ ldrdeq r5, [r2, ip] │ │ - stc2l 11, cr1, [r3, #168]! @ 0xa8 @ │ │ - stc2l 1, cr8, [r1, #120]! @ 0x78 │ │ + stc2l 11, cr1, [r3, #348]! @ 0x15c @ │ │ + stc2l 1, cr8, [r1, #300]! @ 0x12c │ │ orreq r5, r2, r8, lsr #9 │ │ - stc2l 10, cr1, [r3, #812]! @ 0x32c @ │ │ - stc2l 0, cr8, [r1, #872]! @ 0x368 │ │ + stc2l 10, cr1, [r3, #992]! @ 0x3e0 @ │ │ + stc2l 1, cr8, [r1, #28]! │ │ ldr r0, [pc, #1032] @ 2408740 │ │ movw r3, #4825 @ 0x12d9 │ │ ldr r2, [pc, #1028] @ 2408744 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r2, [pc, #1016] @ 2408748 │ │ @@ -1245020,16 +1245019,16 @@ │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, r4 │ │ bcs 2408424 │ │ mov r3, r1 │ │ b 240847c │ │ rsceq r4, r7, r0, lsr #9 │ │ - stc2l 0, cr3, [r4, #676]! @ 0x2a4 │ │ - stc2l 0, cr8, [r1, #40]! @ 0x28 │ │ + stc2l 0, cr3, [r4, #856]! @ 0x358 │ │ + stc2l 0, cr8, [r1, #220]! @ 0xdc │ │ orreq r5, r2, r0, asr pc │ │ ldr r0, [pc, #828] @ 2408768 │ │ movw r3, #4830 @ 0x12de │ │ ldr r2, [pc, #824] @ 240876c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1245054,198 +1245053,198 @@ │ │ add r0, r7, r1, lsl #2 │ │ add r1, sp, #20 │ │ mov r3, #1000 @ 0x3e8 │ │ bl 270d3c0 │ │ ldr r0, [pc, #736] @ 240877c │ │ add r0, pc, r0 │ │ b 2404b74 │ │ - stc2l 10, cr3, [r3, #664]! @ 0x298 @ │ │ + stc2l 10, cr3, [r3, #844]! @ 0x34c @ │ │ orreq r5, r2, ip, ror #6 │ │ - stc2l 10, cr13, [r1, #976]! @ 0x3d0 @ │ │ - stc2l 4, cr11, [r3, #340]! @ 0x154 │ │ - stc2l 14, cr7, [r1, #856]! @ 0x358 │ │ + stc2l 11, cr13, [r1, #132]! @ 0x84 @ │ │ + stc2l 4, cr11, [r3, #520]! @ 0x208 │ │ + stc2l 15, cr7, [r1, #12]! │ │ orreq r5, r2, r4, ror #4 │ │ - stc2l 4, cr1, [r4, #644]! @ 0x284 │ │ - stc2l 14, cr7, [r1, #648]! @ 0x288 │ │ + stc2l 4, cr1, [r4, #824]! @ 0x338 │ │ + stc2l 14, cr7, [r1, #828]! @ 0x33c │ │ orreq r9, r3, r8, asr #15 │ │ - stc2l 3, cr13, [r3, #204]! @ 0xcc │ │ - stc2l 15, cr7, [r1, #712]! @ 0x2c8 │ │ - stc2l 9, cr11, [r1, #434]! @ 0x1b2 @ │ │ + stc2l 3, cr13, [r3, #384]! @ 0x180 │ │ + stc2l 15, cr7, [r1, #892]! @ 0x37c │ │ + stc2l 10, cr11, [r1, #24]! @ │ │ ldrdeq r5, [r2, r8] │ │ - stc2l 9, cr1, [r3, #192]! @ 0xc0 @ │ │ - stc2l 7, cr13, [r2, #232]! @ 0xe8 │ │ - stc2l 15, cr7, [r1, #280]! @ 0x118 │ │ + stc2l 9, cr1, [r3, #282]! @ 0x11a @ │ │ + stc2l 7, cr13, [r2, #412]! @ 0x19c │ │ + stc2l 15, cr7, [r1, #460]! @ 0x1cc │ │ rsceq r4, r7, r4, ror r3 │ │ @ instruction: 0x018252bc │ │ teqeq r4, ip, lsr #5 │ │ - stc2l 15, cr12, [r3, #572]! @ 0x23c │ │ - stc2l 12, cr7, [r1, #56]! @ 0x38 │ │ + stc2l 15, cr12, [r3, #752]! @ 0x2f0 │ │ + stc2l 12, cr7, [r1, #236]! @ 0xec │ │ strexeq r4, ip, [r2] │ │ - stc2l 11, cr7, [r1, #916]! @ 0x394 @ │ │ - stc2l 11, cr7, [r1, #872]! @ 0x368 @ │ │ + stc2l 12, cr7, [r1, #72]! @ 0x48 │ │ + stc2l 12, cr7, [r1, #28]! │ │ orreq r4, r2, r4, ror #30 │ │ @ instruction: 0x0182f8bc │ │ - stc2l 5, cr1, [r3, #556]! @ 0x22c │ │ - stc2l 11, cr7, [r1, #616]! @ 0x268 @ │ │ + stc2l 5, cr1, [r3, #736]! @ 0x2e0 │ │ + stc2l 11, cr7, [r1, #796]! @ 0x31c @ │ │ orreq r4, r2, r4, lsr #30 │ │ - stc2l 14, cr12, [r3, #860]! @ 0x35c │ │ - stc2l 11, cr7, [r1, #344]! @ 0x158 @ │ │ + stc2l 15, cr12, [r3, #16]! │ │ + stc2l 11, cr7, [r1, #524]! @ 0x20c @ │ │ orreq r4, r2, r0, ror #29 │ │ - stc2l 5, cr1, [r3, #60]! @ 0x3c │ │ - stc2l 11, cr7, [r1, #120]! @ 0x78 @ │ │ + stc2l 5, cr1, [r3, #240]! @ 0xf0 │ │ + stc2l 11, cr7, [r1, #300]! @ 0x12c @ │ │ orreq r4, r2, r8, lsr #29 │ │ - stc2l 4, cr1, [r3, #920]! @ 0x398 │ │ - stc2l 10, cr7, [r1, #872]! @ 0x368 @ │ │ + stc2l 5, cr1, [r3, #76]! @ 0x4c │ │ + stc2l 11, cr7, [r1, #28]! @ │ │ orreq r4, r2, r4, ror #28 │ │ orreq lr, r3, ip, lsl r2 │ │ - stc2l 4, cr1, [r3, #556]! @ 0x22c │ │ - stc2l 10, cr7, [r1, #616]! @ 0x268 @ │ │ + stc2l 4, cr1, [r3, #736]! @ 0x2e0 │ │ + stc2l 10, cr7, [r1, #796]! @ 0x31c @ │ │ orreq r4, r2, r4, lsr #28 │ │ - stc2l 15, cr10, [r3, #724]! @ 0x2d4 │ │ - stc2l 10, cr7, [r1, #216]! @ 0xd8 @ │ │ + stc2l 15, cr10, [r3, #904]! @ 0x388 │ │ + stc2l 10, cr7, [r1, #396]! @ 0x18c @ │ │ orreq r4, r2, r0, asr #27 │ │ orreq r9, r3, r8, asr #6 │ │ - stc2l 15, cr0, [r4, #660]! @ 0x294 │ │ - stc2l 9, cr7, [r1, #332]! @ 0x14c @ │ │ + stc2l 15, cr0, [r4, #840]! @ 0x348 │ │ + stc2l 9, cr7, [r1, #422]! @ 0x1a6 @ │ │ ldrdeq r9, [r3, r0] │ │ orreq r4, r2, r4, lsr #26 │ │ - stc2l 14, cr10, [r3, #916]! @ 0x394 │ │ - stc2l 9, cr7, [r1, #204]! @ 0xcc @ │ │ - stc2l 14, cr2, [r4, #900]! @ 0x384 │ │ - stc2l 14, cr7, [r1, #264]! @ 0x108 │ │ + stc2l 15, cr10, [r3, #72]! @ 0x48 │ │ + stc2l 9, cr7, [r1, #294]! @ 0x126 @ │ │ + stc2l 15, cr2, [r4, #56]! @ 0x38 │ │ + stc2l 14, cr7, [r1, #444]! @ 0x1bc │ │ orreq r5, r2, r8, lsl #27 │ │ - stc2l 8, cr3, [r3, #888]! @ 0x378 │ │ + stc2l 9, cr3, [r3, #22]! @ │ │ orreq r5, r2, r4, lsr #3 │ │ - stc2l 1, cr13, [r3, #428]! @ 0x1ac │ │ - stc2l 13, cr7, [r1, #936]! @ 0x3a8 │ │ + stc2l 1, cr13, [r3, #608]! @ 0x260 │ │ + stc2l 14, cr7, [r1, #92]! @ 0x5c │ │ orreq r3, r4, ip, asr #6 │ │ - vcmla.f16 d27, d1, d13, #270 │ │ + stc2l 8, cr11, [r1, #232]! @ 0xe8 │ │ orreq r5, r2, r8, lsl #26 │ │ - stc2l 7, cr1, [r3, #576]! @ 0x240 │ │ - stc2l 5, cr13, [r2, #424]! @ 0x1a8 │ │ - stc2l 13, cr7, [r1, #472]! @ 0x1d8 │ │ + stc2l 7, cr1, [r3, #756]! @ 0x2f4 │ │ + stc2l 5, cr13, [r2, #604]! @ 0x25c │ │ + stc2l 13, cr7, [r1, #652]! @ 0x28c │ │ rsceq r4, r7, r8, lsr #3 │ │ strdeq r5, [r2, r4] │ │ - stc2l 2, cr1, [r3, #1000]! @ 0x3e8 │ │ - vcmla.f16 , , q15, #270 │ │ + stc2l 3, cr1, [r3, #156]! @ 0x9c │ │ + stc2l 9, cr7, [r1, #54]! @ 0x36 @ │ │ orreq r4, r2, ip, ror ip │ │ - vcmla.f16 , , , #270 │ │ - stc2l 8, cr7, [r1, #744]! @ 0x2e8 │ │ + stc2l 8, cr7, [r1, #968]! @ 0x3c8 │ │ + vcmla.f16 , , , #270 │ │ orreq r4, r2, r4, asr #24 │ │ @ instruction: 0x0182f594 │ │ - stc2l 2, cr1, [r3, #396]! @ 0x18c │ │ - stc2l 8, cr7, [r1, #456]! @ 0x1c8 │ │ + stc2l 2, cr1, [r3, #576]! @ 0x240 │ │ + stc2l 8, cr7, [r1, #636]! @ 0x27c │ │ strdeq r4, [r2, ip] │ │ - stc2l 11, cr12, [r3, #700]! @ 0x2bc @ │ │ - vcmla.f16 d23, d1, d30, #270 │ │ + stc2l 11, cr12, [r3, #880]! @ 0x370 @ │ │ + stc2l 8, cr7, [r1, #364]! @ 0x16c │ │ @ instruction: 0x01824bb8 │ │ @ instruction: 0x01842d90 │ │ - stc2l 1, cr1, [r3, #892]! @ 0x37c │ │ - stc2l 7, cr7, [r1, #952]! @ 0x3b8 │ │ + stc2l 2, cr1, [r3, #48]! @ 0x30 │ │ + stc2l 8, cr7, [r1, #108]! @ 0x6c │ │ orreq r4, r2, r8, ror fp │ │ - stc2l 1, cr1, [r3, #728]! @ 0x2d8 │ │ - stc2l 7, cr7, [r1, #680]! @ 0x2a8 │ │ + stc2l 1, cr1, [r3, #908]! @ 0x38c │ │ + stc2l 7, cr7, [r1, #860]! @ 0x35c │ │ orreq r4, r2, r4, lsr fp │ │ - stc2l 1, cr1, [r3, #396]! @ 0x18c │ │ - stc2l 7, cr7, [r1, #456]! @ 0x1c8 │ │ + stc2l 1, cr1, [r3, #576]! @ 0x240 │ │ + stc2l 7, cr7, [r1, #636]! @ 0x27c │ │ strdeq r4, [r2, ip] │ │ ldrdeq r5, [r2, ip] │ │ - stc2l 12, cr10, [r3, #516]! @ 0x204 │ │ - stc2l 7, cr7, [r1, #8]! │ │ + stc2l 12, cr10, [r3, #696]! @ 0x2b8 │ │ + stc2l 7, cr7, [r1, #188]! @ 0xbc │ │ @ instruction: 0x01825798 │ │ orreq r4, r2, r4, lsl #21 │ │ orreq r9, r3, ip │ │ orreq r5, r2, r0, ror r7 │ │ - stc2l 11, cr10, [r3, #948]! @ 0x3b4 @ │ │ - stc2l 6, cr7, [r1, #440]! @ 0x1b8 │ │ + stc2l 12, cr10, [r3, #104]! @ 0x68 │ │ + stc2l 6, cr7, [r1, #620]! @ 0x26c │ │ strdeq r4, [r2, ip] │ │ orreq r8, r3, r8, lsl #31 │ │ - stc2l 12, cr0, [r4, #196]! @ 0xc4 │ │ - stc2l 6, cr7, [r1, #200]! @ 0xc8 │ │ + stc2l 12, cr0, [r4, #376]! @ 0x178 │ │ + stc2l 6, cr7, [r1, #380]! @ 0x17c │ │ @ instruction: 0x018249bc │ │ - stc2l 11, cr10, [r3, #500]! @ 0x1f4 @ │ │ - stc2l 5, cr7, [r1, #1016]! @ 0x3f8 │ │ + stc2l 11, cr10, [r3, #680]! @ 0x2a8 @ │ │ + stc2l 6, cr7, [r1, #172]! @ 0xac │ │ orreq r5, r2, r0, ror #14 │ │ - stc2l 13, cr7, [r1, #148]! @ 0x94 │ │ - stc2l 13, cr7, [r1, #104]! @ 0x68 │ │ + stc2l 13, cr7, [r1, #328]! @ 0x148 │ │ + stc2l 13, cr7, [r1, #284]! @ 0x11c │ │ orreq pc, r2, r4, lsl #20 │ │ @ instruction: 0x01825090 │ │ - stc2l 6, cr2, [r4, #196]! @ 0xc4 │ │ - stc2l 5, cr7, [r1, #584]! @ 0x248 │ │ + stc2l 6, cr2, [r4, #376]! @ 0x178 │ │ + stc2l 5, cr7, [r1, #764]! @ 0x2fc │ │ orreq r4, r2, ip, lsl r9 │ │ - stc2l 11, cr0, [r4, #400]! @ 0x190 @ │ │ - stc2l 5, cr7, [r1, #360]! @ 0x168 │ │ + stc2l 11, cr0, [r4, #580]! @ 0x244 @ │ │ + stc2l 5, cr7, [r1, #540]! @ 0x21c │ │ smlaleq sp, r7, r4, sp │ │ @ instruction: 0x018248bc │ │ - stc2l 12, cr12, [r2, #984]! @ 0x3d8 │ │ - stc2l 5, cr7, [r1, #8]! │ │ + stc2l 13, cr12, [r2, #140]! @ 0x8c │ │ + stc2l 5, cr7, [r1, #188]! @ 0xbc │ │ orreq r4, r2, ip, lsl #17 │ │ - stc2l 5, cr2, [r4, #388]! @ 0x184 │ │ - stc2l 4, cr7, [r1, #776]! @ 0x308 │ │ + stc2l 5, cr2, [r4, #568]! @ 0x238 │ │ + stc2l 4, cr7, [r1, #956]! @ 0x3bc │ │ orreq r5, r2, r0, lsl #8 │ │ orreq r5, r2, r0, lsl #10 │ │ orreq r5, r2, r0, lsr r5 │ │ orreq r7, r4, r8, lsr #16 │ │ orreq r5, r2, r4, ror #9 │ │ ldrdeq r5, [r2, r0] │ │ strdeq r4, [r2, ip] │ │ - stc2l 10, cr0, [r4, #164]! @ 0xa4 @ │ │ - stc2l 4, cr7, [r1, #168]! @ 0xa8 │ │ + stc2l 10, cr0, [r4, #344]! @ 0x158 @ │ │ + stc2l 4, cr7, [r1, #348]! @ 0x15c │ │ @ instruction: 0x018247b8 │ │ @ instruction: 0x018254b0 │ │ @ instruction: 0x0182549c │ │ - stc2l 9, cr0, [r4, #384]! @ 0x180 @ │ │ - stc2l 3, cr7, [r1, #744]! @ 0x2e8 │ │ + stc2l 9, cr0, [r4, #474]! @ 0x1da @ │ │ + stc2l 3, cr7, [r1, #924]! @ 0x39c │ │ orreq r5, r2, r8, asr #8 │ │ orreq r5, r2, ip, lsr r4 │ │ rsceq sp, r7, r4, ror #23 │ │ - stc2l 7, cr1, [r1, #148]! @ 0x94 │ │ - stc2l 12, cr7, [r1, #788]! @ 0x314 │ │ - stc2l 12, cr7, [r1, #744]! @ 0x2e8 │ │ + stc2l 7, cr1, [r1, #328]! @ 0x148 │ │ + stc2l 12, cr7, [r1, #968]! @ 0x3c8 │ │ + stc2l 12, cr7, [r1, #924]! @ 0x39c │ │ orreq pc, r2, r4, lsr #19 │ │ orreq r5, r2, r0, lsr r0 │ │ - stc2l 3, cr2, [r4, #676]! @ 0x2a4 │ │ - stc2l 3, cr7, [r1, #40]! @ 0x28 │ │ + stc2l 3, cr2, [r4, #856]! @ 0x358 │ │ + stc2l 3, cr7, [r1, #220]! @ 0xdc │ │ @ instruction: 0x01824694 │ │ - stc2l 8, cr0, [r4, #880]! @ 0x370 │ │ - stc2l 2, cr7, [r1, #840]! @ 0x348 │ │ + stc2l 9, cr0, [r4, #18]! @ │ │ + stc2l 2, cr7, [r1, #1020]! @ 0x3fc │ │ orreq r4, r2, ip, lsr r6 │ │ - stc2l 10, cr12, [r2, #472]! @ 0x1d8 @ │ │ - stc2l 2, cr7, [r1, #520]! @ 0x208 │ │ + stc2l 10, cr12, [r2, #652]! @ 0x28c @ │ │ + stc2l 2, cr7, [r1, #700]! @ 0x2bc │ │ orreq r4, r2, ip, lsl #12 │ │ - stc2l 2, cr2, [r4, #900]! @ 0x384 │ │ - stc2l 2, cr7, [r1, #264]! @ 0x108 │ │ + stc2l 3, cr2, [r4, #56]! @ 0x38 │ │ + stc2l 2, cr7, [r1, #444]! @ 0x1bc │ │ orreq r5, r2, r0, lsl #3 │ │ orreq r5, r2, r0, lsl #5 │ │ @ instruction: 0x018252b0 │ │ orreq r7, r4, r8, lsr #11 │ │ orreq r5, r2, r4, ror #4 │ │ orreq r5, r2, r0, asr r1 │ │ orreq r4, r2, ip, ror r5 │ │ - stc2l 7, cr0, [r4, #740]! @ 0x2e4 │ │ - stc2l 1, cr7, [r1, #744]! @ 0x2e8 │ │ + stc2l 7, cr0, [r4, #920]! @ 0x398 │ │ + stc2l 1, cr7, [r1, #924]! @ 0x39c │ │ orreq r4, r2, r8, asr #10 │ │ orreq r5, r2, r0, asr #4 │ │ orreq r5, r2, ip, lsr #4 │ │ - stc2l 7, cr0, [r4, #288]! @ 0x120 │ │ - stc2l 1, cr7, [r1, #264]! @ 0x108 │ │ + stc2l 7, cr0, [r4, #468]! @ 0x1d4 │ │ + stc2l 1, cr7, [r1, #444]! @ 0x1bc │ │ ldrdeq r5, [r2, r0] │ │ orreq r5, r2, r4, asr #3 │ │ @ instruction: 0x0182449c │ │ orreq lr, r2, r0, ror #27 │ │ - stc2l 0, cr7, [r1, #724]! @ 0x2d4 │ │ - stc2l 0, cr7, [r1, #680]! @ 0x2a8 │ │ + stc2l 0, cr7, [r1, #904]! @ 0x388 │ │ + stc2l 0, cr7, [r1, #860]! @ 0x35c │ │ @ instruction: 0x0182ed94 │ │ orreq r4, r2, r0, lsr #8 │ │ - stc2l 0, cr2, [r4, #948]! @ 0x3b4 │ │ - stc2l 0, cr7, [r1, #312]! @ 0x138 │ │ + stc2l 1, cr2, [r4, #104]! @ 0x68 │ │ + stc2l 0, cr7, [r1, #492]! @ 0x1ec │ │ ldrdeq r4, [r2, r8] │ │ - stc2l 6, cr0, [r4, #128]! @ 0x80 │ │ - stc2l 0, cr7, [r1, #88]! @ 0x58 │ │ - stc2l 15, cr4, [r2, #148]! @ 0x94 │ │ + stc2l 6, cr0, [r4, #308]! @ 0x134 │ │ + stc2l 0, cr7, [r1, #268]! @ 0x10c │ │ + stc2l 15, cr4, [r2, #328]! @ 0x148 │ │ │ │ 02408780 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 240879c │ │ @@ -1245261,16 +1245260,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - stc2l 11, cr2, [r2, #392]! @ 0x188 @ │ │ - stc2l 12, cr1, [r4, #660]! @ 0x294 │ │ + stc2l 11, cr2, [r2, #572]! @ 0x23c @ │ │ + stc2l 12, cr1, [r4, #840]! @ 0x348 │ │ │ │ 024087dc : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #8 │ │ mov r1, r0 │ │ mov r0, #0 │ │ @@ -1245508,22 +1245507,22 @@ │ │ ldr r0, [pc, #48] @ 2408b6c │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - stc2l 10, cr1, [r4, #792]! @ 0x318 @ │ │ - stc2l 3, cr14, [r0, #604]! @ 0x25c │ │ - stc2l 6, cr4, [r1, #472]! @ 0x1d8 │ │ - stc2l 3, cr0, [r3, #628]! @ 0x274 │ │ - stc2l 9, cr8, [r1, #82]! @ 0x52 @ │ │ - stc2l 7, cr2, [r2, #960]! @ 0x3c0 │ │ - stc2l 3, cr10, [r0, #160]! @ 0xa0 │ │ - stc2l 9, cr1, [r4, #460]! @ 0x1cc @ │ │ + stc2l 10, cr1, [r4, #972]! @ 0x3cc @ │ │ + stc2l 3, cr14, [r0, #784]! @ 0x310 │ │ + stc2l 6, cr4, [r1, #652]! @ 0x28c │ │ + stc2l 3, cr0, [r3, #808]! @ 0x328 │ │ + stc2l 9, cr8, [r1, #172]! @ 0xac @ │ │ + stc2l 8, cr2, [r2, #116]! @ 0x74 │ │ + stc2l 3, cr10, [r0, #340]! @ 0x154 │ │ + stc2l 10, cr1, [r4, #76]! @ 0x4c @ │ │ │ │ 02408b70 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #36 @ 0x24 │ │ sub r0, r0, #1 │ │ cmp r0, #4 │ │ @@ -1246477,160 +1246476,160 @@ │ │ movw r3, #1659 @ 0x67b │ │ ldr r2, [pc, #540] @ 2409c78 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24099c0 │ │ - stc2l 5, cr13, [r3, #828]! @ 0x33c │ │ - stc2l 3, cr1, [r4, #996]! @ 0x3e4 │ │ + stc2l 5, cr13, [r3, #1008]! @ 0x3f0 │ │ + stc2l 4, cr1, [r4, #152]! @ 0x98 │ │ orreq r6, r4, r0, asr ip │ │ vcmla.f16 , q2, q0, #270 │ │ - stc2l 2, cr10, [r0, #324]! @ 0x144 │ │ - stc2l 3, cr12, [r0, #500]! @ 0x1f4 │ │ + stc2l 2, cr10, [r0, #504]! @ 0x1f8 │ │ + stc2l 3, cr12, [r0, #680]! @ 0x2a8 │ │ orreq r6, r4, r8, ror #26 │ │ orreq r6, r4, r8, asr #23 │ │ eorseq pc, r3, r0, lsr r9 @ │ │ orreq r6, r4, r0, lsr #29 │ │ eorseq pc, r3, r0, lsl #18 │ │ - stc2l 6, cr4, [r2, #924]! @ 0x39c │ │ + stc2l 7, cr4, [r2, #80]! @ 0x50 │ │ stc2l 7, cr5, [r4, #240]! @ 0xf0 │ │ orreq r6, r4, r4, ror #31 │ │ - stc2l 10, cr9, [r0, #628]! @ 0x274 @ │ │ + stc2l 10, cr9, [r0, #808]! @ 0x328 @ │ │ stc2l 0, cr5, [r4, #304]! @ 0x130 │ │ orreq r6, r4, r4, asr #11 │ │ - stc2l 7, cr11, [r0, #212]! @ 0xd4 │ │ + stc2l 7, cr11, [r0, #392]! @ 0x188 │ │ stc2l 11, cr4, [r4, #560]! @ 0x230 @ │ │ orreq r6, r4, r0, lsl r1 │ │ - stc2l 3, cr11, [r2, #724]! @ 0x2d4 │ │ + stc2l 3, cr11, [r2, #904]! @ 0x388 │ │ stc2l 11, cr4, [r4, #336]! @ 0x150 @ │ │ @ instruction: 0x0185ffb4 │ │ strexeq pc, ip, [r5] @ │ │ strexeq pc, r8, [r5] @ │ │ - stc2l 10, cr9, [r0, #52]! @ 0x34 @ │ │ + stc2l 10, cr9, [r0, #232]! @ 0xe8 @ │ │ stc2l 15, cr4, [r4, #752]! @ 0x2f0 │ │ - stc2l 11, cr11, [r0, #212]! @ 0xd4 @ │ │ + stc2l 11, cr11, [r0, #392]! @ 0x188 @ │ │ stc2l 15, cr4, [r4, #560]! @ 0x230 │ │ orreq r6, r4, r8, lsl r5 │ │ eorseq pc, r3, r0, lsl #2 │ │ - stc2l 14, cr3, [r2, #684]! @ 0x2ac │ │ + stc2l 14, cr3, [r2, #864]! @ 0x360 │ │ stc2l 15, cr4, [r4] │ │ orreq r6, r4, r8, lsr #15 │ │ eorseq pc, r3, r0, rrx │ │ strdeq r6, [r4, r8] │ │ orreq pc, r5, r8, lsl #15 │ │ orreq pc, r5, ip, ror #14 │ │ - stc2l 6, cr11, [r2, #980]! @ 0x3d4 │ │ + stc2l 7, cr11, [r2, #136]! @ 0x88 │ │ stc2l 14, cr4, [r4, #592]! @ 0x250 │ │ @ instruction: 0x0184699c │ │ stc2l 5, cr5, [r4, #560]! @ 0x230 │ │ - stc2l 15, cr9, [r0, #628]! @ 0x274 │ │ - stc2l 0, cr12, [r0, #804]! @ 0x324 │ │ + stc2l 15, cr9, [r0, #808]! @ 0x328 │ │ + stc2l 0, cr12, [r0, #984]! @ 0x3d8 │ │ @ instruction: 0x01846ab4 │ │ orreq r6, r4, r4, lsl r9 │ │ eorseq pc, r3, ip, ror r6 @ │ │ orreq r6, r4, ip, ror #23 │ │ eorseq pc, r3, ip, asr #12 │ │ - stc2l 4, cr4, [r2, #140]! @ 0x8c │ │ + stc2l 4, cr4, [r2, #320]! @ 0x140 │ │ stc2l 4, cr5, [r4, #480]! @ 0x1e0 │ │ orreq r6, r4, r0, lsr #26 │ │ - stc2l 10, cr9, [r0, #340]! @ 0x154 @ │ │ + stc2l 10, cr9, [r0, #520]! @ 0x208 @ │ │ stc2l 0, cr5, [r4, #16]! │ │ orreq r6, r4, ip, ror r5 │ │ - stc2l 6, cr11, [r0, #884]! @ 0x374 │ │ + stc2l 7, cr11, [r0, #40]! @ 0x28 │ │ stc2l 11, cr4, [r4, #208]! @ 0xd0 @ │ │ strheq r6, [r4, r8] │ │ - stc2l 3, cr11, [r2, #372]! @ 0x174 │ │ + stc2l 3, cr11, [r2, #552]! @ 0x228 │ │ stc2l 10, cr4, [r4, #1008]! @ 0x3f0 @ │ │ orreq pc, r5, r4, ror #25 │ │ orreq pc, r5, ip, asr #25 │ │ orreq pc, r5, r8, asr #25 │ │ - vcmla.f16 , q8, , #270 │ │ + stc2l 8, cr9, [r0, #1000]! @ 0x3e8 │ │ stc2l 14, cr4, [r4, #496]! @ 0x1f0 │ │ - stc2l 9, cr11, [r0, #490]! @ 0x1ea @ │ │ + stc2l 10, cr11, [r0, #136]! @ 0x88 @ │ │ stc2l 14, cr4, [r4, #304]! @ 0x130 │ │ ldrdeq r6, [r4, r8] │ │ eorseq lr, r3, r0, asr #31 │ │ - stc2l 13, cr3, [r2, #428]! @ 0x1ac │ │ + stc2l 13, cr3, [r2, #608]! @ 0x260 │ │ stc2l 13, cr4, [r4, #768]! @ 0x300 │ │ orreq r6, r4, r8, ror #12 │ │ eorseq lr, r3, r0, lsr #30 │ │ @ instruction: 0x018464b8 │ │ orreq pc, r5, r8, asr #12 │ │ orreq pc, r5, ip, lsr #12 │ │ - stc2l 5, cr11, [r2, #724]! @ 0x2d4 │ │ + stc2l 5, cr11, [r2, #904]! @ 0x388 │ │ stc2l 13, cr4, [r4, #336]! @ 0x150 │ │ orreq r6, r4, r4, lsr #15 │ │ stc2l 3, cr5, [r4, #592]! @ 0x250 │ │ - stc2l 13, cr9, [r0, #884]! @ 0x374 │ │ - stc2l 14, cr11, [r0, #740]! @ 0x2e4 │ │ + stc2l 14, cr9, [r0, #40]! @ 0x28 │ │ + stc2l 14, cr11, [r0, #920]! @ 0x398 │ │ @ instruction: 0x0184689c │ │ eorseq pc, r3, r0, lsl #9 │ │ strdeq r6, [r4, r8] │ │ eorseq pc, r3, r8, asr r4 @ │ │ - stc2l 2, cr4, [r2, #252]! @ 0xfc │ │ + stc2l 2, cr4, [r2, #432]! @ 0x1b0 │ │ stc2l 2, cr5, [r4, #592]! @ 0x250 │ │ orreq r6, r4, ip, lsr fp │ │ - stc2l 7, cr9, [r0, #564]! @ 0x234 │ │ + stc2l 7, cr9, [r0, #744]! @ 0x2e8 │ │ stc2l 13, cr4, [r4, #240]! @ 0xf0 │ │ @ instruction: 0x018462b4 │ │ - stc2l 6, cr11, [r0, #532]! @ 0x214 │ │ + stc2l 6, cr11, [r0, #712]! @ 0x2c8 │ │ stc2l 10, cr4, [r4, #880]! @ 0x370 @ │ │ orreq r6, r4, r0, rrx │ │ - stc2l 3, cr11, [r2, #20]! │ │ + stc2l 3, cr11, [r2, #200]! @ 0xc8 │ │ stc2l 10, cr4, [r4, #656]! @ 0x290 @ │ │ orreq pc, r5, r8, lsl #22 │ │ strdeq pc, [r5, r0] │ │ orreq pc, r5, ip, ror #21 │ │ - stc2l 7, cr9, [r0, #276]! @ 0x114 │ │ + stc2l 7, cr9, [r0, #456]! @ 0x1c8 │ │ stc2l 12, cr4, [r4, #976]! @ 0x3d0 │ │ - vcmla.f16 , q0, , #270 │ │ + stc2l 8, cr11, [r0, #616]! @ 0x268 │ │ stc2l 12, cr4, [r4, #784]! @ 0x310 │ │ orreq r6, r4, r0, asr r2 │ │ eorseq lr, r3, r8, lsr lr │ │ - stc2l 11, cr3, [r2, #892]! @ 0x37c @ │ │ + stc2l 12, cr3, [r2, #48]! @ 0x30 │ │ stc2l 12, cr4, [r4, #208]! @ 0xd0 │ │ ldrdeq r6, [r4, ip] │ │ mlaseq r3, r4, sp, lr │ │ orreq r6, r4, ip, lsr #6 │ │ @ instruction: 0x0185f4bc │ │ orreq pc, r5, r0, lsr #9 │ │ - stc2l 4, cr11, [r2, #164]! @ 0xa4 │ │ + stc2l 4, cr11, [r2, #344]! @ 0x158 │ │ stc2l 11, cr4, [r4, #800]! @ 0x320 @ │ │ - stc2l 6, cr1, [r4, #980]! @ 0x3d4 │ │ + stc2l 7, cr1, [r4, #136]! @ 0x88 │ │ orreq r6, r4, r0, lsl #12 │ │ orreq r6, r4, ip, lsl #15 │ │ - stc2l 0, cr2, [r2, #160]! @ 0xa0 │ │ + stc2l 0, cr2, [r2, #340]! @ 0x154 │ │ orreq pc, r5, r0, ror #20 │ │ eorseq pc, r3, r4, lsl r3 @ │ │ ldrshteq pc, [r3], -r8 @ │ │ - stc2l 0, cr4, [r2, #636]! @ 0x27c │ │ + stc2l 0, cr4, [r2, #816]! @ 0x330 │ │ stc2l 0, cr5, [r4, #976]! @ 0x3d0 │ │ @ instruction: 0x0184699c │ │ eorseq pc, r3, r0, lsl #5 │ │ - stc2l 4, cr9, [r0, #852]! @ 0x354 │ │ + stc2l 5, cr9, [r0, #8]! │ │ stc2l 10, cr4, [r4, #528]! @ 0x210 @ │ │ - stc2l 5, cr11, [r0, #596]! @ 0x254 │ │ + stc2l 5, cr11, [r0, #776]! @ 0x308 │ │ stc2l 9, cr4, [r4, #472]! @ 0x1d8 @ │ │ - stc2l 2, cr11, [r2, #132]! @ 0x84 │ │ + stc2l 2, cr11, [r2, #312]! @ 0x138 │ │ stc2l 9, cr4, [r4, #384]! @ 0x180 @ │ │ orreq r6, r4, r0, lsl #3 │ │ - stc2l 11, cr0, [r4, #352]! @ 0x160 @ │ │ - stc2l 4, cr9, [r1, #852]! @ 0x354 │ │ - stc2l 9, cr5, [r2, #264]! @ 0x108 @ │ │ - stc2l 11, cr0, [r4, #132]! @ 0x84 @ │ │ + stc2l 11, cr0, [r4, #532]! @ 0x214 @ │ │ + stc2l 5, cr9, [r1, #8]! │ │ + stc2l 9, cr5, [r2, #354]! @ 0x162 @ │ │ + stc2l 11, cr0, [r4, #312]! @ 0x138 @ │ │ orreq pc, r5, r0, ror #30 │ │ orreq pc, r5, r8, asr pc @ │ │ - stc2l 5, cr6, [r2, #612]! @ 0x264 │ │ - stc2l 9, cr14, [r0, #44]! @ 0x2c @ │ │ - stc2l 0, cr10, [r1, #740]! @ 0x2e4 │ │ - vcmla.f16 d29, d3, d14, #270 │ │ + stc2l 5, cr6, [r2, #792]! @ 0x318 │ │ + stc2l 9, cr14, [r0, #134]! @ 0x86 @ │ │ + stc2l 0, cr10, [r1, #920]! @ 0x398 │ │ + stc2l 8, cr13, [r3, #236]! @ 0xec │ │ eorseq pc, r3, r4, lsl r5 @ │ │ - stc2l 3, cr4, [r1, #88]! @ 0x58 │ │ - stc2l 15, cr7, [r3, #604]! @ 0x25c │ │ + stc2l 3, cr4, [r1, #268]! @ 0x10c │ │ + stc2l 15, cr7, [r3, #784]! @ 0x310 │ │ │ │ 02409cb4 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 2409cd0 │ │ @@ -1246646,16 +1246645,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - stc2l 9, cr12, [r3, #142]! @ 0x8e @ │ │ - stc2l 7, cr0, [r4, #452]! @ 0x1c4 │ │ + stc2l 9, cr12, [r3, #232]! @ 0xe8 @ │ │ + stc2l 7, cr0, [r4, #632]! @ 0x278 │ │ │ │ 02409d10 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #24 │ │ mov ip, r2 │ │ mov r2, r1 │ │ @@ -1246806,17 +1246805,17 @@ │ │ mov r0, r5 │ │ mov r2, r4 │ │ mov r3, #255 @ 0xff │ │ bl 270d9f0 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - stc2l 4, cr1, [r2, #156]! @ 0x9c │ │ + stc2l 4, cr1, [r2, #336]! @ 0x150 │ │ eorseq lr, r3, r4, asr #13 │ │ - stc2l 5, cr7, [r1, #80]! @ 0x50 │ │ + stc2l 5, cr7, [r1, #260]! @ 0x104 │ │ @ instruction: 0x0185edbc │ │ │ │ 02409f60 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ ldr r1, [r1] │ │ @@ -1247079,27 +1247078,27 @@ │ │ ldr r0, [pc, #68] @ 240a3a4 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 1, cr15, [r1, #36]! @ 0x24 │ │ - stc2l 14, cr2, [r1, #856]! @ 0x358 │ │ - stc2l 2, cr0, [r4, #308]! @ 0x134 │ │ - stc2l 12, cr0, [r3, #636]! @ 0x27c │ │ - stc2l 0, cr1, [r2, #256]! @ 0x100 │ │ + stc2l 1, cr15, [r1, #216]! @ 0xd8 │ │ + stc2l 15, cr2, [r1, #12]! │ │ + stc2l 2, cr0, [r4, #488]! @ 0x1e8 │ │ + stc2l 12, cr0, [r3, #816]! @ 0x330 │ │ + stc2l 0, cr1, [r2, #436]! @ 0x1b4 │ │ orreq lr, r5, r4, ror #28 │ │ eorseq lr, r3, r0, asr #6 │ │ eorseq lr, r3, r8, lsr #6 │ │ - stc2l 12, cr10, [r0, #908]! @ 0x38c │ │ - stc2l 11, cr8, [r1, #804]! @ 0x324 @ │ │ - stc2l 12, cr0, [r3, #912]! @ 0x390 │ │ - stc2l 11, cr8, [r1, #500]! @ 0x1f4 @ │ │ - stc2l 15, cr14, [r1, #772]! @ 0x304 │ │ + stc2l 13, cr10, [r0, #64]! @ 0x40 │ │ + stc2l 11, cr8, [r1, #984]! @ 0x3d8 @ │ │ + stc2l 13, cr0, [r3, #68]! @ 0x44 │ │ + stc2l 11, cr8, [r1, #680]! @ 0x2a8 @ │ │ + stc2l 15, cr14, [r1, #952]! @ 0x3b8 │ │ │ │ 0240a3a8 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ mov r4, r3 │ │ mov r5, r2 │ │ @@ -1247187,27 +1247186,27 @@ │ │ ldr r0, [pc, #68] @ 240a54c │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 15, cr2, [r2, #964]! @ 0x3c4 │ │ - stc2l 14, cr0, [r2, #720]! @ 0x2d0 │ │ + stc2l 0, cr3, [r2, #120]! @ 0x78 │ │ + stc2l 14, cr0, [r2, #900]! @ 0x384 │ │ ldrdeq lr, [r5, ip] │ │ - stc2l 11, cr0, [r3, #96]! @ 0x60 @ │ │ - stc2l 14, cr0, [r2, #424]! @ 0x1a8 │ │ - stc2l 9, cr8, [r1, #450]! @ 0x1c2 @ │ │ - stc2l 10, cr0, [r3, #892]! @ 0x37c @ │ │ + stc2l 11, cr0, [r3, #276]! @ 0x114 @ │ │ + stc2l 14, cr0, [r2, #604]! @ 0x25c │ │ + stc2l 10, cr8, [r1, #56]! @ 0x38 @ │ │ + stc2l 11, cr0, [r3, #48]! @ 0x30 @ │ │ ldrhteq lr, [r3], -r0 │ │ mlaseq r3, r8, r1, lr │ │ - stc2l 1, cr11, [r1, #28]! │ │ - stc2l 10, cr8, [r1, #132]! @ 0x84 @ │ │ - stc2l 5, cr8, [r3, #200]! @ 0xc8 │ │ - stc2l 14, cr2, [r2, #772]! @ 0x304 │ │ + stc2l 1, cr11, [r1, #208]! @ 0xd0 │ │ + stc2l 10, cr8, [r1, #312]! @ 0x138 @ │ │ + stc2l 5, cr8, [r3, #380]! @ 0x17c │ │ + stc2l 14, cr2, [r2, #952]! @ 0x3b8 │ │ │ │ 0240a550 : │ │ vldr d16, [pc, #8] @ 240a560 │ │ vmov r0, r1, d16 │ │ bx lr │ │ nop {0} │ │ @ instruction: 0xffffffff │ │ @@ -1248169,30 +1248168,30 @@ │ │ ldr r1, [pc, #3944] @ 240c3b0 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ str r2, [r0] │ │ mov r0, #1 │ │ strb r0, [r1] │ │ b 2413888 │ │ - stc2l 4, cr14, [r3, #516]! @ 0x204 │ │ + stc2l 4, cr14, [r3, #696]! @ 0x2b8 │ │ orreq lr, r5, r8, asr #21 │ │ eorseq pc, r3, r4, asr #30 │ │ orreq sp, r8, r4, lsl r8 │ │ eorseq pc, r3, r4, lsr pc @ │ │ orreq r1, r9, r0, lsr #21 │ │ eorseq pc, r3, r4, lsr #30 │ │ orreq r7, r9, ip, lsr r2 │ │ eorseq pc, r3, r4, lsl pc @ │ │ @ instruction: 0x01916198 │ │ eorseq pc, r3, r4, lsl #30 │ │ @ instruction: 0x0188d894 │ │ orreq lr, r5, r0, asr #20 │ │ orreq lr, r5, r0, asr #20 │ │ - stc2l 3, cr14, [r3, #708]! @ 0x2c4 │ │ - stc2l 14, cr10, [r1, #860]! @ 0x35c │ │ + stc2l 3, cr14, [r3, #888]! @ 0x378 │ │ + stc2l 15, cr10, [r1, #16]! │ │ ldrdeq lr, [r5, ip] │ │ @ instruction: 0x0187d9bc │ │ orreq pc, r7, r8, asr #18 │ │ @ instruction: 0x0185e9b0 │ │ mov r7, r2 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ @@ -1248356,34 +1248355,34 @@ │ │ add r1, pc, r1 │ │ str r2, [r0] │ │ mov r0, #1 │ │ strb r0, [r1] │ │ b 2413c58 │ │ orreq sp, r8, r0, asr #28 │ │ orreq sp, r8, ip, asr #15 │ │ - stc2l 14, cr15, [r3, #276]! @ 0x114 │ │ - stc2l 13, cr4, [r1, #408]! @ 0x198 │ │ + stc2l 14, cr15, [r3, #456]! @ 0x1c8 │ │ + stc2l 13, cr4, [r1, #588]! @ 0x24c │ │ bl 270ce10 │ │ cmp r0, #0 │ │ bne 24131e8 │ │ ldr r4, [pc, #4056] @ 240c73c │ │ mov r1, #6 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270ce20 │ │ ldr r0, [pc, #4040] @ 240c740 │ │ mov r1, #17 │ │ add r0, pc, r0 │ │ b 24103e8 │ │ - stc2l 0, cr10, [r3, #720]! @ 0x2d0 │ │ + stc2l 0, cr10, [r3, #900]! @ 0x384 │ │ orreq lr, r5, r8, ror #17 │ │ orreq sp, r7, ip, lsl r9 │ │ @ instruction: 0x0187d5b0 │ │ - stc2l 3, cr12, [r2, #392]! @ 0x188 │ │ - stc2l 12, cr4, [r1, #472]! @ 0x1d8 │ │ + stc2l 3, cr12, [r2, #572]! @ 0x23c │ │ + stc2l 12, cr4, [r1, #652]! @ 0x28c │ │ orreq sp, r7, ip, lsl #14 │ │ orreq sp, r7, r4, ror #16 │ │ ldr r0, [pc, #4068] @ 240c78c │ │ ldr r1, [pc, #4068] @ 240c790 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270e0a0 │ │ @@ -1248438,30 +1248437,30 @@ │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4088] @ 240c880 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ b 24131e4 │ │ - stc2l 14, cr12, [r0, #876]! @ 0x36c │ │ - stc2l 12, cr4, [r1, #200]! @ 0xc8 │ │ + stc2l 15, cr12, [r0, #32]! │ │ + stc2l 12, cr4, [r1, #380]! @ 0x17c │ │ orreq sp, r7, r8, lsr r5 │ │ orreq r4, r6, r8, asr #27 │ │ - stc2l 5, cr6, [r3, #236]! @ 0xec │ │ - stc2l 11, cr4, [r1, #936]! @ 0x3a8 @ │ │ + stc2l 5, cr6, [r3, #416]! @ 0x1a0 │ │ + stc2l 12, cr4, [r1, #92]! @ 0x5c │ │ @ instruction: 0x0187d5b8 │ │ orreq r4, r6, r4, lsl #27 │ │ orreq sp, r7, r8, asr #15 │ │ - stc2l 5, cr14, [r2, #928]! @ 0x3a0 │ │ - stc2l 11, cr4, [r1, #648]! @ 0x288 @ │ │ + stc2l 6, cr14, [r2, #84]! @ 0x54 │ │ + stc2l 11, cr4, [r1, #828]! @ 0x33c @ │ │ orreq r4, r6, r4, asr #26 │ │ @ instruction: 0x0187d79c │ │ orreq sp, r7, r4, lsl #15 │ │ - stc2l 5, cr2, [r3, #760]! @ 0x2f8 │ │ - stc2l 11, cr4, [r1, #360]! @ 0x168 @ │ │ + stc2l 5, cr2, [r3, #940]! @ 0x3ac │ │ + stc2l 11, cr4, [r1, #540]! @ 0x21c @ │ │ ldr r0, [pc, #4012] @ 240c884 │ │ ldr r1, [pc, #4012] @ 240c888 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270e0a0 │ │ ldr r0, [pc, #4088] @ 240c8e4 │ │ ldr r1, [pc, #4088] @ 240c8e8 │ │ @@ -1248502,16 +1248501,16 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #4072] @ 240c968 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ b 24131e4 │ │ @ instruction: 0x0191acd0 │ │ orreq r4, r6, r8, ror #25 │ │ - stc2l 5, cr2, [r3, #488]! @ 0x1e8 │ │ - stc2l 11, cr4, [r1, #88]! @ 0x58 @ │ │ + stc2l 5, cr2, [r3, #668]! @ 0x29c │ │ + stc2l 11, cr4, [r1, #268]! @ 0x10c @ │ │ @ instruction: 0x0187f694 │ │ orreq r1, r9, r8, ror #26 │ │ ldrdeq r8, [r8, r0] │ │ orreq fp, r8, r8, lsr #25 │ │ strdeq r1, [r7, r0] │ │ eorseq lr, r3, r8, lsl #23 │ │ orreq sl, r8, r4, ror r9 │ │ @@ -1248575,15 +1248574,15 @@ │ │ mlaseq r3, r4, sl, pc @ │ │ orrseq r5, r1, r8, lsl sp │ │ eorseq pc, r3, r4, lsl #21 │ │ orreq sp, r8, r4, lsl r4 │ │ orreq lr, r5, r0, asr #11 │ │ orreq lr, r5, r0, asr #11 │ │ orreq sp, r8, r4, ror #7 │ │ - stc2l 12, cr14, [r0, #920]! @ 0x398 │ │ + stc2l 13, cr14, [r0, #76]! @ 0x4c │ │ orreq lr, r5, r8, ror r5 │ │ orreq lr, r5, ip, asr r5 │ │ orreq sp, r7, r8, asr #10 │ │ ldrdeq pc, [r7, r0] │ │ orreq pc, r7, r4, ror #9 │ │ orreq lr, r5, r4, lsr r5 │ │ ldr r0, [pc, #4080] @ 240cac8 │ │ @@ -1248642,16 +1248641,16 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #3932] @ 240cb0c │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ b 24131e4 │ │ orreq sp, r8, r4, asr r3 │ │ @ instruction: 0x0187f4bc │ │ - stc2l 9, cr15, [r3, #338]! @ 0x152 @ │ │ - vcmla.f16 q10, , q5, #270 │ │ + stc2l 9, cr15, [r3, #428]! @ 0x1ac @ │ │ + stc2l 8, cr4, [r1, #988]! @ 0x3dc │ │ orreq sp, r8, r8, ror #18 │ │ orreq sp, r7, ip, lsr #9 │ │ str r4, [fp, #-40] @ 0xffffffd8 │ │ str r6, [fp, #-36] @ 0xffffffdc │ │ ldr r6, [pc, #3888] @ 240cb10 │ │ add r6, pc, r6 │ │ ldr r4, [pc, #3884] @ 240cb14 │ │ @@ -1248675,17 +1248674,17 @@ │ │ ldr r4, [pc, #4048] @ 240cc00 │ │ ldr r5, [pc, #4048] @ 240cc04 │ │ ldr sl, [pc, #4048] @ 240cc08 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ add sl, pc, sl │ │ b 240bd14 │ │ - stc2l 7, cr4, [r2, #180]! @ 0xb4 │ │ - stc2l 2, cr8, [r1, #244]! @ 0xf4 │ │ - stc2l 1, cr8, [r2, #564]! @ 0x234 │ │ + stc2l 7, cr4, [r2, #360]! @ 0x168 │ │ + stc2l 2, cr8, [r1, #424]! @ 0x1a8 │ │ + stc2l 1, cr8, [r2, #744]! @ 0x2e8 │ │ orreq lr, r5, ip, lsr #8 │ │ orreq sp, r7, r0, ror #8 │ │ orreq sp, r7, r0, lsl #2 │ │ orreq pc, r7, r8, ror r3 @ │ │ orreq r6, r9, ip, ror #16 │ │ orreq r1, r9, r4, asr #20 │ │ orreq r8, r8, ip, lsr #7 │ │ @@ -1248697,15 +1248696,15 @@ │ │ orreq ip, r8, r0, lsr #18 │ │ @ instruction: 0x01881290 │ │ orreq r0, r7, r8, ror #9 │ │ orreq sl, r8, r0, asr r6 │ │ orreq r6, r9, r8, lsr #22 │ │ orreq pc, r7, r0, ror #5 │ │ strdeq pc, [r7, r4] │ │ - stc2l 8, cr0, [r1, #68]! @ 0x44 │ │ + stc2l 8, cr0, [r1, #248]! @ 0xf8 │ │ orreq lr, r5, r8, lsl r3 │ │ orreq pc, r7, r0, lsr #5 │ │ orreq pc, r7, r0, lsl #5 │ │ orreq lr, r5, r4, ror #5 │ │ ldr r1, [pc, #3924] @ 240cc0c │ │ mov r2, #64 @ 0x40 │ │ mov r3, #64 @ 0x40 │ │ @@ -1248789,16 +1248788,16 @@ │ │ cmp r1, #0 │ │ ldr r6, [pc, #4076] @ 240cde8 │ │ add r6, pc, r6 │ │ bne 240bcf8 │ │ b 240f8f4 │ │ strdeq r1, [r8, r4] │ │ orreq sp, r8, r0, lsr r0 │ │ - stc2l 6, cr15, [r3, #704]! @ 0x2c0 │ │ - stc2l 6, cr4, [r1, #568]! @ 0x238 │ │ + stc2l 6, cr15, [r3, #884]! @ 0x374 │ │ + stc2l 6, cr4, [r1, #748]! @ 0x2ec │ │ ldr r0, [pc, #4048] @ 240cdec │ │ ldr r0, [pc, r0] │ │ sub r7, r0, #1 │ │ cmp r7, #10 │ │ mov r0, r7 │ │ bcc 240bcb0 │ │ ldr r0, [pc, #4028] @ 240cdf0 │ │ @@ -1248806,15 +1248805,15 @@ │ │ mov r2, r5 │ │ movw r3, #4977 @ 0x1371 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ b 240bcb0 │ │ orreq pc, r7, r0, lsl #4 │ │ ldrdeq pc, [r7, ip] │ │ - vcmla.f16 d27, d3, d20, #270 │ │ + stc2l 8, cr11, [r3, #324]! @ 0x144 │ │ orreq lr, r5, ip, lsl r2 │ │ strdeq sp, [r7, ip] │ │ orreq pc, r7, r8, lsl #3 │ │ strdeq lr, [r5, r0] │ │ ldr r4, [pc, #4044] @ 240ce38 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ @@ -1248849,16 +1248848,16 @@ │ │ ldr sl, [pc, #3952] @ 240ce58 │ │ ldr r8, [pc, #3952] @ 240ce5c │ │ add sl, pc, sl │ │ add r8, pc, r8 │ │ b 240bf34 │ │ orreq sp, r8, r0, lsl #13 │ │ orreq sp, r8, ip │ │ - stc2l 6, cr15, [r3, #500]! @ 0x1f4 │ │ - stc2l 5, cr4, [r1, #632]! @ 0x278 │ │ + stc2l 6, cr15, [r3, #680]! @ 0x2a8 │ │ + stc2l 5, cr4, [r1, #812]! @ 0x32c │ │ ldr r0, [pc, #3924] @ 240ce60 │ │ mov r1, r6 │ │ add r0, pc, r0 │ │ add r2, r0, r4, lsl #2 │ │ ldr r0, [fp, #12] │ │ bl 270e320 │ │ ldr r4, [pc, #3904] @ 240ce64 │ │ @@ -1248880,53 +1248879,53 @@ │ │ mov r1, #34 @ 0x22 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3836] @ 240ce6c │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ b 2410568 │ │ - stc2l 6, cr15, [r3, #188]! @ 0xbc │ │ + stc2l 6, cr15, [r3, #368]! @ 0x170 │ │ orreq lr, r5, r0, lsr r1 │ │ ldr r4, [pc, #3816] @ 240ce70 │ │ mov r1, #6 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270ce20 │ │ ldr r0, [pc, #3800] @ 240ce74 │ │ mov r1, #34 @ 0x22 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3788] @ 240ce78 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ b 24103e8 │ │ - stc2l 14, cr11, [r0, #268]! @ 0x10c │ │ + stc2l 14, cr11, [r0, #448]! @ 0x1c0 │ │ strdeq lr, [r5, r8] │ │ eorseq pc, r3, r4, ror r5 @ │ │ orreq ip, r8, r4, asr #28 │ │ eorseq pc, r3, r4, ror #10 │ │ ldrdeq r1, [r9, r0] │ │ eorseq pc, r3, r4, asr r5 @ │ │ orreq r6, r9, ip, ror #16 │ │ eorseq pc, r3, r4, asr #10 │ │ orrseq r5, r1, r8, asr #15 │ │ eorseq pc, r3, r4, lsr r5 @ │ │ orreq ip, r8, r4, asr #29 │ │ orreq lr, r5, r4, ror r0 │ │ orreq lr, r5, r0, ror r0 │ │ - stc2l 12, cr9, [r2, #168]! @ 0xa8 │ │ + stc2l 12, cr9, [r2, #348]! @ 0x15c │ │ orreq r1, r7, r0, ror r1 │ │ - stc2l 6, cr11, [r3, #232]! @ 0xe8 │ │ + stc2l 6, cr11, [r3, #412]! @ 0x19c │ │ orreq ip, r7, r8, lsr sp │ │ - stc2l 15, cr15, [r2, #360]! @ 0x168 │ │ + stc2l 15, cr15, [r2, #540]! @ 0x21c │ │ orreq r0, r7, r0, lsl #3 │ │ @ instruction: 0x0187efb4 │ │ orreq r1, r7, ip, lsl r1 │ │ orrseq r0, r2, r8, asr #23 │ │ - stc2l 3, cr4, [r1, #808]! @ 0x328 │ │ + stc2l 3, cr4, [r1, #988]! @ 0x3dc │ │ orrseq r0, r2, r8, lsr #28 │ │ orreq lr, r7, ip, asr #30 │ │ ldr r8, [pc, #3996] @ 240cfc0 │ │ ldr r0, [pc, #3996] @ 240cfc4 │ │ add r8, pc, r8 │ │ ldr r0, [pc, r0] │ │ str r0, [r8] │ │ @@ -1249005,15 +1249004,15 @@ │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #4048] @ 240d130 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 24106b0 │ │ - stc2l 12, cr5, [r3, #560]! @ 0x230 │ │ + stc2l 12, cr5, [r3, #740]! @ 0x2e4 │ │ ldr r0, [pc, #4028] @ 240d134 │ │ mov r1, #34 @ 0x22 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #4016] @ 240d138 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ @@ -1249024,15 +1249023,15 @@ │ │ mov r1, #34 @ 0x22 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3984] @ 240d140 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ b 2410624 │ │ - stc2l 2, cr6, [r1, #476]! @ 0x1dc │ │ + stc2l 2, cr6, [r1, #656]! @ 0x290 │ │ orreq sp, r5, ip, ror #29 │ │ ldr r0, [pc, #3964] @ 240d144 │ │ mov r1, #74 @ 0x4a │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #3952] @ 240d148 │ │ mov r2, #1 │ │ @@ -1249061,16 +1249060,16 @@ │ │ add r5, pc, r5 │ │ add r1, pc, r1 │ │ mov r0, r5 │ │ bl 270da90 │ │ mov r0, r5 │ │ mov r1, r8 │ │ b 24103d4 │ │ - stc2l 9, cr11, [r2, #204]! @ 0xcc @ │ │ - stc2l 2, cr4, [r1, #488]! @ 0x1e8 │ │ + stc2l 9, cr11, [r2, #294]! @ 0x126 @ │ │ + stc2l 2, cr4, [r1, #668]! @ 0x29c │ │ orreq ip, r7, r0, lsl sp │ │ orreq ip, r7, r8, ror #28 │ │ ldr r0, [pc, #4020] @ 240d218 │ │ mov r1, #74 @ 0x4a │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #4008] @ 240d21c │ │ @@ -1249079,39 +1249078,39 @@ │ │ add r4, pc, r4 │ │ add r1, pc, r1 │ │ mov r0, r4 │ │ bl 270da90 │ │ mov r0, r4 │ │ mov r1, r8 │ │ b 24105b8 │ │ - stc2l 4, cr12, [r0, #876]! @ 0x36c │ │ - stc2l 2, cr4, [r1, #200]! @ 0xc8 │ │ + stc2l 5, cr12, [r0, #32]! │ │ + stc2l 2, cr4, [r1, #380]! @ 0x17c │ │ orreq ip, r7, r8, lsr fp │ │ orreq r4, r6, r8, asr #7 │ │ - stc2l 11, cr5, [r3, #252]! @ 0xfc @ │ │ + stc2l 11, cr5, [r3, #432]! @ 0x1b0 @ │ │ ldr r0, [pc, #3956] @ 240d224 │ │ mov r1, #74 @ 0x4a │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #3944] @ 240d228 │ │ mov r2, #1 │ │ ldr r1, [pc, #3940] @ 240d22c │ │ add r4, pc, r4 │ │ add r1, pc, r1 │ │ mov r0, r4 │ │ bl 270da90 │ │ mov r0, r4 │ │ mov r1, r8 │ │ b 2410610 │ │ - stc2l 1, cr4, [r1, #952]! @ 0x3b8 │ │ + stc2l 2, cr4, [r1, #108]! @ 0x6c │ │ @ instruction: 0x0187cbbc │ │ orreq r4, r6, r8, lsl #7 │ │ orreq ip, r7, ip, asr #27 │ │ - stc2l 11, cr13, [r2, #944]! @ 0x3b0 @ │ │ - stc2l 1, cr4, [r1, #664]! @ 0x298 │ │ + stc2l 12, cr13, [r2, #100]! @ 0x64 │ │ + stc2l 1, cr4, [r1, #844]! @ 0x34c │ │ orreq r4, r6, r8, asr #6 │ │ orreq ip, r7, r0, lsr #27 │ │ orreq ip, r7, r8, lsl #27 │ │ ldr r5, [pc, #3876] @ 240d230 │ │ ldr r5, [pc, r5] │ │ ldr r0, [pc, #3872] @ 240d234 │ │ mov r2, #0 │ │ @@ -1249132,16 +1249131,16 @@ │ │ ldr r7, [pc, #4076] @ 240d340 │ │ add r8, pc, r8 │ │ ldr r5, [pc, #4072] @ 240d344 │ │ add r9, pc, r9 │ │ add r7, pc, r7 │ │ add r5, pc, r5 │ │ b 240c3e0 │ │ - stc2l 11, cr1, [r3, #776]! @ 0x308 @ │ │ - stc2l 1, cr4, [r1, #376]! @ 0x178 │ │ + stc2l 11, cr1, [r3, #956]! @ 0x3bc @ │ │ + stc2l 1, cr4, [r1, #556]! @ 0x22c │ │ @ instruction: 0x0191a2d4 │ │ ldrdeq lr, [r7, r4] │ │ orreq r6, r9, ip, asr #3 │ │ orreq r1, r9, r4, lsr #7 │ │ orreq r7, r8, r0, lsl sp │ │ orreq r9, sl, ip, lsl #27 │ │ orreq r0, r7, r8, lsr #28 │ │ @@ -1249213,38 +1249212,38 @@ │ │ cmp r0, #124 @ 0x7c │ │ bhi 240c538 │ │ str ip, [fp, #-44] @ 0xffffffd4 │ │ ldr r0, [pc, #4052] @ 240d478 │ │ add r0, pc, r0 │ │ add r3, r0, ip, lsl #2 │ │ b 240c578 │ │ - stc2l 5, cr7, [r3, #604]! @ 0x25c │ │ + stc2l 5, cr7, [r3, #784]! @ 0x310 │ │ orreq sp, r5, r0, lsl #24 │ │ orreq ip, r7, r4, lsr ip │ │ orreq ip, r7, r8, asr #17 │ │ - stc2l 6, cr11, [r2, #488]! @ 0x1e8 │ │ - stc2l 15, cr3, [r1, #568]! @ 0x238 │ │ + stc2l 6, cr11, [r2, #668]! @ 0x29c │ │ + stc2l 15, cr3, [r1, #748]! @ 0x2ec │ │ orreq ip, r7, r4, lsr #20 │ │ orreq ip, r7, ip, ror fp │ │ - stc2l 1, cr12, [r0, #956]! @ 0x3bc │ │ - stc2l 15, cr3, [r1, #280]! @ 0x118 │ │ + stc2l 2, cr12, [r0, #112]! @ 0x70 │ │ + stc2l 15, cr3, [r1, #460]! @ 0x1cc │ │ orreq ip, r7, ip, asr #16 │ │ ldrdeq r4, [r6, ip] │ │ - stc2l 8, cr5, [r3, #332]! @ 0x14c │ │ - stc2l 15, cr3, [r1, #8]! │ │ + vcmla.f16 d21, d19, d0, #270 │ │ + stc2l 15, cr3, [r1, #188]! @ 0xbc │ │ ldrdeq ip, [r7, r0] │ │ @ instruction: 0x0186409c │ │ orreq ip, r7, r0, ror #21 │ │ - stc2l 9, cr13, [r2] @ │ │ - stc2l 14, cr3, [r1, #744]! @ 0x2e8 │ │ + stc2l 9, cr13, [r2, #90]! @ 0x5a @ │ │ + stc2l 14, cr3, [r1, #924]! @ 0x39c │ │ orreq r4, r6, ip, asr r0 │ │ @ instruction: 0x0187cab4 │ │ @ instruction: 0x0187ca9c │ │ - stc2l 8, cr1, [r3, #856]! @ 0x358 │ │ - stc2l 14, cr3, [r1, #456]! @ 0x1c8 │ │ + stc2l 9, cr1, [r3, #6]! @ │ │ + stc2l 14, cr3, [r1, #636]! @ 0x27c │ │ orrseq r9, r1, r8, ror #31 │ │ orreq lr, r7, r8, ror #19 │ │ strheq r1, [r9, ip] │ │ orreq r7, r8, r4, lsr #20 │ │ strdeq sl, [r8, ip] │ │ orreq r0, r7, r4, asr #22 │ │ ldrsbteq sp, [r3], -ip │ │ @@ -1249377,16 +1249376,16 @@ │ │ add r1, pc, r1 │ │ add lr, r1, r0, lsl #2 │ │ lsr r0, ip, #3 │ │ cmp r0, #124 @ 0x7c │ │ bhi 240c744 │ │ ldr r3, [fp, #-68] @ 0xffffffbc │ │ b 240c588 │ │ - stc2l 7, cr7, [r2, #996]! @ 0x3e4 │ │ - stc2l 12, cr14, [r3, #916]! @ 0x394 │ │ + vcmla.f16 d23, d2, d22, #270 │ │ + stc2l 13, cr14, [r3, #72]! @ 0x48 │ │ str lr, [fp, #-76] @ 0xffffffb4 │ │ mov r1, ip │ │ ldr r0, [pc, #3984] @ 240d6e4 │ │ mov r2, sl │ │ movw r3, #5057 @ 0x13c1 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1249433,17 +1249432,17 @@ │ │ ldr r3, [fp, #-68] @ 0xffffffbc │ │ ldr lr, [fp, #-76] @ 0xffffffb4 │ │ ldr r6, [fp, #-80] @ 0xffffffb0 │ │ b 240c5a0 │ │ orreq sp, r5, r0, asr #17 │ │ orreq lr, r7, r0, asr r8 │ │ @ instruction: 0x0187c8b8 │ │ - stc2l 0, cr9, [r3, #108]! @ 0x6c │ │ - stc2l 6, cr7, [r1, #356]! @ 0x164 │ │ - stc2l 3, cr11, [r2, #176]! @ 0xb0 │ │ + stc2l 0, cr9, [r3, #288]! @ 0x120 │ │ + stc2l 6, cr7, [r1, #536]! @ 0x218 │ │ + stc2l 3, cr11, [r2, #356]! @ 0x164 │ │ str r7, [sp, #84] @ 0x54 │ │ mov r1, ip │ │ ldr r0, [pc, #4080] @ 240d828 │ │ mov r2, r4 │ │ movw r3, #5057 @ 0x13c1 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1249458,15 +1249457,15 @@ │ │ cmp r0, #124 @ 0x7c │ │ bhi 240c88c │ │ ldr r3, [fp, #-68] @ 0xffffffbc │ │ ldr lr, [fp, #-76] @ 0xffffffb4 │ │ ldr r6, [fp, #-80] @ 0xffffffb0 │ │ ldr r7, [sp, #84] @ 0x54 │ │ b 240c5b0 │ │ - stc2l 13, cr9, [r1, #284]! @ 0x11c │ │ + stc2l 13, cr9, [r1, #464]! @ 0x1d0 │ │ mlaseq r3, ip, ip, lr │ │ orreq ip, r8, ip, ror #10 │ │ str r5, [sp, #80] @ 0x50 │ │ mov r1, ip │ │ ldr r0, [pc, #3992] @ 240d834 │ │ mov r2, r4 │ │ movw r3, #5057 @ 0x13c1 │ │ @@ -1249515,16 +1249514,16 @@ │ │ bhi 240c96c │ │ ldr r3, [fp, #-68] @ 0xffffffbc │ │ ldr lr, [fp, #-76] @ 0xffffffb4 │ │ ldr r6, [fp, #-80] @ 0xffffffb0 │ │ ldr r7, [sp, #84] @ 0x54 │ │ ldr r5, [sp, #80] @ 0x50 │ │ b 240c5c8 │ │ - stc2l 11, cr9, [r1, #720]! @ 0x2d0 @ │ │ - stc2l 14, cr13, [r0, #776]! @ 0x308 │ │ + stc2l 11, cr9, [r1, #900]! @ 0x384 @ │ │ + stc2l 14, cr13, [r0, #956]! @ 0x3bc │ │ ldr r0, [pc, #3800] @ 240d84c │ │ mov r1, ip │ │ mov r2, r4 │ │ movw r3, #5057 @ 0x13c1 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3780] @ 240d850 │ │ @@ -1249618,18 +1249617,18 @@ │ │ @ instruction: 0x01914cf0 │ │ eorseq lr, r3, ip, asr sl │ │ orreq ip, r8, ip, ror #7 │ │ @ instruction: 0x0185d594 │ │ @ instruction: 0x0185d590 │ │ orreq lr, r7, r0, lsr #10 │ │ orreq ip, r7, r8, lsl #11 │ │ - stc2l 12, cr8, [r3, #972]! @ 0x3cc │ │ - stc2l 3, cr7, [r1, #196]! @ 0xc4 │ │ - stc2l 0, cr11, [r2, #16]! │ │ - stc2l 11, cr10, [r3, #176]! @ 0xb0 @ │ │ + stc2l 13, cr8, [r3, #128]! @ 0x80 │ │ + stc2l 3, cr7, [r1, #376]! @ 0x178 │ │ + stc2l 0, cr11, [r2, #196]! @ 0xc4 │ │ + stc2l 11, cr10, [r3, #356]! @ 0x164 @ │ │ orreq lr, r7, ip, lsr #9 │ │ eorseq lr, r3, r4, lsr #19 │ │ orrseq r0, r2, r8, lsr #14 │ │ ldr r0, [pc, #4016] @ 240dad4 │ │ add r0, pc, r0 │ │ add r0, r0, r1, lsl #2 │ │ bl 270e350 │ │ @@ -1249683,28 +1249682,28 @@ │ │ ldr r0, [r2, r1, lsl #2] │ │ add r0, r0, #3 │ │ str r0, [fp, #-48] @ 0xffffffd0 │ │ b 240cca0 │ │ orreq ip, r7, r4, ror #9 │ │ orreq r0, r7, r4, ror #11 │ │ orreq ip, r7, ip, lsr #9 │ │ - stc2l 8, cr3, [r1, #616]! @ 0x268 │ │ + vcmla.f16 , , , #270 │ │ ldrdeq ip, [r8, ip] │ │ orrseq r0, r2, ip, lsl #5 │ │ orrseq r0, r2, r0, asr r6 │ │ orreq ip, r7, r0, lsl r4 │ │ @ instruction: 0x0187e394 │ │ orreq lr, r7, ip, lsl #7 │ │ orreq sp, r5, r0, asr #7 │ │ orreq lr, r7, r4, asr #6 │ │ orreq lr, r7, r0, lsr r3 │ │ orrseq r0, r2, r4, lsl #4 │ │ - vcmla.f16 q15, , , #270 │ │ + stc2l 8, cr14, [r3, #472]! @ 0x1d8 │ │ orreq lr, r7, r4, lsl r3 │ │ - stc2l 0, cr5, [r3, #464]! @ 0x1d0 │ │ + stc2l 0, cr5, [r3, #644]! @ 0x284 │ │ orreq ip, r8, r0, ror #15 │ │ ldr r4, [pc, #4088] @ 240dc40 │ │ mov r2, sl │ │ movw r3, #5081 @ 0x13d9 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270d9c0 │ │ @@ -1249806,15 +1249805,15 @@ │ │ cmp r1, r0 │ │ add r2, r1, #1 │ │ str r2, [r6] │ │ blt 240cdbc │ │ b 240cdfc │ │ @ instruction: 0x0187e290 │ │ orreq lr, r7, r0, ror r2 │ │ - stc2l 15, cr4, [r3, #832]! @ 0x340 │ │ + stc2l 15, cr4, [r3, #1012]! @ 0x3f4 │ │ mov r0, #1 │ │ str r0, [r6] │ │ ldr r0, [pc, #4088] @ 240ddfc │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ str r1, [fp, #-40] @ 0xffffffd8 │ │ cmp r1, #9 │ │ @@ -1249827,28 +1249826,28 @@ │ │ str r0, [fp, #-48] @ 0xffffffd0 │ │ ldr r9, [pc, #4048] @ 240de04 │ │ add r9, pc, r9 │ │ b 240cee4 │ │ orreq ip, r7, ip, ror r2 │ │ orreq fp, r8, r8, ror #15 │ │ @ instruction: 0x0187c294 │ │ - stc2l 0, cr1, [r3, #628]! @ 0x274 │ │ + stc2l 0, cr1, [r3, #808]! @ 0x328 │ │ orreq r7, r8, r0, lsr #4 │ │ ldrsbteq lr, [r3], -r8 │ │ orreq sl, r8, ip, lsl #16 │ │ strdeq r7, [r8, r0] │ │ - stc2l 6, cr9, [r1, #952]! @ 0x3b8 │ │ - stc2l 5, cr3, [r1, #920]! @ 0x398 │ │ + stc2l 7, cr9, [r1, #108]! @ 0x6c │ │ + stc2l 6, cr3, [r1, #76]! @ 0x4c │ │ orreq sl, r8, r0, asr #15 │ │ orreq lr, r7, r8, ror #2 │ │ stc2l 10, cr0, [r4, #344]! @ 0x158 @ │ │ - stc2l 5, cr9, [r1, #720]! @ 0x2d0 │ │ - stc2l 12, cr10, [r2, #228]! @ 0xe4 │ │ + stc2l 5, cr9, [r1, #900]! @ 0x384 │ │ + stc2l 12, cr10, [r2, #408]! @ 0x198 │ │ stc2l 10, cr0, [r4, #104]! @ 0x68 @ │ │ - stc2l 5, cr9, [r1, #480]! @ 0x1e0 │ │ + stc2l 5, cr9, [r1, #660]! @ 0x294 │ │ ldr r4, [pc, #3972] @ 240de08 │ │ mov r2, sl │ │ movw r3, #5111 @ 0x13f7 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270d9c0 │ │ ldr r2, [pc, #3952] @ 240de0c │ │ @@ -1249926,22 +1249925,22 @@ │ │ sub r0, r4, r0 │ │ str r0, [r2, r1, lsl #2] │ │ b 240ebd4 │ │ orreq lr, r7, r4, rrx │ │ strheq sp, [r5, r0] │ │ orreq r0, r8, r4, asr #5 │ │ strdeq fp, [r8, ip] │ │ - stc2l 4, cr14, [r3, #496]! @ 0x1f0 │ │ - stc2l 4, cr3, [r1, #504]! @ 0x1f8 │ │ - stc2l 0, cr1, [r1, #280]! @ 0x118 │ │ + stc2l 4, cr14, [r3, #676]! @ 0x2a4 │ │ + stc2l 4, cr3, [r1, #684]! @ 0x2ac │ │ + stc2l 0, cr1, [r1, #460]! @ 0x1cc │ │ orreq fp, r8, r0, lsl #27 │ │ orreq sl, r7, r8, lsr #26 │ │ strdeq pc, [r8, r8] │ │ - stc2l 13, cr0, [r3, #780]! @ 0x30c │ │ - stc2l 13, cr6, [r1, #644]! @ 0x284 │ │ + stc2l 13, cr0, [r3, #960]! @ 0x3c0 │ │ + stc2l 13, cr6, [r1, #824]! @ 0x338 │ │ ldr r1, [r3, r1, lsl #2] │ │ add r0, r1, r0 │ │ sub r1, fp, #52 @ 0x34 │ │ add r0, r0, #1 │ │ str r0, [fp, #-52] @ 0xffffffcc │ │ ldr r2, [pc, #4012] @ 240dfb8 │ │ sub r0, fp, #44 @ 0x2c │ │ @@ -1250012,25 +1250011,25 @@ │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-40] @ 0xffffffd8 │ │ cmp r0, #1 │ │ blt 240d530 │ │ mov r1, #0 │ │ mov r0, #1 │ │ b 240d1a0 │ │ - stc2l 4, cr15, [r0, #136]! @ 0x88 │ │ + stc2l 4, cr15, [r0, #316]! @ 0x13c │ │ vcmla.f16 q8, q2, q11, #270 │ │ - stc2l 3, cr9, [r1, #784]! @ 0x310 │ │ + stc2l 3, cr9, [r1, #964]! @ 0x3c4 │ │ stc2l 8, cr0, [r4, #248]! @ 0xf8 │ │ - stc2l 3, cr9, [r1, #624]! @ 0x270 │ │ + stc2l 3, cr9, [r1, #804]! @ 0x324 │ │ stc2l 8, cr0, [r4, #88]! @ 0x58 │ │ - stc2l 3, cr9, [r1, #464]! @ 0x1d0 │ │ - stc2l 10, cr8, [r2, #980]! @ 0x3d4 @ │ │ - stc2l 12, cr6, [r1, #916]! @ 0x394 │ │ + stc2l 3, cr9, [r1, #644]! @ 0x284 │ │ + stc2l 11, cr8, [r2, #136]! @ 0x88 @ │ │ + stc2l 13, cr6, [r1, #72]! @ 0x48 │ │ orreq fp, r7, r8, asr #30 │ │ - stc2l 9, cr10, [r2, #370]! @ 0x172 @ │ │ + stc2l 9, cr10, [r2, #460]! @ 0x1cc @ │ │ ldr r2, [pc, #3976] @ 240e0e4 │ │ mov r0, #0 │ │ str r1, [fp, #-44] @ 0xffffffd4 │ │ add r2, pc, r2 │ │ str r0, [r2, r1, lsl #2] │ │ ldr r0, [pc, #3960] @ 240e0e8 │ │ add r0, pc, r0 │ │ @@ -1250069,22 +1250068,22 @@ │ │ cmp r0, #124 @ 0x7c │ │ bhi 240d23c │ │ ldr r0, [pc, #4076] @ 240e1ec │ │ str r1, [fp, #-48] @ 0xffffffd0 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 240d278 │ │ - stc2l 10, cr8, [r2, #644]! @ 0x284 @ │ │ - stc2l 12, cr6, [r1, #580]! @ 0x244 │ │ + stc2l 10, cr8, [r2, #824]! @ 0x338 @ │ │ + stc2l 12, cr6, [r1, #760]! @ 0x2f8 │ │ strdeq fp, [r7, r4] │ │ - stc2l 10, cr8, [r2, #356]! @ 0x164 @ │ │ - stc2l 12, cr6, [r1, #292]! @ 0x124 │ │ + stc2l 10, cr8, [r2, #536]! @ 0x218 @ │ │ + stc2l 12, cr6, [r1, #472]! @ 0x1d8 │ │ orreq fp, r7, ip, lsr #29 │ │ - stc2l 10, cr8, [r2, #52]! @ 0x34 @ │ │ - stc2l 11, cr6, [r1, #1012]! @ 0x3f4 @ │ │ + stc2l 10, cr8, [r2, #232]! @ 0xe8 @ │ │ + stc2l 12, cr6, [r1, #168]! @ 0xa8 │ │ orreq fp, r7, r0, ror #28 │ │ @ instruction: 0x01886dbc │ │ orreq lr, r7, ip, lsl sp │ │ orreq sl, r7, r8, ror #21 │ │ ldr r0, [pc, #4012] @ 240e1f0 │ │ mov r2, sl │ │ movw r3, #5143 @ 0x1417 │ │ @@ -1250143,15 +1250142,15 @@ │ │ cmp r0, #124 @ 0x7c │ │ bhi 240d47c │ │ ldr r0, [pc, #4004] @ 240e2cc │ │ str r1, [fp, #-48] @ 0xffffffd0 │ │ add r0, pc, r0 │ │ ldr r4, [r0, r1, lsl #2] │ │ b 240d4cc │ │ - stc2l 1, cr3, [r1, #552]! @ 0x228 │ │ + stc2l 1, cr3, [r1, #732]! @ 0x2dc │ │ eorseq lr, r3, r8, asr #4 │ │ orreq r3, r8, r4, lsl #29 │ │ orreq sp, r7, r4, lsr sp │ │ orreq sp, r7, r4, lsr sp │ │ lsr r0, r1, #3 │ │ cmp r0, #124 @ 0x7c │ │ bls 240d154 │ │ @@ -1250176,17 +1250175,17 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3888] @ 240e2dc │ │ add r0, pc, r0 │ │ b 240d170 │ │ orreq sl, r7, ip, asr #20 │ │ orreq sl, r7, ip, lsr sl │ │ - stc2l 0, cr3, [r1, #1000]! @ 0x3e8 │ │ + stc2l 1, cr3, [r1, #156]! @ 0x9c │ │ orreq r6, r8, r0, ror #25 │ │ - stc2l 1, cr9, [r1, #808]! @ 0x328 │ │ + stc2l 1, cr9, [r1, #988]! @ 0x3dc │ │ @ instruction: 0x0188a2b0 │ │ @ instruction: 0x018622b0 │ │ orreq lr, r7, r0, lsl #24 │ │ strdeq lr, [r7, r0] │ │ orreq sp, r7, r8, lsr ip │ │ orreq sp, r7, r0, lsr #24 │ │ ldr r0, [pc, #3836] @ 240e2e0 │ │ @@ -1250267,15 +1250266,15 @@ │ │ movw r3, #5168 @ 0x1430 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3872] @ 240e440 │ │ add r0, pc, r0 │ │ b 240d170 │ │ - stc2l 9, cr12, [r2, #394]! @ 0x18a @ │ │ + stc2l 9, cr12, [r2, #484]! @ 0x1e4 @ │ │ orreq sp, r7, r4, lsr fp │ │ orreq r2, r6, ip, ror r1 │ │ ldr r0, [pc, #3852] @ 240e444 │ │ ldr r1, [pc, #3852] @ 240e448 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270d140 │ │ @@ -1250303,15 +1250302,15 @@ │ │ orreq r4, r8, r0, asr #22 │ │ orreq lr, r7, r4, lsl #20 │ │ orrseq pc, r1, r8, lsr #24 │ │ strdeq sp, [r7, r8] │ │ orreq sp, r7, r8, ror #19 │ │ ldrdeq sp, [r7, ip] │ │ ldrdeq sp, [r7, r8] │ │ - stc2l 14, cr2, [r1, #56]! @ 0x38 │ │ + stc2l 14, cr2, [r1, #236]! @ 0xec │ │ ldrsbteq sp, [r3], -r0 │ │ orreq r3, r8, r0, lsl fp │ │ ldr r0, [pc, #4024] @ 240e580 │ │ ldr r2, [pc, #4024] @ 240e584 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ add r0, r0, r4, lsl #2 │ │ @@ -1250376,15 +1250375,15 @@ │ │ str r1, [r5] │ │ str r0, [fp, #-48] @ 0xffffffd0 │ │ cmp r0, #2 │ │ bge 240d6ec │ │ ldr r0, [pc, #4056] @ 240e6ac │ │ ldr r0, [pc, r0] │ │ b 240d718 │ │ - stc2l 14, cr13, [r3, #824]! @ 0x338 │ │ + stc2l 14, cr13, [r3, #1004]! @ 0x3ec │ │ orreq sp, r7, r8, ror r9 │ │ orreq sp, r6, r0, lsl #23 │ │ stc2l 13, cr1, [r4, #768]! @ 0x300 │ │ orreq sp, r7, r0, lsr #18 │ │ mov r0, r7 │ │ mov r1, r4 │ │ bl 270e0b0 │ │ @@ -1250423,15 +1250422,15 @@ │ │ ldr r0, [pc, #4072] @ 240e768 │ │ mov r2, sl │ │ movw r3, #5203 @ 0x1453 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 240d5c0 │ │ - stc2l 10, cr0, [r1, #356]! @ 0x164 @ │ │ + stc2l 10, cr0, [r1, #536]! @ 0x218 @ │ │ ldr r0, [pc, #4044] @ 240e76c │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ str r1, [fp, #-40] @ 0xffffffd8 │ │ cmp r1, #199 @ 0xc7 │ │ bhi 240d7dc │ │ add r0, r0, r0, lsl #1 │ │ @@ -1250460,27 +1250459,27 @@ │ │ str r4, [fp, #-48] @ 0xffffffd0 │ │ ldr r2, [pc, #4072] @ 240e800 │ │ add r2, pc, r2 │ │ add r0, r2, r0, lsl #2 │ │ bhi 240d85c │ │ str r1, [fp, #-44] @ 0xffffffd4 │ │ b 240d8b8 │ │ - stc2l 7, cr6, [r1, #420]! @ 0x1a4 │ │ + stc2l 7, cr6, [r1, #600]! @ 0x258 │ │ orreq sp, r7, r0, asr #16 │ │ orreq sl, r7, r8, ror #11 │ │ - stc2l 1, cr12, [r3, #956]! @ 0x3bc │ │ + stc2l 2, cr12, [r3, #112]! @ 0x70 │ │ orreq r8, r8, r8, lsr fp │ │ ldrdeq sp, [r7, r0] │ │ - stc2l 7, cr8, [r0, #408]! @ 0x198 │ │ + stc2l 7, cr8, [r0, #588]! @ 0x24c │ │ @ instruction: 0x01887ab8 │ │ orreq sp, r7, r0, asr r7 │ │ - stc2l 7, cr2, [r3, #4]! │ │ + stc2l 7, cr2, [r3, #184]! @ 0xb8 │ │ orreq sp, r7, r0, lsl r7 │ │ strdeq sp, [r7, r4] │ │ - stc2l 8, cr0, [r1, #372]! @ 0x174 │ │ + vcmla.f16 d16, d17, d10, #270 │ │ mov r8, r0 │ │ ldr r0, [pc, #4084] @ 240e85c │ │ mov r1, r4 │ │ mov r2, sl │ │ add r0, pc, r0 │ │ movw r3, #5210 @ 0x145a │ │ bl 270d9c0 │ │ @@ -1250568,21 +1250567,21 @@ │ │ ldr r0, [pc, r0] │ │ ldr r4, [pc, #4040] @ 240e990 │ │ ldr r9, [pc, #4040] @ 240e994 │ │ add r4, pc, r4 │ │ add r9, pc, r9 │ │ b 240da64 │ │ orreq sp, r7, r4, lsr #13 │ │ - stc2l 9, cr14, [r1, #156]! @ 0x9c @ │ │ + stc2l 9, cr14, [r1, #246]! @ 0xf6 @ │ │ orreq sp, r7, r4, asr #12 │ │ - vcmla.f16 q14, , q2, #270 │ │ + stc2l 8, cr12, [r1, #964]! @ 0x3c4 │ │ @ instruction: 0x0187e5b0 │ │ orreq pc, r6, ip, asr r7 @ │ │ orreq sl, r8, r0, asr #23 │ │ - stc2l 3, cr4, [r3, #332]! @ 0x14c │ │ + stc2l 3, cr4, [r3, #512]! @ 0x200 │ │ mov r0, #1 │ │ str r0, [r9] │ │ mov r0, #0 │ │ ldr r1, [pc, #3984] @ 240e998 │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ ldr r0, [pc, #3976] @ 240e99c │ │ @@ -1250722,23 +1250721,23 @@ │ │ str r0, [fp, #-40] @ 0xffffffd8 │ │ cmp r0, #1 │ │ blt 240e804 │ │ ldr r4, [pc, #3920] @ 240eb88 │ │ mov r1, #0 │ │ add r4, pc, r4 │ │ b 240dcd4 │ │ - stc2l 1, cr4, [r3, #796]! @ 0x31c │ │ + stc2l 1, cr4, [r3, #976]! @ 0x3d0 │ │ orreq pc, r6, r4, lsr #11 │ │ ldrdeq lr, [r7, r8] │ │ orreq pc, r6, r4, ror #10 │ │ orreq lr, r7, r4, lsl #7 │ │ - stc2l 2, cr12, [r2, #208]! @ 0xd0 │ │ + stc2l 2, cr12, [r2, #388]! @ 0x184 │ │ strdeq fp, [r7, r8] │ │ ldrdeq fp, [r7, r8] │ │ - stc2l 7, cr2, [r1, #744]! @ 0x2e8 │ │ + stc2l 7, cr2, [r1, #924]! @ 0x39c │ │ orreq lr, r6, r8, lsl r5 │ │ orreq fp, r8, r0, lsr r5 │ │ orreq sp, r7, r8, lsr r3 │ │ @ instruction: 0x0191f9bc │ │ ldrdeq lr, [r6, r8] │ │ orreq pc, r8, r0, ror #6 │ │ orreq lr, r6, r4, lsr #9 │ │ @@ -1250836,22 +1250835,22 @@ │ │ bge 240de4c │ │ ldr r0, [pc, #4072] @ 240ede0 │ │ ldr r0, [pc, r0] │ │ b 240de78 │ │ orreq lr, r7, r4, asr #4 │ │ orreq pc, r6, r4, ror #7 │ │ orreq r3, r8, ip, lsr #7 │ │ - stc2l 15, cr3, [r3, #556]! @ 0x22c │ │ + stc2l 15, cr3, [r3, #736]! @ 0x2e0 │ │ orreq pc, r6, r8, ror #6 │ │ @ instruction: 0x0187e19c │ │ orreq r3, r8, ip, lsl r3 │ │ orreq pc, r6, r0, lsr #6 │ │ orreq lr, r6, r0, asr r3 │ │ orreq fp, r7, ip, asr #3 │ │ - stc2l 5, cr2, [r1, #712]! @ 0x2c8 │ │ + stc2l 5, cr2, [r1, #892]! @ 0x37c │ │ orreq fp, r8, r0, lsr r3 │ │ orreq r9, r7, ip, asr #29 │ │ orreq sl, r7, r8, lsl #29 │ │ orreq fp, r7, r0, ror #1 │ │ orreq fp, r7, r0, ror r1 │ │ orreq lr, r7, r4, asr #1 │ │ orreq fp, r7, r0, asr r1 │ │ @@ -1250996,18 +1250995,18 @@ │ │ mov r2, sl │ │ movw r3, #5301 @ 0x14b5 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 240dc84 │ │ orreq r4, r9, r0, lsl r8 │ │ - stc2l 13, cr3, [r3, #476]! @ 0x1dc │ │ + stc2l 13, cr3, [r3, #656]! @ 0x290 │ │ orreq r9, r7, r8, ror #26 │ │ orreq pc, r6, r8, asr #2 │ │ - stc2l 0, cr4, [r2, #776]! @ 0x308 │ │ + stc2l 0, cr4, [r2, #956]! @ 0x3bc │ │ orreq fp, r7, r8 │ │ ldr r0, [pc, #4080] @ 240f094 │ │ ldr r0, [pc, r0] │ │ cmp r0, #1 │ │ blt 240e804 │ │ ldr r0, [pc, #4068] @ 240f098 │ │ ldr r0, [pc, r0] │ │ @@ -1251023,15 +1251022,15 @@ │ │ orreq sl, r7, r4, asr pc │ │ orreq ip, r7, r8, lsl #31 │ │ ldrdeq r1, [r6, r0] │ │ orreq sl, r7, ip, asr #31 │ │ orreq fp, r7, r0, ror #30 │ │ orreq ip, r7, r4, lsl #30 │ │ strdeq ip, [r7, r4] │ │ - stc2l 13, cr11, [r2, #340]! @ 0x154 │ │ + stc2l 13, cr11, [r2, #520]! @ 0x208 │ │ ldr r0, [pc, #4004] @ 240f0a4 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ mov r1, r6 │ │ sub r0, r4, r0 │ │ str r0, [fp, #-44] @ 0xffffffd4 │ │ mov r0, r8 │ │ @@ -1251086,15 +1251085,15 @@ │ │ bhi 240e210 │ │ add r0, r0, r0, lsl #1 │ │ mvn r1, #23 │ │ add r1, r1, r0, lsl #3 │ │ str r1, [fp, #-44] @ 0xffffffd4 │ │ b 240e268 │ │ orreq sl, r7, ip, lsr #30 │ │ - stc2l 11, cr3, [r3, #832]! @ 0x340 @ │ │ + stc2l 11, cr3, [r3, #1012]! @ 0x3f4 @ │ │ ldrdeq sl, [r7, r8] │ │ orreq ip, r7, r8, lsr #28 │ │ orreq r1, r6, r4, ror #8 │ │ orreq fp, r7, r8, lsr lr │ │ strdeq r4, [r9, r4] │ │ strdeq ip, [r6, r8] │ │ ldrdeq ip, [r7, r4] │ │ @@ -1251138,23 +1251137,23 @@ │ │ bhi 240e2ec │ │ add r0, r0, r0, lsl #1 │ │ mvn r1, #23 │ │ add r1, r1, r0, lsl #3 │ │ str r1, [fp, #-44] @ 0xffffffd4 │ │ b 240e344 │ │ orreq sp, r7, r0, lsl #27 │ │ - stc2l 12, cr11, [r2, #164]! @ 0xa4 │ │ + stc2l 12, cr11, [r2, #344]! @ 0x158 │ │ orreq r1, r6, ip, ror #7 │ │ orreq ip, r7, r0, lsl #27 │ │ orreq ip, r6, r8, ror pc │ │ - stc2l 10, cr3, [r3, #736]! @ 0x2e0 @ │ │ + stc2l 10, cr3, [r3, #916]! @ 0x394 @ │ │ @ instruction: 0x0187adbc │ │ orreq ip, r7, ip, lsl #26 │ │ orreq fp, r7, r4, lsr #26 │ │ - stc2l 11, cr11, [r2, #148]! @ 0x94 @ │ │ + stc2l 11, cr11, [r2, #328]! @ 0x148 @ │ │ orreq r1, r6, ip, ror #5 │ │ orreq ip, r7, r4, lsl #25 │ │ ldr r0, [pc, #4000] @ 240f294 │ │ mov r1, r4 │ │ mov r2, sl │ │ movw r3, #5339 @ 0x14db │ │ add r0, pc, r0 │ │ @@ -1251225,23 +1251224,23 @@ │ │ cmp r2, #1 │ │ blt 240e784 │ │ mov r9, #0 │ │ mov r1, #1 │ │ b 240e51c │ │ @ instruction: 0x0187bc94 │ │ orreq ip, r7, r4, asr #24 │ │ - stc2l 1, cr13, [r3, #440]! @ 0x1b8 │ │ - stc2l 1, cr13, [r3, #296]! @ 0x128 │ │ + stc2l 1, cr13, [r3, #620]! @ 0x26c │ │ + stc2l 1, cr13, [r3, #476]! @ 0x1dc │ │ strdeq ip, [r7, r4] │ │ strdeq ip, [r6, ip] │ │ - stc2l 10, cr5, [r1, #916]! @ 0x394 @ │ │ + stc2l 11, cr5, [r1, #72]! @ 0x48 @ │ │ orreq r9, r7, r0, ror r9 │ │ @ instruction: 0x018943b8 │ │ @ instruction: 0x0187cb9c │ │ - stc2l 9, cr3, [r3, #24]! @ │ │ + stc2l 9, cr3, [r3, #114]! @ 0x72 @ │ │ orreq sl, r7, r0, lsl ip │ │ eorseq sp, r3, r4, rrx │ │ orreq r2, r6, r4, lsl #3 │ │ orreq ip, r7, ip, lsr fp │ │ orreq r1, r6, r4, lsl #3 │ │ ldr r0, [pc, #3964] @ 240f3d8 │ │ ldr r7, [pc, #3964] @ 240f3dc │ │ @@ -1251391,15 +1251390,15 @@ │ │ bhi 240e6bc │ │ add r0, r0, r0, lsl #1 │ │ mvn r1, #23 │ │ add lr, r1, r0, lsl #3 │ │ b 240e71c │ │ orreq ip, r7, r0, asr #19 │ │ @ instruction: 0x0187c990 │ │ - vcmla.f16 d23, d16, d29, #270 │ │ + stc2l 8, cr7, [r0, #872]! @ 0x368 │ │ orreq ip, r7, ip, lsr #18 │ │ ldr r0, [pc, #3932] @ 240f620 │ │ mov r1, r8 │ │ ldr r6, [pc, #3928] @ 240f624 │ │ movw r3, #5358 @ 0x14ee │ │ add r0, pc, r0 │ │ add r6, pc, r6 │ │ @@ -1251439,15 +1251438,15 @@ │ │ bl 270d9c0 │ │ mov lr, r6 │ │ mov r6, r0 │ │ b 240e454 │ │ stc2l 2, cr15, [r3, #340]! @ 0x154 │ │ orreq sl, r7, r8, lsr #17 │ │ orreq r5, r8, r0, lsl #18 │ │ - stc2l 4, cr7, [r2, #124]! @ 0x7c │ │ + stc2l 4, cr7, [r2, #304]! @ 0x130 │ │ orreq sl, r7, ip, asr #16 │ │ ldr r1, [pc, #3972] @ 240f708 │ │ ldr r1, [pc, r1] │ │ ldr r9, [pc, #3968] @ 240f70c │ │ cmp r0, #0 │ │ sub r6, fp, #44 @ 0x2c │ │ cmpne r1, #0 │ │ @@ -1251497,17 +1251496,17 @@ │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ str r1, [fp, #-40] @ 0xffffffd8 │ │ cmp r1, #10 │ │ bcs 240eaa8 │ │ mov r0, r1 │ │ b 240eac4 │ │ - stc2l 11, cr13, [r1, #32]! @ │ │ + stc2l 11, cr13, [r1, #212]! @ 0xd4 @ │ │ orreq sl, r7, r4, asr #15 │ │ - stc2l 12, cr1, [r1, #260]! @ 0x104 │ │ + stc2l 12, cr1, [r1, #440]! @ 0x1b8 │ │ eorseq ip, r3, r4, ror #25 │ │ orreq fp, r5, r4, lsr #16 │ │ orreq r5, r8, r4, lsr #22 │ │ strdeq fp, [r7, ip] │ │ @ instruction: 0x01861db4 │ │ orreq r1, r6, r8, lsr #27 │ │ @ instruction: 0x01861d94 │ │ @@ -1251574,23 +1251573,23 @@ │ │ str r1, [fp, #-44] @ 0xffffffd4 │ │ b 240ea18 │ │ ldrdeq r3, [r9, r8] │ │ orreq r0, r6, ip, asr #26 │ │ ldrdeq ip, [r7, ip] │ │ orreq ip, r7, r4, asr #13 │ │ ldrdeq r1, [r6, r0] │ │ - stc2l 4, cr3, [r3, #300]! @ 0x12c │ │ + stc2l 4, cr3, [r3, #480]! @ 0x1e0 │ │ orreq r2, r8, r0, lsl r8 │ │ orreq ip, r7, r0, ror r6 │ │ orreq sl, r7, r4, lsr r6 │ │ - stc2l 10, cr1, [r1, #708]! @ 0x2c4 @ │ │ + stc2l 10, cr1, [r1, #888]! @ 0x378 @ │ │ @ instruction: 0x01882798 │ │ orreq r3, r9, r0, lsl r8 │ │ orreq r1, r6, r8, lsr ip │ │ - stc2l 3, cr3, [r3, #716]! @ 0x2cc │ │ + stc2l 3, cr3, [r3, #896]! @ 0x380 │ │ orreq r9, r7, ip, lsr #7 │ │ ldrdeq sp, [r6, ip] │ │ orreq lr, r6, r4, ror r7 │ │ ldr r0, [pc, #4000] @ 240f968 │ │ mov r1, r4 │ │ mov r2, sl │ │ movw r3, #5419 @ 0x152b │ │ @@ -1251754,15 +1251753,15 @@ │ │ b 240ecc0 │ │ @ instruction: 0x018a74bc │ │ @ instruction: 0x0186e598 │ │ eorseq ip, r3, ip, ror #17 │ │ orreq r3, r9, ip, ror #23 │ │ ldrdeq ip, [r7, r0] │ │ orreq ip, r7, r0, asr #7 │ │ - stc2l 1, cr3, [r3, #176]! @ 0xb0 │ │ + stc2l 1, cr3, [r3, #356]! @ 0x164 │ │ orreq sl, r7, r0, lsr r4 │ │ mov r0, r4 │ │ mov r2, sl │ │ movw r3, #5458 @ 0x1552 │ │ bl 270d9c0 │ │ ldr r2, [pc, #4092] @ 240fc7c │ │ add r2, pc, r2 │ │ @@ -1251799,15 +1251798,15 @@ │ │ mov r0, r4 │ │ mov r2, sl │ │ movw r3, #5464 @ 0x1558 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 240cb1c │ │ orreq ip, r7, r8, ror r3 │ │ - stc2l 4, cr3, [r2, #312]! @ 0x138 │ │ + stc2l 4, cr3, [r2, #492]! @ 0x1ec │ │ orreq fp, r7, ip, lsl #7 │ │ orreq lr, r6, r4, lsr #9 │ │ @ instruction: 0x0186e498 │ │ ldrdeq sl, [r7, r8] │ │ stc2l 2, cr2, [r4, #904]! @ 0x388 │ │ ldrdeq r3, [r9, ip] │ │ ldrdeq ip, [r7, ip] │ │ @@ -1251868,26 +1251867,26 @@ │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-36] @ 0xffffffdc │ │ cmp r0, #2 │ │ blt 240f26c │ │ mov r0, #2 │ │ b 240ef4c │ │ orreq ip, r7, r0, lsr r2 │ │ - stc2l 1, cr7, [r0, #308]! @ 0x134 │ │ + stc2l 1, cr7, [r0, #488]! @ 0x1e8 │ │ orreq ip, r7, ip, asr #3 │ │ stc2l 10, cr14, [r3, #980]! @ 0x3d4 @ │ │ orreq r7, sl, r0, asr r2 │ │ orreq r1, r6, r4, asr #15 │ │ eorseq ip, r3, r0, lsl #13 │ │ orreq sl, r7, ip, lsr #2 │ │ stc2l 1, cr2, [r4, #216]! @ 0xd8 │ │ orreq r3, r9, ip, asr #18 │ │ orreq r3, r9, r8, lsr #12 │ │ orreq ip, r7, r8, lsr #2 │ │ - stc2l 11, cr10, [r3, #60]! @ 0x3c @ │ │ + stc2l 11, cr10, [r3, #240]! @ 0xf0 @ │ │ ldr r0, [r3, r1, lsl #2] │ │ ldr r1, [pc, #3976] @ 240fdec │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ ldr r0, [pc, #3968] @ 240fdf0 │ │ add r0, pc, r0 │ │ str r0, [sp, #32] │ │ @@ -1251960,15 +1251959,15 @@ │ │ blt 240f1dc │ │ mov r1, #0 │ │ mov r0, #1 │ │ b 240efd8 │ │ orreq r7, r8, r4, asr r4 │ │ orreq ip, r7, r0, ror #1 │ │ orreq ip, r7, r0, lsr #1 │ │ - stc2l 15, cr6, [r0, #756]! @ 0x2f4 │ │ + stc2l 15, cr6, [r0, #936]! @ 0x3a8 │ │ orreq ip, r7, ip, lsr r0 │ │ stc2l 9, cr14, [r3, #216]! @ 0xd8 @ │ │ ldr r2, [pc, #3976] @ 240ff34 │ │ mov r0, #1 │ │ add r2, pc, r2 │ │ str r0, [r2, r1, lsl #2] │ │ ldr r2, [fp, #-40] @ 0xffffffd8 │ │ @@ -1252030,19 +1252029,19 @@ │ │ orreq lr, r6, r8, asr r1 │ │ orreq fp, r5, r4, lsr r0 │ │ orreq ip, r7, r8, lsl #31 │ │ orreq r1, r6, r8, asr #11 │ │ orreq lr, r6, r4, lsl #2 │ │ orreq ip, r7, r0, lsr #30 │ │ orreq ip, r7, r0, lsl pc │ │ - stc2l 12, cr2, [r3, #860]! @ 0x35c │ │ + stc2l 13, cr2, [r3, #16]! │ │ strdeq r9, [r7, ip] │ │ orreq fp, r7, ip, lsl pc │ │ orreq r8, r7, r0, lsr #25 │ │ - stc2l 10, cr6, [r2, #508]! @ 0x1fc @ │ │ + stc2l 10, cr6, [r2, #688]! @ 0x2b0 @ │ │ orreq r4, r8, r4, lsr #30 │ │ orreq r1, r6, r8, ror #9 │ │ stlexeq ip, r0, [r7] │ │ orreq r8, r7, r0, asr #24 │ │ ldr r0, [pc, #3868] @ 240fff8 │ │ mov r2, sl │ │ movw r3, #5493 @ 0x1575 │ │ @@ -1252102,15 +1252101,15 @@ │ │ mov r3, #5504 @ 0x1580 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r3, [pc, #3680] @ 2410028 │ │ mov r1, r0 │ │ add r3, pc, r3 │ │ b 240efa4 │ │ - stc2l 9, cr6, [r2, #462]! @ 0x1ce @ │ │ + stc2l 10, cr6, [r2, #80]! @ 0x50 @ │ │ ldr r0, [pc, #4092] @ 24101d8 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4088] @ 24101dc │ │ cmp r0, #2 │ │ add r1, pc, r1 │ │ moveq r1, r3 │ │ ldr r1, [r1] │ │ @@ -1252135,15 +1252134,15 @@ │ │ ldr r4, [pc, r4] │ │ ldr r0, [pc, #4012] @ 24101f0 │ │ add r0, pc, r0 │ │ str r4, [r0] │ │ mov r0, #2 │ │ str r0, [r1] │ │ b 240f26c │ │ - stc2l 1, cr13, [r1, #96]! @ 0x60 │ │ + stc2l 1, cr13, [r1, #276]! @ 0x114 │ │ orreq r4, r8, r4, asr lr │ │ orreq lr, r8, r0, ror #9 │ │ @ instruction: 0x0187cdb8 │ │ ldr r4, [pc, #3976] @ 24101f4 │ │ ldr r4, [pc, r4] │ │ ldr r1, [pc, #3972] @ 24101f8 │ │ ldr r1, [pc, r1] │ │ @@ -1252151,17 +1252150,17 @@ │ │ cmp r1, #200 @ 0xc8 │ │ add r0, r1, #1 │ │ str r0, [r2] │ │ bcs 240f2a0 │ │ mov r0, r4 │ │ b 240f2c0 │ │ @ instruction: 0x01879db0 │ │ - stc2l 9, cr6, [r2, #22]! @ │ │ + stc2l 9, cr6, [r2, #112]! @ 0x70 @ │ │ orreq r9, r7, r4, lsr sp │ │ - stc2l 0, cr13, [r1, #240]! @ 0xf0 │ │ + stc2l 0, cr13, [r1, #420]! @ 0x1a4 │ │ ldr r0, [pc, #3924] @ 24101fc │ │ mov r2, sl │ │ movw r3, #5543 @ 0x15a7 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3904] @ 2410200 │ │ @@ -1252243,20 +1252242,20 @@ │ │ orreq r1, r6, r8, lsr #4 │ │ ldrshteq ip, [r3], -ip │ │ orreq sp, r6, r8, ror sp │ │ orreq r8, r7, r0, asr r9 │ │ orreq fp, r7, r4, lsr #23 │ │ @ instruction: 0x0187bb94 │ │ @ instruction: 0x0187bb94 │ │ - stc2l 15, cr0, [r1, #824]! @ 0x338 │ │ - stc2l 8, cr2, [r3, #848]! @ 0x350 │ │ + stc2l 15, cr0, [r1, #1004]! @ 0x3ec │ │ + stc2l 9, cr2, [r3, #2]! @ │ │ strdeq r9, [r7, r0] │ │ - stc2l 6, cr6, [r2, #300]! @ 0x12c │ │ + stc2l 6, cr6, [r2, #480]! @ 0x1e0 │ │ orreq r9, r7, r4, ror sl │ │ - stc2l 13, cr12, [r1, #480]! @ 0x1e0 │ │ + stc2l 13, cr12, [r1, #660]! @ 0x294 │ │ ldr r2, [pc, #4052] @ 24103f8 │ │ add r2, pc, r2 │ │ str r8, [r2, r1, lsl #2] │ │ ldr r6, [pc, #4044] @ 24103fc │ │ ldr r6, [pc, r6] │ │ ldr r2, [pc, #4040] @ 2410400 │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ @@ -1252374,20 +1252373,20 @@ │ │ cmp r0, #0 │ │ beq 240f578 │ │ cmp r0, #0 │ │ bne 240f63c │ │ b 241040c │ │ orreq fp, r7, r0, lsl #21 │ │ stc2l 3, cr14, [r3, #628]! @ 0x274 │ │ - stc2l 14, cr0, [r1, #568]! @ 0x238 │ │ + stc2l 14, cr0, [r1, #748]! @ 0x2ec │ │ orreq fp, r7, r8, lsr sl │ │ - stc2l 11, cr14, [r0, #708]! @ 0x2c4 @ │ │ + stc2l 11, cr14, [r0, #888]! @ 0x378 @ │ │ @ instruction: 0x018799b8 │ │ - stc2l 5, cr6, [r2, #236]! @ 0xec │ │ - stc2l 14, cr0, [r1, #8]! │ │ + stc2l 5, cr6, [r2, #416]! @ 0x1a0 │ │ + stc2l 14, cr0, [r1, #188]! @ 0xbc │ │ orreq r9, r7, ip, asr r9 │ │ mov r0, #1 │ │ strb r0, [r6] │ │ ldr r8, [pc, #4092] @ 2410638 │ │ ldr r8, [pc, r8] │ │ ldr r0, [pc, #4088] @ 241063c │ │ ldr r0, [pc, r0] │ │ @@ -1252432,18 +1252431,18 @@ │ │ movw r3, #5615 @ 0x15ef │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #4052] @ 24106c8 │ │ ldr r0, [pc, r0] │ │ b 240f448 │ │ - stc2l 12, cr12, [r1, #400]! @ 0x190 │ │ + stc2l 12, cr12, [r1, #580]! @ 0x244 │ │ orreq fp, r7, ip, ror #18 │ │ stc2l 2, cr14, [r3, #592]! @ 0x250 │ │ - stc2l 13, cr0, [r1, #504]! @ 0x1f8 │ │ + stc2l 13, cr0, [r1, #684]! @ 0x2ac │ │ strdeq r8, [r8, r4] │ │ orreq r1, r8, r8, asr #20 │ │ ldr r1, [pc, #4020] @ 24106cc │ │ ldr r1, [pc, r1] │ │ ldr r0, [pc, #4016] @ 24106d0 │ │ cmp r1, #0 │ │ add r0, pc, r0 │ │ @@ -1252475,15 +1252474,15 @@ │ │ add r6, pc, r6 │ │ b 240f848 │ │ orreq ip, r6, r4, lsr #21 │ │ @ instruction: 0x0186ca98 │ │ orreq r8, r7, r4, asr r6 │ │ orreq ip, r7, ip, ror r8 │ │ strdeq r9, [r7, r4] │ │ - stc2l 6, cr2, [r3, #140]! @ 0x8c │ │ + stc2l 6, cr2, [r3, #320]! @ 0x140 │ │ ldrdeq sl, [r5, ip] │ │ orreq r0, r6, ip, ror lr │ │ orreq ip, r6, r8, lsr #20 │ │ orreq ip, r7, r0, lsl r8 │ │ orreq ip, r7, r4, lsl #16 │ │ orreq sp, r6, r4, ror #18 │ │ orreq ip, r7, r0, lsl #15 │ │ @@ -1252554,15 +1252553,15 @@ │ │ movw r3, #5630 @ 0x15fe │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 240f7d0 │ │ orreq r9, r7, r4, ror #14 │ │ orreq fp, r7, r4, lsl #15 │ │ - stc2l 2, cr6, [r2, #972]! @ 0x3cc │ │ + stc2l 3, cr6, [r2, #128]! @ 0x80 │ │ orreq r4, r8, r0, lsr #15 │ │ orreq r0, r6, ip, asr sp │ │ orreq ip, r7, r4, lsl #14 │ │ ldrdeq r8, [r7, r0] │ │ ldr r0, [pc, #4092] @ 24108f8 │ │ mov r1, #36 @ 0x24 │ │ add r0, pc, r0 │ │ @@ -1252588,15 +1252587,15 @@ │ │ mov r2, #1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #4020] @ 2410910 │ │ mov r1, #23 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 24106b0 │ │ - stc2l 2, cr6, [r2, #220]! @ 0xdc │ │ + stc2l 2, cr6, [r2, #400]! @ 0x190 │ │ orreq r9, r7, r0, ror #12 │ │ mov r0, #1 │ │ strb r0, [r8] │ │ mov r0, #0 │ │ str r0, [sl] │ │ ldr r0, [pc, #3980] @ 2410914 │ │ ldr r0, [pc, r0] │ │ @@ -1252626,15 +1252625,15 @@ │ │ str r0, [sl] │ │ mov r0, r4 │ │ bl 270e0b0 │ │ cmp r0, #0 │ │ str r0, [r4] │ │ bgt 240f9d8 │ │ b 240b880 │ │ - stc2l 9, cr12, [r1, #208]! @ 0xd0 @ │ │ + stc2l 9, cr12, [r1, #298]! @ 0x12a @ │ │ orreq r4, r8, r8, lsr #13 │ │ orreq sp, r8, r4, lsr sp │ │ orreq ip, r7, r8, lsl #12 │ │ ldrdeq r8, [r7, r4] │ │ orreq ip, r7, ip, ror #11 │ │ orreq r9, r7, r4, ror #12 │ │ orreq ip, r7, r8, lsl #11 │ │ @@ -1252684,15 +1252683,15 @@ │ │ add sl, pc, sl │ │ add r8, pc, r8 │ │ add r9, pc, r9 │ │ b 240fb30 │ │ orreq sp, r6, r8, lsl r7 │ │ strdeq sp, [r6, r4] │ │ orreq sp, r6, r4, ror #13 │ │ - stc2l 2, cr2, [r3, #956]! @ 0x3bc │ │ + stc2l 3, cr2, [r3, #112]! @ 0x70 │ │ orreq sp, r6, ip, asr #13 │ │ orreq ip, r7, r4, lsl #10 │ │ ldr r1, [pc, #4084] @ 2410af0 │ │ add r1, pc, r1 │ │ ldr r0, [r1, r0, lsl #2] │ │ cmp r0, #0 │ │ ble 240fe2c │ │ @@ -1252708,20 +1252707,20 @@ │ │ ble 2410468 │ │ ldr r2, [pc, #4036] @ 2410afc │ │ mov r7, #1 │ │ mov r1, #1 │ │ add r2, pc, r2 │ │ str r1, [r2] │ │ b 240fb78 │ │ - stc2l 9, cr0, [r1, #168]! @ 0xa8 @ │ │ + stc2l 9, cr0, [r1, #258]! @ 0x102 @ │ │ orreq ip, r7, r4, lsr #9 │ │ orreq r7, r8, ip, asr #15 │ │ - stc2l 9, cr0, [r1, #12]! @ │ │ + stc2l 9, cr0, [r1, #102]! @ 0x66 @ │ │ orreq sp, r6, r0, lsr r6 │ │ - stc2l 2, cr2, [r3, #220]! @ 0xdc │ │ + stc2l 2, cr2, [r3, #400]! @ 0x190 │ │ orreq r7, r8, r4, lsl #15 │ │ orreq ip, r7, ip, lsr #8 │ │ ldr r1, [pc, #3984] @ 2410b00 │ │ add r7, r7, #1 │ │ add r1, pc, r1 │ │ str r7, [r1] │ │ sub r1, r0, #1 │ │ @@ -1252821,16 +1252820,16 @@ │ │ add r1, r3, r0, lsl #2 │ │ sub r9, r1, #20 │ │ cmp r9, #2000 @ 0x7d0 │ │ bcs 240fd1c │ │ lsl r1, r0, #2 │ │ mov r0, r9 │ │ b 240fd4c │ │ - stc2l 0, cr2, [r3, #828]! @ 0x33c │ │ - stc2l 7, cr0, [r1, #552]! @ 0x228 │ │ + stc2l 0, cr2, [r3, #1008]! @ 0x3f0 │ │ + stc2l 7, cr0, [r1, #732]! @ 0x2dc │ │ orreq sp, r6, r4, lsr #9 │ │ ldrdeq ip, [r7, r8] │ │ ldr r0, [pc, #4072] @ 2410d0c │ │ mov r1, r9 │ │ mov r2, r8 │ │ movw r3, #2977 @ 0xba1 │ │ add r0, pc, r0 │ │ @@ -1252858,29 +1252857,29 @@ │ │ cmp r1, #99 @ 0x63 │ │ bhi 240fda4 │ │ ldr r0, [r6, r1, lsl #2] │ │ sub r7, r0, #1 │ │ str r7, [r6, r1, lsl #2] │ │ b 240ff80 │ │ orreq ip, r7, r0, lsr #5 │ │ - stc2l 7, cr0, [r1, #128]! @ 0x80 │ │ + stc2l 7, cr0, [r1, #308]! @ 0x134 │ │ mov r0, r9 │ │ mov r2, r8 │ │ movw r3, #2981 @ 0xba5 │ │ bl 270d9c0 │ │ ldr r0, [r6, r0, lsl #2] │ │ sub r7, r0, #1 │ │ ldr r0, [pc, #4084] @ 2410db8 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, #99 @ 0x63 │ │ bhi 240ff40 │ │ str r7, [r6, r1, lsl #2] │ │ b 240ff80 │ │ - stc2l 0, cr2, [r3, #236]! @ 0xec │ │ + stc2l 0, cr2, [r3, #416]! @ 0x1a0 │ │ orreq sp, r6, r4, lsl r4 │ │ orreq r8, r7, r8, lsl r0 │ │ orreq ip, r7, r4, asr #4 │ │ strdeq sp, [r6, r0] │ │ orreq r6, r8, r0, lsl #11 │ │ orreq sp, r8, ip, ror #17 │ │ strdeq r2, [r9, ip] │ │ @@ -1252999,35 +1252998,35 @@ │ │ ldr r0, [pc, #3656] @ 2410e08 │ │ mov r1, r7 │ │ mov r2, r8 │ │ movw r3, #3045 @ 0xbe5 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ b 240faf4 │ │ - stc2l 14, cr1, [r3, #160]! @ 0xa0 │ │ + stc2l 14, cr1, [r3, #340]! @ 0x154 │ │ orreq fp, r7, r8, lsl #1 │ │ orreq r9, r7, r0, lsr #2 │ │ - stc2l 14, cr9, [r2, #884]! @ 0x374 │ │ + stc2l 15, cr9, [r2, #40]! @ 0x28 │ │ @ instruction: 0x0186d1bc │ │ @ instruction: 0x0185f698 │ │ orreq fp, r7, ip, lsr #32 │ │ orreq fp, r6, r8, lsr #4 │ │ @ instruction: 0x0187bfb4 │ │ - stc2l 4, cr11, [r3, #968]! @ 0x3c8 │ │ + stc2l 5, cr11, [r3, #124]! @ 0x7c │ │ @ instruction: 0x0186b1b4 │ │ orreq fp, r7, r4, asr #30 │ │ orreq sl, r7, r4, lsl #31 │ │ - stc2l 14, cr3, [r1, #516]! @ 0x204 │ │ + stc2l 14, cr3, [r1, #696]! @ 0x2b8 │ │ orreq fp, r7, r8, lsl #30 │ │ orreq sp, r6, r4, asr #1 │ │ strdeq r7, [r7, r8] │ │ orreq fp, r7, ip, ror #29 │ │ orreq fp, r7, r0, ror #29 │ │ strdeq sl, [r7, r0] │ │ - stc2l 12, cr1, [r3, #384]! @ 0x180 │ │ + stc2l 12, cr1, [r3, #564]! @ 0x234 │ │ orreq sp, r6, r8, lsr r0 │ │ ldr r1, [pc, #3544] @ 2410e0c │ │ mov r0, r7 │ │ add r1, pc, r1 │ │ bl 270e0b0 │ │ cmp r0, #0 │ │ str r0, [r7] │ │ @@ -1253131,15 +1253130,15 @@ │ │ ldr r0, [pc, r0] │ │ ldr r9, [pc, #3948] @ 2411140 │ │ add r9, pc, r9 │ │ b 241003c │ │ orreq fp, r7, ip, ror #28 │ │ orreq r7, r7, r8, lsr #24 │ │ orreq r6, r8, r8, ror #3 │ │ - stc2l 11, cr1, [r3, #1004]! @ 0x3ec @ │ │ + stc2l 12, cr1, [r3, #160]! @ 0xa0 │ │ ldrdeq ip, [r6, r8] │ │ orreq ip, r6, r8, asr #31 │ │ orreq r7, r7, ip, asr #23 │ │ orreq r7, r7, r4, lsr #23 │ │ orreq r8, r8, r0, lsl #8 │ │ stc2l 2, cr15, [r3, #456]! @ 0x1c8 │ │ orreq r7, r7, r0, asr fp │ │ @@ -1253234,15 +1253233,15 @@ │ │ add r0, pc, r0 │ │ b 240bba4 │ │ @ instruction: 0x01878db8 │ │ orreq sl, r7, r8, lsl #26 │ │ orreq r8, r7, r8, asr sl │ │ orrseq ip, r1, r0, lsl #18 │ │ ldrdeq r0, [r6, r0] │ │ - stc2l 1, cr0, [r1, #104]! @ 0x68 │ │ + stc2l 1, cr0, [r1, #284]! @ 0x11c │ │ orrseq r1, r1, ip, asr #8 │ │ ldrdeq sl, [r7, r0] │ │ ldr r4, [pc, #3904] @ 24112d4 │ │ mov r1, #6 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270ce20 │ │ @@ -1253322,28 +1253321,28 @@ │ │ mov r4, r7 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3632] @ 2411308 │ │ mov r1, r7 │ │ add r0, pc, r0 │ │ b 24105b8 │ │ - stc2l 10, cr9, [r2, #112]! @ 0x70 @ │ │ + stc2l 10, cr9, [r2, #292]! @ 0x124 @ │ │ ldr r0, [pc, #3616] @ 241130c │ │ mov r1, #34 @ 0x22 │ │ mov r4, r7 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #4092] @ 24114fc │ │ mov r1, r7 │ │ add r0, pc, r0 │ │ b 2410610 │ │ orreq sl, r7, r4, ror #22 │ │ ldrdeq r8, [r7, r8] │ │ @ instruction: 0x01878bb8 │ │ - stc2l 14, cr15, [r1, #344]! @ 0x158 │ │ + stc2l 14, cr15, [r1, #524]! @ 0x20c │ │ orreq sl, r8, r8, lsr r9 │ │ orreq sl, r7, r4, lsr #22 │ │ ldr r0, [pc, #4056] @ 2411500 │ │ mov r1, #55 @ 0x37 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #4044] @ 2411504 │ │ @@ -1253361,15 +1253360,15 @@ │ │ mov r1, #19 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3996] @ 2411510 │ │ add r0, pc, r0 │ │ b 2410630 │ │ strdeq r0, [r6, ip] │ │ - stc2l 9, cr9, [r2, #182]! @ 0xb6 @ │ │ + stc2l 9, cr9, [r2, #272]! @ 0x110 @ │ │ orrseq r2, r1, ip, lsl r2 │ │ ldr r0, [pc, #3976] @ 2411514 │ │ mov r1, #55 @ 0x37 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #3964] @ 2411518 │ │ mov r1, r6 │ │ @@ -1253410,15 +1253409,15 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #4064] @ 2411610 │ │ add r0, pc, r0 │ │ mov r1, #4 │ │ b 24131e4 │ │ orreq sl, r7, r8, asr sl │ │ orreq sl, r7, r8, asr #20 │ │ - stc2l 7, cr1, [r3, #764]! @ 0x2fc │ │ + stc2l 7, cr1, [r3, #944]! @ 0x3b0 │ │ orreq r8, r7, r8, asr #16 │ │ orreq sl, r7, r0, lsl sl │ │ strdeq pc, [r5, r4] │ │ ldr r0, [pc, #4080] @ 2411648 │ │ mov r1, #93 @ 0x5d │ │ add r0, pc, r0 │ │ bl 270d990 │ │ @@ -1253430,28 +1253429,28 @@ │ │ mov r0, r5 │ │ bl 270d790 │ │ ldr r0, [pc, #4044] @ 2411650 │ │ mov r1, #22 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 240a6d0 │ │ - stc2l 0, cr8, [r0, #860]! @ 0x35c │ │ + stc2l 1, cr8, [r0, #16]! │ │ orreq r8, r7, r0, asr #14 │ │ ldrdeq sl, [r7, r0] │ │ ldr r1, [pc, #4068] @ 2411688 │ │ mov r2, #0 │ │ strb r2, [r0] │ │ add r1, pc, r1 │ │ str r2, [r1] │ │ ldr r0, [pc, #4052] @ 241168c │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ b 24131e4 │ │ orreq r8, r7, ip, lsl #20 │ │ - stc2l 4, cr7, [r2, #872]! @ 0x368 │ │ + stc2l 5, cr7, [r2, #28]! │ │ @ instruction: 0x0187a998 │ │ orreq fp, r6, r4, lsr fp │ │ orreq sl, r7, r4, ror #18 │ │ orreq sl, r7, r4, lsr r9 │ │ orreq sl, r7, r0, lsr #18 │ │ ldr r0, [pc, #4012] @ 2411690 │ │ ldr r0, [pc, r0] │ │ @@ -1253488,25 +1253487,25 @@ │ │ ldr sl, [pc, #3924] @ 24116b8 │ │ add r8, pc, r8 │ │ add r5, pc, r5 │ │ add sl, pc, sl │ │ b 24107fc │ │ orrseq ip, r1, r8, asr fp │ │ orrseq ip, r1, r4, lsr #10 │ │ - stc2l 13, cr15, [r0, #296]! @ 0x128 │ │ + stc2l 13, cr15, [r0, #476]! @ 0x1dc │ │ ldrdeq r5, [r8, r8] │ │ orreq r6, r8, r4, asr #29 │ │ @ instruction: 0x01885b98 │ │ orreq sl, r7, r8, ror #16 │ │ orreq sl, r7, r4, asr r8 │ │ - stc2l 8, cr15, [r2, #124]! @ 0x7c │ │ + vcmla.f16 , q1, q6, #270 │ │ orreq sl, r7, r4, lsl r8 │ │ - stc2l 9, cr1, [r2, #48]! @ 0x30 @ │ │ + stc2l 9, cr1, [r2, #138]! @ 0x8a @ │ │ orreq sl, r7, r0, ror #15 │ │ - stc2l 10, cr11, [r1, #768]! @ 0x300 @ │ │ + stc2l 10, cr11, [r1, #948]! @ 0x3b4 @ │ │ ldr r0, [pc, #3856] @ 24116bc │ │ mov r2, #80 @ 0x50 │ │ mov r3, #17 │ │ mov r7, r6 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ mov r0, r9 │ │ @@ -1253584,21 +1253583,21 @@ │ │ mov r1, r8 │ │ mov r2, #80 @ 0x50 │ │ mov r3, #5 │ │ bl 270d960 │ │ cmp r0, #0 │ │ bne 24107e0 │ │ b 2414150 │ │ - stc2l 15, cr4, [r3, #444]! @ 0x1bc │ │ + stc2l 15, cr4, [r3, #624]! @ 0x270 │ │ orreq sl, r7, r0, lsl #15 │ │ - stc2l 4, cr1, [r3, #928]! @ 0x3a0 │ │ - stc2l 11, cr15, [r0, #680]! @ 0x2a8 @ │ │ + stc2l 5, cr1, [r3, #84]! @ 0x54 │ │ + stc2l 11, cr15, [r0, #860]! @ 0x35c @ │ │ orrseq ip, r1, r8, lsl #12 │ │ - stc2l 5, cr3, [r1, #484]! @ 0x1e4 │ │ - vcmla.f16 d17, d2, d10, #270 │ │ + stc2l 5, cr3, [r1, #664]! @ 0x298 │ │ + stc2l 8, cr1, [r2, #220]! @ 0xdc │ │ orreq r8, r7, ip, asr r7 │ │ ldr r4, [pc, #4000] @ 24118c0 │ │ mov r6, r7 │ │ ldr sl, [pc, #3996] @ 24118c4 │ │ add r4, pc, r4 │ │ add sl, pc, sl │ │ mov r0, r4 │ │ @@ -1253623,16 +1253622,16 @@ │ │ movw r3, #1707 @ 0x6ab │ │ ldr r2, [pc, #4052] @ 2411958 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24107a4 │ │ - stc2l 9, cr15, [r1, #492]! @ 0x1ec @ │ │ - stc2l 11, cr15, [r0, #184]! @ 0xb8 @ │ │ + stc2l 10, cr15, [r1, #140]! @ 0x8c @ │ │ + stc2l 11, cr15, [r0, #364]! @ 0x16c @ │ │ ldrdeq sl, [r8, r0] │ │ orreq pc, r5, r4, asr #25 │ │ orrseq r0, r1, r4, lsr lr │ │ orreq sl, r7, r0, asr #12 │ │ orreq sl, r7, r8, asr #12 │ │ @ instruction: 0x01859690 │ │ orreq sl, r7, ip, lsr #12 │ │ @@ -1253640,16 +1253639,16 @@ │ │ orreq r9, r5, r8, ror #12 │ │ orreq sl, r7, r4, lsl #12 │ │ orreq r8, r8, r0, asr #7 │ │ orreq r8, r7, r4, asr #12 │ │ orreq r9, r5, ip, lsr r6 │ │ @ instruction: 0x0188c494 │ │ orreq sl, r7, r4, asr #11 │ │ - stc2l 10, cr15, [r0, #8]! @ │ │ - stc2l 5, cr11, [r2, #180]! @ 0xb4 │ │ + stc2l 10, cr15, [r0, #188]! @ 0xbc @ │ │ + stc2l 5, cr11, [r2, #360]! @ 0x168 │ │ ldr sl, [pc, #4020] @ 241199c │ │ mov r5, #32 │ │ ldr r6, [pc, #4016] @ 24119a0 │ │ mov r8, r9 │ │ add sl, pc, sl │ │ add r6, pc, r6 │ │ str r6, [sp] │ │ @@ -1253717,15 +1253716,15 @@ │ │ orreq r8, r8, r0, ror r7 │ │ orreq r8, r7, ip, asr #11 │ │ orreq r8, r8, r0, lsl #8 │ │ orreq sl, r7, ip, asr #10 │ │ orreq sl, r7, r8, lsl r5 │ │ orreq r8, r7, ip, lsr #10 │ │ orreq sl, r7, r8, asr #9 │ │ - stc2l 7, cr13, [r1, #960]! @ 0x3c0 │ │ + stc2l 8, cr13, [r1, #116]! @ 0x74 │ │ strdeq r8, [r7, r0] │ │ @ instruction: 0x0187a490 │ │ orreq sl, r8, r8, lsl r4 │ │ ldr r0, [pc, #4080] @ 2411b14 │ │ mov r8, r7 │ │ mov r1, #0 │ │ ldr r0, [pc, r0] │ │ @@ -1253803,15 +1253802,15 @@ │ │ add r5, pc, r5 │ │ ldr r6, [pc, #3956] @ 2411bc8 │ │ add sl, pc, sl │ │ add r7, pc, r7 │ │ add r6, pc, r6 │ │ b 24107e0 │ │ orreq sl, r7, r4, lsr #8 │ │ - stc2l 7, cr13, [r1, #208]! @ 0xd0 │ │ + stc2l 7, cr13, [r1, #388]! @ 0x184 │ │ orreq sl, r7, r4, ror #7 │ │ orreq r8, r7, ip, lsr #8 │ │ orreq sl, r8, r8, asr r3 │ │ mov r0, sl │ │ bl 270e050 │ │ cmp r0, #0 │ │ beq 2411888 │ │ @@ -1253845,19 +1253844,19 @@ │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, #100 @ 0x64 │ │ bcs 24118cc │ │ ldr r7, [pc, #4028] @ 2411cc4 │ │ add r7, pc, r7 │ │ b 24118ec │ │ - stc2l 6, cr13, [r1, #656]! @ 0x290 │ │ + stc2l 6, cr13, [r1, #836]! @ 0x344 │ │ orreq r8, r7, r8, lsr #7 │ │ orreq sl, r7, ip, asr #6 │ │ orreq sl, r8, r0, asr #5 │ │ - stc2l 2, cr11, [r2, #532]! @ 0x214 │ │ + stc2l 2, cr11, [r2, #712]! @ 0x2c8 │ │ mov r0, #1 │ │ strb r0, [sl] │ │ ldr r0, [pc, #3992] @ 2411cc8 │ │ ldr r0, [pc, r0] │ │ ldr r4, [pc, #3988] @ 2411ccc │ │ sub r1, r0, #1 │ │ cmp r1, #100 @ 0x64 │ │ @@ -1253890,35 +1253889,35 @@ │ │ ldr r0, [pc, #3892] @ 2411ce0 │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ add r0, pc, r0 │ │ str r4, [r0, r2, lsl #2] │ │ b 24125f0 │ │ orreq r8, r7, r0, lsr #6 │ │ @ instruction: 0x018782b0 │ │ - stc2l 5, cr15, [r1, #264]! @ 0x108 │ │ + stc2l 5, cr15, [r1, #444]! @ 0x1bc │ │ orreq sl, r8, r4, lsr #32 │ │ orreq r8, r7, r8, ror #4 │ │ orrseq r0, r1, r0, lsl #19 │ │ strdeq sl, [r7, r8] │ │ orreq r9, r5, r8, lsr #4 │ │ orreq r8, r7, r4, lsr #4 │ │ orreq r8, r8, r4, asr r0 │ │ orreq r9, r5, r8, lsl #4 │ │ strdeq r8, [r7, ip] │ │ orreq r8, r8, r4, lsr #32 │ │ ldrdeq r8, [r7, r4] │ │ - stc2l 0, cr11, [r2, #964]! @ 0x3c4 │ │ + stc2l 1, cr11, [r2, #120]! @ 0x78 │ │ orreq r8, r7, r8, lsl #3 │ │ - stc2l 5, cr15, [r0, #408]! @ 0x198 │ │ + stc2l 5, cr15, [r0, #588]! @ 0x24c │ │ strheq r8, [r7, ip] │ │ ldrdeq r8, [r8, ip] │ │ orreq r8, r7, ip, lsr r1 │ │ - stc2l 5, cr15, [r0, #72]! @ 0x48 │ │ + stc2l 5, cr15, [r0, #252]! @ 0xfc │ │ strheq ip, [r8, r4] │ │ - stc2l 11, cr4, [r2, #668]! @ 0x29c @ │ │ + stc2l 11, cr4, [r2, #848]! @ 0x350 @ │ │ ldr r0, [pc, #4004] @ 2411dc0 │ │ add r0, pc, r0 │ │ ldrb r0, [r0] │ │ cmp r0, #1 │ │ bne 2411c8c │ │ ldr r0, [pc, #3988] @ 2411dc4 │ │ ldr r0, [pc, r0] │ │ @@ -1254103,26 +1254102,26 @@ │ │ mov r2, #80 @ 0x50 │ │ ldr r1, [pc, #3524] @ 2411ec8 │ │ mov r3, #14 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ b 24115c8 │ │ - stc2l 3, cr15, [r0, #760]! @ 0x2f8 │ │ + stc2l 3, cr15, [r0, #940]! @ 0x3ac │ │ orreq r8, r8, ip, lsr r1 │ │ orreq r7, r7, r0, lsl #30 │ │ orreq fp, r8, r0, lsr #31 │ │ orreq r7, r7, r8, lsl #31 │ │ - stc2l 3, cr15, [r0, #408]! @ 0x198 │ │ + stc2l 3, cr15, [r0, #588]! @ 0x24c │ │ orreq r8, r8, r4, ror #1 │ │ @ instruction: 0x01877eb0 │ │ orreq fp, r8, r0, asr pc │ │ orreq r7, r7, ip, lsr #30 │ │ orreq r7, r7, r4, lsl pc │ │ - stc2l 14, cr10, [r2, #196]! @ 0xc4 │ │ + stc2l 14, cr10, [r2, #376]! @ 0x178 │ │ ldr r0, [pc, #3456] @ 2411ecc │ │ movw r3, #1941 @ 0x795 │ │ ldr r6, [pc, #3452] @ 2411ed0 │ │ add r0, pc, r0 │ │ add r6, pc, r6 │ │ mov r2, r6 │ │ bl 270d9c0 │ │ @@ -1254161,16 +1254160,16 @@ │ │ str r1, [fp, #-48] @ 0xffffffd0 │ │ bcs 2411214 │ │ ldr r6, [pc, #3328] @ 2411ef0 │ │ add r6, pc, r6 │ │ b 2411234 │ │ @ instruction: 0x01877eb0 │ │ orreq r9, r7, ip, asr #28 │ │ - stc2l 1, cr15, [r1, #232]! @ 0xe8 │ │ - stc2l 2, cr15, [r0, #456]! @ 0x1c8 │ │ + stc2l 1, cr15, [r1, #412]! @ 0x19c │ │ + stc2l 2, cr15, [r0, #636]! @ 0x27c │ │ orreq r9, r8, r0, lsl ip │ │ orreq pc, r5, r4, lsl #8 │ │ orrseq r0, r1, r4, ror r5 │ │ orreq r9, r7, r8, ror #27 │ │ ldr r0, [pc, #3288] @ 2411ef4 │ │ movw r3, #1941 @ 0x795 │ │ ldr r6, [pc, #3284] @ 2411ef8 │ │ @@ -1254209,35 +1254208,35 @@ │ │ cmp r0, #500 @ 0x1f4 │ │ sub r1, r1, #8 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ bcs 2411310 │ │ ldr r6, [pc, #3164] @ 2411f14 │ │ add r6, pc, r6 │ │ b 2411330 │ │ - stc2l 12, cr2, [r1, #480]! @ 0x1e0 │ │ - stc2l 11, cr2, [r1, #772]! @ 0x304 @ │ │ + stc2l 12, cr2, [r1, #660]! @ 0x294 │ │ + stc2l 11, cr2, [r1, #952]! @ 0x3b8 @ │ │ @ instruction: 0x0191bfd0 │ │ orreq r9, r7, r8, ror #26 │ │ orreq r9, r7, r4, asr #26 │ │ - stc2l 10, cr2, [r2, #756]! @ 0x2f4 @ │ │ - vcmla.f16 d22, d2, d29, #270 │ │ - stc2l 3, cr7, [r0, #856]! @ 0x358 │ │ - stc2l 11, cr2, [r1, #20]! @ │ │ + stc2l 10, cr2, [r2, #936]! @ 0x3a8 @ │ │ + stc2l 8, cr6, [r2, #360]! @ 0x168 │ │ + stc2l 4, cr7, [r0, #12]! │ │ + stc2l 11, cr2, [r1, #200]! @ 0xc8 @ │ │ orreq fp, r6, ip, lsr #28 │ │ - stc2l 10, cr2, [r2, #244]! @ 0xf4 @ │ │ - stc2l 13, cr0, [r2, #452]! @ 0x1c4 │ │ - stc2l 10, cr2, [r1, #596]! @ 0x254 @ │ │ + stc2l 10, cr2, [r2, #424]! @ 0x1a8 @ │ │ + stc2l 13, cr0, [r2, #632]! @ 0x278 │ │ + stc2l 10, cr2, [r1, #776]! @ 0x308 @ │ │ orrseq fp, r1, r8, ror r8 │ │ @ instruction: 0x01877c90 │ │ - stc2l 12, cr14, [r2, #104]! @ 0x68 │ │ - stc2l 14, cr10, [r1, #968]! @ 0x3c8 │ │ - stc2l 10, cr2, [r1, #84]! @ 0x54 @ │ │ - stc2l 14, cr10, [r1, #792]! @ 0x318 │ │ - stc2l 9, cr2, [r1, #466]! @ 0x1d2 @ │ │ - stc2l 14, cr10, [r1, #632]! @ 0x278 │ │ + stc2l 12, cr14, [r2, #284]! @ 0x11c │ │ + stc2l 15, cr10, [r1, #124]! @ 0x7c │ │ + stc2l 10, cr2, [r1, #264]! @ 0x108 @ │ │ + stc2l 14, cr10, [r1, #972]! @ 0x3cc │ │ + stc2l 10, cr2, [r1, #88]! @ 0x58 @ │ │ + stc2l 14, cr10, [r1, #812]! @ 0x32c │ │ ldr r0, [pc, #3072] @ 2411f18 │ │ movw r3, #1941 @ 0x795 │ │ ldr r6, [pc, #3068] @ 2411f1c │ │ add r0, pc, r0 │ │ add r6, pc, r6 │ │ mov r2, r6 │ │ bl 270d9c0 │ │ @@ -1254353,27 +1254352,27 @@ │ │ add r0, r0, r1, lsl #2 │ │ ldr r1, [pc, #3996] @ 2412488 │ │ ldr r2, [pc, #3996] @ 241248c │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270e070 │ │ b 2411710 │ │ - stc2l 9, cr2, [r1, #386]! @ 0x182 @ │ │ - stc2l 2, cr7, [r0, #344]! @ 0x158 │ │ - stc2l 9, cr2, [r1, #266]! @ 0x10a @ │ │ + stc2l 9, cr2, [r1, #476]! @ 0x1dc @ │ │ + stc2l 2, cr7, [r0, #524]! @ 0x20c │ │ + stc2l 9, cr2, [r1, #356]! @ 0x164 @ │ │ orreq fp, r6, ip, lsr #25 │ │ - stc2l 8, cr2, [r2, #756]! @ 0x2f4 │ │ - stc2l 3, cr4, [r3, #128]! @ 0x80 │ │ - stc2l 1, cr7, [r0, #968]! @ 0x3c8 │ │ - stc2l 9, cr2, [r1, #66]! @ 0x42 @ │ │ + vcmla.f16 q9, q9, q13, #270 │ │ + stc2l 3, cr4, [r3, #308]! @ 0x134 │ │ + stc2l 2, cr7, [r0, #124]! @ 0x7c │ │ + stc2l 9, cr2, [r1, #156]! @ 0x9c @ │ │ orreq fp, r6, r8, asr #24 │ │ - stc2l 8, cr2, [r2, #356]! @ 0x164 │ │ - stc2l 14, cr0, [r1, #492]! @ 0x1ec │ │ - stc2l 1, cr7, [r0, #616]! @ 0x268 │ │ - vcmla.f16 q9, , , #270 │ │ + vcmla.f16 d18, d18, d6, #270 │ │ + stc2l 14, cr0, [r1, #672]! @ 0x2a0 │ │ + stc2l 1, cr7, [r0, #796]! @ 0x31c │ │ + stc2l 8, cr2, [r1, #984]! @ 0x3d8 │ │ ldr r0, [pc, #3928] @ 2412490 │ │ mov r4, sl │ │ ldr r0, [pc, r0] │ │ sub r0, r0, #1 │ │ str r0, [fp, #-68] @ 0xffffffbc │ │ ldr r7, [pc, #3912] @ 2412494 │ │ cmp r0, #500 @ 0x1f4 │ │ @@ -1254421,31 +1254420,31 @@ │ │ add r5, pc, r5 │ │ add r1, pc, r1 │ │ mov r0, r5 │ │ bl 270e0b0 │ │ str r0, [r5] │ │ b 241161c │ │ strdeq fp, [r6, r0] │ │ - vcmla.f16 d18, d2, d1, #270 │ │ - stc2l 4, cr2, [r3, #188]! @ 0xbc │ │ + vcmla.f16 d18, d2, d30, #270 │ │ + stc2l 4, cr2, [r3, #368]! @ 0x170 │ │ ldr r0, [pc, #3988] @ 24125b0 │ │ ldr r0, [pc, r0] │ │ cmp r0, #0 │ │ ble 24128dc │ │ mov r0, r9 │ │ mov r1, r8 │ │ mov r2, #80 @ 0x50 │ │ mov r3, #5 │ │ bl 270d960 │ │ cmp r0, #0 │ │ mov r5, r4 │ │ bne 2410eb0 │ │ b 24128e0 │ │ stc2l 13, cr13, [r3, #816]! @ 0x330 │ │ - stc2l 8, cr2, [r1, #340]! @ 0x154 │ │ + vcmla.f16 d18, d17, d2, #270 │ │ stc2l 3, cr12, [r3, #16]! │ │ mov r0, r9 │ │ mov r1, r8 │ │ mov r2, #80 @ 0x50 │ │ mov r3, #5 │ │ bl 270d970 │ │ ldr r0, [pc, #4044] @ 241263c │ │ @@ -1254453,29 +1254452,29 @@ │ │ ldr r1, [pc, #4040] @ 2412640 │ │ mov r3, #21 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ b 24117bc │ │ orreq r9, r7, r4, asr #19 │ │ - stc2l 15, cr9, [r3, #76]! @ 0x4c │ │ + stc2l 15, cr9, [r3, #256]! @ 0x100 │ │ orreq r6, r7, r4, lsr r7 │ │ orreq r7, r7, r4, asr #18 │ │ orreq r3, r8, r8, lsl #25 │ │ stc2l 2, cr12, [r3, #604]! @ 0x25c │ │ - stc2l 13, cr0, [r1, #120]! @ 0x78 │ │ + stc2l 13, cr0, [r1, #300]! @ 0x12c │ │ orreq r3, r8, r4, asr #24 │ │ - stc2l 7, cr2, [r1, #988]! @ 0x3dc │ │ - stc2l 12, cr0, [r1, #968]! @ 0x3c8 │ │ - vcmla.f16 d18, d2, d4, #270 │ │ - stc2l 8, cr10, [r2, #628]! @ 0x274 │ │ + vcmla.f16 d18, d1, d20, #270 │ │ + stc2l 13, cr0, [r1, #124]! @ 0x7c │ │ + stc2l 8, cr2, [r2, #196]! @ 0xc4 │ │ + vcmla.f16 q13, q9, q5, #270 │ │ @ instruction: 0x018877b0 │ │ orreq fp, r7, r4, asr fp │ │ - stc2l 12, cr0, [r1, #472]! @ 0x1d8 │ │ - vcmla.f16 d26, d2, d25, #270 │ │ + stc2l 12, cr0, [r1, #652]! @ 0x28c │ │ + stc2l 8, cr10, [r2, #344]! @ 0x158 │ │ orreq r7, r8, ip, lsr r7 │ │ ldr r0, [pc, #4076] @ 24126c0 │ │ ldr r0, [pc, r0] │ │ ldr r4, [pc, #4072] @ 24126c4 │ │ sub r1, r0, #1 │ │ cmp r1, #200 @ 0xc8 │ │ ldr r4, [pc, r4] │ │ @@ -1254539,17 +1254538,17 @@ │ │ add r7, pc, r7 │ │ ldr r5, [pc, #4088] @ 24127cc │ │ add r6, pc, r6 │ │ add sl, pc, sl │ │ add r5, pc, r5 │ │ b 24115c8 │ │ stc2l 1, cr12, [r3, #588]! @ 0x24c │ │ - stc2l 2, cr6, [r2, #780]! @ 0x30c │ │ - stc2l 7, cr10, [r2, #640]! @ 0x280 │ │ - stc2l 7, cr14, [r2, #828]! @ 0x33c │ │ + stc2l 2, cr6, [r2, #960]! @ 0x3c0 │ │ + stc2l 7, cr10, [r2, #820]! @ 0x334 │ │ + stc2l 7, cr14, [r2, #1008]! @ 0x3f0 │ │ ldr r0, [pc, #4056] @ 24127d0 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ str r1, [fp, #-32] @ 0xffffffe0 │ │ cmp r1, #100 @ 0x64 │ │ bcc 2411820 │ │ ldr r0, [pc, #4036] @ 24127d4 │ │ @@ -1254579,29 +1254578,29 @@ │ │ mov r3, #22 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ ldr r6, [pc, #4044] @ 241284c │ │ add r6, pc, r6 │ │ b 24107e0 │ │ - stc2l 5, cr2, [r0, #796]! @ 0x31c │ │ + stc2l 5, cr2, [r0, #976]! @ 0x3d0 │ │ mov r0, r9 │ │ mov r1, r8 │ │ mov r2, #80 @ 0x50 │ │ mov r3, #5 │ │ bl 270d970 │ │ ldr r0, [pc, #4012] @ 2412850 │ │ mov r2, #80 @ 0x50 │ │ ldr r1, [pc, #4008] @ 2412854 │ │ mov r3, #15 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ b 24107e0 │ │ - stc2l 1, cr2, [r3, #356]! @ 0x164 │ │ + stc2l 1, cr2, [r3, #536]! @ 0x218 │ │ orreq r7, r8, r4, lsr #10 │ │ orreq sl, r6, r8, lsl r9 │ │ @ instruction: 0x01858794 │ │ ldr r0, [pc, #4084] @ 24128c8 │ │ mov r3, #1872 @ 0x750 │ │ ldr r7, [pc, #4080] @ 24128cc │ │ add r0, pc, r0 │ │ @@ -1254631,16 +1254630,16 @@ │ │ ldr r1, [pc, #4084] @ 2412934 │ │ ldr r2, [pc, #4084] @ 2412938 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270e070 │ │ b 2411b70 │ │ orreq sl, r6, r8, ror #17 │ │ - stc2l 11, cr9, [r3, #304]! @ 0x130 @ │ │ - stc2l 11, cr14, [r0, #312]! @ 0x138 @ │ │ + stc2l 11, cr9, [r3, #484]! @ 0x1e4 @ │ │ + stc2l 11, cr14, [r0, #492]! @ 0x1ec @ │ │ ldr r0, [pc, #4056] @ 241293c │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4052] @ 2412940 │ │ ldr r1, [pc, r1] │ │ cmp r0, r1 │ │ bge 2412794 │ │ ldr r1, [pc, #4040] @ 2412944 │ │ @@ -1254649,15 +1254648,15 @@ │ │ mov r3, #17 │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ mov r0, r9 │ │ mov r1, r7 │ │ bl 270d970 │ │ b 24107e0 │ │ - stc2l 1, cr6, [r2, #108]! @ 0x6c │ │ + stc2l 1, cr6, [r2, #288]! @ 0x120 │ │ orreq fp, r7, r4, ror #18 │ │ orreq r8, r5, r4, ror #13 │ │ orreq r7, r7, r4, lsr #12 │ │ @ instruction: 0x0191b8b0 │ │ orreq r7, r7, ip, lsl r6 │ │ orreq r3, r8, r4, asr #18 │ │ ldr r0, [pc, #3976] @ 2412948 │ │ @@ -1254697,17 +1254696,17 @@ │ │ ldr r0, [pc, #4004] @ 24129ec │ │ add r0, pc, r0 │ │ str r4, [r0, r2, lsl #2] │ │ b 2411aa0 │ │ eorseq r9, r3, ip, lsr #22 │ │ orrseq r7, r1, r0, lsl r3 │ │ orreq r3, r8, r0, ror #17 │ │ - stc2l 4, cr2, [r2, #640]! @ 0x280 │ │ + stc2l 4, cr2, [r2, #820]! @ 0x334 │ │ orrseq fp, r1, r8, asr #14 │ │ - stc2l 1, cr4, [r2, #620]! @ 0x26c │ │ + stc2l 1, cr4, [r2, #800]! @ 0x320 │ │ ldr r0, [pc, #3968] @ 24129f0 │ │ mov r1, r2 │ │ mov r2, r7 │ │ movw r3, #1837 @ 0x72d │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3948] @ 24129f4 │ │ @@ -1254746,17 +1254745,17 @@ │ │ ldr r1, [pc, #3852] @ 2412a18 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ b 24107e0 │ │ @ instruction: 0x018585b4 │ │ orreq r7, r7, ip, lsr #11 │ │ orreq r9, r7, r0, asr #10 │ │ - stc2l 9, cr14, [r0, #260]! @ 0x104 @ │ │ + stc2l 9, cr14, [r0, #350]! @ 0x15e @ │ │ orreq r7, r8, r4, lsr sl │ │ - stc2l 10, cr9, [r3, #196]! @ 0xc4 @ │ │ + stc2l 10, cr9, [r3, #376]! @ 0x178 @ │ │ orrseq fp, r1, r4, asr #14 │ │ ldr r0, [pc, #3812] @ 2412a1c │ │ ldr r0, [pc, r0] │ │ ldr r4, [pc, #3808] @ 2412a20 │ │ sub r1, r0, #1 │ │ cmp r1, #100 @ 0x64 │ │ ldr r4, [pc, r4] │ │ @@ -1254779,24 +1254778,24 @@ │ │ bhi 2411bcc │ │ ldr r2, [pc, #4056] @ 2412b6c │ │ str r1, [fp, #-32] @ 0xffffffe0 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ b 2411c00 │ │ orreq r7, r8, ip, ror #6 │ │ - stc2l 4, cr10, [r2, #128]! @ 0x80 │ │ + stc2l 4, cr10, [r2, #308]! @ 0x134 │ │ orreq r7, r8, r8, lsl r3 │ │ - stc2l 3, cr2, [r2, #368]! @ 0x170 │ │ - stc2l 8, cr0, [r1, #248]! @ 0xf8 │ │ - stc2l 3, cr10, [r2, #964]! @ 0x3c4 │ │ - stc2l 3, cr2, [r2, #176]! @ 0xb0 │ │ - stc2l 3, cr10, [r2, #740]! @ 0x2e4 │ │ + stc2l 3, cr2, [r2, #548]! @ 0x224 │ │ + vcmla.f16 q8, , , #270 │ │ + stc2l 4, cr10, [r2, #120]! @ 0x78 │ │ + stc2l 3, cr2, [r2, #356]! @ 0x164 │ │ + stc2l 3, cr10, [r2, #920]! @ 0x398 │ │ orreq r7, r8, r8, asr #5 │ │ - stc2l 2, cr2, [r1, #972]! @ 0x3cc │ │ - stc2l 7, cr0, [r1, #968]! @ 0x3c8 │ │ + stc2l 3, cr2, [r1, #128]! @ 0x80 │ │ + stc2l 8, cr0, [r1, #124]! @ 0x7c │ │ ldr r0, [pc, #3996] @ 2412b70 │ │ mov r2, r7 │ │ movw r3, #1887 @ 0x75f │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3980] @ 2412b74 │ │ add r1, pc, r1 │ │ @@ -1254851,20 +1254850,20 @@ │ │ blt 24128f8 │ │ ldr r5, [fp, #-32] @ 0xffffffe0 │ │ b 2411d54 │ │ orreq r7, r7, r0, lsr #8 │ │ orreq fp, r8, r8, lsl #8 │ │ orreq r6, r8, r8, lsl #19 │ │ strdeq r7, [r7, r0] │ │ - stc2l 7, cr14, [r0, #824]! @ 0x338 │ │ + stc2l 7, cr14, [r0, #1004]! @ 0x3ec │ │ @ instruction: 0x018773b4 │ │ orreq r3, r8, ip, asr #12 │ │ - vcmla.f16 , , q14, #270 │ │ + stc2l 9, cr5, [r3, #50]! @ 0x32 @ │ │ @ instruction: 0x01887694 │ │ - stc2l 2, cr10, [r2, #580]! @ 0x244 │ │ + stc2l 2, cr10, [r2, #760]! @ 0x2f8 │ │ orreq r7, r7, ip, asr r3 │ │ orreq r9, r8, ip, ror #4 │ │ mov r0, r9 │ │ mov r1, r8 │ │ mov r2, #80 @ 0x50 │ │ mov r3, #5 │ │ bl 270d970 │ │ @@ -1254916,16 +1254915,16 @@ │ │ ldr r5, [pc, #3988] @ 2412d48 │ │ ldr r7, [pc, #3988] @ 2412d4c │ │ add r5, pc, r5 │ │ add r7, pc, r7 │ │ b 2411df8 │ │ orreq r9, r7, r8, ror #4 │ │ @ instruction: 0x018772b4 │ │ - stc2l 5, cr14, [r1, #296]! @ 0x128 │ │ - stc2l 6, cr14, [r0, #520]! @ 0x208 │ │ + stc2l 5, cr14, [r1, #476]! @ 0x1dc │ │ + stc2l 6, cr14, [r0, #700]! @ 0x2bc │ │ ldr r0, [pc, #3960] @ 2412d50 │ │ movw r3, #2074 @ 0x81a │ │ ldr r7, [pc, #3956] @ 2412d54 │ │ add r0, pc, r0 │ │ add r7, pc, r7 │ │ mov r2, r7 │ │ bl 270d9c0 │ │ @@ -1254954,76 +1254953,76 @@ │ │ add r0, r0, r1, lsl #2 │ │ ldr r1, [pc, #3868] @ 2412d6c │ │ add r1, pc, r1 │ │ bl 270e070 │ │ b 2411f98 │ │ orreq r9, r8, r8, lsr #32 │ │ orreq r9, r7, r4, lsr #4 │ │ - stc2l 6, cr14, [r0, #184]! @ 0xb8 │ │ + stc2l 6, cr14, [r0, #364]! @ 0x16c │ │ orreq r7, r8, r0, ror #13 │ │ ldrdeq r9, [r7, ip] │ │ - stc2l 0, cr8, [r2, #188]! @ 0xbc │ │ + stc2l 0, cr8, [r2, #368]! @ 0x170 │ │ orrseq r0, r1, ip, ror #17 │ │ orreq r3, r8, ip, lsl #9 │ │ orreq fp, r7, r8, asr r4 │ │ orreq r9, r7, r4, lsl #3 │ │ stc2l 10, cr11, [r3, #460]! @ 0x1cc @ │ │ orreq r9, r7, r8, asr #2 │ │ orreq r8, r5, r8, lsl #3 │ │ strdeq r9, [r7, ip] │ │ stc2l 10, cr11, [r3, #108]! @ 0x6c @ │ │ strdeq r9, [r7, r0] │ │ strheq r9, [r7, r0] │ │ stc2l 9, cr11, [r3, #390]! @ 0x186 @ │ │ @ instruction: 0x01879098 │ │ - stc2l 15, cr3, [r0, #840]! @ 0x348 │ │ + stc2l 15, cr3, [r0, #1020]! @ 0x3fc │ │ orreq r6, r8, ip, asr #12 │ │ orreq r9, r7, r0, asr r0 │ │ - stc2l 4, cr14, [r0, #440]! @ 0x1b8 │ │ + stc2l 4, cr14, [r0, #620]! @ 0x26c │ │ orreq r9, r7, r0 │ │ - stc2l 14, cr7, [r2, #300]! @ 0x12c │ │ + stc2l 14, cr7, [r2, #480]! @ 0x1e0 │ │ orrseq r0, r1, ip, lsl #14 │ │ @ instruction: 0x0191abd0 │ │ orrseq fp, r1, r4, lsr #2 │ │ - stc2l 2, cr12, [r1, #828]! @ 0x33c │ │ + stc2l 2, cr12, [r1, #1008]! @ 0x3f0 │ │ stc2l 8, cr11, [r3, #380]! @ 0x17c │ │ - stc2l 3, cr14, [r0, #504]! @ 0x1f8 │ │ + stc2l 3, cr14, [r0, #684]! @ 0x2ac │ │ orreq r7, r5, ip, ror pc │ │ orreq r8, r7, r0, lsr #30 │ │ - stc2l 13, cr11, [r2, #632]! @ 0x278 │ │ - stc2l 2, cr0, [r1, #648]! @ 0x288 │ │ + stc2l 13, cr11, [r2, #812]! @ 0x32c │ │ + stc2l 2, cr0, [r1, #828]! @ 0x33c │ │ orrseq r4, r1, ip, lsr #9 │ │ ldrdeq r7, [r8, r0] │ │ orreq r8, r7, r8, asr #29 │ │ - stc2l 2, cr14, [r0, #920]! @ 0x398 │ │ + stc2l 3, cr14, [r0, #76]! @ 0x4c │ │ stc2l 7, cr11, [r3, #572]! @ 0x23c │ │ - stc2l 2, cr14, [r0, #696]! @ 0x2b8 │ │ + stc2l 2, cr14, [r0, #876]! @ 0x36c │ │ orreq r7, r5, ip, lsr #29 │ │ orreq r8, r7, r0, asr lr │ │ - stc2l 5, cr8, [r0, #860]! @ 0x35c │ │ - stc2l 1, cr0, [r1, #840]! @ 0x348 │ │ + stc2l 6, cr8, [r0, #16]! │ │ + stc2l 1, cr0, [r1, #1020]! @ 0x3fc │ │ orrseq r4, r1, ip, lsr #23 │ │ orreq r8, r7, r0, lsl #28 │ │ - stc2l 2, cr14, [r0, #120]! @ 0x78 │ │ + stc2l 2, cr14, [r0, #300]! @ 0x12c │ │ stc2l 6, cr11, [r3, #588]! @ 0x24c │ │ - stc2l 1, cr14, [r0, #712]! @ 0x2c8 │ │ + stc2l 1, cr14, [r0, #892]! @ 0x37c │ │ @ instruction: 0x01857db0 │ │ orreq r8, r7, r4, asr sp │ │ - stc2l 11, cr7, [r2, #664]! @ 0x298 @ │ │ - stc2l 0, cr0, [r1, #856]! @ 0x358 │ │ + stc2l 11, cr7, [r2, #844]! @ 0x34c @ │ │ + stc2l 1, cr0, [r1, #12]! │ │ orrseq r5, r1, r0, lsl #5 │ │ orreq r8, r7, r4, lsl #26 │ │ ldrdeq r8, [r7, r8] │ │ - stc2l 11, cr1, [r1, #676]! @ 0x2a4 @ │ │ - stc2l 1, cr14, [r0, #120]! @ 0x78 │ │ + stc2l 11, cr1, [r1, #856]! @ 0x358 @ │ │ + stc2l 1, cr14, [r0, #300]! @ 0x12c │ │ orrseq r5, r1, r4, lsl #20 │ │ @ instruction: 0x01878cb4 │ │ @ instruction: 0x01878c90 │ │ stc2l 12, cr14, [r3, #468]! @ 0x1d4 │ │ - stc2l 0, cr14, [r0, #824]! @ 0x338 │ │ + stc2l 0, cr14, [r0, #1004]! @ 0x3ec │ │ ldr r0, [pc, #4008] @ 2412f08 │ │ ldr r0, [pc, r0] │ │ ldr r4, [pc, #4004] @ 2412f0c │ │ sub r1, r0, #1 │ │ cmp r1, #100 @ 0x64 │ │ ldr r4, [pc, r4] │ │ bcc 2411f8c │ │ @@ -1255317,17 +1255316,17 @@ │ │ add r0, pc, r0 │ │ add r0, r0, r1, lsl #2 │ │ ldr r1, [pc, #4004] @ 24133a4 │ │ add r1, pc, r1 │ │ bl 270e070 │ │ b 24124e4 │ │ orrseq r6, r1, r4, lsl #3 │ │ - stc2l 0, cr0, [r1, #136]! @ 0x88 │ │ + stc2l 0, cr0, [r1, #316]! @ 0x13c │ │ orreq r2, r8, r0, ror #30 │ │ - stc2l 11, cr1, [r2, #192]! @ 0xc0 @ │ │ + stc2l 11, cr1, [r2, #372]! @ 0x174 @ │ │ orreq r0, r9, r8, asr r4 │ │ orreq r0, r9, r0, asr #8 │ │ orreq r2, r8, r4, lsl #31 │ │ mov r0, r9 │ │ mov r1, r8 │ │ mov r2, #80 @ 0x50 │ │ mov r3, #5 │ │ @@ -1255342,25 +1255341,25 @@ │ │ ldr sl, [pc, #3924] @ 24133b0 │ │ ldr r7, [pc, #3924] @ 24133b4 │ │ add sl, pc, sl │ │ add r7, pc, r7 │ │ b 2411d14 │ │ orreq r6, r8, r4, lsl #4 │ │ stc2l 11, cr14, [r3, #936]! @ 0x3a8 @ │ │ - stc2l 0, cr14, [r0, #296]! @ 0x128 │ │ + stc2l 0, cr14, [r0, #476]! @ 0x1dc │ │ orreq r0, r9, r0, ror #1 │ │ orreq r6, r8, r0, asr #3 │ │ stc2l 11, cr14, [r3, #664]! @ 0x298 @ │ │ - stc2l 0, cr14, [r0, #24]! │ │ + stc2l 0, cr14, [r0, #204]! @ 0xcc │ │ @ instruction: 0x0189009c │ │ strdeq r2, [r8, r4] │ │ orreq r0, r9, r8, lsr #7 │ │ orreq r8, r7, r8, asr fp │ │ - stc2l 15, cr13, [r0, #536]! @ 0x218 │ │ - stc2l 9, cr7, [r2, #310]! @ 0x136 @ │ │ + stc2l 15, cr13, [r0, #716]! @ 0x2cc │ │ + stc2l 9, cr7, [r2, #400]! @ 0x190 @ │ │ orrseq r0, r1, r0, ror #4 │ │ orrseq sl, r1, r4, lsr #14 │ │ ldr r0, [pc, #3852] @ 24133b8 │ │ ldr r0, [pc, r0] │ │ ldr r4, [pc, #3848] @ 24133bc │ │ sub r1, r0, #1 │ │ cmp r1, #200 @ 0xc8 │ │ @@ -1255419,15 +1255418,15 @@ │ │ add r1, pc, r1 │ │ bl 270e260 │ │ ldr sl, [pc, #3972] @ 241351c │ │ add sl, pc, sl │ │ b 2411d14 │ │ orrseq sl, r1, r8, ror ip │ │ stc2l 10, cr14, [r3, #800]! @ 0x320 @ │ │ - stc2l 10, cr9, [r2, #244]! @ 0xf4 @ │ │ + stc2l 10, cr9, [r2, #424]! @ 0x1a8 @ │ │ orreq r8, r7, r0, lsr #21 │ │ orrseq pc, r0, r4, lsl r2 @ │ │ orreq r8, r7, r8, ror sl │ │ ldr r0, [pc, #3940] @ 2413520 │ │ mov r1, r2 │ │ mov r2, r6 │ │ movw r3, #1783 @ 0x6f7 │ │ @@ -1255458,15 +1255457,15 @@ │ │ add r6, pc, r6 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ ldr sl, [pc, #4084] @ 241362c │ │ add sl, pc, sl │ │ b 24107e0 │ │ @ instruction: 0x0191abb0 │ │ - vcmla.f16 d17, d0, d13, #270 │ │ + stc2l 8, cr1, [r0, #232]! @ 0xe8 │ │ mov r0, r5 │ │ mov r2, r7 │ │ movw r3, #1838 @ 0x72e │ │ bl 270d9c0 │ │ ldr r1, [pc, #4052] @ 2413630 │ │ mov r2, #1 │ │ add r1, pc, r1 │ │ @@ -1255493,21 +1255492,21 @@ │ │ bhi 2412858 │ │ ldr r7, [pc, #3980] @ 2413648 │ │ add r7, pc, r7 │ │ b 2411acc │ │ strexeq r5, ip, [r8] │ │ orreq r2, r8, r0, lsl #26 │ │ stc2l 9, cr14, [r3, #244]! @ 0xf4 @ │ │ - stc2l 13, cr13, [r0, #872]! @ 0x368 │ │ + stc2l 14, cr13, [r0, #28]! │ │ orreq pc, r8, r0, ror lr @ │ │ orreq r8, r7, ip, ror r9 │ │ stc2l 2, cr11, [r3, #428]! @ 0x1ac │ │ - stc2l 13, cr13, [r0, #552]! @ 0x228 │ │ + stc2l 13, cr13, [r0, #732]! @ 0x2dc │ │ orreq r2, r8, r0, lsl #25 │ │ - vcmla.f16 , q0, , #270 │ │ + stc2l 8, cr3, [r0, #616]! @ 0x268 │ │ ldr r0, [pc, #3932] @ 241364c │ │ mov r2, r7 │ │ mov r3, #1888 @ 0x760 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r0, [pc, #3916] @ 2413650 │ │ ldr r0, [pc, r0] │ │ @@ -1255540,36 +1255539,36 @@ │ │ sub r1, r0, #1 │ │ cmp r1, #199 @ 0xc7 │ │ bhi 2412958 │ │ ldr r6, [pc, #4036] @ 2413744 │ │ add r6, pc, r6 │ │ mov r7, sl │ │ b 2411c1c │ │ - stc2l 13, cr13, [r0, #280]! @ 0x118 │ │ + stc2l 13, cr13, [r0, #460]! @ 0x1cc │ │ orreq r7, r5, r8, asr #18 │ │ orreq r3, sl, r4, lsr #19 │ │ mov r0, r9 │ │ mov r1, r6 │ │ mov r2, #80 @ 0x50 │ │ mov r3, #4 │ │ bl 270d970 │ │ b 24107e0 │ │ ldrsbteq r8, [r3], -r8 │ │ str r5, [fp, #-32] @ 0xffffffe0 │ │ ldr r5, [pc, #3980] @ 2413748 │ │ add r5, pc, r5 │ │ b 24128f8 │ │ - stc2l 13, cr13, [r0, #40]! @ 0x28 │ │ - stc2l 12, cr15, [r0, #488]! @ 0x1e8 │ │ + stc2l 13, cr13, [r0, #220]! @ 0xdc │ │ + stc2l 12, cr15, [r0, #668]! @ 0x29c │ │ @ instruction: 0x01886db4 │ │ - vcmla.f16 d25, d2, d25, #270 │ │ + stc2l 8, cr9, [r2, #344]! @ 0x158 │ │ orreq r6, r7, ip, ror #17 │ │ - stc2l 14, cr4, [r3, #160]! @ 0xa0 │ │ + stc2l 14, cr4, [r3, #340]! @ 0x154 │ │ orreq r6, r8, r4, ror #13 │ │ - stc2l 7, cr1, [r2, #176]! @ 0xb0 │ │ + stc2l 7, cr1, [r2, #356]! @ 0x164 │ │ @ instruction: 0x01886bbc │ │ mov r0, r5 │ │ mov r2, r6 │ │ movw r3, #1784 @ 0x6f8 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3920] @ 241374c │ │ ldr r1, [pc, r1] │ │ @@ -1255588,18 +1255587,18 @@ │ │ bl 270d9c0 │ │ ldr r2, [pc, #3872] @ 2413758 │ │ mov r1, r0 │ │ add r2, pc, r2 │ │ b 2412608 │ │ orreq r3, r8, r0, asr #22 │ │ @ instruction: 0x0191a9bc │ │ - stc2l 1, cr1, [r3, #616]! @ 0x268 │ │ - stc2l 11, cr15, [r0, #824]! @ 0x338 @ │ │ + stc2l 1, cr1, [r3, #796]! @ 0x31c │ │ + stc2l 11, cr15, [r0, #1004]! @ 0x3ec @ │ │ orrseq sl, r1, ip, ror r9 │ │ - stc2l 12, cr5, [r1, #948]! @ 0x3b4 │ │ + stc2l 13, cr5, [r1, #104]! @ 0x68 │ │ ldr r0, [pc, #4072] @ 2413848 │ │ mov r2, r7 │ │ movw r3, #1845 @ 0x735 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4056] @ 241384c │ │ mov r2, #0 │ │ @@ -1255620,19 +1255619,19 @@ │ │ mov r1, r0 │ │ ldr sl, [pc, #4004] @ 241385c │ │ mov r0, #0 │ │ ldr r7, [pc, #4000] @ 2413860 │ │ add sl, pc, sl │ │ add r7, pc, r7 │ │ b 2411aec │ │ - stc2l 12, cr13, [r0, #8]! │ │ - stc2l 11, cr13, [r0, #984]! @ 0x3d8 @ │ │ + stc2l 12, cr13, [r0, #188]! @ 0xbc │ │ + stc2l 12, cr13, [r0, #140]! @ 0x8c │ │ orreq r6, r8, r8, ror r9 │ │ ldrdeq r6, [r7, ip] │ │ - stc2l 11, cr13, [r0, #744]! @ 0x2e8 @ │ │ + stc2l 11, cr13, [r0, #924]! @ 0x39c @ │ │ mov r5, r4 │ │ ldr r0, [fp, #-68] @ 0xffffffbc │ │ str r0, [fp, #-32] @ 0xffffffe0 │ │ ldr sl, [pc, #3956] @ 2413864 │ │ ldr r7, [pc, #3956] @ 2413868 │ │ add sl, pc, sl │ │ add r7, pc, r7 │ │ @@ -1255654,15 +1255653,15 @@ │ │ orreq r5, r8, ip, lsr #26 │ │ orreq sl, r8, r4, lsr #15 │ │ orreq r6, r7, r4, ror #13 │ │ orreq r5, r7, ip, lsr #9 │ │ orreq r6, r7, r0, asr #13 │ │ orreq r6, r7, r4, lsr #14 │ │ orreq r7, r5, r8, lsl r7 │ │ - stc2l 10, cr13, [r0, #984]! @ 0x3d8 @ │ │ + stc2l 11, cr13, [r0, #140]! @ 0x8c @ │ │ orreq r6, r8, r8, lsr #23 │ │ ldr r0, [pc, #3856] @ 2413870 │ │ mov r2, r7 │ │ movw r3, #1891 @ 0x763 │ │ mov r6, sl │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1255690,32 +1255689,32 @@ │ │ ldr r6, [pc, #4024] @ 2413984 │ │ ldr r8, [pc, #4024] @ 2413988 │ │ ldr r5, [pc, #4024] @ 241398c │ │ add r6, pc, r6 │ │ add r8, pc, r8 │ │ add r5, pc, r5 │ │ b 2411c3c │ │ - stc2l 11, cr8, [r3, #740]! @ 0x2e4 @ │ │ + stc2l 11, cr8, [r3, #920]! @ 0x398 @ │ │ orrseq sl, r1, r8, asr #17 │ │ @ instruction: 0x018766b8 │ │ ldrdeq r8, [r8, r4] │ │ - stc2l 9, cr11, [r1, #176]! @ 0xb0 @ │ │ + stc2l 9, cr11, [r1, #266]! @ 0x10a @ │ │ @ instruction: 0x01888594 │ │ orreq r6, r7, r0, asr r6 │ │ @ instruction: 0x0188a4b0 │ │ ldrdeq r2, [r8, r4] │ │ - stc2l 4, cr1, [r1, #540]! @ 0x21c │ │ + stc2l 4, cr1, [r1, #720]! @ 0x2d0 │ │ orreq r6, r8, r4, lsr r9 │ │ @ instruction: 0x018883b0 │ │ orreq r6, r8, r0, lsr r4 │ │ orreq r6, r8, r4, ror r7 │ │ - stc2l 5, cr13, [r2, #316]! @ 0x13c │ │ + stc2l 5, cr13, [r2, #496]! @ 0x1f0 │ │ orreq r6, r7, ip, lsr #11 │ │ orreq r5, r8, r8, lsr #22 │ │ - stc2l 9, cr13, [r0, #260]! @ 0x104 @ │ │ + stc2l 9, cr13, [r0, #350]! @ 0x15e @ │ │ ldr r1, [pc, #3936] @ 2413990 │ │ add r1, pc, r1 │ │ ldrb r1, [r1] │ │ cmp r1, #1 │ │ bne 2413244 │ │ ldr r4, [pc, #3920] @ 2413994 │ │ ldr r1, [pc, #3920] @ 2413998 │ │ @@ -1255790,29 +1255789,29 @@ │ │ ldr r2, [r5, r1, lsl #2] │ │ add r0, pc, r0 │ │ str r2, [r0] │ │ b 2412c0c │ │ orreq r6, r8, r0, lsl #14 │ │ strdeq r5, [r8, r4] │ │ orreq r1, r8, r4, lsr r5 │ │ - stc2l 0, cr3, [r2, #188]! @ 0xbc │ │ + stc2l 0, cr3, [r2, #368]! @ 0x170 │ │ orreq r1, r8, r4, ror #9 │ │ orreq r5, r8, ip, ror sl │ │ orreq r6, r7, r4, asr #8 │ │ orreq pc, r8, r4, asr #12 │ │ orreq pc, r8, r0, asr r9 @ │ │ ldrdeq r6, [r8, r4] │ │ orreq sl, r8, r0, lsl fp │ │ strdeq r6, [r7, r0] │ │ eorseq r8, r3, ip, lsr #18 │ │ - stc2l 1, cr1, [r0, #1004]! @ 0x3ec │ │ + stc2l 2, cr1, [r0, #160]! @ 0xa0 │ │ orreq r8, r7, r0, lsl #8 │ │ orreq r2, r8, r8, ror #13 │ │ orrseq sl, r1, r0, lsr #10 │ │ - stc2l 15, cr2, [r2, #580]! @ 0x244 │ │ + stc2l 15, cr2, [r2, #760]! @ 0x2f8 │ │ orreq r8, r7, r4, ror #6 │ │ ldr r0, [pc, #3916] @ 2413b04 │ │ movw r3, #6249 @ 0x1869 │ │ ldr r2, [pc, #3912] @ 2413b08 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1255909,21 +1255908,21 @@ │ │ b 2412dd0 │ │ orreq r8, r7, r8, asr r3 │ │ orreq r2, r8, r0, asr #12 │ │ @ instruction: 0x0190ea94 │ │ orreq r2, r8, ip, asr #12 │ │ orreq r6, r7, r4, asr #6 │ │ orreq r7, r5, r4, lsr r3 │ │ - stc2l 7, cr13, [r0, #104]! @ 0x68 │ │ - stc2l 5, cr13, [r1, #744]! @ 0x2e8 │ │ - stc2l 6, cr13, [r0, #968]! @ 0x3c8 │ │ + stc2l 7, cr13, [r0, #284]! @ 0x11c │ │ + stc2l 5, cr13, [r1, #924]! @ 0x39c │ │ + stc2l 7, cr13, [r0, #124]! @ 0x7c │ │ strdeq r7, [r5, r4] │ │ orreq r8, r8, ip, lsl #1 │ │ ldrdeq r6, [r7, r0] │ │ - stc2l 5, cr13, [r1, #424]! @ 0x1a8 │ │ + stc2l 5, cr13, [r1, #604]! @ 0x25c │ │ orreq r8, r8, r8, asr #32 │ │ @ instruction: 0x01882590 │ │ ldr r0, [pc, #4044] @ 2413d44 │ │ mov r1, r4 │ │ ldr r2, [pc, #4040] @ 2413d48 │ │ movw r3, #6259 @ 0x1873 │ │ add r0, pc, r0 │ │ @@ -1256022,20 +1256021,20 @@ │ │ ldr r0, [pc, #4044] @ 2413ec8 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ str r0, [r5, #4] │ │ b 241369c │ │ orreq r6, r7, r4, lsl #3 │ │ orreq r2, r8, r0, ror r4 │ │ - stc2l 4, cr13, [r1, #88]! @ 0x58 │ │ + stc2l 4, cr13, [r1, #268]! @ 0x10c │ │ strdeq r7, [r8, r8] │ │ orreq r2, r8, r0, asr #8 │ │ - stc2l 15, cr6, [r2, #268]! @ 0x10c │ │ + stc2l 15, cr6, [r2, #448]! @ 0x1c0 │ │ orreq r8, r7, r8, asr #1 │ │ - stc2l 5, cr5, [r1, #788]! @ 0x314 │ │ + stc2l 5, cr5, [r1, #968]! @ 0x3c8 │ │ @ instruction: 0x0190f7d8 │ │ orreq sl, r7, r4, asr r3 │ │ ldr r0, [pc, #3988] @ 2413ecc │ │ mov r1, #25 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3976] @ 2413ed0 │ │ @@ -1256092,20 +1256091,20 @@ │ │ ldr r0, [pc, #4080] @ 2414004 │ │ mov r1, #18 │ │ add r0, pc, r0 │ │ b 24105cc │ │ orreq r8, r7, r4, ror r0 │ │ stc2l 9, cr10, [r3, #206]! @ 0xce @ │ │ orreq r2, r8, r4, lsl #7 │ │ - stc2l 15, cr2, [r0, #472]! @ 0x1d8 │ │ + stc2l 15, cr2, [r0, #652]! @ 0x28c │ │ orreq r8, r7, r8 │ │ orreq r5, r8, r0, ror #11 │ │ stc2l 8, cr10, [r3, #972]! @ 0x3cc │ │ orreq r2, r8, r0, lsl r3 │ │ - stc2l 14, cr10, [r2, #280]! @ 0x118 │ │ + stc2l 14, cr10, [r2, #460]! @ 0x1cc │ │ strexeq r7, r4, [r7] │ │ orrseq r3, r1, ip, asr #10 │ │ stc2l 8, cr10, [r3, #508]! @ 0x1fc │ │ ldr r0, [pc, #4044] @ 2414020 │ │ mov r1, #25 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ @@ -1256161,20 +1256160,20 @@ │ │ mov r2, #1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #4080] @ 2414120 │ │ mov r1, #18 │ │ add r0, pc, r0 │ │ b 2410624 │ │ @ instruction: 0x0188229c │ │ - stc2l 6, cr7, [r0, #876]! @ 0x36c │ │ + stc2l 7, cr7, [r0, #32]! │ │ orreq r7, r7, r0, lsr #30 │ │ orrseq r3, r1, r8, lsr #25 │ │ vcmla.f16 d26, d3, d7, #270 │ │ orreq r2, r8, r4, lsr #4 │ │ - stc2l 13, cr6, [r2, #184]! @ 0xb8 │ │ + stc2l 13, cr6, [r2, #364]! @ 0x16c │ │ orreq r7, r7, r8, lsr #29 │ │ ldr r0, [pc, #4036] @ 2414124 │ │ ldr r1, [pc, #4036] @ 2414128 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270e0a0 │ │ ldr r0, [pc, #4024] @ 241412c │ │ @@ -1256226,26 +1256225,26 @@ │ │ mov r0, r5 │ │ bl 270d790 │ │ ldr r0, [pc, #4076] @ 2414220 │ │ mov r1, #19 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 240a6d0 │ │ - stc2l 13, cr0, [r1, #4]! │ │ + stc2l 13, cr0, [r1, #184]! @ 0xb8 │ │ ldr r1, [pc, #4056] @ 2414224 │ │ mov r0, r8 │ │ ldr r2, [pc, #4052] @ 2414228 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ b 2412a7c │ │ orrseq r4, r1, r0, ror #22 │ │ orreq r7, r7, r0, lsr #28 │ │ stc2l 7, cr10, [r3, #76]! @ 0x4c │ │ orreq r2, r8, r4, lsr r1 │ │ - stc2l 0, cr9, [r1, #732]! @ 0x2dc │ │ + stc2l 0, cr9, [r1, #912]! @ 0x390 │ │ orreq r7, r7, r0, asr #27 │ │ stc2l 6, cr10, [r3, #716]! @ 0x2cc │ │ orreq r2, r8, r0, asr #1 │ │ stc2l 13, cr13, [r3, #212]! @ 0xd4 │ │ orrseq r5, r1, ip, asr #4 │ │ orreq pc, r8, r0, asr #10 │ │ orreq r2, r8, ip, rrx │ │ @@ -1256317,17 +1256316,17 @@ │ │ stc2l 12, cr13, [r3, #840]! @ 0x348 │ │ orreq pc, r8, ip, asr #3 │ │ orreq r5, r8, ip, lsr #5 │ │ stc2l 12, cr13, [r3, #584]! @ 0x248 │ │ orreq pc, r8, r8, lsl #3 │ │ orreq r1, r8, r4, ror #31 │ │ orrseq r9, r1, r0, ror #27 │ │ - stc2l 10, cr0, [r0, #244]! @ 0xf4 @ │ │ + stc2l 10, cr0, [r0, #424]! @ 0x1a8 @ │ │ @ instruction: 0x01885abc │ │ - stc2l 10, cr0, [r1, #924]! @ 0x39c @ │ │ + stc2l 11, cr0, [r1, #80]! @ 0x50 @ │ │ orreq r5, r8, r4, asr #3 │ │ orreq r1, r8, r8, lsr #30 │ │ stc2l 11, cr13, [r3, #648]! @ 0x288 @ │ │ @ instruction: 0x0188f09c │ │ orreq r7, r7, r8, lsr #23 │ │ ldr r0, [pc, #4012] @ 2414380 │ │ movw r3, #8093 @ 0x1f9d │ │ @@ -1256404,27 +1256403,27 @@ │ │ add r0, r0, r0, lsl #1 │ │ mvn r1, #23 │ │ add r1, r1, r0, lsl #3 │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ b 241359c │ │ stc2l 4, cr10, [r3, #604]! @ 0x25c │ │ @ instruction: 0x01881eb0 │ │ - stc2l 10, cr2, [r0, #628]! @ 0x274 @ │ │ - stc2l 9, cr0, [r1, #430]! @ 0x1ae @ │ │ + stc2l 10, cr2, [r0, #808]! @ 0x328 @ │ │ + stc2l 10, cr0, [r1, #16]! @ │ │ orreq r6, r5, r4, ror fp │ │ ldrdeq r2, [sl, r0] │ │ eorseq r8, r3, r4 │ │ orreq r5, r8, r4, lsl #19 │ │ - stc2l 14, cr10, [r1, #48]! @ 0x30 │ │ + stc2l 14, cr10, [r1, #228]! @ 0xe4 │ │ orreq r7, r8, r8, asr #20 │ │ orreq r5, r7, r4, lsl #22 │ │ - stc2l 9, cr0, [r2, #216]! @ 0xd8 @ │ │ + stc2l 9, cr0, [r2, #306]! @ 0x132 @ │ │ orreq r9, r8, r8, asr r9 │ │ - stc2l 14, cr14, [r0, #152]! @ 0x98 │ │ - stc2l 10, cr12, [r2, #188]! @ 0xbc @ │ │ + stc2l 14, cr14, [r0, #332]! @ 0x14c │ │ + stc2l 10, cr12, [r2, #368]! @ 0x170 @ │ │ ldr r0, [pc, #3988] @ 24144d8 │ │ mov r1, r4 │ │ ldr r2, [pc, #4092] @ 2414548 │ │ movw r3, #8105 @ 0x1fa9 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1256481,22 +1256480,22 @@ │ │ ldr r0, [pc, #3916] @ 2414574 │ │ add r0, pc, r0 │ │ b 2410630 │ │ orreq r5, r8, r4, ror #17 │ │ strdeq r9, [r8, ip] │ │ orreq r5, r7, r8, ror sl │ │ orreq r1, r8, r0, lsl sp │ │ - stc2l 15, cr3, [r3, #704]! @ 0x2c0 │ │ + stc2l 15, cr3, [r3, #884]! @ 0x374 │ │ orreq r5, r8, r0, ror #26 │ │ orreq r5, r7, ip, lsr sl │ │ - vcmla.f16 d16, d17, d15, #270 │ │ - stc2l 5, cr2, [r2, #648]! @ 0x288 │ │ + stc2l 8, cr0, [r1, #752]! @ 0x2f0 │ │ + stc2l 5, cr2, [r2, #828]! @ 0x33c │ │ orreq r4, r8, ip, ror #30 │ │ orreq r5, r7, r0, asr #18 │ │ - stc2l 13, cr12, [r0, #740]! @ 0x2e4 │ │ + stc2l 13, cr12, [r0, #920]! @ 0x398 │ │ ldr r0, [pc, #4068] @ 2414648 │ │ movw r3, #4658 @ 0x1232 │ │ ldr r2, [pc, #4064] @ 241464c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4052] @ 2414650 │ │ @@ -1256545,21 +1256544,21 @@ │ │ add r0, pc, r0 │ │ mvneq r4, #0 │ │ mov r1, #5 │ │ str r4, [r5, #20] │ │ b 24131e4 │ │ orreq lr, r8, r4, lsr #22 │ │ orreq r4, r8, ip, lsr #30 │ │ - stc2l 14, cr2, [r1, #432]! @ 0x1b0 │ │ + stc2l 14, cr2, [r1, #612]! @ 0x264 │ │ orreq r4, r8, r4, lsl #30 │ │ - stc2l 12, cr14, [r0, #824]! @ 0x338 │ │ - vcmla.f16 q12, q1, , #270 │ │ + stc2l 12, cr14, [r0, #1004]! @ 0x3ec │ │ + stc2l 8, cr8, [r2, #472]! @ 0x1d8 │ │ orreq r5, r7, r8, ror #17 │ │ orreq r9, r8, r0, asr r7 │ │ - stc2l 7, cr0, [r2, #304]! @ 0x130 │ │ + stc2l 7, cr0, [r2, #484]! @ 0x1e4 │ │ orreq r9, r8, r0, lsr #14 │ │ ldr r0, [pc, #3860] @ 2414678 │ │ mov r1, #25 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3848] @ 241467c │ │ ldr r0, [pc, r0] │ │ @@ -1256612,24 +1256611,24 @@ │ │ add r0, pc, r0 │ │ mov r2, #1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3692] @ 24146ac │ │ mov r1, #18 │ │ add r0, pc, r0 │ │ b 2410568 │ │ - stc2l 11, cr12, [r1, #200]! @ 0xc8 @ │ │ + stc2l 11, cr12, [r1, #380]! @ 0x17c @ │ │ orreq r7, r8, r4, lsl r6 │ │ orreq r5, r7, r0, ror #16 │ │ - stc2l 12, cr12, [r0, #232]! @ 0xe8 │ │ - stc2l 12, cr12, [r0, #184]! @ 0xb8 │ │ + stc2l 12, cr12, [r0, #412]! @ 0x19c │ │ + stc2l 12, cr12, [r0, #364]! @ 0x16c │ │ orreq r5, r8, ip, asr r6 │ │ - stc2l 6, cr0, [r1, #540]! @ 0x21c │ │ + stc2l 6, cr0, [r1, #720]! @ 0x2d0 │ │ orreq r5, r8, r8, lsr #12 │ │ - stc2l 6, cr0, [r1, #332]! @ 0x14c │ │ - stc2l 0, cr0, [r3, #1012]! @ 0x3f4 │ │ + stc2l 6, cr0, [r1, #512]! @ 0x200 │ │ + stc2l 1, cr0, [r3, #168]! @ 0xa8 │ │ stc2l 7, cr13, [r3, #24]! │ │ ldr r0, [pc, #4044] @ 2414848 │ │ add r0, pc, r0 │ │ ldrb r0, [r0] │ │ cmp r0, #1 │ │ bne 24140e8 │ │ ldr r0, [r8] │ │ @@ -1256689,19 +1256688,19 @@ │ │ ldr r0, [pc, #3856] @ 2414878 │ │ ldr r2, [r5, r1, lsl #2] │ │ add r0, pc, r0 │ │ str r2, [r0] │ │ b 2413a18 │ │ orreq lr, r8, r0, lsl #24 │ │ orreq r4, r8, r4, ror #25 │ │ - stc2l 9, cr8, [r1, #392]! @ 0x188 @ │ │ - stc2l 11, cr12, [r0, #120]! @ 0x78 @ │ │ - stc2l 10, cr14, [r0, #488]! @ 0x1e8 @ │ │ - stc2l 5, cr0, [r2, #576]! @ 0x240 │ │ - stc2l 6, cr8, [r2, #164]! @ 0xa4 │ │ + stc2l 9, cr8, [r1, #482]! @ 0x1e2 @ │ │ + stc2l 11, cr12, [r0, #300]! @ 0x12c @ │ │ + stc2l 10, cr14, [r0, #668]! @ 0x29c @ │ │ + stc2l 5, cr0, [r2, #756]! @ 0x2f4 │ │ + stc2l 6, cr8, [r2, #344]! @ 0x158 │ │ orreq r7, r7, r8, asr r6 │ │ orreq r7, r7, r4, asr #12 │ │ orreq r9, r6, r8, lsr #15 │ │ orreq r5, r7, r4, ror r3 │ │ orreq r5, r7, r8, asr r6 │ │ orreq r4, r7, r8, lsl #7 │ │ orreq r5, r7, r4, asr r3 │ │ @@ -1256782,25 +1256781,25 @@ │ │ cmp r4, #199 @ 0xc7 │ │ bhi 2413b1c │ │ add r0, r0, r0, lsl #1 │ │ mvn r1, #23 │ │ add r1, r1, r0, lsl #3 │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ b 2413b7c │ │ - stc2l 0, cr4, [r2, #648]! @ 0x288 │ │ - stc2l 9, cr12, [r0, #364]! @ 0x16c @ │ │ + stc2l 0, cr4, [r2, #828]! @ 0x33c │ │ + stc2l 9, cr12, [r0, #454]! @ 0x1c6 @ │ │ orreq r5, r7, ip, asr #8 │ │ orreq r5, r7, r4, lsr #11 │ │ @ instruction: 0x018742b8 │ │ - stc2l 0, cr4, [r2, #48]! @ 0x30 │ │ - stc2l 9, cr12, [r0, #36]! @ 0x24 @ │ │ + stc2l 0, cr4, [r2, #228]! @ 0xe4 │ │ + stc2l 9, cr12, [r0, #126]! @ 0x7e @ │ │ orreq r4, r7, r0, asr #4 │ │ strdeq r5, [r7, ip] │ │ - stc2l 7, cr10, [r1, #936]! @ 0x3a8 │ │ - stc2l 8, cr12, [r0, #840]! @ 0x348 │ │ + stc2l 8, cr10, [r1, #92]! @ 0x5c │ │ + stc2l 8, cr12, [r0, #1020]! @ 0x3fc │ │ ldr r0, [pc, #3792] @ 24149f4 │ │ mov r1, r4 │ │ ldr r2, [pc, #3788] @ 24149f8 │ │ movw r3, #8937 @ 0x22e9 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1256853,21 +1256852,21 @@ │ │ mov r0, r4 │ │ mov r1, r5 │ │ stmib sp, {r6, sl} │ │ str r9, [sp, #12] │ │ bl 270e490 │ │ b 24105d0 │ │ orreq r5, r7, r0, lsr r4 │ │ - stc2l 11, cr4, [r0, #236]! @ 0xec @ │ │ - stc2l 8, cr12, [r0, #584]! @ 0x248 │ │ + stc2l 11, cr4, [r0, #416]! @ 0x1a0 @ │ │ + stc2l 8, cr12, [r0, #764]! @ 0x2fc │ │ strdeq r5, [r7, r4] │ │ @ instruction: 0x01875190 │ │ orreq ip, r5, r0, lsr #20 │ │ stc2l 3, cr13, [r3, #920]! @ 0x398 │ │ - vcmla.f16 q14, q0, q3, #270 │ │ + stc2l 8, cr12, [r0, #460]! @ 0x1cc │ │ orreq ip, r5, r4, ror #19 │ │ orreq lr, r8, r8, asr #17 │ │ ldrdeq r7, [r7, r4] │ │ orreq ip, r5, r8, asr #19 │ │ orreq lr, r8, r0, asr #23 │ │ @ instruction: 0x01877394 │ │ orreq r5, r7, r8, lsr r3 │ │ @@ -1256931,31 +1256930,31 @@ │ │ cmp r1, #9 │ │ bhi 2413d88 │ │ ldr r0, [pc, #4072] @ 2414d20 │ │ ldr r2, [r5, r1, lsl #2] │ │ add r0, pc, r0 │ │ str r2, [r0] │ │ b 2413de4 │ │ - stc2l 14, cr1, [r2, #540]! @ 0x21c │ │ - stc2l 7, cr12, [r0, #312]! @ 0x138 │ │ + stc2l 14, cr1, [r2, #720]! @ 0x2d0 │ │ + stc2l 7, cr12, [r0, #492]! @ 0x1ec │ │ orreq r5, r7, ip, lsr #5 │ │ - stc2l 5, cr8, [r1, #720]! @ 0x2d0 │ │ - stc2l 7, cr12, [r0, #56]! @ 0x38 │ │ + stc2l 5, cr8, [r1, #900]! @ 0x384 │ │ + stc2l 7, cr12, [r0, #236]! @ 0xec │ │ orreq ip, r5, r8, lsr #17 │ │ orreq r9, r8, ip, ror #18 │ │ ldrdeq r0, [r8, r8] │ │ - stc2l 1, cr2, [r0, #868]! @ 0x364 │ │ - stc2l 6, cr12, [r0, #712]! @ 0x2c8 │ │ + stc2l 2, cr2, [r0, #24]! │ │ + stc2l 6, cr12, [r0, #892]! @ 0x37c │ │ orreq r2, sl, r4, lsl r3 │ │ ldrdeq r3, [r7, r4] │ │ - stc2l 0, cr6, [r2, #588]! @ 0x24c │ │ - stc2l 6, cr12, [r0, #392]! @ 0x188 │ │ + stc2l 0, cr6, [r2, #768]! @ 0x300 │ │ + stc2l 6, cr12, [r0, #572]! @ 0x23c │ │ orrseq lr, r0, r0, asr r9 │ │ orreq ip, r5, r0, ror #15 │ │ - stc2l 1, cr2, [r0, #200]! @ 0xc8 │ │ + stc2l 1, cr2, [r0, #380]! @ 0x17c │ │ ldr r0, [pc, #4092] @ 2414d8c │ │ movw r3, #7082 @ 0x1baa │ │ ldr r2, [pc, #4088] @ 2414d90 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4076] @ 2414d94 │ │ @@ -1257025,31 +1257024,31 @@ │ │ cmp r4, #199 @ 0xc7 │ │ bhi 2413f00 │ │ add r0, r0, r0, lsl #1 │ │ mvn r1, #23 │ │ add r1, r1, r0, lsl #3 │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ b 2413f60 │ │ - stc2l 6, cr12, [r0, #72]! @ 0x48 │ │ + stc2l 6, cr12, [r0, #252]! @ 0xfc │ │ orreq r4, r8, r8, lsr #15 │ │ orreq ip, r5, r0, lsr #15 │ │ orrseq r2, r1, r0, ror #14 │ │ - stc2l 13, cr1, [r2, #832]! @ 0x340 │ │ + stc2l 13, cr1, [r2, #1012]! @ 0x3f4 │ │ orreq ip, r5, r0, asr #14 │ │ - stc2l 15, cr5, [r2, #636]! @ 0x27c │ │ - stc2l 5, cr12, [r0, #440]! @ 0x1b8 │ │ + stc2l 15, cr5, [r2, #816]! @ 0x330 │ │ + stc2l 5, cr12, [r0, #620]! @ 0x26c │ │ orrseq lr, r0, ip, asr r8 │ │ - stc2l 15, cr15, [r0, #244]! @ 0xf4 │ │ + stc2l 15, cr15, [r0, #424]! @ 0x1a8 │ │ strdeq ip, [r5, r0] │ │ - stc2l 15, cr9, [r2, #520]! @ 0x208 │ │ - stc2l 5, cr12, [r0, #120]! @ 0x78 │ │ - stc2l 2, cr10, [r0, #348]! @ 0x15c │ │ - stc2l 4, cr12, [r0, #968]! @ 0x3c8 │ │ + stc2l 15, cr9, [r2, #700]! @ 0x2bc │ │ + stc2l 5, cr12, [r0, #300]! @ 0x12c │ │ + stc2l 2, cr10, [r0, #528]! @ 0x210 │ │ + stc2l 5, cr12, [r0, #124]! @ 0x7c │ │ eorseq r7, r3, ip, ror #10 │ │ - stc2l 14, cr15, [r0, #772]! @ 0x304 │ │ + stc2l 14, cr15, [r0, #952]! @ 0x3b8 │ │ ldr r0, [pc, #4008] @ 2414eb0 │ │ mov r1, r4 │ │ ldr r2, [pc, #4004] @ 2414eb4 │ │ movw r3, #7094 @ 0x1bb6 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1257107,30 +1257106,30 @@ │ │ mov r0, r4 │ │ mov r1, r8 │ │ str r5, [sp, #20] │ │ bl 270e4a0 │ │ ldr r0, [pc, #3812] @ 2414ee4 │ │ add r0, pc, r0 │ │ b 2410630 │ │ - stc2l 7, cr4, [r0, #648]! @ 0x288 │ │ + stc2l 7, cr4, [r0, #828]! @ 0x33c │ │ ldr r1, [pc, #3800] @ 2414ee8 │ │ mov r0, r8 │ │ ldr r2, [pc, #3796] @ 2414eec │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ b 24132e8 │ │ - stc2l 12, cr1, [r2, #720]! @ 0x2d0 │ │ + stc2l 12, cr1, [r2, #900]! @ 0x384 │ │ orreq ip, r5, r4, lsr #12 │ │ - stc2l 14, cr5, [r2, #524]! @ 0x20c │ │ - stc2l 4, cr12, [r0, #328]! @ 0x148 │ │ + stc2l 14, cr5, [r2, #704]! @ 0x2c0 │ │ + stc2l 4, cr12, [r0, #508]! @ 0x1fc │ │ orrseq lr, r0, r0, asr #14 │ │ - stc2l 14, cr15, [r0, #132]! @ 0x84 │ │ + stc2l 14, cr15, [r0, #312]! @ 0x138 │ │ ldrdeq ip, [r5, r4] │ │ - stc2l 14, cr9, [r2, #408]! @ 0x198 │ │ - stc2l 4, cr12, [r0, #8]! │ │ + stc2l 14, cr9, [r2, #588]! @ 0x24c │ │ + stc2l 4, cr12, [r0, #188]! @ 0xbc │ │ ldr r0, [pc, #3748] @ 2414ef0 │ │ movw r3, #4659 @ 0x1233 │ │ ldr r2, [pc, #3744] @ 2414ef4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3732] @ 2414ef8 │ │ @@ -1257162,31 +1257161,31 @@ │ │ movw r3, #4662 @ 0x1236 │ │ ldr r2, [pc, #3652] @ 2414f14 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24136bc │ │ - stc2l 1, cr10, [r0, #236]! @ 0xec │ │ - stc2l 3, cr12, [r0, #856]! @ 0x358 │ │ + stc2l 1, cr10, [r0, #416]! @ 0x1a0 │ │ + stc2l 4, cr12, [r0, #12]! │ │ ldr r1, [pc, #3624] @ 2414f18 │ │ mov r0, r8 │ │ ldr r2, [pc, #3620] @ 2414f1c │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ b 24138cc │ │ eorseq r7, r3, r0, asr r4 │ │ - stc2l 13, cr15, [r0, #660]! @ 0x294 │ │ + stc2l 13, cr15, [r0, #840]! @ 0x348 │ │ ldr r1, [pc, #3600] @ 2414f20 │ │ mov r0, r8 │ │ ldr r2, [pc, #3596] @ 2414f24 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ b 2413c9c │ │ - stc2l 6, cr4, [r0, #536]! @ 0x218 │ │ + stc2l 6, cr4, [r0, #716]! @ 0x2cc │ │ eorseq r7, r3, r4, lsl r4 │ │ orreq r4, r8, r4, ror #25 │ │ eorseq r7, r3, r4, lsl #8 │ │ orreq r8, r8, r0, ror pc │ │ ldrshteq r7, [r3], -r4 │ │ orreq lr, r8, ip, lsl #14 │ │ eorseq r7, r3, r4, ror #7 │ │ @@ -1257224,17 +1257223,17 @@ │ │ ldr r6, [pc, #3512] @ 2414f7c │ │ ldr r7, [pc, #3512] @ 2414f80 │ │ ldr sl, [pc, #3512] @ 2414f84 │ │ add r6, pc, r6 │ │ add r7, pc, r7 │ │ add sl, pc, sl │ │ b 2414208 │ │ - stc2l 3, cr8, [r0, #948]! @ 0x3b4 │ │ - stc2l 15, cr13, [r1, #232]! @ 0xe8 │ │ - stc2l 12, cr15, [r0, #660]! @ 0x294 │ │ + stc2l 4, cr8, [r0, #104]! @ 0x68 │ │ + stc2l 15, cr13, [r1, #412]! @ 0x19c │ │ + stc2l 12, cr15, [r0, #840]! @ 0x348 │ │ ldr r4, [pc, #3860] @ 2415100 │ │ ldr r1, [pc, #3860] @ 2415104 │ │ add r4, pc, r4 │ │ add r1, pc, r1 │ │ mov r0, r4 │ │ bl 270e0b0 │ │ cmp r0, #0 │ │ @@ -1257242,15 +1257241,15 @@ │ │ ble 2414aa4 │ │ mov r1, #1 │ │ mov r5, #1 │ │ str r1, [r8] │ │ ldr r4, [pc, #3436] @ 2414f88 │ │ add r4, pc, r4 │ │ b 2414248 │ │ - stc2l 2, cr14, [r0, #8]! │ │ + stc2l 2, cr14, [r0, #188]! @ 0xbc │ │ @ instruction: 0x01874b98 │ │ orreq r4, r7, ip, ror lr │ │ strdeq r6, [r7, r0] │ │ ldrdeq r6, [r7, r8] │ │ orreq r8, r6, ip, lsr pc │ │ orreq r4, r7, r8, lsl #22 │ │ orreq r4, r7, ip, ror #27 │ │ @@ -1257330,16 +1257329,16 @@ │ │ str r3, [r1] │ │ bge 2414488 │ │ ldr r6, [pc, #3136] @ 2414fb4 │ │ sub r5, r0, #1 │ │ add r6, pc, r6 │ │ b 24143d4 │ │ orreq r3, r7, ip, lsl #21 │ │ - stc2l 7, cr3, [r2, #960]! @ 0x3c0 │ │ - stc2l 0, cr12, [r0, #984]! @ 0x3d8 │ │ + stc2l 8, cr3, [r2, #116]! @ 0x74 │ │ + stc2l 1, cr12, [r0, #140]! @ 0x8c │ │ orreq r3, r7, r4, lsr #20 │ │ ldr r0, [pc, #3128] @ 2414fcc │ │ movw r3, #2282 @ 0x8ea │ │ ldr r2, [pc, #3124] @ 2414fd0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1257360,19 +1257359,19 @@ │ │ sub sl, r1, #20 │ │ cmp sl, #2000 @ 0x7d0 │ │ bcs 241440c │ │ lsl r1, r0, #2 │ │ mov r0, sl │ │ b 2414440 │ │ orreq r4, r7, r0, ror #25 │ │ - stc2l 15, cr9, [r1, #824]! @ 0x338 │ │ - stc2l 0, cr12, [r0, #728]! @ 0x2d8 │ │ + stc2l 15, cr9, [r1, #1004]! @ 0x3ec │ │ + stc2l 0, cr12, [r0, #908]! @ 0x38c │ │ orreq r4, r7, r4, lsl ip │ │ stc2l 12, cr12, [r3, #104]! @ 0x68 │ │ - stc2l 0, cr12, [r0, #488]! @ 0x1e8 │ │ + stc2l 0, cr12, [r0, #668]! @ 0x29c │ │ ldr r0, [pc, #2980] @ 2414fb8 │ │ mov r1, sl │ │ ldr r2, [pc, #2976] @ 2414fbc │ │ movw r3, #2282 @ 0x8ea │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1257416,15 +1257415,15 @@ │ │ ldr r6, [pc, #2864] @ 2414ff4 │ │ add sl, pc, sl │ │ add r8, pc, r8 │ │ str r4, [r2, r1, lsl #2] │ │ add r6, pc, r6 │ │ b 24145f4 │ │ orreq r4, r7, ip, ror #22 │ │ - stc2l 6, cr1, [r2, #748]! @ 0x2ec │ │ + stc2l 6, cr1, [r2, #928]! @ 0x3a0 │ │ ldr r0, [pc, #2836] @ 2414ff8 │ │ movw r3, #2286 @ 0x8ee │ │ ldr r2, [pc, #2832] @ 2414ffc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r0, [r6, r0, lsl #2] │ │ @@ -1257444,26 +1257443,26 @@ │ │ add sl, pc, sl │ │ ldr r2, [pc, #2784] @ 2415018 │ │ add r8, pc, r8 │ │ add r6, pc, r6 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ b 24145f4 │ │ - stc2l 15, cr11, [r0, #520]! @ 0x208 │ │ + stc2l 15, cr11, [r0, #700]! @ 0x2bc │ │ orreq r4, r7, r0, ror #21 │ │ - stc2l 13, cr7, [r1, #928]! @ 0x3a0 │ │ - stc2l 15, cr11, [r0, #264]! @ 0x108 │ │ + stc2l 14, cr7, [r1, #84]! @ 0x54 │ │ + stc2l 15, cr11, [r0, #444]! @ 0x1bc │ │ orreq r6, r7, r8, ror #21 │ │ orreq r9, r8, r0, lsr #3 │ │ orreq pc, r7, ip, lsl #22 │ │ - stc2l 10, cr1, [r0, #52]! @ 0x34 @ │ │ - stc2l 14, cr11, [r0, #920]! @ 0x398 │ │ + stc2l 10, cr1, [r0, #232]! @ 0xe8 @ │ │ + stc2l 15, cr11, [r0, #76]! @ 0x4c │ │ orreq r3, r7, r0, lsl r8 │ │ orreq r1, sl, r0, asr #22 │ │ - stc2l 2, cr1, [r3, #432]! @ 0x1b0 │ │ + stc2l 2, cr1, [r3, #612]! @ 0x264 │ │ ldr r0, [pc, #2716] @ 241501c │ │ movw r3, #2286 @ 0x8ee │ │ ldr r2, [pc, #2712] @ 2415020 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #2700] @ 2415024 │ │ @@ -1257508,40 +1257507,40 @@ │ │ ldr r6, [pc, #2668] @ 24150a0 │ │ ldr r7, [pc, #2668] @ 24150a4 │ │ ldr sl, [pc, #2668] @ 24150a8 │ │ add r6, pc, r6 │ │ add r7, pc, r7 │ │ add sl, pc, sl │ │ b 24148ac │ │ - vcmla.f16 , q9, q5, #270 │ │ - stc2l 14, cr11, [r0, #408]! @ 0x198 │ │ + stc2l 8, cr9, [r2, #988]! @ 0x3dc │ │ + stc2l 14, cr11, [r0, #588]! @ 0x24c │ │ orrseq r1, r1, r0, ror #31 │ │ strdeq fp, [r5, r8] │ │ orrseq r2, r1, r8, lsl #15 │ │ orrseq r2, r1, r8, asr #30 │ │ orrseq r3, r1, r4, lsl #14 │ │ orreq fp, r5, r0, lsr #31 │ │ stc2l 9, cr12, [r3, #242]! @ 0xf2 @ │ │ - stc2l 13, cr11, [r0, #840]! @ 0x348 │ │ + stc2l 13, cr11, [r0, #1020]! @ 0x3fc │ │ orrseq r3, r1, r8, lsl #29 │ │ - stc2l 15, cr2, [r3, #752]! @ 0x2f0 │ │ - stc2l 5, cr1, [r2, #656]! @ 0x290 │ │ + stc2l 15, cr2, [r3, #932]! @ 0x3a4 │ │ + stc2l 5, cr1, [r2, #836]! @ 0x344 │ │ orreq fp, r5, r4, lsl pc │ │ - stc2l 7, cr5, [r2, #460]! @ 0x1cc │ │ - stc2l 13, cr11, [r0, #264]! @ 0x108 │ │ + stc2l 7, cr5, [r2, #640]! @ 0x280 │ │ + stc2l 13, cr11, [r0, #444]! @ 0x1bc │ │ orrseq lr, r0, r0, lsr r0 │ │ - stc2l 7, cr15, [r0, #68]! @ 0x44 │ │ + stc2l 7, cr15, [r0, #248]! @ 0xf8 │ │ orreq fp, r5, r4, asr #29 │ │ - stc2l 7, cr9, [r2, #344]! @ 0x158 │ │ - stc2l 12, cr11, [r0, #968]! @ 0x3c8 │ │ - stc2l 10, cr9, [r0, #172]! @ 0xac @ │ │ - stc2l 12, cr11, [r0, #792]! @ 0x318 │ │ + stc2l 7, cr9, [r2, #524]! @ 0x20c │ │ + stc2l 13, cr11, [r0, #124]! @ 0x7c │ │ + stc2l 10, cr9, [r0, #352]! @ 0x160 @ │ │ + stc2l 12, cr11, [r0, #972]! @ 0x3cc │ │ eorseq r6, r3, r0, asr #26 │ │ - stc2l 6, cr15, [r0, #596]! @ 0x254 │ │ - stc2l 15, cr3, [r0, #472]! @ 0x1d8 │ │ + stc2l 6, cr15, [r0, #776]! @ 0x308 │ │ + stc2l 15, cr3, [r0, #652]! @ 0x28c │ │ mov r0, r6 │ │ mov r1, r4 │ │ bl 270e0b0 │ │ cmp r0, #0 │ │ str r0, [r6] │ │ ble 2414614 │ │ sub r1, r0, #1 │ │ @@ -1257727,40 +1257726,40 @@ │ │ ldr r9, [pc, #1876] @ 24150f4 │ │ ldr r8, [pc, #1876] @ 24150f8 │ │ ldr r7, [pc, #1876] @ 24150fc │ │ add r9, pc, r9 │ │ add r8, pc, r8 │ │ add r7, pc, r7 │ │ b 24141fc │ │ - stc2l 2, cr3, [r2] │ │ - stc2l 11, cr11, [r0, #24]! @ │ │ + stc2l 2, cr3, [r2, #180]! @ 0xb4 │ │ + stc2l 11, cr11, [r0, #204]! @ 0xcc @ │ │ orreq r3, r7, r4, lsr r4 │ │ strdeq r4, [r7, r0] │ │ - stc2l 9, cr9, [r1, #444]! @ 0x1bc @ │ │ - stc2l 10, cr11, [r0, #792]! @ 0x318 @ │ │ + stc2l 10, cr9, [r1, #44]! @ 0x2c @ │ │ + stc2l 10, cr11, [r0, #972]! @ 0x3cc @ │ │ orreq r4, r7, r4, lsr #12 │ │ stc2l 6, cr12, [r3, #168]! @ 0xa8 │ │ - stc2l 10, cr11, [r0, #552]! @ 0x228 @ │ │ + stc2l 10, cr11, [r0, #732]! @ 0x2dc @ │ │ orreq sp, r8, r8, lsl fp │ │ orreq r6, r7, r4, lsr #12 │ │ orreq r6, r7, r4, lsr #12 │ │ orreq fp, r5, r0, lsl #24 │ │ orreq sp, r8, r4, lsl #28 │ │ ldrdeq r6, [r7, r8] │ │ orreq r4, r7, ip, ror r5 │ │ - stc2l 0, cr1, [r2, #876]! @ 0x36c │ │ - stc2l 9, cr11, [r0, #324]! @ 0x144 @ │ │ + stc2l 1, cr1, [r2, #32]! │ │ + stc2l 9, cr11, [r0, #414]! @ 0x19e @ │ │ orreq r4, r7, r0, lsl #10 │ │ - vcmla.f16 d23, d1, d8, #270 │ │ - stc2l 9, cr11, [r0, #196]! @ 0xc4 @ │ │ + stc2l 8, cr7, [r1, #212]! @ 0xd4 │ │ + stc2l 9, cr11, [r0, #286]! @ 0x11e @ │ │ orreq r6, r7, r8, lsl #10 │ │ orreq r8, r8, r4, asr #23 │ │ orreq pc, r7, r8, lsr #10 │ │ - stc2l 4, cr1, [r0, #180]! @ 0xb4 │ │ - stc2l 9, cr11, [r0, #12]! @ │ │ + stc2l 4, cr1, [r0, #360]! @ 0x168 │ │ + stc2l 9, cr11, [r0, #102]! @ 0x66 @ │ │ orreq r1, sl, r8, ror #10 │ │ orreq r3, r7, r4, lsr #4 │ │ ldr r0, [pc, #1288] @ 2414f34 │ │ ldr r1, [pc, #1288] @ 2414f38 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270e0a0 │ │ @@ -1257973,36 +1257972,36 @@ │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270da90 │ │ ldr r0, [pc, #1004] @ 2415170 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ b 2414d0c │ │ - stc2l 14, cr2, [r2, #208]! @ 0xd0 │ │ - stc2l 7, cr11, [r0, #232]! @ 0xe8 │ │ + stc2l 14, cr2, [r2, #388]! @ 0x184 │ │ + stc2l 7, cr11, [r0, #412]! @ 0x19c │ │ orreq r3, r7, r8, rrx │ │ orreq r4, r7, r4, lsr #6 │ │ - stc2l 6, cr9, [r1, #72]! @ 0x48 │ │ + stc2l 6, cr9, [r1, #252]! @ 0xfc │ │ ldr r0, [pc, #980] @ 241517c │ │ mov r1, #100 @ 0x64 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #968] @ 2415180 │ │ mov r2, #1 │ │ ldr r1, [fp, #32] │ │ add r0, pc, r0 │ │ bl 270da80 │ │ ldr r0, [pc, #952] @ 2415184 │ │ mov r1, #23 │ │ add r0, pc, r0 │ │ b 2414d0c │ │ - stc2l 6, cr11, [r0, #1000]! @ 0x3e8 │ │ + stc2l 7, cr11, [r0, #156]! @ 0x9c │ │ orreq r4, r7, r8, asr r2 │ │ stc2l 2, cr12, [r3, #376]! @ 0x178 │ │ - stc2l 6, cr11, [r0, #760]! @ 0x2f8 │ │ + stc2l 6, cr11, [r0, #940]! @ 0x3ac │ │ ldr r0, [pc, #932] @ 2415190 │ │ mov r1, #116 @ 0x74 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #920] @ 2415194 │ │ mov r2, #1 │ │ ldr r1, [fp, #32] │ │ @@ -1258046,40 +1258045,40 @@ │ │ mov r2, #1 │ │ add r1, pc, r1 │ │ bl 270da90 │ │ ldr r0, [pc, #784] @ 24151b8 │ │ mov r1, #22 │ │ add r0, pc, r0 │ │ b 2414d0c │ │ - stc2l 12, cr0, [r2, #988]! @ 0x3dc │ │ - stc2l 5, cr11, [r0, #760]! @ 0x2f8 │ │ + stc2l 13, cr0, [r2, #144]! @ 0x90 │ │ + stc2l 5, cr11, [r0, #940]! @ 0x3ac │ │ orreq r4, r7, ip, lsl r1 │ │ - stc2l 4, cr7, [r1, #144]! @ 0x90 │ │ - stc2l 5, cr11, [r0, #504]! @ 0x1f8 │ │ + stc2l 4, cr7, [r1, #324]! @ 0x144 │ │ + stc2l 5, cr11, [r0, #684]! @ 0x2ac │ │ orreq r6, r7, r0, lsr #2 │ │ ldrdeq r8, [r8, r8] │ │ orreq pc, r7, r4, asr #2 │ │ - stc2l 0, cr1, [r0, #276]! @ 0x114 │ │ - stc2l 5, cr11, [r0, #120]! @ 0x78 │ │ + stc2l 0, cr1, [r0, #456]! @ 0x1c8 │ │ + stc2l 5, cr11, [r0, #300]! @ 0x12c │ │ orreq r2, r7, r4, asr #28 │ │ orreq r1, sl, r8, ror r1 │ │ orreq sp, r7, r4, lsr #3 │ │ - stc2l 10, cr14, [r2, #380]! @ 0x17c @ │ │ + stc2l 10, cr14, [r2, #560]! @ 0x230 @ │ │ ldrdeq r3, [r7, r4] │ │ strheq r4, [r7, r8] │ │ - stc2l 7, cr5, [r0, #940]! @ 0x3ac │ │ - stc2l 4, cr11, [r0, #504]! @ 0x1f8 │ │ + stc2l 8, cr5, [r0, #96]! @ 0x60 │ │ + stc2l 4, cr11, [r0, #684]! @ 0x2ac │ │ orrseq r1, r1, r8, asr #27 │ │ orreq fp, r5, r0, lsl r6 │ │ - stc2l 14, cr4, [r2, #472]! @ 0x1d8 │ │ - stc2l 4, cr11, [r0, #248]! @ 0xf8 │ │ + stc2l 14, cr4, [r2, #652]! @ 0x28c │ │ + stc2l 4, cr11, [r0, #428]! @ 0x1ac │ │ orrseq r2, r1, r8, asr r5 │ │ ldrdeq fp, [r5, r0] │ │ - stc2l 14, cr14, [r0, #564]! @ 0x234 │ │ - stc2l 4, cr11, [r0, #8]! │ │ + stc2l 14, cr14, [r0, #744]! @ 0x2e8 │ │ + stc2l 4, cr11, [r0, #188]! @ 0xbc │ │ strdeq r3, [r7, r4] │ │ ldrdeq r3, [r7, r8] │ │ ldrdeq r3, [r7, r4] │ │ @ instruction: 0x01873fb8 │ │ orreq r7, r6, r8, ror #1 │ │ orreq r3, r8, ip, ror #25 │ │ orreq r4, r5, ip, ror #30 │ │ @@ -1258098,161 +1258097,161 @@ │ │ orreq r7, r6, r0, asr #1 │ │ orreq r3, r8, r4, asr #25 │ │ orreq r4, r5, r8, asr #30 │ │ orreq r3, r7, r0, asr #30 │ │ orreq r5, r8, r8, ror #28 │ │ ldrdeq r5, [r7, r4] │ │ orreq r5, r7, r8, lsr #29 │ │ - stc2l 2, cr9, [r1, #16]! │ │ - stc2l 3, cr11, [r0, #8]! │ │ - stc2l 13, cr6, [r2, #932]! @ 0x3a4 │ │ + stc2l 2, cr9, [r1, #196]! @ 0xc4 │ │ + stc2l 3, cr11, [r0, #188]! @ 0xbc │ │ + stc2l 14, cr6, [r2, #88]! @ 0x58 │ │ orreq r7, r8, ip, ror #25 │ │ orreq r3, r7, r4, asr lr │ │ strdeq r5, [r7, r0] │ │ orreq r3, r7, ip, lsl lr │ │ @ instruction: 0x01875dbc │ │ orreq r3, r7, r8, asr #27 │ │ orreq r3, r7, r0, lsr #27 │ │ orreq r7, r8, r0, lsl ip │ │ orreq r5, r7, r4, lsr sp │ │ orreq r5, r7, r0, lsr sp │ │ orreq r5, r7, ip, lsl sp │ │ - stc2l 15, cr8, [r1, #720]! @ 0x2d0 │ │ - stc2l 0, cr11, [r0, #712]! @ 0x2c8 │ │ + stc2l 15, cr8, [r1, #900]! @ 0x384 │ │ + stc2l 0, cr11, [r0, #892]! @ 0x37c │ │ @ instruction: 0x01873cb4 │ │ orreq r5, r7, r8, asr ip │ │ orreq r5, r8, ip, asr #23 │ │ - stc2l 0, cr9, [r1, #224]! @ 0xe0 │ │ - stc2l 1, cr11, [r0, #216]! @ 0xd8 │ │ + stc2l 0, cr9, [r1, #404]! @ 0x194 │ │ + stc2l 1, cr11, [r0, #396]! @ 0x18c │ │ orreq r5, r7, r4, ror #25 │ │ orreq r3, r7, ip, lsr #26 │ │ orreq r5, r8, r8, asr ip │ │ ldrdeq r7, [r8, r4] │ │ orreq r5, r8, r8, ror #22 │ │ @ instruction: 0x01883db0 │ │ orreq lr, r7, r8, lsl #24 │ │ orreq r5, r7, r4, asr #23 │ │ @ instruction: 0x0185b1bc │ │ - stc2l 11, cr6, [r2, #100]! @ 0x64 @ │ │ - stc2l 15, cr10, [r0, #920]! @ 0x398 │ │ + stc2l 11, cr6, [r2, #280]! @ 0x118 @ │ │ + stc2l 0, cr11, [r0, #76]! @ 0x4c │ │ orreq r3, r7, r0, ror #23 │ │ strdeq r5, [r8, ip] │ │ orreq r3, r8, r4, asr #26 │ │ @ instruction: 0x0187eb9c │ │ orreq r5, r7, r4, asr fp │ │ orreq fp, r5, r0, asr r1 │ │ orreq r7, r8, ip, lsl sl │ │ - stc2l 10, cr6, [r2, #500]! @ 0x1f4 @ │ │ - stc2l 15, cr10, [r0, #296]! @ 0x128 │ │ + stc2l 10, cr6, [r2, #680]! @ 0x2a8 @ │ │ + stc2l 15, cr10, [r0, #476]! @ 0x1dc │ │ orreq r7, r8, r4, asr #19 │ │ orreq r3, r7, r0, asr #22 │ │ - stc2l 15, cr10, [r0, #120]! @ 0x78 │ │ - stc2l 15, cr10, [r0, #72]! @ 0x48 │ │ + stc2l 15, cr10, [r0, #300]! @ 0x12c │ │ + stc2l 15, cr10, [r0, #252]! @ 0xfc │ │ orreq r5, r8, r0, asr #20 │ │ orreq r3, r8, r8, lsl #25 │ │ orreq lr, r7, r0, ror #21 │ │ @ instruction: 0x01875a9c │ │ @ instruction: 0x0185b098 │ │ @ instruction: 0x0188d29c │ │ ldrdeq r7, [r8, ip] │ │ - stc2l 5, cr0, [r2, #156]! @ 0x9c │ │ - stc2l 13, cr10, [r0, #952]! @ 0x3b8 │ │ + stc2l 5, cr0, [r2, #336]! @ 0x150 │ │ + stc2l 14, cr10, [r0, #108]! @ 0x6c │ │ orreq sl, r5, r0, lsl #31 │ │ stc2l 9, cr11, [r3, #148]! @ 0x94 @ │ │ - stc2l 13, cr10, [r0, #680]! @ 0x2a8 │ │ + stc2l 13, cr10, [r0, #860]! @ 0x35c │ │ orreq ip, r8, r0, asr #28 │ │ orreq r5, r7, ip, asr #18 │ │ orreq r5, r7, ip, lsr #18 │ │ orreq r3, r7, r4, ror #18 │ │ strdeq sl, [r5, ip] │ │ - stc2l 13, cr10, [r0, #232]! @ 0xe8 │ │ - stc2l 13, cr10, [r0, #184]! @ 0xb8 │ │ + stc2l 13, cr10, [r0, #412]! @ 0x19c │ │ + stc2l 13, cr10, [r0, #364]! @ 0x16c │ │ orreq r7, r8, ip, lsr #18 │ │ orreq r3, r7, r8, lsl #18 │ │ - stc2l 12, cr10, [r0, #920]! @ 0x398 │ │ - stc2l 12, cr10, [r0, #872]! @ 0x368 │ │ + stc2l 13, cr10, [r0, #76]! @ 0x4c │ │ + stc2l 13, cr10, [r0, #28]! │ │ orreq r3, r8, r0, ror #20 │ │ @ instruction: 0x018738b4 │ │ @ instruction: 0x0187389c │ │ orreq r3, r7, r8, asr #21 │ │ orreq r5, r7, r8, lsr sl │ │ - stc2l 13, cr8, [r1, #592]! @ 0x250 │ │ - stc2l 14, cr10, [r0, #584]! @ 0x248 │ │ - stc2l 12, cr10, [r0, #328]! @ 0x148 │ │ - stc2l 12, cr10, [r0, #280]! @ 0x118 │ │ + stc2l 13, cr8, [r1, #772]! @ 0x304 │ │ + stc2l 14, cr10, [r0, #764]! @ 0x2fc │ │ + stc2l 12, cr10, [r0, #508]! @ 0x1fc │ │ + stc2l 12, cr10, [r0, #460]! @ 0x1cc │ │ orreq r5, r7, ip, asr #15 │ │ - stc2l 11, cr8, [r1, #160]! @ 0xa0 @ │ │ + stc2l 11, cr8, [r1, #340]! @ 0x154 @ │ │ orreq r3, r7, r4, lsr #16 │ │ - stc2l 10, cr10, [r1, #744]! @ 0x2e8 @ │ │ + stc2l 10, cr10, [r1, #924]! @ 0x39c @ │ │ @ instruction: 0x0188559c │ │ @ instruction: 0x01875798 │ │ @ instruction: 0x0190bef8 │ │ orreq r5, r7, r0, ror r7 │ │ orreq r4, r5, r4, lsr #15 │ │ orreq r3, r7, r0, lsr #15 │ │ @ instruction: 0x01873794 │ │ orreq r3, r8, r8, asr #11 │ │ orreq r4, r5, r8, ror r7 │ │ orreq r3, r7, ip, ror #14 │ │ @ instruction: 0x01883594 │ │ orreq r3, r7, r8, asr #14 │ │ orreq r5, r8, r4, ror r6 │ │ orreq r5, r7, r0, ror #13 │ │ - stc2l 10, cr8, [r1, #144]! @ 0x90 @ │ │ + stc2l 10, cr8, [r1, #324]! @ 0x144 @ │ │ strdeq r3, [r7, r4] │ │ orreq r3, r8, r8, lsr #26 │ │ orrseq r7, r1, r4, ror r7 │ │ - stc2l 10, cr2, [r1, #916]! @ 0x394 @ │ │ - stc2l 5, cr8, [r0, #628]! @ 0x274 │ │ - stc2l 2, cr14, [r0, #724]! @ 0x2d4 │ │ - stc2l 5, cr8, [r0, #880]! @ 0x370 │ │ + stc2l 11, cr2, [r1, #72]! @ 0x48 @ │ │ + stc2l 5, cr8, [r0, #808]! @ 0x328 │ │ + stc2l 2, cr14, [r0, #904]! @ 0x388 │ │ + stc2l 6, cr8, [r0, #36]! @ 0x24 │ │ orrseq r7, r1, r0, asr r7 │ │ - stc2l 1, cr0, [r2, #652]! @ 0x28c │ │ - stc2l 9, cr6, [r0, #128]! @ 0x80 @ │ │ - stc2l 2, cr14, [r0, #500]! @ 0x1f4 │ │ + stc2l 1, cr0, [r2, #832]! @ 0x340 │ │ + stc2l 9, cr6, [r0, #218]! @ 0xda @ │ │ + stc2l 2, cr14, [r0, #680]! @ 0x2a8 │ │ strdeq r3, [r7, r0] │ │ orrseq r7, r1, r0, ror #11 │ │ - stc2l 13, cr13, [r2, #152]! @ 0x98 │ │ + stc2l 13, cr13, [r2, #332]! @ 0x14c │ │ orrseq r7, r1, ip, lsr #14 │ │ - stc2l 15, cr13, [r2, #40]! @ 0x28 │ │ - stc2l 3, cr0, [r0, #448]! @ 0x1c0 │ │ - stc2l 2, cr14, [r0, #132]! @ 0x84 │ │ + stc2l 15, cr13, [r2, #220]! @ 0xdc │ │ + stc2l 3, cr0, [r0, #628]! @ 0x274 │ │ + stc2l 2, cr14, [r0, #312]! @ 0x138 │ │ ldrdeq pc, [r7, r0] │ │ orreq r3, r7, r8, ror r3 │ │ @ instruction: 0x018806b0 │ │ orrseq r7, r1, r8, lsl #14 │ │ stc2l 5, cr11, [r3, #352]! @ 0x160 │ │ stc2l 7, cr9, [r3, #344]! @ 0x158 │ │ - stc2l 1, cr14, [r0, #516]! @ 0x204 │ │ + stc2l 1, cr14, [r0, #696]! @ 0x2b8 │ │ orrseq r6, r1, ip, asr #30 │ │ - stc2l 3, cr10, [r2] │ │ + stc2l 3, cr10, [r2, #180]! @ 0xb4 │ │ ldrdeq r3, [r7, r0] │ │ - stc2l 12, cr13, [r2, #776]! @ 0x308 │ │ + stc2l 12, cr13, [r2, #956]! @ 0x3bc │ │ orrseq r7, r1, r4, ror #13 │ │ - ldc2l 3, cr14, [pc, #260] @ 2415284 │ │ - stc2l 10, cr15, [r2, #376]! @ 0x178 @ │ │ - stc2l 1, cr14, [r0, #20]! │ │ - stc2l 13, cr1, [r2, #296]! @ 0x128 │ │ + ldc2l 3, cr14, [pc, #440] @ 2415338 │ │ + stc2l 10, cr15, [r2, #556]! @ 0x22c @ │ │ + stc2l 1, cr14, [r0, #200]! @ 0xc8 │ │ + stc2l 13, cr1, [r2, #476]! @ 0x1dc │ │ orrseq r7, r1, r0, asr #13 │ │ - stc2l 1, cr0, [r2, #196]! @ 0xc4 │ │ - stc2l 7, cr2, [r1, #796]! @ 0x31c │ │ - stc2l 0, cr14, [r0, #772]! @ 0x304 │ │ - stc2l 3, cr8, [r0, #1020]! @ 0x3fc │ │ + stc2l 1, cr0, [r2, #376]! @ 0x178 │ │ + stc2l 7, cr2, [r1, #976]! @ 0x3d0 │ │ + stc2l 0, cr14, [r0, #952]! @ 0x3b8 │ │ + stc2l 4, cr8, [r0, #176]! @ 0xb0 │ │ @ instruction: 0x0191769c │ │ - vcmla.f16 q12, , , #270 │ │ - stc2l 12, cr1, [r2, #968]! @ 0x3c8 │ │ - stc2l 0, cr14, [r0, #452]! @ 0x1c4 │ │ + stc2l 8, cr8, [r1, #464]! @ 0x1d0 │ │ + stc2l 13, cr1, [r2, #124]! @ 0x7c │ │ + stc2l 0, cr14, [r0, #632]! @ 0x278 │ │ orrseq r6, r1, ip, lsr lr │ │ orrseq r7, r1, r4, asr r4 │ │ orreq r3, r7, ip, lsr #3 │ │ - stc2l 7, cr5, [r3, #48]! @ 0x30 │ │ - stc2l 10, cr1, [r3, #620]! @ 0x26c @ │ │ - stc2l 3, cr14, [r0, #20]! │ │ + stc2l 7, cr5, [r3, #228]! @ 0xe4 │ │ + stc2l 10, cr1, [r3, #800]! @ 0x320 @ │ │ + stc2l 3, cr14, [r0, #200]! @ 0xc8 │ │ orrseq r7, r1, r0, asr r6 │ │ - stc2l 4, cr10, [r2, #552]! @ 0x228 │ │ + stc2l 4, cr10, [r2, #732]! @ 0x2dc │ │ │ │ 024151cc : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 24151e8 │ │ @@ -1258268,16 +1258267,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - stc2l 13, cr13, [r1, #436]! @ 0x1b4 │ │ - stc2l 2, cr5, [r3, #356]! @ 0x164 │ │ + stc2l 13, cr13, [r1, #616]! @ 0x268 │ │ + stc2l 2, cr5, [r3, #536]! @ 0x218 │ │ │ │ 02415228 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #104 @ 0x68 │ │ mov r3, #0 │ │ str r2, [sp, #84] @ 0x54 │ │ @@ -1258768,17 +1258767,17 @@ │ │ bl 270e330 │ │ ldr r0, [pc, #24] @ 2415998 │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 6, cr7, [r2, #40]! @ 0x28 │ │ - stc2l 7, cr7, [r0, #584]! @ 0x248 │ │ - stc2l 5, cr7, [r2, #808]! @ 0x328 │ │ + stc2l 6, cr7, [r2, #220]! @ 0xdc │ │ + stc2l 7, cr7, [r0, #764]! @ 0x2fc │ │ + stc2l 5, cr7, [r2, #988]! @ 0x3dc │ │ │ │ 0241599c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #148 @ 0x94 │ │ mov r8, r3 │ │ mov sl, r2 │ │ @@ -1259753,15 +1259752,15 @@ │ │ mov r3, r6 │ │ add r0, pc, r0 │ │ bl 270d9f0 │ │ ldr r0, [pc, #4068] @ 24178c8 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ b 2417d18 │ │ - stc2l 3, cr11, [r2, #968]! @ 0x3c8 │ │ + stc2l 4, cr11, [r2, #124]! @ 0x7c │ │ cmp r0, #0 │ │ bne 2419eec │ │ ldr r0, [pc, #4044] @ 24178cc │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce20 │ │ ldr r5, [pc, #4084] @ 2417904 │ │ @@ -1259842,29 +1259841,29 @@ │ │ ldr r0, [pc, #3844] @ 2417940 │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ @ instruction: 0x0191bafc │ │ eorseq lr, r3, r4, asr #15 │ │ @ instruction: 0x0191be94 │ │ orrseq sl, r6, ip, lsr #12 │ │ - stc2l 6, cr7, [r0, #440]! @ 0x1b8 │ │ - stc2l 10, cr9, [r0, #328]! @ 0x148 @ │ │ - stc2l 3, cr11, [r2, #376]! @ 0x178 │ │ - ldc2l 3, cr13, [pc, #776] @ 2416d6c │ │ + stc2l 6, cr7, [r0, #620]! @ 0x26c │ │ + stc2l 10, cr9, [r0, #508]! @ 0x1fc @ │ │ + stc2l 3, cr11, [r2, #556]! @ 0x22c │ │ + ldc2l 3, cr13, [pc, #956] @ 2416e20 │ │ orrseq fp, r1, ip, asr #20 │ │ eorseq lr, r3, r4, lsl r7 │ │ orrseq fp, r1, r4, ror #27 │ │ orrseq sl, r6, ip, ror r5 │ │ @ instruction: 0x0196f394 │ │ orrseq r5, r2, r0, lsr sl │ │ @ instruction: 0x0191b9f8 │ │ @ instruction: 0x01916bb0 │ │ orrseq fp, r1, r0, lsl #27 │ │ - ldc2l 3, cr13, [pc, #172] @ 2416b38 │ │ - stc2l 9, cr4, [r3, #120]! @ 0x78 @ │ │ + ldc2l 3, cr13, [pc, #352] @ 2416bec │ │ + stc2l 9, cr4, [r3, #210]! @ 0xd2 @ │ │ @ instruction: 0x019259b0 │ │ cmp r0, #0 │ │ bne 2419eec │ │ ldr r0, [pc, #3748] @ 2417944 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce20 │ │ @@ -1259942,38 +1259941,38 @@ │ │ ldr r0, [pc, #3996] @ 2417b68 │ │ mov r1, #22 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3984] @ 2417b6c │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ - stc2l 11, cr0, [r3, #40]! @ 0x28 @ │ │ - stc2l 2, cr13, [r0, #788]! @ 0x314 │ │ - stc2l 10, cr1, [r1, #448]! @ 0x1c0 @ │ │ - stc2l 12, cr3, [r0, #116]! @ 0x74 │ │ + stc2l 11, cr0, [r3, #220]! @ 0xdc @ │ │ + stc2l 2, cr13, [r0, #968]! @ 0x3c8 │ │ + stc2l 10, cr1, [r1, #628]! @ 0x274 @ │ │ + stc2l 12, cr3, [r0, #296]! @ 0x128 │ │ orrseq fp, r1, r4, lsl #18 │ │ eorseq lr, r3, ip, asr #11 │ │ @ instruction: 0x0191bc9c │ │ orrseq sl, r6, r4, lsr r4 │ │ orrseq r5, r2, ip, ror #17 │ │ @ instruction: 0x019258dc │ │ stc2l 3, cr10, [r3, #976]! @ 0x3d0 │ │ - stc2l 1, cr13, [r0, #1012]! @ 0x3f4 │ │ - stc2l 6, cr3, [r1, #660]! @ 0x294 │ │ - stc2l 11, cr3, [r0, #420]! @ 0x1a4 @ │ │ - stc2l 3, cr9, [r2, #580]! @ 0x244 │ │ + stc2l 2, cr13, [r0, #168]! @ 0xa8 │ │ + stc2l 6, cr3, [r1, #840]! @ 0x348 │ │ + stc2l 11, cr3, [r0, #600]! @ 0x258 @ │ │ + stc2l 3, cr9, [r2, #760]! @ 0x2f8 │ │ orrseq fp, r1, r8, lsr r8 │ │ eorseq lr, r3, r0, lsl #10 │ │ @ instruction: 0x0191bbd0 │ │ orrseq sl, r6, r8, ror #6 │ │ orrseq fp, r1, r8, lsr #23 │ │ @ instruction: 0x01969ddc │ │ - stc2l 4, cr7, [r0, #808]! @ 0x328 │ │ - stc2l 6, cr7, [r1, #356]! @ 0x164 │ │ - stc2l 7, cr9, [r0, #328]! @ 0x148 │ │ + stc2l 4, cr7, [r0, #988]! @ 0x3dc │ │ + stc2l 6, cr7, [r1, #536]! @ 0x218 │ │ + stc2l 7, cr9, [r0, #508]! @ 0x1fc │ │ cmp r0, #0 │ │ bne 2419eec │ │ ldr r7, [pc, #4016] @ 2417c00 │ │ add r7, pc, r7 │ │ ldrb r0, [r7] │ │ cmp r0, #0 │ │ bne 2416cb0 │ │ @@ -1260061,25 +1260060,25 @@ │ │ bl 270da90 │ │ ldr r0, [pc, #4040] @ 2417d74 │ │ mov r1, #22 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ b 2419ee4 │ │ - stc2l 7, cr9, [r0, #152]! @ 0x98 │ │ + stc2l 7, cr9, [r0, #332]! @ 0x14c │ │ orrseq pc, r6, ip, asr #2 │ │ orrseq pc, r6, r8, lsl r1 @ │ │ - stc2l 3, cr7, [r0, #92]! @ 0x5c │ │ + stc2l 3, cr7, [r0, #272]! @ 0x110 │ │ orrseq sl, r6, ip, lsl #5 │ │ orrseq sl, r6, r4, lsr r2 │ │ orrseq r9, r6, r8, lsr #26 │ │ orrseq sl, r6, r4, asr r2 │ │ ldrsbeq pc, [r6, ip] @ │ │ - stc2l 2, cr9, [r2, #116]! @ 0x74 │ │ - stc2l 4, cr7, [r0, #116]! @ 0x74 │ │ + stc2l 2, cr9, [r2, #296]! @ 0x128 │ │ + stc2l 4, cr7, [r0, #296]! @ 0x128 │ │ orrseq fp, r1, r8, lsr #13 │ │ eorseq lr, r3, r0, ror r3 │ │ orrseq fp, r1, r0, asr #20 │ │ ldr r1, [pc, #3964] @ 2417d78 │ │ ldr r4, [fp, #8] │ │ add r1, pc, r1 │ │ mov r0, r4 │ │ @@ -1260128,16 +1260127,16 @@ │ │ cmp r1, #0 │ │ bne 2417c38 │ │ cmp r0, #0 │ │ bgt 2416e60 │ │ b 2417c38 │ │ @ instruction: 0x0196a1d8 │ │ orrseq sl, r6, r0, asr #3 │ │ - stc2l 3, cr7, [r0, #756]! @ 0x2f4 │ │ - stc2l 1, cr9, [r2, #560]! @ 0x230 │ │ + stc2l 3, cr7, [r0, #936]! @ 0x3a8 │ │ + stc2l 1, cr9, [r2, #740]! @ 0x2e4 │ │ orrseq fp, r1, ip, lsr #12 │ │ ldr r0, [pc, #3964] @ 2417e58 │ │ mov r1, #292 @ 0x124 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3952] @ 2417e5c │ │ mov r2, #1 │ │ @@ -1260171,30 +1260170,30 @@ │ │ ldr r0, [pc, #4036] @ 2417f24 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4092] @ 2417f6c │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ - ldc2l 1, cr15, [pc, #172] @ 2417028 │ │ - stc2l 15, cr12, [r0, #196]! @ 0xc4 │ │ - stc2l 13, cr14, [r1, #520]! @ 0x208 │ │ - stc2l 0, cr9, [r2, #912]! @ 0x390 │ │ - stc2l 6, cr4, [r3, #68]! @ 0x44 │ │ + ldc2l 1, cr15, [pc, #352] @ 24170dc │ │ + stc2l 15, cr12, [r0, #376]! @ 0x178 │ │ + stc2l 13, cr14, [r1, #700]! @ 0x2bc │ │ + stc2l 1, cr9, [r2, #68]! @ 0x44 │ │ + stc2l 6, cr4, [r3, #248]! @ 0xf8 │ │ orrseq fp, r1, r8, ror #10 │ │ eorseq lr, r3, r0, lsr r2 │ │ orrseq fp, r1, r0, lsl #18 │ │ @ instruction: 0x0196a098 │ │ - stc2l 13, cr0, [r0, #924]! @ 0x39c │ │ - stc2l 13, cr0, [r0, #780]! @ 0x30c │ │ + stc2l 14, cr0, [r0, #80]! @ 0x50 │ │ + stc2l 13, cr0, [r0, #960]! @ 0x3c0 │ │ @ instruction: 0x0196ee9c │ │ orrseq lr, r6, r0, lsl #29 │ │ orrseq r5, r2, r0, lsr #9 │ │ orrseq r9, r6, r0, asr sl │ │ - stc2l 14, cr2, [r2, #160]! @ 0xa0 │ │ + stc2l 14, cr2, [r2, #340]! @ 0x154 │ │ orrseq r9, r6, r8, ror pc │ │ eorseq lr, r3, r0, lsl r1 │ │ @ instruction: 0x0191b7b4 │ │ ldr r4, [pc, #4064] @ 2417fa8 │ │ mov r1, #0 │ │ ldr r2, [pc, #4060] @ 2417fac │ │ ldr r0, [pc, #4060] @ 2417fb0 │ │ @@ -1260290,18 +1260289,18 @@ │ │ cmp r1, r5 │ │ bhi 24192f8 │ │ ldr r2, [pc, #3932] @ 24180a0 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ b 2419330 │ │ stc2l 2, cr8, [r3, #424]! @ 0x1a8 │ │ - stc2l 3, cr9, [r0, #552]! @ 0x228 │ │ + stc2l 3, cr9, [r0, #732]! @ 0x2dc │ │ orrseq lr, r6, r8, lsl #27 │ │ orrseq lr, r6, r4, asr sp │ │ - stc2l 15, cr6, [r0, #332]! @ 0x14c │ │ + stc2l 15, cr6, [r0, #512]! @ 0x200 │ │ orrseq r9, r6, ip, asr #29 │ │ ldr r0, [pc, #3896] @ 24180a4 │ │ mov r1, #59 @ 0x3b │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #3884] @ 24180a8 │ │ mov r2, #1 │ │ @@ -1260321,15 +1260320,15 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #3832] @ 24180b4 │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ orrseq r9, r6, r4, ror lr │ │ @ instruction: 0x01969e98 │ │ orrseq lr, r6, r0, lsr #26 │ │ - stc2l 3, cr4, [r3, #692]! @ 0x2b4 │ │ + stc2l 3, cr4, [r3, #872]! @ 0x368 │ │ mov r0, #1 │ │ str r0, [sl] │ │ ldr r0, [pc, #3800] @ 24180b8 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ @@ -1260348,17 +1260347,17 @@ │ │ ldr r1, [r3, r1, lsl #2] │ │ cmp r1, #1 │ │ bne 24177bc │ │ ldr r1, [pc, #3736] @ 24180c8 │ │ mov r3, #4 │ │ add r1, pc, r1 │ │ b 24177c8 │ │ - stc2l 6, cr14, [r2, #324]! @ 0x144 │ │ - stc2l 2, cr4, [r3, #20]! │ │ - stc2l 7, cr12, [r2, #880]! @ 0x370 │ │ + stc2l 6, cr14, [r2, #504]! @ 0x1f8 │ │ + stc2l 2, cr4, [r3, #200]! @ 0xc8 │ │ + vcmla.f16 d28, d2, d9, #270 │ │ mov r0, #1 │ │ str r0, [r8] │ │ ldr r1, [pc, #3704] @ 24180cc │ │ mov r0, #3 │ │ ldr r2, [pc, #3700] @ 24180d0 │ │ ldr r3, [pc, #3700] @ 24180d4 │ │ add r1, pc, r1 │ │ @@ -1260387,40 +1260386,40 @@ │ │ cmp r1, r6 │ │ add r4, pc, r4 │ │ bhi 24177e8 │ │ ldr r0, [r4, r1, lsl #2] │ │ sub r5, r0, #1 │ │ str r5, [r4, r1, lsl #2] │ │ b 2417bc0 │ │ - stc2l 11, cr0, [r0, #172]! @ 0xac @ │ │ + stc2l 11, cr0, [r0, #352]! @ 0x160 @ │ │ @ instruction: 0x0191b5f8 │ │ stc2l 0, cr8, [r3, #696]! @ 0x2b8 │ │ - stc2l 1, cr9, [r0, #824]! @ 0x338 │ │ + stc2l 1, cr9, [r0, #1004]! @ 0x3ec │ │ orrseq lr, r6, ip, asr #23 │ │ @ instruction: 0x0196eb98 │ │ - stc2l 13, cr6, [r0, #572]! @ 0x23c │ │ + stc2l 13, cr6, [r0, #752]! @ 0x2f0 │ │ orrseq r9, r6, r4, lsl #26 │ │ orrseq r9, r6, ip, lsr #25 │ │ @ instruction: 0x01969cd0 │ │ - stc2l 6, cr12, [r2, #668]! @ 0x29c │ │ + stc2l 6, cr12, [r2, #848]! @ 0x350 │ │ orrseq lr, r6, r0, lsl fp │ │ orrseq lr, r6, r8, lsr fp │ │ - stc2l 6, cr12, [r2, #336]! @ 0x150 │ │ - stc2l 15, cr2, [r1, #312]! @ 0x138 │ │ + stc2l 6, cr12, [r2, #516]! @ 0x204 │ │ + stc2l 15, cr2, [r1, #492]! @ 0x1ec │ │ orrseq fp, r1, ip, lsl #2 │ │ ldrsbteq sp, [r3], -r4 │ │ orrseq fp, r1, r4, lsr #9 │ │ orrseq r9, r6, ip, lsr ip │ │ orrseq lr, r6, r4, asr sl │ │ ldrsheq r5, [r2, r0] │ │ ldrheq fp, [r1, r8] │ │ orrseq r6, r1, r0, ror r2 │ │ orrseq fp, r1, ip, lsr r4 │ │ - stc2l 0, cr4, [r3, #80]! @ 0x50 │ │ - ldc2l 9, cr12, [pc, #454] @ 2417506 @ │ │ + stc2l 0, cr4, [r3, #260]! @ 0x104 │ │ + ldc2l 10, cr12, [pc, #64] @ 2417380 @ │ │ mov r0, #1 │ │ str r0, [r8] │ │ ldr r0, [pc, #3908] @ 2418290 │ │ ldr r0, [pc, r0] │ │ rsb r1, r0, r0, lsl #3 │ │ mvn r2, #13 │ │ sub r0, r0, #1 │ │ @@ -1260521,26 +1260520,26 @@ │ │ str r0, [sl] │ │ ldr r5, [pc, #4004] @ 2418480 │ │ ldr r6, [pc, #4004] @ 2418484 │ │ add r5, pc, r5 │ │ add r6, pc, r6 │ │ b 241757c │ │ orrseq r5, r2, ip, rrx │ │ - ldc2l 9, cr14, [pc, #438] @ 24176aa @ │ │ - stc2l 9, cr12, [r0, #258]! @ 0x102 @ │ │ - stc2l 0, cr15, [r0, #876]! @ 0x36c │ │ - stc2l 14, cr2, [r1, #88]! @ 0x58 │ │ - ldc2l 11, cr14, [pc, #80] @ 2417554 @ │ │ + ldc2l 10, cr14, [pc, #32] @ 2417514 @ │ │ + stc2l 9, cr12, [r0, #348]! @ 0x15c @ │ │ + stc2l 1, cr15, [r0, #32]! │ │ + stc2l 14, cr2, [r1, #268]! @ 0x10c │ │ + ldc2l 11, cr14, [pc, #260] @ 2417608 @ │ │ @ instruction: 0x0191afb8 │ │ eorseq sp, r3, r0, lsl #25 │ │ orrseq fp, r1, r0, asr r3 │ │ orrseq r9, r6, r8, ror #21 │ │ orrseq fp, r1, r8, lsr #6 │ │ - stc2l 9, cr4, [r2, #112]! @ 0x70 @ │ │ - stc2l 14, cr8, [r0, #1000]! @ 0x3e8 │ │ + stc2l 9, cr4, [r2, #202]! @ 0xca @ │ │ + stc2l 15, cr8, [r0, #156]! @ 0x9c │ │ orrseq lr, r6, r0, asr #17 │ │ orrseq r9, r6, r0, ror #20 │ │ orrseq r9, r6, r4, lsl sl │ │ orrseq r9, r6, r8, lsl #20 │ │ @ instruction: 0x019694f4 │ │ @ instruction: 0x0196e898 │ │ orrseq fp, r1, ip, ror r2 │ │ @@ -1260644,16 +1260643,16 @@ │ │ orrseq fp, r1, r8, ror #3 │ │ orrseq r9, r6, r0, lsl #19 │ │ @ instruction: 0x0196e798 │ │ orrseq r4, r2, r4, lsr lr │ │ @ instruction: 0x0191adfc │ │ @ instruction: 0x01915fb4 │ │ orrseq fp, r1, r0, lsl #3 │ │ - stc2l 13, cr3, [r3, #352]! @ 0x160 │ │ - ldc2l 7, cr12, [pc, #156] @ 2417780 │ │ + stc2l 13, cr3, [r3, #532]! @ 0x214 │ │ + ldc2l 7, cr12, [pc, #336] @ 2417834 │ │ ldr r1, [pc, #3888] @ 2418618 │ │ mov r0, #1 │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ ldr r1, [pc, #3876] @ 241861c │ │ mov r0, #3 │ │ ldr r2, [pc, #3872] @ 2418620 │ │ @@ -1260708,15 +1260707,15 @@ │ │ ldr r1, [pc, #3704] @ 241863c │ │ mov r3, #5 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ ldr r0, [pc, #3692] @ 2418640 │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ - stc2l 7, cr2, [r2, #592]! @ 0x250 │ │ + stc2l 7, cr2, [r2, #772]! @ 0x304 │ │ orrseq sl, r1, ip, lsr sp │ │ eorseq sp, r3, r4, lsl #20 │ │ ldrsbeq fp, [r1, r4] │ │ ldr r0, [pc, #3668] @ 2418644 │ │ movw r3, #4586 @ 0x11ea │ │ ldr r2, [pc, #3664] @ 2418648 │ │ add r0, pc, r0 │ │ @@ -1260740,17 +1260739,17 @@ │ │ ldr r0, [pc, #4044] @ 2418810 │ │ add r0, pc, r0 │ │ mov r1, #20 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4032] @ 2418814 │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ - vcmla.f16 d22, d16, d2, #270 │ │ + vcmla.f16 d22, d16, d31, #270 │ │ orrseq lr, r6, ip, asr r6 │ │ - stc2l 6, cr4, [r2, #528]! @ 0x210 │ │ + stc2l 6, cr4, [r2, #708]! @ 0x2c4 │ │ stc2l 7, cr9, [r3, #388]! @ 0x184 │ │ ldr r0, [pc, #4008] @ 2418818 │ │ mov r1, #59 @ 0x3b │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #3996] @ 241881c │ │ mov r2, #1 │ │ @@ -1260767,17 +1260766,17 @@ │ │ ldr r0, [pc, #3956] @ 2418824 │ │ mov r1, #16 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3944] @ 2418828 │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ - stc2l 5, cr12, [r0, #948]! @ 0x3b4 │ │ - stc2l 11, cr14, [r0, #364]! @ 0x16c @ │ │ - stc2l 10, cr8, [r1, #832]! @ 0x340 @ │ │ + stc2l 6, cr12, [r0, #104]! @ 0x68 │ │ + stc2l 11, cr14, [r0, #544]! @ 0x220 @ │ │ + stc2l 10, cr8, [r1, #1012]! @ 0x3f4 @ │ │ ldr r0, [pc, #3924] @ 241882c │ │ mov r1, #45 @ 0x2d │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3912] @ 2418830 │ │ mov r1, r4 │ │ mov r2, #1 │ │ @@ -1260792,33 +1260791,33 @@ │ │ orrseq sl, r1, r8, asr #31 │ │ orrseq r9, r6, r0, ror #14 │ │ orrseq lr, r6, r8, ror r5 │ │ orrseq r4, r2, r4, lsl ip │ │ @ instruction: 0x0191abdc │ │ @ instruction: 0x01915d94 │ │ orrseq sl, r1, r0, ror #30 │ │ - stc2l 11, cr3, [r3, #224]! @ 0xe0 @ │ │ - ldc2l 5, cr12, [pc, #28] @ 2417950 │ │ + stc2l 11, cr3, [r3, #404]! @ 0x194 @ │ │ + ldc2l 5, cr12, [pc, #208] @ 2417a04 │ │ @ instruction: 0x01924b90 │ │ - stc2l 10, cr8, [r0, #964]! @ 0x3c4 @ │ │ - stc2l 4, cr12, [r0, #660]! @ 0x294 │ │ - stc2l 11, cr14, [r0, #1020]! @ 0x3fc @ │ │ - stc2l 9, cr8, [r1, #304]! @ 0x130 @ │ │ - stc2l 9, cr6, [r1, #170]! @ 0xaa @ │ │ + stc2l 11, cr8, [r0, #120]! @ 0x78 @ │ │ + stc2l 4, cr12, [r0, #840]! @ 0x348 │ │ + stc2l 12, cr14, [r0, #176]! @ 0xb0 │ │ + stc2l 9, cr8, [r1, #394]! @ 0x18a @ │ │ + stc2l 9, cr6, [r1, #260]! @ 0x104 @ │ │ @ instruction: 0x0191aa90 │ │ eorseq sp, r3, r8, asr r7 │ │ orrseq sl, r1, r8, lsr #28 │ │ orrseq r9, r6, r0, asr #11 │ │ @ instruction: 0x0196e3d8 │ │ orrseq r4, r2, r4, ror sl │ │ orrseq sl, r1, ip, lsr sl │ │ @ instruction: 0x01915bf4 │ │ orrseq sl, r1, r0, asr #27 │ │ - stc2l 9, cr3, [r3, #304]! @ 0x130 @ │ │ - ldc2l 3, cr12, [pc, #412] @ 2417b14 │ │ + stc2l 9, cr3, [r3, #394]! @ 0x18a @ │ │ + ldc2l 3, cr12, [pc, #592] @ 2417bc8 │ │ ldr r0, [pc, #3968] @ 24188fc │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ bcc 24179a8 │ │ ldr r0, [pc, #3948] @ 2418900 │ │ @@ -1260934,18 +1260933,18 @@ │ │ bhi 241a080 │ │ str r4, [sl, r1, lsl #2] │ │ lsl r0, r0, #1 │ │ sub r1, r0, #13 │ │ ldr r4, [r5] │ │ b 241a0c8 │ │ @ instruction: 0x019249f0 │ │ - stc2l 9, cr8, [r0, #162]! @ 0xa2 @ │ │ - stc2l 3, cr12, [r0, #20]! │ │ - stc2l 10, cr14, [r0, #380]! @ 0x17c @ │ │ - stc2l 8, cr6, [r1, #116]! @ 0x74 │ │ + stc2l 9, cr8, [r0, #252]! @ 0xfc @ │ │ + stc2l 3, cr12, [r0, #200]! @ 0xc8 │ │ + stc2l 10, cr14, [r0, #560]! @ 0x230 @ │ │ + vcmla.f16 q11, , q5, #270 │ │ ldr r0, [pc, #3776] @ 2418a38 │ │ movw r3, #4586 @ 0x11ea │ │ ldr r2, [pc, #3772] @ 2418a3c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ str r5, [r4, r0, lsl #2] │ │ @@ -1260975,25 +1260974,25 @@ │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 2418c64 │ │ ldr r0, [pc, #3672] @ 2418a54 │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ @ instruction: 0x0191a8f0 │ │ - stc2l 6, cr6, [r0, #232]! @ 0xe8 │ │ + stc2l 6, cr6, [r0, #412]! @ 0x19c │ │ eorseq sp, r3, r4, lsr #11 │ │ orrseq sl, r1, r4, ror ip │ │ orrseq r9, r6, ip, lsl #8 │ │ orrseq lr, r6, r4, lsl r2 │ │ @ instruction: 0x019248b0 │ │ orrseq sl, r1, r8, ror r8 │ │ orrseq r5, r1, r0, lsr sl │ │ @ instruction: 0x0191abfc │ │ - stc2l 7, cr3, [r3, #848]! @ 0x350 │ │ - ldc2l 1, cr12, [pc, #652] @ 2417ec0 │ │ + vcmla.f16 d19, d3, d1, #270 │ │ + ldc2l 1, cr12, [pc, #832] @ 2417f74 │ │ mov r0, #1 │ │ str r0, [r8] │ │ ldr r0, [pc, #3608] @ 2418a58 │ │ mov r2, #10 │ │ ldr r1, [pc, #4092] @ 2418c44 │ │ mov r3, #5 │ │ add r0, pc, r0 │ │ @@ -1261064,18 +1261063,18 @@ │ │ cmp r1, r5 │ │ bhi 2418014 │ │ ldr r0, [pc, #4072] @ 2418d44 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ add r4, r0, #1 │ │ b 2418050 │ │ - stc2l 5, cr6, [r0, #168]! @ 0xa8 │ │ - ldc2l 1, cr14, [pc, #508] @ 2417f70 │ │ - stc2l 1, cr12, [r0, #148]! @ 0x94 │ │ - stc2l 8, cr14, [r0, #508]! @ 0x1fc │ │ + stc2l 5, cr6, [r0, #348]! @ 0x15c │ │ + ldc2l 1, cr14, [pc, #688] @ 2418024 │ │ + stc2l 1, cr12, [r0, #328]! @ 0x148 │ │ + vcmla.f16 d30, d16, d28, #270 │ │ orrseq r9, r6, r0, lsr #5 │ │ ldrheq lr, [r6, r4] │ │ orrseq r4, r2, r0, asr r7 │ │ orrseq sl, r1, r8, lsl r7 │ │ @ instruction: 0x019158d0 │ │ ldr r0, [pc, #4020] @ 2418d48 │ │ movw r3, #2295 @ 0x8f7 │ │ @@ -1261121,22 +1261120,22 @@ │ │ str r4, [r9, r1, lsl #2] │ │ lsl r0, r0, #1 │ │ sub r1, r0, #13 │ │ ldr r4, [pc, #3976] @ 2418dcc │ │ ldr r4, [pc, r4] │ │ b 2417eb4 │ │ @ instruction: 0x0191aa9c │ │ - stc2l 6, cr3, [r3, #464]! @ 0x1d0 │ │ - ldc2l 0, cr12, [pc, #268] @ 2417f64 │ │ + stc2l 6, cr3, [r3, #644]! @ 0x284 │ │ + ldc2l 0, cr12, [pc, #448] @ 2418018 │ │ orrseq r4, r2, ip, asr #13 │ │ - stc2l 5, cr10, [r0, #480]! @ 0x1e0 │ │ - stc2l 15, cr11, [r0, #836]! @ 0x344 │ │ + stc2l 5, cr10, [r0, #660]! @ 0x294 │ │ + stc2l 15, cr11, [r0, #1016]! @ 0x3f8 │ │ eorseq sp, r3, r8, lsr #6 │ │ - stc2l 4, cr2, [r1, #168]! @ 0xa8 │ │ - stc2l 1, cr8, [r2, #484]! @ 0x1e4 │ │ + stc2l 4, cr2, [r1, #348]! @ 0x15c │ │ + stc2l 1, cr8, [r2, #664]! @ 0x298 │ │ ldr r0, [pc, #3932] @ 2418dd0 │ │ movw r3, #2309 @ 0x905 │ │ ldr r2, [pc, #3928] @ 2418dd4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ str r4, [r9, r0, lsl #2] │ │ @@ -1261172,18 +1261171,18 @@ │ │ bl 270e110 │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 2418384 │ │ ldr r0, [pc, #4060] @ 2418ef0 │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ - stc2l 15, cr1, [r2, #972]! @ 0x3cc │ │ - stc2l 0, cr12, [r1, #216]! @ 0xd8 │ │ - stc2l 15, cr1, [r2, #812]! @ 0x32c │ │ - stc2l 0, cr12, [r1, #40]! @ 0x28 │ │ + stc2l 0, cr2, [r2, #128]! @ 0x80 │ │ + stc2l 0, cr12, [r1, #396]! @ 0x18c │ │ + stc2l 15, cr1, [r2, #992]! @ 0x3e0 │ │ + stc2l 0, cr12, [r1, #220]! @ 0xdc │ │ ldr r0, [pc, #4036] @ 2418ef4 │ │ mov r1, #71 @ 0x47 │ │ mov r7, ip │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #4020] @ 2418ef8 │ │ mov r1, r7 │ │ @@ -1261193,15 +1261192,15 @@ │ │ ldr r0, [pc, #4004] @ 2418efc │ │ mov r1, #19 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3992] @ 2418f00 │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ - stc2l 10, cr11, [r2, #976]! @ 0x3d0 @ │ │ + stc2l 11, cr11, [r2, #132]! @ 0x84 @ │ │ ldr r1, [pc, #3980] @ 2418f04 │ │ ldr r0, [pc, #3980] @ 2418f08 │ │ add r1, pc, r1 │ │ add r0, pc, r0 │ │ str r3, [r1] │ │ mov r1, #47 @ 0x2f │ │ bl 270d990 │ │ @@ -1261213,16 +1261212,16 @@ │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ orrseq sp, r6, r4, lsl #30 │ │ orrseq r4, r2, r0, lsr #11 │ │ orrseq sl, r1, r8, ror #10 │ │ orrseq r5, r1, r0, lsr #14 │ │ orrseq sl, r1, ip, ror #17 │ │ - stc2l 4, cr3, [r3, #784]! @ 0x310 │ │ - ldc2l 14, cr11, [pc, #588] @ 2418214 │ │ + stc2l 4, cr3, [r3, #964]! @ 0x3c4 │ │ + ldc2l 14, cr11, [pc, #768] @ 24182c8 │ │ ldr r0, [pc, #4040] @ 2418f94 │ │ mov r1, #54 @ 0x36 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #4028] @ 2418f98 │ │ mov r2, #1 │ │ ldr r1, [fp, #8] │ │ @@ -1261272,24 +1261271,24 @@ │ │ orrseq r8, r6, r0, lsl #21 │ │ orrseq sl, r1, r0, lsl #16 │ │ orrseq sp, r6, ip, lsl lr │ │ orrseq sl, r1, r0, lsr r4 │ │ orrseq sp, r6, ip, ror #27 │ │ @ instruction: 0x019155dc │ │ stc2l 7, cr5, [r3, #456]! @ 0x1c8 │ │ - stc2l 13, cr11, [r0, #260]! @ 0x104 │ │ + stc2l 13, cr11, [r0, #440]! @ 0x1b8 │ │ mlaseq r3, r8, r0, sp │ │ - stc2l 1, cr2, [r1, #520]! @ 0x208 │ │ - ldc2l 14, cr13, [pc, #848] @ 241840c │ │ + stc2l 1, cr2, [r1, #700]! @ 0x2bc │ │ + ldc2l 15, cr13, [pc, #4] @ 24180c0 │ │ @ instruction: 0x0196dcf8 │ │ - stc2l 14, cr3, [r2, #204]! @ 0xcc │ │ - ldc2l 12, cr11, [pc, #636] @ 2418344 │ │ + stc2l 14, cr3, [r2, #384]! @ 0x180 │ │ + ldc2l 12, cr11, [pc, #816] @ 24183f8 │ │ eorseq r3, r3, r8, lsl #7 │ │ - stc2l 14, cr5, [r0, #840]! @ 0x348 │ │ - stc2l 2, cr8, [r0, #584]! @ 0x248 │ │ + stc2l 14, cr5, [r0, #1020]! @ 0x3fc │ │ + stc2l 2, cr8, [r0, #764]! @ 0x2fc │ │ @ instruction: 0x0196dcb4 │ │ orrseq sp, r6, r0, lsl #25 │ │ ldr r0, [pc, #4024] @ 2419098 │ │ ldr r1, [pc, #4024] @ 241909c │ │ add r0, pc, r0 │ │ ldr r1, [pc, r1] │ │ str r1, [r0, #4] │ │ @@ -1261391,15 +1261390,15 @@ │ │ mov r2, #1 │ │ add r1, pc, r1 │ │ bl 270da90 │ │ ldr r0, [pc, #3980] @ 2419208 │ │ mov r1, #18 │ │ add r0, pc, r0 │ │ b 2416554 │ │ - stc2l 0, cr2, [r1, #952]! @ 0x3b8 │ │ + stc2l 1, cr2, [r1, #108]! @ 0x6c │ │ orrseq sp, r6, ip, lsr #24 │ │ eorseq r8, r3, r4, lsl #2 │ │ orrseq sp, r6, ip, lsl #23 │ │ ldr r4, [pc, #3952] @ 241920c │ │ ldr r5, [pc, #3952] @ 2419210 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ @@ -1261443,26 +1261442,26 @@ │ │ sub r1, r0, #1 │ │ cmp r1, r6 │ │ bhi 2419010 │ │ ldr r2, [pc, #3988] @ 24192e0 │ │ add r2, pc, r2 │ │ str r5, [r2, r1, lsl #2] │ │ b 2419048 │ │ - stc2l 11, cr5, [r2, #880]! @ 0x370 @ │ │ - ldc2l 11, cr11, [pc, #156] @ 24183fc @ │ │ + stc2l 12, cr5, [r2, #36]! @ 0x24 │ │ + ldc2l 11, cr11, [pc, #336] @ 24184b0 @ │ │ orrseq r4, r2, ip, ror #3 │ │ orrseq sp, r6, r4, lsr fp │ │ - stc2l 11, cr5, [r2, #560]! @ 0x230 @ │ │ - ldc2l 10, cr11, [pc, #860] @ 24186cc @ │ │ + stc2l 11, cr5, [r2, #740]! @ 0x2e4 @ │ │ + ldc2l 11, cr11, [pc, #16] @ 2418380 @ │ │ orrseq sp, r6, ip, ror #21 │ │ - stc2l 11, cr5, [r2, #272]! @ 0x110 @ │ │ - ldc2l 10, cr11, [pc, #572] @ 24185b8 @ │ │ + stc2l 11, cr5, [r2, #452]! @ 0x1c4 @ │ │ + ldc2l 10, cr11, [pc, #752] @ 241866c @ │ │ orrseq sp, r6, r4, lsr #21 │ │ - stc2l 10, cr5, [r2, #1008]! @ 0x3f0 @ │ │ - ldc2l 10, cr11, [pc, #284] @ 24184a4 @ │ │ + stc2l 11, cr5, [r2, #164]! @ 0xa4 @ │ │ + ldc2l 10, cr11, [pc, #464] @ 2418558 @ │ │ ldr r0, [pc, #3928] @ 24192e4 │ │ mov r7, #1 │ │ mov r1, #0 │ │ add r0, pc, r0 │ │ str r7, [r0] │ │ ldr r6, [pc, #3912] @ 24192e8 │ │ ldr r5, [pc, #3912] @ 24192ec │ │ @@ -1261515,19 +1261514,19 @@ │ │ ldr r2, [fp, #8] │ │ add r1, pc, r1 │ │ str r7, [r1] │ │ blt 2418548 │ │ mov r7, #1 │ │ b 24184b4 │ │ orrseq sp, r6, ip, asr sl │ │ - stc2l 10, cr5, [r2, #704]! @ 0x2c0 @ │ │ - ldc2l 9, cr11, [pc, #502] @ 2418676 @ │ │ + stc2l 10, cr5, [r2, #884]! @ 0x374 @ │ │ + ldc2l 10, cr11, [pc, #160] @ 2418520 @ │ │ orrseq r4, r2, r0, lsr #1 │ │ - ldc2l 9, cr11, [pc, #390] @ 241860e @ │ │ - stc2l 10, cr5, [r2, #448]! @ 0x1c0 @ │ │ + ldc2l 9, cr11, [pc, #480] @ 2418668 @ │ │ + stc2l 10, cr5, [r2, #628]! @ 0x274 @ │ │ ldr r0, [r5, r1, lsl #2] │ │ ldr r1, [pc, #4072] @ 241947c │ │ ldr r1, [pc, r1] │ │ str r1, [r6] │ │ ldr r1, [pc, #4064] @ 2419480 │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ @@ -1261564,15 +1261563,15 @@ │ │ mov r0, r8 │ │ mov r2, r4 │ │ movw r3, #2367 @ 0x93f │ │ bl 270d9c0 │ │ ldr r2, [fp, #8] │ │ mov r1, r0 │ │ b 2418488 │ │ - stc2l 12, cr5, [r0, #1004]! @ 0x3ec │ │ + stc2l 13, cr5, [r0, #160]! @ 0xa0 │ │ orrseq r4, r2, r4 │ │ ldr r7, [pc, #3908] @ 241948c │ │ ldr r7, [pc, r7] │ │ ldr r0, [pc, #3904] @ 2419490 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #3900] @ 2419494 │ │ rsb r0, r0, r0, lsl #3 │ │ @@ -1261583,15 +1261582,15 @@ │ │ movt r0, #1 │ │ cmp r1, r0 │ │ bcs 2418590 │ │ mov r0, r7 │ │ b 24185b0 │ │ orrseq sp, r6, r4, asr r9 │ │ @ instruction: 0x01923fb4 │ │ - stc2l 15, cr9, [r0, #676]! @ 0x2a4 │ │ + stc2l 15, cr9, [r0, #856]! @ 0x358 │ │ orrseq r3, r2, r4, lsl #31 │ │ orrseq sp, r6, r4, ror #17 │ │ ldr r0, [pc, #3840] @ 2419498 │ │ mov r2, r4 │ │ movw r3, #2383 @ 0x94f │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1261616,31 +1261615,31 @@ │ │ bcc 2418694 │ │ ldr r0, [pc, #4028] @ 24195b4 │ │ mov r2, r4 │ │ movw r3, #2386 @ 0x952 │ │ add r0, pc, r0 │ │ b 241868c │ │ orrseq r3, r2, r4, asr #30 │ │ - stc2l 15, cr13, [r0, #912]! @ 0x390 │ │ + stc2l 0, cr14, [r0, #68]! @ 0x44 │ │ orrseq r3, r2, r4, lsl pc │ │ orrseq sp, r6, r4, ror r8 │ │ @ instruction: 0x01923ed4 │ │ orrseq r3, r2, ip, lsl #29 │ │ - stc2l 13, cr7, [r0, #952]! @ 0x3b8 │ │ + stc2l 14, cr7, [r0, #108]! @ 0x6c │ │ orrseq sp, r6, r0, lsl r8 │ │ @ instruction: 0x0196d7dc │ │ orrseq sp, r6, r8, lsr #15 │ │ - stc2l 12, cr5, [r1, #500]! @ 0x1f4 │ │ + stc2l 12, cr5, [r1, #680]! @ 0x2a8 │ │ orrseq r3, r2, ip, ror #27 │ │ - stc2l 13, cr7, [r0, #328]! @ 0x148 │ │ + stc2l 13, cr7, [r0, #508]! @ 0x1fc │ │ eorseq ip, r3, ip, lsl #21 │ │ - stc2l 7, cr3, [r2, #400]! @ 0x190 │ │ - ldc2l 6, cr11, [pc, #856] @ 24189a0 │ │ - stc2l 5, cr9, [r2, #872]! @ 0x368 │ │ - ldc2l 6, cr11, [pc, #668] @ 24188ec │ │ + stc2l 7, cr3, [r2, #580]! @ 0x244 │ │ + ldc2l 7, cr11, [pc, #12] @ 2418654 │ │ + stc2l 6, cr9, [r2, #28]! │ │ + ldc2l 6, cr11, [pc, #848] @ 24189a0 │ │ ldr r0, [pc, #3940] @ 24195b8 │ │ mov r7, #0 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #3932] @ 24195bc │ │ rsb r0, r0, r0, lsl #3 │ │ ldr r1, [pc, r1] │ │ add r0, r1, r0, lsl #1 │ │ @@ -1261745,24 +1261744,24 @@ │ │ movw r3, #2446 @ 0x98e │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ mov r7, #1 │ │ b 2418ae0 │ │ orrseq sp, r6, r8, asr #13 │ │ - ldc2l 15, cr15, [pc, #596] @ 2418a68 │ │ - stc2l 2, cr15, [r1, #380]! @ 0x17c │ │ - stc2l 13, cr2, [r3, #548]! @ 0x224 │ │ + ldc2l 15, cr15, [pc, #776] @ 2418b1c │ │ + stc2l 2, cr15, [r1, #560]! @ 0x230 │ │ + stc2l 13, cr2, [r3, #728]! @ 0x2d8 │ │ stc2l 0, cr5, [r3, #440]! @ 0x1b8 │ │ - stc2l 6, cr11, [r0, #244]! @ 0xf4 │ │ + stc2l 6, cr11, [r0, #424]! @ 0x1a8 │ │ mlaseq r3, r4, r9, ip │ │ - stc2l 10, cr1, [r1, #504]! @ 0x1f8 @ │ │ - stc2l 1, cr11, [r2, #656]! @ 0x290 │ │ - stc2l 6, cr5, [r2, #504]! @ 0x1f8 │ │ - stc2l 5, cr11, [r0, #852]! @ 0x354 │ │ + stc2l 10, cr1, [r1, #684]! @ 0x2ac @ │ │ + stc2l 1, cr11, [r2, #836]! @ 0x344 │ │ + stc2l 6, cr5, [r2, #684]! @ 0x2ac │ │ + stc2l 6, cr11, [r0, #8]! │ │ ldr r0, [r5, r1, lsl #2] │ │ ldr r1, [pc, #3884] @ 241976c │ │ cmp r0, #0 │ │ ldr r1, [pc, r1] │ │ rsbmi r0, r0, #0 │ │ ldr r2, [pc, #3872] @ 2419770 │ │ add r2, pc, r2 │ │ @@ -1261804,22 +1261803,22 @@ │ │ movw r3, #2427 @ 0x97b │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3740] @ 2419790 │ │ add r0, pc, r0 │ │ b 2418944 │ │ - stc2l 13, cr13, [r0, #188]! @ 0xbc │ │ + stc2l 13, cr13, [r0, #368]! @ 0x170 │ │ orrseq sp, r6, ip, asr r5 │ │ - stc2l 6, cr3, [r2, #604]! @ 0x25c │ │ - ldc2l 5, cr11, [pc, #12] @ 2418918 │ │ + stc2l 6, cr3, [r2, #784]! @ 0x310 │ │ + ldc2l 5, cr11, [pc, #192] @ 24189cc │ │ ldrshteq r2, [r3], -r0 │ │ orrseq sp, r6, ip, lsl #10 │ │ - stc2l 5, cr5, [r2, #368]! @ 0x170 │ │ - ldc2l 4, cr11, [pc, #668] @ 2418bb8 │ │ + stc2l 5, cr5, [r2, #548]! @ 0x224 │ │ + ldc2l 4, cr11, [pc, #848] @ 2418c6c │ │ orrseq r3, r2, ip, ror #22 │ │ cmp r1, #3 │ │ bcc 241893c │ │ ldr r0, [pc, #3688] @ 2419794 │ │ mov r2, r4 │ │ movw r3, #2429 @ 0x97d │ │ add r0, pc, r0 │ │ @@ -1261875,29 +1261874,29 @@ │ │ movw r3, #2436 @ 0x984 │ │ bl 270d9c0 │ │ ldr r7, [pc, #3932] @ 2419964 │ │ mov r1, r0 │ │ ldr r7, [pc, r7] │ │ b 2418834 │ │ orrseq sp, r6, r8, lsr #9 │ │ - stc2l 4, cr5, [r2, #992]! @ 0x3e0 │ │ - ldc2l 4, cr11, [pc, #268] @ 2418b2c │ │ + stc2l 5, cr5, [r2, #148]! @ 0x94 │ │ + ldc2l 4, cr11, [pc, #448] @ 2418be0 │ │ orrseq sp, r6, r4, asr r4 │ │ - stc2l 4, cr5, [r2, #656]! @ 0x290 │ │ - ldc2l 3, cr11, [pc, #956] @ 2418de8 │ │ + stc2l 4, cr5, [r2, #836]! @ 0x344 │ │ + ldc2l 4, cr11, [pc, #112] @ 2418a9c │ │ orrseq sp, r6, r0, lsl #8 │ │ - stc2l 4, cr5, [r2, #320]! @ 0x140 │ │ - ldc2l 3, cr11, [pc, #620] @ 2418ca4 │ │ + stc2l 4, cr5, [r2, #500]! @ 0x1f4 │ │ + ldc2l 3, cr11, [pc, #800] @ 2418d58 │ │ orrseq sp, r6, r8, lsr #7 │ │ - stc2l 2, cr9, [r2, #328]! @ 0x148 │ │ - ldc2l 3, cr11, [pc, #124] @ 2418ac0 │ │ + stc2l 2, cr9, [r2, #508]! @ 0x1fc │ │ + ldc2l 3, cr11, [pc, #304] @ 2418b74 │ │ orrseq sp, r6, r4, asr #6 │ │ - stc2l 2, cr9, [r2, #120]! @ 0x78 │ │ - ldc2l 2, cr11, [pc, #940] @ 2418dfc │ │ - stc2l 9, cr7, [r0, #36]! @ 0x24 @ │ │ + stc2l 2, cr9, [r2, #300]! @ 0x12c │ │ + ldc2l 3, cr11, [pc, #96] @ 2418ab0 │ │ + stc2l 9, cr7, [r0, #126]! @ 0x7e @ │ │ orrseq sp, r6, r8, lsr r3 │ │ stc2l 13, cr4, [r3, #956]! @ 0x3bc │ │ @ instruction: 0x0196d2b4 │ │ ldr r0, [pc, #4040] @ 2419a2c │ │ movw r2, #4464 @ 0x1170 │ │ movt r2, #1 │ │ mov r7, #1 │ │ @@ -1262015,20 +1262014,20 @@ │ │ ldr r0, [fp, #8] │ │ add r1, pc, r1 │ │ str r4, [r9, r3, lsl #2] │ │ bl 270dd90 │ │ ldr r0, [pc, #4064] @ 2419c20 │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ - stc2l 2, cr3, [r2, #880]! @ 0x370 │ │ + stc2l 3, cr3, [r2, #36]! @ 0x24 │ │ orrseq sp, r6, r4, ror r2 │ │ - stc2l 3, cr3, [r2, #700]! @ 0x2bc │ │ - ldc2l 2, cr11, [pc, #108] @ 2418cc4 │ │ + stc2l 3, cr3, [r2, #880]! @ 0x370 │ │ + ldc2l 2, cr11, [pc, #288] @ 2418d78 │ │ eorseq r2, r3, ip, lsl #18 │ │ - stc2l 8, cr7, [r0, #232]! @ 0xe8 │ │ + vcmla.f16 , q0, , #270 │ │ orrseq sp, r6, ip, asr r2 │ │ orrseq sp, r6, ip, lsr #4 │ │ ldr r0, [pc, #4024] @ 2419c24 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4020] @ 2419c28 │ │ ldr r1, [pc, r1] │ │ cmp r1, r0 │ │ @@ -1262050,18 +1262049,18 @@ │ │ ldr r1, [pc, #3972] @ 2419c40 │ │ ldr r0, [fp, #8] │ │ add r1, pc, r1 │ │ bl 270e150 │ │ ldr r0, [pc, #3960] @ 2419c44 │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ - stc2l 2, cr1, [r2, #372]! @ 0x174 │ │ - stc2l 1, cr11, [r0, #836]! @ 0x344 │ │ - stc2l 2, cr1, [r2, #368]! @ 0x170 │ │ - stc2l 2, cr1, [r2, #416]! @ 0x1a0 │ │ + stc2l 2, cr1, [r2, #552]! @ 0x228 │ │ + stc2l 1, cr11, [r0, #1016]! @ 0x3f8 │ │ + stc2l 2, cr1, [r2, #548]! @ 0x224 │ │ + stc2l 2, cr1, [r2, #596]! @ 0x254 │ │ orrseq r3, r2, r0, asr #16 │ │ ldr r0, [pc, #3932] @ 2419c48 │ │ mov r1, #59 @ 0x3b │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #3920] @ 2419c4c │ │ mov r2, #1 │ │ @@ -1262080,16 +1262079,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4060] @ 2419d18 │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ @ instruction: 0x0196d194 │ │ eorseq r7, r3, r8, ror #12 │ │ - stc2l 7, cr2, [r3, #208]! @ 0xd0 │ │ - ldc2l 1, cr11, [pc, #12] @ 2418d60 │ │ + stc2l 7, cr2, [r3, #388]! @ 0x184 │ │ + ldc2l 1, cr11, [pc, #192] @ 2418e14 │ │ orrseq r4, r1, r4, ror r9 │ │ ldr r0, [pc, #4032] @ 2419d1c │ │ mov r1, #59 @ 0x3b │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #4020] @ 2419d20 │ │ mov r2, #1 │ │ @@ -1262114,16 +1262113,16 @@ │ │ ldrsbteq r2, [r3], -r4 │ │ eorseq r7, r3, r0, ror #11 │ │ orrseq r3, r2, r0, lsl #15 │ │ eorseq ip, r3, r4, lsr #8 │ │ orrseq r9, r1, r0, lsr r7 │ │ orrseq sp, r6, r0, asr #1 │ │ orrseq sp, r6, r4, lsr #1 │ │ - stc2l 0, cr5, [r2, #864]! @ 0x360 │ │ - ldc2l 0, cr11, [pc, #140] @ 2418e68 │ │ + stc2l 1, cr5, [r2, #20]! │ │ + ldc2l 0, cr11, [pc, #320] @ 2418f1c │ │ ldr r0, [pc, #4088] @ 2419dd8 │ │ movw r3, #2296 @ 0x8f8 │ │ ldr r2, [pc, #4084] @ 2419ddc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4072] @ 2419de0 │ │ @@ -1262163,15 +1262162,15 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2417df0 │ │ @ instruction: 0x019196b0 │ │ orrseq sp, r6, r4, asr #32 │ │ orrseq r8, r6, r4, lsl #3 │ │ orrseq r7, r6, r0, ror ip │ │ - stc2l 6, cr7, [r0, #40]! @ 0x28 │ │ + stc2l 6, cr7, [r0, #220]! @ 0xdc │ │ orrseq sp, r6, ip, lsr #32 │ │ @ instruction: 0x0196cff8 │ │ ldr r0, [pc, #4008] @ 2419e50 │ │ movw r3, #2310 @ 0x906 │ │ ldr r2, [pc, #4004] @ 2419e54 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1262186,21 +1262185,21 @@ │ │ sub r2, r2, #1 │ │ ldr r4, [pc, r4] │ │ cmp r2, r3 │ │ add r1, r1, r0, lsl #1 │ │ bhi 2419184 │ │ lsl r0, r0, #1 │ │ b 2417ec4 │ │ - ldc2l 1, cr13, [pc, #496] @ 24190e8 │ │ - stc2l 6, cr13, [r0, #672]! @ 0x2a0 │ │ - stc2l 15, cr10, [r0, #484]! @ 0x1e4 │ │ - stc2l 4, cr3, [r1, #356]! @ 0x164 │ │ - stc2l 6, cr2, [r3, #468]! @ 0x1d4 │ │ + ldc2l 1, cr13, [pc, #676] @ 241919c │ │ + stc2l 6, cr13, [r0, #852]! @ 0x354 │ │ + stc2l 15, cr10, [r0, #664]! @ 0x298 │ │ + stc2l 4, cr3, [r1, #536]! @ 0x218 │ │ + stc2l 6, cr2, [r3, #648]! @ 0x288 │ │ orrseq r3, r2, ip, ror #11 │ │ - stc2l 3, cr1, [r1, #792]! @ 0x318 │ │ + stc2l 3, cr1, [r1, #972]! @ 0x3cc │ │ ldr r0, [pc, #4068] @ 2419ef8 │ │ ldr r4, [pc, #4068] @ 2419efc │ │ add r0, pc, r0 │ │ add r4, pc, r4 │ │ mov r1, r4 │ │ bl 270d140 │ │ ldr r0, [pc, #4052] @ 2419f00 │ │ @@ -1262225,18 +1262224,18 @@ │ │ str r1, [sp, #36] @ 0x24 │ │ mov r1, #0 │ │ str r1, [sp, #32] │ │ bl 270d160 │ │ ldr r0, [pc, #4084] @ 2419f7c │ │ add r0, pc, r0 │ │ b 2419ee4 │ │ - vcmla.f16 d17, d0, d23, #270 │ │ - stc2l 6, cr2, [r3, #228]! @ 0xe4 │ │ - stc2l 15, cr0, [r2, #436]! @ 0x1b4 │ │ - stc2l 14, cr10, [r0, #900]! @ 0x384 │ │ + stc2l 8, cr1, [r0, #336]! @ 0x150 │ │ + stc2l 6, cr2, [r3, #408]! @ 0x198 │ │ + stc2l 15, cr0, [r2, #616]! @ 0x268 │ │ + stc2l 15, cr10, [r0, #56]! @ 0x38 │ │ ldr r0, [pc, #4060] @ 2419f80 │ │ movw r3, #1580 @ 0x62c │ │ ldr r2, [pc, #4056] @ 2419f84 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ str r4, [r6, r0, lsl #2] │ │ @@ -1262251,21 +1262250,21 @@ │ │ ldr r2, [pc, #4016] @ 2419f90 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 241805c │ │ @ instruction: 0x0196cef4 │ │ - stc2l 15, cr0, [r2, #416]! @ 0x1a0 │ │ - stc2l 13, cr8, [r2, #696]! @ 0x2b8 │ │ - ldc2l 14, cr10, [pc, #492] @ 24191f0 │ │ + stc2l 15, cr0, [r2, #596]! @ 0x254 │ │ + stc2l 13, cr8, [r2, #876]! @ 0x36c │ │ + ldc2l 14, cr10, [pc, #672] @ 24192a4 │ │ mlaseq r3, r0, r3, r7 │ │ @ instruction: 0x0196ce94 │ │ eorseq r7, r3, ip, ror #6 │ │ - stc2l 13, cr8, [r2, #744]! @ 0x2e8 │ │ + stc2l 13, cr8, [r2, #924]! @ 0x39c │ │ ldr r0, [pc, #3964] @ 2419f94 │ │ movw r3, #4036 @ 0xfc4 │ │ ldr r2, [pc, #3960] @ 2419f98 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3948] @ 2419f9c │ │ @@ -1262380,19 +1262379,19 @@ │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r7, r0 │ │ b 2417ed4 │ │ eorseq ip, r3, r8, lsr #32 │ │ orrseq r9, r1, r8, lsr r3 │ │ - stc2l 0, cr5, [r0, #88]! @ 0x58 │ │ - stc2l 12, cr10, [r0, #452]! @ 0x1c4 │ │ + stc2l 0, cr5, [r0, #268]! @ 0x10c │ │ + stc2l 12, cr10, [r0, #632]! @ 0x278 │ │ @ instruction: 0x0196cc98 │ │ orrseq ip, r6, ip, ror #24 │ │ - stc2l 3, cr2, [r3, #400]! @ 0x190 │ │ + stc2l 3, cr2, [r3, #580]! @ 0x244 │ │ orrseq r9, r1, r4, asr r6 │ │ orrseq ip, r6, r0, ror ip │ │ orrseq r9, r1, r4, lsl #5 │ │ ldr r0, [pc, #3880] @ 241a148 │ │ movw r3, #4037 @ 0xfc5 │ │ ldr r2, [pc, #3876] @ 241a14c │ │ add r0, pc, r0 │ │ @@ -1262433,25 +1262432,25 @@ │ │ movw r3, #4039 @ 0xfc7 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r3, r0 │ │ b 2419074 │ │ orrseq ip, r6, r0, asr #24 │ │ - stc2l 12, cr4, [r2, #336]! @ 0x150 │ │ - ldc2l 11, cr10, [pc, #636] @ 2419554 @ │ │ + stc2l 12, cr4, [r2, #516]! @ 0x204 │ │ + ldc2l 11, cr10, [pc, #816] @ 2419608 @ │ │ orrseq r3, r2, r4, ror #4 │ │ eorseq fp, r3, r8, lsl #30 │ │ orrseq r9, r1, ip, lsl #4 │ │ @ instruction: 0x019143d4 │ │ @ instruction: 0x019231d0 │ │ orrseq r9, r1, r0, lsr #3 │ │ @ instruction: 0x01967898 │ │ orrseq ip, r6, ip, lsr fp │ │ - stc2l 1, cr7, [r0, #232]! @ 0xe8 │ │ + stc2l 1, cr7, [r0, #412]! @ 0x19c │ │ ldr r0, [pc, #4060] @ 241a2dc │ │ movw r3, #1626 @ 0x65a │ │ ldr r2, [pc, #4056] @ 241a2e0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4044] @ 241a2e4 │ │ @@ -1262491,18 +1262490,18 @@ │ │ bhi 24193d0 │ │ str r4, [r9, r1, lsl #2] │ │ lsl r0, r0, #1 │ │ sub r1, r0, #13 │ │ ldr r4, [pc, #4028] @ 241a36c │ │ ldr r4, [pc, r4] │ │ b 2419418 │ │ - ldc2l 10, cr10, [pc, #908] @ 2419748 @ │ │ + ldc2l 11, cr10, [pc, #64] @ 24193fc @ │ │ orrseq r7, r6, ip, ror ip │ │ orrseq ip, r6, r0, lsl fp │ │ - stc2l 2, cr15, [r0, #224]! @ 0xe0 │ │ + stc2l 2, cr15, [r0, #404]! @ 0x194 │ │ orrseq r3, r2, r0, ror #2 │ │ orrseq r3, r2, r0, asr #2 │ │ orrseq ip, r6, ip, lsl #21 │ │ ldr r0, [pc, #3992] @ 241a370 │ │ movw r3, #1640 @ 0x668 │ │ ldr r2, [pc, #3988] @ 241a374 │ │ add r0, pc, r0 │ │ @@ -1262548,15 +1262547,15 @@ │ │ orrseq ip, r6, r0, ror #20 │ │ orrseq ip, r6, ip, asr #20 │ │ orrseq r3, r2, ip, lsl #1 │ │ orrseq r3, r2, r4, asr r0 │ │ orrseq ip, r6, r4, lsr #19 │ │ @ instruction: 0x01918ff4 │ │ orrseq r3, r2, r8 │ │ - stc2l 9, cr4, [r2, #360]! @ 0x168 @ │ │ + stc2l 9, cr4, [r2, #450]! @ 0x1c2 @ │ │ ldr r0, [pc, #3972] @ 241a428 │ │ mov r2, r4 │ │ movw r3, #1766 @ 0x6e6 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r7, [pc, #3956] @ 241a42c │ │ mov r1, r0 │ │ @@ -1262619,15 +1262618,15 @@ │ │ ldr r7, [pc, #4040] @ 241a568 │ │ add r7, pc, r7 │ │ b 24195ec │ │ orrseq ip, r6, ip, lsr r9 │ │ orrseq r8, r1, r0, lsl #31 │ │ @ instruction: 0x01922f94 │ │ orrseq r8, r1, r4, ror #30 │ │ - stc2l 9, cr4, [r2, #168]! @ 0xa8 @ │ │ + stc2l 9, cr4, [r2, #258]! @ 0x102 @ │ │ orrseq r8, r1, ip, ror #29 │ │ orrseq r2, r2, r0, lsl #30 │ │ ldr r0, [r5, r1, lsl #2] │ │ ldr r1, [pc, #4000] @ 241a56c │ │ ldr r1, [pc, r1] │ │ str r1, [r7] │ │ ldr r1, [pc, #3992] @ 241a570 │ │ @@ -1262666,15 +1262665,15 @@ │ │ mov r0, r8 │ │ mov r2, r4 │ │ movw r3, #1687 @ 0x697 │ │ bl 270d9c0 │ │ ldr r2, [fp, #8] │ │ mov r1, r0 │ │ b 24195c0 │ │ - vcmla.f16 q10, q9, q4, #270 │ │ + stc2l 8, cr4, [r2, #980]! @ 0x3d4 │ │ orrseq ip, r6, r8, asr #16 │ │ ldr r7, [pc, #4084] @ 241a674 │ │ ldr r7, [pc, r7] │ │ ldr r0, [pc, #4080] @ 241a678 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4076] @ 241a67c │ │ rsb r0, r0, r0, lsl #3 │ │ @@ -1262685,15 +1262684,15 @@ │ │ movt r0, #1 │ │ cmp r1, r0 │ │ bcs 24196c8 │ │ mov r0, r7 │ │ b 24196e8 │ │ @ instruction: 0x01922e98 │ │ orrseq r9, r1, ip, lsl r2 │ │ - stc2l 4, cr14, [r1, #716]! @ 0x2cc │ │ + stc2l 4, cr14, [r1, #896]! @ 0x380 │ │ orrseq r9, r1, r0, asr #3 │ │ vcmla.f16 d16, d12, d0, #270 │ │ ldr r0, [pc, #4016] @ 241a680 │ │ mov r2, r4 │ │ movw r3, #1703 @ 0x6a7 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1262724,30 +1262723,30 @@ │ │ orrseq r8, r1, r0, lsl #28 │ │ @ instruction: 0x019673f0 │ │ @ instruction: 0x0196c7bc │ │ @ instruction: 0x0196c794 │ │ orrseq ip, r6, r8, ror r7 │ │ @ instruction: 0x01918db8 │ │ orrseq r2, r2, ip, asr #27 │ │ - stc2l 7, cr4, [r2, #624]! @ 0x270 │ │ + stc2l 7, cr4, [r2, #804]! @ 0x324 │ │ @ instruction: 0x01922d9c │ │ orrseq r7, r6, r0, ror r3 │ │ orrseq r2, r2, r4, lsr #27 │ │ - stc2l 14, cr14, [r0, #208]! @ 0xd0 │ │ + stc2l 14, cr14, [r0, #388]! @ 0x184 │ │ @ instruction: 0x0196c6b4 │ │ orrseq ip, r6, ip, lsr #13 │ │ orrseq r7, r6, r4, ror #5 │ │ @ instruction: 0x019672d8 │ │ orrseq ip, r6, r8, ror r6 │ │ orrseq r9, r1, r4, ror r0 │ │ orrseq ip, r6, r4, lsl #13 │ │ orrseq ip, r6, r8, lsr r6 │ │ - stc2l 2, cr8, [r2, #896]! @ 0x380 │ │ + stc2l 3, cr8, [r2, #52]! @ 0x34 │ │ stc2l 6, cr0, [ip, #240]! @ 0xf0 │ │ - stc2l 2, cr14, [r1, #636]! @ 0x27c │ │ + stc2l 2, cr14, [r1, #816]! @ 0x330 │ │ stc2l 5, cr0, [ip, #992]! @ 0x3e0 │ │ ldr r0, [pc, #4088] @ 241a79c │ │ mov r7, #0 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4080] @ 241a7a0 │ │ rsb r0, r0, r0, lsl #3 │ │ ldr r1, [pc, r1] │ │ @@ -1262850,15 +1262849,15 @@ │ │ cmp r1, #3 │ │ bcs 241949c │ │ ldr r7, [pc, #3864] @ 241a85c │ │ add r7, pc, r7 │ │ b 24194bc │ │ orrseq ip, r6, r4, lsr #11 │ │ orrseq r2, r2, r4, lsl #24 │ │ - stc2l 9, cr0, [r1, #382]! @ 0x17e @ │ │ + stc2l 9, cr0, [r1, #472]! @ 0x1d8 @ │ │ orrseq ip, r6, r4, lsl #11 │ │ stc2l 5, cr0, [ip, #688]! @ 0x2b0 │ │ orrseq r8, r1, ip, lsl pc │ │ orrseq ip, r6, r4, lsr r5 │ │ orrseq ip, r6, ip, lsl #10 │ │ ldr r0, [r5, r1, lsl #2] │ │ ldr r1, [pc, #3820] @ 241a860 │ │ @@ -1262907,28 +1262906,28 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3676] @ 241a884 │ │ add r0, pc, r0 │ │ b 2419aa0 │ │ @ instruction: 0x01918ad4 │ │ orrseq r2, r2, r8, ror #21 │ │ - stc2l 4, cr4, [r2, #736]! @ 0x2e0 │ │ + stc2l 4, cr4, [r2, #916]! @ 0x394 │ │ @ instruction: 0x01922ab8 │ │ orrseq r2, r2, r4, asr #21 │ │ - stc2l 11, cr14, [r0, #336]! @ 0x150 @ │ │ + stc2l 11, cr14, [r0, #516]! @ 0x204 @ │ │ orrseq r2, r2, r4, lsl #21 │ │ orrseq r2, r2, r0, ror sl │ │ orrseq r2, r2, r0, ror #20 │ │ orrseq r2, r2, r8, ror #20 │ │ orrseq r8, r1, r0, lsr sl │ │ orrseq r2, r2, r0, asr #20 │ │ ldrshteq fp, [r3], -r4 │ │ orrseq ip, r6, r8, lsr #7 │ │ @ instruction: 0x0196c3d4 │ │ - stc2l 5, cr4, [r0, #712]! @ 0x2c8 │ │ + stc2l 5, cr4, [r0, #892]! @ 0x37c │ │ @ instruction: 0x0196c398 │ │ orrseq r7, r6, ip, ror #9 │ │ orrseq ip, r6, r0, lsl #7 │ │ cmp r1, #3 │ │ bcc 2419a98 │ │ ldr r0, [pc, #3584] @ 241a888 │ │ mov r2, r4 │ │ @@ -1262987,21 +1262986,21 @@ │ │ mov r2, r4 │ │ movw r3, #1756 @ 0x6dc │ │ bl 270d9c0 │ │ ldr r7, [pc, #4032] @ 241ab2c │ │ mov r1, r0 │ │ ldr r7, [pc, r7] │ │ b 2419968 │ │ - stc2l 5, cr4, [r0, #440]! @ 0x1b8 │ │ + stc2l 5, cr4, [r0, #620]! @ 0x26c │ │ orrseq ip, r6, r4, asr r3 │ │ orrseq r8, r1, r4, ror r9 │ │ @ instruction: 0x0196c2fc │ │ orrseq r8, r1, ip, asr r9 │ │ - stc2l 3, cr4, [r2, #240]! @ 0xf0 │ │ - ldc2l 2, cr10, [pc, #540] @ 2419db0 │ │ + stc2l 3, cr4, [r2, #420]! @ 0x1a4 │ │ + ldc2l 2, cr10, [pc, #720] @ 2419e64 │ │ ldr r0, [pc, #3992] @ 241ab30 │ │ movw r2, #4464 @ 0x1170 │ │ movt r2, #1 │ │ ldr r0, [pc, r0] │ │ rsb r1, r0, r0, lsl #3 │ │ ldr r0, [pc, #3976] @ 241ab34 │ │ ldr r0, [pc, r0] │ │ @@ -1263030,26 +1263029,26 @@ │ │ mov r2, r4 │ │ movw r3, #1774 @ 0x6ee │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24194bc │ │ orrseq r7, r6, r0, ror r4 │ │ - ldc2l 4, cr12, [pc, #320] @ 2419d68 │ │ + ldc2l 4, cr12, [pc, #500] @ 2419e1c │ │ @ instruction: 0x019188d8 │ │ orrseq ip, r6, r4, ror #4 │ │ orrseq ip, r6, r0, asr r2 │ │ orrseq r8, r1, r8, ror #24 │ │ orrseq r8, r1, ip, lsr #17 │ │ orrseq ip, r6, r0, lsr r2 │ │ orrseq r8, r1, r8, asr #24 │ │ orrseq r7, r6, r0, ror #7 │ │ stc2l 13, cr3, [r3, #124]! @ 0x7c │ │ stc2l 11, cr3, [r3, #968]! @ 0x3c8 @ │ │ - stc2l 1, cr10, [r0, #772]! @ 0x304 │ │ + stc2l 1, cr10, [r0, #952]! @ 0x3b8 │ │ eorseq fp, r3, r8, lsl r5 │ │ ldr r4, [pc, #4004] @ 241ac00 │ │ ldr r5, [pc, #4004] @ 241ac04 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ mov r0, r4 │ │ mov r1, r5 │ │ @@ -1263091,21 +1263090,21 @@ │ │ sub r1, r0, #1 │ │ cmp r1, r6 │ │ bhi 2419e60 │ │ ldr r2, [pc, #3864] @ 241ac24 │ │ add r2, pc, r2 │ │ str r5, [r2, r1, lsl #2] │ │ b 2419e98 │ │ - stc2l 6, cr0, [r1, #8]! │ │ - stc2l 0, cr8, [r2, #952]! @ 0x3b8 │ │ + stc2l 6, cr0, [r1, #188]! @ 0xbc │ │ + stc2l 1, cr8, [r2, #108]! @ 0x6c │ │ stc2l 11, cr3, [r3, #520]! @ 0x208 @ │ │ - stc2l 1, cr10, [r0, #324]! @ 0x144 │ │ + stc2l 1, cr10, [r0, #504]! @ 0x1f8 │ │ eorseq fp, r3, r8, lsr #9 │ │ - stc2l 5, cr0, [r1, #584]! @ 0x248 │ │ - stc2l 8, cr1, [r3, #196]! @ 0xc4 │ │ + stc2l 5, cr0, [r1, #764]! @ 0x2fc │ │ + stc2l 8, cr1, [r3, #376]! @ 0x178 │ │ ldr r0, [pc, #3480] @ 241aad0 │ │ movw r3, #1627 @ 0x65b │ │ ldr r2, [pc, #3476] @ 241aad4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3464] @ 241aad8 │ │ @@ -1263140,20 +1263139,20 @@ │ │ movw r3, #1638 @ 0x666 │ │ ldr r2, [pc, #3372] @ 241aaf4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 241935c │ │ - stc2l 2, cr2, [r2, #300]! @ 0x12c │ │ - ldc2l 0, cr10, [pc, #732] @ 241a0c0 │ │ + stc2l 2, cr2, [r2, #480]! @ 0x1e0 │ │ + ldc2l 0, cr10, [pc, #912] @ 241a174 │ │ eorseq r1, r3, r8, lsr #15 │ │ orrseq r8, r1, r8, lsr r7 │ │ - stc2l 15, cr7, [r2, #680]! @ 0x2a8 │ │ - ldc2l 0, cr10, [pc, #476] @ 2419fd0 │ │ + stc2l 15, cr7, [r2, #860]! @ 0x35c │ │ + ldc2l 0, cr10, [pc, #656] @ 241a084 │ │ eorseq r6, r3, r8, lsl #11 │ │ ldr r0, [pc, #3324] @ 241aaf8 │ │ movw r3, #1641 @ 0x669 │ │ ldr r2, [pc, #3320] @ 241aafc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1263168,18 +1263167,18 @@ │ │ ldr r4, [pc, r4] │ │ cmp r2, r3 │ │ add r1, r1, r0, lsl #1 │ │ bhi 2419f14 │ │ lsl r0, r0, #1 │ │ b 2419428 │ │ @ instruction: 0x019186f8 │ │ - stc2l 0, cr4, [r2, #896]! @ 0x380 │ │ - ldc2l 0, cr10, [pc, #172] @ 2419f00 │ │ - stc2l 0, cr4, [r2, #656]! @ 0x290 │ │ - ldc2l 15, cr9, [pc, #956] @ 241a218 │ │ + stc2l 1, cr4, [r2, #52]! @ 0x34 │ │ + ldc2l 0, cr10, [pc, #352] @ 2419fb4 │ │ + stc2l 0, cr4, [r2, #836]! @ 0x344 │ │ + ldc2l 0, cr10, [pc, #112] @ 2419ecc │ │ orrseq r8, r1, r8, ror r6 │ │ orrseq r7, r6, ip, ror #2 │ │ ldr r0, [pc, #3520] @ 241ac28 │ │ movw r3, #3565 @ 0xded │ │ ldr r2, [pc, #3516] @ 241ac2c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1263214,15 +1263213,15 @@ │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ eorseq fp, r3, r8, lsl r3 │ │ orrseq r6, r6, ip, lsr #26 │ │ - stc2l 15, cr1, [r2, #976]! @ 0x3d0 │ │ + stc2l 0, cr2, [r2, #132]! @ 0x84 │ │ @ instruction: 0x0196bfb4 │ │ eorseq fp, r3, r8, ror #5 │ │ stc2l 5, cr5, [r3, #784]! @ 0x310 │ │ orrseq fp, r6, r8, lsl #31 │ │ ldr r0, [pc, #3052] @ 241ab08 │ │ movw r3, #1642 @ 0x66a │ │ ldr r2, [pc, #3048] @ 241ab0c │ │ @@ -1263245,22 +1263244,22 @@ │ │ movw r3, #1643 @ 0x66b │ │ ldr r2, [pc, #2992] @ 241ab1c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2419438 │ │ - stc2l 10, cr9, [r2, #880]! @ 0x370 @ │ │ - stc2l 14, cr7, [r2, #152]! @ 0x98 │ │ - ldc2l 14, cr9, [pc, #972] @ 241a358 │ │ + stc2l 11, cr9, [r2, #36]! @ 0x24 @ │ │ + stc2l 14, cr7, [r2, #332]! @ 0x14c │ │ + ldc2l 15, cr9, [pc, #128] @ 241a00c │ │ orrseq fp, r6, r8, lsl pc │ │ - stc2l 4, cr1, [r3, #960]! @ 0x3c0 │ │ - ldc2l 14, cr9, [pc, #764] @ 241a294 │ │ - stc2l 4, cr1, [r3, #704]! @ 0x2c0 │ │ - ldc2l 14, cr9, [pc, #508] @ 241a19c │ │ + stc2l 5, cr1, [r3, #116]! @ 0x74 │ │ + ldc2l 14, cr9, [pc, #944] @ 241a348 │ │ + stc2l 4, cr1, [r3, #884]! @ 0x374 │ │ + ldc2l 14, cr9, [pc, #688] @ 241a250 │ │ @ instruction: 0x019136f0 │ │ orrseq r8, r1, r8, lsl #10 │ │ eorseq r1, r3, r0, asr r5 │ │ ldr r0, [pc, #3212] @ 241ac3c │ │ movw r3, #3566 @ 0xdee │ │ ldr r2, [pc, #3208] @ 241ac40 │ │ add r0, pc, r0 │ │ @@ -1263302,15 +1263301,15 @@ │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r3, r0 │ │ b 2419ec4 │ │ eorseq r6, r3, ip, asr r3 │ │ orrseq r7, r6, ip, lsl r0 │ │ - stc2l 15, cr5, [r2, #996]! @ 0x3e4 │ │ + stc2l 0, cr6, [r2, #152]! @ 0x98 │ │ eorseq fp, r3, r8, ror #2 │ │ orrseq r6, r6, ip, ror fp │ │ eorseq fp, r3, r8, lsl #2 │ │ orrseq fp, r6, r0, lsl lr │ │ @ instruction: 0x0196bddc │ │ eorseq fp, r3, r8, lsl r1 │ │ orrseq r6, r6, ip, lsr #22 │ │ @@ -1263351,33 +1263350,33 @@ │ │ movt r8, #1 │ │ str r0, [r6] │ │ ldr r4, [pc, #3056] @ 241ad08 │ │ ldr r5, [pc, #3056] @ 241ad0c │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ b 241a1a4 │ │ - stc2l 3, cr6, [r0, #648]! @ 0x288 │ │ + stc2l 3, cr6, [r0, #828]! @ 0x33c │ │ eorseq fp, r3, r0, ror #1 │ │ - stc2l 4, cr1, [r3, #500]! @ 0x1f4 │ │ - stc2l 13, cr3, [r2, #768]! @ 0x300 │ │ - ldc2l 13, cr9, [pc, #44] @ 241a168 │ │ + stc2l 4, cr1, [r3, #680]! @ 0x2a8 │ │ + stc2l 13, cr3, [r2, #948]! @ 0x3b4 │ │ + ldc2l 13, cr9, [pc, #224] @ 241a21c │ │ @ instruction: 0x01918398 │ │ orrseq r6, r6, r8, lsl #19 │ │ - stc2l 13, cr3, [r2, #464]! @ 0x1d0 │ │ - ldc2l 12, cr9, [pc, #764] @ 241a448 │ │ - stc2l 14, cr1, [r2, #44]! @ 0x2c │ │ - ldc2l 12, cr9, [pc, #476] @ 241a330 │ │ + stc2l 13, cr3, [r2, #644]! @ 0x284 │ │ + ldc2l 12, cr9, [pc, #944] @ 241a4fc │ │ + stc2l 14, cr1, [r2, #224]! @ 0xe0 │ │ + ldc2l 12, cr9, [pc, #656] @ 241a3e4 │ │ eorseq r1, r3, r8, ror #6 │ │ @ instruction: 0x019182f8 │ │ - stc2l 11, cr7, [r2, #424]! @ 0x1a8 @ │ │ - ldc2l 12, cr9, [pc, #220] @ 241a240 │ │ + stc2l 11, cr7, [r2, #604]! @ 0x25c @ │ │ + ldc2l 12, cr9, [pc, #400] @ 241a2f4 │ │ eorseq r6, r3, r8, asr #2 │ │ @ instruction: 0x019182b8 │ │ - stc2l 12, cr3, [r2, #624]! @ 0x270 │ │ - ldc2l 11, cr9, [pc, #924] @ 241a510 @ │ │ + stc2l 12, cr3, [r2, #804]! @ 0x324 │ │ + ldc2l 12, cr9, [pc, #80] @ 241a1c4 │ │ mov r0, r4 │ │ mov r2, r5 │ │ movw r3, #5661 @ 0x161d │ │ bl 270d9c0 │ │ ldr r2, [pc, #2996] @ 241ad3c │ │ mov r1, r0 │ │ ldr r2, [pc, r2] │ │ @@ -1263461,16 +1263460,16 @@ │ │ rsb r2, r2, r2, lsl #3 │ │ add r1, r0, r2, lsl #1 │ │ sub r1, r1, #4 │ │ cmp r1, r8 │ │ bcs 241a170 │ │ mov r2, r0 │ │ b 241a18c │ │ - stc2l 1, cr1, [r3, #800]! @ 0x320 │ │ - ldc2l 11, cr9, [pc, #604] @ 241a544 @ │ │ + stc2l 1, cr1, [r3, #980]! @ 0x3d4 │ │ + ldc2l 11, cr9, [pc, #784] @ 241a5f8 @ │ │ orrseq r3, r1, r8, lsl #8 │ │ orrseq r8, r1, r0, lsr #4 │ │ eorseq r1, r3, r8, ror #4 │ │ eorseq r6, r3, r4, ror r0 │ │ ldr r0, [pc, #2128] @ 241ab4c │ │ ldr r1, [pc, #2128] @ 241ab50 │ │ ldr r2, [pc, #2128] @ 241ab54 │ │ @@ -1263498,16 +1263497,16 @@ │ │ str r0, [r7] │ │ b 241a338 │ │ orrseq r2, r2, r4, lsl r2 │ │ ldrhteq sl, [r3], -r8 │ │ orrseq r8, r1, r4, asr #3 │ │ orrseq fp, r6, r4, asr fp │ │ orrseq fp, r6, r8, lsr fp │ │ - stc2l 11, cr3, [r2, #464]! @ 0x1d0 @ │ │ - ldc2l 10, cr9, [pc, #764] @ 241a678 @ │ │ + stc2l 11, cr3, [r2, #644]! @ 0x284 @ │ │ + ldc2l 10, cr9, [pc, #944] @ 241a72c @ │ │ orrseq r8, r1, ip, asr #2 │ │ orrseq fp, r6, r0, ror #21 │ │ ldr r0, [pc, #2012] @ 241ab64 │ │ mvn r2, #9 │ │ ldr r0, [pc, r0] │ │ rsb r1, r0, r0, lsl #3 │ │ sub r0, r0, #1 │ │ @@ -1263542,17 +1263541,17 @@ │ │ b 2419ee4 │ │ orrseq r6, r6, r0, lsr #24 │ │ orrseq r6, r6, ip, lsl #14 │ │ orrseq r2, r2, r8, lsl r1 │ │ orrseq r8, r1, r8, ror #1 │ │ orrseq r6, r6, r0, ror #15 │ │ orrseq fp, r6, r4, lsl #21 │ │ - stc2l 0, cr6, [r0, #520]! @ 0x208 │ │ - ldc2l 10, cr9, [pc, #172] @ 241a4d8 @ │ │ - stc2l 1, cr14, [r0, #512]! @ 0x200 │ │ + stc2l 0, cr6, [r0, #700]! @ 0x2bc │ │ + ldc2l 10, cr9, [pc, #352] @ 241a58c @ │ │ + stc2l 1, cr14, [r0, #692]! @ 0x2b4 │ │ orrseq r8, r1, ip, lsl #1 │ │ orrseq r2, r2, r8, lsr #1 │ │ @ instruction: 0x01922094 │ │ orrseq r2, r2, r4, lsl #1 │ │ @ instruction: 0x01922090 │ │ orrseq r6, r6, ip, asr #22 │ │ orrseq fp, r6, r0, ror #19 │ │ @@ -1263600,15 +1263599,15 @@ │ │ sub r1, r0, #1 │ │ cmp r1, r6 │ │ bhi 241a578 │ │ ldr r2, [pc, #1704] @ 241aba8 │ │ add r2, pc, r2 │ │ str r5, [r2, r1, lsl #2] │ │ b 241a5b0 │ │ - stc2l 1, cr14, [r0, #32]! │ │ + stc2l 1, cr14, [r0, #212]! @ 0xd4 │ │ orrseq r2, r2, r0, lsr r0 │ │ orrseq r2, r2, r0, lsl r0 │ │ ldr r0, [pc, #1980] @ 241acd8 │ │ movw r3, #5653 @ 0x1615 │ │ ldr r2, [pc, #1976] @ 241acdc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1263694,15 +1263693,15 @@ │ │ ldr r3, [fp, #20] │ │ lsl r0, r0, #1 │ │ ldr r2, [fp, #16] │ │ b 241a0e8 │ │ orrseq fp, r6, ip, ror #16 │ │ @ instruction: 0x01917ebc │ │ @ instruction: 0x01921ed0 │ │ - stc2l 8, cr3, [r2, #496]! @ 0x1f0 │ │ + vcmla.f16 d19, d18, d25, #270 │ │ orrseq fp, r6, r4, lsl #16 │ │ orrseq r7, r1, r8, asr #28 │ │ orrseq r1, r2, ip, asr lr │ │ orrseq r7, r1, ip, lsr #28 │ │ ldr r0, [pc, #1316] @ 241abc0 │ │ movw r3, #3058 @ 0xbf2 │ │ ldr r2, [pc, #1312] @ 241abc4 │ │ @@ -1263737,15 +1263736,15 @@ │ │ sub r2, r2, #1 │ │ add r5, r3, #3 │ │ cmp r2, r6 │ │ add r1, r1, r0, lsl #1 │ │ bhi 241a7b0 │ │ lsl r0, r0, #1 │ │ b 241a5ec │ │ - stc2l 8, cr3, [r2, #112]! @ 0x70 │ │ + vcmla.f16 , q1, , #270 │ │ ldr r0, [pc, #1464] @ 241acf0 │ │ movw r3, #5655 @ 0x1617 │ │ ldr r2, [pc, #1460] @ 241acf4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ str r4, [sl, r0, lsl #2] │ │ @@ -1263767,15 +1263766,15 @@ │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r3, [fp, #20] │ │ b 241a0f4 │ │ @ instruction: 0x01917d9c │ │ @ instruction: 0x01921db0 │ │ - stc2l 7, cr3, [r2, #480]! @ 0x1e0 │ │ + stc2l 7, cr3, [r2, #660]! @ 0x294 │ │ @ instruction: 0x0196b6f8 │ │ orrseq r7, r1, r0, asr #26 │ │ ldr r0, [pc, #1068] @ 241abe4 │ │ movw r3, #3060 @ 0xbf4 │ │ ldr r2, [pc, #1064] @ 241abe8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1263799,40 +1263798,40 @@ │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r3, r0 │ │ b 241a5fc │ │ orrseq r1, r2, r4, asr #26 │ │ @ instruction: 0x01918098 │ │ - stc2l 3, cr13, [r1, #380]! @ 0x17c │ │ + stc2l 3, cr13, [r1, #560]! @ 0x230 │ │ orrseq r8, r1, ip, rrx │ │ stc2l 6, cr15, [fp, #688]! @ 0x2b0 │ │ orrseq r7, r1, ip, lsr #25 │ │ @ instruction: 0x0196629c │ │ orrseq fp, r6, r8, ror #12 │ │ orrseq fp, r6, r0, asr #12 │ │ orrseq fp, r6, r4, lsr #12 │ │ orrseq r7, r1, r4, ror #24 │ │ orrseq r1, r2, r8, ror ip │ │ - stc2l 6, cr3, [r2, #288]! @ 0x120 │ │ + stc2l 6, cr3, [r2, #468]! @ 0x1d4 │ │ orrseq r1, r2, r8, asr #24 │ │ orrseq r6, r6, ip, lsl r2 │ │ orrseq r1, r2, r0, asr ip │ │ orrseq r7, r1, r4, lsl #24 │ │ orrseq fp, r6, r0, lsl #11 │ │ orrseq fp, r6, r8, ror r5 │ │ @ instruction: 0x019661b0 │ │ orrseq r6, r6, r4, lsr #3 │ │ orrseq fp, r6, r4, asr #10 │ │ orrseq r7, r1, r0, asr #30 │ │ orrseq fp, r6, r0, asr r5 │ │ orrseq fp, r6, r4, lsl #10 │ │ - stc2l 1, cr7, [r2, #688]! @ 0x2b0 │ │ + stc2l 1, cr7, [r2, #868]! @ 0x364 │ │ stc2l 5, cr15, [fp, #32]! │ │ - stc2l 1, cr13, [r1, #268]! @ 0x10c │ │ + stc2l 1, cr13, [r1, #448]! @ 0x1c0 │ │ stc2l 4, cr15, [fp, #624]! @ 0x270 │ │ orrseq fp, r6, r8, asr #8 │ │ orrseq r1, r2, r8, lsr #21 │ │ ldr r0, [pc, #976] @ 241ac70 │ │ ldr r1, [pc, #976] @ 241ac74 │ │ add r0, pc, r0 │ │ ldr r1, [pc, r1] │ │ @@ -1263967,121 +1263966,121 @@ │ │ mov r2, #1 │ │ add r1, pc, r1 │ │ bl 270da90 │ │ ldr r0, [pc, #524] @ 241acc8 │ │ mov r1, #19 │ │ add r0, pc, r0 │ │ b 2416554 │ │ - vcmla.f16 , q0, , #270 │ │ + stc2l 8, cr15, [r0, #576]! @ 0x240 │ │ orrseq fp, r6, r8, lsr #8 │ │ stc2l 4, cr15, [fp, #320]! @ 0x140 │ │ - stc2l 2, cr1, [r2, #972]! @ 0x3cc │ │ - ldc2l 1, cr9, [pc, #380] @ 241ac58 │ │ + stc2l 3, cr1, [r2, #128]! @ 0x80 │ │ + ldc2l 1, cr9, [pc, #560] @ 241ad0c │ │ eorseq r0, r3, ip, asr #16 │ │ orrseq r7, r1, r0, ror #15 │ │ - stc2l 0, cr7, [r2, #328]! @ 0x148 │ │ - ldc2l 1, cr9, [pc, #124] @ 241ab68 │ │ + stc2l 0, cr7, [r2, #508]! @ 0x1fc │ │ + ldc2l 1, cr9, [pc, #304] @ 241ac1c │ │ eorseq r5, r3, r0, lsr r6 │ │ orrseq r7, r1, r4, lsr #15 │ │ - stc2l 1, cr3, [r2, #560]! @ 0x230 │ │ - ldc2l 0, cr9, [pc, #860] @ 241ae58 │ │ - stc2l 1, cr3, [r2, #320]! @ 0x140 │ │ - ldc2l 0, cr9, [pc, #620] @ 241ad70 │ │ + stc2l 1, cr3, [r2, #740]! @ 0x2e4 │ │ + ldc2l 1, cr9, [pc, #16] @ 241ab0c │ │ + stc2l 1, cr3, [r2, #500]! @ 0x1f4 │ │ + ldc2l 0, cr9, [pc, #800] @ 241ae24 │ │ orrseq r7, r1, r4, lsr #14 │ │ orrseq r6, r6, r8, lsl r2 │ │ - stc2l 0, cr3, [r2, #192]! @ 0xc0 │ │ - ldc2l 15, cr8, [pc, #492] @ 241ad00 │ │ + stc2l 0, cr3, [r2, #372]! @ 0x174 │ │ + ldc2l 15, cr8, [pc, #672] @ 241adb4 │ │ orrseq r7, r1, r8, lsl #12 │ │ @ instruction: 0x01965bf8 │ │ - stc2l 15, cr2, [r2, #928]! @ 0x3a0 │ │ - ldc2l 15, cr8, [pc, #204] @ 241abf0 │ │ + stc2l 0, cr3, [r2, #84]! @ 0x54 │ │ + ldc2l 15, cr8, [pc, #384] @ 241aca4 │ │ orrseq r7, r1, r0, asr #27 │ │ @ instruction: 0x01917db4 │ │ @ instruction: 0x0196b3d0 │ │ orrseq fp, r6, r8, lsr #7 │ │ orrseq r7, r1, r4, lsr #19 │ │ @ instruction: 0x019219b8 │ │ orrseq r7, r1, ip, lsl #19 │ │ - stc2l 3, cr3, [r2, #512]! @ 0x200 │ │ + stc2l 3, cr3, [r2, #692]! @ 0x2b4 │ │ orrseq r1, r2, r0, lsl #19 │ │ orrseq r1, r2, ip, lsl #19 │ │ - stc2l 10, cr13, [r0, #112]! @ 0x70 @ │ │ + stc2l 10, cr13, [r0, #292]! @ 0x124 @ │ │ orrseq r1, r2, r8, ror #4 │ │ eorseq r9, r3, ip, lsl pc │ │ @ instruction: 0x0196abd0 │ │ @ instruction: 0x0196abfc │ │ orrseq r5, r6, r4, lsr #26 │ │ @ instruction: 0x0196abb8 │ │ @ instruction: 0x019171b8 │ │ orrseq sl, r6, r0, asr #22 │ │ orrseq r7, r1, r0, lsr #3 │ │ - stc2l 11, cr2, [r2, #512]! @ 0x200 @ │ │ - ldc2l 10, cr8, [pc, #812] @ 241aea8 @ │ │ + stc2l 11, cr2, [r2, #692]! @ 0x2b4 @ │ │ + ldc2l 10, cr8, [pc, #992] @ 241af5c @ │ │ @ instruction: 0x01965cb4 │ │ orrseq r1, r2, ip, lsl #3 │ │ - stc2l 10, cr6, [r2, #152]! @ 0x98 @ │ │ + stc2l 10, cr6, [r2, #332]! @ 0x14c @ │ │ orrseq r7, r1, r0, lsr #9 │ │ @ instruction: 0x0196aabc │ │ ldrsbeq r7, [r1, r0] │ │ orrseq sl, r6, ip, lsl #21 │ │ - stc2l 10, cr2, [r2, #640]! @ 0x280 @ │ │ - ldc2l 9, cr8, [pc, #470] @ 241ad76 @ │ │ + stc2l 10, cr2, [r2, #820]! @ 0x334 @ │ │ + ldc2l 10, cr8, [pc, #96] @ 241ac00 @ │ │ ldrheq r1, [r2, r0] │ │ eorseq r9, r3, r4, asr sp │ │ orrseq r7, r1, r8, asr r0 │ │ orrseq r2, r1, r0, lsr #4 │ │ - stc2l 15, cr15, [r2, #288]! @ 0x120 │ │ - ldc2l 9, cr8, [pc, #46] @ 241abe6 @ │ │ + stc2l 15, cr15, [r2, #468]! @ 0x1d4 │ │ + ldc2l 9, cr8, [pc, #136] @ 241ac40 @ │ │ orrseq r2, r1, r8, lsl #3 │ │ orrseq r6, r1, r0, lsr #31 │ │ eorseq pc, r2, r8, ror #31 │ │ - stc2l 9, cr0, [r2, #286]! @ 0x11e @ │ │ - ldc2l 7, cr8, [pc, #1004] @ 241afb8 │ │ + stc2l 9, cr0, [r2, #376]! @ 0x178 @ │ │ + vcadd.f32 d24, d15, d24, #270 │ │ eorseq pc, r2, ip, ror #29 │ │ orrseq r6, r1, r0, lsl #29 │ │ ldrshteq r4, [r3], -r4 │ │ - stc2l 6, cr6, [r2, #968]! @ 0x3c8 │ │ - ldc2l 7, cr8, [pc, #764] @ 241aedc │ │ + stc2l 7, cr6, [r2, #124]! @ 0x7c │ │ + ldc2l 7, cr8, [pc, #944] @ 241af90 │ │ ldrsbteq r4, [r3], -r0 │ │ orrseq r6, r1, r0, asr #28 │ │ - stc2l 7, cr2, [r2, #592]! @ 0x250 │ │ - ldc2l 6, cr8, [pc, #892] @ 241af6c │ │ + stc2l 7, cr2, [r2, #772]! @ 0x304 │ │ + ldc2l 7, cr8, [pc, #48] @ 241ac20 │ │ orrseq r6, r1, r8, ror #26 │ │ - stc2l 7, cr2, [r2, #288]! @ 0x120 │ │ - ldc2l 6, cr8, [pc, #588] @ 241ae48 │ │ + stc2l 7, cr2, [r2, #468]! @ 0x1d4 │ │ + ldc2l 6, cr8, [pc, #768] @ 241aefc │ │ @ instruction: 0x01965a98 │ │ - stc2l 15, cr15, [r2, #788]! @ 0x314 │ │ + stc2l 15, cr15, [r2, #968]! @ 0x3c8 │ │ @ instruction: 0x01917c94 │ │ @ instruction: 0x0196b2b0 │ │ orrseq r7, r1, r4, asr #17 │ │ orrseq fp, r6, r0, lsl #5 │ │ - stc2l 2, cr3, [r2, #592]! @ 0x250 │ │ - ldc2l 1, cr9, [pc, #892] @ 241af98 │ │ + stc2l 2, cr3, [r2, #772]! @ 0x304 │ │ + ldc2l 2, cr9, [pc, #48] @ 241ac4c │ │ orrseq r1, r2, r4, lsr #17 │ │ eorseq sl, r3, r8, asr #10 │ │ orrseq r7, r1, ip, asr #16 │ │ orrseq r2, r1, r4, lsl sl │ │ - stc2l 6, cr0, [r3, #384]! @ 0x180 │ │ - ldc2l 0, cr9, [pc, #188] @ 241acf0 │ │ + stc2l 6, cr0, [r3, #564]! @ 0x234 │ │ + ldc2l 0, cr9, [pc, #368] @ 241ada4 │ │ orrseq r2, r1, r0, lsr #17 │ │ @ instruction: 0x019176b8 │ │ eorseq r0, r3, r0, lsl #14 │ │ - stc2l 0, cr1, [r2, #492]! @ 0x1ec │ │ - ldc2l 14, cr8, [pc, #924] @ 241afe4 │ │ + stc2l 0, cr1, [r2, #672]! @ 0x2a0 │ │ + ldc2l 15, cr8, [pc, #80] @ 241ac98 │ │ ldrsbteq r0, [r3], -r8 │ │ orrseq r7, r1, r8, ror #10 │ │ eorseq r5, r3, ip, lsl #10 │ │ - stc2l 13, cr6, [r2, #872]! @ 0x368 │ │ - ldc2l 14, cr8, [pc, #668] @ 241aef8 │ │ + stc2l 14, cr6, [r2, #28]! │ │ + ldc2l 14, cr8, [pc, #848] @ 241afac │ │ ldrhteq r5, [r3], -r8 │ │ orrseq r7, r1, r8, lsr #10 │ │ - stc2l 15, cr2, [r2, #48]! @ 0x30 │ │ - ldc2l 14, cr8, [pc, #348] @ 241adc8 │ │ + stc2l 15, cr2, [r2, #228]! @ 0xe4 │ │ + ldc2l 14, cr8, [pc, #528] @ 241ae7c │ │ orrseq r6, r6, ip, asr #3 │ │ - stc2l 11, cr8, [r2, #512]! @ 0x200 @ │ │ + stc2l 11, cr8, [r2, #692]! @ 0x2b4 @ │ │ eorseq r9, r3, r8, ror #18 │ │ orrseq sl, r6, r8, asr #12 │ │ eorseq r9, r3, ip, ror #18 │ │ orrseq r5, r6, r0, asr #15 │ │ eorseq r9, r3, r8, asr #18 │ │ orrseq r5, r6, r8, asr r7 │ │ eorseq r9, r3, r4, lsr #18 │ │ @@ -1264090,47 +1264089,47 @@ │ │ eorseq r9, r3, r4, asr #17 │ │ eorseq r9, r3, r4, lsr #17 │ │ orrseq r5, r6, r0, lsl #14 │ │ eorseq r9, r3, r0, lsl #17 │ │ @ instruction: 0x01916b90 │ │ orrseq r5, r6, r0, asr r1 │ │ orrseq sl, r6, ip, ror #9 │ │ - stc2l 10, cr4, [r0, #600]! @ 0x258 @ │ │ + stc2l 10, cr4, [r0, #780]! @ 0x30c @ │ │ @ instruction: 0x0196a4bc │ │ - stc2l 11, cr12, [r0, #728]! @ 0x2d8 @ │ │ - stc2l 4, cr8, [r0, #196]! @ 0xc4 │ │ + stc2l 11, cr12, [r0, #908]! @ 0x38c @ │ │ + stc2l 4, cr8, [r0, #376]! @ 0x178 │ │ ldrheq r5, [r6, r0] │ │ orrseq sl, r6, ip, lsr #8 │ │ - ldc2l 5, cr10, [pc, #860] @ 241b02c │ │ - stc2l 14, cr2, [r2, #784]! @ 0x310 │ │ - ldc2l 14, cr8, [pc, #60] @ 241ad14 │ │ + ldc2l 6, cr10, [pc, #16] @ 241ace0 │ │ + stc2l 14, cr2, [r2, #964]! @ 0x3c4 │ │ + ldc2l 14, cr8, [pc, #240] @ 241adc8 │ │ orrseq sl, r6, r0, lsr lr │ │ - stc2l 10, cr2, [r2, #192]! @ 0xc0 @ │ │ - ldc2l 9, cr8, [pc, #246] @ 241adda @ │ │ + stc2l 10, cr2, [r2, #372]! @ 0x174 @ │ │ + ldc2l 9, cr8, [pc, #336] @ 241ae34 @ │ │ @ instruction: 0x0196a994 │ │ - stc2l 9, cr2, [r2, #72]! @ 0x48 @ │ │ - vcadd.f32 q12, , , #270 │ │ + stc2l 9, cr2, [r2, #162]! @ 0xa2 @ │ │ + ldc2l 8, cr8, [pc, #624] @ 241af60 │ │ orrseq sl, r6, ip, lsl #17 │ │ - stc2l 8, cr2, [r2, #80]! @ 0x50 │ │ - ldc2l 7, cr8, [pc, #380] @ 241ae78 │ │ + vcmla.f16 q9, q1, , #270 │ │ + ldc2l 7, cr8, [pc, #560] @ 241af2c │ │ orrseq sl, r6, ip, ror r7 │ │ - stc2l 7, cr2, [r2, #816]! @ 0x330 │ │ - ldc2l 7, cr8, [pc, #92] @ 241ad64 │ │ + stc2l 7, cr2, [r2, #996]! @ 0x3e4 │ │ + ldc2l 7, cr8, [pc, #272] @ 241ae18 │ │ orrseq r1, r2, r0, ror #8 │ │ - stc2l 14, cr2, [r2, #224]! @ 0xe0 │ │ - ldc2l 13, cr8, [pc, #524] @ 241af20 │ │ - stc2l 3, cr7, [r0, #756]! @ 0x2f4 │ │ + stc2l 14, cr2, [r2, #404]! @ 0x194 │ │ + ldc2l 13, cr8, [pc, #704] @ 241afd4 │ │ + stc2l 3, cr7, [r0, #936]! @ 0x3a8 │ │ @ instruction: 0x01921394 │ │ @ instruction: 0x0196acfc │ │ orrseq r1, r2, r8, asr r3 │ │ - stc2l 3, cr11, [r0, #992]! @ 0x3e0 │ │ + stc2l 4, cr11, [r0, #148]! @ 0x94 │ │ orrseq r1, r2, r8, lsr #6 │ │ orrseq sl, r6, ip, lsl #25 │ │ orrseq r1, r2, r8, ror #5 │ │ - stc2l 15, cr2, [r0, #700]! @ 0x2bc │ │ + stc2l 15, cr2, [r0, #880]! @ 0x370 │ │ @ instruction: 0x019212b8 │ │ orrseq sl, r6, ip, lsl ip │ │ @ instruction: 0x019213dc │ │ │ │ 0241ad40 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ @@ -1264149,16 +1264148,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - stc2l 11, cr9, [r2, #196]! @ 0xc4 @ │ │ - stc2l 6, cr15, [r2, #916]! @ 0x394 │ │ + stc2l 11, cr9, [r2, #376]! @ 0x178 @ │ │ + stc2l 7, cr15, [r2, #72]! @ 0x48 │ │ │ │ 0241ad9c : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #64 @ 0x40 │ │ mov r3, r0 │ │ mov r0, #0 │ │ @@ -1264549,21 +1264548,21 @@ │ │ bl 270d1b0 │ │ ldr r0, [pc, #40] @ 241b384 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 15, cr1, [r0, #692]! @ 0x2b4 │ │ + stc2l 15, cr1, [r0, #872]! @ 0x368 │ │ orrseq r6, r1, r8, lsr r2 │ │ eorseq r8, r3, r0, lsl #30 │ │ @ instruction: 0x019165d0 │ │ orrseq r4, r6, r8, ror #26 │ │ orrseq r4, r6, r0, asr sp │ │ - stc2l 15, cr1, [r0, #292]! @ 0x124 │ │ + stc2l 15, cr1, [r0, #472]! @ 0x1d8 │ │ │ │ 0241b388 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #64 @ 0x40 │ │ mov r3, #0 │ │ str r1, [sp, #44] @ 0x2c │ │ @@ -1264780,32 +1264779,32 @@ │ │ bl 270d9f0 │ │ ldr r0, [pc, #84] @ 241b72c │ │ mov r1, #25 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ b 241b680 │ │ - stc2l 12, cr1, [r0, #264]! @ 0x108 │ │ + stc2l 12, cr1, [r0, #444]! @ 0x1bc │ │ eorseq r8, r3, ip, asr sp │ │ eorseq r8, r3, r8, asr sp │ │ - ldc2l 2, cr12, [pc, #696] @ 241b9b4 │ │ + ldc2l 2, cr12, [pc, #876] @ 241ba68 │ │ stc2l 4, cr1, [r3, #664]! @ 0x298 │ │ - stc2l 9, cr7, [r0, #202]! @ 0xca @ │ │ - ldc2l 11, cr9, [pc, #252] @ 241b804 @ │ │ - stc2l 9, cr15, [r1, #256]! @ 0x100 @ │ │ + stc2l 9, cr7, [r0, #292]! @ 0x124 @ │ │ + ldc2l 11, cr9, [pc, #432] @ 241b8b8 @ │ │ + stc2l 9, cr15, [r1, #346]! @ 0x15a @ │ │ eorseq r8, r3, ip, lsl #25 │ │ eorseq r8, r3, r4, ror ip │ │ - ldc2l 1, cr12, [pc, #808] @ 241ba40 │ │ - ldc2l 10, cr9, [pc, #752] @ 241ba0c @ │ │ - vcmla.f16 d23, d16, d1, #270 │ │ - stc2l 10, cr3, [r2, #140]! @ 0x8c @ │ │ - ldc2l 1, cr12, [pc, #280] @ 241b840 │ │ - vcmla.f16 , , , #270 │ │ - stc2l 7, cr7, [r0, #996]! @ 0x3e4 │ │ - stc2l 4, cr11, [r1, #1008]! @ 0x3f0 │ │ + ldc2l 1, cr12, [pc, #988] @ 241baf4 │ │ + ldc2l 10, cr9, [pc, #932] @ 241bac0 @ │ │ + vcmla.f16 d23, d16, d30, #270 │ │ + stc2l 10, cr3, [r2, #320]! @ 0x140 @ │ │ + ldc2l 1, cr12, [pc, #460] @ 241b8f4 │ │ + stc2l 8, cr7, [r1, #1008]! @ 0x3f0 │ │ + vcmla.f16 d23, d0, d22, #270 │ │ + stc2l 5, cr11, [r1, #164]! @ 0xa4 │ │ │ │ 0241b730 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ mov r5, r3 │ │ mov r9, r2 │ │ @@ -1264873,16 +1264872,16 @@ │ │ clz r0, r0 │ │ lsr r0, r0, #5 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 5, cr11, [pc, #908] @ 241bbe8 │ │ - ldc2l 6, cr11, [pc, #76] @ 241b8ac │ │ + ldc2l 6, cr11, [pc, #64] @ 241b89c │ │ + ldc2l 6, cr11, [pc, #256] @ 241b960 │ │ │ │ 0241b85c : │ │ ldr r1, [r0, #4] │ │ cmp r1, #99 @ 0x63 │ │ bgt 241b91c │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ @@ -1265030,17 +1265029,17 @@ │ │ cmp r0, #0 │ │ beq 241ba98 │ │ bl 2703030 │ │ mov r0, #0 │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ eorseq pc, r1, ip, lsr r9 @ │ │ - ldc2l 11, cr15, [pc, #412] @ 241bc4c @ │ │ + ldc2l 11, cr15, [pc, #592] @ 241bd00 @ │ │ eorseq pc, r1, r8, asr r9 @ │ │ - stc2l 11, cr5, [r0, #192]! @ 0xc0 @ │ │ + stc2l 11, cr5, [r0, #372]! @ 0x174 @ │ │ │ │ 0241bab4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ ldr r1, [r0, #4] │ │ mov r4, #0 │ │ @@ -1265184,15 +1265183,15 @@ │ │ eorseq pc, r1, r0, lsl #17 │ │ eorseq pc, r1, r8, lsr #16 │ │ eorseq pc, r1, r4, lsl #17 │ │ ldrsbteq pc, [r1], -r0 @ │ │ ldrsbteq pc, [r1], -r8 @ │ │ eorseq pc, r1, r4, ror r7 @ │ │ eorseq pc, r1, ip, lsl #15 │ │ - stc2l 8, cr5, [r0, #704]! @ 0x2c0 │ │ + stc2l 8, cr5, [r0, #884]! @ 0x374 │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ sub sp, sp, #1024 @ 0x400 │ │ add r9, sp, #4 │ │ mov r8, r2 │ │ mov r4, r1 │ │ @@ -1265278,19 +1265277,19 @@ │ │ ldr r0, [pc, #36] @ 241be88 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - vcmla.f16 d30, d2, d31, #270 │ │ - stc2l 7, cr5, [r0, #368]! @ 0x170 │ │ - stc2l 2, cr3, [r2, #176]! @ 0xb0 │ │ - stc2l 4, cr3, [r1, #52]! @ 0x34 │ │ - stc2l 7, cr14, [r2, #572]! @ 0x23c │ │ + stc2l 8, cr14, [r2, #368]! @ 0x170 │ │ + stc2l 7, cr5, [r0, #548]! @ 0x224 │ │ + stc2l 2, cr3, [r2, #356]! @ 0x164 │ │ + stc2l 4, cr3, [r1, #232]! @ 0xe8 │ │ + stc2l 7, cr14, [r2, #752]! @ 0x2f0 │ │ │ │ 0241be8c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r5, r1 │ │ mov r6, r0 │ │ @@ -1265362,24 +1265361,24 @@ │ │ ldr r0, [pc, #56] @ 241bfe4 │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, r4 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 7, cr15, [pc, #144] @ 241c058 │ │ - stc2l 13, cr0, [r2, #356]! @ 0x164 │ │ - stc2l 15, cr6, [r0, #420]! @ 0x1a4 │ │ - stc2l 4, cr9, [r0, #684]! @ 0x2ac │ │ - ldc2l 14, cr8, [pc, #848] @ 241c328 │ │ - stc2l 15, cr6, [r0, #228]! @ 0xe4 │ │ - vcadd.f32 , , , #270 │ │ - stc2l 15, cr6, [r0, #628]! @ 0x274 │ │ - stc2l 10, cr12, [r2, #264]! @ 0x108 @ │ │ - ldc2l 6, cr15, [pc, #192] @ 241c0ac │ │ + ldc2l 7, cr15, [pc, #324] @ 241c10c │ │ + stc2l 13, cr0, [r2, #536]! @ 0x218 │ │ + stc2l 15, cr6, [r0, #600]! @ 0x258 │ │ + stc2l 4, cr9, [r0, #864]! @ 0x360 │ │ + ldc2l 15, cr8, [pc, #4] @ 241bfdc │ │ + stc2l 15, cr6, [r0, #408]! @ 0x198 │ │ + ldc2l 8, cr13, [pc, #960] @ 241c3a0 │ │ + stc2l 15, cr6, [r0, #808]! @ 0x328 │ │ + stc2l 10, cr12, [r2, #444]! @ 0x1bc @ │ │ + ldc2l 6, cr15, [pc, #372] @ 241c160 │ │ │ │ 0241bfe8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ mov r6, r3 │ │ mov r4, r2 │ │ @@ -1265476,19 +1265475,19 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - vcmla.f16 q12, q1, , #270 │ │ - ldc2l 5, cr15, [pc, #456] @ 241c354 │ │ - stc2l 7, cr8, [r2, #316]! @ 0x13c │ │ - stc2l 15, cr2, [r2, #324]! @ 0x144 │ │ - stc2l 15, cr6, [r1, #468]! @ 0x1d4 │ │ + stc2l 8, cr8, [r2, #448]! @ 0x1c0 │ │ + ldc2l 5, cr15, [pc, #636] @ 241c408 │ │ + stc2l 7, cr8, [r2, #496]! @ 0x1f0 │ │ + stc2l 15, cr2, [r2, #504]! @ 0x1f8 │ │ + stc2l 15, cr6, [r1, #648]! @ 0x288 │ │ │ │ 0241c194 : │ │ push {fp, lr} │ │ mov fp, sp │ │ mov r3, r2 │ │ mov r2, r1 │ │ mov r1, r0 │ │ @@ -1265556,19 +1265555,19 @@ │ │ ldr r0, [pc, #36] @ 241c2b0 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 0, cr1, [r0, #656]! @ 0x290 │ │ - stc2l 15, cr4, [r1, #376]! @ 0x178 │ │ - stc2l 14, cr2, [r2, #16]! │ │ - stc2l 15, cr2, [r1, #916]! @ 0x394 │ │ - stc2l 0, cr1, [r0, #128]! @ 0x80 │ │ + stc2l 0, cr1, [r0, #836]! @ 0x344 │ │ + stc2l 15, cr4, [r1, #556]! @ 0x22c │ │ + stc2l 14, cr2, [r2, #196]! @ 0xc4 │ │ + stc2l 0, cr3, [r1, #72]! @ 0x48 │ │ + stc2l 0, cr1, [r0, #308]! @ 0x134 │ │ │ │ 0241c2b4 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #16 │ │ mov r4, r0 │ │ bl 270ce10 │ │ @@ -1265606,18 +1265605,18 @@ │ │ ldr r0, [pc, #32] @ 241c36c │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, r5 │ │ sub sp, fp, #8 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 7, cr12, [r2, #740]! @ 0x2e4 │ │ - stc2l 14, cr0, [r0, #72]! @ 0x48 │ │ + stc2l 7, cr12, [r2, #920]! @ 0x398 │ │ + stc2l 14, cr0, [r0, #252]! @ 0xfc │ │ eorseq r7, r3, ip, asr pc │ │ - stc2l 7, cr12, [r2, #292]! @ 0x124 │ │ + stc2l 7, cr12, [r2, #472]! @ 0x1d8 │ │ │ │ 0241c370 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #36 @ 0x24 │ │ mov r5, r1 │ │ ldr r1, [pc, #372] @ 241c4fc │ │ @@ -1266743,28 +1266742,28 @@ │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #2672] @ 241df7c │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 241c67c │ │ - stc2l 0, cr5, [r0, #544]! @ 0x220 │ │ - stc2l 0, cr14, [r2, #696]! @ 0x2b8 │ │ - stc2l 9, cr6, [r0, #194]! @ 0xc2 @ │ │ - stc2l 14, cr12, [r0, #40]! @ 0x28 │ │ + stc2l 0, cr5, [r0, #724]! @ 0x2d4 │ │ + stc2l 0, cr14, [r2, #876]! @ 0x36c │ │ + stc2l 9, cr6, [r0, #284]! @ 0x11c @ │ │ + stc2l 14, cr12, [r0, #220]! @ 0xdc │ │ @ instruction: 0x01968990 │ │ orrseq r8, r6, r4, lsl #21 │ │ orrseq r8, r6, ip, asr sl │ │ orrseq r8, r6, r8, asr #20 │ │ orrseq r8, r6, r0, lsr sl │ │ orrseq r8, r6, r4, lsr #20 │ │ orrseq r8, r6, r4, ror r9 │ │ orrseq r8, r6, r0, lsl #20 │ │ - stc2l 2, cr8, [r2, #312]! @ 0x138 │ │ - stc2l 0, cr11, [r0, #228]! @ 0xe4 │ │ + stc2l 2, cr8, [r2, #492]! @ 0x1ec │ │ + stc2l 0, cr11, [r0, #408]! @ 0x198 │ │ orrseq r8, r6, r4, asr #17 │ │ @ instruction: 0x019689b0 │ │ ldr r0, [pc, #2916] @ 241e0c0 │ │ ldr r0, [pc, r0] │ │ ldr r1, [sp, #28] │ │ add r0, r0, #1 │ │ str r0, [r1] │ │ @@ -1266833,20 +1266832,20 @@ │ │ ldr r7, [pc, #2700] @ 241e0f4 │ │ ldr r6, [pc, #2700] @ 241e0f8 │ │ add r7, pc, r7 │ │ add r6, pc, r6 │ │ b 241d6e8 │ │ orrseq r8, r6, r4, lsr #19 │ │ orrseq r8, r6, r0, lsr #19 │ │ - stc2l 1, cr8, [r2, #1012]! @ 0x3f4 │ │ - stc2l 15, cr10, [r0, #900]! @ 0x384 │ │ + stc2l 2, cr8, [r2, #168]! @ 0xa8 │ │ + stc2l 0, cr11, [r0, #56]! @ 0x38 │ │ orrseq r8, r6, r0, lsl r9 │ │ orrseq r8, r6, r0, asr r9 │ │ - ldc2l 1, cr13, [pc, #336] @ 241d7e4 │ │ - stc2l 15, cr10, [r0, #580]! @ 0x244 │ │ + ldc2l 1, cr13, [pc, #516] @ 241d898 │ │ + stc2l 15, cr10, [r0, #760]! @ 0x2f8 │ │ orrseq r8, r6, ip, lsl r9 │ │ mlaseq r3, r0, ip, r7 │ │ orrseq r8, r6, r4, lsr #18 │ │ orrseq r8, r6, r4, ror #26 │ │ orrseq r8, r6, r8, asr #26 │ │ orrseq r8, r6, r4, lsr sp │ │ orrseq r8, r6, r4, asr #26 │ │ @@ -1266892,31 +1266891,31 @@ │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #2508] @ 241e12c │ │ add r0, pc, r0 │ │ b 241d7d8 │ │ orrseq r8, r6, ip, lsr #17 │ │ - ldc2l 9, cr8, [pc, #320] @ 241d8b0 @ │ │ - stc2l 14, cr10, [r0, #996]! @ 0x3e4 │ │ + ldc2l 9, cr8, [pc, #410] @ 241d90a @ │ │ + stc2l 15, cr10, [r0, #152]! @ 0x98 │ │ orrseq r8, r6, ip, lsr #17 │ │ orrseq r8, r6, r8, ror #25 │ │ orrseq r8, r6, r8, ror #16 │ │ - stc2l 15, cr9, [r2, #304]! @ 0x130 │ │ - stc2l 14, cr10, [r0, #724]! @ 0x2d4 │ │ + stc2l 15, cr9, [r2, #484]! @ 0x1e4 │ │ + stc2l 14, cr10, [r0, #904]! @ 0x388 │ │ eorseq r7, r3, r4, ror fp │ │ orrseq r8, r6, r0, lsr r8 │ │ orrseq r8, r6, r8, lsl r8 │ │ - ldc2l 0, cr13, [pc, #128] @ 241d818 │ │ - stc2l 14, cr10, [r0, #372]! @ 0x174 │ │ + ldc2l 0, cr13, [pc, #308] @ 241d8cc │ │ + stc2l 14, cr10, [r0, #552]! @ 0x228 │ │ eorseq r7, r3, r8, ror #22 │ │ orrseq r8, r6, r4, lsr #24 │ │ orrseq r8, r6, r8, asr #15 │ │ - stc2l 0, cr8, [r2, #72]! @ 0x48 │ │ - stc2l 13, cr10, [r0, #1012]! @ 0x3f4 │ │ + stc2l 0, cr8, [r2, #252]! @ 0xfc │ │ + stc2l 14, cr10, [r0, #168]! @ 0xa8 │ │ orrseq r8, r6, r8, lsl #13 │ │ cmp r1, #3 │ │ bcc 241d7d0 │ │ ldr r0, [pc, #2416] @ 241e130 │ │ mov r2, r7 │ │ movw r3, #1174 @ 0x496 │ │ add r0, pc, r0 │ │ @@ -1266977,26 +1266976,26 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #2208] @ 241e150 │ │ ldr r0, [pc, r0] │ │ b 241d6b4 │ │ orrseq r8, r6, r4, ror #14 │ │ stc2l 7, cr3, [r3, #972]! @ 0x3cc │ │ - stc2l 13, cr10, [r0, #676]! @ 0x2a4 │ │ + stc2l 13, cr10, [r0, #856]! @ 0x358 │ │ orrseq r8, r6, ip, lsr #14 │ │ eorseq r7, r3, r8, ror #18 │ │ stc2l 7, cr3, [r3, #680]! @ 0x2a8 │ │ - stc2l 13, cr10, [r0, #356]! @ 0x164 │ │ + stc2l 13, cr10, [r0, #536]! @ 0x218 │ │ eorseq r7, r3, r4, asr fp │ │ - stc2l 9, cr12, [r0, #406]! @ 0x196 @ │ │ - stc2l 13, cr10, [r0, #100]! @ 0x64 │ │ + stc2l 9, cr12, [r0, #496]! @ 0x1f0 @ │ │ + stc2l 13, cr10, [r0, #280]! @ 0x118 │ │ stc2l 5, cr12, [fp, #880]! @ 0x370 │ │ orrseq r8, r6, r0, asr #13 │ │ - stc2l 9, cr12, [r0, #190]! @ 0xbe @ │ │ - stc2l 12, cr10, [r0, #692]! @ 0x2b4 │ │ + stc2l 9, cr12, [r0, #280]! @ 0x118 @ │ │ + stc2l 12, cr10, [r0, #872]! @ 0x368 │ │ stc2l 5, cr12, [fp, #432]! @ 0x1b0 │ │ ldr r2, [pc, #1676] @ 241df84 │ │ ldr r0, [pc, #1676] @ 241df88 │ │ add r2, pc, r2 │ │ add r0, pc, r0 │ │ ldr r0, [r0, #32] │ │ ldr r1, [pc, #1664] @ 241df8c │ │ @@ -1267058,23 +1267057,23 @@ │ │ mov r3, #936 @ 0x3a8 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #1480] @ 241dfc4 │ │ add r0, pc, r0 │ │ b 241da54 │ │ - ldc2l 6, cr8, [pc, #912] @ 241dd98 │ │ - stc2l 12, cr10, [r0, #244]! @ 0xf4 │ │ + ldc2l 7, cr8, [pc, #68] @ 241da4c │ │ + stc2l 12, cr10, [r0, #424]! @ 0x1a8 │ │ orrseq r8, r6, r4, lsl r5 │ │ - stc2l 11, cr4, [r0, #320]! @ 0x140 @ │ │ - stc2l 14, cr7, [r2, #144]! @ 0x90 │ │ - stc2l 4, cr6, [r0, #132]! @ 0x84 │ │ + stc2l 11, cr4, [r0, #500]! @ 0x1f4 @ │ │ + stc2l 14, cr7, [r2, #324]! @ 0x144 │ │ + stc2l 4, cr6, [r0, #312]! @ 0x138 │ │ ldrsbteq r7, [r3], -r4 │ │ @ instruction: 0x01968994 │ │ - stc2l 11, cr10, [r0, #628]! @ 0x274 @ │ │ + stc2l 11, cr10, [r0, #808]! @ 0x328 @ │ │ ldr r6, [pc, #1436] @ 241dfc8 │ │ cmp r1, #3 │ │ add r6, pc, r6 │ │ bcc 241da4c │ │ ldr r0, [pc, #1424] @ 241dfcc │ │ mov r2, r7 │ │ movw r3, #938 @ 0x3aa │ │ @@ -1267131,24 +1267130,24 @@ │ │ add r0, r2, r0 │ │ sub r1, r0, #4 │ │ cmp r1, #59 @ 0x3b │ │ bhi 241db50 │ │ str r4, [r9, r1, lsl #2] │ │ b 241db88 │ │ orrseq r8, r6, r4, lsl #10 │ │ - stc2l 11, cr9, [r2, #928]! @ 0x3a0 @ │ │ - stc2l 11, cr10, [r0, #324]! @ 0x144 @ │ │ + stc2l 12, cr9, [r2, #84]! @ 0x54 │ │ + stc2l 11, cr10, [r0, #504]! @ 0x1f8 @ │ │ eorseq r7, r3, r8, lsl #16 │ │ @ instruction: 0x019684f8 │ │ @ instruction: 0x019684d4 │ │ eorseq r7, r3, r0, lsl sl │ │ - stc2l 7, cr12, [r0, #588]! @ 0x24c │ │ - stc2l 10, cr10, [r0, #900]! @ 0x384 @ │ │ - stc2l 7, cr12, [r0, #396]! @ 0x18c │ │ - stc2l 10, cr10, [r0, #692]! @ 0x2b4 @ │ │ + stc2l 7, cr12, [r0, #768]! @ 0x300 │ │ + stc2l 11, cr10, [r0, #56]! @ 0x38 @ │ │ + stc2l 7, cr12, [r0, #576]! @ 0x240 │ │ + stc2l 10, cr10, [r0, #872]! @ 0x368 @ │ │ orrseq r8, r6, r4, lsr #8 │ │ mov r0, r6 │ │ mov r2, r7 │ │ movw r3, #943 @ 0x3af │ │ bl 270d9c0 │ │ str r4, [r9, r0, lsl #2] │ │ ldr r0, [pc, #1168] @ 241dffc │ │ @@ -1267196,19 +1267195,19 @@ │ │ cmp r1, r2 │ │ bge 241dd24 │ │ cmp r5, r0 │ │ ble 241d98c │ │ b 241dd24 │ │ orrseq r8, r6, r8, lsl #6 │ │ @ instruction: 0x019683f0 │ │ - stc2l 12, cr7, [r2, #356]! @ 0x164 │ │ - stc2l 10, cr10, [r0, #244]! @ 0xf4 @ │ │ + stc2l 12, cr7, [r2, #536]! @ 0x218 │ │ + stc2l 10, cr10, [r0, #424]! @ 0x1a8 @ │ │ orrseq r8, r6, ip, ror #6 │ │ orrseq r8, r6, ip, lsr #7 │ │ - stc2l 10, cr9, [r2, #560]! @ 0x230 @ │ │ + stc2l 10, cr9, [r2, #740]! @ 0x2e4 @ │ │ mov r0, r6 │ │ mov r2, r7 │ │ mov r3, #944 @ 0x3b0 │ │ bl 270d9c0 │ │ ldr r0, [r9, r0, lsl #2] │ │ ldr r1, [pc, #948] @ 241e00c │ │ ldr r1, [pc, r1] │ │ @@ -1267223,15 +1267222,15 @@ │ │ ldr r2, [pc, r2] │ │ add r0, r2, r0 │ │ sub r1, r0, #4 │ │ cmp r1, #59 @ 0x3b │ │ bhi 241dcb4 │ │ ldr r5, [r8, r1, lsl #2] │ │ b 241dba8 │ │ - stc2l 9, cr10, [r0, #490]! @ 0x1ea @ │ │ + stc2l 10, cr10, [r0, #136]! @ 0x88 @ │ │ ldrhteq r7, [r3], -r0 │ │ orrseq r8, r6, r4, lsl #7 │ │ orrseq r8, r6, r8, lsr #7 │ │ ldrsbteq r7, [r3], -r0 │ │ eorseq r7, r3, ip, asr #17 │ │ @ instruction: 0x01968798 │ │ orrseq r8, r6, ip, lsr #6 │ │ @@ -1267257,16 +1267256,16 @@ │ │ ldr r2, [pc, #800] @ 241e028 │ │ mov r1, r0 │ │ ldr r2, [pc, r2] │ │ b 241dba8 │ │ orrseq r8, r6, r4, lsl #15 │ │ orrseq r8, r6, r0, lsl #6 │ │ eorseq r7, r3, ip, ror r6 │ │ - ldc2l 11, cr12, [pc, #96] @ 241dd84 @ │ │ - stc2l 9, cr10, [r0, #170]! @ 0xaa @ │ │ + ldc2l 11, cr12, [pc, #276] @ 241de38 @ │ │ + stc2l 9, cr10, [r0, #260]! @ 0x104 @ │ │ ldr r6, [sp, #24] │ │ cmp r5, r0 │ │ str r4, [fp, #-32] @ 0xffffffe0 │ │ mov r4, #0 │ │ movwle r4, #1 │ │ b 241dd48 │ │ orrseq r8, r6, r8, asr #14 │ │ @@ -1267293,23 +1267292,23 @@ │ │ b 241c804 │ │ orrseq r8, r6, r4, lsl #5 │ │ orrseq r8, r6, ip, lsl #5 │ │ orrseq r8, r6, r8, ror r2 │ │ mlaseq r3, r0, r4, r7 │ │ ldrhteq r7, [r3], -r8 │ │ eorseq r7, r3, r4, asr #11 │ │ - vcmla.f16 d26, d16, d17, #270 │ │ + vcmla.f16 q13, q8, q7, #270 │ │ orrseq r8, r6, ip, lsr r2 │ │ - ldc2l 3, cr8, [pc, #48] @ 241ddec │ │ + ldc2l 3, cr8, [pc, #228] @ 241dea0 │ │ orrseq r8, r6, r4, lsl #4 │ │ orrseq r8, r6, ip, lsr r1 │ │ - ldc2l 2, cr8, [pc, #816] @ 241e0f8 │ │ + ldc2l 2, cr8, [pc, #996] @ 241e1ac │ │ orrseq r8, r6, r8, lsl #2 │ │ orrseq r8, r6, r0, asr #3 │ │ - stc2l 10, cr7, [r2, #36]! @ 0x24 @ │ │ + stc2l 10, cr7, [r2, #216]! @ 0xd8 @ │ │ ldr r0, [pc, #804] @ 241e0fc │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, #20 │ │ bcc 241de00 │ │ ldr r0, [pc, #788] @ 241e100 │ │ movw r3, #1144 @ 0x478 │ │ @@ -1267358,27 +1267357,27 @@ │ │ bl 270da90 │ │ ldr r0, [pc, #640] @ 241e120 │ │ mov r1, #22 │ │ add r0, pc, r0 │ │ b 241cb00 │ │ orrseq r8, r6, ip, lsl #3 │ │ orrseq r8, r6, r4, lsl r1 │ │ - stc2l 9, cr7, [r2, #410]! @ 0x19a @ │ │ + stc2l 9, cr7, [r2, #500]! @ 0x1f4 @ │ │ orrseq r8, r6, r4, asr r1 │ │ orrseq r8, r6, r0, ror #1 │ │ - stc2l 9, cr7, [r2, #284]! @ 0x11c @ │ │ + stc2l 9, cr7, [r2, #374]! @ 0x176 @ │ │ orrseq r8, r6, r8, lsl r1 │ │ orrseq r8, r6, r0 │ │ - stc2l 9, cr7, [r2, #164]! @ 0xa4 @ │ │ + stc2l 9, cr7, [r2, #254]! @ 0xfe @ │ │ orrseq r8, r6, r0, ror #1 │ │ orrseq r7, r6, ip, asr #31 │ │ - stc2l 7, cr9, [r2, #624]! @ 0x270 │ │ + stc2l 7, cr9, [r2, #804]! @ 0x324 │ │ orrseq r8, r6, r4, lsr #1 │ │ ldrhteq r7, [r3], -ip │ │ - stc2l 7, cr9, [r2, #384]! @ 0x180 │ │ + stc2l 7, cr9, [r2, #564]! @ 0x234 │ │ orrseq r8, r6, ip, rrx │ │ eorseq r7, r3, r8, lsl #7 │ │ orrseq r8, r6, r8, asr r0 │ │ stc2l 0, cr3, [r3, #476]! @ 0x1dc │ │ orrseq r7, r6, ip, asr #31 │ │ orrseq r7, r6, r4, asr #31 │ │ stc2l 0, cr3, [r3, #204]! @ 0xcc │ │ @@ -1267386,150 +1267385,150 @@ │ │ orrseq r7, r6, r0, lsl #31 │ │ stc2l 15, cr2, [r3, #984]! @ 0x3d8 │ │ orrseq r7, r6, r4, asr #30 │ │ orrseq r7, r6, ip, lsr pc │ │ stc2l 15, cr2, [r3, #712]! @ 0x2c8 │ │ orrseq r7, r6, r0, lsl #30 │ │ @ instruction: 0x01967ef8 │ │ - ldc2l 6, cr12, [pc, #896] @ 241e2a8 │ │ + ldc2l 7, cr12, [pc, #52] @ 241df5c │ │ @ instruction: 0x01967ebc │ │ @ instruction: 0x01967eb4 │ │ - vcadd.f32 q14, , q6, #270 │ │ + ldc2l 8, cr12, [pc, #484] @ 241e118 │ │ orrseq r8, r6, ip, lsr #32 │ │ orrseq r8, r6, r0, lsr #32 │ │ orrseq r8, r6, r0, lsl r0 │ │ orrseq r7, r6, r0, asr #24 │ │ orrseq r7, r6, ip, lsr #24 │ │ orrseq r7, r6, r0, lsr #24 │ │ orrseq r7, r6, ip, lsr #24 │ │ @ instruction: 0x01967bfc │ │ orrseq r7, r6, r0, asr #22 │ │ orrseq r7, r6, r0, ror #21 │ │ @ instruction: 0x01967bb4 │ │ - ldc2l 12, cr7, [pc, #672] @ 241e204 │ │ - stc2l 2, cr10, [r0, #4]! │ │ + ldc2l 12, cr7, [pc, #852] @ 241e2b8 │ │ + stc2l 2, cr10, [r0, #184]! @ 0xb8 │ │ @ instruction: 0x01967adc │ │ orrseq r7, r6, r0, lsr #23 │ │ - ldc2l 12, cr15, [pc, #248] @ 241e06c │ │ + ldc2l 12, cr15, [pc, #428] @ 241e120 │ │ orrseq r7, r6, ip, asr #22 │ │ - stc2l 3, cr7, [r2, #724]! @ 0x2d4 │ │ - stc2l 1, cr10, [r0, #612]! @ 0x264 │ │ + stc2l 3, cr7, [r2, #904]! @ 0x388 │ │ + stc2l 1, cr10, [r0, #792]! @ 0x318 │ │ orrseq r7, r6, r8, asr #21 │ │ orrseq r7, r6, r4, lsr #23 │ │ orrseq r7, r6, r4, ror #14 │ │ orrseq r7, r6, r4, ror r7 │ │ orrseq r7, r6, r0, lsr r7 │ │ - stc2l 2, cr9, [r1, #652]! @ 0x28c │ │ - stc2l 13, cr9, [r0, #388]! @ 0x184 │ │ + stc2l 2, cr9, [r1, #832]! @ 0x340 │ │ + stc2l 13, cr9, [r0, #568]! @ 0x238 │ │ stc2l 6, cr11, [fp, #64]! @ 0x40 │ │ orrseq r7, r6, ip, lsl r7 │ │ orrseq r7, r6, r8, asr #22 │ │ orrseq r7, r6, ip, lsr #22 │ │ - stc2l 13, cr9, [r0, #52]! @ 0x34 │ │ + stc2l 13, cr9, [r0, #232]! @ 0xe8 │ │ eorseq r6, r3, r8, lsl fp │ │ - stc2l 11, cr1, [r0, #328]! @ 0x148 @ │ │ + stc2l 11, cr1, [r0, #508]! @ 0x1fc @ │ │ orrseq r7, r6, r0, asr #13 │ │ orrseq r7, r6, r0, ror #21 │ │ stc2l 7, cr2, [r3, #40]! @ 0x28 │ │ - stc2l 1, cr3, [r2, #864]! @ 0x360 │ │ + stc2l 2, cr3, [r2, #20]! │ │ stc2l 5, cr11, [fp, #352]! @ 0x160 │ │ stc2l 6, cr2, [r3, #712]! @ 0x2c8 │ │ - stc2l 1, cr9, [r1, #572]! @ 0x23c │ │ + stc2l 1, cr9, [r1, #752]! @ 0x2f0 │ │ stc2l 5, cr11, [fp, #48]! @ 0x30 │ │ orrseq r7, r6, r0, asr #20 │ │ orrseq r7, r6, r0, lsr sl │ │ orrseq r7, r6, ip, lsr #11 │ │ @ instruction: 0x019675d4 │ │ stc2l 6, cr2, [r3, #204]! @ 0xcc │ │ ldrhteq r6, [r3], -ip │ │ orrseq r7, r6, ip, lsr #11 │ │ - stc2l 10, cr1, [r0, #88]! @ 0x58 @ │ │ + stc2l 10, cr1, [r0, #268]! @ 0x10c @ │ │ orrseq r7, r6, r8, lsr r5 │ │ @ instruction: 0x0196799c │ │ @ instruction: 0x019674bc │ │ orrseq r7, r6, r8, lsr #18 │ │ orrseq r7, r6, ip, asr #9 │ │ @ instruction: 0x019674bc │ │ orrseq r7, r6, r8, lsl #8 │ │ @ instruction: 0x019673fc │ │ @ instruction: 0x019673b8 │ │ orrseq r7, r6, r4, lsr #16 │ │ - ldc2l 11, cr11, [pc, #576] @ 241e264 @ │ │ + ldc2l 11, cr11, [pc, #756] @ 241e318 @ │ │ orrseq r7, r6, r8, asr r3 │ │ orrseq r7, r6, r4, asr #15 │ │ @ instruction: 0x01967794 │ │ - stc2l 7, cr11, [r0, #460]! @ 0x1cc │ │ + stc2l 7, cr11, [r0, #640]! @ 0x280 │ │ stc2l 3, cr11, [fp, #576]! @ 0x240 │ │ orrseq r7, r6, r8, lsl #9 │ │ orrseq r7, r6, r8, ror r4 │ │ @ instruction: 0x01967898 │ │ @ instruction: 0x019672d4 │ │ orrseq r7, r6, ip, asr #5 │ │ - stc2l 11, cr6, [r2, #184]! @ 0xb8 @ │ │ - stc2l 9, cr9, [r0, #50]! @ 0x32 @ │ │ + stc2l 11, cr6, [r2, #364]! @ 0x16c @ │ │ + stc2l 9, cr9, [r0, #140]! @ 0x8c @ │ │ orrseq r7, r6, r8, lsr #3 │ │ - stc2l 10, cr9, [r1, #216]! @ 0xd8 @ │ │ - stc2l 4, cr10, [r0, #852]! @ 0x354 │ │ + stc2l 10, cr9, [r1, #396]! @ 0x18c @ │ │ + stc2l 5, cr10, [r0, #8]! │ │ eorseq r7, r3, r4, asr #7 │ │ - stc2l 9, cr9, [r1, #500]! @ 0x1f4 @ │ │ - stc2l 4, cr10, [r0, #612]! @ 0x264 │ │ + stc2l 10, cr9, [r1, #156]! @ 0x9c @ │ │ + stc2l 4, cr10, [r0, #792]! @ 0x318 │ │ eorseq r7, r3, r8, lsl #7 │ │ orrseq r7, r6, r4, lsr #28 │ │ eorseq r7, r3, ip, ror #6 │ │ - stc2l 9, cr9, [r1, #348]! @ 0x15c @ │ │ - stc2l 4, cr10, [r0, #308]! @ 0x134 │ │ + stc2l 9, cr9, [r1, #438]! @ 0x1b6 @ │ │ + stc2l 4, cr10, [r0, #488]! @ 0x1e8 │ │ @ instruction: 0x019681dc │ │ orrseq r8, r6, r8, asr #3 │ │ orrseq r7, r6, ip, lsl #27 │ │ orrseq r7, r6, r0, lsl #27 │ │ eorseq r7, r3, r0, asr #6 │ │ eorseq r7, r3, ip, lsl #5 │ │ eorseq r7, r3, r8, asr r2 │ │ orrseq r7, r6, ip, ror ip │ │ - ldc2l 13, cr7, [pc, #448] @ 241e264 │ │ - stc2l 2, cr10, [r0, #804]! @ 0x324 │ │ + ldc2l 13, cr7, [pc, #628] @ 241e318 │ │ + stc2l 2, cr10, [r0, #984]! @ 0x3d8 │ │ orrseq r7, r6, r8, ror #25 │ │ eorseq r7, r3, r4, asr #4 │ │ eorseq r7, r3, r4, asr #4 │ │ orrseq r7, r6, r0, lsl sp │ │ orrseq r7, r6, r8, lsr #25 │ │ - ldc2l 13, cr7, [pc, #624] @ 241e330 │ │ - stc2l 2, cr10, [r0, #980]! @ 0x3d4 │ │ + ldc2l 13, cr7, [pc, #804] @ 241e3e4 │ │ + stc2l 3, cr10, [r0, #136]! @ 0x88 │ │ orrseq r7, r6, r0, ror #21 │ │ - stc2l 6, cr9, [r1, #408]! @ 0x198 │ │ - stc2l 1, cr10, [r0, #20]! │ │ + stc2l 6, cr9, [r1, #588]! @ 0x24c │ │ + stc2l 1, cr10, [r0, #200]! @ 0xc8 │ │ ldrshteq r6, [r3], -r4 │ │ - stc2l 15, cr1, [r0, #216]! @ 0xd8 │ │ - stc2l 0, cr10, [r0, #836]! @ 0x344 │ │ + stc2l 15, cr1, [r0, #396]! @ 0x18c │ │ + stc2l 0, cr10, [r0, #1016]! @ 0x3f8 │ │ orrseq r7, r6, r0, lsl #21 │ │ - stc2l 5, cr9, [r1, #780]! @ 0x30c │ │ - stc2l 0, cr10, [r0, #516]! @ 0x204 │ │ + stc2l 5, cr9, [r1, #960]! @ 0x3c0 │ │ + stc2l 0, cr10, [r0, #696]! @ 0x2b8 │ │ stc2l 9, cr11, [fp, #96]! @ 0x60 @ │ │ orrseq r7, r6, ip, lsr sl │ │ orrseq r7, r6, r8, ror #28 │ │ orrseq r7, r6, r4, lsl #20 │ │ - stc2l 0, cr10, [r0, #164]! @ 0xa4 │ │ - stc2l 14, cr1, [r0, #536]! @ 0x218 │ │ + stc2l 0, cr10, [r0, #344]! @ 0x158 │ │ + stc2l 14, cr1, [r0, #716]! @ 0x2cc │ │ orrseq r7, r6, r0, asr r2 │ │ - ldc2l 3, cr7, [pc, #272] @ 241e218 │ │ - stc2l 8, cr9, [r0, #628]! @ 0x274 │ │ + ldc2l 3, cr7, [pc, #452] @ 241e2cc │ │ + vcmla.f16 , q8, q5, #270 │ │ orrseq r7, r6, r0, ror r1 │ │ - stc2l 7, cr3, [r0, #688]! @ 0x2b0 │ │ - ldc2l 4, cr15, [pc, #524] @ 241e324 │ │ - stc2l 0, cr5, [r0, #500]! @ 0x1f4 │ │ + stc2l 7, cr3, [r0, #868]! @ 0x364 │ │ + ldc2l 4, cr15, [pc, #704] @ 241e3d8 │ │ + stc2l 0, cr5, [r0, #680]! @ 0x2a8 │ │ @ instruction: 0x019671f0 │ │ @ instruction: 0x019671d8 │ │ - stc2l 1, cr5, [r1, #48]! @ 0x30 │ │ + stc2l 1, cr5, [r1, #228]! @ 0xe4 │ │ orrseq r7, r6, r4, ror sp │ │ - stc2l 4, cr3, [r2, #464]! @ 0x1d0 │ │ + stc2l 4, cr3, [r2, #644]! @ 0x284 │ │ stc2l 7, cr11, [fp, #976]! @ 0x3d0 │ │ - stc2l 4, cr9, [r1, #44]! @ 0x2c │ │ + stc2l 4, cr9, [r1, #224]! @ 0xe0 │ │ stc2l 7, cr11, [fp, #544]! @ 0x220 │ │ @ instruction: 0x01967cb4 │ │ - stc2l 11, cr11, [r0, #156]! @ 0x9c @ │ │ + stc2l 11, cr11, [r0, #336]! @ 0x150 @ │ │ orrseq r7, r6, r4, asr #16 │ │ stc2l 7, cr11, [fp, #224]! @ 0xe0 │ │ @ instruction: 0x019677f0 │ │ orrseq r7, r6, r8, ror #15 │ │ orrseq r7, r6, r0, asr #15 │ │ orrseq r7, r6, ip, ror r9 │ │ │ │ @@ -1268545,17 +1268544,17 @@ │ │ add r0, pc, r0 │ │ b 241e654 │ │ @ instruction: 0x019672f0 │ │ eorseq r8, r3, r0, ror #23 │ │ orrseq ip, r6, r4, ror #9 │ │ orrseq ip, r6, r0, asr r5 │ │ orrseq ip, r6, r0, asr #8 │ │ - stc2l 13, cr4, [r1, #588]! @ 0x24c │ │ - stc2l 13, cr4, [r0, #416]! @ 0x1a0 │ │ - stc2l 12, cr4, [r0, #420]! @ 0x1a4 │ │ + stc2l 13, cr4, [r1, #768]! @ 0x300 │ │ + stc2l 13, cr4, [r0, #596]! @ 0x254 │ │ + stc2l 12, cr4, [r0, #600]! @ 0x258 │ │ ldr r5, [pc, #4064] @ 2420128 │ │ add r5, pc, r5 │ │ ldrb r0, [r5] │ │ cmp r0, #0 │ │ bne 241f194 │ │ ldr r6, [pc, #4048] @ 242012c │ │ ldr r1, [pc, #4048] @ 2420130 │ │ @@ -1268621,15 +1268620,15 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3880] @ 2420180 │ │ add r0, pc, r0 │ │ b 241e654 │ │ eorseq r8, r3, r4, lsr fp │ │ eorseq r8, r3, ip, lsr #22 │ │ - stc2l 12, cr10, [r1, #924]! @ 0x39c │ │ + stc2l 13, cr10, [r1, #80]! @ 0x50 │ │ ldr r0, [pc, #3860] @ 2420184 │ │ ldr r0, [pc, r0] │ │ cmp r0, #9 │ │ bgt 241f928 │ │ ldr r0, [pc, #3848] @ 2420188 │ │ ldr r1, [pc, #3848] @ 242018c │ │ add r0, pc, r0 │ │ @@ -1268639,17 +1268638,17 @@ │ │ ldr r1, [pc, #3836] @ 2420194 │ │ add r0, pc, r0 │ │ ldr r1, [pc, r1] │ │ ldr r5, [sp, #12] │ │ add r1, r1, #1 │ │ str r1, [r0] │ │ b 241fab0 │ │ - stc2l 12, cr12, [r1, #416]! @ 0x1a0 │ │ - stc2l 12, cr10, [r1, #732]! @ 0x2dc │ │ - stc2l 3, cr9, [r0, #756]! @ 0x2f4 │ │ + stc2l 12, cr12, [r1, #596]! @ 0x254 │ │ + stc2l 12, cr10, [r1, #912]! @ 0x390 │ │ + stc2l 3, cr9, [r0, #936]! @ 0x3a8 │ │ ldr r0, [pc, #4084] @ 24202b4 │ │ ldr r0, [pc, r0] │ │ cmp r0, #9 │ │ bgt 241fbc4 │ │ ldr r0, [pc, #4072] @ 24202b8 │ │ ldr r1, [pc, #4072] @ 24202bc │ │ add r0, pc, r0 │ │ @@ -1268659,15 +1268658,15 @@ │ │ ldr r1, [pc, #4060] @ 24202c4 │ │ add r0, pc, r0 │ │ ldr r1, [pc, r1] │ │ ldr r5, [sp, #12] │ │ add r1, r1, #1 │ │ str r1, [r0] │ │ b 241fd4c │ │ - stc2l 12, cr12, [r1, #112]! @ 0x70 │ │ + stc2l 12, cr12, [r1, #292]! @ 0x124 │ │ orrseq r7, r6, r4, lsl #3 │ │ eorseq r8, r3, r4, ror sl │ │ orrseq ip, r6, r8, ror r3 │ │ ldr r0, [pc, #4020] @ 24202c8 │ │ ldr r0, [pc, r0] │ │ cmp r0, #9 │ │ bgt 241fe00 │ │ @@ -1268680,26 +1268679,26 @@ │ │ ldr r1, [pc, r1] │ │ ldr sl, [sp, #12] │ │ add r1, r1, #1 │ │ str r1, [r0] │ │ b 2421720 │ │ orrseq ip, r6, r4, ror #7 │ │ @ instruction: 0x0196c2d4 │ │ - stc2l 1, cr1, [r0, #424]! @ 0x1a8 │ │ + stc2l 1, cr1, [r0, #604]! @ 0x25c │ │ orrseq ip, r6, r0, lsr r4 │ │ eorseq r6, r3, ip, lsl r2 │ │ - stc2l 3, cr9, [r0, #20]! │ │ + stc2l 3, cr9, [r0, #200]! @ 0xc8 │ │ ldrsheq r7, [r6, r0] │ │ eorseq r8, r3, r0, ror #19 │ │ orrseq ip, r6, r4, ror #5 │ │ orrseq ip, r6, r0, asr r3 │ │ orrseq ip, r6, r0, asr #4 │ │ - stc2l 9, cr6, [r1, #4]! @ │ │ - stc2l 11, cr4, [r0, #368]! @ 0x170 @ │ │ - stc2l 10, cr4, [r0, #372]! @ 0x174 @ │ │ + stc2l 9, cr6, [r1, #94]! @ 0x5e @ │ │ + stc2l 11, cr4, [r0, #548]! @ 0x224 @ │ │ + stc2l 10, cr4, [r0, #552]! @ 0x228 @ │ │ eorseq r8, r3, r8, lsr #18 │ │ eorseq r8, r3, r8, lsr #18 │ │ ldr r0, [pc, #4064] @ 2420370 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce20 │ │ ldr r0, [pc, #4052] @ 2420374 │ │ @@ -1268764,33 +1268763,33 @@ │ │ ldr r0, [pc, r0] │ │ sub r6, r0, #1 │ │ cmp r6, #10 │ │ bcs 24218d8 │ │ mov r8, r4 │ │ mov r3, r6 │ │ b 2421930 │ │ - stc2l 2, cr8, [r2, #476]! @ 0x1dc │ │ - stc2l 10, cr12, [r1, #368]! @ 0x170 @ │ │ - stc2l 2, cr8, [r2, #284]! @ 0x11c │ │ - stc2l 11, cr12, [r1, #268]! @ 0x10c @ │ │ - stc2l 10, cr12, [r1, #80]! @ 0x50 @ │ │ - stc2l 11, cr12, [r1, #92]! @ 0x5c @ │ │ + stc2l 2, cr8, [r2, #656]! @ 0x290 │ │ + stc2l 10, cr12, [r1, #548]! @ 0x224 @ │ │ + stc2l 2, cr8, [r2, #464]! @ 0x1d0 │ │ + stc2l 11, cr12, [r1, #448]! @ 0x1c0 @ │ │ + stc2l 10, cr12, [r1, #260]! @ 0x104 @ │ │ + stc2l 11, cr12, [r1, #272]! @ 0x110 @ │ │ orrseq r6, r6, r0, ror pc │ │ eorseq r8, r3, r0, ror #16 │ │ orrseq ip, r6, r4, ror #2 │ │ @ instruction: 0x0196c1d0 │ │ orrseq ip, r6, r0, asr #1 │ │ - ldc2l 2, cr11, [pc, #652] @ 241f760 │ │ - stc2l 9, cr4, [r0, #456]! @ 0x1c8 @ │ │ - vcmla.f16 q10, q8, , #270 │ │ + ldc2l 2, cr11, [pc, #832] @ 241f814 │ │ + stc2l 10, cr4, [r0, #68]! @ 0x44 @ │ │ + stc2l 9, cr4, [r0, #36]! @ 0x24 @ │ │ ldrhteq r8, [r3], -r0 │ │ eorseq r8, r3, ip, lsr #15 │ │ - stc2l 9, cr4, [r1, #260]! @ 0x104 @ │ │ - stc2l 14, cr0, [r0, #652]! @ 0x28c │ │ - stc2l 8, cr12, [r1, #576]! @ 0x240 │ │ + stc2l 9, cr4, [r1, #350]! @ 0x15e @ │ │ + stc2l 14, cr0, [r0, #832]! @ 0x340 │ │ + stc2l 8, cr12, [r1, #756]! @ 0x2f4 │ │ ldr r0, [pc, #4064] @ 24204d4 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce20 │ │ ldr r0, [pc, #4052] @ 24204d8 │ │ ldr r0, [pc, r0] │ │ cmp r0, #10 │ │ @@ -1268894,34 +1268893,34 @@ │ │ add r3, r2, r7, lsl #3 │ │ mov r2, r6 │ │ bl 270d4e0 │ │ bl 270db20 │ │ cmp r0, #0 │ │ bne 2420364 │ │ b 2420308 │ │ - stc2l 14, cr0, [r0, #460]! @ 0x1cc │ │ - vcmla.f16 q13, , q5, #270 │ │ - vcmla.f16 q14, , q4, #270 │ │ - stc2l 8, cr10, [r1, #632]! @ 0x278 │ │ - ldc2l 7, cr4, [pc, #612] @ 241f924 │ │ - stc2l 13, cr11, [r2, #212]! @ 0xd4 │ │ - stc2l 12, cr14, [r0, #704]! @ 0x2c0 │ │ - stc2l 7, cr12, [r1, #800]! @ 0x320 │ │ - stc2l 12, cr14, [r0, #528]! @ 0x210 │ │ + stc2l 14, cr0, [r0, #640]! @ 0x280 │ │ + stc2l 8, cr10, [r1, #988]! @ 0x3dc │ │ + stc2l 8, cr12, [r1, #468]! @ 0x1d4 │ │ + vcmla.f16 q13, , , #270 │ │ + ldc2l 7, cr4, [pc, #792] @ 241f9d8 │ │ + stc2l 13, cr11, [r2, #392]! @ 0x188 │ │ + stc2l 12, cr14, [r0, #884]! @ 0x374 │ │ + stc2l 7, cr12, [r1, #980]! @ 0x3d4 │ │ + stc2l 12, cr14, [r0, #708]! @ 0x2c4 │ │ @ instruction: 0x0196be98 │ │ orrseq r6, r6, r8, lsr #28 │ │ orrseq r6, r6, ip, lsl sp │ │ - stc2l 8, cr4, [r0, #368]! @ 0x170 │ │ + vcmla.f16 d20, d16, d9, #270 │ │ orrseq fp, r6, r0, ror lr │ │ - vcmla.f16 q14, , q2, #270 │ │ + stc2l 8, cr12, [r1, #452]! @ 0x1c4 │ │ orrseq fp, r6, r8, lsr #28 │ │ - stc2l 7, cr4, [r0, #880]! @ 0x370 │ │ + vcmla.f16 d20, d0, d9, #270 │ │ @ instruction: 0x0196bddc │ │ orrseq fp, r6, r4, lsl #27 │ │ - vcmla.f16 d16, d2, d31, #270 │ │ + stc2l 8, cr0, [r2, #368]! @ 0x170 │ │ ldr r0, [pc, #3820] @ 24205ec │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce20 │ │ ldr r0, [pc, #3808] @ 24205f0 │ │ ldr r0, [pc, r0] │ │ cmp r0, #10 │ │ @@ -1269027,33 +1269026,33 @@ │ │ cmp r0, #0 │ │ mov r7, r8 │ │ bne 2420424 │ │ b 24203c4 │ │ orrseq fp, r6, r4, ror sp │ │ orrseq r6, r6, r8, lsl #26 │ │ orrseq r6, r6, ip, lsl ip │ │ - stc2l 7, cr4, [r0, #208]! @ 0xd0 │ │ + stc2l 7, cr4, [r0, #388]! @ 0x184 │ │ @ instruction: 0x0196bdd0 │ │ - ldc2l 12, cr12, [pc, #860] @ 241fc28 │ │ + ldc2l 13, cr12, [pc, #16] @ 241f8dc │ │ orrseq fp, r6, r4, lsl #26 │ │ - ldc2l 14, cr8, [pc, #516] @ 241fad8 │ │ + ldc2l 14, cr8, [pc, #696] @ 241fb8c │ │ @ instruction: 0x0196bcb8 │ │ orrseq fp, r6, r8, lsl #25 │ │ - stc2l 9, cr10, [r0, #472]! @ 0x1d8 @ │ │ + stc2l 10, cr10, [r0, #100]! @ 0x64 @ │ │ orrseq fp, r6, r0, asr ip │ │ orrseq r6, r6, r8, ror #23 │ │ orrseq r6, r6, r4, lsr #22 │ │ - stc2l 6, cr4, [r0, #80]! @ 0x50 │ │ + stc2l 6, cr4, [r0, #260]! @ 0x104 │ │ orrseq fp, r6, r0, lsr sp │ │ - stc2l 5, cr12, [r1, #996]! @ 0x3e4 │ │ + stc2l 6, cr12, [r1, #152]! @ 0x98 │ │ orrseq fp, r6, r4, ror #23 │ │ - stc2l 11, cr2, [r0, #284]! @ 0x11c @ │ │ + stc2l 11, cr2, [r0, #464]! @ 0x1d0 @ │ │ orrseq fp, r6, r0, lsr #23 │ │ orrseq r6, r6, r4, lsl sl │ │ - ldc2l 13, cr8, [pc, #160] @ 241f9ac │ │ + ldc2l 13, cr8, [pc, #340] @ 241fa60 │ │ orrseq r6, r6, r8, asr #19 │ │ ldrhteq r8, [r3], -r8 │ │ @ instruction: 0x0196bbbc │ │ orrseq fp, r6, r8, lsr #24 │ │ orrseq fp, r6, r8, lsl fp │ │ @ instruction: 0x0196baf8 │ │ @ instruction: 0x01966a90 │ │ @@ -1269194,38 +1269193,38 @@ │ │ bhi 242044c │ │ ldr r0, [pc, #4036] @ 2420b0c │ │ mov r2, #1 │ │ add r0, pc, r0 │ │ str r2, [r0, r1, lsl #2] │ │ ldr r4, [r4] │ │ b 242048c │ │ - stc2l 4, cr4, [r0, #736]! @ 0x2e0 │ │ + stc2l 4, cr4, [r0, #916]! @ 0x394 │ │ @ instruction: 0x0196bbd4 │ │ - stc2l 4, cr12, [r1, #612]! @ 0x264 │ │ + stc2l 4, cr12, [r1, #792]! @ 0x318 │ │ orrseq fp, r6, r4, lsl #21 │ │ - stc2l 9, cr2, [r0, #470]! @ 0x1d6 @ │ │ + stc2l 10, cr2, [r0, #96]! @ 0x60 @ │ │ orrseq fp, r6, r4, asr #20 │ │ @ instruction: 0x019668b8 │ │ - ldc2l 11, cr8, [pc, #832] @ 241febc @ │ │ + ldc2l 11, cr8, [pc, #1012] @ 241ff70 @ │ │ orrseq r6, r6, r0, ror r8 │ │ eorseq r8, r3, r0, ror #2 │ │ orrseq fp, r6, r4, ror #20 │ │ @ instruction: 0x0196bad0 │ │ orrseq fp, r6, r0, asr #19 │ │ orrseq fp, r6, r0, lsr #19 │ │ orrseq r6, r6, r4, lsr r9 │ │ orrseq r6, r6, r8, asr #16 │ │ - stc2l 3, cr4, [r0, #384]! @ 0x180 │ │ + stc2l 3, cr4, [r0, #564]! @ 0x234 │ │ @ instruction: 0x0196b9fc │ │ - ldc2l 9, cr12, [pc, #6] @ 241fbae @ │ │ + ldc2l 9, cr12, [pc, #96] @ 241fc08 @ │ │ orrseq fp, r6, r0, lsr r9 │ │ - ldc2l 10, cr8, [pc, #692] @ 241fe64 @ │ │ + ldc2l 10, cr8, [pc, #872] @ 241ff18 @ │ │ orrseq fp, r6, r4, ror #17 │ │ @ instruction: 0x0196b8b4 │ │ - stc2l 6, cr10, [r0, #96]! @ 0x60 │ │ + stc2l 6, cr10, [r0, #276]! @ 0x114 │ │ orrseq r6, r6, r8, lsl #14 │ │ ldrshteq r7, [r3], -r8 │ │ @ instruction: 0x0196b8fc │ │ ldr r0, [pc, #3908] @ 2420b10 │ │ ldr r6, [pc, #3908] @ 2420b14 │ │ add r0, pc, r0 │ │ add r6, pc, r6 │ │ @@ -1269353,20 +1269352,20 @@ │ │ mov r2, #1 │ │ add r0, pc, r0 │ │ str r2, [r0, r1, lsl #2] │ │ ldr r4, [r4] │ │ b 2420534 │ │ orrseq fp, r6, r8, ror #18 │ │ orrseq fp, r6, r8, asr r8 │ │ - stc2l 1, cr4, [r0, #576]! @ 0x240 │ │ - stc2l 0, cr4, [r0, #580]! @ 0x244 │ │ + stc2l 1, cr4, [r0, #756]! @ 0x2f4 │ │ + stc2l 0, cr4, [r0, #760]! @ 0x2f8 │ │ eorseq r7, r3, ip, asr pc │ │ eorseq r7, r3, r0, asr pc │ │ - stc2l 1, cr4, [r1, #184]! @ 0xb8 │ │ - stc2l 1, cr12, [r1, #620]! @ 0x26c │ │ + stc2l 1, cr4, [r1, #364]! @ 0x16c │ │ + stc2l 1, cr12, [r1, #800]! @ 0x320 │ │ @ instruction: 0x019665f0 │ │ eorseq r7, r3, r0, ror #29 │ │ orrseq fp, r6, r4, ror #15 │ │ orrseq fp, r6, r0, asr r8 │ │ orrseq fp, r6, r0, asr #14 │ │ ldr r0, [pc, #3856] @ 2420d18 │ │ ldr r6, [pc, #3856] @ 2420d1c │ │ @@ -1269430,15 +1269429,15 @@ │ │ bcs 2421680 │ │ mov r8, r4 │ │ mov r3, r6 │ │ b 24216d8 │ │ orrseq fp, r6, r0, lsr #14 │ │ @ instruction: 0x019666b0 │ │ orrseq r6, r6, r0, lsr #11 │ │ - stc2l 0, cr4, [r0, #896]! @ 0x380 │ │ + stc2l 1, cr4, [r0, #52]! @ 0x34 │ │ @ instruction: 0x0196b6fc │ │ ldr r8, [pc, #4040] @ 2420ee0 │ │ ldr r0, [pc, #4040] @ 2420ee4 │ │ add r8, pc, r8 │ │ ldr r0, [pc, r0] │ │ str r0, [r8] │ │ cmp r0, #1 │ │ @@ -1269446,31 +1269445,31 @@ │ │ ldr r6, [pc, #4020] @ 2420ee8 │ │ mov r7, #10 │ │ ldr r5, [pc, #4016] @ 2420eec │ │ add r6, pc, r6 │ │ add r5, pc, r5 │ │ b 241ff9c │ │ orrseq fp, r6, r4, ror #13 │ │ - stc2l 0, cr12, [r1, #768]! @ 0x300 │ │ + stc2l 0, cr12, [r1, #948]! @ 0x3b4 │ │ orrseq fp, r6, r4, lsr #13 │ │ - stc2l 0, cr4, [r0, #400]! @ 0x190 │ │ + stc2l 0, cr4, [r0, #580]! @ 0x244 │ │ orrseq fp, r6, r4, ror #12 │ │ orrseq fp, r6, ip, lsl #12 │ │ - stc2l 0, cr0, [r2, #780]! @ 0x30c │ │ + stc2l 0, cr0, [r2, #960]! @ 0x3c0 │ │ @ instruction: 0x01966494 │ │ eorseq r7, r3, r4, lsl #27 │ │ orrseq fp, r6, r8, lsl #13 │ │ @ instruction: 0x0196b6f4 │ │ orrseq fp, r6, r4, ror #11 │ │ - stc2l 15, cr3, [r0, #128]! @ 0x80 │ │ - stc2l 14, cr3, [r0, #132]! @ 0x84 │ │ + stc2l 15, cr3, [r0, #308]! @ 0x134 │ │ + stc2l 14, cr3, [r0, #312]! @ 0x138 │ │ eorseq r7, r3, ip, ror #25 │ │ ldrsbteq r7, [r3], -ip │ │ - stc2l 14, cr3, [r1, #760]! @ 0x2f8 │ │ - stc2l 14, cr9, [r1, #504]! @ 0x1f8 │ │ + stc2l 14, cr3, [r1, #940]! @ 0x3ac │ │ + stc2l 14, cr9, [r1, #684]! @ 0x2ac │ │ ldr r0, [r5, r1, lsl #2] │ │ str r0, [r8] │ │ cmp r0, #0 │ │ ble 2420588 │ │ mov sl, r4 │ │ ldr r4, [r4] │ │ sub r1, r0, #1 │ │ @@ -1269583,20 +1269582,20 @@ │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 241ff8c │ │ orrseq fp, r6, r4, asr #11 │ │ @ instruction: 0x0196b4b4 │ │ - stc2l 14, cr3, [r1, #100]! @ 0x64 │ │ - stc2l 12, cr3, [r0, #916]! @ 0x394 │ │ + stc2l 14, cr3, [r1, #280]! @ 0x118 │ │ + stc2l 13, cr3, [r0, #72]! @ 0x48 │ │ ldrhteq r7, [r3], -r0 │ │ eorseq r7, r3, r8, lsr #23 │ │ - stc2l 13, cr3, [r1, #520]! @ 0x208 │ │ - stc2l 1, cr14, [r0, #672]! @ 0x2a0 │ │ + stc2l 13, cr3, [r1, #700]! @ 0x2bc │ │ + stc2l 1, cr14, [r0, #852]! @ 0x354 │ │ orrseq r6, r6, ip, ror #6 │ │ @ instruction: 0x0196b4b8 │ │ orrseq fp, r6, ip, lsr #7 │ │ orrseq r6, r6, r4, asr #6 │ │ orrseq r6, r6, r0, asr #6 │ │ ldr r0, [pc, #3992] @ 2421138 │ │ ldr r1, [pc, #3992] @ 242113c │ │ @@ -1269712,21 +1269711,21 @@ │ │ bl 270e560 │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 242126c │ │ ldr r0, [pc, #3948] @ 24212d8 │ │ add r0, pc, r0 │ │ b 241e654 │ │ - stc2l 9, cr5, [r1, #348]! @ 0x15c @ │ │ + stc2l 9, cr5, [r1, #438]! @ 0x1b6 @ │ │ orrseq r6, r6, r4, lsr r2 │ │ orrseq r6, r6, r4, lsl r2 │ │ orrseq fp, r6, r4, lsl #5 │ │ orrseq fp, r6, r8, asr r2 │ │ - stc2l 9, cr5, [r1, #162]! @ 0xa2 @ │ │ - stc2l 12, cr3, [r0, #128]! @ 0x80 │ │ + stc2l 9, cr5, [r1, #252]! @ 0xfc @ │ │ + stc2l 12, cr3, [r0, #308]! @ 0x134 │ │ orrseq r6, r6, r0, asr #2 │ │ orrseq fp, r6, r0, lsl r2 │ │ ldr r0, [pc, #4080] @ 242138c │ │ ldr r1, [pc, #4080] @ 2421390 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270e060 │ │ @@ -1269760,17 +1269759,17 @@ │ │ bl 270e4d0 │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 2420e90 │ │ ldr r0, [pc, #3968] @ 24213ac │ │ add r0, pc, r0 │ │ b 241e654 │ │ - stc2l 11, cr11, [r1, #1008]! @ 0x3f0 @ │ │ - stc2l 11, cr3, [r0, #848]! @ 0x350 @ │ │ - stc2l 0, cr0, [r0, #568]! @ 0x238 │ │ + stc2l 12, cr11, [r1, #164]! @ 0xa4 │ │ + stc2l 12, cr3, [r0, #4]! │ │ + stc2l 0, cr0, [r0, #748]! @ 0x2ec │ │ orrseq fp, r6, r0, asr r3 │ │ eorseq r5, r3, r0, asr #2 │ │ orrseq r6, r6, r0, rrx │ │ orrseq fp, r6, ip, lsr #3 │ │ ldr r0, [pc, #3932] @ 24213b0 │ │ movw r3, #2357 @ 0x935 │ │ ldr r2, [pc, #3928] @ 24213b4 │ │ @@ -1269801,21 +1269800,21 @@ │ │ str r5, [r3, r1, lsl #2] │ │ add r2, pc, r2 │ │ mov r1, r4 │ │ bl 270e070 │ │ ldr r0, [pc, #4024] @ 2421488 │ │ add r0, pc, r0 │ │ b 242183c │ │ - stc2l 10, cr3, [r1, #828]! @ 0x33c @ │ │ + stc2l 10, cr3, [r1, #1008]! @ 0x3f0 @ │ │ ldrsbeq r6, [r6, r4] │ │ ldrheq r6, [r6, r4] │ │ orrseq fp, r6, r0, lsr #3 │ │ ldrsheq fp, [r6, r4] │ │ - stc2l 7, cr5, [r1, #892]! @ 0x37c │ │ - stc2l 10, cr3, [r0, #752]! @ 0x2f0 @ │ │ + vcmla.f16 d21, d1, d12, #270 │ │ + stc2l 10, cr3, [r0, #932]! @ 0x3a4 @ │ │ orrseq r6, r6, r4 │ │ ldr r0, [pc, #3984] @ 242148c │ │ movw r3, #2005 @ 0x7d5 │ │ ldr r2, [pc, #3980] @ 2421490 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1269844,51 +1269843,51 @@ │ │ add r2, pc, r2 │ │ mov r1, r4 │ │ bl 270e070 │ │ ldr r0, [pc, #4076] @ 2421564 │ │ add r0, pc, r0 │ │ b 242183c │ │ orrseq fp, r6, ip, lsr #1 │ │ - ldc2l 0, cr12, [pc, #316] @ 24206c4 │ │ - stc2l 10, cr3, [r0, #448]! @ 0x1c0 @ │ │ + ldc2l 0, cr12, [pc, #496] @ 2420778 │ │ + stc2l 10, cr3, [r0, #628]! @ 0x274 @ │ │ ldr r0, [pc, #4056] @ 2421568 │ │ ldr r0, [pc, r0] │ │ str r0, [r8] │ │ cmp r0, #1 │ │ blt 2420be8 │ │ ldr r6, [pc, #4040] @ 242156c │ │ mov r7, #10 │ │ ldr r5, [pc, #4036] @ 2421570 │ │ add r6, pc, r6 │ │ add r5, pc, r5 │ │ b 2420624 │ │ - ldc2l 15, cr15, [pc, #168] @ 2420664 │ │ + ldc2l 15, cr15, [pc, #348] @ 2420718 │ │ orrseq fp, r6, ip, ror #3 │ │ ldrsbteq r4, [r3], -ip │ │ orrseq r5, r6, r4, lsr #30 │ │ orrseq fp, r6, ip, lsr r0 │ │ - ldc2l 1, cr8, [pc, #852] @ 2420924 │ │ - stc2l 10, cr3, [r0] @ │ │ + ldc2l 2, cr8, [pc, #8] @ 24205d8 │ │ + stc2l 10, cr3, [r0, #180]! @ 0xb4 @ │ │ orrseq fp, r6, r8 │ │ orrseq sl, r6, ip, asr #31 │ │ - stc2l 15, cr5, [r0, #920]! @ 0x398 │ │ - stc2l 9, cr3, [r0, #368]! @ 0x170 @ │ │ - vcmla.f16 d27, d17, d28, #270 │ │ + stc2l 0, cr6, [r0, #76]! @ 0x4c │ │ + stc2l 9, cr3, [r0, #458]! @ 0x1ca @ │ │ + stc2l 8, cr11, [r1, #868]! @ 0x364 │ │ eorseq r4, r3, ip, lsr #30 │ │ orrseq r5, r6, r8, asr pc │ │ - ldc2l 1, cr10, [pc, #348] @ 2420750 │ │ + ldc2l 1, cr10, [pc, #528] @ 2420804 │ │ orrseq r5, r6, ip, asr #29 │ │ orrseq r5, r6, ip, lsr #29 │ │ orrseq fp, r6, r4, lsl r0 │ │ orrseq sl, r6, r8, ror #29 │ │ - stc2l 12, cr11, [r0, #388]! @ 0x184 │ │ - stc2l 8, cr3, [r0, #704]! @ 0x2c0 │ │ + stc2l 12, cr11, [r0, #568]! @ 0x238 │ │ + stc2l 8, cr3, [r0, #884]! @ 0x374 │ │ orrseq r5, r6, r0, lsr #28 │ │ @ instruction: 0x0196ae9c │ │ - vcmla.f16 d27, d17, d1, #270 │ │ + vcmla.f16 d27, d17, d30, #270 │ │ ldr r0, [r5, r1, lsl #2] │ │ str r0, [r8] │ │ cmp r0, #0 │ │ ble 2420be8 │ │ mov sl, r4 │ │ ldr r4, [r4] │ │ sub r1, r0, #1 │ │ @@ -1269984,16 +1269983,16 @@ │ │ ldr r2, [pc, #4092] @ 2421798 │ │ sub r1, r1, #1 │ │ add r2, pc, r2 │ │ str r1, [r2] │ │ cmp r0, #0 │ │ bgt 2420624 │ │ b 2420be8 │ │ - vcmla.f16 , q0, q8, #270 │ │ - ldc2l 13, cr15, [pc, #104] @ 2420824 │ │ + vcmla.f16 d19, d16, d13, #270 │ │ + ldc2l 13, cr15, [pc, #284] @ 24208d8 │ │ @ instruction: 0x0196afdc │ │ eorseq r4, r3, ip, asr #27 │ │ orrseq r5, r6, ip, lsr sp │ │ add r1, r7, r0, lsl #1 │ │ mov r4, sl │ │ cmp r1, #32 │ │ bcc 2420614 │ │ @@ -1270002,16 +1270001,16 @@ │ │ ldr r2, [pc, #4028] @ 24217a0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2420614 │ │ orrseq sl, r6, r8, lsr lr │ │ - stc2l 13, cr1, [r0, #700]! @ 0x2bc │ │ - stc2l 7, cr3, [r0, #1008]! @ 0x3f0 │ │ + stc2l 13, cr1, [r0, #880]! @ 0x370 │ │ + vcmla.f16 d19, d0, d25, #270 │ │ orrseq sl, r6, r4, lsl #28 │ │ orrseq r5, r6, ip, ror #24 │ │ cmp r2, r0 │ │ bcc 241e528 │ │ ldr r1, [pc, #3980] @ 24217a4 │ │ mov r4, sl │ │ ldr r0, [pc, #3976] @ 24217a8 │ │ @@ -1270024,17 +1270023,17 @@ │ │ mov r6, #10 │ │ ldr r7, [pc, #3952] @ 24217b0 │ │ ldr r9, [pc, #3952] @ 24217b4 │ │ add sl, pc, sl │ │ add r7, pc, r7 │ │ add r9, pc, r9 │ │ b 242087c │ │ - stc2l 2, cr3, [r2, #64]! @ 0x40 │ │ - stc2l 7, cr3, [r0, #720]! @ 0x2d0 │ │ - stc2l 6, cr11, [r1, #672]! @ 0x2a0 │ │ + stc2l 2, cr3, [r2, #244]! @ 0xf4 │ │ + stc2l 7, cr3, [r0, #900]! @ 0x384 │ │ + stc2l 6, cr11, [r1, #852]! @ 0x354 │ │ eorseq r4, r3, r8, lsr #26 │ │ orrseq r8, r6, r4, asr r5 │ │ ldr r0, [r9, r1, lsl #2] │ │ ldr r1, [pc, #4060] @ 242184c │ │ add r1, pc, r1 │ │ cmp r0, #0 │ │ str r0, [r1] │ │ @@ -1270082,16 +1270081,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2420864 │ │ @ instruction: 0x01965c9c │ │ orrseq sl, r6, r4, lsl #28 │ │ @ instruction: 0x0196acd8 │ │ - stc2l 10, cr11, [r0, #324]! @ 0x144 @ │ │ - stc2l 6, cr3, [r0, #640]! @ 0x280 │ │ + stc2l 10, cr11, [r0, #504]! @ 0x1f8 @ │ │ + stc2l 6, cr3, [r0, #820]! @ 0x334 │ │ cmp r1, r0 │ │ bcc 241e6f4 │ │ str r8, [sp, #12] │ │ mov r4, sl │ │ ldr r9, [pc, #3948] @ 24218c4 │ │ ldr r0, [pc, #3948] @ 24218c8 │ │ add r9, pc, r9 │ │ @@ -1270105,28 +1270104,28 @@ │ │ ldr r7, [pc, #3924] @ 24218d4 │ │ add r8, pc, r8 │ │ add r6, pc, r6 │ │ add r7, pc, r7 │ │ b 24209e4 │ │ orrseq r5, r6, r0, lsl ip │ │ @ instruction: 0x0196ac90 │ │ - stc2l 6, cr11, [r1, #468]! @ 0x1d4 │ │ - stc2l 6, cr3, [r0, #336]! @ 0x150 │ │ - ldc2l 11, cr15, [pc, #56] @ 24209dc @ │ │ + stc2l 6, cr11, [r1, #648]! @ 0x288 │ │ + stc2l 6, cr3, [r0, #516]! @ 0x204 │ │ + ldc2l 11, cr15, [pc, #236] @ 2420a90 @ │ │ @ instruction: 0x0196add0 │ │ eorseq r4, r3, r0, asr #23 │ │ orrseq r5, r6, r0, lsr fp │ │ orrseq sl, r6, ip, lsr #24 │ │ - stc2l 11, cr1, [r0, #652]! @ 0x28c @ │ │ - stc2l 5, cr3, [r0, #960]! @ 0x3c0 │ │ + stc2l 11, cr1, [r0, #832]! @ 0x340 @ │ │ + stc2l 6, cr3, [r0, #116]! @ 0x74 │ │ @ instruction: 0x0196abf8 │ │ orrseq r5, r6, r4, ror #20 │ │ - stc2l 0, cr3, [r2, #32]! │ │ - stc2l 5, cr3, [r0, #688]! @ 0x2b0 │ │ - stc2l 4, cr11, [r1, #640]! @ 0x280 │ │ + stc2l 0, cr3, [r2, #212]! @ 0xd4 │ │ + stc2l 5, cr3, [r0, #868]! @ 0x364 │ │ + stc2l 4, cr11, [r1, #820]! @ 0x334 │ │ eorseq r4, r3, r0, lsr #22 │ │ orrseq r8, r6, ip, asr #6 │ │ ldr r0, [r7, r1, lsl #2] │ │ str r0, [r9] │ │ cmp r0, #0 │ │ ble 2421b44 │ │ mov r5, r4 │ │ @@ -1270171,16 +1270170,16 @@ │ │ mov r2, r6 │ │ movw r3, #3066 @ 0xbfa │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24209d4 │ │ orrseq sl, r6, r8, ror fp │ │ - stc2l 15, cr2, [r2, #608]! @ 0x260 │ │ - stc2l 5, cr3, [r0, #240]! @ 0xf0 │ │ + stc2l 15, cr2, [r2, #788]! @ 0x314 │ │ + stc2l 5, cr3, [r0, #420]! @ 0x1a4 │ │ @ instruction: 0x019682f0 │ │ eorseq r7, r3, r0, asr #5 │ │ cmp r2, r0 │ │ bcc 241e774 │ │ str r8, [sp, #12] │ │ mov r4, sl │ │ ldr r1, [pc, #3948] @ 2421a30 │ │ @@ -1270195,15 +1270194,15 @@ │ │ mov r9, #10 │ │ ldr r7, [pc, #3920] @ 2421a3c │ │ ldr r6, [pc, #3920] @ 2421a40 │ │ add sl, pc, sl │ │ add r7, pc, r7 │ │ add r6, pc, r6 │ │ b 2420b28 │ │ - ldc2l 9, cr15, [pc, #436] @ 2420cb8 @ │ │ + ldc2l 10, cr15, [pc, #28] @ 2420b20 @ │ │ orrseq sl, r6, r0, lsr #25 │ │ eorseq r4, r3, r8, lsl #21 │ │ orrseq sl, r6, r0, lsl #22 │ │ orrseq r5, r6, r4, asr sl │ │ @ instruction: 0x019659fc │ │ orrseq sl, r6, r8, ror #21 │ │ ldr r0, [r6, r1, lsl #2] │ │ @@ -1270252,16 +1270251,16 @@ │ │ mov r2, r7 │ │ movw r3, #3931 @ 0xf5b │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2420b18 │ │ orrseq sl, r6, ip, lsr sl │ │ - stc2l 1, cr5, [r1, #156]! @ 0x9c │ │ - stc2l 4, cr3, [r0, #16]! │ │ + stc2l 1, cr5, [r1, #336]! @ 0x150 │ │ + stc2l 4, cr3, [r0, #196]! @ 0xc4 │ │ ldr r0, [pc, #4076] @ 2421bdc │ │ ldr r0, [pc, r0] │ │ str r0, [r8] │ │ cmp r0, #1 │ │ blt 241e3a8 │ │ ldr r7, [pc, #4060] @ 2421be0 │ │ mov r9, #10 │ │ @@ -1270269,17 +1270268,17 @@ │ │ ldr r6, [pc, #4056] @ 2421be8 │ │ add r7, pc, r7 │ │ add r5, pc, r5 │ │ add r6, pc, r6 │ │ b 2420c50 │ │ orrseq r5, r6, ip, asr #18 │ │ @ instruction: 0x0196a9f4 │ │ - ldc2l 9, cr11, [pc, #302] @ 2420d5a @ │ │ - stc2l 3, cr3, [r0, #736]! @ 0x2e0 │ │ - ldc2l 8, cr15, [pc, #456] @ 2420dfc │ │ + ldc2l 9, cr11, [pc, #392] @ 2420db4 @ │ │ + stc2l 3, cr3, [r0, #916]! @ 0x394 │ │ + ldc2l 8, cr15, [pc, #636] @ 2420eb0 │ │ orrseq sl, r6, r4, lsr fp │ │ eorseq r4, r3, r4, lsr #18 │ │ orrseq r5, r6, ip, ror #16 │ │ @ instruction: 0x0196a990 │ │ ldr r0, [r5, r1, lsl #2] │ │ str r0, [r8] │ │ cmp r0, #0 │ │ @@ -1270303,47 +1270302,47 @@ │ │ sub r9, r0, #1 │ │ mov r8, r5 │ │ cmp r9, #10 │ │ mov r4, sl │ │ bcs 2420d34 │ │ mov r1, r9 │ │ b 2420d80 │ │ - ldc2l 11, cr7, [pc, #164] @ 2420d58 @ │ │ - stc2l 3, cr3, [r0, #336]! @ 0x150 │ │ + ldc2l 11, cr7, [pc, #344] @ 2420e0c @ │ │ + stc2l 3, cr3, [r0, #516]! @ 0x204 │ │ orrseq sl, r6, ip, asr r9 │ │ orrseq sl, r6, r4, lsr #18 │ │ add r1, r9, r0, lsl #1 │ │ mov r4, sl │ │ cmp r1, #32 │ │ bcc 2420c40 │ │ ldr r0, [pc, #4064] @ 2421cb4 │ │ mov r2, r6 │ │ movw r3, #4681 @ 0x1249 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2420c40 │ │ - stc2l 9, cr5, [r0, #124]! @ 0x7c @ │ │ - stc2l 3, cr3, [r0, #64]! @ 0x40 │ │ - stc2l 2, cr11, [r1, #16]! │ │ + stc2l 9, cr5, [r0, #214]! @ 0xd6 @ │ │ + stc2l 3, cr3, [r0, #244]! @ 0xf4 │ │ + stc2l 2, cr11, [r1, #196]! @ 0xc4 │ │ eorseq r4, r3, r4, lsl #17 │ │ @ instruction: 0x019658b0 │ │ @ instruction: 0x0196a8dc │ │ - vcmla.f16 , q8, q7, #270 │ │ - stc2l 2, cr3, [r0, #640]! @ 0x280 │ │ + stc2l 8, cr5, [r0, #1004]! @ 0x3ec │ │ + stc2l 2, cr3, [r0, #820]! @ 0x334 │ │ orrseq r5, r6, r4, asr r8 │ │ eorseq r7, r3, r0, lsr #32 │ │ orrseq sl, r6, ip, lsl #17 │ │ @ instruction: 0x019657b8 │ │ @ instruction: 0x019657bc │ │ orrseq sl, r6, ip, lsr #16 │ │ orrseq sl, r6, r0, lsl r8 │ │ @ instruction: 0x0196a7fc │ │ - stc2l 14, cr4, [r1, #980]! @ 0x3d4 │ │ - stc2l 1, cr3, [r0, #784]! @ 0x310 │ │ + stc2l 15, cr4, [r1, #136]! @ 0x88 │ │ + stc2l 1, cr3, [r0, #964]! @ 0x3c4 │ │ orrseq r5, r6, r4, ror #13 │ │ ldr r0, [pc, #4052] @ 2421d10 │ │ mov r1, r9 │ │ mov r2, r6 │ │ movw r3, #4649 @ 0x1229 │ │ add r0, pc, r0 │ │ mov r5, r6 │ │ @@ -1270418,17 +1270417,17 @@ │ │ sub r1, r1, #1 │ │ add r2, pc, r2 │ │ str r1, [r2] │ │ cmp r0, #0 │ │ bgt 2420c50 │ │ b 241e3a8 │ │ @ instruction: 0x0196a7b4 │ │ - stc2l 1, cr11, [r1, #640]! @ 0x280 │ │ - stc2l 1, cr3, [r0, #480]! @ 0x1e0 │ │ - ldc2l 6, cr15, [pc, #200] @ 2420f50 │ │ + stc2l 1, cr11, [r1, #820]! @ 0x334 │ │ + stc2l 1, cr3, [r0, #660]! @ 0x294 │ │ + ldc2l 6, cr15, [pc, #380] @ 2421004 │ │ @ instruction: 0x0196a8f4 │ │ eorseq r4, r3, r4, ror #13 │ │ orrseq r5, r6, r4, lsl #12 │ │ ldr r0, [pc, #4016] @ 2421e48 │ │ ldr r8, [pc, #4016] @ 2421e4c │ │ ldr r2, [pc, #4016] @ 2421e50 │ │ add r0, pc, r0 │ │ @@ -1270448,16 +1270447,16 @@ │ │ ldr r4, [r5] │ │ b 2421a80 │ │ orrseq sl, r6, r0, asr r7 │ │ orrseq sl, r6, r8, lsl r7 │ │ orrseq r5, r6, ip, lsr #13 │ │ orrseq r5, r6, r4, asr #11 │ │ orrseq sl, r6, ip, ror r7 │ │ - ldc2l 6, cr11, [pc, #220] @ 2420fd4 │ │ - stc2l 0, cr3, [r0, #352]! @ 0x160 │ │ + ldc2l 6, cr11, [pc, #400] @ 2421088 │ │ + stc2l 0, cr3, [r0, #532]! @ 0x214 │ │ orrseq sl, r6, r8, asr r6 │ │ mvn r1, #255 @ 0xff │ │ add r3, r1, r0, lsl #8 │ │ cmp r3, #2560 @ 0xa00 │ │ bcc 2420f2c │ │ ldr r0, [pc, #4008] @ 2421ebc │ │ mov r1, r3 │ │ @@ -1270512,26 +1270511,26 @@ │ │ bl 270e070 │ │ ldr r0, [pc, #3856] @ 2421ef0 │ │ ldr r0, [pc, r0] │ │ str r0, [r6] │ │ ldr r0, [pc, #3848] @ 2421ef4 │ │ add r0, pc, r0 │ │ b 241e654 │ │ - ldc2l 7, cr7, [pc, #932] @ 242139c │ │ - stc2l 0, cr3, [r0, #80]! @ 0x50 │ │ + ldc2l 8, cr7, [pc, #88] @ 2421050 │ │ + stc2l 0, cr3, [r0, #260]! @ 0x104 │ │ orrseq sl, r6, ip, lsl r6 │ │ - stc2l 6, cr5, [r0, #56]! @ 0x38 │ │ - stc2l 15, cr2, [r0, #896]! @ 0x380 │ │ + stc2l 6, cr5, [r0, #236]! @ 0xec │ │ + stc2l 0, cr3, [r0, #52]! @ 0x34 │ │ orrseq sl, r6, r0, asr #11 │ │ orrseq r5, r6, r4, lsl #11 │ │ - stc2l 14, cr10, [r1, #752]! @ 0x2f0 │ │ + stc2l 14, cr10, [r1, #932]! @ 0x3a4 │ │ eorseq r4, r3, ip, lsr r5 │ │ orrseq sl, r6, r4, lsr #11 │ │ - stc2l 2, cr9, [r0, #1008]! @ 0x3f0 │ │ - stc2l 15, cr2, [r0, #432]! @ 0x1b0 │ │ + stc2l 3, cr9, [r0, #164]! @ 0xa4 │ │ + stc2l 15, cr2, [r0, #612]! @ 0x264 │ │ orrseq sl, r6, r4, ror r5 │ │ orrseq sl, r6, ip, ror #10 │ │ @ instruction: 0x019654f4 │ │ orrseq r5, r6, r4, ror #9 │ │ orrseq sl, r6, r8, lsr r5 │ │ orrseq r5, r6, ip, asr #9 │ │ orrseq r5, r6, r0, asr #9 │ │ @@ -1270592,27 +1270591,27 @@ │ │ bl 270e070 │ │ ldr r0, [pc, #3596] @ 2421f2c │ │ ldr r0, [pc, r0] │ │ str r0, [r6] │ │ ldr r0, [pc, #3588] @ 2421f30 │ │ add r0, pc, r0 │ │ b 241e654 │ │ - stc2l 2, cr9, [r0, #336]! @ 0x150 │ │ - stc2l 14, cr2, [r0, #784]! @ 0x310 │ │ + stc2l 2, cr9, [r0, #516]! @ 0x204 │ │ + stc2l 14, cr2, [r0, #964]! @ 0x3c4 │ │ @ instruction: 0x0196a498 │ │ orrseq sl, r6, ip, lsl #9 │ │ orrseq r5, r6, ip, lsl r4 │ │ orrseq r5, r6, r8, lsl r4 │ │ - ldc2l 3, cr15, [pc, #88] @ 24211a8 │ │ + ldc2l 3, cr15, [pc, #268] @ 242125c │ │ @ instruction: 0x0196a5dc │ │ eorseq r4, r3, r4, asr #7 │ │ orrseq sl, r6, r8, lsr r4 │ │ - ldc2l 12, cr2, [pc, #624] @ 24213d0 │ │ - stc2l 13, cr2, [r0, #1008]! @ 0x3f0 │ │ - ldc2l 14, cr12, [pc, #792] @ 2421480 │ │ + ldc2l 12, cr2, [pc, #804] @ 2421484 │ │ + stc2l 14, cr2, [r0, #164]! @ 0xa4 │ │ + ldc2l 14, cr12, [pc, #972] @ 2421534 │ │ eorseq r4, r3, r8, ror #6 │ │ eorseq r4, r3, r8, ror #6 │ │ sub r1, r0, #1 │ │ cmp r1, #10 │ │ bcc 2421194 │ │ ldr r0, [pc, #4072] @ 2422168 │ │ movw r3, #2626 @ 0xa42 │ │ @@ -1270695,18 +1270694,18 @@ │ │ ldr r4, [r5] │ │ b 2421c30 │ │ @ instruction: 0x0196a3d8 │ │ orrseq sl, r6, ip, asr #6 │ │ orrseq r5, r6, r0, ror #5 │ │ @ instruction: 0x019652dc │ │ orrseq sl, r6, r0, lsr #6 │ │ - stc2l 3, cr5, [r0, #88]! @ 0x58 │ │ - stc2l 12, cr2, [r0, #928]! @ 0x3a0 │ │ + stc2l 3, cr5, [r0, #268]! @ 0x10c │ │ + stc2l 13, cr2, [r0, #84]! @ 0x54 │ │ @ instruction: 0x01965298 │ │ - stc2l 12, cr2, [r1, #364]! @ 0x16c │ │ + stc2l 12, cr2, [r1, #544]! @ 0x220 │ │ ldr r1, [pc, #3792] @ 24221b4 │ │ ldr r1, [pc, r1] │ │ cmp r0, r1 │ │ beq 2421330 │ │ ldr r7, [pc, #3780] @ 24221b8 │ │ ldr r5, [pc, #3780] @ 24221bc │ │ add r7, pc, r7 │ │ @@ -1270748,20 +1270747,20 @@ │ │ bl 270d970 │ │ b 241e65c │ │ @ instruction: 0x0196a39c │ │ @ instruction: 0x0196a290 │ │ orrseq r5, r6, r8, lsr #4 │ │ orrseq r5, r6, r4, lsr #4 │ │ orrseq sl, r6, r0, ror #4 │ │ - stc2l 6, cr2, [r2, #528]! @ 0x210 │ │ - stc2l 12, cr2, [r0, #160]! @ 0xa0 │ │ + stc2l 6, cr2, [r2, #708]! @ 0x2c4 │ │ + stc2l 12, cr2, [r0, #340]! @ 0x154 │ │ @ instruction: 0x019679d8 │ │ - ldc2l 4, cr9, [pc, #188] @ 2421470 │ │ - stc2l 15, cr10, [r0, #436]! @ 0x1b4 │ │ - stc2l 11, cr2, [r0, #752]! @ 0x2f0 @ │ │ + ldc2l 4, cr9, [pc, #368] @ 2421524 │ │ + stc2l 15, cr10, [r0, #616]! @ 0x268 │ │ + stc2l 11, cr2, [r0, #932]! @ 0x3a4 @ │ │ orrseq r5, r6, r0, lsr r1 │ │ ldr r1, [pc, #3600] @ 24221d4 │ │ ldr r1, [pc, r1] │ │ cmp r0, r1 │ │ beq 2421410 │ │ ldr r4, [pc, #3588] @ 24221d8 │ │ ldr r5, [pc, #3588] @ 24221dc │ │ @@ -1270806,17 +1270805,17 @@ │ │ b 241e65c │ │ @ instruction: 0x0196a1b8 │ │ @ instruction: 0x01965094 │ │ orrseq r5, r6, r4 │ │ orrseq r5, r6, ip, lsl r1 │ │ orrseq sl, r6, ip, ror r1 │ │ orrseq sl, r6, ip, ror r2 │ │ - stc2l 10, cr8, [r1, #780]! @ 0x30c @ │ │ - stc2l 8, cr4, [r1, #220]! @ 0xdc │ │ - stc2l 11, cr2, [r0, #80]! @ 0x50 @ │ │ + stc2l 10, cr8, [r1, #960]! @ 0x3c0 @ │ │ + vcmla.f16 q10, , q10, #270 │ │ + stc2l 11, cr2, [r0, #260]! @ 0x104 @ │ │ orrseq r5, r6, r0, rrx │ │ orrseq sl, r6, r0, lsl r1 │ │ orrseq r4, r6, r4, asr #31 │ │ ldrheq sl, [r6, r8] │ │ orrseq r5, r6, r0, ror r0 │ │ ldrsbeq sl, [r6, r4] │ │ orrseq sl, r6, r4, asr r1 │ │ @@ -1270861,15 +1270860,15 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #4072] @ 2422540 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ str r0, [r4] │ │ b 241e65c │ │ - stc2l 1, cr6, [r2, #732]! @ 0x2dc │ │ + stc2l 1, cr6, [r2, #912]! @ 0x390 │ │ orrseq r5, r6, r0, asr #32 │ │ orrseq r4, r6, ip, ror pc │ │ orrseq sl, r6, ip, lsl #3 │ │ ldr r0, [pc, #4040] @ 2422544 │ │ movw r3, #2358 @ 0x936 │ │ ldr r2, [pc, #4036] @ 2422548 │ │ add r0, pc, r0 │ │ @@ -1270911,29 +1270910,29 @@ │ │ movw r3, #2007 @ 0x7d7 │ │ ldr r2, [pc, #4024] @ 24225d4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2420544 │ │ - stc2l 9, cr10, [r1, #482]! @ 0x1e2 @ │ │ - stc2l 9, cr2, [r0, #416]! @ 0x1a0 @ │ │ + stc2l 10, cr10, [r1, #120]! @ 0x78 @ │ │ + stc2l 9, cr2, [r0, #506]! @ 0x1fa @ │ │ @ instruction: 0x01969fd0 │ │ - stc2l 15, cr0, [r0, #252]! @ 0xfc │ │ - stc2l 9, cr2, [r0, #280]! @ 0x118 @ │ │ + stc2l 15, cr0, [r0, #432]! @ 0x1b0 │ │ + stc2l 9, cr2, [r0, #370]! @ 0x172 @ │ │ @ instruction: 0x01969f94 │ │ - stc2l 3, cr2, [r2, #720]! @ 0x2d0 │ │ - stc2l 9, cr2, [r0, #176]! @ 0xb0 @ │ │ + stc2l 3, cr2, [r2, #900]! @ 0x384 │ │ + stc2l 9, cr2, [r0, #266]! @ 0x10a @ │ │ @ instruction: 0x01964ddc │ │ @ instruction: 0x019676fc │ │ - stc2l 8, cr10, [r1, #208]! @ 0xd0 │ │ + vcmla.f16 q13, , , #270 │ │ ldrhteq r3, [r3], -r4 │ │ orrseq r9, r6, ip, lsl pc │ │ - ldc2l 0, cr7, [pc, #768] @ 2421968 │ │ - vcmla.f16 q9, q8, q10, #270 │ │ + ldc2l 0, cr7, [pc, #948] @ 2421a1c │ │ + stc2l 9, cr2, [r0, #34]! @ 0x22 @ │ │ orrseq r9, r6, ip, ror #29 │ │ orrseq r9, r6, r4, ror #29 │ │ orrseq r4, r6, r0, ror lr │ │ orrseq r4, r6, r0, ror #28 │ │ @ instruction: 0x01969eb0 │ │ orrseq r4, r6, r8, asr #28 │ │ ldr r0, [pc, #3920] @ 24225d8 │ │ @@ -1271003,20 +1271002,20 @@ │ │ ldr r0, [pc, #3988] @ 242271c │ │ mov r2, #1 │ │ add r0, pc, r0 │ │ str r2, [r0, r1, lsl #2] │ │ ldr r4, [r4] │ │ b 24217f8 │ │ orrseq r4, r6, ip, lsr lr │ │ - ldc2l 0, cr7, [pc, #64] @ 24217e4 │ │ - stc2l 8, cr2, [r0, #208]! @ 0xd0 │ │ + ldc2l 0, cr7, [pc, #244] @ 2421898 │ │ + vcmla.f16 q9, q0, , #270 │ │ orrseq r9, r6, r4, lsl lr │ │ orrseq r4, r6, ip, lsr #27 │ │ orrseq r4, r6, r4, ror #25 │ │ - stc2l 7, cr2, [r0, #848]! @ 0x350 │ │ + vcmla.f16 d18, d0, d1, #270 │ │ @ instruction: 0x01969ef0 │ │ ldr r0, [pc, #3936] @ 2422720 │ │ movw r3, #2708 @ 0xa94 │ │ ldr r2, [pc, #3932] @ 2422724 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1271048,15 +1271047,15 @@ │ │ ldr r0, [pc, #3848] @ 2422744 │ │ add r0, pc, r0 │ │ ldr r1, [pc, #3844] @ 2422748 │ │ ldr r1, [pc, r1] │ │ str r1, [r4] │ │ b 241e654 │ │ orrseq r9, r6, r4, asr #27 │ │ - stc2l 7, cr10, [r1, #612]! @ 0x264 │ │ + stc2l 7, cr10, [r1, #792]! @ 0x318 │ │ orrseq r9, r6, r4, lsl #27 │ │ ldr r0, [pc, #4084] @ 2422854 │ │ movw r3, #2709 @ 0xa95 │ │ ldr r2, [pc, #4080] @ 2422858 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1271073,22 +1271072,22 @@ │ │ movw r3, #2710 @ 0xa96 │ │ ldr r2, [pc, #4036] @ 2422868 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2421808 │ │ - stc2l 12, cr0, [r0, #956]! @ 0x3bc │ │ + stc2l 13, cr0, [r0, #112]! @ 0x70 │ │ orrseq r9, r6, r8, asr #26 │ │ @ instruction: 0x01964bbc │ │ - ldc2l 14, cr6, [pc, #848] @ 2421c18 │ │ + ldc2l 15, cr6, [pc, #4] @ 24218cc │ │ @ instruction: 0x01969cd8 │ │ orrseq r4, r6, ip, ror #24 │ │ orrseq r4, r6, r0, lsl #23 │ │ - stc2l 6, cr2, [r0, #608]! @ 0x260 │ │ + stc2l 6, cr2, [r0, #788]! @ 0x314 │ │ orrseq r9, r6, r4, lsr sp │ │ ldr r0, [pc, #3980] @ 242286c │ │ mov r1, r6 │ │ ldr r2, [pc, #3976] @ 2422870 │ │ movw r3, #1609 @ 0x649 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1271125,15 +1271124,15 @@ │ │ bl 270db20 │ │ cmp r0, #0 │ │ mov r4, r8 │ │ beq 24201c8 │ │ ldr r0, [pc, #3856] @ 2422890 │ │ add r0, pc, r0 │ │ b 241e654 │ │ - ldc2l 11, cr10, [pc, #956] @ 2421d48 @ │ │ + ldc2l 12, cr10, [pc, #112] @ 24219fc │ │ orrseq r9, r6, ip, lsl ip │ │ ldr r0, [pc, #3840] @ 2422894 │ │ movw r3, #1654 @ 0x676 │ │ ldr r2, [pc, #3836] @ 2422898 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1271164,22 +1271163,22 @@ │ │ add r1, r1, r0 │ │ sub r3, r3, r0 │ │ mov r0, r6 │ │ bl 270d970 │ │ ldr r0, [pc, #3992] @ 24229b4 │ │ add r0, pc, r0 │ │ b 241e654 │ │ - ldc2l 13, cr6, [pc, #660] @ 2421cbc │ │ + ldc2l 13, cr6, [pc, #840] @ 2421d70 │ │ @ instruction: 0x01969bdc │ │ orrseq r9, r6, ip, lsr #23 │ │ - stc2l 9, cr8, [r0, #56]! @ 0x38 @ │ │ + stc2l 9, cr8, [r0, #146]! @ 0x92 @ │ │ orrseq r9, r6, ip, ror #22 │ │ @ instruction: 0x01964afc │ │ orrseq r4, r6, r8, ror #19 │ │ - stc2l 5, cr2, [r0, #160]! @ 0xa0 │ │ + stc2l 5, cr2, [r0, #340]! @ 0x154 │ │ orrseq r9, r6, r4, asr #22 │ │ ldr r0, [pc, #3948] @ 24229b8 │ │ movw r3, #1258 @ 0x4ea │ │ ldr r2, [pc, #3944] @ 24229bc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1271234,17 +1271233,17 @@ │ │ ldr r0, [pc, #3776] @ 24229e4 │ │ ldr r1, [pc, #3776] @ 24229e8 │ │ add r0, pc, r0 │ │ ldr r1, [pc, r1] │ │ add r1, r1, #1 │ │ str r1, [r0] │ │ b 24220c0 │ │ - stc2l 4, cr10, [r1, #976]! @ 0x3d0 │ │ + stc2l 5, cr10, [r1, #132]! @ 0x84 │ │ @ instruction: 0x01969ad8 │ │ - stc2l 4, cr2, [r0, #608]! @ 0x260 │ │ + stc2l 4, cr2, [r0, #788]! @ 0x314 │ │ ldr r0, [pc, #3744] @ 24229ec │ │ ldr r0, [pc, r0] │ │ cmp r0, #9 │ │ bgt 24221e8 │ │ ldr r0, [pc, #3732] @ 24229f0 │ │ ldr r1, [pc, #3732] @ 24229f4 │ │ add r0, pc, r0 │ │ @@ -1271256,15 +1271255,15 @@ │ │ ldr r1, [pc, r1] │ │ ldr r5, [sp, #12] │ │ add r1, r1, #1 │ │ str r1, [r0] │ │ b 2422374 │ │ @ instruction: 0x01969a98 │ │ orrseq r9, r6, r0, asr #20 │ │ - stc2l 4, cr14, [r1, #988]! @ 0x3dc │ │ + stc2l 5, cr14, [r1, #144]! @ 0x90 │ │ ldr r0, [pc, #4080] @ 2422b8c │ │ ldr r0, [pc, r0] │ │ cmp r0, #9 │ │ bgt 242243c │ │ ldr r0, [pc, #4068] @ 2422b90 │ │ ldr r1, [pc, #4068] @ 2422b94 │ │ add r0, pc, r0 │ │ @@ -1271278,16 +1271277,16 @@ │ │ ldr r9, [sp, #12] │ │ add r1, r1, #1 │ │ str r1, [r0] │ │ b 2422aa4 │ │ @ instruction: 0x019649d8 │ │ orrseq r4, r6, r8, asr #17 │ │ orrseq r9, r6, r8, lsr #20 │ │ - stc2l 4, cr2, [r0, #16]! │ │ - stc2l 3, cr10, [r1, #816]! @ 0x330 │ │ + stc2l 4, cr2, [r0, #196]! @ 0xc4 │ │ + stc2l 3, cr10, [r1, #996]! @ 0x3e4 │ │ orrseq r9, r6, r8, lsr #19 │ │ ldr r0, [pc, #4004] @ 2422ba0 │ │ mov r3, #852 @ 0x354 │ │ ldr r2, [pc, #4000] @ 2422ba4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1271329,15 +1271328,15 @@ │ │ add r0, r7, r1, lsl #3 │ │ add r1, sp, #16 │ │ mov r2, r5 │ │ bl 270e090 │ │ ldr r0, [pc, #4048] @ 2422c80 │ │ add r0, pc, r0 │ │ b 241e654 │ │ - stc2l 3, cr14, [r1, #940]! @ 0x3ac │ │ + stc2l 4, cr14, [r1, #96]! @ 0x60 │ │ add r0, r1, r0, lsl #7 │ │ ldr r4, [fp, #24] │ │ sub r2, r2, r1 │ │ sub r1, r0, #129 @ 0x81 │ │ cmp r1, #1280 @ 0x500 │ │ add r2, r2, #1 │ │ str r2, [sp, #16] │ │ @@ -1271352,17 +1271351,17 @@ │ │ ldr r0, [pc, #3984] @ 2422c8c │ │ mov r2, r4 │ │ add r0, pc, r0 │ │ add r0, r0, r1, lsl #3 │ │ add r1, sp, #16 │ │ bl 270e090 │ │ b 241e65c │ │ - stc2l 2, cr2, [r0, #880]! @ 0x370 │ │ + stc2l 3, cr2, [r0, #36]! @ 0x24 │ │ @ instruction: 0x019698d8 │ │ - ldc2l 1, cr2, [pc, #256] @ 2421e20 │ │ + ldc2l 1, cr2, [pc, #436] @ 2421ed4 │ │ sub r2, r2, r1 │ │ add r0, r1, r0, lsl #8 │ │ movw r1, #257 @ 0x101 │ │ ldr r4, [fp, #28] │ │ sub r1, r0, r1 │ │ add r2, r2, #1 │ │ cmp r1, #2560 @ 0xa00 │ │ @@ -1271380,18 +1271379,18 @@ │ │ add r0, pc, r0 │ │ add r0, r0, r1, lsl #2 │ │ add r1, sp, #16 │ │ bl 270e260 │ │ b 241e65c │ │ orrseq r9, r6, ip, asr #16 │ │ eorseq r3, r3, r0, lsl r8 │ │ - stc2l 1, cr10, [r1, #480]! @ 0x1e0 │ │ + stc2l 1, cr10, [r1, #660]! @ 0x294 │ │ ldrshteq r3, [r3], -r8 │ │ orrseq r9, r6, r0, ror #16 │ │ - stc2l 2, cr14, [r1, #860]! @ 0x35c │ │ + stc2l 3, cr14, [r1, #16]! │ │ orrseq r9, r6, r4, lsr r8 │ │ orrseq r9, r6, r8, lsr #16 │ │ orrseq r4, r6, ip, lsr #15 │ │ orrseq r9, r6, r4, lsl #16 │ │ @ instruction: 0x01964794 │ │ ldr r0, [pc, #4016] @ 2422d5c │ │ movw r3, #1655 @ 0x677 │ │ @@ -1271459,44 +1271458,44 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #4060] @ 2422e8c │ │ ldr r0, [pc, r0] │ │ b 2421a8c │ │ orrseq r9, r6, r8, ror r7 │ │ orrseq r4, r6, r8, asr r6 │ │ - stc2l 11, cr1, [r2, #336]! @ 0x150 @ │ │ - stc2l 0, cr2, [r0, #992]! @ 0x3e0 │ │ + stc2l 11, cr1, [r2, #516]! @ 0x204 @ │ │ + stc2l 1, cr2, [r0, #148]! @ 0x94 │ │ orrseq r6, r6, ip, lsr #29 │ │ eorseq r5, r3, ip, ror lr │ │ orrseq r9, r6, r4, ror #13 │ │ - stc2l 4, cr10, [r0, #372]! @ 0x174 │ │ - stc2l 0, cr2, [r0, #688]! @ 0x2b0 │ │ + stc2l 4, cr10, [r0, #552]! @ 0x228 │ │ + stc2l 0, cr2, [r0, #868]! @ 0x364 │ │ @ instruction: 0x019696b4 │ │ orrseq r4, r6, r4, lsl r6 │ │ orrseq r4, r6, r8, lsr r6 │ │ orrseq r9, r6, r8, lsl #13 │ │ orrseq r9, r6, ip, lsl #15 │ │ orrseq r4, r6, r0, lsl #12 │ │ orrseq r9, r6, r4, asr r6 │ │ - stc2l 15, cr7, [r1, #668]! @ 0x29c │ │ - stc2l 5, cr4, [r0, #920]! @ 0x398 │ │ - stc2l 15, cr1, [r0, #736]! @ 0x2e0 │ │ + stc2l 15, cr7, [r1, #848]! @ 0x350 │ │ + stc2l 6, cr4, [r0, #76]! @ 0x4c │ │ + stc2l 15, cr1, [r0, #916]! @ 0x394 │ │ orrseq r4, r6, ip, ror #10 │ │ eorseq r5, r3, ip, lsr sp │ │ orrseq r9, r6, r4, lsr #11 │ │ - stc2l 12, cr3, [r1, #572]! @ 0x23c │ │ - stc2l 15, cr1, [r0, #432]! @ 0x1b0 │ │ + stc2l 12, cr3, [r1, #752]! @ 0x2f0 │ │ + stc2l 15, cr1, [r0, #612]! @ 0x264 │ │ orrseq r9, r6, r4, ror r5 │ │ orrseq r4, r6, ip, lsr #9 │ │ @ instruction: 0x019644f4 │ │ orrseq r9, r6, r8, asr #10 │ │ orrseq r9, r6, ip, asr #11 │ │ @ instruction: 0x019644bc │ │ orrseq r9, r6, r4, lsl r5 │ │ - stc2l 6, cr5, [r2, #12]! │ │ + stc2l 6, cr5, [r2, #192]! @ 0xc0 │ │ ldr r0, [pc, #4020] @ 2422ef0 │ │ ldr r6, [pc, #4020] @ 2422ef4 │ │ add r0, pc, r0 │ │ add r6, pc, r6 │ │ mov r1, r6 │ │ bl 270e020 │ │ ldr r1, [pc, #4004] @ 2422ef8 │ │ @@ -1271630,40 +1271629,40 @@ │ │ cmp r1, #9 │ │ bhi 2422bb8 │ │ ldr r2, [pc, #4088] @ 2423154 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ ldr r4, [r8] │ │ b 2422bf4 │ │ - ldc2l 13, cr1, [pc, #192] @ 2422230 │ │ - stc2l 14, cr1, [r0, #576]! @ 0x240 │ │ + ldc2l 13, cr1, [pc, #372] @ 24222e4 │ │ + stc2l 14, cr1, [r0, #756]! @ 0x2f4 │ │ eorseq r3, r3, r0, lsl r4 │ │ orrseq r9, r6, ip, ror r4 │ │ - stc2l 11, cr3, [r1, #468]! @ 0x1d4 @ │ │ - stc2l 14, cr1, [r0, #272]! @ 0x110 │ │ + stc2l 11, cr3, [r1, #648]! @ 0x288 @ │ │ + stc2l 14, cr1, [r0, #452]! @ 0x1c4 │ │ orrseq r9, r6, ip, asr #8 │ │ orrseq r4, r6, ip, asr r3 │ │ orrseq r4, r6, r8, asr #7 │ │ orrseq r9, r6, r0, lsr #8 │ │ orrseq r9, r6, r4, lsr #8 │ │ @ instruction: 0x01964390 │ │ orrseq r9, r6, ip, ror #7 │ │ - ldc2l 2, cr14, [pc, #844] @ 24224f0 │ │ + ldc2l 3, cr14, [pc] @ 24221a4 │ │ @ instruction: 0x019693b8 │ │ orrseq r4, r6, ip, asr #6 │ │ orrseq r9, r6, r8, lsr r4 │ │ @ instruction: 0x0196939c │ │ orrseq r4, r6, r4, asr r2 │ │ orrseq r4, r6, r4, ror #5 │ │ orrseq r9, r6, ip, lsr r3 │ │ orrseq r9, r6, r0, asr #6 │ │ orrseq r4, r6, ip, lsr #5 │ │ orrseq r9, r6, r8, lsl #6 │ │ - ldc2l 11, cr1, [pc, #432] @ 2422380 @ │ │ - stc2l 12, cr1, [r0, #816]! @ 0x330 │ │ + ldc2l 11, cr1, [pc, #612] @ 2422434 @ │ │ + stc2l 12, cr1, [r0, #996]! @ 0x3e4 │ │ eorseq r3, r3, r8, asr #4 │ │ orrseq r4, r6, r8, lsl #4 │ │ orrseq r9, r6, ip, asr r2 │ │ orrseq r9, r6, r0, ror #5 │ │ @ instruction: 0x019641d0 │ │ orrseq r9, r6, r8, lsr #4 │ │ ldr r0, [pc, #3692] @ 242305c │ │ @@ -1271803,16 +1271802,16 @@ │ │ cmp r1, #9 │ │ bhi 2422c98 │ │ ldr r2, [pc, #3272] @ 24230d8 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ ldr r4, [r5] │ │ b 2422cd4 │ │ - stc2l 1, cr4, [r0, #1000]! @ 0x3e8 │ │ - stc2l 11, cr1, [r0, #816]! @ 0x330 @ │ │ + stc2l 2, cr4, [r0, #156]! @ 0x9c │ │ + stc2l 11, cr1, [r0, #996]! @ 0x3e4 @ │ │ orrseq r4, r6, r4, lsl #3 │ │ orrseq r4, r6, r4, lsl r1 │ │ orrseq r9, r6, r4, ror #2 │ │ orrseq r9, r6, r8, ror #4 │ │ ldrsbeq r4, [r6, ip] │ │ orrseq r9, r6, r0, lsr r1 │ │ ldr r0, [pc, #3468] @ 24231d0 │ │ @@ -1271874,22 +1271873,22 @@ │ │ ldr r0, [pc, r0] │ │ sub r6, r0, #1 │ │ cmp r6, #10 │ │ bcs 2422a00 │ │ mov r8, r4 │ │ mov r3, r6 │ │ b 2422a58 │ │ - stc2l 5, cr1, [r2, #192]! @ 0xc0 │ │ - stc2l 10, cr1, [r0, #848]! @ 0x350 @ │ │ + stc2l 5, cr1, [r2, #372]! @ 0x174 │ │ + stc2l 11, cr1, [r0, #4]! @ │ │ orrseq r6, r6, ip, lsl #17 │ │ - stc2l 10, cr9, [r1, #724]! @ 0x2d4 @ │ │ - stc2l 10, cr1, [r0, #592]! @ 0x250 @ │ │ + stc2l 10, cr9, [r1, #904]! @ 0x388 @ │ │ + stc2l 10, cr1, [r0, #772]! @ 0x304 @ │ │ @ instruction: 0x01963f94 │ │ @ instruction: 0x01969094 │ │ - stc2l 0, cr0, [r0, #44]! @ 0x2c │ │ + stc2l 0, cr0, [r0, #224]! @ 0xe0 │ │ ldr r0, [pc, #2728] @ 2423008 │ │ movw r3, #853 @ 0x355 │ │ ldr r2, [pc, #2724] @ 242300c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #2712] @ 2423010 │ │ @@ -1271907,27 +1271906,27 @@ │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #2664] @ 2423020 │ │ ldr r0, [pc, r0] │ │ b 2421c40 │ │ - stc2l 10, cr1, [r0, #352]! @ 0x160 @ │ │ - ldc2l 0, cr10, [pc, #92] @ 2422624 │ │ - stc2l 10, cr1, [r0, #224]! @ 0xe0 @ │ │ + stc2l 10, cr1, [r0, #532]! @ 0x214 @ │ │ + ldc2l 0, cr10, [pc, #272] @ 24226d8 │ │ + stc2l 10, cr1, [r0, #404]! @ 0x194 @ │ │ orrseq r3, r6, r0, lsl pc │ │ orrseq r9, r6, r8, lsr r0 │ │ - ldc2l 1, cr6, [pc, #836] @ 242291c │ │ - stc2l 9, cr1, [r0, #504]! @ 0x1f8 @ │ │ - stc2l 9, cr1, [r0, #288]! @ 0x120 @ │ │ - stc2l 9, cr1, [r0, #264]! @ 0x108 @ │ │ + ldc2l 1, cr6, [pc, #1016] @ 24229d0 │ │ + stc2l 10, cr1, [r0, #164]! @ 0xa4 @ │ │ + stc2l 9, cr1, [r0, #378]! @ 0x17a @ │ │ + stc2l 9, cr1, [r0, #354]! @ 0x162 @ │ │ orrseq r8, r6, r8, lsl #31 │ │ - ldc2l 7, cr1, [pc, #944] @ 242299c │ │ - stc2l 9, cr1, [r0, #152]! @ 0x98 @ │ │ - stc2l 8, cr9, [r1, #240]! @ 0xf0 │ │ + ldc2l 8, cr1, [pc, #100] @ 2422650 │ │ + stc2l 9, cr1, [r0, #242]! @ 0xf2 @ │ │ + vcmla.f16 , , , #270 │ │ ldrhteq r2, [r3], -r8 │ │ ldrhteq r2, [r3], -r8 │ │ orrseq r8, r6, r0, ror #29 │ │ ldr r1, [fp, #16] │ │ ldr r2, [fp, #20] │ │ ldr r1, [r1] │ │ ldr r2, [r2] │ │ @@ -1271991,29 +1271990,29 @@ │ │ ldr r0, [pc, #2644] @ 242314c │ │ ldr r0, [pc, r0] │ │ str r0, [r6] │ │ ldr r0, [pc, #2636] @ 2423150 │ │ add r0, pc, r0 │ │ b 241e654 │ │ orrseq r8, r6, ip, lsl #30 │ │ - ldc2l 7, cr1, [pc, #464] @ 24228e4 │ │ - stc2l 8, cr1, [r0, #848]! @ 0x350 │ │ + ldc2l 7, cr1, [pc, #644] @ 2422998 │ │ + stc2l 9, cr1, [r0, #2]! @ │ │ eorseq r2, r3, r4, asr lr │ │ orrseq r8, r6, r0, asr #29 │ │ orrseq r3, r6, r4, asr #27 │ │ - stc2l 5, cr3, [r1, #516]! @ 0x204 │ │ - stc2l 8, cr1, [r0, #320]! @ 0x140 │ │ + stc2l 5, cr3, [r1, #696]! @ 0x2b8 │ │ + stc2l 8, cr1, [r0, #500]! @ 0x1f4 │ │ orrseq r3, r6, r4, ror sp │ │ orrseq r8, r6, ip, asr #28 │ │ @ instruction: 0x01963cd8 │ │ orrseq r8, r6, ip, asr #27 │ │ orrseq r3, r6, r8, lsr #27 │ │ orrseq r8, r6, r0, lsl lr │ │ orrseq r8, r6, r0, lsl lr │ │ - ldc2l 12, cr13, [pc, #940] @ 2422af8 │ │ + ldc2l 13, cr13, [pc, #96] @ 24227ac │ │ @ instruction: 0x01968df0 │ │ ldr r1, [fp, #16] │ │ ldr r2, [fp, #20] │ │ ldr r1, [r1] │ │ ldr r2, [r2] │ │ add r0, r1, r0, lsl #7 │ │ sub r2, r2, r1 │ │ @@ -1272073,32 +1272072,32 @@ │ │ bl 270e070 │ │ ldr r0, [pc, #2064] @ 2423054 │ │ ldr r0, [pc, r0] │ │ str r0, [r6] │ │ ldr r0, [pc, #2056] @ 2423058 │ │ add r0, pc, r0 │ │ b 241e654 │ │ - stc2l 7, cr9, [r1, #864]! @ 0x360 │ │ - stc2l 7, cr1, [r0, #704]! @ 0x2c0 │ │ + vcmla.f16 d25, d1, d5, #270 │ │ + stc2l 7, cr1, [r0, #884]! @ 0x374 │ │ orrseq r3, r6, r0, ror #24 │ │ @ instruction: 0x01968db0 │ │ - stc2l 7, cr1, [r0, #512]! @ 0x200 │ │ - stc2l 7, cr1, [r0, #464]! @ 0x1d0 │ │ - stc2l 7, cr1, [r0, #224]! @ 0xe0 │ │ - stc2l 7, cr1, [r0, #176]! @ 0xb0 │ │ + stc2l 7, cr1, [r0, #692]! @ 0x2b4 │ │ + stc2l 7, cr1, [r0, #644]! @ 0x284 │ │ + stc2l 7, cr1, [r0, #404]! @ 0x194 │ │ + stc2l 7, cr1, [r0, #356]! @ 0x164 │ │ orrseq r8, r6, r0, lsr sp │ │ - ldc2l 5, cr1, [pc, #592] @ 2422ad0 │ │ - stc2l 6, cr1, [r0, #976]! @ 0x3d0 │ │ - stc2l 5, cr9, [r1, #912]! @ 0x390 │ │ + ldc2l 5, cr1, [pc, #772] @ 2422b84 │ │ + stc2l 7, cr1, [r0, #132]! @ 0x84 │ │ + stc2l 6, cr9, [r1, #68]! @ 0x44 │ │ eorseq r2, r3, r0, ror #24 │ │ eorseq r2, r3, r0, ror #24 │ │ orrseq r8, r6, r8, lsl #25 │ │ - stc2l 3, cr3, [r1, #776]! @ 0x308 │ │ - stc2l 6, cr9, [r1, #656]! @ 0x290 │ │ - stc2l 6, cr1, [r0, #496]! @ 0x1f0 │ │ + stc2l 3, cr3, [r1, #956]! @ 0x3bc │ │ + stc2l 6, cr9, [r1, #836]! @ 0x344 │ │ + stc2l 6, cr1, [r0, #676]! @ 0x2a4 │ │ sub r6, r0, #1 │ │ cmp r6, #10 │ │ bcc 24228c8 │ │ ldr r0, [pc, #2280] @ 2423198 │ │ mov r1, r6 │ │ ldr r2, [pc, #2276] @ 242319c │ │ movw r3, #3906 @ 0xf42 │ │ @@ -1272161,24 +1272160,24 @@ │ │ ldr r0, [pc, #2092] @ 24231cc │ │ add r0, pc, r0 │ │ b 241e654 │ │ orrseq r3, r6, ip, lsr #22 │ │ orrseq r8, r6, ip, ror ip │ │ orrseq r8, r6, r4, lsl ip │ │ orrseq r3, r6, ip, ror #22 │ │ - stc2l 3, cr3, [r1, #152]! @ 0x98 │ │ - stc2l 5, cr9, [r1, #916]! @ 0x394 │ │ - stc2l 5, cr1, [r0, #784]! @ 0x310 │ │ + stc2l 3, cr3, [r1, #332]! @ 0x14c │ │ + stc2l 6, cr9, [r1, #72]! @ 0x48 │ │ + stc2l 5, cr1, [r0, #964]! @ 0x3c4 │ │ orrseq r3, r6, r4, asr #21 │ │ orrseq r8, r6, r4, asr #23 │ │ orrseq r3, r6, r8, lsr #20 │ │ orrseq r3, r6, r4, lsl #22 │ │ - stc2l 15, cr0, [r2, #624]! @ 0x270 │ │ - stc2l 5, cr1, [r0, #256]! @ 0x100 │ │ - ldc2l 13, cr7, [pc, #380] @ 2422b5c │ │ + stc2l 15, cr0, [r2, #804]! @ 0x324 │ │ + stc2l 5, cr1, [r0, #436]! @ 0x1b4 │ │ + ldc2l 13, cr7, [pc, #560] @ 2422c10 │ │ @ instruction: 0x01963ad4 │ │ orrseq r8, r6, r4, lsr #24 │ │ @ instruction: 0x01963ab4 │ │ @ instruction: 0x01963ab0 │ │ orrseq r3, r6, ip, lsl #21 │ │ orrseq r8, r6, ip, asr fp │ │ @ instruction: 0x01968ad0 │ │ @@ -1272284,16 +1272283,16 @@ │ │ ldr r4, [r9] │ │ b 2422db4 │ │ orrseq r3, r6, r8, lsr sl │ │ orrseq r8, r6, ip, lsl #21 │ │ orrseq r8, r6, r0, lsl #21 │ │ orrseq r3, r6, r0, lsl sl │ │ orrseq r3, r6, r8, lsl #20 │ │ - ldc2l 9, cr9, [pc, #486] @ 2422d8e @ │ │ - stc2l 4, cr1, [r0, #80]! @ 0x50 │ │ + ldc2l 10, cr9, [pc, #128] @ 2422c28 @ │ │ + stc2l 4, cr1, [r0, #260]! @ 0x104 │ │ orrseq r3, r6, ip, ror #17 │ │ orrseq r8, r6, r4, lsl sl │ │ @ instruction: 0x019689d0 │ │ orrseq r3, r6, r8, lsr #18 │ │ ldr r0, [pc, #1432] @ 2423158 │ │ movw r3, #3564 @ 0xdec │ │ ldr r2, [pc, #1428] @ 242315c │ │ @@ -1272338,22 +1272337,22 @@ │ │ ldr r0, [fp, #28] │ │ add r2, r6, r1, lsl #2 │ │ add r1, sp, #16 │ │ bl 270e260 │ │ ldr r0, [pc, #1312] @ 2423194 │ │ add r0, pc, r0 │ │ b 241e654 │ │ - stc2l 9, cr3, [r0, #372]! @ 0x174 @ │ │ - stc2l 3, cr1, [r0, #560]! @ 0x230 │ │ - stc2l 3, cr1, [r1, #92]! @ 0x5c │ │ - stc2l 9, cr3, [r0, #188]! @ 0xbc @ │ │ - stc2l 3, cr1, [r0, #192]! @ 0xc0 │ │ + stc2l 9, cr3, [r0, #462]! @ 0x1ce @ │ │ + stc2l 3, cr1, [r0, #740]! @ 0x2e4 │ │ + stc2l 3, cr1, [r1, #272]! @ 0x110 │ │ + stc2l 9, cr3, [r0, #278]! @ 0x116 @ │ │ + stc2l 3, cr1, [r0, #372]! @ 0x174 │ │ orrseq r3, r6, r4, ror #17 │ │ - stc2l 13, cr0, [r2, #144]! @ 0x90 │ │ - stc2l 2, cr1, [r0, #800]! @ 0x320 │ │ + stc2l 13, cr0, [r2, #324]! @ 0x144 │ │ + stc2l 2, cr1, [r0, #980]! @ 0x3d4 │ │ ldr r0, [pc, #1084] @ 24230dc │ │ mov r3, #3136 @ 0xc40 │ │ ldr r2, [pc, #1080] @ 24230e0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #1068] @ 24230e4 │ │ @@ -1272395,20 +1272394,20 @@ │ │ add r1, sp, #16 │ │ mov r0, r4 │ │ bl 270e090 │ │ ldr r0, [pc, #964] @ 2423118 │ │ add r0, pc, r0 │ │ b 241e654 │ │ orrseq r6, r6, ip, ror r0 │ │ - stc2l 2, cr1, [r0, #448]! @ 0x1c0 │ │ - stc2l 2, cr1, [r0, #400]! @ 0x190 │ │ + stc2l 2, cr1, [r0, #628]! @ 0x274 │ │ + stc2l 2, cr1, [r0, #580]! @ 0x244 │ │ orrseq r8, r6, r0, lsr #16 │ │ orrseq r8, r6, r4, ror #16 │ │ - stc2l 15, cr2, [r1, #372]! @ 0x174 │ │ - stc2l 2, cr1, [r0, #176]! @ 0xb0 │ │ + stc2l 15, cr2, [r1, #552]! @ 0x228 │ │ + stc2l 2, cr1, [r0, #356]! @ 0x164 │ │ orrseq r3, r6, r0, asr r7 │ │ ldr r0, [pc, #1252] @ 2423264 │ │ movw r3, #4001 @ 0xfa1 │ │ ldr r2, [pc, #1248] @ 2423268 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1272439,18 +1272438,18 @@ │ │ ldr r1, [fp, #32] │ │ ldr r3, [fp, #40] @ 0x28 │ │ bl 270d970 │ │ ldr r0, [pc, #1184] @ 24232a4 │ │ add r0, pc, r0 │ │ b 241e654 │ │ orrseq r8, r6, r8, lsr #16 │ │ - ldc2l 0, cr1, [pc, #560] @ 2423044 │ │ - stc2l 1, cr1, [r0, #944]! @ 0x3b0 │ │ - ldc2l 7, cr15, [pc, #412] @ 2422fb8 │ │ - stc2l 1, cr1, [r0, #720]! @ 0x2d0 │ │ + ldc2l 0, cr1, [pc, #740] @ 24230f8 │ │ + stc2l 2, cr1, [r0, #100]! @ 0x64 │ │ + ldc2l 7, cr15, [pc, #592] @ 242306c │ │ + stc2l 1, cr1, [r0, #900]! @ 0x384 │ │ orrseq r3, r6, ip, lsr r6 │ │ @ instruction: 0x019687b4 │ │ ldr r0, [pc, #832] @ 242316c │ │ movw r3, #3565 @ 0xded │ │ ldr r2, [pc, #828] @ 2423170 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1272469,16 +1272468,16 @@ │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #772] @ 2423184 │ │ ldr r0, [pc, r0] │ │ b 2422c00 │ │ - stc2l 5, cr9, [r0, #180]! @ 0xb4 │ │ - stc2l 1, cr1, [r0, #496]! @ 0x1f0 │ │ + stc2l 5, cr9, [r0, #360]! @ 0x168 │ │ + stc2l 1, cr1, [r0, #676]! @ 0x2a4 │ │ orrseq r8, r6, r4, lsl #15 │ │ ldr r0, [pc, #600] @ 24230f0 │ │ movw r3, #3137 @ 0xc41 │ │ ldr r2, [pc, #596] @ 24230f4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1272500,16 +1272499,16 @@ │ │ ldr r0, [pc, #540] @ 2423108 │ │ ldr r0, [pc, r0] │ │ b 2422ce0 │ │ @ instruction: 0x01963690 │ │ @ instruction: 0x019687f8 │ │ @ instruction: 0x019686dc │ │ orrseq r8, r6, r8, asr #13 │ │ - stc2l 4, cr9, [r0, #260]! @ 0x104 │ │ - stc2l 0, cr1, [r0, #576]! @ 0x240 │ │ + stc2l 4, cr9, [r0, #440]! @ 0x1b8 │ │ + stc2l 0, cr1, [r0, #756]! @ 0x2f4 │ │ orrseq r3, r6, r4, lsl #12 │ │ ldr r0, [pc, #868] @ 2423278 │ │ movw r3, #4002 @ 0xfa2 │ │ ldr r2, [pc, #864] @ 242327c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1272542,206 +1272541,206 @@ │ │ ldr r2, [pc, #780] @ 24232a0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2422dd4 │ │ orrseq r8, r6, r4, lsl #13 │ │ - stc2l 0, cr9, [r1, #420]! @ 0x1a4 │ │ - stc2l 0, cr1, [r0, #288]! @ 0x120 │ │ - ldc2l 5, cr13, [pc, #8] @ 2422fc0 │ │ + stc2l 0, cr9, [r1, #600]! @ 0x258 │ │ + stc2l 0, cr1, [r0, #468]! @ 0x1d4 │ │ + ldc2l 5, cr13, [pc, #188] @ 2423074 │ │ orrseq r8, r6, r4, asr #15 │ │ ldrhteq r2, [r3], -r4 │ │ orrseq r3, r6, r4, lsr #10 │ │ orrseq r8, r6, r0, lsr #12 │ │ - ldc2l 5, cr15, [pc, #604] @ 2423228 │ │ - stc2l 15, cr0, [r0, #912]! @ 0x390 │ │ + ldc2l 5, cr15, [pc, #784] @ 24232dc │ │ + stc2l 0, cr1, [r0, #68]! @ 0x44 │ │ orrseq r8, r6, ip, ror #11 │ │ orrseq r3, r6, r4, asr r4 │ │ - stc2l 9, cr0, [r2, #496]! @ 0x1f0 @ │ │ - stc2l 15, cr0, [r0, #624]! @ 0x270 │ │ - stc2l 14, cr8, [r1, #576]! @ 0x240 │ │ + stc2l 10, cr0, [r2, #148]! @ 0x94 @ │ │ + stc2l 15, cr0, [r0, #804]! @ 0x324 │ │ + stc2l 14, cr8, [r1, #756]! @ 0x2f4 │ │ eorseq r2, r3, r0, lsl r5 │ │ orrseq r5, r6, ip, lsr sp │ │ orrseq r8, r6, r8, ror #10 │ │ - stc2l 9, cr0, [r2, #280]! @ 0x118 @ │ │ - stc2l 15, cr0, [r0, #192]! @ 0xc0 │ │ + stc2l 9, cr0, [r2, #370]! @ 0x172 @ │ │ + stc2l 15, cr0, [r0, #372]! @ 0x174 │ │ orrseq r5, r6, r0, ror #25 │ │ orrseq r8, r6, r8, lsl #10 │ │ orrseq r3, r6, r0, lsr #9 │ │ orrseq r8, r6, r8, lsl #12 │ │ orrseq r8, r6, ip, ror #9 │ │ - ldc2l 2, cr5, [pc, #532] @ 2423224 │ │ - stc2l 10, cr0, [r0, #704]! @ 0x2c0 @ │ │ + ldc2l 2, cr5, [pc, #712] @ 24232d8 │ │ + stc2l 10, cr0, [r0, #884]! @ 0x374 @ │ │ @ instruction: 0x01968090 │ │ orrseq r8, r6, ip, lsr #1 │ │ - stc2l 7, cr2, [r1, #604]! @ 0x25c │ │ - stc2l 10, cr0, [r0, #464]! @ 0x1d0 @ │ │ + stc2l 7, cr2, [r1, #784]! @ 0x310 │ │ + stc2l 10, cr0, [r0, #644]! @ 0x284 @ │ │ orrseq r8, r6, ip, ror r0 │ │ - stc2l 14, cr2, [r0, #760]! @ 0x2f8 │ │ - stc2l 8, cr0, [r0, #576]! @ 0x240 │ │ + stc2l 14, cr2, [r0, #940]! @ 0x3ac │ │ + stc2l 8, cr0, [r0, #756]! @ 0x2f4 │ │ orrseq r2, r6, r4, asr #28 │ │ orrseq r7, r6, r0, lsl #29 │ │ - stc2l 5, cr2, [r1, #428]! @ 0x1ac │ │ - vcmla.f16 q8, q0, q4, #270 │ │ + stc2l 5, cr2, [r1, #608]! @ 0x260 │ │ + stc2l 8, cr0, [r0, #468]! @ 0x1d4 │ │ orrseq r7, r6, r0, asr lr │ │ orrseq r2, r6, r8, lsl #27 │ │ @ instruction: 0x01962dd0 │ │ orrseq r7, r6, r4, lsr #28 │ │ orrseq r7, r6, r8, lsr #29 │ │ @ instruction: 0x01962d98 │ │ @ instruction: 0x01967df0 │ │ - stc2l 7, cr6, [r1, #296]! @ 0x128 │ │ + stc2l 7, cr6, [r1, #476]! @ 0x1dc │ │ @ instruction: 0x019633d8 │ │ orrseq r8, r6, r4, asr #9 │ │ orrseq r8, r6, r8, lsl r4 │ │ - stc2l 11, cr2, [r1, #12]! @ │ │ - stc2l 13, cr0, [r0, #896]! @ 0x380 │ │ + stc2l 11, cr2, [r1, #192]! @ 0xc0 @ │ │ + stc2l 14, cr0, [r0, #52]! @ 0x34 │ │ orrseq r3, r6, r8, lsr #6 │ │ @ instruction: 0x019683d0 │ │ - ldc2l 3, cr9, [pc, #460] @ 242324c │ │ - stc2l 13, cr0, [r0, #592]! @ 0x250 │ │ - ldc2l 2, cr13, [pc, #312] @ 24231c0 │ │ + ldc2l 3, cr9, [pc, #640] @ 2423300 │ │ + stc2l 13, cr0, [r0, #772]! @ 0x304 │ │ + ldc2l 2, cr13, [pc, #492] @ 2423274 │ │ orrseq r8, r6, r0, lsl r5 │ │ eorseq r2, r3, r0, lsl #6 │ │ orrseq r3, r6, r8, asr #4 │ │ orrseq r8, r6, ip, ror #6 │ │ - ldc2l 5, cr5, [pc, #20] @ 24230b0 │ │ - stc2l 13, cr0, [r0, #192]! @ 0xc0 │ │ + ldc2l 5, cr5, [pc, #200] @ 2423164 │ │ + stc2l 13, cr0, [r0, #372]! @ 0x174 │ │ orrseq r8, r6, r8, lsr r3 │ │ @ instruction: 0x019682fc │ │ - stc2l 3, cr3, [r0, #88]! @ 0x58 │ │ - stc2l 12, cr0, [r0, #928]! @ 0x3a0 │ │ - stc2l 11, cr8, [r1, #880]! @ 0x370 @ │ │ + stc2l 3, cr3, [r0, #268]! @ 0x10c │ │ + stc2l 13, cr0, [r0, #84]! @ 0x54 │ │ + stc2l 12, cr8, [r1, #36]! @ 0x24 │ │ eorseq r2, r3, ip, asr r2 │ │ orrseq r3, r6, r8, lsl #5 │ │ @ instruction: 0x019682b4 │ │ - stc2l 2, cr3, [r0, #680]! @ 0x2a8 │ │ - stc2l 12, cr0, [r0, #496]! @ 0x1f0 │ │ + stc2l 2, cr3, [r0, #860]! @ 0x35c │ │ + stc2l 12, cr0, [r0, #676]! @ 0x2a4 │ │ orrseq r3, r6, ip, lsr #4 │ │ orrseq r8, r6, r4, asr r2 │ │ orrseq r3, r6, r8, ror #3 │ │ @ instruction: 0x019682d4 │ │ orrseq r8, r6, r8, lsr r2 │ │ ldrsheq r3, [r6, r0] │ │ - ldc2l 9, cr8, [pc, #158] @ 2423182 @ │ │ - stc2l 3, cr0, [r0, #448]! @ 0x1c0 │ │ + ldc2l 9, cr8, [pc, #248] @ 24231dc @ │ │ + stc2l 3, cr0, [r0, #628]! @ 0x274 │ │ orrseq r2, r6, r8, asr #16 │ │ orrseq r7, r6, r0, ror r9 │ │ orrseq r7, r6, r0, lsr r9 │ │ - ldc2l 9, cr4, [pc, #154] @ 2423192 @ │ │ - stc2l 1, cr0, [r0, #480]! @ 0x1e0 │ │ + ldc2l 9, cr4, [pc, #244] @ 24231ec @ │ │ + stc2l 1, cr0, [r0, #660]! @ 0x294 │ │ orrseq r7, r6, ip, asr r7 │ │ orrseq r7, r6, r8, ror r7 │ │ - stc2l 14, cr1, [r1, #396]! @ 0x18c │ │ - stc2l 1, cr0, [r0, #256]! @ 0x100 │ │ + stc2l 14, cr1, [r1, #576]! @ 0x240 │ │ + stc2l 1, cr0, [r0, #436]! @ 0x1b4 │ │ orrseq r7, r6, r8, asr #14 │ │ orrseq r2, r6, r8, lsl #17 │ │ - stc2l 9, cr2, [r0, #44]! @ 0x2c @ │ │ - stc2l 2, cr0, [r0, #928]! @ 0x3a0 │ │ - stc2l 2, cr6, [r1, #280]! @ 0x118 │ │ - stc2l 4, cr0, [r2, #224]! @ 0xe0 │ │ - stc2l 9, cr0, [r0, #440]! @ 0x1b8 @ │ │ + stc2l 9, cr2, [r0, #134]! @ 0x86 @ │ │ + stc2l 3, cr0, [r0, #84]! @ 0x54 │ │ + stc2l 2, cr6, [r1, #460]! @ 0x1cc │ │ + stc2l 4, cr0, [r2, #404]! @ 0x194 │ │ + stc2l 10, cr0, [r0, #36]! @ 0x24 @ │ │ @ instruction: 0x01965790 │ │ orrseq r7, r6, ip, asr #31 │ │ - stc2l 13, cr8, [r0, #276]! @ 0x114 │ │ - stc2l 9, cr0, [r0, #296]! @ 0x128 @ │ │ + stc2l 13, cr8, [r0, #456]! @ 0x1c8 │ │ + stc2l 9, cr0, [r0, #386]! @ 0x182 @ │ │ @ instruction: 0x01967f9c │ │ @ instruction: 0x01962efc │ │ orrseq r2, r6, r0, lsr #30 │ │ orrseq r7, r6, r0, ror pc │ │ orrseq r8, r6, r4, ror r0 │ │ orrseq r2, r6, r8, ror #29 │ │ orrseq r7, r6, ip, lsr pc │ │ - stc2l 9, cr8, [r1, #134]! @ 0x86 @ │ │ + stc2l 9, cr8, [r1, #224]! @ 0xe0 @ │ │ orrseq r3, r6, ip, asr #7 │ │ - stc2l 4, cr8, [r1, #452]! @ 0x1c4 │ │ - stc2l 4, cr0, [r0, #320]! @ 0x140 │ │ + stc2l 4, cr8, [r1, #632]! @ 0x278 │ │ + stc2l 4, cr0, [r0, #500]! @ 0x1f4 │ │ orrseq r2, r6, r0, asr r9 │ │ orrseq r7, r6, r0, asr sl │ │ @ instruction: 0x019628b4 │ │ - ldc2l 7, cr14, [pc, #604] @ 24233d0 │ │ - stc2l 1, cr0, [r0, #912]! @ 0x390 │ │ + ldc2l 7, cr14, [pc, #784] @ 2423484 │ │ + stc2l 2, cr0, [r0, #68]! @ 0x44 │ │ orrseq r2, r6, ip, ror #12 │ │ orrseq r7, r6, r4, ror #15 │ │ - stc2l 5, cr8, [r0, #372]! @ 0x174 │ │ - stc2l 1, cr0, [r0, #688]! @ 0x2b0 │ │ + stc2l 5, cr8, [r0, #552]! @ 0x228 │ │ + stc2l 1, cr0, [r0, #868]! @ 0x364 │ │ @ instruction: 0x019677b4 │ │ @ instruction: 0x01962990 │ │ - stc2l 14, cr15, [r1, #144]! @ 0x90 │ │ - stc2l 3, cr0, [r0, #800]! @ 0x320 │ │ - stc2l 3, cr8, [r1, #844]! @ 0x34c │ │ - ldc2l 5, cr0, [pc, #1008] @ 2423590 │ │ - stc2l 7, cr0, [r0, #368]! @ 0x170 │ │ + stc2l 14, cr15, [r1, #324]! @ 0x144 │ │ + stc2l 3, cr0, [r0, #980]! @ 0x3d4 │ │ + stc2l 4, cr8, [r1] │ │ + ldc2l 6, cr0, [pc, #164] @ 2423244 │ │ + stc2l 7, cr0, [r0, #548]! @ 0x224 │ │ ldrsbteq r1, [r3], -r8 │ │ orrseq r7, r6, r0, lsr sp │ │ - stc2l 4, cr2, [r1, #164]! @ 0xa4 │ │ - stc2l 6, cr0, [r0, #992]! @ 0x3e0 │ │ + stc2l 4, cr2, [r1, #344]! @ 0x158 │ │ + stc2l 7, cr0, [r0, #148]! @ 0x94 │ │ orrseq r7, r6, r0, lsl #26 │ │ orrseq r2, r6, r0, lsl ip │ │ orrseq r2, r6, ip, ror ip │ │ @ instruction: 0x01967cd4 │ │ @ instruction: 0x01967cd8 │ │ orrseq r2, r6, r4, asr #24 │ │ orrseq r7, r6, r0, lsr #25 │ │ - stc2l 10, cr10, [r0, #384]! @ 0x180 @ │ │ + stc2l 10, cr10, [r0, #564]! @ 0x234 @ │ │ orrseq r3, r6, r0, lsl #3 │ │ @ instruction: 0x019681f0 │ │ orrseq r8, r6, r4, asr #3 │ │ - stc2l 8, cr2, [r1, #756]! @ 0x2f4 │ │ - stc2l 11, cr0, [r0, #560]! @ 0x230 @ │ │ + vcmla.f16 q9, , q13, #270 │ │ + stc2l 11, cr0, [r0, #740]! @ 0x2e4 @ │ │ orrseq r3, r6, r8, lsr #1 │ │ orrseq r8, r6, r8, ror r1 │ │ - stc2l 11, cr8, [r1, #400]! @ 0x190 @ │ │ - stc2l 11, cr0, [r0, #240]! @ 0xf0 @ │ │ - ldc2l 15, cr12, [pc, #984] @ 24235d4 │ │ + stc2l 11, cr8, [r1, #580]! @ 0x244 @ │ │ + stc2l 11, cr0, [r0, #420]! @ 0x1a4 @ │ │ + ldc2l 0, cr13, [pc, #140] @ 2423288 │ │ @ instruction: 0x019682b8 │ │ eorseq r2, r3, r8, lsr #1 │ │ orrseq r2, r6, r8, asr #31 │ │ orrseq r8, r6, r4, lsl r1 │ │ - stc2l 6, cr0, [r0, #64]! @ 0x40 │ │ - stc2l 6, cr0, [r0, #16]! │ │ + stc2l 6, cr0, [r0, #244]! @ 0xf4 │ │ + stc2l 6, cr0, [r0, #196]! @ 0xc4 │ │ orrseq r7, r6, r8, lsl #24 │ │ - ldc2l 4, cr0, [pc, #432] @ 24233cc │ │ - stc2l 5, cr0, [r0, #816]! @ 0x330 │ │ - stc2l 4, cr8, [r1, #752]! @ 0x2f0 │ │ + ldc2l 4, cr0, [pc, #612] @ 2423480 │ │ + stc2l 5, cr0, [r0, #996]! @ 0x3e4 │ │ + stc2l 4, cr8, [r1, #932]! @ 0x3a4 │ │ eorseq r1, r3, r8, lsr fp │ │ eorseq r1, r3, r8, lsr fp │ │ orrseq r7, r6, r0, ror #22 │ │ - ldc2l 10, cr12, [pc, #232] @ 242331c @ │ │ + ldc2l 10, cr12, [pc, #412] @ 24233d0 @ │ │ orrseq r7, r6, r0, lsl #26 │ │ eorseq r1, r3, r8, ror #21 │ │ orrseq r7, r6, ip, asr fp │ │ - ldc2l 3, cr0, [pc, #768] @ 2423544 │ │ - stc2l 5, cr0, [r0, #128]! @ 0x80 │ │ - ldc2l 5, cr10, [pc, #936] @ 24235f4 │ │ + ldc2l 3, cr0, [pc, #948] @ 24235f8 │ │ + stc2l 5, cr0, [r0, #308]! @ 0x134 │ │ + ldc2l 6, cr10, [pc, #92] @ 24232a8 │ │ eorseq r1, r3, ip, lsl #21 │ │ eorseq r1, r3, ip, lsl #21 │ │ orrseq r7, r6, r4, ror #21 │ │ orrseq r2, r6, r4, ror sl │ │ orrseq r7, r6, r4, ror #21 │ │ orrseq r7, r6, r8, asr #21 │ │ orrseq r2, r6, r8, asr r9 │ │ - stc2l 2, cr8, [r1, #736]! @ 0x2e0 │ │ - stc2l 2, cr0, [r0, #576]! @ 0x240 │ │ + stc2l 2, cr8, [r1, #916]! @ 0x394 │ │ + stc2l 2, cr0, [r0, #756]! @ 0x2f4 │ │ orrseq r2, r6, r0, asr #14 │ │ @ instruction: 0x01967890 │ │ orrseq r7, r6, r8, lsr #16 │ │ - stc2l 1, cr0, [r0, #32]! │ │ - stc2l 0, cr0, [r0, #1008]! @ 0x3f0 │ │ + stc2l 1, cr0, [r0, #212]! @ 0xd4 │ │ + stc2l 1, cr0, [r0, #164]! @ 0xa4 │ │ @ instruction: 0x019676b8 │ │ @ instruction: 0x019676fc │ │ orrseq r2, r6, r0, lsl #15 │ │ - stc2l 13, cr1, [r1, #980]! @ 0x3d4 │ │ - stc2l 0, cr0, [r0, #784]! @ 0x310 │ │ + stc2l 14, cr1, [r1, #136]! @ 0x88 │ │ + stc2l 0, cr0, [r0, #964]! @ 0x3c4 │ │ orrseq r2, r6, r8, ror #11 │ │ orrseq r7, r6, r0, asr #13 │ │ - ldc2l 15, cr15, [lr, #144] @ 0x90 │ │ - stc2l 0, cr0, [r0, #528]! @ 0x210 │ │ - stc2l 5, cr10, [r0, #1008]! @ 0x3f0 │ │ + ldc2l 15, cr15, [lr, #324] @ 0x144 │ │ + stc2l 0, cr0, [r0, #708]! @ 0x2c4 │ │ + stc2l 6, cr10, [r0, #164]! @ 0xa4 │ │ │ │ 024232a8 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 24232c4 │ │ @@ -1272757,16 +1272756,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 11, cr15, [lr, #900] @ 0x384 @ │ │ - stc2l 1, cr7, [r2, #500]! @ 0x1f4 │ │ + ldc2l 12, cr15, [lr, #56] @ 0x38 │ │ + stc2l 1, cr7, [r2, #680]! @ 0x2a8 │ │ │ │ 02423304 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #40 @ 0x28 │ │ mov ip, r1 │ │ mov r1, r0 │ │ @@ -1273145,32 +1273144,32 @@ │ │ bl 270d9f0 │ │ ldr r0, [pc, #84] @ 24238f8 │ │ mov r1, #25 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ b 242384c │ │ - ldc2l 10, cr9, [pc, #472] @ 2423a94 @ │ │ + ldc2l 10, cr9, [pc, #652] @ 2423b48 @ │ │ eorseq r3, r3, ip, lsl r7 │ │ eorseq r3, r3, r8, lsl r7 │ │ stc2l 14, cr10, [r2, #172]! @ 0xac │ │ - stc2l 12, cr5, [r0, #600]! @ 0x258 │ │ - ldc2l 7, cr15, [pc, #612] @ 2423b34 │ │ - ldc2l 9, cr1, [pc, #230] @ 24239ba @ │ │ - stc2l 7, cr7, [r1, #720]! @ 0x2d0 │ │ + stc2l 12, cr5, [r0, #780]! @ 0x30c │ │ + ldc2l 7, cr15, [pc, #792] @ 2423be8 │ │ + ldc2l 9, cr1, [pc, #320] @ 2423a14 @ │ │ + stc2l 7, cr7, [r1, #900]! @ 0x384 │ │ eorseq r3, r3, ip, asr #12 │ │ eorseq r3, r3, r4, lsr r6 │ │ stc2l 13, cr10, [r2, #284]! @ 0x11c │ │ - ldc2l 11, cr9, [pc, #524] @ 2423af4 @ │ │ - ldc2l 6, cr15, [pc, #724] @ 2423bc0 │ │ - stc2l 8, cr11, [r1, #348]! @ 0x15c │ │ + ldc2l 11, cr9, [pc, #704] @ 2423ba8 @ │ │ + ldc2l 6, cr15, [pc, #904] @ 2423c74 │ │ + vcmla.f16 d27, d17, d4, #270 │ │ stc2l 12, cr10, [r2, #780]! @ 0x30c │ │ - stc2l 7, cr15, [r0, #12]! │ │ - ldc2l 6, cr15, [pc, #180] @ 24239b0 │ │ - stc2l 3, cr3, [r1, #192]! @ 0xc0 │ │ + stc2l 7, cr15, [r0, #192]! @ 0xc0 │ │ + ldc2l 6, cr15, [pc, #360] @ 2423a64 │ │ + stc2l 3, cr3, [r1, #372]! @ 0x174 │ │ │ │ 024238fc : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ mov r6, r3 │ │ mov r4, r2 │ │ @@ -1273317,32 +1273316,32 @@ │ │ bl 270d9f0 │ │ ldr r0, [pc, #84] @ 2423ba0 │ │ mov r1, #25 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ b 2423af4 │ │ - ldc2l 7, cr9, [pc, #824] @ 2423e9c │ │ + ldc2l 7, cr9, [pc, #1004] @ 2423f50 │ │ eorseq r3, r3, r0, lsr #9 │ │ mlaseq r3, ip, r4, r3 │ │ - stc2l 0, cr15, [r1, #828]! @ 0x33c │ │ + stc2l 0, cr15, [r1, #1008]! @ 0x3f0 │ │ stc2l 7, cr12, [r2, #164]! @ 0xa4 │ │ - ldc2l 4, cr15, [pc, #964] @ 2423f3c │ │ - ldc2l 6, cr1, [pc, #812] @ 2423ea8 │ │ - stc2l 5, cr7, [r1, #48]! @ 0x30 │ │ + ldc2l 5, cr15, [pc, #120] @ 2423bf0 │ │ + ldc2l 6, cr1, [pc, #992] @ 2423f5c │ │ + stc2l 5, cr7, [r1, #228]! @ 0xe4 │ │ ldrsbteq r3, [r3], -r0 │ │ ldrhteq r3, [r3], -r8 │ │ - stc2l 15, cr14, [r1, #940]! @ 0x3ac │ │ - stc2l 9, cr5, [r0, #188]! @ 0xbc @ │ │ - ldc2l 4, cr15, [pc, #52] @ 2423bc8 │ │ - stc2l 5, cr11, [r1, #700]! @ 0x2bc │ │ - stc2l 15, cr14, [r1, #412]! @ 0x19c │ │ - stc2l 4, cr15, [r0, #364]! @ 0x16c │ │ - ldc2l 3, cr15, [pc, #532] @ 2423db8 │ │ - stc2l 0, cr3, [r1, #544]! @ 0x220 │ │ + stc2l 0, cr15, [r1, #96]! @ 0x60 │ │ + stc2l 9, cr5, [r0, #278]! @ 0x116 @ │ │ + ldc2l 4, cr15, [pc, #232] @ 2423c7c │ │ + stc2l 5, cr11, [r1, #880]! @ 0x370 │ │ + stc2l 15, cr14, [r1, #592]! @ 0x250 │ │ + stc2l 4, cr15, [r0, #544]! @ 0x220 │ │ + ldc2l 3, cr15, [pc, #712] @ 2423e6c │ │ + stc2l 0, cr3, [r1, #724]! @ 0x2d4 │ │ │ │ 02423ba4 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ @@ -1273357,15 +1273356,15 @@ │ │ mov r0, r4 │ │ bl 270d410 │ │ mov r0, r5 │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - stc2l 14, cr4, [r2, #832]! @ 0x340 │ │ + stc2l 14, cr4, [r2, #1012]! @ 0x3f4 │ │ │ │ 02423bf8 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #136 @ 0x88 │ │ mov r4, r0 │ │ bl 270ce10 │ │ @@ -1273485,26 +1273484,26 @@ │ │ pop {r4, r5, fp, pc} │ │ ldr r0, [sp, #8] │ │ cmp r0, #0 │ │ beq 2423cb4 │ │ mov r0, r4 │ │ bl 270d5f0 │ │ b 2423cb4 │ │ - stc2l 15, cr2, [r1, #868]! @ 0x364 │ │ + stc2l 0, cr3, [r1, #24]! │ │ @ instruction: 0x01966b94 │ │ ldrsbteq r3, [r3], -ip │ │ orrseq r6, r6, ip, ror fp │ │ orrseq r6, r6, r8, ror #22 │ │ - stc2l 3, cr15, [r0, #680]! @ 0x2a8 │ │ - ldc2l 8, cr11, [pc, #88] @ 2423e64 │ │ + stc2l 3, cr15, [r0, #860]! @ 0x35c │ │ + vcadd.f32 , , , #270 │ │ orrseq fp, r6, r8, lsl r9 │ │ - ldc2l 3, cr1, [pc, #840] @ 242415c │ │ - ldc2l 1, cr15, [pc, #276] @ 2423f2c │ │ - ldc2l 1, cr15, [lr, #44] @ 0x2c │ │ - stc2l 14, cr2, [r1, #212]! @ 0xd4 │ │ + ldc2l 3, cr1, [pc, #1020] @ 2424210 │ │ + ldc2l 1, cr15, [pc, #456] @ 2423fe0 │ │ + ldc2l 1, cr15, [lr, #224] @ 0xe0 │ │ + stc2l 14, cr2, [r1, #392]! @ 0x188 │ │ │ │ 02423e1c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #180 @ 0xb4 │ │ sub sp, sp, #6144 @ 0x1800 │ │ mov r4, r0 │ │ @@ -1274494,16 +1274493,16 @@ │ │ str r0, [sp] │ │ sub r2, fp, #36 @ 0x24 │ │ ldr r0, [pc, #412] @ 2424f38 │ │ add r3, sp, #1152 @ 0x480 │ │ add r0, pc, r0 │ │ bl 270d4e0 │ │ b 2424dd0 │ │ - stc2l 15, cr0, [r1, #32]! │ │ - stc2l 0, cr7, [r1, #832]! @ 0x340 │ │ + stc2l 15, cr0, [r1, #212]! @ 0xd4 │ │ + stc2l 0, cr7, [r1, #1012]! @ 0x3f4 │ │ mov r0, #5 │ │ sub r1, fp, #3136 @ 0xc40 │ │ str r0, [sp] │ │ sub r2, fp, #36 @ 0x24 │ │ ldr r0, [pc, #372] @ 2424f3c │ │ add r3, sp, #124 @ 0x7c │ │ add r0, pc, r0 │ │ @@ -1274549,75 +1274548,75 @@ │ │ b 2423f00 │ │ ldr r0, [sp, #36] @ 0x24 │ │ add r3, sp, #48 @ 0x30 │ │ cmp r8, r0 │ │ blt 2424a0c │ │ ldr r1, [sp, #20] │ │ b 2424464 │ │ - stc2l 14, cr0, [r1, #272]! @ 0x110 │ │ + stc2l 14, cr0, [r1, #452]! @ 0x1c4 │ │ eorseq r2, r3, r8, ror pc │ │ ldrshteq r2, [r3], -r8 │ │ - ldc2l 2, cr9, [pc, #972] @ 2425264 │ │ - ldc2l 4, cr9, [pc, #464] @ 242506c │ │ - stc2l 6, cr1, [r0, #784]! @ 0x310 │ │ + ldc2l 3, cr9, [pc, #128] @ 2424f18 │ │ + ldc2l 4, cr9, [pc, #644] @ 2425120 │ │ + stc2l 6, cr1, [r0, #964]! @ 0x3c4 │ │ eorseq r2, r3, r4, asr #27 │ │ eorseq r2, r3, r0, asr #27 │ │ eorseq r2, r3, r8, ror sp │ │ - ldc2l 2, cr9, [pc, #928] @ 2425250 │ │ - stc2l 10, cr2, [r1, #844]! @ 0x34c @ │ │ - ldc2l 2, cr9, [pc, #832] @ 24251f8 │ │ - ldc2l 7, cr5, [pc, #136] @ 2424f44 │ │ - ldc2l 3, cr3, [pc] @ 2424ec0 │ │ - ldc2l 2, cr9, [pc, #208] @ 2424f94 │ │ - ldc2l 1, cr9, [pc, #800] @ 24251e8 │ │ - ldc2l 2, cr3, [pc, #496] @ 24250bc │ │ - ldc2l 1, cr9, [pc, #704] @ 2425190 │ │ - ldc2l 2, cr3, [pc, #288] @ 2424ff4 │ │ + ldc2l 3, cr9, [pc, #84] @ 2424f04 │ │ + stc2l 11, cr2, [r1] @ │ │ + ldc2l 2, cr9, [pc, #1012] @ 24252ac │ │ + ldc2l 7, cr5, [pc, #316] @ 2424ff8 │ │ + ldc2l 3, cr3, [pc, #180] @ 2424f74 │ │ + ldc2l 2, cr9, [pc, #388] @ 2425048 │ │ + ldc2l 1, cr9, [pc, #980] @ 242529c │ │ + ldc2l 2, cr3, [pc, #676] @ 2425170 │ │ + ldc2l 1, cr9, [pc, #884] @ 2425244 │ │ + ldc2l 2, cr3, [pc, #468] @ 24250a8 │ │ eorseq r2, r3, r4, lsr #23 │ │ - ldc2l 5, cr5, [pc, #632] @ 2425154 │ │ - vcmla.f16 q14, , q4, #270 │ │ + ldc2l 5, cr5, [pc, #812] @ 2425208 │ │ + stc2l 8, cr12, [r1, #980]! @ 0x3d4 │ │ stc2l 12, cr4, [fp, #432]! @ 0x1b0 │ │ - ldc2l 5, cr5, [pc, #184] @ 2424fa0 │ │ + ldc2l 5, cr5, [pc, #364] @ 2425054 │ │ eorseq r2, r3, r8, ror #21 │ │ - stc2l 8, cr2, [r1, #380]! @ 0x17c │ │ + vcmla.f16 d18, d17, d12, #270 │ │ stc2l 12, cr4, [fp] │ │ stc2l 11, cr4, [fp, #768]! @ 0x300 @ │ │ eorseq r2, r3, ip, asr #20 │ │ eorseq r2, r3, r4, lsr #20 │ │ @ instruction: 0x0196b1f4 │ │ ldrhteq r2, [r3], -r8 │ │ - ldc2l 3, cr5, [pc, #792] @ 2425224 │ │ - ldc2l 15, cr8, [pc, #208] @ 2424fe0 │ │ - ldc2l 0, cr13, [pc, #868] @ 2425278 │ │ - ldc2l 6, cr8, [pc, #472] @ 24250f0 │ │ - ldc2l 6, cr8, [pc, #328] @ 2425064 │ │ - ldc2l 6, cr8, [pc, #184] @ 2424fd8 │ │ - ldc2l 4, cr8, [pc, #936] @ 24252cc │ │ - stc2l 2, cr6, [r1, #864]! @ 0x360 │ │ - ldc2l 4, cr8, [pc, #536] @ 2425144 │ │ - stc2l 2, cr6, [r1, #496]! @ 0x1f0 │ │ - ldc2l 4, cr8, [pc, #168] @ 2424fdc │ │ - stc2l 2, cr6, [r1, #112]! @ 0x70 │ │ - stc2l 1, cr6, [r1, #704]! @ 0x2c0 │ │ - stc2l 1, cr6, [r1, #560]! @ 0x230 │ │ - stc2l 1, cr6, [r1, #384]! @ 0x180 │ │ - ldc2l 14, cr8, [pc, #384] @ 24250c8 │ │ - ldc2l 15, cr12, [pc, #836] @ 2425290 │ │ - ldc2l 14, cr2, [pc, #48] @ 2424f80 │ │ - stc2l 14, cr0, [r0, #832]! @ 0x340 │ │ - ldc2l 10, cr8, [pc, #796] @ 2425274 @ │ │ - stc2l 5, cr12, [r1, #736]! @ 0x2e0 │ │ + ldc2l 3, cr5, [pc, #972] @ 24252d8 │ │ + ldc2l 15, cr8, [pc, #388] @ 2425094 │ │ + ldc2l 1, cr13, [pc, #24] @ 2424f2c │ │ + ldc2l 6, cr8, [pc, #652] @ 24251a4 │ │ + ldc2l 6, cr8, [pc, #508] @ 2425118 │ │ + ldc2l 6, cr8, [pc, #364] @ 242508c │ │ + ldc2l 5, cr8, [pc, #92] @ 2424f80 │ │ + stc2l 3, cr6, [r1, #20]! │ │ + ldc2l 4, cr8, [pc, #716] @ 24251f8 │ │ + stc2l 2, cr6, [r1, #676]! @ 0x2a4 │ │ + ldc2l 4, cr8, [pc, #348] @ 2425090 │ │ + stc2l 2, cr6, [r1, #292]! @ 0x124 │ │ + stc2l 1, cr6, [r1, #884]! @ 0x374 │ │ + stc2l 1, cr6, [r1, #740]! @ 0x2e4 │ │ + stc2l 1, cr6, [r1, #564]! @ 0x234 │ │ + ldc2l 14, cr8, [pc, #564] @ 242517c │ │ + ldc2l 15, cr12, [pc, #1016] @ 2425344 │ │ + ldc2l 14, cr2, [pc, #228] @ 2425034 │ │ + stc2l 14, cr0, [r0, #1012]! @ 0x3f4 │ │ + ldc2l 10, cr8, [pc, #976] @ 2425328 @ │ │ + stc2l 5, cr12, [r1, #916]! @ 0x394 │ │ stc2l 9, cr4, [fp, #176]! @ 0xb0 @ │ │ - ldc2l 14, cr2, [pc, #320] @ 24250a4 │ │ - ldc2l 1, cr5, [pc, #920] @ 2425300 │ │ - ldc2l 13, cr2, [pc, #752] @ 242525c │ │ - ldc2l 1, cr5, [pc, #312] @ 24250a8 │ │ - stc2l 14, cr0, [r0, #448]! @ 0x1c0 │ │ - ldc2l 10, cr8, [pc, #412] @ 2425114 @ │ │ - stc2l 6, cr6, [r1, #976]! @ 0x3d0 │ │ + ldc2l 14, cr2, [pc, #500] @ 2425158 │ │ + ldc2l 2, cr5, [pc, #76] @ 2424fb4 │ │ + ldc2l 13, cr2, [pc, #932] @ 2425310 │ │ + ldc2l 1, cr5, [pc, #492] @ 242515c │ │ + stc2l 14, cr0, [r0, #628]! @ 0x274 │ │ + ldc2l 10, cr8, [pc, #592] @ 24251c8 @ │ │ + stc2l 7, cr6, [r1, #132]! @ 0x84 │ │ │ │ 02424f78 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #116 @ 0x74 │ │ mov r5, r2 │ │ mov r6, r1 │ │ @@ -1274737,19 +1274736,19 @@ │ │ ldr r0, [pc, #36] @ 242517c │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 7, cr1, [r2, #568]! @ 0x238 │ │ + stc2l 7, cr1, [r2, #748]! @ 0x2ec │ │ eorseq r1, r3, r8, lsl lr │ │ @ instruction: 0x0196a598 │ │ eorseq r1, r3, r8, ror #25 │ │ - stc2l 5, cr1, [r2, #872]! @ 0x368 │ │ + stc2l 6, cr1, [r2, #28]! │ │ │ │ 02425180 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #148 @ 0x94 │ │ sub sp, sp, #1024 @ 0x400 │ │ mov r4, r2 │ │ @@ -1275401,54 +1275400,54 @@ │ │ ldr r2, [pc, #140] @ 2425c3c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2425af8 │ │ stc2l 15, cr10, [r2, #532]! @ 0x214 │ │ - ldc2l 3, cr12, [pc, #388] @ 2425d50 │ │ + ldc2l 3, cr12, [pc, #568] @ 2425e04 │ │ stc2l 15, cr10, [r2, #128]! @ 0x80 │ │ - stc2l 3, cr0, [r0, #880]! @ 0x370 │ │ + stc2l 4, cr0, [r0, #36]! @ 0x24 │ │ stc2l 14, cr10, [r2, #960]! @ 0x3c0 │ │ - stc2l 0, cr8, [r0, #796]! @ 0x31c │ │ - ldc2l 11, cr13, [pc, #452] @ 2425da4 @ │ │ - stc2l 0, cr4, [r0, #184]! @ 0xb8 │ │ - stc2l 10, cr15, [r0, #316]! @ 0x13c @ │ │ - ldc2l 11, cr13, [pc, #676] @ 2425e90 @ │ │ - stc2l 5, cr15, [r1, #784]! @ 0x310 │ │ + stc2l 0, cr8, [r0, #976]! @ 0x3d0 │ │ + ldc2l 11, cr13, [pc, #632] @ 2425e58 @ │ │ + stc2l 0, cr4, [r0, #364]! @ 0x16c │ │ + stc2l 10, cr15, [r0, #496]! @ 0x1f0 @ │ │ + ldc2l 11, cr13, [pc, #856] @ 2425f44 @ │ │ + stc2l 5, cr15, [r1, #964]! @ 0x3c4 │ │ eorseq r1, r3, ip, ror #22 │ │ - ldc2l 15, cr11, [pc, #868] @ 2425f5c │ │ + ldc2l 0, cr12, [pc, #24] @ 2425c10 │ │ stc2l 11, cr10, [r2, #608]! @ 0x260 @ │ │ - ldc2l 0, cr12, [pc, #436] @ 2425db4 │ │ + ldc2l 0, cr12, [pc, #616] @ 2425e68 │ │ stc2l 12, cr10, [r2, #176]! @ 0xb0 │ │ eorseq r1, r3, r0, ror #15 │ │ - ldc2l 13, cr11, [pc, #452] @ 2425dd0 │ │ + ldc2l 13, cr11, [pc, #632] @ 2425e84 │ │ stc2l 9, cr10, [r2, #96]! @ 0x60 @ │ │ - ldc2l 13, cr15, [pc, #496] @ 2425e04 │ │ + ldc2l 13, cr15, [pc, #676] @ 2425eb8 │ │ stc2l 8, cr10, [r2, #576]! @ 0x240 │ │ - ldc2l 9, cr7, [pc, #222] @ 2425cfa @ │ │ + ldc2l 9, cr7, [pc, #312] @ 2425d54 @ │ │ stc2l 8, cr10, [r2, #368]! @ 0x170 │ │ - stc2l 2, cr11, [r1, #128]! @ 0x80 │ │ + stc2l 2, cr11, [r1, #308]! @ 0x134 │ │ stc2l 7, cr10, [r2, #608]! @ 0x260 │ │ stc2l 5, cr3, [fp, #816]! @ 0x330 │ │ - ldc2l 10, cr11, [pc, #756] @ 2425f24 @ │ │ + ldc2l 10, cr11, [pc, #936] @ 2425fd8 @ │ │ stc2l 6, cr10, [r2, #496]! @ 0x1f0 │ │ - ldc2l 10, cr15, [pc, #704] @ 2425ef8 @ │ │ + ldc2l 10, cr15, [pc, #884] @ 2425fac @ │ │ stc2l 5, cr10, [r2, #784]! @ 0x310 │ │ - ldc2l 6, cr7, [pc, #636] @ 2425ebc │ │ + ldc2l 6, cr7, [pc, #816] @ 2425f70 │ │ stc2l 5, cr10, [r2, #560]! @ 0x230 │ │ eorseq r1, r3, r0, lsr #6 │ │ eorseq r1, r3, r8, lsl #6 │ │ ldrshteq r1, [r3], -r4 │ │ ldrsbteq r1, [r3], -r8 │ │ - ldc2l 13, cr11, [pc, #148] @ 2425cec │ │ + ldc2l 13, cr11, [pc, #328] @ 2425da0 │ │ vcmla.f16 q13, q9, q10, #270 │ │ - ldc2l 13, cr15, [pc, #192] @ 2425d20 │ │ + ldc2l 13, cr15, [pc, #372] @ 2425dd4 │ │ vcmla.f16 q13, q1, q2, #270 │ │ - ldc2l 9, cr7, [pc, #70] @ 2425cae @ │ │ + ldc2l 9, cr7, [pc, #160] @ 2425d08 @ │ │ stc2l 8, cr10, [r2, #64]! @ 0x40 │ │ stc2l 7, cr10, [r2, #804]! @ 0x324 │ │ │ │ 02425c6c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ @@ -1275577,21 +1275576,21 @@ │ │ add r0, sp, #12 │ │ str r0, [sp, #8] │ │ ldr r1, [pc, #32] @ 2425e90 │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ bl 270d3d0 │ │ b 2425dd4 │ │ - stc2l 13, cr12, [r1, #904]! @ 0x388 │ │ - stc2l 9, cr4, [r2, #134]! @ 0x86 @ │ │ - ldc2l 1, cr13, [pc, #852] @ 24261e0 │ │ + stc2l 14, cr12, [r1, #60]! @ 0x3c │ │ + stc2l 9, cr4, [r2, #224]! @ 0xe0 @ │ │ + ldc2l 2, cr13, [pc, #8] @ 2425e94 │ │ stc2l 8, cr8, [r2, #72]! @ 0x48 │ │ ldrsbteq r1, [r3], -r4 │ │ ldrsbteq r0, [r3], -r0 │ │ - stc2l 13, cr12, [r1, #312]! @ 0x138 │ │ + stc2l 13, cr12, [r1, #492]! @ 0x1ec │ │ │ │ 02425e98 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #80 @ 0x50 │ │ mov r4, r3 │ │ mov r5, r2 │ │ @@ -1275626,15 +1275625,15 @@ │ │ str r1, [r5] │ │ mov r1, #6 │ │ str r2, [r4] │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - stc2l 13, cr0, [r1, #208]! @ 0xd0 │ │ + stc2l 13, cr0, [r1, #388]! @ 0x184 │ │ │ │ 02425f3c : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r7, r1 │ │ ldr r1, [fp, #8] │ │ mov r4, r3 │ │ @@ -1275739,24 +1275738,24 @@ │ │ bl 270cdf0 │ │ ldr r0, [pc, #52] @ 2426110 │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r4 │ │ pop {r4, r5, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 4, cr9, [pc, #760] @ 24263ec │ │ - stc2l 3, cr4, [r2, #576]! @ 0x240 │ │ - ldc2l 14, cr12, [pc, #212] @ 24261d0 │ │ - ldc2l 3, cr11, [pc, #360] @ 2426268 │ │ - stc2l 8, cr12, [r1, #960]! @ 0x3c0 │ │ - ldc2l 4, cr9, [pc, #520] @ 2426310 │ │ - stc2l 1, cr5, [r0, #40]! @ 0x28 │ │ - ldc2l 13, cr12, [pc, #996] @ 24264f4 │ │ - ldc2l 3, cr11, [pc, #120] @ 242618c │ │ - ldc2l 2, cr5, [pc, #392] @ 24262a0 │ │ + ldc2l 4, cr9, [pc, #940] @ 24264a0 │ │ + stc2l 3, cr4, [r2, #756]! @ 0x2f4 │ │ + ldc2l 14, cr12, [pc, #392] @ 2426284 │ │ + ldc2l 3, cr11, [pc, #540] @ 242631c │ │ + stc2l 9, cr12, [r1, #58]! @ 0x3a @ │ │ + ldc2l 4, cr9, [pc, #700] @ 24263c4 │ │ + stc2l 1, cr5, [r0, #220]! @ 0xdc │ │ + ldc2l 14, cr12, [pc, #152] @ 24261a8 │ │ + ldc2l 3, cr11, [pc, #300] @ 2426240 │ │ + ldc2l 2, cr5, [pc, #572] @ 2426354 │ │ │ │ 02426114 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r6, r1 │ │ ldr r1, [pc, #80] @ 2426178 │ │ mov r2, r6 │ │ @@ -1275776,15 +1275775,15 @@ │ │ ldrb r2, [r1, r0] │ │ cmp r2, #32 │ │ bne 2426174 │ │ subs r0, r0, #1 │ │ bgt 242615c │ │ mov r0, r4 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 12, cr0, [pc, #892] @ 24264fc │ │ + ldc2l 13, cr0, [pc, #48] @ 24261b0 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 02426180 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ mov r7, r0 │ │ ldrb r0, [r0] │ │ @@ -1275908,16 +1275907,16 @@ │ │ andeq r0, r0, r6 │ │ andeq r0, r0, r7 │ │ andeq r0, r0, r8 │ │ andeq r0, r0, r1 │ │ andeq r0, r0, r2 │ │ andeq r0, r0, r3 │ │ andeq r0, r0, r4 │ │ - ldc2l 12, cr0, [pc, #44] @ 24263b4 │ │ - ldc2l 10, cr0, [pc, #860] @ 24266e8 @ │ │ + ldc2l 12, cr0, [pc, #224] @ 2426468 │ │ + ldc2l 11, cr0, [pc, #16] @ 242639c @ │ │ │ │ 02426388 : │ │ ldr r2, [r0, #44] @ 0x2c │ │ cmp r2, #0 │ │ beq 24263dc │ │ ldr r2, [r0, #32] │ │ str r2, [r1] │ │ @@ -1275954,17 +1275953,17 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #5 │ │ bl 270ce40 │ │ pop {r4, sl, fp, lr} │ │ mov r0, #0 │ │ bx lr │ │ - ldc2l 12, cr12, [pc, #236] @ 2426524 │ │ - stc2l 13, cr10, [r0, #968]! @ 0x3c8 │ │ - stc2l 14, cr10, [r0, #196]! @ 0xc4 │ │ + ldc2l 12, cr12, [pc, #416] @ 24265d8 │ │ + stc2l 14, cr10, [r0, #124]! @ 0x7c │ │ + stc2l 14, cr10, [r0, #376]! @ 0x178 │ │ │ │ 0242643c : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ mov r5, r2 │ │ ldr r2, [r0] │ │ mov r9, r1 │ │ @@ -1276148,27 +1276147,27 @@ │ │ add r0, r3, r0 │ │ str r2, [r1, #40] @ 0x28 │ │ ldr r1, [r6] │ │ str r0, [r5, #44] @ 0x2c │ │ mov r0, #0 │ │ str r1, [r5, #32] │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - stc2l 13, cr10, [r0, #896]! @ 0x380 │ │ - stc2l 11, cr2, [r1, #84]! @ 0x54 @ │ │ - ldc2l 10, cr12, [pc, #148] @ 24267d4 @ │ │ - ldc2l 1, cr15, [pc, #484] @ 2426928 │ │ - stc2l 12, cr10, [r0, #176]! @ 0xb0 │ │ - ldc2l 14, cr8, [pc, #988] @ 2426b28 │ │ - ldc2l 8, cr12, [pc, #452] @ 2426914 │ │ - ldc2l 15, cr4, [pc, #536] @ 242696c │ │ - stc2l 13, cr10, [r0, #192]! @ 0xc0 │ │ - ldc2l 10, cr12, [pc, #980] @ 2426b30 @ │ │ - ldc2l 9, cr12, [pc, #234] @ 242684a @ │ │ + stc2l 14, cr10, [r0, #52]! @ 0x34 │ │ + stc2l 11, cr2, [r1, #264]! @ 0x108 @ │ │ + ldc2l 10, cr12, [pc, #328] @ 2426888 @ │ │ + ldc2l 1, cr15, [pc, #664] @ 24269dc │ │ + stc2l 12, cr10, [r0, #356]! @ 0x164 │ │ + ldc2l 15, cr8, [pc, #144] @ 24267dc │ │ + ldc2l 8, cr12, [pc, #632] @ 24269c8 │ │ + ldc2l 15, cr4, [pc, #716] @ 2426a20 │ │ + stc2l 13, cr10, [r0, #372]! @ 0x174 │ │ + ldc2l 11, cr12, [pc, #136] @ 24267e4 @ │ │ + ldc2l 9, cr12, [pc, #324] @ 24268a4 @ │ │ orrseq r9, r6, ip, lsr #8 │ │ - stc2l 9, cr6, [r1, #320]! @ 0x140 @ │ │ + stc2l 9, cr6, [r1, #410]! @ 0x19a @ │ │ │ │ 02426764 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ mov r9, r1 │ │ ldr r1, [r0] │ │ cmp r1, #1 │ │ @@ -1276293,23 +1276292,23 @@ │ │ b 242695c │ │ rsb r0, r0, #11 │ │ str r4, [r2, r0, lsl #2] │ │ add r0, r2, r1, lsl #3 │ │ str r3, [r0, #40] @ 0x28 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 7, cr12, [lr, #224] @ 0xe0 │ │ - ldc2l 13, cr8, [pc, #800] @ 2426c98 │ │ - ldc2l 7, cr12, [pc, #4] @ 2426980 │ │ - ldc2l 14, cr14, [pc, #340] @ 2426ad4 │ │ - ldc2l 6, cr12, [lr, #528] @ 0x210 │ │ - stc2l 7, cr4, [r1, #936]! @ 0x3a8 │ │ - ldc2l 6, cr12, [pc, #308] @ 2426ac0 │ │ + ldc2l 7, cr12, [lr, #404] @ 0x194 │ │ + ldc2l 13, cr8, [pc, #980] @ 2426d4c │ │ + ldc2l 7, cr12, [pc, #184] @ 2426a34 │ │ + ldc2l 14, cr14, [pc, #520] @ 2426b88 │ │ + ldc2l 6, cr12, [lr, #708] @ 0x2c4 │ │ + stc2l 8, cr4, [r1, #92]! @ 0x5c │ │ + ldc2l 6, cr12, [pc, #488] @ 2426b74 │ │ orrseq r9, r6, r8, lsl #2 │ │ - stc2l 6, cr6, [r1, #480]! @ 0x1e0 │ │ + stc2l 6, cr6, [r1, #660]! @ 0x294 │ │ │ │ 02426990 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ mov r4, r0 │ │ ldr r0, [r1] │ │ cmp r0, #1 │ │ @@ -1276435,23 +1276434,23 @@ │ │ mov r0, #10 │ │ rsb r3, r6, #0 │ │ sub r0, r0, r1, lsl #1 │ │ str r3, [r2, r0, lsl #2] │ │ str r1, [r7, #44] @ 0x2c │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 7, cr12, [pc, #28] @ 2426bc0 │ │ - stc2l 6, cr12, [r0, #500]! @ 0x1f4 │ │ - ldc2l 4, cr12, [pc, #852] @ 2426f00 │ │ - ldc2l 12, cr14, [pc, #164] @ 2426c54 │ │ - ldc2l 6, cr12, [pc, #332] @ 2426d00 │ │ - stc2l 7, cr10, [r0, #828]! @ 0x33c │ │ - ldc2l 4, cr12, [pc, #132] @ 2426c40 │ │ + ldc2l 7, cr12, [pc, #208] @ 2426c74 │ │ + stc2l 6, cr12, [r0, #680]! @ 0x2a8 │ │ + ldc2l 5, cr12, [pc, #8] @ 2426bb4 │ │ + ldc2l 12, cr14, [pc, #344] @ 2426d08 │ │ + ldc2l 6, cr12, [pc, #512] @ 2426db4 │ │ + stc2l 7, cr10, [r0, #1008]! @ 0x3f0 │ │ + ldc2l 4, cr12, [pc, #312] @ 2426cf4 │ │ orrseq r8, r6, r0, ror #29 │ │ - stc2l 4, cr6, [r1, #304]! @ 0x130 │ │ + stc2l 4, cr6, [r1, #484]! @ 0x1e4 │ │ │ │ 02426bc0 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0] │ │ cmp r0, #0 │ │ @@ -1276534,18 +1276533,18 @@ │ │ nop {0} │ │ nop {0} │ │ nop {0} │ │ andeq r0, r0, r1 │ │ andeq r0, r0, r2 │ │ andeq r0, r0, r3 │ │ andeq r0, r0, r4 │ │ - ldc2l 9, cr8, [pc, #128] @ 2426da8 @ │ │ - stc2l 10, cr15, [r1, #772]! @ 0x304 @ │ │ - ldc2l 2, cr12, [pc, #212] @ 2426e04 │ │ - stc2l 7, cr4, [r0, #84]! @ 0x54 │ │ + ldc2l 9, cr8, [pc, #218] @ 2426e02 @ │ │ + stc2l 10, cr15, [r1, #952]! @ 0x3b8 @ │ │ + ldc2l 2, cr12, [pc, #392] @ 2426eb8 │ │ + stc2l 7, cr4, [r0, #264]! @ 0x108 │ │ │ │ 02426d30 : │ │ ldr r0, [r0, #44] @ 0x2c │ │ bx lr │ │ │ │ 02426d38 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ @@ -1276624,23 +1276623,23 @@ │ │ mov r2, #1 │ │ add r1, pc, r1 │ │ bl 270da90 │ │ ldr r0, [pc, #40] @ 2426e98 │ │ mov r1, #22 │ │ add r0, pc, r0 │ │ b 2426db8 │ │ - ldc2l 1, cr12, [lr, #444] @ 0x1bc │ │ - stc2l 15, cr13, [r0, #1012]! @ 0x3f4 │ │ - ldc2l 1, cr12, [pc, #196] @ 2426f4c │ │ - ldc2l 8, cr14, [pc, #596] @ 24270e0 │ │ - ldc2l 0, cr12, [lr, #924] @ 0x39c │ │ - stc2l 6, cr6, [r0, #88]! @ 0x58 │ │ - ldc2l 0, cr12, [pc, #676] @ 242713c │ │ + ldc2l 1, cr12, [lr, #624] @ 0x270 │ │ + stc2l 0, cr14, [r0, #168]! @ 0xa8 │ │ + ldc2l 1, cr12, [pc, #376] @ 2427000 │ │ + vcadd.f32 q15, , q1, #270 │ │ + ldc2l 1, cr12, [lr, #80] @ 0x50 │ │ + stc2l 6, cr6, [r0, #268]! @ 0x10c │ │ + ldc2l 0, cr12, [pc, #856] @ 24271f0 │ │ orrseq r8, r6, ip, lsr #23 │ │ - stc2l 1, cr6, [r1, #80]! @ 0x50 │ │ + stc2l 1, cr6, [r1, #260]! @ 0x104 │ │ │ │ 02426e9c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r5, r0 │ │ ldr r0, [r0] │ │ mov r4, r1 │ │ @@ -1276712,24 +1276711,24 @@ │ │ mov r2, #1 │ │ add r1, pc, r1 │ │ bl 270da90 │ │ ldr r0, [pc, #40] @ 2426ff0 │ │ mov r1, #22 │ │ add r0, pc, r0 │ │ b 2426f18 │ │ - ldc2l 0, cr12, [lr, #72] @ 0x48 │ │ - stc2l 14, cr13, [r0, #628]! @ 0x274 │ │ - ldc2l 15, cr11, [pc, #836] @ 2427324 │ │ - ldc2l 7, cr14, [pc, #212] @ 24270b8 │ │ - ldc2l 15, cr11, [lr, #584] @ 0x248 │ │ - stc2l 4, cr6, [r0, #760]! @ 0x2f8 │ │ - ldc2l 15, cr11, [pc, #324] @ 2427134 │ │ + ldc2l 0, cr12, [lr, #252] @ 0xfc │ │ + stc2l 14, cr13, [r0, #808]! @ 0x328 │ │ + ldc2l 15, cr11, [pc, #1016] @ 24273d8 │ │ + ldc2l 7, cr14, [pc, #392] @ 242716c │ │ + ldc2l 15, cr11, [lr, #764] @ 0x2fc │ │ + stc2l 4, cr6, [r0, #940]! @ 0x3ac │ │ + ldc2l 15, cr11, [pc, #504] @ 24271e8 │ │ orrseq r8, r6, r8, asr sl │ │ - stc2l 15, cr5, [r1, #752]! @ 0x2f0 │ │ - ldc2l 15, cr11, [lr, #744] @ 0x2e8 │ │ + stc2l 15, cr5, [r1, #932]! @ 0x3a4 │ │ + ldc2l 15, cr11, [lr, #924] @ 0x39c │ │ │ │ 02426ff8 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r5, r0 │ │ ldr r0, [r0] │ │ mov r4, #0 │ │ @@ -1276811,24 +1276810,24 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #52] @ 2427178 │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, r4 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - stc2l 0, cr4, [r1, #752]! @ 0x2f0 │ │ - stc2l 13, cr13, [r0, #244]! @ 0xf4 │ │ - ldc2l 14, cr11, [pc, #452] @ 2427328 │ │ - ldc2l 5, cr14, [pc, #852] @ 24274bc │ │ - stc2l 0, cr4, [r1, #192]! @ 0xc0 │ │ - stc2l 3, cr6, [r0, #328]! @ 0x148 │ │ - ldc2l 13, cr11, [pc, #916] @ 2427508 │ │ + stc2l 0, cr4, [r1, #932]! @ 0x3a4 │ │ + stc2l 13, cr13, [r0, #424]! @ 0x1a8 │ │ + ldc2l 14, cr11, [pc, #632] @ 24273dc │ │ + ldc2l 6, cr14, [pc, #8] @ 2427170 │ │ + stc2l 0, cr4, [r1, #372]! @ 0x174 │ │ + stc2l 3, cr6, [r0, #508]! @ 0x1fc │ │ + ldc2l 14, cr11, [pc, #72] @ 24271bc │ │ @ instruction: 0x019688f0 │ │ - stc2l 14, cr5, [r1, #320]! @ 0x140 │ │ - stc2l 15, cr3, [r1, #656]! @ 0x290 │ │ + stc2l 14, cr5, [r1, #500]! @ 0x1f4 │ │ + stc2l 15, cr3, [r1, #836]! @ 0x344 │ │ │ │ 0242717c : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ mov r9, r1 │ │ ldr r1, [r0] │ │ mov r5, r2 │ │ @@ -1277002,27 +1277001,27 @@ │ │ ldr r0, [r9] │ │ ldr r1, [r6] │ │ add r0, r5, r0, lsl #3 │ │ rsb r1, r1, #0 │ │ str r1, [r0, #40] @ 0x28 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - stc2l 7, cr13, [r1, #316]! @ 0x13c │ │ - stc2l 13, cr1, [r1, #852]! @ 0x354 │ │ - ldc2l 12, cr11, [pc, #916] @ 24277ec │ │ - ldc2l 4, cr14, [pc, #228] @ 2427540 │ │ - stc2l 5, cr13, [r1, #652]! @ 0x28c │ │ - ldc2l 1, cr8, [pc, #764] @ 2427760 │ │ - ldc2l 11, cr11, [pc, #228] @ 242754c @ │ │ - ldc2l 2, cr4, [pc, #312] @ 24275a4 │ │ - stc2l 6, cr13, [r1, #636]! @ 0x27c │ │ - ldc2l 13, cr11, [pc, #724] @ 2427748 │ │ - ldc2l 12, cr11, [pc, #212] @ 242754c │ │ + stc2l 7, cr13, [r1, #496]! @ 0x1f0 │ │ + stc2l 14, cr1, [r1, #8]! │ │ + ldc2l 13, cr11, [pc, #72] @ 24274a0 │ │ + ldc2l 4, cr14, [pc, #408] @ 24275f4 │ │ + stc2l 5, cr13, [r1, #832]! @ 0x340 │ │ + ldc2l 1, cr8, [pc, #944] @ 2427814 │ │ + ldc2l 11, cr11, [pc, #408] @ 2427600 @ │ │ + ldc2l 2, cr4, [pc, #492] @ 2427658 │ │ + stc2l 6, cr13, [r1, #816]! @ 0x330 │ │ + ldc2l 13, cr11, [pc, #904] @ 24277fc │ │ + ldc2l 12, cr11, [pc, #392] @ 2427600 │ │ orrseq r8, r6, r4, lsl #14 │ │ - stc2l 12, cr5, [r1, #384]! @ 0x180 │ │ + stc2l 12, cr5, [r1, #564]! @ 0x234 │ │ │ │ 0242747c : │ │ ldr r3, [r1] │ │ mov ip, r0 │ │ mov r0, #0 │ │ cmp r3, #1 │ │ ldrge ip, [ip] │ │ @@ -1277216,15 +1277215,15 @@ │ │ mov r1, r4 │ │ bl 270da20 │ │ sub r0, r6, r0 │ │ add r0, r0, #1 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 6, cr15, [lr, #956] @ 0x3bc │ │ + ldc2l 7, cr15, [lr, #112] @ 0x70 │ │ │ │ 02427764 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ ldr r4, [pc, #460] @ 2427944 │ │ mov sl, r0 │ │ @@ -1277344,15 +1277343,15 @@ │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ eorseq r3, r1, r4, lsr #24 │ │ eorseq r3, r1, r0, lsr #24 │ │ eorseq r3, r1, r0, lsl #25 │ │ ldrhteq pc, [r2], -r0 @ │ │ orrseq r8, r6, r8, asr r2 │ │ - ldc2l 14, cr13, [pc, #320] @ 2427aa0 │ │ + ldc2l 14, cr13, [pc, #500] @ 2427b54 │ │ eorseq pc, r2, r4, asr #12 │ │ mlaseq r2, r8, r5, pc @ │ │ eorseq r3, r1, r0, lsl #21 │ │ │ │ 02427968 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ @@ -1277442,15 +1277441,15 @@ │ │ strb sl, [r8, r1] │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ eorseq r3, r1, r4, lsr #21 │ │ eorseq r3, r1, r4, lsl sl │ │ eorseq pc, r2, r8, asr #9 │ │ orrseq r8, r6, ip, rrx │ │ - ldc2l 12, cr13, [pc, #400] @ 2427c70 │ │ + ldc2l 12, cr13, [pc, #580] @ 2427d24 │ │ eorseq pc, r2, r8, asr r4 @ │ │ ldrhteq pc, [r2], -r4 @ │ │ │ │ 02427ae4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #276 @ 0x114 │ │ @@ -1277829,29 +1277828,29 @@ │ │ mov r0, #129 @ 0x81 │ │ mov r2, sl │ │ add r1, pc, r1 │ │ bl 2428118 │ │ mov r0, #129 @ 0x81 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 6, cr3, [pc, #452] @ 24282a8 │ │ + ldc2l 6, cr3, [pc, #632] @ 242835c │ │ eorseq r3, r1, r0, asr #16 │ │ eorseq r3, r1, r8, lsl #16 │ │ ldrshteq r3, [r1], -r0 │ │ - ldc2l 3, cr3, [pc, #340] @ 2428248 │ │ - vcadd.f32 , , , #270 │ │ - ldc2l 4, cr3, [pc, #68] @ 2428140 │ │ - ldc2l 2, cr3, [pc, #308] @ 2428234 │ │ - ldc2l 1, cr3, [pc, #868] @ 2428468 │ │ + ldc2l 3, cr3, [pc, #520] @ 24282fc │ │ + ldc2l 9, cr3, [pc, #48] @ 2428128 @ │ │ + ldc2l 4, cr3, [pc, #248] @ 24281f4 │ │ + ldc2l 2, cr3, [pc, #488] @ 24282e8 │ │ + ldc2l 2, cr3, [pc, #24] @ 242811c │ │ eorseq r3, r1, r4, ror #11 │ │ - ldc2l 2, cr13, [lr, #452] @ 0x1c4 │ │ + ldc2l 2, cr13, [lr, #632] @ 0x278 │ │ eorseq r3, r1, r0, lsl r5 │ │ ldrshteq r3, [r1], -r4 │ │ - ldc2l 2, cr3, [pc, #4] @ 242811c │ │ - ldc2l 1, cr3, [pc, #740] @ 2428400 │ │ + ldc2l 2, cr3, [pc, #184] @ 24281d0 │ │ + ldc2l 1, cr3, [pc, #920] @ 24284b4 │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ ldr r8, [r2, #8] │ │ cmp r8, #0 │ │ beq 2428220 │ │ ldr ip, [pc, #244] @ 2428228 │ │ ldr ip, [pc, ip] │ │ @@ -1277915,15 +1277914,15 @@ │ │ mov r1, r7 │ │ mov r0, r6 │ │ pop {r4, r5, r6, r7, r8, r9, fp, lr} │ │ b 270d8c0 │ │ ldrshteq r3, [r1], -r0 │ │ eorseq lr, r2, ip, lsl sp │ │ @ instruction: 0x019678bc │ │ - ldc2l 4, cr13, [pc, #608] @ 242849c │ │ + ldc2l 4, cr13, [pc, #788] @ 2428550 │ │ eorseq lr, r2, ip, lsl #25 │ │ eorseq lr, r2, r0, ror ip │ │ eorseq r3, r1, r8, asr #2 │ │ │ │ 02428244 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ @@ -1277962,18 +1277961,18 @@ │ │ mov r0, sp │ │ str r1, [sp, #32] │ │ str r6, [sp, #28] │ │ str r7, [sp, #24] │ │ bl 270e830 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 3, cr3, [pc, #460] @ 24284bc │ │ - stc2l 0, cr12, [r1, #356]! @ 0x164 │ │ - stc2l 9, cr0, [r1, #250]! @ 0xfa @ │ │ - ldc2l 12, cr12, [pc, #560] @ 242852c │ │ + ldc2l 3, cr3, [pc, #640] @ 2428570 │ │ + stc2l 0, cr12, [r1, #536]! @ 0x218 │ │ + stc2l 9, cr0, [r1, #340]! @ 0x154 @ │ │ + ldc2l 12, cr12, [pc, #740] @ 24285e0 │ │ stc2l 11, cr5, [r2, #652]! @ 0x28c @ │ │ │ │ 024282fc : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ @@ -1278915,15 +1278914,15 @@ │ │ ldr r0, [pc, #4028] @ 242a16c │ │ movw r3, #1250 @ 0x4e2 │ │ ldr r2, [pc, #4024] @ 242a170 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ b 242909c │ │ - ldc2l 2, cr7, [pc, #592] @ 242941c │ │ + ldc2l 2, cr7, [pc, #772] @ 24294d0 │ │ orrseq r7, r6, r4, asr r8 │ │ orrseq r7, r6, r0, asr #16 │ │ @ instruction: 0x019679d4 │ │ orrseq r7, sl, r8, lsl #5 │ │ orrseq r7, r6, r0, lsl #16 │ │ orrseq r7, r6, r0, lsl #17 │ │ orrseq r7, sl, r4, lsr #11 │ │ @@ -1279080,40 +1279079,40 @@ │ │ ldr r2, [pc, #4004] @ 242a3e8 │ │ sub r0, r0, #1 │ │ add r2, pc, r2 │ │ str r0, [r2] │ │ cmp r1, r0 │ │ ble 2429020 │ │ b 24296c8 │ │ - stc2l 0, cr2, [r2, #432]! @ 0x1b0 │ │ - ldc2l 2, cr13, [pc, #72] @ 24294ac │ │ + stc2l 0, cr2, [r2, #612]! @ 0x264 │ │ + ldc2l 2, cr13, [pc, #252] @ 2429560 │ │ ldr r1, [pc, #3972] @ 242a3ec │ │ mov r7, r0 │ │ add r0, sp, #86 @ 0x56 │ │ mov r2, #15 │ │ add r1, pc, r1 │ │ mov r3, #8 │ │ b 2429ca8 │ │ orrseq r7, r6, r4, lsr r7 │ │ orrseq r2, sl, r4, ror r3 │ │ - stc2l 15, cr1, [r2, #976]! @ 0x3d0 │ │ - ldc2l 1, cr13, [pc, #616] @ 24296f8 │ │ - stc2l 15, cr1, [r2, #784]! @ 0x310 │ │ - ldc2l 1, cr13, [pc, #424] @ 2429640 │ │ - stc2l 5, cr14, [r0, #364]! @ 0x16c │ │ - ldc2l 1, cr13, [pc, #232] @ 2429588 │ │ - stc2l 5, cr14, [r0, #204]! @ 0xcc │ │ - ldc2l 1, cr13, [pc, #72] @ 24294f0 │ │ - stc2l 1, cr14, [r1, #832]! @ 0x340 │ │ + stc2l 0, cr2, [r2, #132]! @ 0x84 │ │ + ldc2l 1, cr13, [pc, #796] @ 24297ac │ │ + stc2l 15, cr1, [r2, #964]! @ 0x3c4 │ │ + ldc2l 1, cr13, [pc, #604] @ 24296f4 │ │ + stc2l 5, cr14, [r0, #544]! @ 0x220 │ │ + ldc2l 1, cr13, [pc, #412] @ 242963c │ │ + stc2l 5, cr14, [r0, #384]! @ 0x180 │ │ + ldc2l 1, cr13, [pc, #252] @ 24295a4 │ │ + stc2l 1, cr14, [r1, #1012]! @ 0x3f4 │ │ orrseq r7, r6, ip, lsl r6 │ │ orrseq r7, sl, r4, ror r0 │ │ - ldc2l 0, cr13, [pc, #700] @ 2429774 │ │ - ldc2l 0, cr13, [pc, #712] @ 2429784 │ │ - ldc2l 15, cr2, [pc, #1008] @ 24298b0 │ │ - stc2l 14, cr1, [r2, #212]! @ 0xd4 │ │ + ldc2l 0, cr13, [pc, #880] @ 2429828 │ │ + ldc2l 0, cr13, [pc, #892] @ 2429838 │ │ + ldc2l 0, cr3, [pc, #164] @ 2429564 │ │ + stc2l 14, cr1, [r2, #392]! @ 0x188 │ │ ldr r0, [pc, #3880] @ 242a3f0 │ │ mov r1, r4 │ │ ldr r2, [pc, #3876] @ 242a3f4 │ │ movw r3, #2071 @ 0x817 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1279204,18 +1279203,18 @@ │ │ mov r1, #1 │ │ str r1, [r6] │ │ add r0, pc, r0 │ │ b 242ccac │ │ orrseq r7, r6, r0, ror r5 │ │ eorseq lr, r2, ip, lsl #16 │ │ orrseq r8, sp, r4, asr #8 │ │ - stc2l 0, cr14, [r1, #864]! @ 0x360 │ │ + stc2l 1, cr14, [r1, #20]! │ │ orrseq r7, r6, r4, lsr #10 │ │ @ instruction: 0x019d83f4 │ │ - ldc2l 15, cr12, [pc, #792] @ 2429974 │ │ + ldc2l 15, cr12, [pc, #972] @ 2429a28 │ │ ldr r1, [pc, #4088] @ 242a658 │ │ movw r0, #5000 @ 0x1388 │ │ ldr r1, [pc, r1] │ │ cmp r1, r0 │ │ bne 24296c8 │ │ mov r0, r6 │ │ bl 270d240 │ │ @@ -1279234,15 +1279233,15 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4024] @ 242a66c │ │ add r0, pc, r0 │ │ b 242ccac │ │ orrseq r7, r6, r0, asr #12 │ │ @ instruction: 0x019674dc │ │ - ldc2l 7, cr10, [lr, #868] @ 0x364 │ │ + vcadd.f32 d26, d14, d6, #270 │ │ orrseq r7, r6, r4, ror #11 │ │ ldr r4, [pc, #4000] @ 242a670 │ │ ldr r4, [pc, r4] │ │ bl 270dda0 │ │ sub r0, r0, #1 │ │ cmp r4, r0 │ │ bge 2429748 │ │ @@ -1279266,15 +1279265,15 @@ │ │ cmp r1, r0 │ │ bhi 24299a0 │ │ ldr r0, [pc, #3920] @ 242a684 │ │ str r1, [fp, #-52] @ 0xffffffcc │ │ add r0, pc, r0 │ │ str r5, [r0, r1, lsl #2] │ │ b 2429a04 │ │ - ldc2l 7, cr10, [lr, #596] @ 0x254 │ │ + ldc2l 7, cr10, [lr, #776] @ 0x308 │ │ orrseq r7, r6, r0, lsr #11 │ │ ldr r0, [pc, #4072] @ 242a738 │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-52] @ 0xffffffcc │ │ cmp r0, #1 │ │ blt 2429a30 │ │ ldr r8, [pc, #4056] @ 242a73c │ │ @@ -1279282,20 +1279281,20 @@ │ │ ldr r5, [pc, #4052] @ 242a740 │ │ ldr r4, [pc, #4052] @ 242a744 │ │ add r8, pc, r8 │ │ add r5, pc, r5 │ │ add r4, pc, r4 │ │ mov r6, r5 │ │ b 2429838 │ │ - stc2l 4, cr12, [r0, #300]! @ 0x12c │ │ + stc2l 4, cr12, [r0, #480]! @ 0x1e0 │ │ @ instruction: 0x0196c494 │ │ orrseq r7, r6, ip, lsl #10 │ │ - ldc2l 6, cr10, [lr, #804] @ 0x324 │ │ + ldc2l 6, cr10, [lr, #984] @ 0x3d8 │ │ @ instruction: 0x019674d8 │ │ - ldc2l 6, cr10, [lr, #612] @ 0x264 │ │ + ldc2l 6, cr10, [lr, #792] @ 0x318 │ │ orrseq r7, r6, r8, asr r3 │ │ ldr r7, [pc, #4004] @ 242a748 │ │ mov r1, sl │ │ ldr r2, [pc, #4000] @ 242a74c │ │ movw r3, #1369 @ 0x559 │ │ add r7, pc, r7 │ │ add r2, pc, r2 │ │ @@ -1279341,17 +1279340,17 @@ │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270de00 │ │ bic r4, r0, r0, asr #31 │ │ mov r0, sl │ │ mov r7, r5 │ │ b 24298e0 │ │ - stc2l 2, cr10, [r1, #20]! │ │ + stc2l 2, cr10, [r1, #200]! @ 0xc8 │ │ @ instruction: 0x019674b4 │ │ - stc2l 1, cr10, [r1, #820]! @ 0x334 │ │ + stc2l 1, cr10, [r1, #1000]! @ 0x3e8 │ │ orrseq r7, r6, ip, ror #5 │ │ vcmla.f16 , q1, q8, #270 │ │ orrseq r1, r7, r0, lsl #3 │ │ vcmla.f16 d23, d2, d24, #270 │ │ ldr r0, [pc, #4056] @ 242a868 │ │ mov r1, sl │ │ mov r2, r4 │ │ @@ -1279389,17 +1279388,17 @@ │ │ add r1, pc, r1 │ │ add r4, pc, r4 │ │ bgt 2429818 │ │ mov r0, #0 │ │ str r0, [r8] │ │ b 2429980 │ │ orrseq r7, r6, r8, lsl #5 │ │ - ldc2l 8, cr12, [lr, #504] @ 0x1f8 │ │ + vcadd.f32 d28, d30, d27, #270 │ │ orrseq ip, r6, ip, asr r2 │ │ - vcadd.f32 q14, q7, q3, #270 │ │ + ldc2l 8, cr12, [lr, #460] @ 0x1cc │ │ mov r0, r7 │ │ ldr r7, [pc, #4072] @ 242a92c │ │ mov r1, sl │ │ movw r3, #1385 @ 0x569 │ │ add r7, pc, r7 │ │ mov r2, r7 │ │ bl 270d9c0 │ │ @@ -1279417,15 +1279416,15 @@ │ │ str r0, [r5, sl, lsl #2] │ │ b 242981c │ │ orrseq r7, r6, r4, lsr #4 │ │ stc2l 11, cr5, [r2, #624]! @ 0x270 @ │ │ orrseq ip, r6, r8, asr #4 │ │ stc2l 11, cr5, [r2, #400]! @ 0x190 @ │ │ orrseq r7, r6, r0, asr #3 │ │ - ldc2l 4, cr10, [lr, #852] @ 0x354 │ │ + ldc2l 5, cr10, [lr, #8] │ │ ldr r0, [pc, #3980] @ 242a934 │ │ movw r3, #1410 @ 0x582 │ │ ldr r2, [pc, #3976] @ 242a938 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3964] @ 242a93c │ │ @@ -1279451,15 +1279450,15 @@ │ │ ldr r0, [pc, #3908] @ 242a954 │ │ add r2, pc, r2 │ │ add r0, pc, r0 │ │ str r4, [r2, r1, lsl #2] │ │ b 242ccac │ │ @ instruction: 0x01967198 │ │ @ instruction: 0x019672d0 │ │ - ldc2l 4, cr10, [lr, #596] @ 0x254 │ │ + ldc2l 4, cr10, [lr, #776] @ 0x308 │ │ orrseq r7, r6, r4, lsr #5 │ │ orrseq r7, r6, ip, asr #2 │ │ ldr r1, [pc, #3872] @ 242a958 │ │ ldr r1, [pc, r1] │ │ str r1, [fp, #-52] @ 0xffffffcc │ │ cmp r1, #1 │ │ blt 242cccc │ │ @@ -1279470,16 +1279469,16 @@ │ │ ldr r9, [pc, #4072] @ 242aa44 │ │ add r6, pc, r6 │ │ ldr r5, [pc, #4068] @ 242aa48 │ │ add r8, pc, r8 │ │ add r9, pc, r9 │ │ add r5, pc, r5 │ │ b 2429a88 │ │ - stc2l 3, cr8, [r1, #676]! @ 0x2a4 │ │ - stc2l 3, cr8, [r1, #468]! @ 0x1d4 │ │ + stc2l 3, cr8, [r1, #856]! @ 0x358 │ │ + stc2l 3, cr8, [r1, #648]! @ 0x288 │ │ str r4, [r6, r2, lsl #2] │ │ cmp r4, r1 │ │ mov r2, r4 │ │ bge 24296e8 │ │ add r4, r2, #1 │ │ cmp r4, r7 │ │ bcc 2429a78 │ │ @@ -1279488,15 +1279487,15 @@ │ │ mov r2, r5 │ │ movw r3, #1397 @ 0x575 │ │ bl 270d9c0 │ │ ldr r1, [fp, #-52] @ 0xffffffcc │ │ mov r2, r0 │ │ b 2429a78 │ │ orrseq r7, r6, r8, ror #1 │ │ - ldc2l 4, cr10, [lr, #12] │ │ + ldc2l 4, cr10, [lr, #192] @ 0xc0 │ │ orrseq r7, r6, r0, ror #2 │ │ ldr r0, [pc, #4020] @ 242aa7c │ │ mov r7, #0 │ │ ldr r1, [pc, #4016] @ 242aa80 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ ldr r2, [r0, r4, lsl #2] │ │ @@ -1279512,32 +1279511,32 @@ │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ add r0, pc, r0 │ │ ldr r0, [r0, r4, lsl #2] │ │ cmp r0, #0 │ │ bne 2429c94 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ b 2429c84 │ │ - ldc2l 3, cr10, [lr, #796] @ 0x31c │ │ + ldc2l 3, cr10, [lr, #976] @ 0x3d0 │ │ orrseq r7, r6, ip, ror r0 │ │ stc2l 9, cr5, [r2, #500]! @ 0x1f4 @ │ │ orrseq r6, sl, r4, lsr lr │ │ stc2l 9, cr5, [r2, #364]! @ 0x16c @ │ │ - vcmla.f16 d20, d16, d22, #270 │ │ + stc2l 8, cr4, [r0, #844]! @ 0x34c │ │ orrseq r6, r6, ip, ror #31 │ │ - stc2l 8, cr4, [r0, #472]! @ 0x1d8 │ │ + vcmla.f16 d20, d16, d19, #270 │ │ orrseq r6, sl, ip, ror #27 │ │ @ instruction: 0x01966f98 │ │ - ldc2l 10, cr12, [pc, #220] @ 2429c24 @ │ │ + ldc2l 10, cr12, [pc, #400] @ 2429cd8 @ │ │ orrseq r6, sl, r0, ror #19 │ │ - ldc2l 9, cr12, [pc, #510] @ 2429d4e @ │ │ + ldc2l 10, cr12, [pc, #176] @ 2429c00 @ │ │ @ instruction: 0x019a69b4 │ │ orrseq r6, r6, ip, lsr #30 │ │ - ldc2l 9, cr12, [pc, #436] @ 2429d10 @ │ │ + ldc2l 10, cr12, [pc, #28] @ 2429b78 @ │ │ @ instruction: 0x019d7d94 │ │ - ldc2l 9, cr12, [pc, #324] @ 2429ca8 @ │ │ + ldc2l 9, cr12, [pc, #414] @ 2429d02 @ │ │ orrseq r7, sp, r8, ror #26 │ │ orrseq r6, r6, r0, asr #29 │ │ ldr r0, [pc, #4092] @ 242ab6c │ │ mov r1, r4 │ │ ldr sl, [pc, #4088] @ 242ab70 │ │ movw r3, #2111 @ 0x83f │ │ add r0, pc, r0 │ │ @@ -1279634,34 +1279633,34 @@ │ │ add r8, pc, r8 │ │ ldr sl, [pc, #3936] @ 242ac50 │ │ add r9, pc, r9 │ │ add r6, pc, r6 │ │ str r0, [sp, #16] │ │ add sl, pc, sl │ │ b 2429d90 │ │ - stc2l 2, cr4, [r1, #492]! @ 0x1ec │ │ - stc2l 2, cr4, [r1, #332]! @ 0x14c │ │ + stc2l 2, cr4, [r1, #672]! @ 0x2a0 │ │ + stc2l 2, cr4, [r1, #512]! @ 0x200 │ │ orrseq r6, sl, r8, lsr #18 │ │ eorseq lr, r2, r0, lsl #2 │ │ orrseq r6, r6, r0, asr #28 │ │ orrseq r6, r6, r4, lsr lr │ │ orrseq r6, sl, r4, lsl #24 │ │ - ldc2l 8, cr12, [pc, #732] @ 242a000 │ │ - ldc2l 8, cr12, [pc, #744] @ 242a010 │ │ + vcadd.f32 q14, , q10, #270 │ │ + vcadd.f32 q14, , , #270 │ │ stc2l 7, cr5, [r2, #568]! @ 0x238 │ │ orrseq r6, sl, r4, ror #16 │ │ orrseq r6, sl, ip, lsr r8 │ │ @ instruction: 0x019a67fc │ │ orrseq r6, r6, ip, lsl sp │ │ orrseq r6, r6, r8, lsl #30 │ │ @ instruction: 0x01966cf4 │ │ @ instruction: 0x01966cf0 │ │ orrseq r1, sl, ip, lsr #18 │ │ - ldc2l 7, cr12, [pc, #568] @ 2429f88 │ │ - stc2l 5, cr1, [r2, #688]! @ 0x2b0 │ │ + ldc2l 7, cr12, [pc, #748] @ 242a03c │ │ + stc2l 5, cr1, [r2, #868]! @ 0x364 │ │ orrseq r6, r6, r0, ror lr │ │ ldr r1, [pc, #4016] @ 242ad0c │ │ add r4, sp, #86 @ 0x56 │ │ add r1, pc, r1 │ │ mov r0, r4 │ │ mov r2, #15 │ │ mov r3, #9 │ │ @@ -1279775,18 +1279774,18 @@ │ │ mov r3, #6 │ │ add r1, pc, r1 │ │ bl 270d960 │ │ cmp r0, #0 │ │ beq 242c2b0 │ │ add r4, sp, #86 @ 0x56 │ │ b 2429d70 │ │ - stc2l 5, cr1, [r2, #464]! @ 0x1d0 │ │ + stc2l 5, cr1, [r2, #644]! @ 0x284 │ │ orrseq r6, r6, r8, lsr lr │ │ - stc2l 11, cr13, [r0, #44]! @ 0x2c @ │ │ - stc2l 10, cr13, [r0, #908]! @ 0x38c @ │ │ + stc2l 11, cr13, [r0, #224]! @ 0xe0 @ │ │ + stc2l 11, cr13, [r0, #64]! @ 0x40 @ │ │ @ instruction: 0x01966bf0 │ │ @ instruction: 0x019d7abc │ │ sub r1, r7, #1 │ │ str r1, [fp, #-52] @ 0xffffffcc │ │ cmp r1, #20 │ │ bcc 2429f74 │ │ ldr r0, [pc, #3844] @ 242ae68 │ │ @@ -1279835,19 +1279834,19 @@ │ │ str r6, [r0] │ │ b 242a208 │ │ orrseq r6, r6, r0, lsr #23 │ │ sub r6, r7, #1 │ │ mov sl, r7 │ │ mov r9, #0 │ │ b 242a06c │ │ - ldc2l 14, cr9, [lr, #628] @ 0x274 │ │ - ldc2l 6, cr12, [pc, #168] @ 242a0d8 │ │ + ldc2l 14, cr9, [lr, #808] @ 0x328 │ │ + ldc2l 6, cr12, [pc, #348] @ 242a18c │ │ orrseq r6, r6, r8, lsr #25 │ │ - ldc2l 14, cr9, [lr, #356] @ 0x164 │ │ - ldc2l 5, cr12, [pc, #920] @ 242a3d4 │ │ + ldc2l 14, cr9, [lr, #536] @ 0x218 │ │ + ldc2l 6, cr12, [pc, #76] @ 242a088 │ │ orrseq r6, r6, r0, ror #24 │ │ ldr r0, [pc, #3948] @ 242afb0 │ │ mov r1, r9 │ │ mov r2, r8 │ │ movw r3, #2303 @ 0x8ff │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1279876,22 +1279875,22 @@ │ │ bhi 242a03c │ │ ldr r0, [pc, #3848] @ 242afc0 │ │ add r0, pc, r0 │ │ ldr r5, [r0, r9, lsl #2] │ │ cmp r4, r5 │ │ bge 242a068 │ │ b 242a794 │ │ - stc2l 11, cr11, [r0, #140]! @ 0x8c @ │ │ + stc2l 11, cr11, [r0, #320]! @ 0x140 @ │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ mov r6, #1 │ │ ldr r7, [pc, #3816] @ 242afc4 │ │ mov r5, #1 │ │ ldr r7, [pc, r7] │ │ b 242a108 │ │ - ldc2l 5, cr12, [pc, #568] @ 242a324 │ │ + ldc2l 5, cr12, [pc, #748] @ 242a3d8 │ │ orrseq r6, r6, r4, asr #23 │ │ ldr r0, [r9, r4, lsl #2] │ │ cmp r0, r7 │ │ movlt r5, r6 │ │ movlt r7, r0 │ │ ldr r0, [fp, #-52] @ 0xffffffcc │ │ cmp r6, r0 │ │ @@ -1279914,22 +1279913,22 @@ │ │ mov r2, r8 │ │ movw r3, #2216 @ 0x8a8 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r7, [r9, r0, lsl #2] │ │ mov r5, r6 │ │ b 242a0fc │ │ - ldc2l 13, cr9, [lr, #484] @ 0x1e4 │ │ - ldc2l 5, cr12, [pc, #24] @ 242a184 │ │ + ldc2l 13, cr9, [lr, #664] @ 0x298 │ │ + ldc2l 5, cr12, [pc, #204] @ 242a238 │ │ orrseq r6, r6, ip, ror fp │ │ - ldc2l 13, cr9, [lr, #196] @ 0xc4 │ │ - ldc2l 4, cr12, [pc, #760] @ 242a470 │ │ + ldc2l 13, cr9, [lr, #376] @ 0x178 │ │ + ldc2l 4, cr12, [pc, #940] @ 242a524 │ │ orrseq r6, r6, r4, asr #19 │ │ - stc2l 8, cr9, [r1, #484]! @ 0x1e4 │ │ - ldc2l 4, cr12, [pc, #408] @ 242a31c │ │ + vcmla.f16 d25, d17, d22, #270 │ │ + ldc2l 4, cr12, [pc, #588] @ 242a3d0 │ │ orrseq r6, r6, r8, lsr #22 │ │ sub r4, r5, #1 │ │ mov r6, r5 │ │ cmp r4, #20 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ mov r0, r4 │ │ bcc 242a1b4 │ │ @@ -1279967,37 +1279966,37 @@ │ │ bcs 242a298 │ │ ldr r0, [pc, #3980] @ 242b1b0 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ add r0, pc, r0 │ │ str r5, [r0, r4, lsl #2] │ │ mov r0, r4 │ │ b 242a2d8 │ │ - stc2l 8, cr9, [r1, #244]! @ 0xf4 │ │ - ldc2l 4, cr12, [pc, #168] @ 242a2e8 │ │ + vcmla.f16 , , q13, #270 │ │ + ldc2l 4, cr12, [pc, #348] @ 242a39c │ │ @ instruction: 0x01966af8 │ │ orrseq r6, r6, r0, asr r9 │ │ stc2l 14, cr6, [r2, #784]! @ 0x310 │ │ - ldc2l 3, cr12, [pc, #968] @ 242a618 │ │ + ldc2l 4, cr12, [pc, #124] @ 242a2cc │ │ orrseq r0, r7, r4, ror #15 │ │ stc2l 14, cr6, [r2, #544]! @ 0x220 │ │ - ldc2l 3, cr12, [pc, #728] @ 242a534 │ │ + ldc2l 3, cr12, [pc, #908] @ 242a5e8 │ │ @ instruction: 0x019707b4 │ │ @ instruction: 0x019668dc │ │ - ldc2l 14, cr11, [lr, #840] @ 0x348 │ │ - ldc2l 3, cr12, [pc, #504] @ 242a464 │ │ + ldc2l 14, cr11, [lr, #1020] @ 0x3fc │ │ + ldc2l 3, cr12, [pc, #684] @ 242a518 │ │ @ instruction: 0x0196b8b0 │ │ - ldc2l 14, cr11, [lr, #600] @ 0x258 │ │ - ldc2l 3, cr12, [pc, #264] @ 242a380 │ │ + ldc2l 14, cr11, [lr, #780] @ 0x30c │ │ + ldc2l 3, cr12, [pc, #444] @ 242a434 │ │ orrseq fp, r6, r0, lsl #17 │ │ orrseq r6, r6, r8, ror #16 │ │ stc2l 1, cr5, [r2, #896]! @ 0x380 │ │ - ldc2l 3, cr12, [pc, #40] @ 242a2b0 │ │ + ldc2l 3, cr12, [pc, #220] @ 242a364 │ │ orrseq fp, r6, ip, lsl #17 │ │ stc2l 1, cr5, [r2, #656]! @ 0x290 │ │ - ldc2l 2, cr12, [pc, #824] @ 242a5cc │ │ + ldc2l 2, cr12, [pc, #1004] @ 242a680 │ │ orrseq fp, r6, ip, asr r8 │ │ @ instruction: 0x019667f4 │ │ ldr r0, [pc, #4060] @ 242b27c │ │ mov r1, r4 │ │ mov r2, r8 │ │ mov r3, #2240 @ 0x8c0 │ │ add r0, pc, r0 │ │ @@ -1280069,28 +1280068,28 @@ │ │ str r5, [r0, r4, lsl #2] │ │ ldr r0, [pc, #4020] @ 242b370 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ add r0, pc, r0 │ │ str r7, [r0, r4, lsl #2] │ │ mov r0, r4 │ │ b 242a498 │ │ - ldc2l 11, cr9, [lr, #36] @ 0x24 @ │ │ - ldc2l 2, cr12, [pc, #600] @ 242a630 │ │ + ldc2l 11, cr9, [lr, #216] @ 0xd8 @ │ │ + ldc2l 2, cr12, [pc, #780] @ 242a6e4 │ │ orrseq r6, r6, r8, lsl #18 │ │ - ldc2l 10, cr9, [lr, #836] @ 0x344 @ │ │ - ldc2l 2, cr12, [pc, #376] @ 242a55c │ │ + ldc2l 10, cr9, [lr, #1016] @ 0x3f8 @ │ │ + ldc2l 2, cr12, [pc, #556] @ 242a610 │ │ @ instruction: 0x019668d4 │ │ orrseq r6, r6, ip, ror r7 │ │ orrseq r6, r6, r0, ror r7 │ │ - ldc2l 15, cr15, [pc, #892] @ 242a770 │ │ - ldc2l 1, cr12, [pc, #636] @ 242a674 │ │ - ldc2l 1, cr12, [pc, #648] @ 242a684 │ │ + stc2l 0, cr0, [r0, #48]! @ 0x30 │ │ + ldc2l 1, cr12, [pc, #816] @ 242a728 │ │ + ldc2l 1, cr12, [pc, #828] @ 242a738 │ │ orrseq r6, sl, r0, asr r1 │ │ - stc2l 9, cr7, [r1, #82]! @ 0x52 @ │ │ - ldc2l 1, cr12, [pc, #440] @ 242a5c0 │ │ + stc2l 9, cr7, [r1, #172]! @ 0xac @ │ │ + ldc2l 1, cr12, [pc, #620] @ 242a674 │ │ orrseq r6, r6, r8, lsr #13 │ │ ldr r0, [pc, #4088] @ 242b408 │ │ mov r1, r4 │ │ mov r2, r8 │ │ movw r3, #2243 @ 0x8c3 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1280157,27 +1280156,27 @@ │ │ ldr r6, [pc, #4088] @ 242b510 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ add r6, pc, r6 │ │ add r0, r6, r4, lsl #3 │ │ vstr d8, [r0] │ │ mov r0, r4 │ │ b 242a5d0 │ │ - ldc2l 9, cr9, [lr, #342] @ 0x156 @ │ │ - ldc2l 1, cr12, [pc, #184] @ 242a5f0 │ │ + ldc2l 9, cr9, [lr, #432] @ 0x1b0 @ │ │ + ldc2l 1, cr12, [pc, #364] @ 242a6a4 │ │ orrseq r6, r6, ip, lsl #14 │ │ stc2l 15, cr4, [r2, #840]! @ 0x348 │ │ - ldc2l 0, cr12, [pc, #984] @ 242a91c │ │ + ldc2l 1, cr12, [pc, #140] @ 242a5d0 │ │ orrseq r6, sl, ip, lsl #8 │ │ - stc2l 14, cr3, [r0, #744]! @ 0x2e8 │ │ + stc2l 14, cr3, [r0, #924]! @ 0x39c │ │ orrseq r6, sl, r4, lsr #8 │ │ - stc2l 9, cr3, [r1, #318]! @ 0x13e @ │ │ - ldc2l 0, cr12, [pc, #472] @ 242a730 │ │ + stc2l 9, cr3, [r1, #408]! @ 0x198 @ │ │ + ldc2l 0, cr12, [pc, #652] @ 242a7e4 │ │ orrseq r6, sl, ip, rrx │ │ eorseq sp, r2, ip, asr #16 │ │ - ldc2l 15, cr5, [pc, #704] @ 242a824 │ │ + ldc2l 15, cr5, [pc, #884] @ 242a8d8 │ │ ldr r0, [pc, #4032] @ 242b528 │ │ mov r1, r4 │ │ mov r2, r8 │ │ movw r3, #2264 @ 0x8d8 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r6, [pc, #4012] @ 242b52c │ │ @@ -1280233,19 +1280232,19 @@ │ │ bl 270d130 │ │ ldr r1, [pc, #3848] @ 242b554 │ │ add r4, sp, #86 @ 0x56 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ b 2429d64 │ │ orrseq r6, r6, r0, asr r5 │ │ - ldc2l 15, cr5, [pc, #188] @ 242a720 │ │ - ldc2l 8, cr9, [pc, #196] @ 242a72c │ │ + ldc2l 15, cr5, [pc, #368] @ 242a7d4 │ │ + ldc2l 8, cr9, [pc, #376] @ 242a7e0 │ │ ldrsbteq sp, [r2], -r0 │ │ - stc2l 13, cr5, [r0, #204]! @ 0xcc │ │ - stc2l 0, cr13, [r1, #688]! @ 0x2b0 │ │ + stc2l 13, cr5, [r0, #384]! @ 0x180 │ │ + stc2l 0, cr13, [r1, #868]! @ 0x364 │ │ orrseq r6, r6, ip, ror #9 │ │ @ instruction: 0x019664d4 │ │ orrseq r6, r6, r0, asr #9 │ │ @ instruction: 0x019664bc │ │ @ instruction: 0x019664b4 │ │ orrseq r6, r6, ip, ror #12 │ │ add r0, sp, #40 @ 0x28 │ │ @@ -1280291,23 +1280290,23 @@ │ │ mov r2, #15 │ │ mov r3, #12 │ │ add r1, pc, r1 │ │ b 242aa0c │ │ orrseq r6, r6, r8, ror #8 │ │ orrseq fp, r6, r4, lsr #9 │ │ orrseq fp, r6, r0, asr r4 │ │ - ldc2l 15, cr11, [pc, #8] @ 242a754 │ │ + ldc2l 15, cr11, [pc, #188] @ 242a808 │ │ stc2l 13, cr4, [r2, #624]! @ 0x270 │ │ - ldc2l 14, cr11, [pc, #792] @ 242aa6c │ │ + ldc2l 14, cr11, [pc, #972] @ 242ab20 │ │ orrseq fp, r6, r8, asr #8 │ │ orrseq r6, r6, r0, ror #7 │ │ orrseq r1, sl, ip, lsr r0 │ │ - ldc2l 14, cr11, [pc, #520] @ 242a96c │ │ + ldc2l 14, cr11, [pc, #700] @ 242aa20 │ │ orrseq fp, r6, r0, lsl #8 │ │ - ldc2l 14, cr11, [pc, #392] @ 242a8f4 │ │ + ldc2l 14, cr11, [pc, #572] @ 242a9a8 │ │ orrseq r6, r6, r0, ror #6 │ │ @ instruction: 0x019a0fbc │ │ ldr r0, [pc, #3904] @ 242b6b8 │ │ mov r1, r9 │ │ mov r2, r8 │ │ movw r3, #2307 @ 0x903 │ │ add r0, pc, r0 │ │ @@ -1280364,22 +1280363,22 @@ │ │ ldr r9, [pc, #3716] @ 242b6d8 │ │ add r9, pc, r9 │ │ b 2429d70 │ │ ldr r6, [pc, #3708] @ 242b6dc │ │ sub r4, r7, #1 │ │ ldr r6, [pc, r6] │ │ b 242a8b8 │ │ - ldc2l 9, cr11, [lr, #92] @ 0x5c @ │ │ + ldc2l 9, cr11, [lr, #182] @ 0xb6 @ │ │ orrseq r6, r6, r0, lsl #6 │ │ orrseq r0, sl, ip, asr pc │ │ - ldc2l 8, cr11, [lr, #968] @ 0x3c8 │ │ + ldc2l 9, cr11, [lr, #62] @ 0x3e @ │ │ @ instruction: 0x019662b8 │ │ orrseq r0, sl, r4, lsl pc │ │ orrseq fp, r6, r0, lsl #6 │ │ - ldc2l 13, cr11, [pc, #392] @ 242aa14 │ │ + ldc2l 13, cr11, [pc, #572] @ 242aac8 │ │ ldr r0, [pc, #3664] @ 242b6e0 │ │ mov r1, r6 │ │ mov r2, r8 │ │ movw r3, #2403 @ 0x963 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r2, [sp, #28] │ │ @@ -1280413,25 +1280412,25 @@ │ │ add r0, r0, r2, lsl #2 │ │ ldr r0, [r0, #-4] │ │ cmp r5, r0 │ │ ble 242a8b8 │ │ sub r0, r2, #1 │ │ str r0, [fp, #-52] @ 0xffffffcc │ │ b 242aaa4 │ │ - ldc2l 13, cr11, [pc, #184] @ 242a9ec │ │ - ldc2l 8, cr11, [lr, #360] @ 0x168 │ │ - stc2l 11, cr0, [r2, #128]! @ 0x80 @ │ │ - ldc2l 12, cr11, [pc, #792] @ 242ac58 │ │ + ldc2l 13, cr11, [pc, #364] @ 242aaa0 │ │ + vcadd.f32 d27, d30, d7, #270 │ │ + stc2l 11, cr0, [r2, #308]! @ 0x134 @ │ │ + ldc2l 12, cr11, [pc, #972] @ 242ad0c │ │ orrseq r6, r6, r4, ror #7 │ │ orrseq r6, r6, r8, ror #3 │ │ @ instruction: 0x019661d8 │ │ - stc2l 0, cr13, [r0, #636]! @ 0x27c │ │ - ldc2l 12, cr11, [pc, #504] @ 242ab4c │ │ + stc2l 0, cr13, [r0, #816]! @ 0x330 │ │ + ldc2l 12, cr11, [pc, #684] @ 242ac00 │ │ orrseq r0, sl, r4, lsl #28 │ │ - stc2l 13, cr12, [r1, #304]! @ 0x130 │ │ + stc2l 13, cr12, [r1, #484]! @ 0x1e4 │ │ orrseq r6, r6, ip, ror r1 │ │ add r0, sp, #40 @ 0x28 │ │ bl 270d2d0 │ │ bl 270db20 │ │ cmp r0, #0 │ │ bne 242cca4 │ │ ldr r0, [sp, #40] @ 0x28 │ │ @@ -1280483,16 +1280482,16 @@ │ │ ldr r0, [sp, #20] │ │ add r4, sp, #86 @ 0x56 │ │ add r0, r0, #1 │ │ str r0, [sp, #20] │ │ b 2429d70 │ │ @ instruction: 0x019a0db8 │ │ orrseq r6, r6, r0, asr r1 │ │ - stc2l 0, cr13, [r0, #188]! @ 0xbc │ │ - ldc2l 12, cr11, [pc, #56] @ 242aa88 │ │ + stc2l 0, cr13, [r0, #368]! @ 0x170 │ │ + ldc2l 12, cr11, [pc, #236] @ 242ab3c │ │ ldr r1, [pc, #3252] @ 242b708 │ │ add r0, sp, #86 @ 0x56 │ │ mov r2, #15 │ │ mov r3, #1 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ sub r4, r7, #1 │ │ @@ -1280558,17 +1280557,17 @@ │ │ ldr r6, [pc, #3892] @ 242ba90 │ │ add r6, pc, r6 │ │ add r0, r6, r4, lsl #3 │ │ vstr d8, [r0] │ │ mov r0, r4 │ │ b 242adcc │ │ stc2l 5, cr6, [r2, #816]! @ 0x330 │ │ - ldc2l 10, cr11, [pc, #1000] @ 242af60 @ │ │ + ldc2l 11, cr11, [pc, #156] @ 242ac14 @ │ │ orrseq pc, r6, r4, ror #29 │ │ - ldc2l 10, cr11, [pc, #872] @ 242aee8 @ │ │ + ldc2l 11, cr11, [pc, #28] @ 242ab9c @ │ │ orrseq r6, sp, ip, lsl #29 │ │ stc2l 5, cr6, [r2, #448]! @ 0x1c0 │ │ str r7, [sp, #8] │ │ mov r7, sl │ │ mov sl, r6 │ │ ldr r6, [pc, #3836] @ 242ba94 │ │ mov r1, r4 │ │ @@ -1280590,39 +1280589,39 @@ │ │ mov r4, r0 │ │ ldr r0, [sp, #20] │ │ add r0, r5, r0 │ │ str r0, [r9, r4, lsl #2] │ │ add r4, sp, #86 @ 0x56 │ │ b 2429d70 │ │ orrseq r5, sl, ip, lsr sl │ │ - ldc2l 10, cr11, [pc, #396] @ 242ad84 @ │ │ + ldc2l 10, cr11, [pc, #576] @ 242ae38 @ │ │ bl 270dda0 │ │ mov r4, r0 │ │ ldr r0, [pc, #3732] @ 242ba98 │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-52] @ 0xffffffcc │ │ cmp r0, #1 │ │ blt 242b2a0 │ │ mov sl, r7 │ │ sub r7, r7, #1 │ │ mov r9, #0 │ │ mov r3, #0 │ │ b 242ac8c │ │ - ldc2l 2, cr9, [lr, #692] @ 0x2b4 │ │ - ldc2l 10, cr11, [pc, #216] @ 242ad08 @ │ │ + ldc2l 2, cr9, [lr, #872] @ 0x368 │ │ + ldc2l 10, cr11, [pc, #396] @ 242adbc @ │ │ ldrheq r6, [r6, r0] │ │ stc2l 4, cr6, [r2, #848]! @ 0x350 │ │ - ldc2l 9, cr11, [pc, #508] @ 242ae38 @ │ │ + ldc2l 10, cr11, [pc, #172] @ 242ace8 @ │ │ @ instruction: 0x0196fdf4 │ │ - ldc2l 14, cr14, [lr, #472] @ 0x1d8 │ │ - stc2l 8, cr0, [r2, #88]! @ 0x58 │ │ - ldc2l 9, cr11, [pc, #292] @ 242ad70 @ │ │ + ldc2l 14, cr14, [lr, #652] @ 0x28c │ │ + vcmla.f16 q8, q1, , #270 │ │ + ldc2l 9, cr11, [pc, #382] @ 242adca @ │ │ @ instruction: 0x0196fd94 │ │ orrseq r5, r6, r0, ror pc │ │ - ldc2l 10, cr15, [lr, #728] @ 0x2d8 @ │ │ + ldc2l 10, cr15, [lr, #908] @ 0x38c @ │ │ ldr r0, [pc, #4088] @ 242bc54 │ │ clz r2, r3 │ │ mov r1, #0 │ │ add r0, pc, r0 │ │ lsr r2, r2, #5 │ │ ldr r0, [r0, r6, lsl #2] │ │ cmp r0, r4 │ │ @@ -1280661,15 +1280660,15 @@ │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4032] @ 242bcc0 │ │ mov r3, r9 │ │ add r1, pc, r1 │ │ ldr r4, [r1, r0, lsl #2] │ │ b 242ac80 │ │ - ldc2l 0, cr9, [lr, #848] @ 0x350 │ │ + ldc2l 1, cr9, [lr, #4] │ │ ldr r0, [sp, #28] │ │ sub r1, r0, #1 │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ bcc 242ad3c │ │ ldr r0, [pc, #4068] @ 242bd10 │ │ mov r2, r8 │ │ @@ -1280686,20 +1280685,20 @@ │ │ bhi 242b374 │ │ ldr r5, [r9, r4, lsl #2] │ │ ldr r0, [pc, #4020] @ 242bd18 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ add r0, pc, r0 │ │ str r6, [r0, r4, lsl #2] │ │ b 242b3d4 │ │ - stc2l 7, cr0, [r2, #328]! @ 0x148 │ │ - ldc2l 13, cr14, [lr, #488] @ 0x1e8 │ │ - ldc2l 6, cr15, [pc, #572] @ 242afbc │ │ - ldc2l 0, cr9, [lr, #320] @ 0x140 │ │ - stc2l 11, cr8, [r1, #604]! @ 0x25c @ │ │ - stc2l 5, cr5, [r0, #12]! │ │ + stc2l 7, cr0, [r2, #508]! @ 0x1fc │ │ + ldc2l 13, cr14, [lr, #668] @ 0x29c │ │ + ldc2l 6, cr15, [pc, #752] @ 242b070 │ │ + ldc2l 0, cr9, [lr, #500] @ 0x1f4 │ │ + stc2l 11, cr8, [r1, #784]! @ 0x310 @ │ │ + stc2l 5, cr5, [r0, #192]! @ 0xc0 │ │ ldr r0, [pc, #3980] @ 242bd1c │ │ mov r1, r4 │ │ mov r2, r8 │ │ movw r3, #2501 @ 0x9c5 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r6, [pc, #3960] @ 242bd20 │ │ @@ -1280741,22 +1280740,22 @@ │ │ ldr r1, [pc, #3844] @ 242bd3c │ │ add r4, sp, #86 @ 0x56 │ │ mov r2, #15 │ │ mov r3, #8 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ b 2429d6c │ │ - stc2l 9, cr10, [r1, #158]! @ 0x9e @ │ │ - stc2l 13, cr10, [r0, #728]! @ 0x2d8 │ │ - ldc2l 2, cr3, [pc, #356] @ 242afc0 │ │ - stc2l 11, cr8, [r1, #4]! @ │ │ - ldc2l 0, cr9, [pc, #308] @ 242af98 │ │ - stc2l 0, cr5, [r1, #472]! @ 0x1d8 │ │ - ldc2l 5, cr1, [pc, #732] @ 242b148 │ │ - ldc2l 2, cr11, [lr, #376] @ 0x178 │ │ + stc2l 9, cr10, [r1, #248]! @ 0xf8 @ │ │ + stc2l 13, cr10, [r0, #908]! @ 0x38c │ │ + ldc2l 2, cr3, [pc, #536] @ 242b074 │ │ + stc2l 11, cr8, [r1, #184]! @ 0xb8 @ │ │ + ldc2l 0, cr9, [pc, #488] @ 242b04c │ │ + stc2l 0, cr5, [r1, #652]! @ 0x28c │ │ + ldc2l 5, cr1, [pc, #912] @ 242b1fc │ │ + ldc2l 2, cr11, [lr, #556] @ 0x22c │ │ orrseq r5, r6, r8, lsr ip │ │ orrseq sl, r6, r0, asr #24 │ │ ldr r0, [pc, #4032] @ 242be3c │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ str r0, [fp, #-64] @ 0xffffffc0 │ │ cmp r0, #0 │ │ @@ -1280825,22 +1280824,22 @@ │ │ movw r3, #2511 @ 0x9cf │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4092] @ 242bf90 │ │ add r1, pc, r1 │ │ add r0, r1, r0, lsl #3 │ │ b 242b0cc │ │ - stc2l 10, cr12, [r0, #956]! @ 0x3bc @ │ │ + stc2l 11, cr12, [r0, #112]! @ 0x70 @ │ │ orrseq r0, sl, ip, asr r8 │ │ - stc2l 7, cr10, [r1, #844]! @ 0x34c │ │ + vcmla.f16 d26, d1, d0, #270 │ │ orrseq r5, r6, r8, asr #23 │ │ @ instruction: 0x01965bb0 │ │ - stc2l 10, cr12, [r0, #284]! @ 0x11c @ │ │ + stc2l 10, cr12, [r0, #464]! @ 0x1d0 @ │ │ @ instruction: 0x019a07b8 │ │ - ldc2l 1, cr11, [lr, #232] @ 0xe8 │ │ + ldc2l 1, cr11, [lr, #412] @ 0x19c │ │ orrseq sl, r6, r4, lsr #22 │ │ orrseq r0, sl, ip, asr r7 │ │ orrseq pc, r6, r4, lsr #19 │ │ ldr r1, [fp, #8] │ │ movw r2, #5000 @ 0x1388 │ │ ldr r0, [fp, #-64] @ 0xffffffc0 │ │ vldr d8, [r1] │ │ @@ -1280954,18 +1280953,18 @@ │ │ ldr r2, [pc, #3756] @ 242c038 │ │ add r0, r0, r0, lsl #2 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ sub r1, r0, #5 │ │ str r1, [fp, #-52] @ 0xffffffcc │ │ b 242b5b0 │ │ - ldc2l 13, cr8, [lr, #228] @ 0xe4 │ │ + ldc2l 13, cr8, [lr, #408] @ 0x198 │ │ orrseq r5, r6, r4, asr #22 │ │ orrseq r6, sp, r8, asr #17 │ │ - ldc2l 5, cr15, [lr, #696] @ 0x2b8 │ │ + ldc2l 5, cr15, [lr, #876] @ 0x36c │ │ orrseq r5, r6, ip, lsr #22 │ │ ldr r9, [pc, #3712] @ 242c03c │ │ mov r7, sl │ │ ldr r6, [pc, #3708] @ 242c040 │ │ cmp r3, #0 │ │ ldr sl, [pc, #3704] @ 242c044 │ │ add r9, pc, r9 │ │ @@ -1281009,21 +1281008,21 @@ │ │ ldr r0, [pc, #3568] @ 242c058 │ │ ldr r0, [pc, r0] │ │ cmp r3, r0 │ │ bne 242b70c │ │ mov r5, r3 │ │ mov sl, r3 │ │ b 242c26c │ │ - stc2l 7, cr8, [r1, #884]! @ 0x374 │ │ + vcmla.f16 d24, d1, d10, #270 │ │ @ instruction: 0x01965a90 │ │ stc2l 14, cr5, [r2, #464]! @ 0x1d0 │ │ @ instruction: 0x019658d0 │ │ - stc2l 7, cr12, [r0, #588]! @ 0x24c │ │ + stc2l 7, cr12, [r0, #768]! @ 0x300 │ │ @ instruction: 0x019a04f8 │ │ - ldc2l 14, cr10, [lr, #568] @ 0x238 │ │ + ldc2l 14, cr10, [lr, #748] @ 0x2ec │ │ orrseq sl, r6, ip, ror r8 │ │ orrseq r5, r6, r0, ror #16 │ │ ldr r0, [sp, #16] │ │ sub r1, r0, #1 │ │ str r1, [fp, #-52] @ 0xffffffcc │ │ cmp r1, #2 │ │ bcc 242b2cc │ │ @@ -1281066,15 +1281065,15 @@ │ │ ldr r0, [pc, #4088] @ 242c344 │ │ mov r5, #0 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ add r0, pc, r0 │ │ str r5, [r0, r4, lsl #2] │ │ mov r0, r4 │ │ b 242bb3c │ │ - stc2l 7, cr12, [r0, #140]! @ 0x8c │ │ + stc2l 7, cr12, [r0, #320]! @ 0x140 │ │ orrseq r0, sl, r4, lsl #9 │ │ orrseq r5, r6, r0, ror #18 │ │ orrseq sl, r6, r4, ror #16 │ │ orrseq r5, sl, r4, ror r2 │ │ ldr r0, [pc, #4044] @ 242c348 │ │ mov r1, r4 │ │ mov r2, r8 │ │ @@ -1281110,19 +1281109,19 @@ │ │ add r1, pc, r1 │ │ bl 270d970 │ │ ldr r6, [pc, #3996] @ 242c3a0 │ │ add r6, pc, r6 │ │ b 2429d70 │ │ stc2l 1, cr4, [r2, #192]! @ 0xc0 │ │ orrseq sl, r6, r0, ror #15 │ │ - ldc2l 10, cr8, [lr, #660] @ 0x294 @ │ │ + ldc2l 10, cr8, [lr, #840] @ 0x348 @ │ │ orrseq r5, r6, r8, lsr #17 │ │ - ldc2l 2, cr11, [pc, #28] @ 242b43c │ │ + ldc2l 2, cr11, [pc, #208] @ 242b4f0 │ │ @ instruction: 0x019a51b0 │ │ - ldc2l 1, cr11, [pc, #952] @ 242b7e0 │ │ + ldc2l 2, cr11, [pc, #108] @ 242b494 │ │ @ instruction: 0x019d65b4 │ │ ldr r4, [pc, #3956] @ 242c3a4 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270e050 │ │ cmp r0, #0 │ │ beq 242bcc4 │ │ @@ -1281152,15 +1281151,15 @@ │ │ ldr r2, [pc, #3852] @ 242c3b0 │ │ add r0, r0, r0, lsl #2 │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ sub r1, r0, #5 │ │ str r1, [fp, #-52] @ 0xffffffcc │ │ b 242bd98 │ │ - stc2l 9, cr6, [r1, #186]! @ 0xba @ │ │ + stc2l 9, cr6, [r1, #276]! @ 0x114 @ │ │ orrseq r5, r6, r0, ror #13 │ │ sub r4, r7, #1 │ │ mov sl, r6 │ │ cmp r4, #20 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ str r4, [sp, #12] │ │ str r7, [sp, #8] │ │ @@ -1281180,26 +1281179,26 @@ │ │ b 242bcd8 │ │ orrseq r5, r6, r8, asr #14 │ │ ldr r1, [pc, #4024] @ 242c4d4 │ │ add r4, sp, #86 @ 0x56 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ b 242c2f8 │ │ - ldc2l 9, cr8, [lr, #246] @ 0xf6 @ │ │ + ldc2l 9, cr8, [lr, #336] @ 0x150 @ │ │ @ instruction: 0x019656d8 │ │ stc2l 15, cr3, [r2, #712]! @ 0x2c8 │ │ orrseq r5, sl, ip, ror #7 │ │ - stc2l 14, cr2, [r0, #600]! @ 0x258 │ │ + stc2l 14, cr2, [r0, #780]! @ 0x30c │ │ orrseq r5, sl, r0, lsl r4 │ │ - ldc2l 8, cr12, [lr, #108] @ 0x6c │ │ + vcadd.f32 q14, q7, q4, #270 │ │ orrseq pc, r6, r4, ror r4 @ │ │ - stc2l 9, cr2, [r1, #246]! @ 0xf6 @ │ │ + stc2l 9, cr2, [r1, #336]! @ 0x150 @ │ │ orrseq r5, sl, r0, asr r0 │ │ eorseq ip, r2, ip, lsr #16 │ │ - stc2l 3, cr8, [r1, #396]! @ 0x18c │ │ + stc2l 3, cr8, [r1, #576]! @ 0x240 │ │ ldr r0, [pc, #3960] @ 242c4d8 │ │ mov r2, r8 │ │ movw r3, #2770 @ 0xad2 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r2, [sp, #36] @ 0x24 │ │ ldr r1, [pc, #3940] @ 242c4dc │ │ @@ -1281279,36 +1281278,36 @@ │ │ add r0, sp, #86 @ 0x56 │ │ add r1, pc, r1 │ │ str r5, [r1, r4, lsl #2] │ │ mov r4, r0 │ │ b 242c384 │ │ eorseq ip, r2, r0, lsr #15 │ │ mlaseq r2, r8, r7, ip │ │ - ldc2l 9, cr2, [pc, #394] @ 242b846 @ │ │ - stc2l 3, cr12, [r0, #76]! @ 0x4c │ │ + ldc2l 9, cr2, [pc, #484] @ 242b8a0 @ │ │ + stc2l 3, cr12, [r0, #256]! @ 0x100 │ │ orrseq r0, sl, r4, lsl #1 │ │ - ldc2l 10, cr10, [lr, #88] @ 0x58 @ │ │ + ldc2l 10, cr10, [lr, #268] @ 0x10c @ │ │ @ instruction: 0x0196a3fc │ │ - stc2l 12, cr15, [r1, #896]! @ 0x380 │ │ + stc2l 13, cr15, [r1, #52]! @ 0x34 │ │ orrseq r5, r6, r8, lsr #11 │ │ orrseq r5, r6, r0, asr r4 │ │ - ldc2l 15, cr14, [lr, #504] @ 0x1f8 │ │ + ldc2l 15, cr14, [lr, #684] @ 0x2ac │ │ orrseq pc, r6, r0, lsr r2 @ │ │ orrseq r5, r6, r0, asr r3 │ │ - stc2l 1, cr12, [r0, #1004]! @ 0x3ec │ │ + stc2l 2, cr12, [r0, #160]! @ 0xa0 │ │ orrseq pc, r9, r8, ror #30 │ │ stc2l 12, cr3, [r2, #416]! @ 0x1a0 │ │ orrseq sl, r6, ip, lsl r3 │ │ orrseq pc, r9, r4, lsl #30 │ │ eorseq ip, r2, ip, asr #9 │ │ eorseq ip, r2, r4, asr #9 │ │ - stc2l 9, cr4, [r0, #158]! @ 0x9e @ │ │ - stc2l 15, cr7, [r1, #724]! @ 0x2d4 │ │ - stc2l 5, cr4, [r1, #328]! @ 0x148 │ │ - ldc2l 0, cr14, [lr, #760] @ 0x2f8 │ │ + stc2l 9, cr4, [r0, #248]! @ 0xf8 @ │ │ + stc2l 15, cr7, [r1, #904]! @ 0x388 │ │ + stc2l 5, cr4, [r1, #508]! @ 0x1fc │ │ + ldc2l 0, cr14, [lr, #940] @ 0x3ac │ │ sub r1, r0, #1 │ │ cmp r1, #20 │ │ bcc 242b734 │ │ ldr r0, [pc, #3964] @ 242c69c │ │ mov r2, r8 │ │ movw r3, #2703 @ 0xa8f │ │ add r0, pc, r0 │ │ @@ -1281520,19 +1281519,19 @@ │ │ add r0, pc, r0 │ │ ldr r5, [r0, r1, lsl #2] │ │ bcs 242c05c │ │ mov r6, r4 │ │ str r5, [r0, r4, lsl #2] │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ b 242c09c │ │ - stc2l 10, cr15, [r1, #192]! @ 0xc0 @ │ │ + stc2l 10, cr15, [r1, #372]! @ 0x174 @ │ │ @ instruction: 0x019652f8 │ │ orrseq r5, r6, r0, lsr #3 │ │ - vcmla.f16 q10, q0, , #270 │ │ - stc2l 3, cr6, [r1, #36]! @ 0x24 │ │ + stc2l 8, cr4, [r0, #592]! @ 0x250 │ │ + stc2l 3, cr6, [r1, #216]! @ 0xd8 │ │ orrseq r5, r6, ip, lsl #1 │ │ orrseq r5, r6, r8, lsl #2 │ │ stc2l 5, cr5, [r2, #672]! @ 0x2a0 │ │ @ instruction: 0x01964fb4 │ │ ldr r0, [pc, #4044] @ 242ca70 │ │ mov r1, r4 │ │ mov r2, r8 │ │ @@ -1281686,26 +1281685,26 @@ │ │ ldr r1, [pc, #4068] @ 242cce0 │ │ add r4, sp, #86 @ 0x56 │ │ mov r2, #15 │ │ mov r3, #7 │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ b 2429d6c │ │ - stc2l 13, cr11, [r0, #396]! @ 0x18c │ │ + stc2l 13, cr11, [r0, #576]! @ 0x240 │ │ orrseq pc, r9, r4, asr #21 │ │ orrseq r9, r6, ip, lsr #29 │ │ - ldc2l 1, cr8, [lr, #332] @ 0x14c │ │ + ldc2l 1, cr8, [lr, #512] @ 0x200 │ │ @ instruction: 0x01964eb0 │ │ - ldc2l 1, cr8, [lr, #132] @ 0x84 │ │ + ldc2l 1, cr8, [lr, #312] @ 0x138 │ │ orrseq r4, r6, r0, lsr pc │ │ @ instruction: 0x0196ec9c │ │ stc2l 7, cr3, [r2, #256]! @ 0x100 │ │ @ instruction: 0x01969df8 │ │ orrseq pc, r9, ip, ror #19 │ │ - stc2l 6, cr15, [r1, #568]! @ 0x238 │ │ + stc2l 6, cr15, [r1, #748]! @ 0x2ec │ │ ldr r0, [pc, #3996] @ 242cce4 │ │ mov r2, r8 │ │ movw r3, #2815 @ 0xaff │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r2, [sp, #36] @ 0x24 │ │ ldr r1, [pc, #3976] @ 242cce8 │ │ @@ -1281762,15 +1281761,15 @@ │ │ add r0, pc, r0 │ │ ldr r0, [r0, r4, lsl #2] │ │ cmp r0, #1 │ │ bge 242bfe0 │ │ ldr r5, [sp, #36] @ 0x24 │ │ b 242c370 │ │ orrseq r5, sp, r8, lsr #24 │ │ - stc2l 10, cr9, [r1, #328]! @ 0x148 @ │ │ + stc2l 10, cr9, [r1, #508]! @ 0x1fc @ │ │ ldr r0, [pc, #3772] @ 242cd08 │ │ mov r1, r4 │ │ mov r2, r8 │ │ movw r3, #2860 @ 0xb2c │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r9, [pc, #3752] @ 242cd0c │ │ @@ -1281793,19 +1281792,19 @@ │ │ ldr r7, [r1, r4, lsl #2] │ │ str r7, [sp, #116] @ 0x74 │ │ cmp r7, #1 │ │ blt 242c828 │ │ sub r4, r2, #1 │ │ b 242beec │ │ orrseq lr, r6, r8, lsl #24 │ │ - stc2l 15, cr5, [r1, #196]! @ 0xc4 │ │ + stc2l 15, cr5, [r1, #376]! @ 0x178 │ │ @ instruction: 0x01964cb4 │ │ - stc2l 9, cr9, [r1, #412]! @ 0x19c @ │ │ + stc2l 9, cr9, [r1, #502]! @ 0x1f6 @ │ │ orrseq lr, r6, r0, lsl #23 │ │ - stc2l 14, cr5, [r1, #676]! @ 0x2a4 │ │ + stc2l 14, cr5, [r1, #856]! @ 0x358 │ │ ldr r2, [sp, #28] │ │ ldr r0, [pc, #4084] @ 242ced0 │ │ add r0, pc, r0 │ │ ldr r7, [r0, r1, lsl #2] │ │ str r7, [sp, #116] @ 0x74 │ │ cmp r7, #0 │ │ ble 242c828 │ │ @@ -1281847,15 +1281846,15 @@ │ │ mov r2, r8 │ │ mov r3, #2880 @ 0xb40 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 242bed0 │ │ orrseq r4, r6, r0, lsr ip │ │ - stc2l 9, cr9, [r1, #28]! @ │ │ + stc2l 9, cr9, [r1, #118]! @ 0x76 @ │ │ orrseq lr, r6, r4, asr #21 │ │ mov r1, r4 │ │ mov r2, r8 │ │ movw r3, #2824 @ 0xb08 │ │ mov r5, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3884] @ 242cee4 │ │ @@ -1281880,27 +1281879,27 @@ │ │ rsb r0, r0, #0 │ │ str r0, [fp, #-60] @ 0xffffffc4 │ │ sub r0, fp, #60 @ 0x3c │ │ add r1, sp, #36 @ 0x24 │ │ mov r2, r4 │ │ bl 270e080 │ │ b 242c37c │ │ - ldc2l 14, cr7, [lr, #684] @ 0x2ac │ │ - stc2l 8, cr9, [r1, #584]! @ 0x248 │ │ + ldc2l 14, cr7, [lr, #864] @ 0x360 │ │ + stc2l 8, cr9, [r1, #764]! @ 0x2fc │ │ orrseq lr, r6, r4, asr #20 │ │ - ldc2l 14, cr7, [lr, #172] @ 0xac │ │ - stc2l 6, cr9, [r1, #760]! @ 0x2f8 │ │ + ldc2l 14, cr7, [lr, #352] @ 0x160 │ │ + stc2l 6, cr9, [r1, #940]! @ 0x3ac │ │ orrseq r5, sp, ip, lsl #19 │ │ - stc2l 3, cr15, [r1, #480]! @ 0x1e0 │ │ + stc2l 3, cr15, [r1, #660]! @ 0x294 │ │ orrseq r4, r6, r8, lsr ip │ │ @ instruction: 0x01969ad4 │ │ @ instruction: 0x0196e8b8 │ │ @ instruction: 0x01964a94 │ │ - ldc2l 5, cr14, [lr, #888] @ 0x378 │ │ - ldc2l 12, cr7, [lr, #916] @ 0x394 │ │ + ldc2l 6, cr14, [lr, #44] @ 0x2c │ │ + ldc2l 13, cr7, [lr, #72] @ 0x48 │ │ @ instruction: 0x01964af0 │ │ orrseq r5, sp, r4, ror r8 │ │ orrseq r4, r6, ip, lsl #20 │ │ orrseq r4, r6, r0, asr r9 │ │ mov r6, r0 │ │ ldr r0, [pc, #3944] @ 242cfd0 │ │ mov r1, r4 │ │ @@ -1282044,16 +1282043,16 @@ │ │ add r1, pc, r1 │ │ bl 270d970 │ │ cmp r7, r5 │ │ moveq r7, sl │ │ ldr sl, [pc, #4016] @ 242d254 │ │ add sl, pc, sl │ │ b 2429d70 │ │ - stc2l 12, cr15, [r0, #392]! @ 0x188 │ │ - stc2l 6, cr7, [r1, #868]! @ 0x364 │ │ + stc2l 12, cr15, [r0, #572]! @ 0x23c │ │ + stc2l 7, cr7, [r1, #24]! │ │ ldr r4, [sp, #16] │ │ sub r4, r4, #1 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ cmp r4, #2 │ │ mov r0, r4 │ │ bcc 242c2e0 │ │ ldr r0, [pc, #4076] @ 242d2bc │ │ @@ -1282105,18 +1282104,18 @@ │ │ mov r0, r4 │ │ ldr r1, [pc, #3900] @ 242d2c8 │ │ mov r2, #15 │ │ mov r3, #6 │ │ add r1, pc, r1 │ │ b 2429d6c │ │ stc2l 13, cr4, [r2, #624]! @ 0x270 │ │ - stc2l 3, cr9, [r1, #732]! @ 0x2dc │ │ + stc2l 3, cr9, [r1, #912]! @ 0x390 │ │ orrseq r4, r6, r0, ror #16 │ │ orrseq r5, sp, r4, ror r6 │ │ - stc2l 0, cr15, [r1, #384]! @ 0x180 │ │ + stc2l 0, cr15, [r1, #564]! @ 0x234 │ │ orrseq r4, r6, r0, lsr #18 │ │ @ instruction: 0x019697bc │ │ ldr r0, [pc, #3856] @ 242d2cc │ │ mov r1, r4 │ │ mov r2, r8 │ │ movw r3, #2901 @ 0xb55 │ │ add r0, pc, r0 │ │ @@ -1282182,17 +1282181,17 @@ │ │ ble 242c7f8 │ │ cmp sl, #19 │ │ bhi 242c4e0 │ │ ldr r4, [r9, sl, lsl #2] │ │ mov r0, sl │ │ b 242c518 │ │ orrseq r5, sp, r8, ror #10 │ │ - ldc2l 11, cr1, [pc, #948] @ 242c88c @ │ │ - ldc2l 10, cr7, [pc, #36] @ 242c500 @ │ │ - stc2l 6, cr9, [r0, #652]! @ 0x28c │ │ + ldc2l 12, cr1, [pc, #104] @ 242c540 │ │ + ldc2l 10, cr7, [pc, #216] @ 242c5b4 @ │ │ + stc2l 6, cr9, [r0, #832]! @ 0x340 │ │ orrseq r9, r6, ip, ror #13 │ │ ldr r5, [pc, #3912] @ 242d430 │ │ mov r1, sl │ │ mov r2, r8 │ │ movw r3, #2922 @ 0xb6a │ │ add r5, pc, r5 │ │ mov r0, r5 │ │ @@ -1282227,23 +1282226,23 @@ │ │ add r0, r1, r4, lsl #3 │ │ vldr d17, [r2] │ │ vldr d16, [r0] │ │ vcmp.f64 d17, d16 │ │ vmrs APSR_nzcv, fpscr │ │ bmi 242c6fc │ │ b 242d2dc │ │ - stc2l 3, cr9, [r1, #408]! @ 0x198 │ │ + stc2l 3, cr9, [r1, #588]! @ 0x24c │ │ orrseq lr, r6, ip, lsl r5 │ │ eorseq fp, r2, r4, lsr #17 │ │ - stc2l 4, cr13, [r1, #364]! @ 0x16c │ │ + stc2l 4, cr13, [r1, #544]! @ 0x220 │ │ orrseq r4, sl, ip, lsl #14 │ │ - vcadd.f32 d23, d30, d17, #270 │ │ + vcadd.f32 , q15, q7, #270 │ │ orrseq r4, r6, ip, lsr #13 │ │ orrseq r5, sp, r0, asr #8 │ │ - ldc2l 8, cr7, [lr, #372] @ 0x174 │ │ + vcadd.f32 d23, d30, d10, #270 │ │ ldr r0, [pc, #3936] @ 242d510 │ │ mov r1, r5 │ │ mov r2, r8 │ │ movw r3, #2925 @ 0xb6d │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3916] @ 242d514 │ │ @@ -1282297,17 +1282296,17 @@ │ │ bl 270d9c0 │ │ ldr r1, [pc, #4008] @ 242d634 │ │ add r1, pc, r1 │ │ add r0, r1, r0, lsl #3 │ │ vstr d9, [r0] │ │ b 242c7ac │ │ orrseq r4, r6, r4, ror #12 │ │ - stc2l 3, cr7, [r1, #388]! @ 0x184 │ │ + stc2l 3, cr7, [r1, #568]! @ 0x238 │ │ orrseq r4, r6, r0, lsl r6 │ │ - stc2l 3, cr7, [r1, #148]! @ 0x94 │ │ + stc2l 3, cr7, [r1, #328]! @ 0x148 │ │ orrseq r4, r6, r0, ror #11 │ │ orrseq r4, r6, r8, lsr r4 │ │ stc2l 9, cr4, [r2, #344]! @ 0x158 @ │ │ stc2l 9, cr4, [r2, #240]! @ 0xf0 @ │ │ ldr r0, [fp, #8] │ │ sub r4, r4, #5 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ @@ -1282379,17 +1282378,17 @@ │ │ mov r2, r8 │ │ movw r3, #2985 @ 0xba9 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 242c4a8 │ │ @ instruction: 0x019643d4 │ │ - ldc2l 9, cr9, [lr, #404] @ 0x194 @ │ │ + ldc2l 9, cr9, [lr, #494] @ 0x1ee @ │ │ orrseq r9, r6, r8, lsr #7 │ │ - ldc2l 9, cr9, [lr, #284] @ 0x11c @ │ │ + ldc2l 9, cr9, [lr, #374] @ 0x176 @ │ │ orrseq r9, r6, r8, ror r3 │ │ orrseq r4, r6, r0, ror #6 │ │ rsb r0, r7, #0 │ │ str r0, [fp, #-52] @ 0xffffffcc │ │ sub r0, fp, #52 @ 0x34 │ │ mov r1, r4 │ │ bl 270e040 │ │ @@ -1282416,15 +1282415,15 @@ │ │ ldr r4, [sp, #12] │ │ b 242c8bc │ │ stc2l 12, cr2, [r2, #864]! @ 0x360 │ │ orrseq r9, r6, r4, lsl #7 │ │ stc2l 12, cr2, [r2, #624]! @ 0x270 │ │ orrseq r9, r6, r4, asr r3 │ │ orrseq r4, r6, ip, ror #5 │ │ - ldc2l 6, cr7, [lr, #4] │ │ + ldc2l 6, cr7, [lr, #184] @ 0xb8 │ │ ldr r0, [sp, #28] │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ vldr d16, [r0] │ │ mov r0, r4 │ │ ldr r5, [pc, #3796] @ 242d768 │ │ vcmp.f64 d16, d8 │ │ add r5, pc, r5 │ │ @@ -1282444,24 +1282443,24 @@ │ │ bhi 242c910 │ │ ldr sl, [pc, #3732] @ 242d76c │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ add sl, pc, sl │ │ ldr r5, [sl, r4, lsl #2] │ │ b 242c954 │ │ orrseq r4, r6, r0, lsl #8 │ │ - ldc2l 5, cr7, [lr, #788] @ 0x314 │ │ + ldc2l 5, cr7, [lr, #968] @ 0x3c8 │ │ @ instruction: 0x019643d0 │ │ orrseq r4, r6, r8, ror r2 │ │ - stc2l 4, cr5, [r1, #852]! @ 0x354 │ │ + stc2l 5, cr5, [r1, #8]! │ │ orrseq r4, r6, ip, asr #4 │ │ - stc2l 4, cr5, [r1, #596]! @ 0x254 │ │ + stc2l 4, cr5, [r1, #776]! @ 0x308 │ │ orrseq r4, r6, r8, lsl r2 │ │ @ instruction: 0x019641fc │ │ - ldc2l 5, cr7, [lr, #92] @ 0x5c │ │ - ldc2l 4, cr7, [lr, #892] @ 0x37c │ │ + ldc2l 5, cr7, [lr, #272] @ 0x110 │ │ + ldc2l 5, cr7, [lr, #48] @ 0x30 │ │ ldr r6, [pc, #3672] @ 242d770 │ │ mov r1, r4 │ │ mov r2, r8 │ │ movw r3, #3016 @ 0xbc8 │ │ add r6, pc, r6 │ │ mov r0, r6 │ │ bl 270d9c0 │ │ @@ -1282542,15 +1282541,15 @@ │ │ mov r0, r4 │ │ ldr r5, [pc, #4036] @ 242da24 │ │ vcmp.f64 d16, d8 │ │ add r5, pc, r5 │ │ vmrs APSR_nzcv, fpscr │ │ vmovls.f64 d8, d16 │ │ b 242c8a0 │ │ - ldc2l 4, cr7, [lr, #228] @ 0xe4 │ │ + ldc2l 4, cr7, [lr, #408] @ 0x198 │ │ orrseq r4, r6, r4, asr #4 │ │ ldr r6, [pc, #4008] @ 242da28 │ │ mov r1, r4 │ │ mov r2, r8 │ │ movw r3, #3044 @ 0xbe4 │ │ add r6, pc, r6 │ │ mov r0, r6 │ │ @@ -1282567,15 +1282566,15 @@ │ │ mov r0, r6 │ │ vcmp.f64 d16, d8 │ │ vmrs APSR_nzcv, fpscr │ │ vmovls.f64 d8, d16 │ │ bl 270d9c0 │ │ b 242c8a0 │ │ @ instruction: 0x019d4fd0 │ │ - ldc2l 3, cr7, [lr, #884] @ 0x374 │ │ + ldc2l 4, cr7, [lr, #40] @ 0x28 │ │ orrseq r4, r6, r0, ror #3 │ │ stc2l 6, cr4, [r2, #64]! @ 0x40 │ │ orrseq r4, r6, ip, rrx │ │ mov r5, r7 │ │ subs r7, r9, #1 │ │ mov r2, #0 │ │ beq 242cbf8 │ │ @@ -1282601,21 +1282600,21 @@ │ │ bne 242cca4 │ │ cmp r9, #1 │ │ mov r9, r7 │ │ mov r7, r5 │ │ mov r2, #0 │ │ bgt 242c85c │ │ b 242cb84 │ │ - stc2l 15, cr10, [r0, #188]! @ 0xbc │ │ + stc2l 15, cr10, [r0, #368]! @ 0x170 │ │ orrseq r4, r6, r4, ror #1 │ │ orrseq lr, r9, ip, lsl #25 │ │ - ldc2l 6, cr9, [lr, #136] @ 0x88 │ │ + ldc2l 6, cr9, [lr, #316] @ 0x13c │ │ orrseq r9, r6, r0, lsl r0 │ │ @ instruction: 0x01963ff4 │ │ - stc2l 14, cr10, [r0, #732]! @ 0x2dc │ │ + stc2l 14, cr10, [r0, #912]! @ 0x390 │ │ orrseq lr, r9, ip, lsl ip │ │ ldr r7, [sp, #8] │ │ ldr r4, [sp, #12] │ │ cmp r4, #20 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ str r2, [sp, #28] │ │ bcc 242cbb0 │ │ @@ -1282656,16 +1282655,16 @@ │ │ bcs 242cc40 │ │ ldr r1, [pc, #3624] @ 242da50 │ │ mov r0, #0 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ add r1, pc, r1 │ │ str r0, [r1, r4, lsl #2] │ │ b 242cc94 │ │ - stc2l 13, cr6, [r1, #460]! @ 0x1cc │ │ - stc2l 2, cr15, [r0, #648]! @ 0x288 │ │ + stc2l 13, cr6, [r1, #640]! @ 0x280 │ │ + stc2l 2, cr15, [r0, #828]! @ 0x33c │ │ ldr r0, [pc, #4072] @ 242dc30 │ │ mov r1, r4 │ │ ldr r5, [pc, #4068] @ 242dc34 │ │ mov r3, #3152 @ 0xc50 │ │ add r0, pc, r0 │ │ add r5, pc, r5 │ │ mov r2, r5 │ │ @@ -1282692,34 +1282691,34 @@ │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 12, cr6, [r1, #932]! @ 0x3a4 │ │ + stc2l 13, cr6, [r1, #88]! @ 0x58 │ │ ldr r7, [pc, #3456] @ 242da54 │ │ add r7, pc, r7 │ │ mov r8, r7 │ │ b 24296f8 │ │ - stc2l 15, cr8, [r0, #280]! @ 0x118 │ │ - stc2l 2, cr3, [r1, #424]! @ 0x1a8 │ │ - stc2l 14, cr8, [r0, #748]! @ 0x2ec │ │ + stc2l 15, cr8, [r0, #460]! @ 0x1cc │ │ + stc2l 2, cr3, [r1, #604]! @ 0x25c │ │ + stc2l 14, cr8, [r0, #928]! @ 0x3a0 │ │ orrseq r8, r6, r4, lsl #30 │ │ - stc2l 11, cr8, [r1, #504]! @ 0x1f8 @ │ │ + stc2l 11, cr8, [r1, #684]! @ 0x2ac @ │ │ orrseq sp, r6, r4, lsr sp │ │ ldrhteq fp, [r2], -ip │ │ - stc2l 12, cr12, [r1, #460]! @ 0x1cc │ │ + stc2l 12, cr12, [r1, #640]! @ 0x280 │ │ orrseq r3, sl, r4, lsr #30 │ │ - ldc2l 0, cr7, [lr, #820] @ 0x334 │ │ + ldc2l 0, cr7, [lr, #1000] @ 0x3e8 │ │ @ instruction: 0x01963edc │ │ - vcadd.f32 d25, d15, d26, #270 │ │ + ldc2l 8, cr9, [pc, #348] @ 242ce6c │ │ orrseq r4, sp, r4, ror #23 │ │ - ldc2l 0, cr7, [lr, #404] @ 0x194 │ │ - stc2l 13, cr8, [r0, #444]! @ 0x1bc │ │ + ldc2l 0, cr7, [lr, #584] @ 0x248 │ │ + stc2l 13, cr8, [r0, #624]! @ 0x270 │ │ orrseq r3, r6, r4, ror #28 │ │ ldr r0, [fp, #-64] @ 0xffffffc0 │ │ mov r8, r7 │ │ movw r5, #5000 @ 0x1388 │ │ add r1, r0, r0, lsl #2 │ │ sub r0, r0, #1 │ │ sub r3, r1, #5 │ │ @@ -1282824,17 +1282823,17 @@ │ │ bcs 242cee8 │ │ add r0, r7, r4, lsl #3 │ │ vstr d9, [r0] │ │ mov r0, r4 │ │ b 242cf2c │ │ orrseq r4, sp, r8, asr #23 │ │ orrseq r8, r6, r8, asr #26 │ │ - stc2l 5, cr14, [r1, #560]! @ 0x230 │ │ + stc2l 5, cr14, [r1, #740]! @ 0x2e4 │ │ orrseq r3, r6, r4, asr lr │ │ - stc2l 8, cr8, [r1, #216]! @ 0xd8 │ │ + vcmla.f16 q12, , , #270 │ │ orrseq r3, r6, ip, asr #26 │ │ ldr r0, [pc, #2984] @ 242da98 │ │ mov r1, r4 │ │ ldr r5, [pc, #2980] @ 242da9c │ │ movw r3, #2533 @ 0x9e5 │ │ add r0, pc, r0 │ │ add r5, pc, r5 │ │ @@ -1282887,17 +1282886,17 @@ │ │ add r0, r0, r4, lsl #3 │ │ vstr d9, [r0] │ │ mov r0, r4 │ │ b 242d060 │ │ orrseq r3, r6, ip, lsl sp │ │ @ instruction: 0x019d4ab0 │ │ stc2l 4, cr2, [r2, #904]! @ 0x388 │ │ - stc2l 3, cr1, [r0, #824]! @ 0x338 │ │ + stc2l 3, cr1, [r0, #1004]! @ 0x3ec │ │ orrseq r3, r6, r4, lsl fp │ │ - stc2l 3, cr1, [r0, #648]! @ 0x288 │ │ + stc2l 3, cr1, [r0, #828]! @ 0x33c │ │ ldr r0, [pc, #2764] @ 242dab4 │ │ mov r1, r4 │ │ ldr r5, [pc, #2760] @ 242dab8 │ │ movw r3, #2534 @ 0x9e6 │ │ add r0, pc, r0 │ │ add r5, pc, r5 │ │ mov r2, r5 │ │ @@ -1282947,15 +1282946,15 @@ │ │ ldr r0, [fp, #12] │ │ mov r1, r3 │ │ bl 270e090 │ │ str r4, [fp, #-52] @ 0xffffffcc │ │ b 242d128 │ │ orrseq r3, sl, r8, lsl r9 │ │ orrseq r3, r6, r4, asr #21 │ │ - ldc2l 5, cr9, [pc, #456] @ 242d294 │ │ + ldc2l 5, cr9, [pc, #636] @ 242d348 │ │ orrseq r3, r6, ip, lsr fp │ │ orrseq r4, sp, r0, lsr #18 │ │ ldr r0, [pc, #2568] @ 242dae0 │ │ movw r3, #2542 @ 0x9ee │ │ ldr r5, [pc, #2564] @ 242dae4 │ │ add r0, pc, r0 │ │ add r5, pc, r5 │ │ @@ -1282979,24 +1282978,24 @@ │ │ ldr r0, [pc, #2500] @ 242daf4 │ │ mov r1, #1 │ │ ldr r2, [pc, #2496] @ 242daf8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ str r1, [r2, r4, lsl #2] │ │ b 242ccac │ │ - ldc2l 5, cr9, [pc, #184] @ 242d204 │ │ + ldc2l 5, cr9, [pc, #364] @ 242d2b8 │ │ @ instruction: 0x019d48f0 │ │ orrseq r3, r6, r8, asr #20 │ │ - ldc2l 4, cr9, [pc, #924] @ 242d4f4 │ │ + ldc2l 5, cr9, [pc, #80] @ 242d1a8 │ │ orrseq r3, sl, ip, lsl #9 │ │ - ldc2l 4, cr9, [pc, #700] @ 242d41c │ │ + ldc2l 4, cr9, [pc, #880] @ 242d4d0 │ │ orrseq r3, sl, r0, ror #8 │ │ @ instruction: 0x019639d8 │ │ - stc2l 13, cr0, [r1, #588]! @ 0x24c │ │ - stc2l 13, cr0, [r1, #412]! @ 0x19c │ │ + stc2l 13, cr0, [r1, #768]! @ 0x300 │ │ + stc2l 13, cr0, [r1, #592]! @ 0x250 │ │ ldr r0, [fp, #16] │ │ ldr r1, [fp, #28] │ │ bl 270d2f0 │ │ bl 270db20 │ │ cmp r0, #0 │ │ bne 242cca4 │ │ sub r1, r9, #1 │ │ @@ -1283046,16 +1283045,16 @@ │ │ vmovge.f64 d16, d18 │ │ vstr d16, [r7] │ │ b 242d88c │ │ orrseq r3, sl, ip, lsr r4 │ │ eorseq sl, r2, r4, lsl ip │ │ orrseq r3, r6, r4, asr r9 │ │ orrseq r3, r6, ip, lsr r9 │ │ - ldc2l 2, cr15, [lr, #284] @ 0x11c │ │ - ldc2l 5, cr13, [lr, #56] @ 0x38 │ │ + ldc2l 2, cr15, [lr, #464] @ 0x1d0 │ │ + ldc2l 5, cr13, [lr, #236] @ 0xec │ │ str r5, [sp, #28] │ │ mov r5, r1 │ │ ldr r0, [pc, #2200] @ 242db00 │ │ mov r1, r4 │ │ ldr r6, [pc, #2196] @ 242db04 │ │ mov r3, #2944 @ 0xb80 │ │ add r0, pc, r0 │ │ @@ -1283073,21 +1283072,21 @@ │ │ mov r2, r6 │ │ movw r3, #2946 @ 0xb82 │ │ add r0, pc, r0 │ │ mov r1, r5 │ │ str r5, [fp, #-52] @ 0xffffffcc │ │ bl 270d9c0 │ │ b 242d2fc │ │ - stc2l 12, cr14, [r0, #296]! @ 0x128 │ │ + stc2l 12, cr14, [r0, #476]! @ 0x1dc │ │ @ instruction: 0x019639d4 │ │ orrseq r3, r6, ip, lsl #19 │ │ - ldc2l 1, cr15, [lr, #268] @ 0x10c │ │ - ldc2l 11, cr6, [lr, #132] @ 0x84 @ │ │ + ldc2l 1, cr15, [lr, #448] @ 0x1c0 │ │ + ldc2l 11, cr6, [lr, #312] @ 0x138 @ │ │ orrseq r3, r6, r8, lsr #18 │ │ - ldc2l 10, cr6, [lr, #932] @ 0x3a4 @ │ │ + ldc2l 11, cr6, [lr, #88] @ 0x58 @ │ │ @ instruction: 0x019638f4 │ │ str r5, [sp, #28] │ │ ldr r1, [pc, #2068] @ 242dafc │ │ ldr r2, [fp, #12] │ │ add r1, pc, r1 │ │ bl 270e090 │ │ sub r5, r7, #1 │ │ @@ -1283162,19 +1283161,19 @@ │ │ cmp r5, #20 │ │ bcs 242d434 │ │ ldr r0, [pc, #1848] @ 242db4c │ │ add r0, pc, r0 │ │ add r0, r0, r5, lsl #3 │ │ vstr d9, [r0] │ │ b 242d484 │ │ - stc2l 9, cr4, [r1, #474]! @ 0x1da @ │ │ + stc2l 10, cr4, [r1, #104]! @ 0x68 @ │ │ orrseq r3, r6, r0, ror r7 │ │ - ldc2l 10, cr6, [lr, #396] @ 0x18c @ │ │ + ldc2l 10, cr6, [lr, #576] @ 0x240 @ │ │ orrseq r3, r6, r8, asr #15 │ │ - ldc2l 1, cr9, [pc, #568] @ 242d670 │ │ + ldc2l 1, cr9, [pc, #748] @ 242d724 │ │ ldr r0, [pc, #1792] @ 242db3c │ │ mov r1, r5 │ │ ldr r4, [pc, #1788] @ 242db40 │ │ movw r3, #2953 @ 0xb89 │ │ add r0, pc, r0 │ │ add r4, pc, r4 │ │ mov r2, r4 │ │ @@ -1283222,17 +1283221,17 @@ │ │ add r1, pc, r1 │ │ str r0, [r1, r5, lsl #2] │ │ add r0, r6, r5, lsl #3 │ │ vstr d8, [r0] │ │ mov r0, r5 │ │ b 242d5a0 │ │ orrseq sp, r6, ip, lsl #11 │ │ - stc2l 3, cr8, [r1, #328]! @ 0x148 │ │ + stc2l 3, cr8, [r1, #508]! @ 0x1fc │ │ orrseq sp, r6, ip, lsl #10 │ │ - stc2l 8, cr4, [r1, #212]! @ 0xd4 │ │ + vcmla.f16 q10, , q9, #270 │ │ @ instruction: 0x019635bc │ │ orrseq r4, sp, r4, lsl #9 │ │ ldr r0, [pc, #1584] @ 242db5c │ │ mov r1, r5 │ │ ldr r4, [pc, #1580] @ 242db60 │ │ movw r3, #2954 @ 0xb8a │ │ add r0, pc, r0 │ │ @@ -1283292,23 +1283291,23 @@ │ │ ldr r1, [r1, r5, lsl #2] │ │ ldr r3, [pc, #1392] @ 242db88 │ │ str r5, [fp, #-52] @ 0xffffffcc │ │ add r3, pc, r3 │ │ add r6, r1, r0 │ │ str r2, [r3, r5, lsl #2] │ │ b 242d720 │ │ - stc2l 2, cr8, [r1, #856]! @ 0x358 │ │ + stc2l 3, cr8, [r1, #12]! │ │ orrseq sp, r6, r8, lsl #9 │ │ - stc2l 7, cr4, [r1, #708]! @ 0x2c4 │ │ + stc2l 7, cr4, [r1, #888]! @ 0x378 │ │ orrseq r3, r6, r8, lsr r5 │ │ - stc2l 2, cr8, [r1, #200]! @ 0xc8 │ │ + stc2l 2, cr8, [r1, #380]! @ 0x17c │ │ orrseq sp, r6, ip, ror #7 │ │ - ldc2l 7, cr6, [lr, #844] @ 0x34c │ │ + vcadd.f32 d22, d14, d0, #270 │ │ orrseq sp, r6, ip, lsr #7 │ │ - stc2l 1, cr8, [r1, #760]! @ 0x2f8 │ │ + stc2l 1, cr8, [r1, #940]! @ 0x3ac │ │ ldr r0, [pc, #1336] @ 242db8c │ │ movw r3, #2962 @ 0xb92 │ │ ldr r4, [pc, #1332] @ 242db90 │ │ add r0, pc, r0 │ │ add r4, pc, r4 │ │ mov r2, r4 │ │ bl 270d9c0 │ │ @@ -1283367,22 +1283366,22 @@ │ │ str r0, [fp, #-60] @ 0xffffffc4 │ │ sub r0, fp, #64 @ 0x40 │ │ sub r1, fp, #60 @ 0x3c │ │ mov r2, r4 │ │ bl 270e030 │ │ b 242cca4 │ │ orrseq sp, r6, r4, ror r3 │ │ - ldc2l 7, cr6, [lr, #348] @ 0x15c │ │ + ldc2l 7, cr6, [lr, #528] @ 0x210 │ │ @ instruction: 0x019d42f8 │ │ - stc2l 15, cr7, [r1, #920]! @ 0x398 │ │ + stc2l 0, cr8, [r1, #76]! @ 0x4c │ │ orrseq r3, r6, r4, lsl #7 │ │ orrseq r3, r6, r0, lsl r4 │ │ orrseq r3, r6, ip, lsr #6 │ │ orrseq r4, sp, r8, ror r1 │ │ - ldc2l 13, cr8, [pc, #376] @ 242d8f0 │ │ + ldc2l 13, cr8, [pc, #556] @ 242d9a4 │ │ ldr r5, [pc, #1096] @ 242dbc4 │ │ movw r3, #3063 @ 0xbf7 │ │ ldr r4, [pc, #1092] @ 242dbc8 │ │ ldr r7, [sp, #12] │ │ add r5, pc, r5 │ │ add r4, pc, r4 │ │ mov r0, r5 │ │ @@ -1283484,15 +1283483,15 @@ │ │ add r3, pc, r3 │ │ add r6, r1, r0 │ │ str r2, [r3, r7, lsl #2] │ │ b 242da08 │ │ orrseq r4, sp, r4, lsl r1 │ │ eorseq sl, r2, ip, ror #9 │ │ eorseq sl, r2, r4, ror #9 │ │ - stc2l 4, cr4, [r1, #308]! @ 0x134 │ │ + stc2l 4, cr4, [r1, #488]! @ 0x1e8 │ │ @ instruction: 0x019631bc │ │ ldr r0, [pc, #712] @ 242dc00 │ │ mov r3, #3072 @ 0xc00 │ │ ldr r4, [pc, #708] @ 242dc04 │ │ add r0, pc, r0 │ │ add r4, pc, r4 │ │ mov r2, r4 │ │ @@ -1283548,150 +1283547,150 @@ │ │ ldr r1, [pc, #536] @ 242dc2c │ │ ldr r2, [sp, #12] │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ str r6, [r1, r2, lsl #2] │ │ b 242ccac │ │ orrseq r3, r6, r0, lsl #4 │ │ - ldc2l 4, cr6, [lr, #396] @ 0x18c │ │ + ldc2l 4, cr6, [lr, #576] @ 0x240 │ │ @ instruction: 0x019631b4 │ │ - stc2l 9, cr13, [r1, #368]! @ 0x170 @ │ │ + stc2l 9, cr13, [r1, #458]! @ 0x1ca @ │ │ orrseq r3, r6, ip, ror r2 │ │ - ldc2l 10, cr8, [pc, #872] @ 242dda8 @ │ │ + ldc2l 11, cr8, [pc, #28] @ 242da5c @ │ │ @ instruction: 0x01963098 │ │ - ldc2l 11, cr12, [lr, #904] @ 0x388 @ │ │ + ldc2l 12, cr12, [lr, #60] @ 0x3c │ │ orrseq r3, sp, r0, lsl #29 │ │ - vcmla.f16 , , q15, #270 │ │ + stc2l 9, cr13, [r1, #54]! @ 0x36 @ │ │ @ instruction: 0x0196ce90 │ │ orrseq r2, sl, r4, lsl #20 │ │ orrseq r2, r6, r0, ror #29 │ │ - stc2l 11, cr7, [r1, #744]! @ 0x2e8 @ │ │ - ldc2l 9, cr8, [pc, #68] @ 242daa8 @ │ │ + stc2l 11, cr7, [r1, #924]! @ 0x39c @ │ │ + ldc2l 9, cr8, [pc, #158] @ 242db02 @ │ │ ldrshteq sl, [r2], -r8 │ │ orrseq ip, r6, ip, asr sp │ │ - stc2l 12, cr11, [r1, #636]! @ 0x27c │ │ - vcadd.f32 q12, , q3, #270 │ │ + stc2l 12, cr11, [r1, #816]! @ 0x330 │ │ + ldc2l 8, cr8, [pc, #972] @ 242de40 │ │ orrseq r2, sl, r4, asr #30 │ │ - stc2l 14, cr7, [r0, #28]! │ │ - ldc2l 8, cr8, [pc, #456] @ 242dc48 │ │ + stc2l 14, cr7, [r0, #208]! @ 0xd0 │ │ + ldc2l 8, cr8, [pc, #636] @ 242dcfc │ │ orrseq r7, r6, r8, asr #28 │ │ - stc2l 15, cr3, [r1, #932]! @ 0x3a4 │ │ - vcadd.f32 d24, d15, d30, #270 │ │ + stc2l 0, cr4, [r1, #88]! @ 0x58 │ │ + ldc2l 8, cr8, [pc, #364] @ 242dbf8 │ │ orrseq r2, r6, r8, ror #26 │ │ - stc2l 10, cr7, [r1, #520]! @ 0x208 @ │ │ - ldc2l 7, cr8, [pc, #936] @ 242de40 │ │ + stc2l 10, cr7, [r1, #700]! @ 0x2bc @ │ │ + ldc2l 8, cr8, [pc, #92] @ 242daf4 │ │ orrseq ip, r6, r0, lsr ip │ │ - stc2l 15, cr3, [r1, #212]! @ 0xd4 │ │ - ldc2l 7, cr8, [pc, #488] @ 242dc8c │ │ - ldc2l 15, cr5, [lr, #844] @ 0x34c │ │ + stc2l 15, cr3, [r1, #392]! @ 0x188 │ │ + ldc2l 7, cr8, [pc, #668] @ 242dd40 │ │ + ldc2l 0, cr6, [lr] │ │ orrseq r2, r6, ip, lsr #26 │ │ - stc2l 9, cr7, [r1, #332]! @ 0x14c @ │ │ - ldc2l 7, cr8, [pc, #56] @ 242daec │ │ + stc2l 9, cr7, [r1, #422]! @ 0x1a6 @ │ │ + ldc2l 7, cr8, [pc, #236] @ 242dba0 │ │ orrseq ip, r6, r4, asr fp │ │ - ldc2l 14, cr5, [lr, #1004] @ 0x3ec │ │ - ldc2l 6, cr8, [pc, #520] @ 242dcc8 │ │ + ldc2l 15, cr5, [lr, #160] @ 0xa0 │ │ + ldc2l 6, cr8, [pc, #700] @ 242dd7c │ │ stc2l 5, cr1, [r2, #248]! @ 0xf8 │ │ orrseq r2, r6, r8, asr #24 │ │ - stc2l 4, cr0, [r0, #120]! @ 0x78 │ │ + stc2l 4, cr0, [r0, #300]! @ 0x12c │ │ orrseq r2, sl, r8, asr r9 │ │ @ instruction: 0x019a29fc │ │ orrseq r2, r6, ip, lsr #25 │ │ orrseq r2, sl, r0, lsl #19 │ │ eorseq r9, r2, ip, asr #27 │ │ orrseq r2, sl, r0, ror #11 │ │ - stc2l 14, cr15, [r0, #764]! @ 0x2fc │ │ - ldc2l 5, cr8, [pc, #600] @ 242dd44 │ │ + stc2l 14, cr15, [r0, #944]! @ 0x3b0 │ │ + ldc2l 5, cr8, [pc, #780] @ 242ddf8 │ │ eorseq r9, r2, r4, ror sp │ │ orrseq r2, sl, r8, lsl #11 │ │ - ldc2l 5, cr8, [pc, #348] @ 242dc54 │ │ - ldc2l 4, cr2, [pc, #704] @ 242ddbc │ │ + ldc2l 5, cr8, [pc, #528] @ 242dd08 │ │ + ldc2l 4, cr2, [pc, #884] @ 242de70 │ │ @ instruction: 0x019a24f8 │ │ eorseq r9, r2, r0, lsl #23 │ │ - stc2l 6, cr7, [r1, #616]! @ 0x268 │ │ - ldc2l 3, cr8, [pc, #1016] @ 242df04 │ │ + stc2l 6, cr7, [r1, #796]! @ 0x31c │ │ + ldc2l 4, cr8, [pc, #172] @ 242dbb8 │ │ ldrsbteq r9, [r2], -r8 │ │ - stc2l 7, cr11, [r1, #652]! @ 0x28c │ │ + stc2l 7, cr11, [r1, #832]! @ 0x340 │ │ @ instruction: 0x019a29fc │ │ - stc2l 8, cr7, [r0, #748]! @ 0x2ec │ │ - ldc2l 3, cr8, [pc, #152] @ 242dbb8 │ │ + vcmla.f16 , q8, q12, #270 │ │ + ldc2l 3, cr8, [pc, #332] @ 242dc6c │ │ orrseq r7, r6, r0, lsl #18 │ │ - stc2l 10, cr3, [r1, #628]! @ 0x274 @ │ │ - ldc2l 2, cr8, [pc, #904] @ 242deb4 │ │ + stc2l 10, cr3, [r1, #808]! @ 0x328 @ │ │ + ldc2l 3, cr8, [pc, #60] @ 242db68 │ │ orrseq r2, r6, r0, lsr #16 │ │ orrseq r2, r6, r8, lsr #17 │ │ - stc2l 5, cr7, [r1, #232]! @ 0xe8 │ │ - ldc2l 2, cr8, [pc, #648] @ 242ddc4 │ │ + stc2l 5, cr7, [r1, #412]! @ 0x19c │ │ + ldc2l 2, cr8, [pc, #828] @ 242de78 │ │ orrseq ip, r6, r8, ror #13 │ │ - stc2l 9, cr3, [r1, #466]! @ 0x1d2 @ │ │ - ldc2l 2, cr8, [pc, #184] @ 242dc00 │ │ - ldc2l 10, cr5, [lr, #556] @ 0x22c @ │ │ + stc2l 10, cr3, [r1, #88]! @ 0x58 @ │ │ + ldc2l 2, cr8, [pc, #364] @ 242dcb4 │ │ + ldc2l 10, cr5, [lr, #736] @ 0x2e0 @ │ │ orrseq r2, r6, ip, asr r7 │ │ @ instruction: 0x019627b0 │ │ - stc2l 4, cr7, [r1, #392]! @ 0x188 │ │ - ldc2l 1, cr8, [pc, #808] @ 242de84 │ │ + stc2l 4, cr7, [r1, #572]! @ 0x23c │ │ + ldc2l 1, cr8, [pc, #988] @ 242df38 │ │ orrseq ip, r6, ip, lsl #12 │ │ - ldc2l 9, cr5, [lr, #366] @ 0x16e @ │ │ - ldc2l 1, cr8, [pc, #248] @ 242dc60 │ │ + ldc2l 9, cr5, [lr, #456] @ 0x1c8 @ │ │ + ldc2l 1, cr8, [pc, #428] @ 242dd14 │ │ stc2l 15, cr0, [r2, #1000]! @ 0x3e8 │ │ - ldc2l 14, cr15, [pc, #888] @ 242dee8 │ │ + ldc2l 15, cr15, [pc, #44] @ 242db9c │ │ orrseq r2, sl, r8, lsl r4 │ │ orrseq r2, sl, ip, lsr #9 │ │ orrseq r2, sl, r0, asr #8 │ │ eorseq r9, r2, ip, lsl #17 │ │ orrseq r2, sl, r0, lsr #1 │ │ orrseq ip, r6, r4, lsl #9 │ │ orrseq r3, sp, r8, asr #8 │ │ orrseq r2, sl, r8, lsl r0 │ │ - stc2l 9, cr15, [r0, #134]! @ 0x86 @ │ │ - ldc2l 0, cr8, [pc, #104] @ 242dc00 │ │ + stc2l 9, cr15, [r0, #224]! @ 0xe0 @ │ │ + ldc2l 0, cr8, [pc, #284] @ 242dcb4 │ │ ldrshteq r9, [r2], -r8 │ │ orrseq r2, sl, ip │ │ - ldc2l 15, cr7, [pc, #876] @ 242df10 │ │ + ldc2l 0, cr8, [pc, #32] @ 242dbc4 │ │ stc2l 10, cr2, [r2, #592]! @ 0x250 @ │ │ orrseq r1, sl, ip, ror pc │ │ - ldc2l 15, cr7, [pc, #648] @ 242de38 │ │ + ldc2l 15, cr7, [pc, #828] @ 242deec │ │ orrseq ip, r6, r0, lsr #7 │ │ orrseq r3, sp, ip, asr #6 │ │ orrseq r3, sp, r4, ror r3 │ │ - stc2l 3, cr13, [r1, #144]! @ 0x90 │ │ - ldc2l 4, cr8, [pc, #808] @ 242deec │ │ + stc2l 3, cr13, [r1, #324]! @ 0x144 │ │ + ldc2l 4, cr8, [pc, #988] @ 242dfa0 │ │ orrseq r2, r6, r4, ror #23 │ │ - stc2l 6, cr3, [r1, #676]! @ 0x2a4 │ │ - ldc2l 14, cr7, [pc, #952] @ 242df88 │ │ + stc2l 6, cr3, [r1, #856]! @ 0x358 │ │ + ldc2l 15, cr7, [pc, #108] @ 242dc3c │ │ orrseq r2, r6, ip, lsl #8 │ │ - ldc2l 7, cr5, [lr, #28] │ │ + ldc2l 7, cr5, [lr, #208] @ 0xd0 │ │ orrseq r2, r6, r0, asr r4 │ │ stc2l 13, cr0, [r2, #56]! @ 0x38 │ │ - ldc2l 11, cr15, [pc, #968] @ 242dfac @ │ │ + ldc2l 12, cr15, [pc, #124] @ 242dc60 │ │ orrseq r2, sl, ip, lsr #2 │ │ orrseq r2, sl, r8, lsl #15 │ │ orrseq r2, sl, r4, asr r1 │ │ mlaseq r2, ip, r5, r9 │ │ @ instruction: 0x019a1db0 │ │ @ instruction: 0x0196c190 │ │ orrseq r3, sp, r4, asr r1 │ │ orrseq r1, sl, r4, lsr #26 │ │ - stc2l 6, cr15, [r0, #380]! @ 0x17c │ │ - ldc2l 13, cr7, [pc, #216] @ 242dce4 │ │ + stc2l 6, cr15, [r0, #560]! @ 0x230 │ │ + ldc2l 13, cr7, [pc, #396] @ 242dd98 │ │ eorseq r9, r2, r4, lsl r5 │ │ orrseq r1, sl, r8, lsr #26 │ │ - ldc2l 12, cr7, [pc, #988] @ 242dff4 │ │ + ldc2l 13, cr7, [pc, #144] @ 242dca8 │ │ stc2l 7, cr2, [r2, #688]! @ 0x2b0 │ │ @ instruction: 0x019a1c94 │ │ - ldc2l 12, cr7, [pc, #760] @ 242df1c │ │ + ldc2l 12, cr7, [pc, #940] @ 242dfd0 │ │ ldrheq ip, [r6, ip] │ │ orrseq r3, sp, r4, rrx │ │ - ldc2l 11, cr1, [pc, #832] @ 242df70 @ │ │ + ldc2l 11, cr1, [pc, #1012] @ 242e024 @ │ │ orrseq ip, r6, r8, rrx │ │ - ldc2l 10, cr8, [pc, #124] @ 242dcb4 @ │ │ - ldc2l 10, cr8, [pc, #136] @ 242dcc4 @ │ │ - ldc2l 10, cr8, [pc, #72] @ 242dc88 @ │ │ + ldc2l 10, cr8, [pc, #304] @ 242dd68 @ │ │ + ldc2l 10, cr8, [pc, #316] @ 242dd78 @ │ │ + ldc2l 10, cr8, [pc, #252] @ 242dd3c @ │ │ @ instruction: 0x019a29bc │ │ @ instruction: 0x019d3db4 │ │ - ldc2l 9, cr2, [pc, #120] @ 242dcc4 @ │ │ + ldc2l 9, cr2, [pc, #210] @ 242dd1e @ │ │ │ │ 0242dc48 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 242dc64 │ │ @@ -1283707,16 +1283706,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 9, cr13, [lr, #328] @ 0x148 @ │ │ - stc2l 7, cr12, [r1, #884]! @ 0x374 │ │ + ldc2l 9, cr13, [lr, #418] @ 0x1a2 @ │ │ + vcmla.f16 d28, d1, d10, #270 │ │ │ │ 0242dca4 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #24 │ │ mov r3, r1 │ │ mov r1, r0 │ │ @@ -1284825,15 +1284824,15 @@ │ │ cmp r0, #0 │ │ beq 24317f0 │ │ movw r0, #26003 @ 0x6593 │ │ str r0, [r6] │ │ ldr r0, [pc, #3792] @ 242fcc0 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ - ldc2l 6, cr15, [pc, #180] @ 242eeb0 │ │ + ldc2l 6, cr15, [pc, #360] @ 242ef64 │ │ eorseq r9, r2, ip, lsr #32 │ │ adceq r9, r5, #28, 22 @ 0x7000 │ │ rsbeq r1, r6, #52, 30 @ 0xd0 │ │ @ instruction: 0x0324944c │ │ rsceq r1, r5, #164, 14 @ 0x2900000 │ │ movteq r2, #5768 @ 0x1688 │ │ movteq r2, #5836 @ 0x16cc │ │ @@ -1284852,26 +1284851,26 @@ │ │ eorseq r8, r2, r8, asr #30 │ │ eorseq r8, r2, r8, asr #30 │ │ eorseq r8, r2, r4, asr #30 │ │ movteq r2, #5548 @ 0x15ac │ │ orrseq ip, sp, r4, lsr r8 │ │ mvnseq sp, r4, ror #27 │ │ mvneq r9, r4, lsr #10 │ │ - ldc2l 14, cr8, [lr, #476] @ 0x1dc │ │ - ldc2l 6, cr7, [pc, #948] @ 242f220 │ │ + ldc2l 14, cr8, [lr, #656] @ 0x290 │ │ + ldc2l 7, cr7, [pc, #104] @ 242eed4 │ │ mvnseq r4, r4, ror r7 │ │ @ instruction: 0x019dc7d8 │ │ orrseq ip, sp, r8, asr #15 │ │ stc2l 5, cr0, [r2, #340]! @ 0x154 │ │ mvnseq r4, r4, lsl r7 │ │ @ instruction: 0x019dc790 │ │ - ldc2l 4, cr15, [pc, #176] @ 242ef38 │ │ + ldc2l 4, cr15, [pc, #356] @ 242efec │ │ orrseq ip, sp, r8, asr r7 │ │ - stc2l 10, cr4, [r1, #124]! @ 0x7c @ │ │ - stc2l 7, cr8, [r1, #408]! @ 0x198 │ │ + stc2l 10, cr4, [r1, #304]! @ 0x130 @ │ │ + stc2l 7, cr8, [r1, #588]! @ 0x24c │ │ ldrsbteq r8, [r2], -r4 │ │ adceq r9, r5, #196, 16 @ 0xc40000 │ │ rsbeq r1, r6, #220, 24 @ 0xdc00 │ │ @ instruction: 0x032491f4 │ │ rsceq r1, r5, #76, 10 @ 0x13000000 │ │ movteq r2, #5168 @ 0x1430 │ │ movteq r2, #5236 @ 0x1474 │ │ @@ -1285067,29 +1285066,29 @@ │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 242f130 │ │ movteq r2, #4948 @ 0x1354 │ │ movteq r2, #4988 @ 0x137c │ │ stc2l 3, cr0, [r2, #404]! @ 0x194 │ │ - ldc2l 4, cr7, [pc, #580] @ 242f408 │ │ + ldc2l 4, cr7, [pc, #760] @ 242f4bc │ │ mvnseq r4, ip, lsl r5 │ │ movteq r2, #4908 @ 0x132c │ │ stc2l 3, cr0, [r2, #116]! @ 0x74 │ │ - ldc2l 4, cr7, [pc, #292] @ 242f2f8 │ │ + ldc2l 4, cr7, [pc, #472] @ 242f3ac │ │ @ instruction: 0x019dc5b0 │ │ - stc2l 8, cr4, [r1, #108]! @ 0x6c │ │ - ldc2l 4, cr7, [pc, #68] @ 242f224 │ │ + vcmla.f16 q10, , q4, #270 │ │ + ldc2l 4, cr7, [pc, #248] @ 242f2d8 │ │ mvneq r9, r8, lsr #4 │ │ mvnseq r7, r4, lsl #2 │ │ - ldc2l 3, cr7, [pc, #804] @ 242f510 │ │ + ldc2l 3, cr7, [pc, #984] @ 242f5c4 │ │ orrseq ip, sp, ip, lsl r5 │ │ stc2l 2, cr0, [r2, #368]! @ 0x170 │ │ - stc2l 7, cr4, [r1, #348]! @ 0x15c │ │ - ldc2l 2, cr11, [pc, #20] @ 242f210 │ │ + stc2l 7, cr4, [r1, #528]! @ 0x210 │ │ + ldc2l 2, cr11, [pc, #200] @ 242f2c4 │ │ eorseq r8, r2, ip, lsl #22 │ │ adceq r9, r5, #252, 10 @ 0x3f000000 │ │ rsbeq r1, r6, #20, 20 @ 0x14000 │ │ @ instruction: 0x03248f2c │ │ rsceq r1, r5, #132, 4 @ 0x40000008 │ │ movteq r2, #4456 @ 0x1168 │ │ movteq r2, #4524 @ 0x11ac │ │ @@ -1285272,16 +1285271,16 @@ │ │ b 242f514 │ │ mvnseq sp, r4, ror r8 │ │ strheq r8, [pc, #248] @ 242f5dc │ │ ldrheq r6, [pc, #224] @ 242f5c8 │ │ mvnseq r4, r4, lsl r2 │ │ movteq r2, #4112 @ 0x1010 │ │ movteq fp, #9840 @ 0x2670 │ │ - ldc2l 0, cr11, [pc, #52] @ 242f52c │ │ - ldc2l 11, cr4, [pc, #360] @ 242f664 @ │ │ + ldc2l 0, cr11, [pc, #232] @ 242f5e0 │ │ + ldc2l 11, cr4, [pc, #540] @ 242f718 @ │ │ ldr r0, [fp, #-72] @ 0xffffffb8 │ │ add r1, r7, r1, lsl #5 │ │ ldr r2, [fp, #80] @ 0x50 │ │ mov r3, #32 │ │ bl 270d960 │ │ cmp r0, #0 │ │ beq 24328a8 │ │ @@ -1285308,40 +1285307,40 @@ │ │ mov r2, r5 │ │ movw r3, #4576 @ 0x11e0 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 242f4f8 │ │ movteq r1, #8108 @ 0x1fac │ │ - stc2l 10, cr14, [r0, #260]! @ 0x104 @ │ │ - ldc2l 14, cr2, [pc, #388] @ 242f710 │ │ + stc2l 10, cr14, [r0, #440]! @ 0x1b8 @ │ │ + ldc2l 14, cr2, [pc, #568] @ 242f7c4 │ │ ldrhteq r8, [r2], -r8 │ │ - ldc2l 13, cr12, [pc, #144] @ 242f624 │ │ + ldc2l 13, cr12, [pc, #324] @ 242f6d8 │ │ movteq r1, #8040 @ 0x1f68 │ │ - stc2l 12, cr2, [r0, #1008]! @ 0x3f0 │ │ - ldc2l 0, cr13, [lr, #84] @ 0x54 │ │ - ldc2l 10, cr4, [pc, #712] @ 242f86c @ │ │ - stc2l 10, cr4, [r0, #304]! @ 0x130 @ │ │ - stc2l 4, cr4, [r1, #216]! @ 0xd8 │ │ + stc2l 13, cr2, [r0, #164]! @ 0xa4 │ │ + ldc2l 0, cr13, [lr, #264] @ 0x108 │ │ + ldc2l 10, cr4, [pc, #892] @ 242f920 @ │ │ + stc2l 10, cr4, [r0, #484]! @ 0x1e4 @ │ │ + stc2l 4, cr4, [r1, #396]! @ 0x18c │ │ movteq r1, #7884 @ 0x1ecc │ │ ldrshteq r8, [r2], -ip │ │ orrseq ip, sp, r8, asr r1 │ │ - ldc2l 13, cr10, [pc, #416] @ 242f75c │ │ - ldc2l 7, cr8, [lr, #92] @ 0x5c │ │ + ldc2l 13, cr10, [pc, #596] @ 242f810 │ │ + ldc2l 7, cr8, [lr, #272] @ 0x110 │ │ movteq r1, #7748 @ 0x1e44 │ │ - ldc2l 11, cr10, [pc, #668] @ 242f864 @ │ │ - stc2l 9, cr4, [r0, #224]! @ 0xe0 @ │ │ - vcmla.f16 d26, d16, d9, #270 │ │ + ldc2l 11, cr10, [pc, #848] @ 242f918 @ │ │ + stc2l 9, cr4, [r0, #314]! @ 0x13a @ │ │ + stc2l 8, cr10, [r0, #728]! @ 0x2d8 │ │ movteq r1, #7648 @ 0x1de0 │ │ - stc2l 8, cr14, [r0, #468]! @ 0x1d4 │ │ - ldc2l 12, cr2, [pc, #596] @ 242f830 │ │ + vcmla.f16 d30, d16, d18, #270 │ │ + ldc2l 12, cr2, [pc, #776] @ 242f8e4 │ │ eorseq r8, r2, ip, ror #13 │ │ - ldc2l 11, cr12, [pc, #352] @ 242f744 @ │ │ + ldc2l 11, cr12, [pc, #532] @ 242f7f8 @ │ │ movteq r1, #7580 @ 0x1d9c │ │ - stc2l 11, cr2, [r0, #192]! @ 0xc0 @ │ │ + stc2l 11, cr2, [r0, #372]! @ 0x174 @ │ │ bl 270ce10 │ │ cmp r0, #0 │ │ bne 2433b5c │ │ ldr r0, [pc, #3592] @ 2430404 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce20 │ │ @@ -1285456,17 +1285455,17 @@ │ │ beq 24318b0 │ │ ldr r1, [fp, #76] @ 0x4c │ │ mov r0, sl │ │ bl 270e9d0 │ │ ldr r0, [pc, #4040] @ 2430794 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ - ldc2l 14, cr12, [lr, #292] @ 0x124 │ │ - stc2l 7, cr10, [r0, #900]! @ 0x384 │ │ - stc2l 1, cr6, [r1, #60]! @ 0x3c │ │ + ldc2l 14, cr12, [lr, #472] @ 0x1d8 │ │ + vcmla.f16 d26, d0, d14, #270 │ │ + stc2l 1, cr6, [r1, #240]! @ 0xf0 │ │ eorseq r8, r2, ip, asr r6 │ │ rsbeq r1, r6, #108, 10 @ 0x1b000000 │ │ @ instruction: 0x03248a84 │ │ rsceq r0, r5, #220, 26 @ 0x3700 │ │ movteq r1, #7360 @ 0x1cc0 │ │ movteq r1, #7428 @ 0x1d04 │ │ teqeq r4, #108, 18 @ 0x1b0000 │ │ @@ -1285483,22 +1285482,22 @@ │ │ @ instruction: 0x019dbefc │ │ eorseq r8, r2, ip, ror r5 │ │ eorseq r8, r2, r8, ror r5 │ │ eorseq r8, r2, r8, ror r5 │ │ eorseq r8, r2, r4, ror r5 │ │ movteq r1, #7176 @ 0x1c08 │ │ stc2l 11, cr15, [r1, #964]! @ 0x3c4 @ │ │ - ldc2l 13, cr6, [pc, #116] @ 242f8b8 │ │ + ldc2l 13, cr6, [pc, #296] @ 242f96c │ │ mvnseq r3, r8, lsr #27 │ │ movteq r1, #7096 @ 0x1bb8 │ │ stc2l 11, cr15, [r1, #676]! @ 0x2a4 @ │ │ - ldc2l 12, cr6, [pc, #852] @ 242fba8 │ │ + ldc2l 13, cr6, [pc, #8] @ 242f85c │ │ orrseq fp, sp, r4, asr sp │ │ - stc2l 0, cr4, [r1, #652]! @ 0x28c │ │ - ldc2l 12, cr6, [pc, #612] @ 242fac4 │ │ + stc2l 0, cr4, [r1, #832]! @ 0x340 │ │ + ldc2l 12, cr6, [pc, #792] @ 242fb78 │ │ mvneq r8, ip, lsr #21 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ bne 2433b5c │ │ ldr r0, [pc, #3876] @ 2430798 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ @@ -1285599,15 +1285598,15 @@ │ │ str r1, [r0] │ │ mov r0, #1 │ │ ldr r4, [pc, #3584] @ 2430800 │ │ ldr r5, [fp, #-72] @ 0xffffffb8 │ │ add r4, pc, r4 │ │ b 242fa3c │ │ mvnseq r6, ip, lsl #19 │ │ - ldc2l 12, cr6, [pc, #324] @ 242fb58 │ │ + ldc2l 12, cr6, [pc, #504] @ 242fc0c │ │ @ instruction: 0x019dbcbc │ │ stc2l 10, cr15, [r1, #912]! @ 0x390 @ │ │ ldr r1, [pc, #3556] @ 2430804 │ │ ldr r1, [pc, r1] │ │ ldr r2, [pc, #3552] @ 2430808 │ │ add r0, r1, #1 │ │ add r2, pc, r2 │ │ @@ -1285628,16 +1285627,16 @@ │ │ ldr r0, [pc, #3496] @ 2430814 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ str r0, [r4] │ │ cmp r0, #1 │ │ bge 242fb0c │ │ b 242fa18 │ │ - stc2l 15, cr3, [r1, #892]! @ 0x37c │ │ - stc2l 14, cr5, [r1, #256]! @ 0x100 │ │ + stc2l 0, cr4, [r1, #48]! @ 0x30 │ │ + stc2l 14, cr5, [r1, #436]! @ 0x1b4 │ │ mlaseq r2, r4, r3, r8 │ │ rsbeq r1, r6, #156, 4 @ 0xc0000009 │ │ @ instruction: 0x032487b4 │ │ rsceq r0, r5, #252, 20 @ 0xfc000 │ │ movteq r1, #6648 @ 0x19f8 │ │ movteq r1, #6716 @ 0x1a3c │ │ teqeq r4, #160, 12 @ 0xa000000 │ │ @@ -1285654,15 +1285653,15 @@ │ │ orrseq fp, sp, ip, lsr #24 │ │ eorseq r8, r2, ip, lsr #5 │ │ eorseq r8, r2, r8, lsr #5 │ │ eorseq r8, r2, r8, lsr #5 │ │ eorseq r8, r2, r4, lsr #5 │ │ movteq r1, #6456 @ 0x1938 │ │ stc2l 9, cr15, [r1, #66]! @ 0x42 @ │ │ - ldc2l 10, cr6, [pc, #308] @ 242fc24 @ │ │ + ldc2l 10, cr6, [pc, #488] @ 242fcd8 @ │ │ ldrsbeq r3, [ip, #168]! @ 0xa8 │ │ movteq r1, #6376 @ 0x18e8 │ │ ldr r0, [pc, #3976] @ 2430a84 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ str r0, [r4] │ │ cmp r0, #0 │ │ @@ -1285750,37 +1285749,37 @@ │ │ ldr r2, [pc, #4012] @ 2430c00 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 242faf4 │ │ stc2l 8, cr15, [r1, #868]! @ 0x364 │ │ - ldc2l 10, cr6, [pc, #20] @ 242fc84 @ │ │ + ldc2l 10, cr6, [pc, #200] @ 242fd38 @ │ │ bl 270ce10 │ │ cmp r0, #0 │ │ bne 2433b5c │ │ ldr r0, [pc, #3972] @ 2430c04 │ │ mov r2, r4 │ │ ldr r1, [fp, #72] @ 0x48 │ │ add r0, pc, r0 │ │ bl 270e9e0 │ │ b 2433b5c │ │ orrseq fp, sp, r4, lsl #21 │ │ - stc2l 13, cr3, [r1, #860]! @ 0x35c │ │ - ldc2l 9, cr6, [pc, #410] @ 242fe3a @ │ │ + stc2l 14, cr3, [r1, #16]! │ │ + ldc2l 9, cr6, [pc, #500] @ 242fe94 @ │ │ mvneq r8, r0, ror #15 │ │ mvnseq r6, r0, asr #13 │ │ - ldc2l 9, cr6, [pc, #266] @ 242fdb6 @ │ │ + ldc2l 9, cr6, [pc, #356] @ 242fe10 @ │ │ @ instruction: 0x019db9f0 │ │ stc2l 8, cr15, [r1, #96]! @ 0x60 │ │ orrseq fp, sp, r0, asr #19 │ │ - stc2l 13, cr3, [r1, #44]! @ 0x2c │ │ - ldc2l 3, cr4, [pc, #196] @ 242fd84 │ │ - ldc2l 10, cr10, [lr, #636] @ 0x27c @ │ │ - ldc2l 2, cr4, [pc, #948] @ 243007c │ │ + stc2l 13, cr3, [r1, #224]! @ 0xe0 │ │ + ldc2l 3, cr4, [pc, #376] @ 242fe38 │ │ + ldc2l 10, cr10, [lr, #816] @ 0x330 @ │ │ + ldc2l 3, cr4, [pc, #104] @ 242fd30 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ bne 2433b5c │ │ ldr r0, [pc, #4036] @ 2430c9c │ │ mov r1, #6 │ │ ldr r8, [fp, #12] │ │ add r0, pc, r0 │ │ @@ -1285889,15 +1285888,15 @@ │ │ cmp r0, #0 │ │ bne 242fe4c │ │ ldr r0, [pc, #4076] @ 2430e74 │ │ ldr r0, [pc, r0] │ │ add r0, r0, #1 │ │ str r0, [r9] │ │ b 242fe4c │ │ - ldc2l 7, cr8, [pc, #992] @ 243027c │ │ + vcadd.f32 d24, d15, d21, #270 │ │ eorseq r7, r2, r4, lsr #31 │ │ rsbeq r0, r6, #172, 28 @ 0xac0 │ │ @ instruction: 0x032483c4 │ │ rsceq r0, r5, #12, 14 @ 0x300000 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ bne 2433b5c │ │ @@ -1285985,28 +1285984,28 @@ │ │ add r0, pc, r0 │ │ mov r1, #17 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3808] @ 2430eec │ │ add r0, pc, r0 │ │ b 2433b54 │ │ stc2l 5, cr15, [r1, #212]! @ 0xd4 │ │ - ldc2l 6, cr6, [pc, #388] @ 24301a0 │ │ + ldc2l 6, cr6, [pc, #568] @ 2430254 │ │ mvnseq r3, ip, ror #13 │ │ movteq r1, #5372 @ 0x14fc │ │ stc2l 4, cr15, [r1, #948]! @ 0x3b4 │ │ - ldc2l 6, cr6, [pc, #100] @ 2430090 │ │ + ldc2l 6, cr6, [pc, #280] @ 2430144 │ │ @ instruction: 0x019db698 │ │ - stc2l 9, cr3, [r1, #470]! @ 0x1d6 @ │ │ - ldc2l 5, cr6, [pc, #900] @ 24303bc │ │ + stc2l 10, cr3, [r1, #96]! @ 0x60 @ │ │ + ldc2l 6, cr6, [pc, #56] @ 2430070 │ │ strdeq r8, [pc, #56] @ 2430074 │ │ ldrsbeq r6, [pc, #36] @ 2430064 │ │ - ldc2l 5, cr6, [pc, #612] @ 24302a8 │ │ + ldc2l 5, cr6, [pc, #792] @ 243035c │ │ orrseq fp, sp, r8, asr #11 │ │ stc2l 3, cr15, [r1, #960]! @ 0x3c0 │ │ - vcmla.f16 , , , #270 │ │ + stc2l 9, cr3, [r1, #48]! @ 0x30 @ │ │ bl 270ce10 │ │ cmp r0, #0 │ │ bne 2433b5c │ │ ldr r0, [pc, #4024] @ 2431018 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce20 │ │ @@ -1286093,15 +1286092,15 @@ │ │ mov r2, r5 │ │ mov r3, #32 │ │ add r1, pc, r1 │ │ bl 270e9f0 │ │ ldr r0, [pc, #3924] @ 2431114 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ - ldc2l 3, cr12, [lr, #616] @ 0x268 │ │ + ldc2l 3, cr12, [lr, #796] @ 0x31c │ │ eorseq r7, r2, r0, ror #23 │ │ rsbeq r0, r6, #232, 20 @ 0xe8000 │ │ @ instruction: 0x03248000 │ │ rsceq r0, r5, #72, 6 @ 0x20000001 │ │ movteq r1, #4676 @ 0x1244 │ │ movteq r1, #4744 @ 0x1288 │ │ teqeq r4, #236, 28 @ 0xec0 │ │ @@ -1286222,30 +1286221,30 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4072] @ 24313a4 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ movteq r1, #4464 @ 0x1170 │ │ stc2l 1, cr15, [r1, #356]! @ 0x164 │ │ - ldc2l 2, cr6, [pc, #532] @ 24305e4 │ │ + ldc2l 2, cr6, [pc, #712] @ 2430698 │ │ mvnseq r3, r0, lsl r3 │ │ movteq r1, #4384 @ 0x1120 │ │ stc2l 1, cr15, [r1, #68]! @ 0x44 │ │ - ldc2l 2, cr6, [pc, #244] @ 24304d4 │ │ + ldc2l 2, cr6, [pc, #424] @ 2430588 │ │ @ instruction: 0x019db2bc │ │ - stc2l 6, cr3, [r1, #60]! @ 0x3c │ │ - ldc2l 2, cr6, [pc, #20] @ 2430400 │ │ + stc2l 6, cr3, [r1, #240]! @ 0xf0 │ │ + ldc2l 2, cr6, [pc, #200] @ 24304b4 │ │ mvneq r8, r8, lsl r0 │ │ ldrsheq r5, [pc, #228] @ 24304d8 │ │ - ldc2l 1, cr6, [pc, #756] @ 24306ec │ │ + ldc2l 1, cr6, [pc, #936] @ 24307a0 │ │ stc2l 0, cr15, [r1, #560]! @ 0x230 │ │ orrseq fp, sp, r0, lsl #4 │ │ @ instruction: 0x019db1d4 │ │ - stc2l 5, cr3, [r1, #124]! @ 0x7c │ │ - stc2l 9, cr13, [r0, #332]! @ 0x14c @ │ │ + stc2l 5, cr3, [r1, #304]! @ 0x130 │ │ + stc2l 9, cr13, [r0, #422]! @ 0x1a6 @ │ │ eorseq r7, r2, r8, ror #16 │ │ rsbeq r0, r6, #120, 14 @ 0x1e00000 │ │ @ instruction: 0x03247c90 │ │ rsceq pc, r4, #232, 30 @ 0x3a0 │ │ movteq r0, #7884 @ 0x1ecc │ │ movteq r0, #7952 @ 0x1f10 │ │ teqeq r4, #120, 22 @ 0x1e000 │ │ @@ -1286465,16 +1286464,16 @@ │ │ mov r2, r7 │ │ movw r3, #5816 @ 0x16b8 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2430710 │ │ movteq sl, #9220 @ 0x2404 │ │ - stc2l 7, cr13, [r0, #872]! @ 0x368 │ │ - vcmla.f16 , q0, , #270 │ │ + vcmla.f16 d29, d0, d7, #270 │ │ + vcmla.f16 , q0, q15, #270 │ │ ldrshteq r7, [r2], -r0 │ │ rsbeq r0, r6, #0, 10 │ │ @ instruction: 0x03247a18 │ │ rsceq pc, r4, #112, 26 @ 0x1c00 │ │ movteq r0, #7252 @ 0x1c54 │ │ movteq r0, #7320 @ 0x1c98 │ │ teqeq r4, #0, 18 │ │ @@ -1286496,15 +1286495,15 @@ │ │ orrseq sl, sp, r8, ror #27 │ │ orrseq sl, sp, r8, ror #27 │ │ @ instruction: 0x019dadd8 │ │ orrseq sl, sp, r8, asr #27 │ │ @ instruction: 0x019dad94 │ │ orrseq sl, sp, r8, lsl #27 │ │ stc2l 11, cr14, [r1, #4]! @ │ │ - ldc2l 12, cr5, [pc, #180] @ 24308cc │ │ + ldc2l 12, cr5, [pc, #360] @ 2430980 │ │ ldrheq r2, [ip, #200]! @ 0xc8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ bne 2433b5c │ │ ldr r0, [pc, #4092] @ 2431828 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ @@ -1286686,23 +1286685,23 @@ │ │ ldr r0, [pc, #4008] @ 2431a9c │ │ mov r2, r5 │ │ movw r3, #4983 @ 0x1377 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2430a88 │ │ - stc2l 15, cr2, [r1, #412]! @ 0x19c │ │ - ldc2l 11, cr5, [pc, #372] @ 2430c88 @ │ │ + stc2l 15, cr2, [r1, #592]! @ 0x250 │ │ + ldc2l 11, cr5, [pc, #552] @ 2430d3c @ │ │ mvneq r7, r8, ror #18 │ │ - stc2l 5, cr15, [r0, #112]! @ 0x70 │ │ - ldc2l 8, cr9, [lr, #244] @ 0xf4 │ │ + stc2l 5, cr15, [r0, #292]! @ 0x124 │ │ + vcadd.f32 , q7, q13, #270 │ │ orrseq sl, sp, r4, lsr ip │ │ orrseq sl, sp, r8, lsl ip │ │ - stc2l 14, cr2, [r1, #748]! @ 0x2ec │ │ - ldc2l 10, cr5, [pc, #708] @ 2430df4 @ │ │ + stc2l 14, cr2, [r1, #928]! @ 0x3a0 │ │ + ldc2l 10, cr5, [pc, #888] @ 2430ea8 @ │ │ mvneq r7, r4, asr #17 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ bne 2433b5c │ │ ldr r4, [pc, #4060] @ 2431b20 │ │ mov r1, #8 │ │ ldr r8, [fp, #104] @ 0x68 │ │ @@ -1286748,15 +1286747,15 @@ │ │ str r8, [sp] │ │ bl 270e440 │ │ mov r0, r4 │ │ mov r1, #8 │ │ b 2433b58 │ │ @ instruction: 0x019dab98 │ │ stc2l 9, cr14, [r1, #24]! @ │ │ - ldc2l 10, cr5, [pc, #196] @ 2430ccc @ │ │ + ldc2l 10, cr5, [pc, #376] @ 2430d80 @ │ │ movteq r0, #6276 @ 0x1884 │ │ ldr r0, [pc, #3884] @ 2431b3c │ │ ldr r1, [pc, #3884] @ 2431b40 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270e0a0 │ │ ldr r0, [pc, #3872] @ 2431b44 │ │ @@ -1286787,15 +1286786,15 @@ │ │ ldr sl, [pc, #4076] @ 2431c74 │ │ add r6, pc, r6 │ │ ldr r7, [pc, #4072] @ 2431c78 │ │ add r9, pc, r9 │ │ add sl, pc, sl │ │ add r7, pc, r7 │ │ b 2430d20 │ │ - stc2l 4, cr11, [r0, #104]! @ 0x68 │ │ + stc2l 4, cr11, [r0, #284]! @ 0x11c │ │ eorseq r7, r2, r8, lsl #3 │ │ adceq r7, r5, #120, 24 @ 0x7800 │ │ rsbeq r0, r6, #144 @ 0x90 │ │ @ instruction: 0x032475a8 │ │ rsceq pc, r4, #0, 18 │ │ movteq r0, #6116 @ 0x17e4 │ │ movteq r0, #6184 @ 0x1828 │ │ @@ -1286924,26 +1286923,26 @@ │ │ ldr r9, [pc, #4092] @ 2431ea8 │ │ add r6, pc, r6 │ │ ldr r7, [pc, #4088] @ 2431eac │ │ add r4, pc, r4 │ │ add r9, pc, r9 │ │ add r7, pc, r7 │ │ b 2430f28 │ │ - ldc2l 0, cr3, [lr, #128] @ 0x80 │ │ - stc2l 5, cr10, [r1, #500]! @ 0x1f4 │ │ - stc2l 14, cr0, [r1, #968]! @ 0x3c8 │ │ + ldc2l 0, cr3, [lr, #308] @ 0x134 │ │ + stc2l 5, cr10, [r1, #680]! @ 0x2a8 │ │ + stc2l 15, cr0, [r1, #124]! @ 0x7c │ │ movteq r0, #5572 @ 0x15c4 │ │ - stc2l 0, cr13, [r0, #356]! @ 0x164 │ │ - ldc2l 4, cr1, [pc, #484] @ 24310c0 │ │ + stc2l 0, cr13, [r0, #536]! @ 0x218 │ │ + ldc2l 4, cr1, [pc, #664] @ 2431174 │ │ ldrsbteq r6, [r2], -r0 │ │ - ldc2l 3, cr11, [pc, #240] @ 2430fd4 │ │ + ldc2l 3, cr11, [pc, #420] @ 2431088 │ │ movteq r0, #5504 @ 0x1580 │ │ - stc2l 3, cr1, [r0, #80]! @ 0x50 │ │ - ldc2l 6, cr11, [lr, #180] @ 0xb4 │ │ - stc2l 14, cr0, [r1, #296]! @ 0x128 │ │ + stc2l 3, cr1, [r0, #260]! @ 0x104 │ │ + ldc2l 6, cr11, [lr, #360] @ 0x168 │ │ + stc2l 14, cr0, [r1, #476]! @ 0x1dc │ │ ldr r0, [pc, #4036] @ 2431ebc │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4032] @ 2431ec0 │ │ add r0, r0, #1 │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ ldr r0, [pc, #4084] @ 2431f04 │ │ @@ -1287010,15 +1287009,15 @@ │ │ mov r2, #1 │ │ add r1, pc, r1 │ │ bl 270da90 │ │ ldr r0, [pc, #3884] @ 2431f3c │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ b 24310bc │ │ - stc2l 0, cr3, [r0, #232]! @ 0xe8 │ │ + stc2l 0, cr3, [r0, #412]! @ 0x19c │ │ eorseq r6, r2, r4, lsl #28 │ │ rsbeq pc, r5, #20, 26 @ 0x500 │ │ @ instruction: 0x0324722c │ │ rsceq pc, r4, #132, 10 @ 0x21000000 │ │ movteq r0, #5224 @ 0x1468 │ │ movteq r0, #5292 @ 0x14ac │ │ ldr r0, [pc, #3844] @ 2431f40 │ │ @@ -1287073,16 +1287072,16 @@ │ │ orrseq sl, sp, r4, lsr #13 │ │ eorseq r6, r2, r4, lsr #26 │ │ eorseq r6, r2, r0, lsr #26 │ │ eorseq r6, r2, r0, lsr #26 │ │ eorseq r6, r2, ip, lsl sp │ │ adceq r7, r5, #252, 14 @ 0x3f00000 │ │ adceq r7, r5, #208, 14 @ 0x3400000 │ │ - stc2l 14, cr2, [r0, #888]! @ 0x378 │ │ - stc2l 14, cr12, [r0, #388]! @ 0x184 │ │ + stc2l 15, cr2, [r0, #44]! @ 0x2c │ │ + stc2l 14, cr12, [r0, #568]! @ 0x238 │ │ eorseq r6, r2, r0, lsr ip │ │ adceq r7, r5, #32, 14 @ 0x800000 │ │ rsbeq pc, r5, #56, 22 @ 0xe000 │ │ ldr r7, [pc, #3636] @ 2431f64 │ │ ldr r0, [pc, #3636] @ 2431f68 │ │ ldr r1, [pc, #3636] @ 2431f6c │ │ add r7, pc, r7 │ │ @@ -1287179,16 +1287178,16 @@ │ │ mvnseq r2, r4, lsl #8 │ │ @ instruction: 0x019da4d0 │ │ eorseq r6, r2, r0, asr fp │ │ eorseq r6, r2, ip, asr #22 │ │ eorseq r6, r2, ip, asr #22 │ │ eorseq r6, r2, r8, asr #22 │ │ adceq r7, r5, #28, 12 @ 0x1c00000 │ │ - stc2l 2, cr10, [r1, #832]! @ 0x340 │ │ - ldc2l 11, cr2, [pc, #148] @ 243135c @ │ │ + stc2l 2, cr10, [r1, #1012]! @ 0x3f4 │ │ + ldc2l 11, cr2, [pc, #328] @ 2431410 @ │ │ ldr r0, [pc, #3788] @ 2432198 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ movw r0, #26003 @ 0x6593 │ │ cmp r1, r0 │ │ bcc 24312f8 │ │ ldr r0, [pc, #3768] @ 243219c │ │ @@ -1287236,16 +1287235,16 @@ │ │ ldr r5, [pc, #4084] @ 2432380 │ │ add r8, pc, r8 │ │ add sl, pc, sl │ │ movt r4, #12 │ │ add r5, pc, r5 │ │ mov r9, #10 │ │ b 24313c0 │ │ - stc2l 15, cr0, [r0, #348]! @ 0x15c │ │ - stc2l 12, cr12, [r0, #884]! @ 0x374 │ │ + stc2l 15, cr0, [r0, #528]! @ 0x210 │ │ + stc2l 13, cr12, [r0, #40]! @ 0x28 │ │ ldr r0, [sl, r1, lsl #2] │ │ ldr r1, [pc, #4048] @ 2432384 │ │ add r1, pc, r1 │ │ cmp r0, #0 │ │ str r0, [r1] │ │ ble 243288c │ │ ldr r6, [fp, #20] │ │ @@ -1287278,15 +1287277,15 @@ │ │ ldr r0, [pc, #3936] @ 2432394 │ │ mov r2, r5 │ │ movw r3, #2299 @ 0x8fb │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24313a8 │ │ - ldc2l 0, cr13, [pc, #160] @ 24314f0 │ │ + ldc2l 0, cr13, [pc, #340] @ 24315a4 │ │ eorseq r6, r2, r0, lsl #20 │ │ rsbeq pc, r5, #8, 18 @ 0x20000 │ │ @ instruction: 0x03246e20 │ │ rsceq pc, r4, #104, 2 │ │ movteq r0, #4196 @ 0x1064 │ │ movteq r0, #4264 @ 0x10a8 │ │ ldr r0, [pc, #3884] @ 2432398 │ │ @@ -1287325,15 +1287324,15 @@ │ │ @ instruction: 0x019da2dc │ │ mvnseq r2, ip, asr #3 │ │ @ instruction: 0x019da298 │ │ eorseq r6, r2, r8, lsl r9 │ │ eorseq r6, r2, r4, lsl r9 │ │ eorseq r6, r2, r4, lsl r9 │ │ eorseq r6, r2, r0, lsl r9 │ │ - ldc2l 12, cr8, [lr, #240] @ 0xf0 │ │ + ldc2l 12, cr8, [lr, #420] @ 0x1a4 │ │ ldr r0, [pc, #3740] @ 24323ac │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ movw r0, #26003 @ 0x6593 │ │ cmp r1, r0 │ │ bcc 243153c │ │ ldr r0, [pc, #3720] @ 24323b0 │ │ @@ -1287377,15 +1287376,15 @@ │ │ add r5, pc, r5 │ │ add r8, pc, r8 │ │ mov r4, #10 │ │ add r9, pc, r9 │ │ b 24315f0 │ │ movteq pc, #3952 @ 0xf70 @ │ │ stc2l 15, cr13, [r1, #356]! @ 0x164 │ │ - ldc2l 0, cr5, [pc, #532] @ 24317f0 │ │ + ldc2l 0, cr5, [pc, #712] @ 24318a4 │ │ mvnseq r2, r0, lsl r1 │ │ movteq pc, #3872 @ 0xf20 @ │ │ ldr r0, [r5, r1, lsl #2] │ │ str r0, [r6] │ │ cmp r0, #0 │ │ ble 2433070 │ │ ldr r1, [fp, #20] │ │ @@ -1287403,24 +1287402,24 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24315e0 │ │ ldr r5, [pc, #3944] @ 243259c │ │ add r5, pc, r5 │ │ b 24316f4 │ │ stc2l 15, cr13, [r1, #68]! @ 0x44 │ │ - ldc2l 0, cr5, [pc, #244] @ 2431738 │ │ + ldc2l 0, cr5, [pc, #424] @ 24317ec │ │ ldrheq sl, [sp, ip] │ │ - stc2l 4, cr2, [r1, #60]! @ 0x3c │ │ - ldc2l 0, cr5, [pc, #20] @ 2431664 │ │ + stc2l 4, cr2, [r1, #240]! @ 0xf0 │ │ + ldc2l 0, cr5, [pc, #200] @ 2431718 │ │ mvneq r6, r8, lsl lr │ │ ldrsheq r4, [pc, #200] @ 2431720 │ │ - ldc2l 15, cr4, [pc, #772] @ 2431960 │ │ + ldc2l 15, cr4, [pc, #952] @ 2431a14 │ │ orrseq r9, sp, r8, ror #31 │ │ stc2l 14, cr13, [r1, #64]! @ 0x40 │ │ - stc2l 3, cr2, [r1, #44]! @ 0x2c │ │ + stc2l 3, cr2, [r1, #224]! @ 0xe0 │ │ add r0, sp, #32 │ │ str sl, [sp, #48] @ 0x30 │ │ stm r0, {r6, r9, sl} │ │ mov r0, #80 @ 0x50 │ │ mov r1, r7 │ │ str r0, [sp, #44] @ 0x2c │ │ str r8, [sp] │ │ @@ -1287526,15 +1287525,15 @@ │ │ beq 2433af4 │ │ movw r0, #6784 @ 0x1a80 │ │ movt r0, #6 │ │ str r0, [r6] │ │ ldr r0, [pc, #3812] @ 2432708 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ - stc2l 6, cr0, [r1, #124]! @ 0x7c │ │ + stc2l 6, cr0, [r1, #304]! @ 0x130 │ │ ldr r0, [pc, #3800] @ 243270c │ │ add r0, pc, r0 │ │ b 2432b60 │ │ eorseq r6, r2, r8, lsr r6 │ │ rsbeq pc, r5, #64, 10 @ 0x10000000 │ │ @ instruction: 0x03246a58 │ │ rsceq lr, r4, #160, 26 @ 0x2800 │ │ @@ -1287579,22 +1287578,22 @@ │ │ @ instruction: 0x019d9ed0 │ │ eorseq r6, r2, r0, asr r5 │ │ eorseq r6, r2, ip, asr #10 │ │ eorseq r6, r2, ip, asr #10 │ │ eorseq r6, r2, r8, asr #10 │ │ movteq pc, #3012 @ 0xbc4 @ │ │ stc2l 11, cr13, [r1, #692]! @ 0x2b4 @ │ │ - ldc2l 12, cr4, [pc, #868] @ 2431c68 │ │ + ldc2l 13, cr4, [pc, #24] @ 243191c │ │ mvnseq r1, r4, ror #26 │ │ movteq pc, #2932 @ 0xb74 @ │ │ stc2l 11, cr13, [r1, #404]! @ 0x194 @ │ │ - ldc2l 12, cr4, [pc, #580] @ 2431b58 │ │ + ldc2l 12, cr4, [pc, #760] @ 2431c0c │ │ orrseq r9, sp, r0, lsl sp │ │ - stc2l 0, cr2, [r1, #396]! @ 0x18c │ │ - ldc2l 12, cr4, [pc, #356] @ 2431a84 │ │ + stc2l 0, cr2, [r1, #576]! @ 0x240 │ │ + ldc2l 12, cr4, [pc, #536] @ 2431b38 │ │ mvneq r6, ip, ror #20 │ │ str r7, [sp, #32] │ │ mov r1, r4 │ │ ldr r0, [pc, #4088] @ 2432928 │ │ mov r2, r6 │ │ mov r3, r8 │ │ add r0, pc, r0 │ │ @@ -1287664,15 +1287663,15 @@ │ │ ldr r3, [pc, #3872] @ 243295c │ │ add r2, pc, r2 │ │ add r3, pc, r3 │ │ bl 270ea00 │ │ b 2431920 │ │ @ instruction: 0x019d9cbc │ │ mvnseq r4, r4, asr #18 │ │ - ldc2l 12, cr4, [pc, #36] @ 2431a7c │ │ + ldc2l 12, cr4, [pc, #216] @ 2431b30 │ │ ldr r0, [pc, #4076] @ 2432a48 │ │ mov r1, #119 @ 0x77 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #4064] @ 2432a4c │ │ mov r1, r6 │ │ mov r2, #1 │ │ @@ -1287683,15 +1287682,15 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4036] @ 2432a54 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ orrseq r9, sp, r0, ror ip │ │ stc2l 10, cr13, [r1, #608]! @ 0x260 @ │ │ - stc2l 15, cr1, [r1, #588]! @ 0x24c │ │ + stc2l 15, cr1, [r1, #768]! @ 0x300 │ │ ldr r0, [pc, #4016] @ 2432a58 │ │ add r0, pc, r0 │ │ bl 270e960 │ │ ldr r1, [pc, #4008] @ 2432a5c │ │ mov r0, r5 │ │ mov r2, r4 │ │ mov r3, #32 │ │ @@ -1287716,15 +1287715,15 @@ │ │ ldr r9, [pc, #3944] @ 2432a74 │ │ add r6, pc, r6 │ │ ldr sl, [pc, #3940] @ 2432a78 │ │ add r8, pc, r8 │ │ add r9, pc, r9 │ │ add sl, pc, sl │ │ b 2431c00 │ │ - ldc2l 9, cr14, [pc, #30] @ 2431b46 @ │ │ + ldc2l 9, cr14, [pc, #120] @ 2431ba0 @ │ │ teqeq r4, #116, 12 @ 0x7400000 │ │ movteq pc, #2496 @ 0x9c0 @ │ │ @ instruction: 0x019d9bf0 │ │ @ instruction: 0x03246704 │ │ rsbeq pc, r5, #196, 2 @ 0x31 │ │ eorseq r6, r2, r4, lsr #5 │ │ eorseq r6, r2, r4, ror #4 │ │ @@ -1287841,26 +1287840,26 @@ │ │ bne 2431c8c │ │ ldr r0, [pc, #3844] @ 2432c08 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #3840] @ 2432c0c │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ b 2431c8c │ │ - stc2l 9, cr9, [r1, #28]! @ │ │ - ldc2l 9, cr4, [pc, #138] @ 2431daa @ │ │ - ldc2l 6, cr12, [pc, #1012] @ 2432118 │ │ + stc2l 9, cr9, [r1, #118]! @ 0x76 @ │ │ + ldc2l 9, cr4, [pc, #228] @ 2431e04 @ │ │ + ldc2l 7, cr12, [pc, #168] @ 2431dcc │ │ teqeq r4, #52, 8 @ 0x34000000 │ │ orrseq r9, sp, r8, ror #19 │ │ orrseq r9, sp, r0, lsr r9 │ │ - ldc2l 8, cr4, [pc, #588] @ 2431f80 │ │ - ldc2l 0, cr2, [pc, #724] @ 243200c │ │ + vcadd.f32 q10, , q0, #270 │ │ + ldc2l 0, cr2, [pc, #904] @ 24320c0 │ │ @ instruction: 0x019d99b0 │ │ orrseq r9, sp, ip, ror #17 │ │ stc2l 7, cr13, [r1, #28]! │ │ - stc2l 2, cr2, [r0, #292]! @ 0x124 │ │ + stc2l 2, cr2, [r0, #472]! @ 0x1d8 │ │ movteq pc, #1712 @ 0x6b0 @ │ │ ldr r0, [pc, #3776] @ 2432c10 │ │ ldr r0, [pc, r0] │ │ cmp r0, #1 │ │ blt 2431bd0 │ │ sub r1, r0, #1 │ │ cmp r0, r7 │ │ @@ -1287975,28 +1287974,28 @@ │ │ b 2433b48 │ │ orrseq r9, sp, ip, lsl #17 │ │ rsbeq lr, r5, #100, 28 @ 0x640 │ │ teqeq r4, #148, 4 @ 0x40000009 │ │ orrseq r9, sp, r0, lsl #15 │ │ orrseq r9, sp, r4, ror r7 │ │ orrseq r9, sp, r8, asr r8 │ │ - ldc2l 15, cr1, [lr, #852] @ 0x354 │ │ + ldc2l 0, cr2, [lr, #8] │ │ @ instruction: 0x019d97d0 │ │ - ldc2l 14, cr1, [pc, #884] @ 24322b0 │ │ + ldc2l 15, cr1, [pc, #40] @ 2431f64 │ │ eorseq r5, r2, r0, lsl #29 │ │ - stc2l 0, cr14, [r0, #752]! @ 0x2f0 │ │ + stc2l 0, cr14, [r0, #932]! @ 0x3a4 │ │ @ instruction: 0x03246288 │ │ orrseq r9, sp, ip, ror r7 │ │ orrseq r9, sp, r4, asr #13 │ │ stc2l 0, cr15, [r1, #940]! @ 0x3ac │ │ - ldc2l 14, cr1, [pc, #292] @ 243207c │ │ + ldc2l 14, cr1, [pc, #472] @ 2432130 │ │ orrseq r9, sp, r4, asr #14 │ │ orrseq r9, sp, r0, lsl #13 │ │ - stc2l 13, cr15, [r0, #488]! @ 0x1e8 │ │ - stc2l 0, cr10, [r0, #200]! @ 0xc8 │ │ + stc2l 13, cr15, [r0, #668]! @ 0x29c │ │ + stc2l 0, cr10, [r0, #380]! @ 0x17c │ │ mvnseq r4, r4, lsl #5 │ │ movteq pc, #1036 @ 0x40c @ │ │ @ instruction: 0x019d96bc │ │ ldrsbeq r1, [ip, #84]! @ 0x54 │ │ mvnseq sl, r8, lsl ip │ │ andeq r6, r2, #40, 30 @ 0xa0 │ │ andeq r4, r4, #16, 8 @ 0x10000000 │ │ @@ -1288117,34 +1288116,34 @@ │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 2433b84 │ │ ldr r0, [pc, #3920] @ 24330ac │ │ add r0, pc, r0 │ │ b 2433b54 │ │ orrseq r9, sp, ip, lsl #13 │ │ - stc2l 8, cr1, [r1, #972]! @ 0x3cc │ │ - ldc2l 4, cr4, [pc, #932] @ 2432514 │ │ - ldc2l 12, cr5, [lr, #332] @ 0x14c │ │ + stc2l 9, cr1, [r1, #64]! @ 0x40 @ │ │ + ldc2l 5, cr4, [pc, #88] @ 24321c8 │ │ + ldc2l 12, cr5, [lr, #512] @ 0x200 │ │ teqeq r4, #20 │ │ orrseq r9, sp, r8, lsl r6 │ │ rsbeq lr, r5, #160, 22 @ 0x28000 │ │ teqeq r4, #224, 30 @ 0x380 │ │ movteq pc, #840 @ 0x348 @ │ │ rsceq lr, r4, #8, 8 @ 0x8000000 │ │ adceq r6, r5, #96, 14 @ 0x1800000 │ │ @ instruction: 0x03246090 │ │ - stc2l 5, cr5, [r1, #632]! @ 0x278 │ │ - stc2l 5, cr5, [r1, #536]! @ 0x218 │ │ + stc2l 5, cr5, [r1, #812]! @ 0x32c │ │ + stc2l 5, cr5, [r1, #716]! @ 0x2cc │ │ orrseq r9, sp, r0, asr r4 │ │ - ldc2l 1, cr12, [pc, #528] @ 24323b4 │ │ - ldc2l 3, cr4, [pc, #612] @ 243240c │ │ + ldc2l 1, cr12, [pc, #708] @ 2432468 │ │ + ldc2l 3, cr4, [pc, #792] @ 24324c0 │ │ mvnseq sl, ip, ror #20 │ │ @ instruction: 0x019d93f0 │ │ - ldc2l 1, cr12, [pc, #144] @ 2432244 │ │ - ldc2l 3, cr4, [pc, #228] @ 243229c │ │ + ldc2l 1, cr12, [pc, #324] @ 24322f8 │ │ + ldc2l 3, cr4, [pc, #408] @ 2432350 │ │ @ instruction: 0x019d93b4 │ │ ldr r0, [pc, #3824] @ 24330b0 │ │ ldr r0, [pc, r0] │ │ cmp r0, #0 │ │ beq 24322d8 │ │ ldr r8, [pc, #3812] @ 24330b4 │ │ mov r5, #32 │ │ @@ -1288252,31 +1288251,31 @@ │ │ cmp r0, #0 │ │ beq 2433c3c │ │ ldr r0, [pc, #3956] @ 24332e8 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ eorseq r1, r5, #24, 12 @ 0x1800000 │ │ andeq r4, r4, #228, 2 @ 0x39 │ │ - ldc2l 2, cr4, [pc, #964] @ 243274c │ │ + ldc2l 3, cr4, [pc, #120] @ 2432400 │ │ orrseq r9, sp, r8, ror #6 │ │ orrseq r9, sp, ip, lsr r3 │ │ - ldc2l 11, cr1, [lr, #600] @ 0x258 @ │ │ + ldc2l 11, cr1, [lr, #780] @ 0x30c @ │ │ orrseq r9, sp, ip, lsl #6 │ │ - stc2l 12, cr1, [r0, #308]! @ 0x134 │ │ + stc2l 12, cr1, [r0, #488]! @ 0x1e8 │ │ @ instruction: 0x019d92b0 │ │ - ldc2l 15, cr11, [pc, #912] @ 2432734 │ │ - ldc2l 1, cr4, [pc, #996] @ 243278c │ │ + ldc2l 0, cr12, [pc, #68] @ 24323e8 │ │ + ldc2l 2, cr4, [pc, #152] @ 2432440 │ │ mvnseq sl, r8, asr #17 │ │ - ldc2l 2, cr6, [pc, #16] @ 24323c0 │ │ + ldc2l 2, cr6, [pc, #196] @ 2432474 │ │ orrseq r9, sp, ip, lsl #4 │ │ - ldc2l 15, cr11, [pc, #256] @ 24324b8 │ │ - ldc2l 1, cr4, [pc, #340] @ 2432510 │ │ + ldc2l 15, cr11, [pc, #436] @ 243256c │ │ + ldc2l 1, cr4, [pc, #520] @ 24325c4 │ │ mvnseq sl, r4, lsr #16 │ │ @ instruction: 0x019d9290 │ │ - stc2l 7, cr6, [r1, #32]! │ │ + stc2l 7, cr6, [r1, #212]! @ 0xd4 │ │ ldr r0, [pc, #3872] @ 24332ec │ │ ldr r0, [pc, r0] │ │ cmp r0, #0 │ │ beq 24324d4 │ │ ldr r6, [pc, #3860] @ 24332f0 │ │ mov r4, #32 │ │ ldr r3, [pc, #3856] @ 24332f4 │ │ @@ -1288384,16 +1288383,16 @@ │ │ cmp r0, #0 │ │ beq 2433d80 │ │ ldr r0, [pc, #4092] @ 2433580 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ orrseq r9, sp, r0, asr r2 │ │ andeq r3, r4, #184, 30 @ 0x2e0 │ │ - stc2l 10, cr1, [r0, #804]! @ 0x324 @ │ │ - ldc2l 0, cr4, [pc, #772] @ 24328a0 │ │ + stc2l 10, cr1, [r0, #984]! @ 0x3d8 @ │ │ + ldc2l 0, cr4, [pc, #952] @ 2432954 │ │ orrseq r9, sp, r4, lsl r1 │ │ teqeq r4, #184, 22 @ 0x2e000 │ │ mvneq r5, r0, lsr lr │ │ ldrsbeq sl, [sp, #108]! @ 0x6c │ │ andeq r3, r4, #212, 28 @ 0xd40 │ │ eorseq r1, r5, #248, 4 @ 0x8000000f │ │ andeq r6, r2, #204, 18 @ 0x330000 │ │ @@ -1288465,32 +1288464,32 @@ │ │ add r5, pc, r5 │ │ add r7, pc, r7 │ │ sub r8, r1, #4 │ │ b 2432734 │ │ movteq lr, #3692 @ 0xe6c │ │ mvnseq r1, r4, asr #32 │ │ movteq r8, #9416 @ 0x24c8 │ │ - ldc2l 6, cr5, [lr, #1004] @ 0x3ec │ │ + ldc2l 7, cr5, [lr, #160] @ 0xa0 │ │ rsbeq lr, r5, #84, 12 @ 0x5400000 │ │ ldrheq r9, [sp, r8] │ │ rsceq sp, r4, #188, 28 @ 0xbc0 │ │ adceq r6, r5, #12, 4 @ 0xc0000000 │ │ movteq lr, #3524 @ 0xdc4 │ │ @ instruction: 0x03245b28 │ │ - stc2l 2, cr1, [r1, #948]! @ 0x3b4 │ │ - ldc2l 7, cr1, [pc, #4] @ 2432700 │ │ - stc2l 8, cr1, [r0, #836]! @ 0x344 │ │ - stc2l 1, cr3, [r1, #236]! @ 0xec │ │ - stc2l 1, cr3, [r1, #160]! @ 0xa0 │ │ + stc2l 3, cr1, [r1, #104]! @ 0x68 │ │ + ldc2l 7, cr1, [pc, #184] @ 24327b4 │ │ + stc2l 8, cr1, [r0, #1016]! @ 0x3f8 │ │ + stc2l 1, cr3, [r1, #416]! @ 0x1a0 │ │ + stc2l 1, cr3, [r1, #340]! @ 0x154 │ │ stc2l 2, cr11, [r1, #268]! @ 0x10c │ │ - ldc2l 8, cr1, [pc, #740] @ 24329f4 │ │ - ldc2l 14, cr5, [pc, #544] @ 2432934 │ │ - stc2l 2, cr1, [r1, #260]! @ 0x104 │ │ - ldc2l 6, cr1, [pc, #340] @ 2432870 │ │ - vcmla.f16 d17, d0, d21, #270 │ │ + vcadd.f32 , , q11, #270 │ │ + ldc2l 14, cr5, [pc, #724] @ 24329e8 │ │ + stc2l 2, cr1, [r1, #440]! @ 0x1b8 │ │ + ldc2l 6, cr1, [pc, #520] @ 2432924 │ │ + stc2l 8, cr1, [r0, #328]! @ 0x148 │ │ ldr r0, [pc, #4076] @ 2433710 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ str r0, [r6] │ │ cmp r0, #0 │ │ ble 24317d8 │ │ ldr r1, [pc, #4056] @ 2433714 │ │ @@ -1288574,15 +1288573,15 @@ │ │ ldr r0, [pc, #3940] @ 24337d8 │ │ mov r2, r5 │ │ movw r3, #5469 @ 0x155d │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 243271c │ │ - ldc2l 13, cr9, [lr, #600] @ 0x258 │ │ + ldc2l 13, cr9, [lr, #780] @ 0x30c │ │ ldr r0, [pc, #4076] @ 2433880 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ ldrsheq r3, [pc, #172] @ 243294c │ │ strdeq r5, [pc, #176] @ 2432954 │ │ mvnseq sl, r4, lsr #9 │ │ teqeq r4, #28, 18 @ 0x70000 │ │ @@ -1288621,15 +1288620,15 @@ │ │ andeq r3, r4, #60, 24 @ 0x3c00 │ │ eorseq r1, r5, #96 @ 0x60 │ │ andeq r6, r2, #52, 14 @ 0xd00000 │ │ ldrsbeq r0, [sp, #184] @ 0xb8 │ │ movteq r8, #8772 @ 0x2244 │ │ mvnseq r0, r0, lsr #27 │ │ movteq r8, #8740 @ 0x2224 │ │ - ldc2l 4, cr5, [lr, #348] @ 0x15c │ │ + ldc2l 4, cr5, [lr, #528] @ 0x210 │ │ rsbeq lr, r5, #176, 6 @ 0xc0000002 │ │ orrseq r8, sp, r4, lsl lr │ │ rsceq sp, r4, #24, 24 @ 0x1800 │ │ adceq r5, r5, #104, 30 @ 0x1a0 │ │ movteq lr, #2848 @ 0xb20 │ │ @ instruction: 0x03245884 │ │ ldr r0, [pc, #4092] @ 2433964 │ │ @@ -1288686,27 +1288685,27 @@ │ │ movt r9, #12 │ │ ldr r1, [fp, #24] │ │ add r4, pc, r4 │ │ add r8, pc, r8 │ │ mov sl, #10 │ │ sub r7, r1, #8 │ │ b 2432a94 │ │ - stc2l 0, cr1, [r1, #244]! @ 0xf4 │ │ - ldc2l 4, cr1, [pc, #324] @ 2432b98 │ │ - stc2l 6, cr1, [r0, #132]! @ 0x84 │ │ - stc2l 6, cr1, [r0, #164]! @ 0xa4 │ │ + stc2l 0, cr1, [r1, #424]! @ 0x1a8 │ │ + ldc2l 4, cr1, [pc, #504] @ 2432c4c │ │ + stc2l 6, cr1, [r0, #312]! @ 0x138 │ │ + stc2l 6, cr1, [r0, #344]! @ 0x158 │ │ movteq lr, #2660 @ 0xa64 │ │ adceq r5, r5, #196, 28 @ 0xc40 │ │ @ instruction: 0x019d8cd8 │ │ teqeq r4, #20, 14 @ 0x500000 │ │ movteq lr, #2636 @ 0xa4c │ │ orrseq r8, sp, r0, lsl ip │ │ rsbeq lr, r5, #144, 4 │ │ @ instruction: 0x032457ac │ │ - ldc2l 11, cr3, [pc, #436] @ 2432c34 @ │ │ + ldc2l 11, cr3, [pc, #616] @ 2432ce8 @ │ │ ldr r0, [r4, r1, lsl #2] │ │ ldr r1, [pc, #3872] @ 24339a8 │ │ add r1, pc, r1 │ │ cmp r0, #0 │ │ str r0, [r1] │ │ ble 2433e8c │ │ ldr r1, [pc, #3856] @ 24339ac │ │ @@ -1288797,20 +1288796,20 @@ │ │ b 2432c98 │ │ teqeq r4, #248, 10 @ 0x3e000000 │ │ @ instruction: 0x019d8b98 │ │ stc2l 14, cr10, [r1, #48]! @ 0x30 │ │ movteq lr, #2320 @ 0x910 │ │ orrseq r8, sp, r0, lsr #23 │ │ movteq lr, #2200 @ 0x898 │ │ - ldc2l 6, cr15, [pc, #148] @ 2432ca0 │ │ + ldc2l 6, cr15, [pc, #328] @ 2432d54 │ │ orrseq r8, sp, r8, lsl sl │ │ @ instruction: 0x019d8af0 │ │ orrseq r8, sp, ip, lsr #21 │ │ - ldc2l 5, cr15, [pc, #548] @ 2432e40 │ │ - ldc2l 0, cr5, [lr, #508] @ 0x1fc │ │ + ldc2l 5, cr15, [pc, #728] @ 2432ef4 │ │ + ldc2l 0, cr5, [lr, #688] @ 0x2b0 │ │ orrseq r8, sp, r0, lsl sl │ │ stc2l 12, cr10, [r1, #528]! @ 0x210 │ │ movteq lr, #1936 @ 0x790 │ │ orrseq r8, sp, r4, lsr #20 │ │ orrseq r8, sp, r0, lsl sl │ │ @ instruction: 0x019d89b0 │ │ stc2l 12, cr10, [r1, #144]! @ 0x90 │ │ @@ -1288941,21 +1288940,21 @@ │ │ ldr r1, [fp, #16] │ │ b 2432c50 │ │ orrseq r8, sp, r0, asr #19 │ │ movteq lr, #1796 @ 0x704 │ │ teqeq r4, #140, 6 @ 0x30000002 │ │ orrseq r8, sp, r0, lsr #19 │ │ orrseq r8, sp, r4, lsr r9 │ │ - stc2l 7, cr8, [r1, #728]! @ 0x2d8 │ │ - stc2l 1, cr11, [r0, #900]! @ 0x384 │ │ - stc2l 11, cr0, [r1, #820]! @ 0x334 @ │ │ - ldc2l 15, cr0, [pc, #900] @ 24331dc │ │ - stc2l 1, cr1, [r0, #708]! @ 0x2c4 │ │ - stc2l 15, cr14, [r0, #316]! @ 0x13c │ │ - stc2l 10, cr2, [r1, #44]! @ 0x2c @ │ │ + stc2l 7, cr8, [r1, #908]! @ 0x38c │ │ + stc2l 2, cr11, [r0, #56]! @ 0x38 │ │ + stc2l 11, cr0, [r1, #1000]! @ 0x3e8 @ │ │ + ldc2l 0, cr1, [pc, #56] @ 2432e90 │ │ + stc2l 1, cr1, [r0, #888]! @ 0x378 │ │ + stc2l 15, cr14, [r0, #496]! @ 0x1f0 │ │ + stc2l 10, cr2, [r1, #224]! @ 0xe0 @ │ │ eorseq r4, r2, ip, ror #29 │ │ mov r0, r5 │ │ mov r1, #32 │ │ bl 270cf00 │ │ str r0, [fp, #-44] @ 0xffffffd4 │ │ add r6, r5, #192 @ 0xc0 │ │ ldr r0, [pc, #4032] @ 2433e40 │ │ @@ -1289095,15 +1289094,15 @@ │ │ movteq lr, #1128 @ 0x468 │ │ orrseq r8, sp, r8, lsl r7 │ │ andeq r3, r4, #116, 8 @ 0x74000000 │ │ mvnseq r0, ip, lsl r6 │ │ mvnseq r3, ip, lsr #5 │ │ mvneq r5, r0, lsr #7 │ │ mvnseq r9, r4, asr ip │ │ - ldc2l 15, cr0, [pc, #488] @ 243329c │ │ + ldc2l 15, cr0, [pc, #668] @ 2433350 │ │ ldrhteq r4, [r2], -r4 │ │ adceq r5, r5, #164, 14 @ 0x2900000 │ │ rsbeq sp, r5, #188, 22 @ 0x2f000 │ │ @ instruction: 0x032450d4 │ │ rsceq sp, r4, #44, 8 @ 0x2c000000 │ │ movteq lr, #784 @ 0x310 │ │ movteq lr, #852 @ 0x354 │ │ @@ -1289238,15 +1289237,15 @@ │ │ movteq lr, #560 @ 0x230 │ │ orrseq r8, sp, r0, ror #9 │ │ andeq r3, r4, #60, 4 @ 0xc0000003 │ │ mvnseq r0, r4, ror #7 │ │ mvnseq r3, r4, ror r0 │ │ mvneq r5, ip, ror #2 │ │ mvnseq r9, ip, lsl sl │ │ - stc2l 12, cr6, [r0, #372]! @ 0x174 │ │ + stc2l 12, cr6, [r0, #552]! @ 0x228 │ │ eorseq r4, r2, r8, lsr #21 │ │ orrseq r8, sp, r8, lsr #8 │ │ rsbeq sp, r5, #176, 18 @ 0x2c0000 │ │ @ instruction: 0x03244ec8 │ │ rsceq sp, r4, #32, 4 │ │ movteq lr, #260 @ 0x104 │ │ movteq lr, #328 @ 0x148 │ │ @@ -1289404,15 +1289403,15 @@ │ │ add r0, pc, r0 │ │ str r5, [r0] │ │ ldr r2, [pc, #3992] @ 243450c │ │ ldr r2, [pc, r2] │ │ blt 243372c │ │ mov r3, #1 │ │ b 24335a4 │ │ - stc2l 8, cr14, [r0, #840]! @ 0x348 │ │ + stc2l 8, cr14, [r0, #1020]! @ 0x3fc │ │ orrseq r8, sp, ip, asr r1 │ │ mov r6, r3 │ │ ldr r0, [pc, #3964] @ 2434510 │ │ add r3, r6, #1 │ │ cmp r6, sl │ │ add r0, pc, r0 │ │ str r3, [r0] │ │ @@ -1289424,24 +1289423,24 @@ │ │ ldr r0, [pc, #3932] @ 2434518 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, r4 │ │ bcs 24335fc │ │ mov r0, r1 │ │ b 2433630 │ │ - ldc2l 14, cr10, [pc, #576] @ 2433818 │ │ - ldc2l 0, cr3, [pc, #660] @ 2433870 │ │ + ldc2l 14, cr10, [pc, #756] @ 24338cc │ │ + ldc2l 0, cr3, [pc, #840] @ 2433924 │ │ mvnseq r9, r4, ror r7 │ │ orrseq r8, sp, r0, ror #3 │ │ movteq r7, #9584 @ 0x2570 │ │ orrseq r8, sp, ip, asr r1 │ │ orrseq r8, sp, ip, asr #2 │ │ orrseq r8, sp, ip, asr r1 │ │ orrseq r8, sp, r8, asr r1 │ │ - ldc2l 15, cr2, [pc, #820] @ 2433930 │ │ + ldc2l 15, cr2, [pc, #1000] @ 24339e4 │ │ eorseq r0, r5, #228, 4 @ 0x4000000e │ │ ldr r0, [pc, #4064] @ 24345e4 │ │ movw r3, #3146 @ 0xc4a │ │ ldr r2, [pc, #4060] @ 24345e8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1289508,15 +1289507,15 @@ │ │ ldrb r0, [r8, r0] │ │ strb r0, [r1, #-1] │ │ b 243358c │ │ andeq r2, r4, #80, 28 @ 0x500 │ │ orrseq r8, sp, r8, ror r0 │ │ orrseq r8, sp, r0, ror r0 │ │ @ instruction: 0x019d7fb0 │ │ - vcadd.f32 d16, d14, d10, #270 │ │ + ldc2l 8, cr0, [lr, #220] @ 0xdc │ │ orrseq r8, sp, ip, lsr r0 │ │ orrseq r7, sp, r4, ror #30 │ │ mov r0, #39 @ 0x27 │ │ strb r0, [r7, r2] │ │ add r0, r2, #1 │ │ ldr r1, [pc, #4072] @ 2434728 │ │ add r1, pc, r1 │ │ @@ -1289549,20 +1289548,20 @@ │ │ str r0, [sl] │ │ cmp r0, #1 │ │ blt 24337dc │ │ ldr r1, [pc, #3980] @ 2434748 │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ b 24337f8 │ │ - ldc2l 7, cr0, [lr, #760] @ 0x2f8 │ │ + ldc2l 7, cr0, [lr, #940] @ 0x3ac │ │ movteq r7, #9160 @ 0x23c8 │ │ orrseq r7, sp, r8, lsl pc │ │ - ldc2l 7, cr0, [lr, #456] @ 0x1c8 │ │ + ldc2l 7, cr0, [lr, #636] @ 0x27c │ │ orrseq r7, sp, r8, asr #29 │ │ - vcmla.f16 d16, d0, d13, #270 │ │ + stc2l 8, cr0, [r0, #232]! @ 0xe8 │ │ ldr r0, [pc, #3944] @ 243474c │ │ ldr r0, [pc, r0] │ │ cmp r0, #0 │ │ beq 243396c │ │ ldr r1, [pc, #3932] @ 2434750 │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ @@ -1289596,21 +1289595,21 @@ │ │ bne 242e6e0 │ │ ldr r0, [pc, #4048] @ 2434840 │ │ mov r2, #8 │ │ ldr r1, [pc, #4044] @ 2434844 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ b 24338f4 │ │ - stc2l 0, cr2, [r1, #512]! @ 0x200 │ │ + stc2l 0, cr2, [r1, #692]! @ 0x2b4 │ │ orrseq r7, sp, ip, ror #28 │ │ - ldc2l 11, cr10, [pc, #640] @ 2433b10 @ │ │ - ldc2l 13, cr2, [pc, #724] @ 2433b68 │ │ + ldc2l 11, cr10, [pc, #820] @ 2433bc4 @ │ │ + ldc2l 13, cr2, [pc, #904] @ 2433c1c │ │ mvnseq r9, r4, lsl #9 │ │ @ instruction: 0x019d7ef0 │ │ - ldc2l 13, cr8, [lr, #8] │ │ + ldc2l 13, cr8, [lr, #188] @ 0xbc │ │ ldr r0, [pc, #4060] @ 2434880 │ │ add r0, pc, r0 │ │ str r0, [fp, #-56] @ 0xffffffc8 │ │ sub r0, fp, #68 @ 0x44 │ │ bl 270e990 │ │ cmp r0, #0 │ │ str r0, [r5] │ │ @@ -1289654,35 +1289653,35 @@ │ │ bl 270d970 │ │ ldr r0, [pc, #3912] @ 24348a0 │ │ ldr r0, [pc, r0] │ │ cmp r0, #0 │ │ bgt 2433410 │ │ b 24339bc │ │ @ instruction: 0x019d7db4 │ │ - ldc2l 10, cr10, [pc, #928] @ 2433d10 @ │ │ + ldc2l 11, cr10, [pc, #84] @ 24339c4 @ │ │ ldr r1, [pc, #4092] @ 2434970 │ │ mov r0, r6 │ │ mov r2, #2 │ │ mov r3, #1 │ │ add r1, pc, r1 │ │ b 2433800 │ │ - ldc2l 12, cr2, [pc, #1012] @ 2433d80 │ │ + ldc2l 13, cr2, [pc, #168] @ 2433a34 │ │ mvnseq r9, ip, asr #7 │ │ orrseq r7, sp, r8, lsr lr │ │ @ instruction: 0x019d7dd8 │ │ orrseq r7, sp, ip, asr #27 │ │ orrseq r7, sp, r0, ror #27 │ │ orrseq r7, sp, r4, lsl #26 │ │ andeq r2, r4, #60, 22 @ 0xf000 │ │ - ldc2l 12, cr2, [pc, #308] @ 2433ae0 │ │ + ldc2l 12, cr2, [pc, #488] @ 2433b94 │ │ @ instruction: 0x019d7c94 │ │ orrseq r7, sp, r8, lsl sp │ │ orrseq r7, sp, r0, lsl sp │ │ orrseq r7, sp, r8, asr #24 │ │ - ldc2l 4, cr0, [lr, #648] @ 0x288 │ │ + ldc2l 4, cr0, [lr, #828] @ 0x33c │ │ ldr r0, [pc, #4016] @ 2434974 │ │ mov r1, #10 │ │ ldr r0, [pc, r0] │ │ add r1, r1, r0, lsl #1 │ │ movw r0, #52018 @ 0xcb32 │ │ cmp r1, r0 │ │ str r1, [fp, #-48] @ 0xffffffd0 │ │ @@ -1289770,29 +1289769,29 @@ │ │ ldr r0, [pc, #3932] @ 2434a80 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ @ instruction: 0x019d7bf0 │ │ ldr r0, [pc, #3920] @ 2434a84 │ │ add r0, pc, r0 │ │ b 2433b48 │ │ - stc2l 5, cr0, [r0, #260]! @ 0x104 │ │ - ldc2l 10, cr8, [lr, #776] @ 0x308 @ │ │ + stc2l 5, cr0, [r0, #440]! @ 0x1b8 │ │ + ldc2l 10, cr8, [lr, #956] @ 0x3bc @ │ │ ldr r0, [pc, #3904] @ 2434a88 │ │ add r0, pc, r0 │ │ mov r1, #0 │ │ ldr r2, [fp, #28] │ │ str r1, [r2] │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #40 @ 0x28 │ │ vpop {d8} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 2, cr14, [r0, #828]! @ 0x33c │ │ + stc2l 2, cr14, [r0, #1008]! @ 0x3f0 │ │ orrseq r7, sp, ip, ror #23 │ │ movteq sp, #2428 @ 0x97c │ │ @ instruction: 0x032446e0 │ │ orrseq r7, sp, ip, lsr #24 │ │ ldr r7, [pc, #4044] @ 2434b58 │ │ add r7, pc, r7 │ │ mov r0, r7 │ │ @@ -1289907,23 +1289906,23 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3840] @ 2434c50 │ │ ldr r2, [fp, #24] │ │ ldr r0, [pc, r0] │ │ b 2433d10 │ │ stc2l 12, cr9, [r1, #784]! @ 0x310 │ │ - ldc2l 9, cr2, [pc, #18] @ 2433d76 @ │ │ + ldc2l 9, cr2, [pc, #108] @ 2433dd0 @ │ │ movteq sp, #1996 @ 0x7cc │ │ orrseq r7, sp, r8, ror r9 │ │ @ instruction: 0x03244518 │ │ orrseq r7, sp, ip, ror #18 │ │ @ instruction: 0x019d79d0 │ │ orrseq r7, sp, r0, lsr r9 │ │ - ldc2l 4, cr14, [pc, #916] @ 2434114 │ │ - vcadd.f32 q9, , , #270 │ │ + ldc2l 5, cr14, [pc, #72] @ 2433dc8 │ │ + ldc2l 8, cr2, [pc, #616] @ 2433fec │ │ ldr r0, [pc, #3788] @ 2434c54 │ │ add r0, pc, r0 │ │ mov r6, r0 │ │ bl 270e050 │ │ ldr r1, [pc, #3776] @ 2434c58 │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ @@ -1290030,16 +1290029,16 @@ │ │ str r0, [r5] │ │ ble 2434704 │ │ ldr r0, [pc, #4072] @ 2434f24 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ orrseq r7, sp, r4, ror #16 │ │ orrseq r7, sp, r4, asr #15 │ │ - ldc2l 3, cr14, [pc, #484] @ 2434134 │ │ - ldc2l 7, cr2, [pc, #4] @ 2433f58 │ │ + ldc2l 3, cr14, [pc, #664] @ 24341e8 │ │ + ldc2l 7, cr2, [pc, #184] @ 243400c │ │ ldr r0, [pc, #4048] @ 2434f28 │ │ mov r1, #214 @ 0xd6 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ mov r0, r4 │ │ mov r1, r5 │ │ bl 270deb0 │ │ @@ -1290059,26 +1290058,26 @@ │ │ adceq r4, r5, #196, 18 @ 0x310000 │ │ ldr r2, [fp, #20] │ │ mov r1, #0 │ │ ldr r0, [pc, #3972] @ 2434f38 │ │ add r0, pc, r0 │ │ str r1, [r2] │ │ b 2433b4c │ │ - stc2l 1, cr8, [r0, #184]! @ 0xb8 │ │ - stc2l 9, cr1, [r1, #120]! @ 0x78 @ │ │ - ldc2l 6, cr4, [pc, #864] @ 243432c │ │ + stc2l 1, cr8, [r0, #364]! @ 0x16c │ │ + stc2l 9, cr1, [r1, #210]! @ 0xd2 @ │ │ + ldc2l 7, cr4, [pc, #20] @ 2433fe0 │ │ ldr r0, [pc, #3948] @ 2434f3c │ │ mov r1, #0 │ │ ldr r2, [pc, #3944] @ 2434f40 │ │ add r0, pc, r0 │ │ ldr r2, [pc, r2] │ │ cmp r2, #0 │ │ movwgt r1, #1 │ │ b 2433b4c │ │ - stc2l 9, cr1, [r1, #8]! @ │ │ + stc2l 9, cr1, [r1, #98]! @ 0x62 @ │ │ ldr r0, [pc, #4084] @ 2434fe8 │ │ mov r1, #214 @ 0xd6 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ mov r0, r4 │ │ mov r1, r5 │ │ bl 270deb0 │ │ @@ -1290088,17 +1290087,17 @@ │ │ mov r2, #1 │ │ add r0, pc, r0 │ │ bl 270d9f0 │ │ ldr r0, [pc, #4040] @ 2434ff0 │ │ mov r1, #10 │ │ add r0, pc, r0 │ │ b 24317d4 │ │ - stc2l 15, cr8, [r0, #556]! @ 0x22c │ │ + stc2l 15, cr8, [r0, #736]! @ 0x2e0 │ │ orrseq r7, sp, r8, lsl #15 │ │ - ldc2l 4, cr10, [pc, #80] @ 2434090 │ │ + ldc2l 4, cr10, [pc, #260] @ 2434144 │ │ ldr r0, [pc, #4016] @ 2434ff4 │ │ mov r1, #214 @ 0xd6 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ mov r0, r4 │ │ mov r1, r5 │ │ bl 270deb0 │ │ @@ -1290158,15 +1290157,15 @@ │ │ beq 2434848 │ │ mov r0, #80 @ 0x50 │ │ str r0, [r6] │ │ ldr r0, [pc, #4076] @ 243512c │ │ add r0, pc, r0 │ │ b 2433b54 │ │ stc2l 3, cr11, [r1, #948]! @ 0x3b4 │ │ - ldc2l 5, cr2, [pc, #100] @ 24341b4 │ │ + ldc2l 5, cr2, [pc, #280] @ 2434268 │ │ orrseq r7, sp, r0, lsr #11 │ │ ldr r1, [pc, #4056] @ 2435130 │ │ ldr r5, [fp, #20] │ │ ldr r1, [pc, r1] │ │ add r0, r1, r0 │ │ ldr r1, [pc, #4044] @ 2435134 │ │ add r1, pc, r1 │ │ @@ -1290174,16 +1290173,16 @@ │ │ ldr r8, [pc, #4036] @ 2435138 │ │ ldr r9, [pc, #4036] @ 243513c │ │ add r8, pc, r8 │ │ add r9, pc, r9 │ │ b 24343fc │ │ @ instruction: 0x01fbf59c │ │ orrseq r7, sp, r8, lsr r6 │ │ - vcmla.f16 , q8, , #270 │ │ - ldc2l 4, cr2, [pc, #788] @ 24344a8 │ │ + stc2l 8, cr15, [r0, #1008]! @ 0x3f0 │ │ + ldc2l 4, cr2, [pc, #968] @ 243455c │ │ ldr r1, [pc, #4008] @ 2435140 │ │ ldr r7, [fp, #80] @ 0x50 │ │ ldr r1, [pc, r1] │ │ add r0, r1, r0 │ │ ldr r1, [pc, #3996] @ 2435144 │ │ ldr r5, [fp, #-72] @ 0xffffffb8 │ │ add r1, pc, r1 │ │ @@ -1290200,16 +1290199,16 @@ │ │ ldrdeq r4, [pc, #40] @ 2434204 │ │ ldr r5, [fp, #20] │ │ ldr r2, [fp, #24] │ │ b 24343fc │ │ ldr r2, [fp, #48] @ 0x30 │ │ b 2434524 │ │ @ instruction: 0x019d75d4 │ │ - ldc2l 2, cr10, [pc, #352] @ 2434358 │ │ - ldc2l 4, cr2, [pc, #436] @ 24343b0 │ │ + ldc2l 2, cr10, [pc, #532] @ 243440c │ │ + ldc2l 4, cr2, [pc, #616] @ 2434464 │ │ mvnseq r8, r0, asr #22 │ │ orrseq r7, sp, ip, lsr #11 │ │ ldr r0, [pc, #4064] @ 24351e8 │ │ mov r1, #214 @ 0xd6 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ mov r0, r4 │ │ @@ -1290225,16 +1290224,16 @@ │ │ mov r1, #10 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4008] @ 24351f4 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ @ instruction: 0x019d7594 │ │ - ldc2l 13, cr15, [pc, #964] @ 2434620 │ │ - ldc2l 3, cr2, [pc, #948] @ 2434614 │ │ + ldc2l 14, cr15, [pc, #120] @ 24342d4 │ │ + ldc2l 4, cr2, [pc, #104] @ 24342c8 │ │ orrseq r7, sp, r0, ror r4 │ │ andeq r2, r4, #192, 4 │ │ ldr r9, [pc, #3980] @ 24351f8 │ │ rsb r1, r2, #0 │ │ ldr r8, [pc, #3976] @ 24351fc │ │ mov r0, #0 │ │ add r9, pc, r9 │ │ @@ -1290292,16 +1290291,16 @@ │ │ mov r0, r4 │ │ mov r2, #1 │ │ add r1, pc, r1 │ │ bl 270da90 │ │ ldr r0, [pc, #4060] @ 2435338 │ │ add r0, pc, r0 │ │ b 242e614 │ │ - ldc2l 13, cr15, [pc, #140] @ 24343f4 │ │ - ldc2l 3, cr2, [pc, #68] @ 24343b0 │ │ + ldc2l 13, cr15, [pc, #320] @ 24344a8 │ │ + ldc2l 3, cr2, [pc, #248] @ 2434464 │ │ @ instruction: 0x019d7394 │ │ andeq r4, r2, #244, 24 @ 0xf400 │ │ movteq r6, #10232 @ 0x27f8 │ │ ldr r4, [fp, #-72] @ 0xffffffb8 │ │ cmp r1, #0 │ │ beq 2434be4 │ │ ldr r0, [pc, #4020] @ 243533c │ │ @@ -1290313,28 +1290312,28 @@ │ │ ldr r2, [pc, #4000] @ 2435340 │ │ ldr r3, [pc, #4000] @ 2435344 │ │ add r2, pc, r2 │ │ add r3, pc, r3 │ │ ldr r0, [r3, r1, lsl #2] │ │ str r0, [r2] │ │ b 2434918 │ │ - stc2l 2, cr7, [r1, #580]! @ 0x244 │ │ + stc2l 2, cr7, [r1, #760]! @ 0x2f8 │ │ movteq r6, #10200 @ 0x27d8 │ │ stc2l 6, cr9, [r1, #324]! @ 0x144 │ │ orrseq r7, sp, r8, asr #7 │ │ @ instruction: 0x019d73b8 │ │ movteq sp, #264 @ 0x108 │ │ orrseq r7, sp, r0, ror #7 │ │ - ldc2l 11, cr15, [sp, #328] @ 0x148 @ │ │ - ldc2l 2, cr2, [pc, #276] @ 24344f0 │ │ + ldc2l 11, cr15, [sp, #508] @ 0x1fc @ │ │ + ldc2l 2, cr2, [pc, #456] @ 24345a4 │ │ orrseq r7, sp, ip, ror #6 │ │ eorseq pc, r4, #72, 10 @ 0x12000000 │ │ movteq sp, #208 @ 0xd0 │ │ - ldc2l 11, cr15, [pc, #948] @ 24347a0 @ │ │ - ldc2l 1, cr2, [pc, #932] @ 2434794 │ │ + ldc2l 12, cr15, [pc, #104] @ 2434454 │ │ + ldc2l 2, cr2, [pc, #88] @ 2434448 │ │ andeq r2, r4, #196 @ 0xc4 │ │ ldr r0, [pc, #4092] @ 24353f4 │ │ ldr r5, [fp, #20] │ │ ldr r0, [pc, r0] │ │ ldr r6, [r5] │ │ ldr r1, [pc, #4080] @ 24353f8 │ │ cmp r0, r6 │ │ @@ -1290378,15 +1290377,15 @@ │ │ mov r0, r4 │ │ mov r2, #1 │ │ add r1, pc, r1 │ │ bl 270da90 │ │ ldr r0, [pc, #3952] @ 2435424 │ │ add r0, pc, r0 │ │ b 242e7e0 │ │ - ldc2l 0, cr14, [lr, #856] @ 0x358 │ │ + ldc2l 1, cr14, [lr, #12] │ │ cmp r1, #0 │ │ beq 2434fac │ │ ldr r0, [pc, #3932] @ 2435428 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ movw r0, #26002 @ 0x6592 │ │ cmp r1, r0 │ │ @@ -1290396,16 +1290395,16 @@ │ │ add r2, pc, r2 │ │ add r3, pc, r3 │ │ ldr r0, [r3, r1, lsl #2] │ │ str r0, [r2] │ │ b 2434a0c │ │ orrseq r7, sp, r0, lsr #5 │ │ orrseq r7, sp, r4, lsr #5 │ │ - ldc2l 0, cr8, [lr, #892] @ 0x37c │ │ - ldc2l 1, cr2, [pc, #292] @ 2434630 │ │ + ldc2l 1, cr8, [lr, #48] @ 0x30 │ │ + ldc2l 1, cr2, [pc, #472] @ 24346e4 │ │ orrseq r7, sp, r4, asr #4 │ │ orrseq r7, sp, ip, lsr r2 │ │ orrseq r7, sp, r0, lsl r2 │ │ orrseq r7, sp, r0, lsl #4 │ │ orrseq r7, sp, r4, lsl #4 │ │ ldr r0, [pc, #3856] @ 2435434 │ │ ldr r0, [pc, r0] │ │ @@ -1290453,16 +1290452,16 @@ │ │ mov r0, r4 │ │ mov r2, #1 │ │ add r1, pc, r1 │ │ bl 270da90 │ │ ldr r0, [pc, #3988] @ 2435574 │ │ add r0, pc, r0 │ │ b 242fffc │ │ - ldc2l 0, cr8, [lr, #60] @ 0x3c │ │ - ldc2l 0, cr2, [pc, #484] @ 24347d4 │ │ + ldc2l 0, cr8, [lr, #240] @ 0xf0 │ │ + ldc2l 0, cr2, [pc, #664] @ 2434888 │ │ orrseq r7, sp, r4, lsr #3 │ │ orrseq r7, sp, r8, lsl #3 │ │ orrseq r7, sp, ip, ror r1 │ │ cmp r1, #0 │ │ beq 24353c0 │ │ ldr r0, [pc, #3952] @ 2435578 │ │ ldr r0, [pc, r0] │ │ @@ -1290474,22 +1290473,22 @@ │ │ ldr r0, [sl, r1, lsl #2] │ │ add r2, pc, r2 │ │ ldr r4, [fp, #20] │ │ str r0, [r2] │ │ ldr r5, [pc, #4060] @ 2435610 │ │ add r5, pc, r5 │ │ b 2434afc │ │ - ldc2l 15, cr7, [lr, #732] @ 0x2dc │ │ - ldc2l 0, cr2, [pc, #132] @ 24346c8 │ │ + ldc2l 15, cr7, [lr, #912] @ 0x390 │ │ + ldc2l 0, cr2, [pc, #312] @ 243477c │ │ orrseq r7, sp, r4, lsr r1 │ │ orrseq r7, sp, ip, lsr #2 │ │ orrseq r7, sp, ip, lsl #2 │ │ orrseq r7, sp, r0, lsl r1 │ │ - ldc2l 15, cr7, [lr, #268] @ 0x10c │ │ - ldc2l 15, cr1, [pc, #692] @ 2434910 │ │ + ldc2l 15, cr7, [lr, #448] @ 0x1c0 │ │ + ldc2l 15, cr1, [pc, #872] @ 24349c4 │ │ orrseq r7, sp, r0, asr #1 │ │ ldrheq r7, [sp, r8] │ │ ldr r0, [pc, #4012] @ 2435614 │ │ mov r1, #118 @ 0x76 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r5, [pc, #4000] @ 2435618 │ │ @@ -1290536,25 +1290535,25 @@ │ │ ldr r9, [pc, #4032] @ 24356dc │ │ add r8, pc, r8 │ │ add sl, pc, sl │ │ add r9, pc, r9 │ │ b 2434774 │ │ orrseq r7, sp, r0, ror r0 │ │ orrseq r7, sp, r0, ror r0 │ │ - ldc2l 9, cr15, [pc, #70] @ 243477e @ │ │ - ldc2l 15, cr1, [pc, #68] @ 2434780 │ │ + ldc2l 9, cr15, [pc, #160] @ 24347d8 @ │ │ + ldc2l 15, cr1, [pc, #248] @ 2434834 │ │ movteq ip, #3508 @ 0xdb4 │ │ andeq r4, r2, #236, 16 @ 0xec0000 │ │ orrseq r7, sp, r0, lsr #32 │ │ movteq ip, #3440 @ 0xd70 │ │ - ldc2l 5, cr9, [lr, #436] @ 0x1b4 │ │ + ldc2l 5, cr9, [lr, #616] @ 0x268 │ │ movteq r6, #9156 @ 0x23c4 │ │ - stc2l 8, cr11, [r0, #852]! @ 0x354 │ │ + stc2l 9, cr11, [r0, #4]! @ │ │ @ instruction: 0x019d6fdc │ │ - stc2l 5, cr1, [r0, #464]! @ 0x1d0 │ │ + stc2l 5, cr1, [r0, #644]! @ 0x284 │ │ ldr r0, [r8, r1, lsl #2] │ │ ldr r1, [pc, #4076] @ 2435754 │ │ add r1, pc, r1 │ │ cmp r0, #0 │ │ str r0, [r1] │ │ ble 2433f34 │ │ ldr r1, [pc, #4060] @ 2435758 │ │ @@ -1290620,22 +1290619,22 @@ │ │ beq 24357b4 │ │ movw r0, #64479 @ 0xfbdf │ │ movt r0, #1 │ │ str r0, [r6] │ │ ldr r0, [pc, #3960] @ 24357f4 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ - vcmla.f16 , q0, q7, #270 │ │ + stc2l 8, cr7, [r0, #492]! @ 0x1ec │ │ eorseq r3, r2, r0, asr #11 │ │ orrseq r6, sp, r0, asr lr │ │ orrseq r6, sp, r4, asr #29 │ │ mlaseq r2, r8, r5, r3 │ │ eorseq r3, r2, r8, ror r5 │ │ @ instruction: 0x019d6dd8 │ │ - ldc2l 4, cr3, [lr, #780] @ 0x30c │ │ + ldc2l 4, cr3, [lr, #960] @ 0x3c0 │ │ orrseq r6, sp, r8, ror #28 │ │ ldr r0, [pc, #3916] @ 24357f8 │ │ movw r3, #6303 @ 0x189f │ │ ldr r2, [pc, #3912] @ 24357fc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1290680,24 +1290679,24 @@ │ │ ldr r2, [pc, #4064] @ 243593c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ add r0, sl, r1, lsl #2 │ │ b 2434bbc │ │ - ldc2l 4, cr3, [lr, #572] @ 0x23c │ │ + ldc2l 4, cr3, [lr, #752] @ 0x2f0 │ │ orrseq r6, sp, r4, lsl #28 │ │ stc2l 11, cr10, [r1, #464]! @ 0x1d0 @ │ │ - ldc2l 12, cr1, [pc, #612] @ 2434be8 │ │ + ldc2l 12, cr1, [pc, #792] @ 2434c9c │ │ orrseq r6, sp, ip, lsl sp │ │ ldrheq r1, [pc, #148] @ 2434a20 │ │ @ instruction: 0x019d6db8 │ │ orrseq r6, sp, ip, lsl #27 │ │ orrseq r6, sp, r0, lsl #27 │ │ - stc2l 0, cr15, [r0, #216]! @ 0xd8 │ │ + stc2l 0, cr15, [r0, #396]! @ 0x18c │ │ ldr r0, [pc, #4000] @ 2435940 │ │ movw r3, #6847 @ 0x1abf │ │ ldr r2, [pc, #3996] @ 2435944 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3984] @ 2435948 │ │ @@ -1290742,23 +1290741,23 @@ │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ add r0, sl, r1, lsl #2 │ │ mov r9, sl │ │ b 2434f80 │ │ - stc2l 0, cr15, [r0, #8]! │ │ + stc2l 0, cr15, [r0, #188]! @ 0xbc │ │ ldrsbteq r3, [r2], -r4 │ │ mvnseq lr, ip, asr ip │ │ movteq ip, #2680 @ 0xa78 │ │ movteq ip, #2656 @ 0xa60 │ │ - stc2l 5, cr7, [r0, #996]! @ 0x3e4 │ │ - ldc2l 5, cr15, [lr, #740] @ 0x2e4 │ │ - ldc2l 10, cr7, [lr, #952] @ 0x3b8 @ │ │ - stc2l 3, cr13, [r0, #28]! │ │ + stc2l 6, cr7, [r0, #152]! @ 0x98 │ │ + ldc2l 5, cr15, [lr, #920] @ 0x398 │ │ + ldc2l 11, cr7, [lr, #108] @ 0x6c @ │ │ + stc2l 3, cr13, [r0, #208]! @ 0xd0 │ │ ldr r0, [pc, #3804] @ 2435970 │ │ movw r3, #7389 @ 0x1cdd │ │ ldr r2, [pc, #3800] @ 2435974 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3788] @ 2435978 │ │ @@ -1290806,16 +1290805,16 @@ │ │ add r0, r6, r1, lsl #2 │ │ mov r5, r6 │ │ b 243538c │ │ andeq r4, r2, #248, 8 @ 0xf8000000 │ │ orrseq r6, sp, ip, lsr #24 │ │ orrseq r6, sp, r4, lsr ip │ │ orrseq r6, sp, r8, asr #24 │ │ - ldc2l 8, cr9, [pc, #592] @ 2434dc0 │ │ - ldc2l 10, cr1, [pc, #676] @ 2434e18 @ │ │ + vcadd.f32 , , , #270 │ │ + ldc2l 10, cr1, [pc, #856] @ 2434ecc @ │ │ mvnseq r8, r8, ror r1 │ │ orrseq r6, sp, ip, ror #23 │ │ @ instruction: 0x019d6bb4 │ │ rsb r2, r0, #0 │ │ str r2, [r1] │ │ mov r1, #11 │ │ sub r1, r1, r0, lsl #1 │ │ @@ -1290856,22 +1290855,22 @@ │ │ add r7, pc, r7 │ │ add r4, pc, r4 │ │ b 2434cac │ │ andeq r1, r4, #48, 18 @ 0xc0000 │ │ orrseq r6, sp, r4, ror fp │ │ orrseq r6, sp, ip, ror fp │ │ @ instruction: 0x019d6b94 │ │ - ldc2l 7, cr9, [pc, #896] @ 2434fb8 │ │ - ldc2l 9, cr1, [pc, #490] @ 2434e26 @ │ │ + vcadd.f32 d25, d15, d13, #270 │ │ + ldc2l 10, cr1, [pc, #136] @ 2434cc4 @ │ │ orrseq r6, sp, ip, lsr fp │ │ mvnseq r8, r0, asr #1 │ │ orrseq r6, sp, r8, asr #20 │ │ movteq ip, #2172 @ 0x87c │ │ - ldc2l 3, cr15, [pc, #580] @ 2434e94 │ │ - ldc2l 9, cr1, [pc, #274] @ 2434d66 @ │ │ + ldc2l 3, cr15, [pc, #760] @ 2434f48 │ │ + ldc2l 9, cr1, [pc, #364] @ 2434dc0 @ │ │ movteq ip, #2048 @ 0x800 │ │ andeq r1, r4, #236, 14 @ 0x3b00000 │ │ orrseq r6, sp, r0, lsr sl │ │ ldr r0, [pc, #3544] @ 2435a3c │ │ mov r3, r8 │ │ ldr r1, [fp, #44] @ 0x2c │ │ ldr r0, [pc, r0] │ │ @@ -1290950,21 +1290949,21 @@ │ │ add r0, pc, r0 │ │ str r1, [r0] │ │ mov r1, r7 │ │ bl 270e080 │ │ b 2434e0c │ │ orrseq r6, sp, r8, lsr sl │ │ orrseq r6, sp, r0, asr sl │ │ - ldc2l 6, cr9, [pc, #624] @ 2435020 │ │ - ldc2l 8, cr1, [pc, #708] @ 2435078 │ │ + ldc2l 6, cr9, [pc, #804] @ 24350d4 │ │ + ldc2l 8, cr1, [pc, #888] @ 243512c │ │ @ instruction: 0x019d69f8 │ │ orrseq r6, sp, ip, lsl #18 │ │ movteq ip, #1856 @ 0x740 │ │ - ldc2l 2, cr15, [pc, #340] @ 2434f18 │ │ - vcadd.f32 , , , #270 │ │ + ldc2l 2, cr15, [pc, #520] @ 2434fcc │ │ + ldc2l 8, cr1, [pc, #488] @ 2434fb0 │ │ ldr r0, [pc, #3136] @ 2435a0c │ │ ldr r0, [pc, r0] │ │ ldr sl, [pc, #3132] @ 2435a10 │ │ sub r1, r0, #1 │ │ cmp r1, r5 │ │ ldr sl, [pc, sl] │ │ bcc 2434e00 │ │ @@ -1290990,16 +1290989,16 @@ │ │ mov r2, r4 │ │ movw r3, #6385 @ 0x18f1 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r2, r0 │ │ b 2434c5c │ │ movteq ip, #1740 @ 0x6cc │ │ - stc2l 15, cr12, [r0, #748]! @ 0x2ec │ │ - stc2l 10, cr0, [r1, #428]! @ 0x1ac @ │ │ + stc2l 15, cr12, [r0, #928]! @ 0x3a0 │ │ + stc2l 10, cr0, [r1, #608]! @ 0x260 @ │ │ orrseq r6, sp, r0, asr #17 │ │ orrseq r6, sp, r0, asr #17 │ │ ldr r1, [pc, #3052] @ 2435a4c │ │ mov r0, sl │ │ ldr r7, [fp, #80] @ 0x50 │ │ mov r3, #32 │ │ add r1, pc, r1 │ │ @@ -1291045,21 +1291044,21 @@ │ │ ldr r0, [pc, #2792] @ 24359f8 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #2780] @ 24359fc │ │ add r0, pc, r0 │ │ b 2433b54 │ │ - ldc2l 6, cr7, [lr, #920] @ 0x398 │ │ - ldc2l 5, cr5, [pc, #184] @ 2434fe8 │ │ - ldc2l 15, cr14, [lr, #276] @ 0x114 │ │ - stc2l 0, cr11, [r0, #920]! @ 0x398 │ │ - ldc2l 4, cr9, [pc, #960] @ 24352fc │ │ - stc2l 14, cr12, [r0, #620]! @ 0x26c │ │ - ldc2l 0, cr15, [pc, #900] @ 24352c8 │ │ + ldc2l 7, cr7, [lr, #76] @ 0x4c │ │ + ldc2l 5, cr5, [pc, #364] @ 243509c │ │ + ldc2l 15, cr14, [lr, #456] @ 0x1c8 │ │ + stc2l 1, cr11, [r0, #76]! @ 0x4c │ │ + ldc2l 5, cr9, [pc, #116] @ 2434fb0 │ │ + stc2l 14, cr12, [r0, #800]! @ 0x320 │ │ + ldc2l 1, cr15, [pc, #56] @ 2434f7c │ │ orrseq r6, sp, ip, asr #15 │ │ rsb r2, r0, #0 │ │ str r2, [r1] │ │ mov r1, #11 │ │ sub r1, r1, r0, lsl #1 │ │ movw r0, #30012 @ 0x753c │ │ cmp r1, r0 │ │ @@ -1291094,24 +1291093,24 @@ │ │ ldr r4, [pc, #2740] @ 2435a88 │ │ movw sl, #26003 @ 0x6593 │ │ ldr r7, [pc, #2736] @ 2435a8c │ │ add r5, pc, r5 │ │ add r4, pc, r4 │ │ add r7, pc, r7 │ │ b 2435038 │ │ - ldc2l 4, cr5, [pc, #584] @ 2435238 │ │ - ldc2l 14, cr14, [lr, #676] @ 0x2a4 │ │ - stc2l 0, cr11, [r0, #296]! @ 0x128 │ │ - ldc2l 4, cr5, [pc, #264] @ 2435104 │ │ - ldc2l 14, cr14, [lr, #356] @ 0x164 │ │ - stc2l 15, cr10, [r0, #1000]! @ 0x3e8 │ │ - stc2l 13, cr12, [r0, #796]! @ 0x31c │ │ + ldc2l 4, cr5, [pc, #764] @ 24352ec │ │ + ldc2l 14, cr14, [lr, #856] @ 0x358 │ │ + stc2l 0, cr11, [r0, #476]! @ 0x1dc │ │ + ldc2l 4, cr5, [pc, #444] @ 24351b8 │ │ + ldc2l 14, cr14, [lr, #536] @ 0x218 │ │ + stc2l 0, cr11, [r0, #156]! @ 0x9c │ │ + stc2l 13, cr12, [r0, #976]! @ 0x3d0 │ │ andeq r3, r2, #224, 30 @ 0x380 │ │ - ldc2l 15, cr14, [pc, #956] @ 24353cc │ │ - ldc2l 5, cr1, [pc, #884] @ 2435388 │ │ + ldc2l 0, cr15, [pc, #112] @ 2435080 │ │ + ldc2l 6, cr1, [pc, #40] @ 243503c │ │ orrseq r6, sp, r4, asr #12 │ │ stc2l 9, cr8, [r1, #84]! @ 0x54 @ │ │ ldr r3, [pc, #2780] @ 2435afc │ │ add r1, r8, r1, lsl #3 │ │ cmp r0, r6 │ │ add r2, r0, #1 │ │ add r3, pc, r3 │ │ @@ -1291175,15 +1291174,15 @@ │ │ rsb r1, r0, #0 │ │ ldr r0, [pc, #2508] @ 2435ae8 │ │ add r0, pc, r0 │ │ str r1, [r0] │ │ mov r1, r4 │ │ bl 270e080 │ │ b 2435198 │ │ - ldc2l 15, cr14, [lr, #628] @ 0x274 │ │ + ldc2l 15, cr14, [lr, #808] @ 0x328 │ │ orrseq r6, sp, ip, ror #12 │ │ orrseq r6, sp, r0, ror #12 │ │ eorseq lr, r4, #44, 16 @ 0x2c0000 │ │ andeq r3, r2, #8, 30 │ │ orrseq r6, sp, ip, lsr #12 │ │ orrseq r6, sp, ip, lsl r6 │ │ eorseq lr, r4, #232, 14 @ 0x3a00000 │ │ @@ -1291222,18 +1291221,18 @@ │ │ movw r3, #6933 @ 0x1b15 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #2324] @ 2435af8 │ │ ldr r0, [pc, r0] │ │ b 2435018 │ │ - ldc2l 2, cr5, [pc, #504] @ 24353e8 │ │ - ldc2l 12, cr14, [lr, #596] @ 0x254 │ │ - stc2l 14, cr10, [r0, #216]! @ 0xd8 │ │ - ldc2l 3, cr7, [lr, #856] @ 0x358 │ │ + ldc2l 2, cr5, [pc, #684] @ 243549c │ │ + ldc2l 12, cr14, [lr, #776] @ 0x308 │ │ + stc2l 14, cr10, [r0, #396]! @ 0x18c │ │ + ldc2l 4, cr7, [lr, #12] │ │ orrseq r6, sp, r4, lsr #9 │ │ movteq ip, #724 @ 0x2d4 │ │ orrseq r6, sp, ip, lsr #10 │ │ ldr r1, [pc, #2292] @ 2435b00 │ │ mov r3, #32 │ │ ldr r7, [fp, #-72] @ 0xffffffb8 │ │ mov r4, #32 │ │ @@ -1291277,16 +1291276,16 @@ │ │ orrseq r6, sp, r0, lsr #10 │ │ movteq ip, #628 @ 0x274 │ │ orrseq r6, sp, r4, lsr #10 │ │ mvnseq lr, ip, lsr r4 │ │ mvnseq r7, r0, lsl #21 │ │ andeq r3, r2, #144, 26 @ 0x2400 │ │ andeq r1, r4, #120, 4 @ 0x80000007 │ │ - stc2l 4, cr2, [r1, #348]! @ 0x15c │ │ - ldc2l 11, cr14, [lr, #644] @ 0x284 @ │ │ + stc2l 4, cr2, [r1, #528]! @ 0x210 │ │ + ldc2l 11, cr14, [lr, #824] @ 0x338 @ │ │ ldr r0, [pc, #1980] @ 2435a90 │ │ ldr r1, [pc, #1980] @ 2435a94 │ │ ldr r2, [pc, #1980] @ 2435a98 │ │ add r0, pc, r0 │ │ ldr r3, [pc, #1976] @ 2435a9c │ │ add r1, pc, r1 │ │ ldr r7, [pc, #1972] @ 2435aa0 │ │ @@ -1291306,15 +1291305,15 @@ │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #1920] @ 2435ab0 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ orrseq r6, sp, r8, ror r4 │ │ - ldc2l 15, cr6, [pc, #216] @ 2435418 │ │ + ldc2l 15, cr6, [pc, #396] @ 24354cc │ │ orrseq r6, sp, ip, ror r4 │ │ orrseq r6, sp, r4, asr #8 │ │ mvnseq r7, r8, asr #19 │ │ ldr r2, [pc, #2004] @ 2435b24 │ │ rsb r1, r0, #0 │ │ add r2, pc, r2 │ │ str r1, [r2] │ │ @@ -1291362,18 +1291361,18 @@ │ │ movteq ip, #292 @ 0x124 │ │ @ instruction: 0x019d63d4 │ │ mvnseq lr, ip, ror #5 │ │ mvnseq r7, r0, lsr r9 │ │ andeq r3, r2, #60, 24 @ 0x3c00 │ │ andeq r1, r4, #40, 2 │ │ mvnseq r0, r8, ror #30 │ │ - stc2l 2, cr2, [r1, #1020]! @ 0x3fc │ │ - ldc2l 10, cr14, [lr, #292] @ 0x124 @ │ │ + stc2l 3, cr2, [r1, #176]! @ 0xb0 │ │ + ldc2l 10, cr14, [lr, #472] @ 0x1d8 @ │ │ orrseq r6, sp, r0, lsr #6 │ │ - ldc2l 13, cr6, [pc, #888] @ 24357a4 │ │ + ldc2l 14, cr6, [pc, #44] @ 2435458 │ │ orrseq r6, sp, r8, lsr r3 │ │ orrseq r6, sp, r0, lsl #6 │ │ mvnseq r7, r4, lsl #17 │ │ orrseq r6, sp, r4, lsr #5 │ │ orrseq r6, sp, r4, lsr #5 │ │ movteq fp, #4088 @ 0xff8 │ │ orrseq r6, sp, r8, lsr #5 │ │ @@ -1291446,18 +1291445,18 @@ │ │ add r1, pc, r1 │ │ bl 270e080 │ │ b 24355bc │ │ mvnseq r7, r4, lsl #16 │ │ andeq r3, r2, #16, 22 @ 0x4000 │ │ andeq r0, r4, #252, 30 @ 0x3f0 │ │ mvnseq r0, ip, lsr lr │ │ - stc2l 1, cr2, [r1, #844]! @ 0x34c │ │ - ldc2l 9, cr14, [lr, #58] @ 0x3a @ │ │ + stc2l 2, cr2, [r1] │ │ + ldc2l 9, cr14, [lr, #148] @ 0x94 @ │ │ @ instruction: 0x019d61f4 │ │ - ldc2l 12, cr6, [pc, #712] @ 2435844 │ │ + ldc2l 12, cr6, [pc, #892] @ 24358f8 │ │ @ instruction: 0x019d61fc │ │ ldr r0, [pc, #1532] @ 2435b80 │ │ ldr r0, [pc, r0] │ │ ldr r4, [pc, #1528] @ 2435b84 │ │ sub r1, r0, #1 │ │ cmp r1, r8 │ │ ldr r4, [pc, r4] │ │ @@ -1291489,16 +1291488,16 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #1452] @ 2435bb4 │ │ ldr r0, [pc, r0] │ │ b 2435448 │ │ orrseq r6, sp, r4, asr #3 │ │ andeq r3, r2, #80, 20 @ 0x50000 │ │ - ldc2l 15, cr10, [lr, #524] @ 0x20c │ │ - vcadd.f32 q15, q7, , #270 │ │ + ldc2l 15, cr10, [lr, #704] @ 0x2c0 │ │ + ldc2l 8, cr14, [lr, #456] @ 0x1c8 │ │ orrseq r6, sp, r0, lsr r1 │ │ orrseq r6, sp, r4, rrx │ │ ldr r1, [pc, #1424] @ 2435bbc │ │ mov r3, #32 │ │ ldr r7, [fp, #-72] @ 0xffffffb8 │ │ mov r4, #32 │ │ ldr r5, [fp, #80] @ 0x50 │ │ @@ -1291533,20 +1291532,20 @@ │ │ str r4, [sp, #20] │ │ str r4, [sp, #24] │ │ str r4, [sp, #28] │ │ bl 270ea00 │ │ ldr r0, [pc, #1308] @ 2435bdc │ │ add r0, pc, r0 │ │ b 2433b54 │ │ - ldc2l 8, cr14, [sp, #760] @ 0x2f8 │ │ - ldc2l 15, cr0, [pc, #708] @ 2435994 │ │ - ldc2l 7, cr14, [lr, #852] @ 0x354 │ │ - ldc2l 13, cr8, [pc, #476] @ 24358b4 │ │ + vcadd.f32 q15, , , #270 │ │ + ldc2l 15, cr0, [pc, #888] @ 2435a48 │ │ + vcadd.f32 d30, d14, d2, #270 │ │ + ldc2l 13, cr8, [pc, #656] @ 2435968 │ │ andeq r3, r2, #104, 18 @ 0x1a0000 │ │ - ldc2l 15, cr0, [pc, #420] @ 2435884 │ │ + ldc2l 15, cr0, [pc, #600] @ 2435938 │ │ bicseq sp, ip, r4, lsl lr │ │ ldr r0, [pc, #1128] @ 2435b50 │ │ ldr r1, [pc, #1128] @ 2435b54 │ │ ldr r2, [pc, #1128] @ 2435b58 │ │ add r0, pc, r0 │ │ ldr r3, [pc, #1124] @ 2435b5c │ │ add r1, pc, r1 │ │ @@ -1291592,34 +1291591,34 @@ │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #548] @ 24359d0 │ │ ldr r0, [pc, r0] │ │ b 2435764 │ │ - ldc2l 14, cr6, [lr, #316] @ 0x13c │ │ + ldc2l 14, cr6, [lr, #496] @ 0x1f0 │ │ ldr r1, [pc, #1060] @ 2435be0 │ │ mov r0, r4 │ │ mov r2, r5 │ │ mov r3, #6 │ │ add r1, pc, r1 │ │ bl 270d890 │ │ cmp r0, #0 │ │ beq 24358e8 │ │ mov r0, #32 │ │ str r0, [r6] │ │ ldr r0, [pc, #1024] @ 2435be4 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ orrseq r5, sp, ip, lsl #30 │ │ - vcadd.f32 q15, , , #270 │ │ + ldc2l 8, cr14, [pc, #608] @ 2435a54 │ │ stc2l 1, cr8, [r1, #996]! @ 0x3e4 │ │ - vcadd.f32 q15, q7, , #270 │ │ - ldc2l 11, cr8, [pc, #752] @ 2435af0 @ │ │ - ldc2l 13, cr0, [pc, #836] @ 2435b48 │ │ + vcadd.f32 d30, d30, d14, #270 │ │ + ldc2l 11, cr8, [pc, #932] @ 2435ba4 @ │ │ + ldc2l 13, cr0, [pc, #1016] @ 2435bfc │ │ orrseq r5, sp, r0, lsr #30 │ │ mvnseq r7, r4, lsr #9 │ │ ldr r0, [pc, #388] @ 2435994 │ │ mov r1, #83 @ 0x53 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #376] @ 2435998 │ │ @@ -1291666,16 +1291665,16 @@ │ │ mov r2, #1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #248] @ 24359c4 │ │ mov r1, #10 │ │ add r0, pc, r0 │ │ b 242e714 │ │ orrseq r5, sp, r4, lsr #30 │ │ - ldc2l 11, cr8, [pc, #464] @ 2435ab0 @ │ │ - ldc2l 13, cr0, [pc, #548] @ 2435b08 │ │ + ldc2l 11, cr8, [pc, #644] @ 2435b64 @ │ │ + ldc2l 13, cr0, [pc, #728] @ 2435bbc │ │ @ instruction: 0x019d5ed8 │ │ mvnseq r7, r8, asr r4 │ │ ldr r1, [pc, #760] @ 2435be8 │ │ mov r0, r4 │ │ mov r2, r5 │ │ mov r3, #6 │ │ add r1, pc, r1 │ │ @@ -1291690,189 +1291689,189 @@ │ │ orrseq r5, sp, r8, ror #27 │ │ mov r0, #0 │ │ str r0, [r6] │ │ str r0, [r7] │ │ ldr r0, [pc, #700] @ 2435bf0 │ │ add r0, pc, r0 │ │ b 2433b54 │ │ - ldc2l 7, cr14, [pc, #180] @ 24359f4 │ │ - ldc2l 13, cr0, [pc, #164] @ 24359e8 │ │ - ldc2l 10, cr8, [pc, #800] @ 2435c68 @ │ │ - ldc2l 12, cr0, [pc, #884] @ 2435cc0 │ │ + ldc2l 7, cr14, [pc, #360] @ 2435aa8 │ │ + ldc2l 13, cr0, [pc, #344] @ 2435a9c │ │ + ldc2l 10, cr8, [pc, #980] @ 2435d1c @ │ │ + ldc2l 13, cr0, [pc, #40] @ 2435974 │ │ orrseq r5, sp, ip, lsr #28 │ │ ldrheq r7, [sp, #48]! @ 0x30 │ │ orrseq r5, sp, r0, lsr lr │ │ - ldc2l 10, cr8, [pc, #512] @ 2435b5c @ │ │ - ldc2l 12, cr0, [pc, #596] @ 2435bb4 │ │ + ldc2l 10, cr8, [pc, #692] @ 2435c10 @ │ │ + ldc2l 12, cr0, [pc, #776] @ 2435c68 │ │ orrseq r5, sp, r4, ror #27 │ │ mvnseq r7, r4, ror #6 │ │ @ instruction: 0x019d5cf4 │ │ - ldc2l 6, cr14, [pc, #228] @ 2435a54 │ │ - ldc2l 12, cr0, [pc, #212] @ 2435a48 │ │ - ldc2l 9, cr8, [pc, #424] @ 2435b20 @ │ │ - ldc2l 11, cr0, [pc, #932] @ 2435d20 @ │ │ + ldc2l 6, cr14, [pc, #408] @ 2435b08 │ │ + ldc2l 12, cr0, [pc, #392] @ 2435afc │ │ + ldc2l 10, cr8, [pc, #4] @ 243597c @ │ │ + ldc2l 12, cr0, [pc, #88] @ 24359d4 │ │ orrseq r5, sp, r4, lsr sp │ │ orrseq r5, sp, r0, asr #26 │ │ andeq r3, r2, #180, 10 @ 0x2d000000 │ │ - ldc2l 9, cr8, [pc, #272] @ 2435a9c @ │ │ - ldc2l 11, cr0, [pc, #628] @ 2435c04 @ │ │ + ldc2l 9, cr8, [pc, #362] @ 2435af6 @ │ │ + ldc2l 11, cr0, [pc, #808] @ 2435cb8 @ │ │ orrseq r5, sp, ip, ror #25 │ │ orrseq r5, sp, r0, lsl #24 │ │ - stc2l 7, cr7, [r0, #612]! @ 0x264 │ │ + stc2l 7, cr7, [r0, #792]! @ 0x318 │ │ orrseq r4, sp, r8, lsr #31 │ │ - stc2l 2, cr13, [r0, #316]! @ 0x13c │ │ - ldc2l 14, cr15, [lr, #276] @ 0x114 │ │ + stc2l 2, cr13, [r0, #496]! @ 0x1f0 │ │ + ldc2l 14, cr15, [lr, #456] @ 0x1c8 │ │ mvneq r1, r4, ror #24 │ │ orrseq r4, sp, ip, asr #30 │ │ orrseq r4, sp, r4, asr pc │ │ - stc2l 1, cr13, [r0, #1004]! @ 0x3ec │ │ - ldc2l 13, cr15, [lr, #964] @ 0x3c4 │ │ + stc2l 2, cr13, [r0, #160]! @ 0xa0 │ │ + ldc2l 14, cr15, [lr, #120] @ 0x78 │ │ orrseq r4, sp, r0, lsl pc │ │ - ldc2l 6, cr13, [lr, #68] @ 0x44 │ │ + ldc2l 6, cr13, [lr, #248] @ 0xf8 │ │ mvneq r1, r0, lsl #24 │ │ - stc2l 7, cr9, [r0, #664]! @ 0x298 │ │ - ldc2l 8, cr13, [pc, #1020] @ 2435dcc │ │ - ldc2l 14, cr15, [lr, #948] @ 0x3b4 │ │ + stc2l 7, cr9, [r0, #844]! @ 0x34c │ │ + ldc2l 9, cr13, [pc, #88] @ 2435a28 @ │ │ + ldc2l 15, cr15, [lr, #104] @ 0x68 │ │ movteq sl, #3496 @ 0xda8 │ │ - ldc2l 4, cr14, [pc, #956] @ 2435d98 │ │ - ldc2l 10, cr0, [pc, #884] @ 2435d54 @ │ │ + ldc2l 5, cr14, [pc, #112] @ 2435a4c │ │ + ldc2l 11, cr0, [pc, #40] @ 2435a08 @ │ │ @ instruction: 0x019d5bd8 │ │ orrseq r5, sp, r0, asr #22 │ │ @ instruction: 0x019d5bb4 │ │ andeq r3, r2, #112, 8 @ 0x70000000 │ │ orrseq r5, sp, r8, ror #23 │ │ - ldc2l 10, cr0, [pc, #436] @ 2435bac @ │ │ - ldc2l 4, cr10, [pc, #956] @ 2435db8 │ │ - ldc2l 5, cr10, [pc, #196] @ 2435ac4 │ │ - ldc2l 1, cr14, [lr, #728] @ 0x2d8 │ │ + ldc2l 10, cr0, [pc, #616] @ 2435c60 @ │ │ + ldc2l 5, cr10, [pc, #112] @ 2435a6c │ │ + ldc2l 5, cr10, [pc, #376] @ 2435b78 │ │ + ldc2l 1, cr14, [lr, #908] @ 0x38c │ │ orrseq r5, sp, r4, lsr fp │ │ - ldc2l 7, cr8, [pc, #528] @ 2435c1c │ │ + ldc2l 7, cr8, [pc, #708] @ 2435cd0 │ │ mvnseq r7, r4, ror r0 │ │ orrseq r5, sp, r8, lsr sl │ │ orrseq r5, sp, r4, lsr #20 │ │ - ldc2l 6, cr8, [pc, #512] @ 2435c1c │ │ + ldc2l 6, cr8, [pc, #692] @ 2435cd0 │ │ mvnseq r6, r0, ror pc │ │ @ instruction: 0x019d5af4 │ │ - ldc2l 7, cr8, [pc, #272] @ 2435b38 │ │ + ldc2l 7, cr8, [pc, #452] @ 2435bec │ │ mvnseq r7, r4, lsr r0 │ │ orrseq r5, sp, ip, asr #19 │ │ - ldc2l 3, cr14, [pc, #140] @ 2435ac0 │ │ + ldc2l 3, cr14, [pc, #320] @ 2435b74 │ │ orrseq r5, sp, r4, lsl sl │ │ orrseq r5, sp, ip, ror #19 │ │ - ldc2l 7, cr6, [lr, #908] @ 0x38c │ │ + ldc2l 8, cr6, [lr, #64] @ 0x40 │ │ orrseq r5, sp, r0, asr #22 │ │ ldrheq sp, [ip, #136] @ 0x88 │ │ orrseq r5, sp, r8, lsl fp │ │ orrseq r5, sp, r8, lsl #22 │ │ teqeq r4, #128, 6 │ │ orrseq r5, sp, r4, lsl #19 │ │ rsbeq sl, r5, #12, 30 @ 0x30 │ │ teqeq r4, #76, 6 @ 0x30000001 │ │ movteq fp, #1716 @ 0x6b4 │ │ rsceq sl, r4, #116, 14 @ 0x1d00000 │ │ adceq r2, r5, #204, 20 @ 0xcc000 │ │ @ instruction: 0x032423fc │ │ - ldc2l 1, cr14, [lr, #936] @ 0x3a8 │ │ - ldc2l 1, cr14, [pc, #156] @ 2435b14 │ │ - ldc2l 7, cr0, [pc, #84] @ 2435ad0 │ │ + ldc2l 2, cr14, [lr, #92] @ 0x5c │ │ + ldc2l 1, cr14, [pc, #336] @ 2435bc8 │ │ + ldc2l 7, cr0, [pc, #264] @ 2435b84 │ │ orrseq r5, sp, r4, lsl r8 │ │ orrseq r5, sp, ip, ror r7 │ │ @ instruction: 0x019d57f0 │ │ andeq r0, r4, #152, 10 @ 0x26000000 │ │ orrseq r5, sp, r0, lsr r8 │ │ - ldc2l 6, cr0, [pc, #660] @ 2435d28 │ │ + ldc2l 6, cr0, [pc, #840] @ 2435ddc │ │ movteq fp, #624 @ 0x270 │ │ orrseq r5, sp, r0, lsr #10 │ │ mvnseq sp, r8, lsr r4 │ │ mvnseq r6, ip, ror sl │ │ andeq r2, r2, #140, 26 @ 0x2300 │ │ ldrheq r0, [pc, #12] @ 2435ab8 │ │ - stc2l 8, cr1, [r0, #972]! @ 0x3cc │ │ - ldc2l 1, cr10, [pc, #132] @ 2435b38 │ │ - stc2l 12, cr3, [r0, #644]! @ 0x284 │ │ + stc2l 9, cr1, [r0, #64]! @ 0x40 @ │ │ + ldc2l 1, cr10, [pc, #312] @ 2435bec │ │ + stc2l 12, cr3, [r0, #824]! @ 0x338 │ │ orrseq r5, sp, r8, lsr #15 │ │ - ldc2l 3, cr8, [pc, #992] @ 2435ea0 │ │ + ldc2l 4, cr8, [pc, #148] @ 2435b54 │ │ mvnseq r6, r8, ror #25 │ │ orrseq r5, sp, ip, lsr #13 │ │ orrseq r5, sp, r8, lsr #13 │ │ - ldc2l 2, cr8, [pc, #976] @ 2435ea0 │ │ + ldc2l 3, cr8, [pc, #132] @ 2435b54 │ │ mvnseq r6, r4, ror #23 │ │ eorseq sp, r4, #12, 16 @ 0xc0000 │ │ orrseq r5, sp, r8, ror #14 │ │ - ldc2l 3, cr8, [pc, #736] @ 2435dc0 │ │ + ldc2l 3, cr8, [pc, #916] @ 2435e74 │ │ mvnseq r6, r8, lsr #25 │ │ orrseq r5, sp, r0, asr #12 │ │ - ldc2l 15, cr13, [pc, #548] @ 2435d10 │ │ + ldc2l 15, cr13, [pc, #728] @ 2435dc4 │ │ orrseq r5, sp, r8, lsl #13 │ │ orrseq r5, sp, ip, lsl #12 │ │ orrseq r5, sp, r4, ror #12 │ │ - ldc2l 13, cr13, [sp, #760] @ 0x2f8 │ │ + ldc2l 13, cr13, [sp, #940] @ 0x3ac │ │ orrseq r5, sp, r8, asr #11 │ │ orrseq r5, sp, r0, lsl #15 │ │ teqeq r3, #208, 30 @ 0x340 @ │ │ @ instruction: 0x019d55d4 │ │ rsbeq sl, r5, #92, 22 @ 0x17000 │ │ teqeq r3, #156, 30 @ 0x270 @ │ │ movteq fp, #772 @ 0x304 │ │ rsceq sl, r4, #196, 6 @ 0x10000003 │ │ adceq r2, r5, #28, 14 @ 0x700000 │ │ @ instruction: 0x0324204c │ │ - stc2l 13, cr3, [r0, #196]! @ 0xc4 │ │ + stc2l 13, cr3, [r0, #376]! @ 0x178 │ │ orrseq r5, sp, r0, asr #7 │ │ - ldc2l 13, cr13, [pc, #108] @ 2435b9c │ │ - ldc2l 3, cr0, [pc, #36] @ 2435b58 │ │ - ldc2l 5, cr14, [pc, #292] @ 2435c5c │ │ - ldc2l 11, cr0, [pc, #276] @ 2435c50 @ │ │ + ldc2l 13, cr13, [pc, #288] @ 2435c50 │ │ + ldc2l 3, cr0, [pc, #216] @ 2435c0c │ │ + ldc2l 5, cr14, [pc, #472] @ 2435d10 │ │ + ldc2l 11, cr0, [pc, #456] @ 2435d04 @ │ │ orrseq r5, sp, r4, ror r3 │ │ orrseq r5, sp, r0, lsl #8 │ │ eorseq sp, r4, #228, 10 @ 0x39000000 │ │ @ instruction: 0x019d53dc │ │ andeq r0, r4, #136, 2 @ 0x22 │ │ - ldc2l 2, cr0, [pc, #612] @ 2435db8 │ │ + ldc2l 2, cr0, [pc, #792] @ 2435e6c │ │ movteq sl, #3676 @ 0xe5c │ │ orrseq r5, sp, ip, lsl #2 │ │ mvnseq sp, r4, lsr #32 │ │ mvnseq r6, r8, ror #12 │ │ andeq r2, r2, #120, 18 @ 0x1e0000 │ │ mvnseq pc, r8, lsr #25 │ │ - stc2l 4, cr1, [r0, #892]! @ 0x37c │ │ - ldc2l 13, cr9, [pc, #52] @ 2435ba8 │ │ - stc2l 7, cr11, [r0, #72]! @ 0x48 │ │ + stc2l 5, cr1, [r0, #48]! @ 0x30 │ │ + ldc2l 13, cr9, [pc, #232] @ 2435c5c │ │ + stc2l 7, cr11, [r0, #252]! @ 0xfc │ │ orrseq r5, sp, r8, lsl #7 │ │ orrseq r5, sp, r0, ror r3 │ │ - ldc2l 15, cr7, [pc, #768] @ 2435e84 │ │ + ldc2l 15, cr7, [pc, #948] @ 2435f38 │ │ orrseq r5, sp, r0, lsl #5 │ │ orrseq r5, sp, ip, ror r2 │ │ - ldc2l 14, cr7, [pc, #800] @ 2435eb0 │ │ + ldc2l 14, cr7, [pc, #980] @ 2435f64 │ │ eorseq sp, r4, #232, 6 @ 0xa0000003 │ │ orrseq r5, sp, r8, lsr r3 │ │ - ldc2l 15, cr7, [pc, #544] @ 2435dbc │ │ + ldc2l 15, cr7, [pc, #724] @ 2435e70 │ │ orrseq r5, sp, r8, lsl r2 │ │ - ldc2l 11, cr13, [pc, #388] @ 2435d28 @ │ │ + ldc2l 11, cr13, [pc, #568] @ 2435ddc @ │ │ orrseq r5, sp, r0, ror #4 │ │ orrseq r5, sp, r0, asr #5 │ │ orrseq r5, sp, r0, ror #3 │ │ orrseq r5, sp, r4, lsr r2 │ │ - ldc2l 9, cr13, [sp, #308] @ 0x134 @ │ │ + ldc2l 9, cr13, [sp, #398] @ 0x18e @ │ │ orrseq r5, sp, r4, lsr #3 │ │ orrseq r5, sp, r0, asr r3 │ │ teqeq r3, #176, 22 @ 0x2c000 @ │ │ @ instruction: 0x019d51b4 │ │ rsbeq sl, r5, #60, 14 @ 0xf00000 │ │ teqeq r3, #124, 22 @ 0x1f000 @ │ │ movteq sl, #3812 @ 0xee4 │ │ rsceq r9, r4, #164, 30 @ 0x290 │ │ adceq r2, r5, #252, 4 @ 0xc000000f │ │ @ instruction: 0x03241c2c │ │ - stc2l 7, cr11, [r0, #600]! @ 0x258 │ │ - stc2l 3, cr13, [r0, #308]! @ 0x134 │ │ - ldc2l 8, cr13, [lr, #996] @ 0x3e4 │ │ - stc2l 5, cr11, [r0, #388]! @ 0x184 │ │ - ldc2l 7, cr13, [lr, #788] @ 0x314 │ │ - ldc2l 7, cr13, [lr, #676] @ 0x2a4 │ │ + stc2l 7, cr11, [r0, #780]! @ 0x30c │ │ + stc2l 3, cr13, [r0, #488]! @ 0x1e8 │ │ + ldc2l 9, cr13, [lr, #76] @ 0x4c @ │ │ + stc2l 5, cr11, [r0, #568]! @ 0x238 │ │ + ldc2l 7, cr13, [lr, #968] @ 0x3c8 │ │ + ldc2l 7, cr13, [lr, #856] @ 0x358 │ │ │ │ 02435bf4 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 2435c10 │ │ @@ -1291893,16 +1291892,16 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #4 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ stc2l 5, cr10, [r1, #200]! @ 0xc8 │ │ - ldc2l 2, cr13, [sp, #784] @ 0x310 │ │ - vcmla.f16 d20, d1, d17, #270 │ │ + ldc2l 2, cr13, [sp, #964] @ 0x3c4 │ │ + vcmla.f16 q10, , q7, #270 │ │ │ │ 02435c64 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #104 @ 0x68 │ │ mov r0, #0 │ │ mov r1, #0 │ │ @@ -1292714,15 +1292713,15 @@ │ │ bl 270e440 │ │ mov r0, r8 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 12, cr8, [pc, #476] @ 2436a74 │ │ + ldc2l 12, cr8, [pc, #656] @ 2436b28 │ │ teqeq r3, #236, 18 @ 0x3b0000 │ │ movteq r9, #3384 @ 0xd38 │ │ orrseq r3, sp, r8, ror #30 │ │ @ instruction: 0x03240a7c │ │ rsbeq r9, r5, #60, 10 @ 0xf000000 │ │ eorseq r0, r2, ip, lsl r6 │ │ │ │ @@ -1294096,61 +1294095,61 @@ │ │ ldr r0, [pc, r0] │ │ ldr r0, [r0] │ │ bl 270e1e0 │ │ ldr r1, [sl] │ │ mov r0, r7 │ │ b 2437d84 │ │ eoreq pc, pc, ip, ror pc @ │ │ - stc2l 8, cr2, [r1, #1012]! @ 0x3f4 │ │ + stc2l 9, cr2, [r1, #84]! @ 0x54 @ │ │ eorseq r3, r0, r4, ror #10 │ │ - stc2l 10, cr2, [r1, #388]! @ 0x184 @ │ │ + stc2l 10, cr2, [r1, #568]! @ 0x238 @ │ │ ldrsbteq r3, [r0], -r0 │ │ - stc2l 10, cr2, [r1, #660]! @ 0x294 @ │ │ + stc2l 10, cr2, [r1, #840]! @ 0x348 @ │ │ eorseq r3, r0, r4, lsl r7 │ │ - stc2l 11, cr2, [r1, #180]! @ 0xb4 @ │ │ + stc2l 11, cr2, [r1, #360]! @ 0x168 @ │ │ mlaseq r0, ip, r7, r3 │ │ - stc2l 10, cr2, [r1, #116]! @ 0x74 @ │ │ + stc2l 10, cr2, [r1, #296]! @ 0x128 @ │ │ eorseq r3, r0, ip, lsl #13 │ │ - stc2l 12, cr2, [r1, #260]! @ 0x104 │ │ + stc2l 12, cr2, [r1, #440]! @ 0x1b8 │ │ ldrhteq r3, [r0], -r0 │ │ - stc2l 10, cr2, [r1, #932]! @ 0x3a4 @ │ │ + stc2l 11, cr2, [r1, #88]! @ 0x58 @ │ │ eorseq r3, r0, r8, asr r7 │ │ - stc2l 14, cr2, [r1, #84]! @ 0x54 │ │ + stc2l 14, cr2, [r1, #264]! @ 0x108 │ │ eorseq r3, r0, r4, lsl #21 │ │ - stc2l 13, cr2, [r1, #852]! @ 0x354 │ │ + stc2l 14, cr2, [r1, #8]! │ │ eorseq r3, r0, r4, asr #20 │ │ - stc2l 13, cr2, [r1, #580]! @ 0x244 │ │ + stc2l 13, cr2, [r1, #760]! @ 0x2f8 │ │ eorseq r3, r0, r0, lsl #20 │ │ - stc2l 13, cr2, [r1, #116]! @ 0x74 │ │ + stc2l 13, cr2, [r1, #296]! @ 0x128 │ │ eorseq r3, r0, ip, lsl #19 │ │ - ldc2l 3, cr4, [pc, #768] @ 24381b0 │ │ - stc2l 11, cr2, [r1, #500]! @ 0x1f4 @ │ │ + ldc2l 3, cr4, [pc, #948] @ 2438264 │ │ + stc2l 11, cr2, [r1, #680]! @ 0x2a8 @ │ │ eorseq r3, r0, ip, ror #15 │ │ eorseq r0, r0, ip, asr #3 │ │ - stc2l 11, cr2, [r1, #756]! @ 0x2f4 @ │ │ + stc2l 11, cr2, [r1, #936]! @ 0x3a8 @ │ │ eorseq r3, r0, ip, lsr #16 │ │ - stc2l 12, cr2, [r1, #4]! │ │ + stc2l 12, cr2, [r1, #184]! @ 0xb8 │ │ eorseq r3, r0, r0, ror r8 │ │ - stc2l 15, cr2, [r1, #708]! @ 0x2c4 │ │ + stc2l 15, cr2, [r1, #888]! @ 0x378 │ │ eorseq r3, r0, r0, lsr #24 │ │ eorseq r3, r0, ip, ror #24 │ │ eorseq r3, r0, r8, lsl sp │ │ eorseq r3, r0, r4, lsr #20 │ │ eorseq r3, r0, ip, lsr #16 │ │ eorseq r3, r0, r4, asr #20 │ │ eorseq r3, r0, r4, lsr sl │ │ eorseq r3, r0, r8, lsr lr │ │ - stc2l 14, cr2, [r1, #372]! @ 0x174 │ │ + stc2l 14, cr2, [r1, #552]! @ 0x228 │ │ eorseq r3, r0, ip, asr #21 │ │ eorseq r0, r0, r8, lsr #9 │ │ eorseq r3, r0, r8, ror r9 │ │ - stc2l 9, cr2, [r1, #426]! @ 0x1aa @ │ │ + stc2l 10, cr2, [r1, #8]! @ │ │ eorseq r3, r0, r4, asr #12 │ │ eorseq r3, r0, r0, asr #12 │ │ - stc2l 8, cr2, [r1, #740]! @ 0x2e4 │ │ + vcmla.f16 q9, , q11, #270 │ │ eorseq r3, r0, r0, lsr #10 │ │ │ │ 02437f10 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ stm sp, {r0, r2} │ │ @@ -1294428,24 +1294427,24 @@ │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ eorseq r3, r0, r8, ror r4 │ │ movteq r1, #11380 @ 0x2c74 │ │ eorseq r3, r0, ip, ror #8 │ │ eorseq r3, r0, r8, ror #8 │ │ eorseq r3, r0, r0, lsr r4 │ │ - stc2l 8, cr10, [r0, #80]! @ 0x50 │ │ + vcmla.f16 q13, q0, , #270 │ │ eorseq r3, r0, ip, asr #32 │ │ eoreq pc, pc, r4, lsr sl @ │ │ eorseq r3, r0, r0, asr r0 │ │ - ldc2l 9, cr14, [pc, #6] @ 2438396 @ │ │ + ldc2l 9, cr14, [pc, #96] @ 24383f0 @ │ │ eorseq r3, r0, ip, ror r1 │ │ mlaseq r0, ip, r1, r3 │ │ eorseq r3, r0, ip, lsr r1 │ │ eorseq r3, r0, r0, asr #1 │ │ - stc2l 3, cr2, [r1, #932]! @ 0x3a4 │ │ + stc2l 4, cr2, [r1, #88]! @ 0x58 │ │ eorseq r3, r0, r4, asr #5 │ │ ldrhteq r3, [r0], -r4 │ │ eorseq r3, r0, ip, ror #4 │ │ eorseq r3, r0, r4, ror #5 │ │ eorseq r3, r0, r4, ror #3 │ │ ldrsbteq r3, [r0], -ip │ │ eorseq r3, r0, r8, lsl #5 │ │ @@ -1294455,15 +1294454,15 @@ │ │ eorseq r3, r0, r4, lsl r3 │ │ ldrsbteq r3, [r0], -ip │ │ eorseq r3, r0, r0, asr #3 │ │ ldrsbteq r3, [r0], -r4 │ │ ldrsbteq r3, [r0], -r8 │ │ eorseq r3, r0, r8, ror #3 │ │ ldrshteq r3, [r0], -r0 │ │ - stc2l 4, cr2, [r1, #196]! @ 0xc4 │ │ + stc2l 4, cr2, [r1, #376]! @ 0x178 │ │ │ │ 024383e8 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #8 │ │ mov r0, #1 │ │ mov r1, #0 │ │ @@ -1294578,22 +1294577,22 @@ │ │ bl 270e230 │ │ add r0, sp, #16 │ │ mov r1, #320 @ 0x140 │ │ bl 270d990 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 9, cr12, [pc, #8] @ 24385c8 @ │ │ + ldc2l 9, cr12, [pc, #98] @ 2438622 @ │ │ ldrhteq lr, [r1], -r8 │ │ - ldc2l 12, cr8, [lr, #16] │ │ + ldc2l 12, cr8, [lr, #196] @ 0xc4 │ │ movteq r2, #10696 @ 0x29c8 │ │ stc2l 5, cr4, [r1, #112]! @ 0x70 │ │ eorseq lr, r1, r0, asr r9 │ │ eorseq lr, r1, ip, lsl r9 │ │ - ldc2l 11, cr8, [lr, #528] @ 0x210 @ │ │ + ldc2l 11, cr8, [lr, #708] @ 0x2c4 @ │ │ movteq r2, #10568 @ 0x2948 │ │ │ │ 024385dc : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ ldr r6, [fp, #8] │ │ @@ -1295111,21 +1295110,21 @@ │ │ andeq r0, r0, r5, asr r0 │ │ andeq r0, r0, r6, asr r0 │ │ andeq r0, r0, r7, asr r0 │ │ andeq r0, r0, r8, asr r0 │ │ movteq r2, #9096 @ 0x2388 │ │ movteq r2, #8948 @ 0x22f4 │ │ movteq r2, #8948 @ 0x22f4 │ │ - ldc2l 10, cr14, [lr, #684] @ 0x2ac @ │ │ - ldc2l 10, cr14, [lr, #696] @ 0x2b8 @ │ │ + ldc2l 10, cr14, [lr, #864] @ 0x360 @ │ │ + ldc2l 10, cr14, [lr, #876] @ 0x36c @ │ │ movteq r2, #8844 @ 0x228c │ │ movteq r2, #9064 @ 0x2368 │ │ movteq r2, #9048 @ 0x2358 │ │ - ldc2l 11, cr14, [lr, #156] @ 0x9c @ │ │ - ldc2l 11, cr14, [lr, #168] @ 0xa8 @ │ │ + ldc2l 11, cr14, [lr, #336] @ 0x150 @ │ │ + ldc2l 11, cr14, [lr, #348] @ 0x15c @ │ │ movteq r2, #8968 @ 0x2308 │ │ movteq r2, #8736 @ 0x2220 │ │ movteq r2, #8732 @ 0x221c │ │ │ │ 02438e24 : │ │ push {fp, lr} │ │ mov fp, sp │ │ @@ -1295184,15 +1295183,15 @@ │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, r4 │ │ cmp r4, #0 │ │ movwne r0, #1 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 6, cr0, [pc, #736] @ 24391f0 │ │ + ldc2l 6, cr0, [pc, #916] @ 24392a4 │ │ │ │ 02438f0c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ push {r2} @ (str r2, [sp, #-4]!) │ │ ldr r4, [r1] │ │ mov r7, r0 │ │ @@ -1295459,21 +1295458,21 @@ │ │ ldr r0, [pc, #44] @ 2439354 │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 8, cr0, [lr, #488] @ 0x1e8 │ │ - ldc2l 0, cr2, [pc, #372] @ 24394bc │ │ - ldc2l 15, cr5, [pc, #676] @ 24395f0 │ │ - stc2l 13, cr3, [r0, #816]! @ 0x330 │ │ - ldc2l 11, cr9, [lr, #820] @ 0x334 @ │ │ + vcadd.f32 d16, d30, d23, #270 │ │ + ldc2l 0, cr2, [pc, #552] @ 2439570 │ │ + ldc2l 15, cr5, [pc, #856] @ 24396a4 │ │ + stc2l 13, cr3, [r0, #996]! @ 0x3e4 │ │ + ldc2l 11, cr9, [lr, #1000] @ 0x3e8 @ │ │ stc2l 14, cr6, [r1, #864]! @ 0x360 │ │ - ldc2l 5, cr0, [lr, #264] @ 0x108 │ │ + ldc2l 5, cr0, [lr, #444] @ 0x1bc │ │ │ │ 02439358 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ bl 270dc80 │ │ mov r1, r0 │ │ @@ -1295669,19 +1295668,19 @@ │ │ ldr r0, [pc, #36] @ 2439664 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 9, cr7, [r0, #184]! @ 0xb8 @ │ │ + stc2l 9, cr7, [r0, #274]! @ 0x112 @ │ │ stc2l 15, cr4, [r1, #448]! @ 0x1c0 │ │ - stc2l 10, cr5, [r0, #320]! @ 0x140 @ │ │ - ldc2l 7, cr9, [pc, #964] @ 2439a2c │ │ - vcmla.f16 d23, d0, d16, #270 │ │ + stc2l 10, cr5, [r0, #500]! @ 0x1f4 @ │ │ + ldc2l 8, cr9, [pc, #120] @ 24396e0 │ │ + vcmla.f16 , q0, , #270 │ │ │ │ 02439668 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ mov r8, r3 │ │ mov r4, r2 │ │ mov r9, r1 │ │ @@ -1295748,19 +1295747,19 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #32] @ 2439798 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 15, cr1, [lr, #620] @ 0x26c │ │ + ldc2l 15, cr1, [lr, #800] @ 0x320 │ │ stc2l 14, cr4, [r1, #224]! @ 0xe0 │ │ - stc2l 9, cr5, [r0, #48]! @ 0x30 @ │ │ - ldc2l 6, cr9, [pc, #740] @ 2439a80 │ │ - ldc2l 14, cr1, [lr, #764] @ 0x2fc │ │ + stc2l 9, cr5, [r0, #138]! @ 0x8a @ │ │ + ldc2l 6, cr9, [pc, #920] @ 2439b34 │ │ + ldc2l 14, cr1, [lr, #944] @ 0x3b0 │ │ │ │ 0243979c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #36 @ 0x24 │ │ mov r4, r3 │ │ mov r6, r2 │ │ @@ -1295871,19 +1295870,19 @@ │ │ ldr r0, [pc, #36] @ 243997c │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 0, cr0, [lr, #656] @ 0x290 │ │ - ldc2l 7, cr3, [lr, #956] @ 0x3bc │ │ - ldc2l 5, cr9, [lr, #548] @ 0x224 │ │ - ldc2l 4, cr15, [pc, #440] @ 2439b38 │ │ - ldc2l 15, cr15, [sp, #96] @ 0x60 │ │ + ldc2l 0, cr0, [lr, #836] @ 0x344 │ │ + ldc2l 8, cr3, [lr, #112] @ 0x70 │ │ + ldc2l 5, cr9, [lr, #728] @ 0x2d8 │ │ + ldc2l 4, cr15, [pc, #620] @ 2439bec │ │ + ldc2l 15, cr15, [sp, #276] @ 0x114 │ │ │ │ 02439980 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ ldr r4, [r1] │ │ mov r7, #0 │ │ @@ -1296390,34 +1296389,34 @@ │ │ nop {0} │ │ @ instruction: 0x97d889bc │ │ lfmcc f5, 1, [ip], {178} @ 0xb2 │ │ strbcc r8, [r0, r0]! │ │ movtmi ip, #4985 @ 0x1379 │ │ ldmibls r9, {r1, r3, r4, r7, r8, fp, ip, pc} │ │ svccc 0x00b99999 │ │ - ldc2l 1, cr13, [sp, #92] @ 0x5c │ │ + ldc2l 1, cr13, [sp, #272] @ 0x110 │ │ stc2l 2, cr15, [r9, #720]! @ 0x2d0 │ │ stc2l 2, cr15, [r9, #128]! @ 0x80 │ │ - ldc2l 2, cr9, [pc, #240] @ 243a26c │ │ - ldc2l 3, cr11, [sp, #288] @ 0x120 │ │ - ldc2l 15, cr10, [pc, #132] @ 243a208 │ │ - ldc2l 3, cr11, [sp, #32] │ │ + ldc2l 2, cr9, [pc, #420] @ 243a320 │ │ + ldc2l 3, cr11, [sp, #468] @ 0x1d4 │ │ + ldc2l 15, cr10, [pc, #312] @ 243a2bc │ │ + ldc2l 3, cr11, [sp, #212] @ 0xd4 │ │ stc2l 1, cr15, [r9, #400]! @ 0x190 │ │ - ldc2l 3, cr1, [pc, #28] @ 243a1ac │ │ - ldc2l 2, cr11, [sp, #288] @ 0x120 │ │ - vcadd.f32 , , q5, #270 │ │ + ldc2l 3, cr1, [pc, #208] @ 243a260 │ │ + ldc2l 2, cr11, [sp, #468] @ 0x1d4 │ │ + ldc2l 8, cr13, [sp, #476] @ 0x1dc │ │ stc2l 1, cr15, [r9, #32]! │ │ - ldc2l 1, cr11, [sp, #784] @ 0x310 │ │ - ldc2l 7, cr13, [sp, #936] @ 0x3a8 │ │ - ldc2l 2, cr1, [pc, #396] @ 243a334 │ │ + ldc2l 1, cr11, [sp, #964] @ 0x3c4 │ │ + ldc2l 8, cr13, [sp, #92] @ 0x5c │ │ + ldc2l 2, cr1, [pc, #576] @ 243a3e8 │ │ stc2l 9, cr2, [r1, #426]! @ 0x1aa @ │ │ - ldc2l 11, cr12, [pc, #648] @ 243a438 @ │ │ + ldc2l 11, cr12, [pc, #828] @ 243a4ec @ │ │ ldrhteq ip, [r1], -ip │ │ - ldc2l 15, cr10, [pc, #720] @ 243a488 │ │ - stc2l 13, cr8, [r0, #44]! @ 0x2c │ │ + ldc2l 15, cr10, [pc, #900] @ 243a53c │ │ + stc2l 13, cr8, [r0, #224]! @ 0xe0 │ │ ldrhteq sp, [r1], -r4 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 0243a1c0 : │ │ push {fp, lr} │ │ mov fp, sp │ │ vldr d16, [r0] │ │ @@ -1296531,15 +1296530,15 @@ │ │ movlt r7, r0 │ │ mov r0, r5 │ │ mov r2, r7 │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 10, cr12, [sp, #892] @ 0x37c @ │ │ + ldc2l 11, cr12, [sp, #48] @ 0x30 @ │ │ │ │ 0243a380 : │ │ ldr r2, [pc, #32] @ 243a3a8 │ │ cmp r0, #1 │ │ add r2, pc, r2 │ │ mov r0, r2 │ │ moveq r0, r1 │ │ @@ -1296742,31 +1296741,31 @@ │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ ldr r0, [pc, #32] @ 243a68c │ │ add r0, pc, r0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r8, r9, sl, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 0, cr7, [lr, #560] @ 0x230 │ │ - stc2l 14, cr15, [r0, #240]! @ 0xf0 │ │ - vcadd.f32 q12, q15, , #270 │ │ - ldc2l 4, cr6, [lr, #412] @ 0x19c │ │ - stc2l 3, cr8, [r0, #368]! @ 0x170 │ │ - ldc2l 15, cr6, [lr, #416] @ 0x1a0 │ │ - ldc2l 11, cr0, [pc, #840] @ 243a9e0 @ │ │ - vcadd.f32 q12, q15, , #270 │ │ - ldc2l 4, cr6, [lr, #284] @ 0x11c │ │ - ldc2l 12, cr0, [lr, #888] @ 0x378 │ │ - stc2l 13, cr15, [r0, #1008]! @ 0x3f0 │ │ - vcadd.f32 d24, d30, d17, #270 │ │ - ldc2l 3, cr14, [lr, #508] @ 0x1fc │ │ - ldc2l 11, cr0, [pc, #536] @ 243a8cc @ │ │ - ldc2l 8, cr8, [lr, #468] @ 0x1d4 │ │ - ldc2l 3, cr14, [lr, #332] @ 0x14c │ │ - ldc2l 0, cr7, [lr, #80] @ 0x50 │ │ + ldc2l 0, cr7, [lr, #740] @ 0x2e4 │ │ + stc2l 14, cr15, [r0, #420]! @ 0x1a4 │ │ + ldc2l 9, cr8, [lr, #28] @ │ │ + ldc2l 4, cr6, [lr, #592] @ 0x250 │ │ + stc2l 3, cr8, [r0, #548]! @ 0x224 │ │ + ldc2l 15, cr6, [lr, #596] @ 0x254 │ │ + ldc2l 11, cr0, [pc, #1020] @ 243aa94 @ │ │ + vcadd.f32 q12, q15, q15, #270 │ │ + ldc2l 4, cr6, [lr, #464] @ 0x1d0 │ │ + ldc2l 13, cr0, [lr, #44] @ 0x2c │ │ + stc2l 14, cr15, [r0, #164]! @ 0xa4 │ │ + vcadd.f32 q12, q15, q7, #270 │ │ + ldc2l 3, cr14, [lr, #688] @ 0x2b0 │ │ + ldc2l 11, cr0, [pc, #716] @ 243a980 @ │ │ + vcadd.f32 d24, d30, d18, #270 │ │ + ldc2l 3, cr14, [lr, #512] @ 0x200 │ │ + ldc2l 0, cr7, [lr, #260] @ 0x104 │ │ │ │ 0243a6bc : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r5, r3 │ │ mov r7, r2 │ │ @@ -1296872,32 +1296871,32 @@ │ │ ldr r0, [pc, #88] @ 243a8bc │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 4, cr8, [r0, #304]! @ 0x130 │ │ + stc2l 4, cr8, [r0, #484]! @ 0x1e4 │ │ movteq r0, #11244 @ 0x2bec │ │ movteq r0, #11260 @ 0x2bfc │ │ movteq r0, #11256 @ 0x2bf8 │ │ movteq r0, #11212 @ 0x2bcc │ │ movteq r0, #11232 @ 0x2be0 │ │ movteq r0, #11216 @ 0x2bd0 │ │ movteq r0, #11180 @ 0x2bac │ │ movteq r0, #11133 @ 0x2b7d │ │ movteq r0, #11180 @ 0x2bac │ │ - ldc2l 12, cr0, [pc, #188] @ 243a964 │ │ - ldc2l 7, cr8, [lr, #4] │ │ - ldc2l 15, cr12, [sp, #836] @ 0x344 │ │ - ldc2l 6, cr8, [lr, #500] @ 0x1f4 │ │ - ldc2l 15, cr12, [sp, #948] @ 0x3b4 │ │ - ldc2l 6, cr8, [lr, #660] @ 0x294 │ │ - ldc2l 9, cr10, [sp, #254] @ 0xfe @ │ │ - stc2l 2, cr8, [r0, #864]! @ 0x360 │ │ + ldc2l 12, cr0, [pc, #368] @ 243aa18 │ │ + ldc2l 7, cr8, [lr, #184] @ 0xb8 │ │ + ldc2l 15, cr12, [sp, #1016] @ 0x3f8 │ │ + ldc2l 6, cr8, [lr, #680] @ 0x2a8 │ │ + ldc2l 0, cr13, [sp, #104] @ 0x68 │ │ + ldc2l 6, cr8, [lr, #840] @ 0x348 │ │ + ldc2l 9, cr10, [sp, #344] @ 0x158 @ │ │ + stc2l 3, cr8, [r0, #20]! │ │ │ │ 0243a8c0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ sub sp, sp, #8 │ │ @@ -1297394,57 +1297393,57 @@ │ │ ldr r2, [pc, #164] @ 243b128 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ str r1, [r2] │ │ mov r1, #255 @ 0xff │ │ bl 270e9d0 │ │ b 243aa64 │ │ - stc2l 13, cr11, [r0, #996]! @ 0x3e4 │ │ - ldc2l 9, cr2, [lr, #384] @ 0x180 @ │ │ - stc2l 10, cr15, [r0, #212]! @ 0xd4 @ │ │ - ldc2l 10, cr2, [lr, #700] @ 0x2bc @ │ │ + stc2l 14, cr11, [r0, #152]! @ 0x98 │ │ + ldc2l 9, cr2, [lr, #474] @ 0x1da @ │ │ + stc2l 10, cr15, [r0, #392]! @ 0x188 @ │ │ + ldc2l 10, cr2, [lr, #880] @ 0x370 @ │ │ movteq r0, #10620 @ 0x297c │ │ movteq r0, #10528 @ 0x2920 │ │ - ldc2l 10, cr14, [lr, #920] @ 0x398 @ │ │ + ldc2l 11, cr14, [lr, #76] @ 0x4c @ │ │ movteq r0, #10510 @ 0x290e │ │ - ldc2l 9, cr4, [pc, #384] @ 243b240 @ │ │ + ldc2l 9, cr4, [pc, #474] @ 243b29a @ │ │ eorseq ip, r1, ip, ror #24 │ │ eorseq ip, r1, ip, lsl #25 │ │ movteq r0, #10356 @ 0x2874 │ │ movteq r0, #10452 @ 0x28d4 │ │ movteq r0, #10436 @ 0x28c4 │ │ movteq r0, #9780 @ 0x2634 │ │ movteq r0, #9756 @ 0x261c │ │ movteq r0, #9852 @ 0x267c │ │ movteq r0, #9824 @ 0x2660 │ │ movteq r0, #9684 @ 0x25d4 │ │ movteq r0, #9760 @ 0x2620 │ │ movteq r0, #9092 @ 0x2384 │ │ movteq r0, #9756 @ 0x261c │ │ eorseq ip, r1, r8, lsl #12 │ │ - ldc2l 4, cr2, [lr, #108] @ 0x6c │ │ - ldc2l 14, cr14, [sp, #1004] @ 0x3ec │ │ + ldc2l 4, cr2, [lr, #288] @ 0x120 │ │ + ldc2l 15, cr14, [sp, #160] @ 0xa0 │ │ movteq r0, #10796 @ 0x2a2c │ │ - ldc2l 14, cr14, [sp, #860] @ 0x35c │ │ - ldc2l 3, cr12, [sp, #764] @ 0x2fc │ │ + ldc2l 15, cr14, [sp, #16] │ │ + ldc2l 3, cr12, [sp, #944] @ 0x3b0 │ │ mlaseq r1, r4, r9, ip │ │ mlaseq r1, r0, r8, ip │ │ movteq r0, #9720 @ 0x25f8 │ │ movteq r0, #9672 @ 0x25c8 │ │ - ldc2l 0, cr12, [sp, #12] │ │ + ldc2l 0, cr12, [sp, #192] @ 0xc0 │ │ movteq r0, #9136 @ 0x23b0 │ │ movteq r0, #9124 @ 0x23a4 │ │ ldrsbteq ip, [r1], -r0 │ │ movteq r0, #9008 @ 0x2330 │ │ movteq r0, #9182 @ 0x23de │ │ movteq r0, #9696 @ 0x25e0 │ │ movteq r0, #9140 @ 0x23b4 │ │ movteq r0, #9128 @ 0x23a8 │ │ - ldc2l 13, cr11, [sp, #956] @ 0x3bc │ │ - ldc2l 14, cr14, [sp, #60] @ 0x3c │ │ + ldc2l 14, cr11, [sp, #112] @ 0x70 │ │ + ldc2l 14, cr14, [sp, #240] @ 0xf0 │ │ eorseq ip, r1, r8, asr sp │ │ movteq r0, #10808 @ 0x2a38 │ │ │ │ 0243b14c : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ @@ -1297466,17 +1297465,17 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - stc2l 6, cr11, [r0, #564]! @ 0x234 │ │ - ldc2l 2, cr2, [lr, #336] @ 0x150 │ │ - stc2l 2, cr15, [r0, #804]! @ 0x324 │ │ + stc2l 6, cr11, [r0, #744]! @ 0x2e8 │ │ + ldc2l 2, cr2, [lr, #516] @ 0x204 │ │ + stc2l 2, cr15, [r0, #984]! @ 0x3d8 │ │ │ │ 0243b1bc : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #16 │ │ mov r2, r0 │ │ mov r0, #0 │ │ @@ -1297965,77 +1297964,77 @@ │ │ mov r1, r0 │ │ ldr r0, [pc, #100] @ 243b9b0 │ │ ldr r0, [pc, r0] │ │ str r4, [r8, r1, lsl #2] │ │ ldr r4, [sp, #4] │ │ str r0, [sl] │ │ b 243b5e0 │ │ - ldc2l 15, cr1, [lr, #1000] @ 0x3e8 │ │ + ldc2l 0, cr2, [lr, #156] @ 0x9c │ │ ldrhteq ip, [r1], -ip │ │ eorseq ip, r1, r4, ror #3 │ │ - ldc2l 8, cr11, [sp, #604] @ 0x25c │ │ + vcadd.f32 , , q2, #270 │ │ movteq pc, #8128 @ 0x1fc0 @ │ │ - ldc2l 11, cr7, [pc, #680] @ 243bc20 @ │ │ - ldc2l 9, cr7, [lr, #290] @ 0x122 @ │ │ - ldc2l 9, cr7, [sp, #206] @ 0xce @ │ │ + ldc2l 11, cr7, [pc, #860] @ 243bcd4 @ │ │ + ldc2l 9, cr7, [lr, #380] @ 0x17c @ │ │ + ldc2l 9, cr7, [sp, #296] @ 0x128 @ │ │ movteq pc, #7688 @ 0x1e08 @ │ │ movteq pc, #7692 @ 0x1e0c @ │ │ movteq pc, #7664 @ 0x1df0 @ │ │ movteq pc, #7076 @ 0x1ba4 @ │ │ - stc2l 8, cr1, [r0, #708]! @ 0x2c4 │ │ - ldc2l 10, cr1, [pc, #864] @ 243bcf8 @ │ │ - vcadd.f32 , , q14, #270 │ │ + stc2l 8, cr1, [r0, #888]! @ 0x378 │ │ + ldc2l 11, cr1, [pc, #20] @ 243b9ac @ │ │ + ldc2l 8, cr15, [pc, #612] @ 243bc00 │ │ stc2l 1, cr1, [r1, #640]! @ 0x280 │ │ - ldc2l 5, cr7, [lr, #820] @ 0x334 │ │ - ldc2l 4, cr13, [pc, #496] @ 243bb98 │ │ + ldc2l 5, cr7, [lr, #1000] @ 0x3e8 │ │ + ldc2l 4, cr13, [pc, #676] @ 243bc4c │ │ movteq pc, #6828 @ 0x1aac @ │ │ stc2l 1, cr1, [r1, #360]! @ 0x168 │ │ - ldc2l 7, cr15, [pc, #832] @ 243bcf4 │ │ + ldc2l 7, cr15, [pc, #1012] @ 243bda8 │ │ movteq pc, #6776 @ 0x1a78 @ │ │ eorseq ip, r1, r4, ror #2 │ │ movteq pc, #7624 @ 0x1dc8 @ │ │ stc2l 4, cr1, [r1, #472]! @ 0x1d8 │ │ - ldc2l 10, cr15, [pc, #944] @ 243bd78 @ │ │ + ldc2l 11, cr15, [pc, #100] @ 243ba2c @ │ │ movteq pc, #7960 @ 0x1f18 @ │ │ - ldc2l 10, cr7, [pc, #640] @ 243bc50 @ │ │ + ldc2l 10, cr7, [pc, #820] @ 243bd04 @ │ │ ldrsbteq ip, [r1], -ip │ │ movteq pc, #7456 @ 0x1d20 @ │ │ stc2l 3, cr1, [r1, #808]! @ 0x328 │ │ - ldc2l 10, cr15, [pc, #256] @ 243bae0 @ │ │ + ldc2l 10, cr15, [pc, #436] @ 243bb94 @ │ │ movteq pc, #7404 @ 0x1cec @ │ │ movteq pc, #7376 @ 0x1cd0 @ │ │ movteq pc, #7364 @ 0x1cc4 @ │ │ stc2l 3, cr1, [r1, #504]! @ 0x1f8 │ │ - ldc2l 9, cr15, [pc, #488] @ 243bbdc @ │ │ + ldc2l 10, cr15, [pc, #132] @ 243ba78 @ │ │ movteq pc, #7236 @ 0x1c44 @ │ │ movteq pc, #7216 @ 0x1c30 @ │ │ - ldc2l 6, cr11, [sp, #460] @ 0x1cc │ │ + ldc2l 6, cr11, [sp, #640] @ 0x280 │ │ mlaseq r1, r8, pc, fp @ │ │ - ldc2l 12, cr1, [lr, #648] @ 0x288 │ │ - ldc2l 4, cr11, [pc, #484] @ 243bbf0 │ │ - ldc2l 6, cr7, [lr, #788] @ 0x314 │ │ - ldc2l 11, cr5, [lr, #668] @ 0x29c @ │ │ - stc2l 14, cr1, [r0, #440]! @ 0x1b8 │ │ + ldc2l 12, cr1, [lr, #828] @ 0x33c │ │ + ldc2l 4, cr11, [pc, #664] @ 243bca4 │ │ + ldc2l 6, cr7, [lr, #968] @ 0x3c8 │ │ + ldc2l 11, cr5, [lr, #848] @ 0x350 @ │ │ + stc2l 14, cr1, [r0, #620]! @ 0x26c │ │ movteq r0, #8368 @ 0x20b0 │ │ movteq r0, #8372 @ 0x20b4 │ │ movteq r0, #8344 @ 0x2098 │ │ stc2l 7, cr1, [r1, #216]! @ 0xd8 │ │ - ldc2l 13, cr15, [pc, #688] @ 243bcdc │ │ + ldc2l 13, cr15, [pc, #868] @ 243bd90 │ │ movteq r0, #8260 @ 0x2044 │ │ stc2l 6, cr1, [r1, #968]! @ 0x3c8 │ │ - ldc2l 13, cr15, [pc, #416] @ 243bbd8 │ │ + ldc2l 13, cr15, [pc, #596] @ 243bc8c │ │ movteq r0, #8596 @ 0x2194 │ │ eorseq ip, r1, r4, lsl #7 │ │ - ldc2l 10, cr11, [sp, #220] @ 0xdc @ │ │ + ldc2l 10, cr11, [sp, #400] @ 0x190 @ │ │ movteq pc, #8164 @ 0x1fe4 @ │ │ movteq pc, #8152 @ 0x1fd8 @ │ │ stc2l 6, cr1, [r1, #584]! @ 0x248 │ │ - ldc2l 13, cr15, [pc, #32] @ 243ba74 │ │ + ldc2l 13, cr15, [pc, #212] @ 243bb28 │ │ movteq pc, #7724 @ 0x1e2c @ │ │ - stc2l 11, cr1, [r0, #392]! @ 0x188 @ │ │ + stc2l 11, cr1, [r0, #572]! @ 0x23c @ │ │ │ │ 0243ba58 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ ldr r5, [fp, #8] │ │ mov r4, r3 │ │ @@ -1298115,22 +1298114,22 @@ │ │ ldr r0, [pc, #32] @ 243bba8 │ │ add r0, pc, r0 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 13, cr13, [sp, #600] @ 0x258 │ │ - ldc2l 5, cr15, [pc, #672] @ 243be48 │ │ - stc2l 9, cr14, [r0, #96]! @ 0x60 @ │ │ - ldc2l 12, cr13, [sp, #1000] @ 0x3e8 │ │ - stc2l 12, cr10, [r0, #956]! @ 0x3bc │ │ - ldc2l 3, cr7, [lr, #580] @ 0x244 │ │ - ldc2l 3, cr7, [sp, #476] @ 0x1dc │ │ - ldc2l 13, cr13, [sp, #152] @ 0x98 │ │ + ldc2l 13, cr13, [sp, #780] @ 0x30c │ │ + ldc2l 5, cr15, [pc, #852] @ 243befc │ │ + stc2l 9, cr14, [r0, #186]! @ 0xba @ │ │ + ldc2l 13, cr13, [sp, #156] @ 0x9c │ │ + stc2l 13, cr10, [r0, #112]! @ 0x70 │ │ + ldc2l 3, cr7, [lr, #760] @ 0x2f8 │ │ + ldc2l 3, cr7, [sp, #656] @ 0x290 │ │ + ldc2l 13, cr13, [sp, #332] @ 0x14c │ │ │ │ 0243bbbc : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #108 @ 0x6c │ │ ldr r9, [pc, #1808] @ 243c2e0 │ │ mov r5, r1 │ │ @@ -1298585,73 +1298584,73 @@ │ │ str r1, [r0] │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movteq pc, #6520 @ 0x1978 @ │ │ movteq pc, #6240 @ 0x1860 @ │ │ movteq pc, #6240 @ 0x1860 @ │ │ - ldc2l 15, cr10, [pc, #400] @ 243c484 │ │ - ldc2l 7, cr1, [lr, #420] @ 0x1a4 │ │ + ldc2l 15, cr10, [pc, #580] @ 243c538 │ │ + ldc2l 7, cr1, [lr, #600] @ 0x258 │ │ movteq pc, #6172 @ 0x181c @ │ │ stc2l 1, cr13, [r9, #656]! @ 0x290 │ │ - ldc2l 6, cr3, [lr, #936] @ 0x3a8 │ │ - ldc2l 5, cr1, [lr, #4] │ │ + ldc2l 7, cr3, [lr, #92] @ 0x5c │ │ + ldc2l 5, cr1, [lr, #184] @ 0xb8 │ │ movteq pc, #5556 @ 0x15b4 @ │ │ eorseq fp, r1, ip, ror r8 │ │ - ldc2l 12, cr10, [pc, #432] @ 243c4c4 │ │ - ldc2l 4, cr1, [lr, #452] @ 0x1c4 │ │ + ldc2l 12, cr10, [pc, #612] @ 243c578 │ │ + ldc2l 4, cr1, [lr, #632] @ 0x278 │ │ movteq pc, #5812 @ 0x16b4 @ │ │ movteq pc, #5324 @ 0x14cc @ │ │ movteq pc, #4920 @ 0x1338 @ │ │ movteq pc, #5172 @ 0x1434 @ │ │ movteq pc, #5784 @ 0x1698 @ │ │ - ldc2l 12, cr10, [pc, #160] @ 243c3d0 │ │ - ldc2l 4, cr1, [lr, #180] @ 0xb4 │ │ + ldc2l 12, cr10, [pc, #340] @ 243c484 │ │ + ldc2l 4, cr1, [lr, #360] @ 0x168 │ │ movteq pc, #5348 @ 0x14e4 @ │ │ movteq pc, #5284 @ 0x14a4 @ │ │ movteq pc, #5588 @ 0x15d4 @ │ │ mlaseq r1, r8, r5, fp │ │ movteq pc, #4748 @ 0x128c @ │ │ eorseq fp, r1, ip, asr #11 │ │ movteq pc, #5548 @ 0x15ac @ │ │ - ldc2l 3, cr1, [lr, #260] @ 0x104 │ │ - ldc2l 11, cr10, [pc] @ 243c358 @ │ │ + ldc2l 3, cr1, [lr, #440] @ 0x1b8 │ │ + ldc2l 11, cr10, [pc, #180] @ 243c40c @ │ │ movteq pc, #5124 @ 0x1404 @ │ │ movteq pc, #5056 @ 0x13c0 @ │ │ movteq pc, #4964 @ 0x1364 @ │ │ movteq pc, #5356 @ 0x14ec @ │ │ eorseq fp, r1, r4, asr r6 │ │ movteq pc, #6360 @ 0x18d8 @ │ │ movteq pc, #6344 @ 0x18c8 @ │ │ - ldc2l 15, cr10, [pc, #912] @ 243c708 │ │ - ldc2l 7, cr1, [lr, #932] @ 0x3a4 │ │ + ldc2l 0, cr11, [pc, #68] @ 243c3bc │ │ + ldc2l 8, cr1, [lr, #88] @ 0x58 │ │ movteq pc, #6300 @ 0x189c @ │ │ stc2l 2, cr13, [r9, #320]! @ 0x140 │ │ - ldc2l 7, cr3, [lr, #600] @ 0x258 │ │ - ldc2l 5, cr1, [lr, #692] @ 0x2b4 │ │ + ldc2l 7, cr3, [lr, #780] @ 0x30c │ │ + ldc2l 5, cr1, [lr, #872] @ 0x368 │ │ movteq pc, #5728 @ 0x1660 @ │ │ movteq pc, #5660 @ 0x161c @ │ │ movteq pc, #5636 @ 0x1604 @ │ │ movteq pc, #6484 @ 0x1954 @ │ │ movteq pc, #6468 @ 0x1944 @ │ │ - ldc2l 0, cr11, [pc, #384] @ 243c524 │ │ - vcadd.f32 , q7, , #270 │ │ + ldc2l 0, cr11, [pc, #564] @ 243c5d8 │ │ + ldc2l 8, cr1, [lr, #584] @ 0x248 │ │ movteq pc, #6424 @ 0x1918 @ │ │ stc2l 3, cr13, [r9, #624]! @ 0x270 │ │ - vcadd.f32 , q15, q9, #270 │ │ - ldc2l 6, cr1, [lr, #996] @ 0x3e4 │ │ + ldc2l 9, cr3, [lr, #30] @ │ │ + ldc2l 7, cr1, [lr, #152] @ 0x98 │ │ movteq pc, #6060 @ 0x17ac @ │ │ movteq pc, #5992 @ 0x1768 @ │ │ movteq pc, #5964 @ 0x174c @ │ │ stc2l 3, cr13, [r9] │ │ - vcadd.f32 , q7, q3, #270 │ │ - ldc2l 6, cr1, [lr, #372] @ 0x174 │ │ + ldc2l 8, cr3, [lr, #460] @ 0x1cc │ │ + ldc2l 6, cr1, [lr, #552] @ 0x228 │ │ movteq pc, #5880 @ 0x16f8 @ │ │ - ldc2l 13, cr10, [pc, #944] @ 243c788 │ │ - ldc2l 5, cr1, [lr, #964] @ 0x3c4 │ │ + ldc2l 14, cr10, [pc, #100] @ 243c43c │ │ + ldc2l 6, cr1, [lr, #120] @ 0x78 │ │ movteq pc, #5812 @ 0x16b4 @ │ │ │ │ 0243c3dc : │ │ push {fp, lr} │ │ mov fp, sp │ │ mov r1, r0 │ │ mov r0, #0 │ │ @@ -1299333,53 +1299332,53 @@ │ │ ldr r0, [pc, #96] @ 243cec8 │ │ mov r2, sl │ │ movw r3, #383 @ 0x17f │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 243cc14 │ │ - ldc2l 13, cr8, [sp, #508] @ 0x1fc │ │ - stc2l 11, cr0, [r0, #884]! @ 0x374 @ │ │ - ldc2l 9, cr6, [lr, #274] @ 0x112 @ │ │ - ldc2l 12, cr8, [sp, #540] @ 0x21c │ │ - stc2l 9, cr0, [r0, #210]! @ 0xd2 @ │ │ - ldc2l 7, cr6, [lr, #84] @ 0x54 │ │ - ldc2l 15, cr14, [lr, #48] @ 0x30 │ │ - stc2l 1, cr14, [r0, #856]! @ 0x358 │ │ - stc2l 11, cr0, [r0, #520]! @ 0x208 @ │ │ - ldc2l 13, cr14, [lr, #336] @ 0x150 │ │ - stc2l 0, cr14, [r0, #120]! @ 0x78 │ │ - ldc2l 13, cr14, [lr, #96] @ 0x60 │ │ - stc2l 15, cr13, [r0, #904]! @ 0x388 │ │ - stc2l 10, cr13, [r0, #920]! @ 0x398 @ │ │ - stc2l 5, cr0, [r0, #232]! @ 0xe8 │ │ - ldc2l 7, cr14, [lr, #848] @ 0x350 │ │ - ldc2l 7, cr14, [lr, #240] @ 0xf0 │ │ + ldc2l 13, cr8, [sp, #688] @ 0x2b0 │ │ + stc2l 12, cr0, [r0, #40]! @ 0x28 │ │ + ldc2l 9, cr6, [lr, #364] @ 0x16c @ │ │ + ldc2l 12, cr8, [sp, #720] @ 0x2d0 │ │ + stc2l 9, cr0, [r0, #300]! @ 0x12c @ │ │ + ldc2l 7, cr6, [lr, #264] @ 0x108 │ │ + ldc2l 15, cr14, [lr, #228] @ 0xe4 │ │ + stc2l 2, cr14, [r0, #12]! │ │ + stc2l 11, cr0, [r0, #700]! @ 0x2bc @ │ │ + ldc2l 13, cr14, [lr, #516] @ 0x204 │ │ + stc2l 0, cr14, [r0, #300]! @ 0x12c │ │ + ldc2l 13, cr14, [lr, #276] @ 0x114 │ │ + stc2l 0, cr14, [r0, #60]! @ 0x3c │ │ + stc2l 11, cr13, [r0, #76]! @ 0x4c @ │ │ + stc2l 5, cr0, [r0, #412]! @ 0x19c │ │ + vcadd.f32 d30, d14, d1, #270 │ │ + ldc2l 7, cr14, [lr, #420] @ 0x1a4 │ │ eorseq sl, r1, r8, lsr #22 │ │ - ldc2l 5, cr14, [lr, #928] @ 0x3a0 │ │ - ldc2l 5, cr14, [lr, #720] @ 0x2d0 │ │ - ldc2l 12, cr14, [lr, #848] @ 0x350 │ │ - stc2l 15, cr13, [r0, #632]! @ 0x278 │ │ - ldc2l 13, cr14, [sp, #680] @ 0x2a8 │ │ - stc2l 14, cr13, [r0, #344]! @ 0x158 │ │ - ldc2l 12, cr14, [sp, #8] │ │ - stc2l 12, cr13, [r0, #696]! @ 0x2b8 │ │ - stc2l 12, cr13, [r0, #488]! @ 0x1e8 │ │ - ldc2l 11, cr14, [sp, #600] @ 0x258 @ │ │ - stc2l 12, cr13, [r0, #264]! @ 0x108 │ │ - ldc2l 11, cr14, [sp, #408] @ 0x198 @ │ │ - stc2l 12, cr13, [r0, #72]! @ 0x48 │ │ - ldc2l 12, cr14, [lr, #272] @ 0x110 │ │ - stc2l 15, cr13, [r0, #56]! @ 0x38 │ │ + ldc2l 6, cr14, [lr, #84] @ 0x54 │ │ + ldc2l 5, cr14, [lr, #900] @ 0x384 │ │ + ldc2l 13, cr14, [lr, #4] │ │ + stc2l 15, cr13, [r0, #812]! @ 0x32c │ │ + ldc2l 13, cr14, [sp, #860] @ 0x35c │ │ + stc2l 14, cr13, [r0, #524]! @ 0x20c │ │ + ldc2l 12, cr14, [sp, #188] @ 0xbc │ │ + stc2l 12, cr13, [r0, #876]! @ 0x36c │ │ + stc2l 12, cr13, [r0, #668]! @ 0x29c │ │ + ldc2l 11, cr14, [sp, #780] @ 0x30c @ │ │ + stc2l 12, cr13, [r0, #444]! @ 0x1bc │ │ + ldc2l 11, cr14, [sp, #588] @ 0x24c @ │ │ + stc2l 12, cr13, [r0, #252]! @ 0xfc │ │ + ldc2l 12, cr14, [lr, #452] @ 0x1c4 │ │ + stc2l 15, cr13, [r0, #236]! @ 0xec │ │ stc2l 9, cr3, [r1, #408]! @ 0x198 @ │ │ - ldc2l 10, cr14, [sp, #664] @ 0x298 @ │ │ - stc2l 11, cr13, [r0, #328]! @ 0x148 @ │ │ - stc2l 5, cr0, [r0, #504]! @ 0x1f8 │ │ - stc2l 11, cr13, [r0, #136]! @ 0x88 @ │ │ - ldc2l 12, cr8, [sp, #556] @ 0x22c │ │ + ldc2l 10, cr14, [sp, #844] @ 0x34c @ │ │ + stc2l 11, cr13, [r0, #508]! @ 0x1fc @ │ │ + stc2l 5, cr0, [r0, #684]! @ 0x2ac │ │ + stc2l 11, cr13, [r0, #316]! @ 0x13c @ │ │ + ldc2l 12, cr8, [sp, #736] @ 0x2e0 │ │ │ │ 0243cf18 : │ │ vmov.f64 d16, #112 @ 0x3f800000 1.0 │ │ mov r1, #0 │ │ str r1, [r0, #28] │ │ add r2, r0, #8 │ │ str r1, [r0, #60] @ 0x3c │ │ @@ -1300433,17 +1300432,17 @@ │ │ ldr r0, [fp, #16] │ │ ldr r0, [r0] │ │ ldr r1, [pc, #3884] @ 243eebc │ │ ldr r1, [pc, r1] │ │ cmp r1, r0 │ │ bne 243de34 │ │ b 243fbf4 │ │ - ldc2l 7, cr8, [lr, #368] @ 0x170 │ │ - ldc2l 13, cr7, [pc, #992] @ 243e388 │ │ - stc2l 6, cr13, [r0, #952]! @ 0x3b8 │ │ + ldc2l 7, cr8, [lr, #548] @ 0x224 │ │ + ldc2l 14, cr7, [pc, #148] @ 243e03c │ │ + stc2l 7, cr13, [r0, #108]! @ 0x6c │ │ movteq lr, #5840 @ 0x16d0 │ │ ldr r0, [pc, #4080] @ 243efa4 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4076] @ 243efa8 │ │ ldr r1, [pc, r1] │ │ add r0, r1, r0 │ │ ldr r1, [pc, #4068] @ 243efac │ │ @@ -1300495,18 +1300494,18 @@ │ │ movteq sp, #18856 @ 0x49a8 │ │ movteq r8, #18376 @ 0x47c8 │ │ movteq r0, #44864 @ 0xaf40 │ │ movteq sp, #27700 @ 0x6c34 │ │ movteq r1, #41352 @ 0xa188 │ │ movteq pc, #6636 @ 0x19ec @ │ │ movteq pc, #6620 @ 0x19dc @ │ │ - ldc2l 2, cr2, [pc, #620] @ 243e308 │ │ + ldc2l 2, cr2, [pc, #800] @ 243e3bc │ │ stc2l 3, cr1, [r1, #736]! @ 0x2e0 │ │ movteq r2, #41944 @ 0xa3d8 │ │ - ldc2l 6, cr12, [sp, #468] @ 0x1d4 │ │ + ldc2l 6, cr12, [sp, #648] @ 0x288 │ │ stc2l 3, cr1, [r1, #480]! @ 0x1e0 │ │ movteq sp, #18568 @ 0x4888 │ │ stc2l 15, cr2, [r1, #864]! @ 0x360 │ │ movteq lr, #5260 @ 0x148c │ │ movteq fp, #40172 @ 0x9cec │ │ eorseq sl, r1, r0, ror #11 │ │ movteq r8, #27100 @ 0x69dc │ │ @@ -1300640,16 +1300639,16 @@ │ │ movteq r8, #22068 @ 0x5634 │ │ eorseq sl, r1, r8, lsr r5 │ │ eorseq sl, r1, r4, lsr r5 │ │ movteq lr, #5037 @ 0x13ad │ │ movteq sp, #18284 @ 0x476c │ │ movteq lr, #4972 @ 0x136c │ │ movteq fp, #39841 @ 0x9ba1 │ │ - ldc2l 4, cr10, [sp, #1012] @ 0x3f4 │ │ - ldc2l 11, cr5, [lr, #36] @ 0x24 @ │ │ + ldc2l 5, cr10, [sp, #168] @ 0xa8 │ │ + ldc2l 11, cr5, [lr, #216] @ 0xd8 @ │ │ ldr r1, [pc, #4040] @ 243f2b0 │ │ mov r0, r5 │ │ ldr r2, [pc, #4036] @ 243f2b4 │ │ mov r3, #36 @ 0x24 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270cd90 │ │ @@ -1300747,15 +1300746,15 @@ │ │ str r0, [r4] │ │ b 243e6ec │ │ movteq r0, #44108 @ 0xac4c │ │ movteq sp, #26944 @ 0x6940 │ │ movteq r0, #44692 @ 0xae94 │ │ movteq pc, #5880 @ 0x16f8 @ │ │ movteq pc, #5860 @ 0x16e4 @ │ │ - ldc2l 15, cr1, [pc, #652] @ 243e718 │ │ + ldc2l 15, cr1, [pc, #832] @ 243e7cc │ │ stc2l 0, cr1, [r1, #768]! @ 0x300 │ │ ldr r0, [pc, #4056] @ 243f46c │ │ mov r7, #32 │ │ ldr r1, [pc, #4052] @ 243f470 │ │ ldr r3, [pc, #4052] @ 243f474 │ │ add r0, pc, r0 │ │ ldr r2, [pc, #4048] @ 243f478 │ │ @@ -1300772,15 +1300771,15 @@ │ │ beq 243f2d4 │ │ ldr r0, [pc, #4064] @ 243f4b8 │ │ add r0, pc, r0 │ │ b 243fb84 │ │ movteq r2, #41184 @ 0xa0e0 │ │ movteq r8, #17436 @ 0x441c │ │ movteq pc, #5756 @ 0x167c @ │ │ - ldc2l 3, cr12, [sp, #372] @ 0x174 │ │ + ldc2l 3, cr12, [sp, #552] @ 0x228 │ │ stc2l 0, cr1, [r1, #384]! @ 0x180 │ │ ldr r0, [pc, #4036] @ 243f4bc │ │ mov r6, #32 │ │ ldr r1, [pc, #4032] @ 243f4c0 │ │ ldr r3, [pc, #4032] @ 243f4c4 │ │ add r0, pc, r0 │ │ ldr r2, [pc, #4028] @ 243f4c8 │ │ @@ -1300794,15 +1300793,15 @@ │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 243f3ac │ │ ldr r0, [pc, #3988] @ 243f4cc │ │ add r0, pc, r0 │ │ b 243fb84 │ │ movteq sp, #17772 @ 0x456c │ │ - ldc2l 11, cr13, [pc, #752] @ 243e838 @ │ │ + ldc2l 11, cr13, [pc, #932] @ 243e8ec @ │ │ movteq lr, #4416 @ 0x1140 │ │ movteq fp, #39324 @ 0x999c │ │ mlaseq r1, r0, r2, sl │ │ movteq r8, #26252 @ 0x668c │ │ movteq r9, #21060 @ 0x5244 │ │ movteq fp, #39280 @ 0x9970 │ │ movteq sp, #27808 @ 0x6ca0 │ │ @@ -1300877,16 +1300876,16 @@ │ │ ldr r0, [r0, r1, lsl #2] │ │ str r0, [sl] │ │ ldr r0, [pc, #3876] @ 243f5a4 │ │ add r0, pc, r0 │ │ b 243fb84 │ │ movteq sp, #17436 @ 0x441c │ │ movteq fp, #38997 @ 0x9855 │ │ - ldc2l 1, cr10, [sp, #708] @ 0x2c4 │ │ - ldc2l 7, cr5, [lr, #772] @ 0x304 │ │ + ldc2l 1, cr10, [sp, #888] @ 0x378 │ │ + ldc2l 7, cr5, [lr, #952] @ 0x3b8 │ │ ldr r0, [pc, #3852] @ 243f5a8 │ │ movw r3, #3079 @ 0xc07 │ │ ldr r2, [pc, #3848] @ 243f5ac │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3836] @ 243f5b0 │ │ @@ -1300923,20 +1300922,20 @@ │ │ movteq pc, #5752 @ 0x1678 @ │ │ movteq r8, #16788 @ 0x4194 │ │ movteq r0, #43292 @ 0xa91c │ │ movteq sp, #26128 @ 0x6610 │ │ movteq r0, #43876 @ 0xab64 │ │ movteq pc, #5064 @ 0x13c8 @ │ │ movteq pc, #5040 @ 0x13b0 @ │ │ - ldc2l 12, cr1, [pc, #444] @ 243e908 │ │ + ldc2l 12, cr1, [pc, #624] @ 243e9bc │ │ stc2l 13, cr0, [r1, #560]! @ 0x230 │ │ movteq r1, #44460 @ 0xadac │ │ movteq r8, #16616 @ 0x40e8 │ │ movteq pc, #4936 @ 0x1348 @ │ │ - ldc2l 0, cr12, [sp, #164] @ 0xa4 │ │ + ldc2l 0, cr12, [sp, #344] @ 0x158 │ │ stc2l 13, cr0, [r1, #176]! @ 0xb0 │ │ ldr r0, [pc, #3980] @ 243f6f4 │ │ ldr r1, [pc, #3980] @ 243f6f8 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270ea80 │ │ ldr r0, [pc, #3968] @ 243f6fc │ │ @@ -1300999,17 +1300998,17 @@ │ │ str r0, [r9] │ │ mov r0, #1 │ │ str r0, [r2] │ │ ldr r0, [pc, #4040] @ 243f834 │ │ add r0, pc, r0 │ │ b 243fb84 │ │ movteq sp, #16956 @ 0x423c │ │ - ldc2l 5, cr9, [sp, #524] @ 0x20c │ │ - ldc2l 14, cr7, [lr, #464] @ 0x1d0 │ │ - ldc2l 6, cr11, [pc, #1004] @ 243ec70 │ │ + ldc2l 5, cr9, [sp, #704] @ 0x2c0 │ │ + ldc2l 14, cr7, [lr, #644] @ 0x284 │ │ + ldc2l 7, cr11, [pc, #160] @ 243e924 │ │ movteq sp, #7672 @ 0x1df8 │ │ movteq pc, #4752 @ 0x1290 @ │ │ movteq sp, #26412 @ 0x672c │ │ movteq fp, #38472 @ 0x9648 │ │ eorseq r9, r1, ip, lsr pc │ │ movteq r8, #25400 @ 0x6338 │ │ movteq r8, #24304 @ 0x5ef0 │ │ @@ -1301090,23 +1301089,23 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #4056] @ 243f9ac │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ b 243fac0 │ │ movteq pc, #5084 @ 0x13dc @ │ │ - ldc2l 12, cr9, [lr, #628] @ 0x274 │ │ + ldc2l 12, cr9, [lr, #808] @ 0x328 │ │ stc2l 11, cr0, [r1, #352]! @ 0x160 @ │ │ - stc2l 2, cr6, [r0, #980]! @ 0x3d4 │ │ + stc2l 3, cr6, [r0, #136]! @ 0x88 │ │ movteq pc, #4968 @ 0x1368 @ │ │ movteq pc, #4912 @ 0x1330 @ │ │ - ldc2l 6, cr13, [pc, #388] @ 243eb80 │ │ - ldc2l 9, cr13, [lr, #124] @ 0x7c @ │ │ - stc2l 9, cr12, [r0, #202]! @ 0xca @ │ │ - ldc2l 11, cr1, [lr, #308] @ 0x134 @ │ │ + ldc2l 6, cr13, [pc, #568] @ 243ec34 │ │ + ldc2l 9, cr13, [lr, #214] @ 0xd6 @ │ │ + stc2l 9, cr12, [r0, #292]! @ 0x124 @ │ │ + ldc2l 11, cr1, [lr, #488] @ 0x1e8 @ │ │ movteq sp, #7100 @ 0x1bbc │ │ movteq fp, #37908 @ 0x9414 │ │ eorseq r9, r1, r8, lsl #26 │ │ movteq r8, #24836 @ 0x6104 │ │ movteq r8, #23740 @ 0x5cbc │ │ mov r0, #1 │ │ ldr sl, [fp, #-32] @ 0xffffffe0 │ │ @@ -1301207,16 +1301206,16 @@ │ │ movteq sp, #25680 @ 0x6450 │ │ movteq lr, #8092 @ 0x1f9c │ │ movteq r7, #23900 @ 0x5d5c │ │ eorseq r9, r1, r0, ror #24 │ │ eorseq r9, r1, ip, asr ip │ │ movteq sp, #6869 @ 0x1ad5 │ │ movteq ip, #20116 @ 0x4e94 │ │ - ldc2l 10, cr1, [lr, #164] @ 0xa4 @ │ │ - ldc2l 8, cr15, [sp, #212] @ 0xd4 │ │ + ldc2l 10, cr1, [lr, #344] @ 0x158 @ │ │ + vcadd.f32 , , q9, #270 │ │ movteq sp, #6792 @ 0x1a88 │ │ movteq fp, #37600 @ 0x92e0 │ │ ldrsbteq r9, [r1], -r4 │ │ movteq r7, #28624 @ 0x6fd0 │ │ movteq r8, #23432 @ 0x5b88 │ │ movteq fp, #37556 @ 0x92b4 │ │ movteq sp, #26084 @ 0x65e4 │ │ @@ -1301232,15 +1301231,15 @@ │ │ movteq sp, #25372 @ 0x631c │ │ movteq lr, #7784 @ 0x1e68 │ │ movteq r7, #23592 @ 0x5c28 │ │ eorseq r9, r1, ip, lsr #22 │ │ eorseq r9, r1, r8, lsr #22 │ │ movteq sp, #6561 @ 0x19a1 │ │ movteq ip, #19808 @ 0x4d60 │ │ - ldc2l 7, cr15, [sp, #36] @ 0x24 │ │ + ldc2l 7, cr15, [sp, #216] @ 0xd8 │ │ ldr r0, [pc, #3956] @ 243fb98 │ │ ldr r1, [pc, #3956] @ 243fb9c │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270ea80 │ │ ldr r0, [pc, #3944] @ 243fba0 │ │ ldr r0, [pc, r0] │ │ @@ -1301336,15 +1301335,15 @@ │ │ movteq pc, #4140 @ 0x102c @ │ │ movteq r1, #44172 @ 0xac8c │ │ movteq r1, #44144 @ 0xac70 │ │ movteq lr, #8180 @ 0x1ff4 │ │ eorseq r9, r1, ip, asr #20 │ │ movteq lr, #8112 @ 0x1fb0 │ │ movteq lr, #8124 @ 0x1fbc │ │ - ldc2l 10, cr11, [sp, #176] @ 0xb0 @ │ │ + ldc2l 10, cr11, [sp, #356] @ 0x164 @ │ │ stc2l 7, cr0, [r1, #160]! @ 0xa0 │ │ movteq fp, #37084 @ 0x90dc │ │ movteq r1, #44000 @ 0xabe0 │ │ ldr sl, [fp, #-32] @ 0xffffffe0 │ │ mov r0, #1 │ │ ldr r7, [fp, #28] │ │ ldr r4, [fp, #-36] @ 0xffffffdc │ │ @@ -1301393,17 +1301392,17 @@ │ │ ldr r0, [pc, #3916] @ 243fdd4 │ │ add r0, pc, r0 │ │ b 243ef84 │ │ movteq lr, #8032 @ 0x1f60 │ │ movteq r1, #43956 @ 0xabb4 │ │ movteq fp, #37008 @ 0x9090 │ │ movteq lr, #7968 @ 0x1f20 │ │ - ldc2l 9, cr11, [sp, #312] @ 0x138 @ │ │ + ldc2l 9, cr11, [sp, #402] @ 0x192 @ │ │ stc2l 6, cr0, [r1, #608]! @ 0x260 │ │ - ldc2l 2, cr5, [lr, #356] @ 0x164 │ │ + ldc2l 2, cr5, [lr, #536] @ 0x218 │ │ movteq r1, #43836 @ 0xab3c │ │ movteq r7, #21860 @ 0x5564 │ │ movteq r1, #43800 @ 0xab18 │ │ movteq lr, #7836 @ 0x1e9c │ │ movteq r1, #43760 @ 0xaaf0 │ │ movteq r7, #21784 @ 0x5518 │ │ ldr r0, [pc, #3856] @ 243fdd8 │ │ @@ -1301532,23 +1301531,23 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #3940] @ 244001c │ │ add r0, pc, r0 │ │ b 243fb84 │ │ movteq ip, #18900 @ 0x49d4 │ │ movteq ip, #18888 @ 0x49c8 │ │ movteq ip, #18876 @ 0x49bc │ │ - ldc2l 7, cr9, [sp, #596] @ 0x254 │ │ - ldc2l 13, cr4, [lr, #676] @ 0x2a4 │ │ + ldc2l 7, cr9, [sp, #776] @ 0x308 │ │ + ldc2l 13, cr4, [lr, #856] @ 0x358 │ │ movteq ip, #18824 @ 0x4988 │ │ movteq ip, #18788 @ 0x4964 │ │ movteq lr, #7352 @ 0x1cb8 │ │ movteq sl, #40424 @ 0x9de8 │ │ movteq ip, #18764 @ 0x494c │ │ stc2l 9, cr14, [r0, #72]! @ 0x48 @ │ │ - ldc2l 13, cr4, [lr, #196] @ 0xc4 │ │ + ldc2l 13, cr4, [lr, #376] @ 0x178 │ │ ldr r1, [pc, #4088] @ 24400ec │ │ mov r0, r5 │ │ ldr r2, [pc, #4084] @ 24400f0 │ │ ldr r3, [pc, #4084] @ 24400f4 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ add r3, pc, r3 │ │ @@ -1301597,18 +1301596,18 @@ │ │ mov r1, #1 │ │ b 243fd9c │ │ movteq pc, #40700 @ 0x9efc @ │ │ movteq ip, #27632 @ 0x6bf0 │ │ movteq r0, #41284 @ 0xa144 │ │ movteq lr, #6564 @ 0x19a4 │ │ movteq lr, #6544 @ 0x1990 │ │ - ldc2l 2, cr1, [pc, #300] @ 243f300 │ │ + ldc2l 2, cr1, [pc, #480] @ 243f3b4 │ │ stc2l 3, cr0, [r1, #416]! @ 0x1a0 │ │ movteq r1, #41864 @ 0xa388 │ │ - ldc2l 6, cr11, [sp, #132] @ 0x84 │ │ + ldc2l 6, cr11, [sp, #312] @ 0x138 │ │ stc2l 3, cr0, [r1, #144]! @ 0x90 │ │ movteq ip, #18484 @ 0x4834 │ │ ldr r6, [pc, #4076] @ 24401d8 │ │ mov r2, #32 │ │ ldr r1, [pc, #4072] @ 24401dc │ │ mov r3, #12 │ │ add r6, pc, r6 │ │ @@ -1301657,16 +1301656,16 @@ │ │ bl 270d940 │ │ ldr r0, [pc, #3928] @ 2440204 │ │ add r0, pc, r0 │ │ b 243fb84 │ │ movteq ip, #19540 @ 0x4c54 │ │ movteq ip, #18348 @ 0x47ac │ │ movteq ip, #18336 @ 0x47a0 │ │ - ldc2l 5, cr9, [sp, #484] @ 0x1e4 │ │ - ldc2l 11, cr4, [lr, #564] @ 0x234 @ │ │ + ldc2l 5, cr9, [sp, #664] @ 0x298 │ │ + ldc2l 11, cr4, [lr, #744] @ 0x2e8 @ │ │ movteq ip, #19464 @ 0x4c08 │ │ movteq ip, #18220 @ 0x472c │ │ movteq lr, #6784 @ 0x1a80 │ │ movteq sl, #39856 @ 0x9bb0 │ │ ldr r0, [pc, #4092] @ 24402d8 │ │ ldr r1, [pc, #4092] @ 24402dc │ │ ldr r2, [pc, #4092] @ 24402e0 │ │ @@ -1301710,17 +1301709,17 @@ │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #4060] @ 2440364 │ │ add r0, pc, r0 │ │ b 243f7f4 │ │ movteq ip, #18196 @ 0x4714 │ │ - stc2l 7, cr4, [r0, #568]! @ 0x238 │ │ - ldc2l 13, cr12, [pc, #528] @ 243f5ac │ │ - stc2l 11, cr3, [r0, #708]! @ 0x2c4 @ │ │ + stc2l 7, cr4, [r0, #748]! @ 0x2ec │ │ + ldc2l 13, cr12, [pc, #708] @ 243f660 │ │ + stc2l 11, cr3, [r0, #888]! @ 0x378 @ │ │ stc2l 1, cr0, [r1, #480]! @ 0x1e0 │ │ movteq sp, #4789 @ 0x12b5 │ │ movteq lr, #6568 @ 0x19a8 │ │ movteq ip, #17996 @ 0x464c │ │ ldr r0, [pc, #4072] @ 244039c │ │ ldr r1, [pc, #4072] @ 24403a0 │ │ ldr r2, [pc, #4072] @ 24403a4 │ │ @@ -1301789,15 +1301788,15 @@ │ │ add r2, pc, r2 │ │ b 243fb4c │ │ stc2l 13, cr1, [r1, #320]! @ 0x140 │ │ movteq sl, #39473 @ 0x9a31 │ │ eorseq r9, r1, r4, ror #6 │ │ movteq lr, #6380 @ 0x18ec │ │ movteq ip, #28000 @ 0x6d60 │ │ - ldc2l 12, cr12, [pc, #128] @ 243f554 │ │ + ldc2l 12, cr12, [pc, #308] @ 243f608 │ │ ldr r0, [pc, #4036] @ 244049c │ │ mov r3, #6 │ │ ldr r1, [pc, #4032] @ 24404a0 │ │ ldr r8, [pc, #4032] @ 24404a4 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ str r6, [sp] │ │ @@ -1301840,23 +1301839,23 @@ │ │ movteq r7, #26228 @ 0x6674 │ │ movteq r8, #21036 @ 0x522c │ │ movteq sl, #39256 @ 0x9958 │ │ movteq ip, #27780 @ 0x6c84 │ │ movteq r1, #32252 @ 0x7dfc │ │ movteq r7, #17152 @ 0x4300 │ │ movteq lr, #5464 @ 0x1558 │ │ - ldc2l 9, cr10, [pc, #248] @ 243f698 @ │ │ + ldc2l 9, cr10, [pc, #338] @ 243f6f2 @ │ │ stc2l 15, cr15, [r0, #192]! @ 0xc0 │ │ movteq sp, #21292 @ 0x532c │ │ - stc2l 0, cr12, [r0, #488]! @ 0x1e8 │ │ - ldc2l 1, cr11, [sp, #916] @ 0x394 │ │ + stc2l 0, cr12, [r0, #668]! @ 0x29c │ │ + ldc2l 2, cr11, [sp, #72] @ 0x48 │ │ stc2l 14, cr15, [r0, #928]! @ 0x3a0 │ │ movteq ip, #17404 @ 0x43fc │ │ movteq lr, #5944 @ 0x1738 │ │ - ldc2l 10, cr3, [pc, #300] @ 243f6ec @ │ │ + ldc2l 10, cr3, [pc, #480] @ 243f7a0 @ │ │ stc2l 14, cr15, [r0, #688]! @ 0x2b0 │ │ ldr r0, [pc, #3836] @ 24404c4 │ │ mov r2, r4 │ │ ldr r1, [pc, #3832] @ 24404c8 │ │ mov r3, #6 │ │ add r0, pc, r0 │ │ str r5, [sp] │ │ @@ -1301926,15 +1301925,15 @@ │ │ ldr r0, [pc, #4064] @ 24406bc │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ ldr r0, [pc, #4056] @ 24406c0 │ │ add r0, pc, r0 │ │ b 243fb84 │ │ movteq r7, #21096 @ 0x5268 │ │ - ldc2l 8, cr10, [pc, #860] @ 243fa54 │ │ + ldc2l 9, cr10, [pc, #8] @ 243f700 @ │ │ movteq sl, #38896 @ 0x97f0 │ │ movteq pc, #39256 @ 0x9958 @ │ │ movteq pc, #39244 @ 0x994c @ │ │ ldrsbteq r9, [r1], -r0 │ │ movteq sl, #38860 @ 0x97cc │ │ movteq ip, #27388 @ 0x6afc │ │ movteq r7, #25776 @ 0x64b0 │ │ @@ -1302004,15 +1302003,15 @@ │ │ ldr r0, [pc, r0] │ │ str r0, [r9] │ │ mov r0, #1 │ │ str r0, [sl] │ │ ldr r0, [pc, #3812] @ 2440708 │ │ add r0, pc, r0 │ │ b 243fb84 │ │ - ldc2l 7, cr10, [pc, #624] @ 243faa0 │ │ + ldc2l 7, cr10, [pc, #804] @ 243fb54 │ │ stc2l 13, cr15, [r0, #320]! @ 0x140 │ │ movteq sp, #20808 @ 0x5148 │ │ stc2l 9, cr1, [r1, #376]! @ 0x178 @ │ │ movteq sl, #38516 @ 0x9674 │ │ movteq pc, #38876 @ 0x97dc @ │ │ movteq pc, #38864 @ 0x97d0 @ │ │ eorseq r8, r1, r4, asr pc │ │ @@ -1302099,26 +1302098,26 @@ │ │ mov r1, r0 │ │ ldr r0, [pc, #3736] @ 244082c │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ ldr r0, [pc, #3728] @ 2440830 │ │ add r0, pc, r0 │ │ b 243fb84 │ │ - ldc2l 6, cr10, [pc, #96] @ 243fa0c │ │ + ldc2l 6, cr10, [pc, #276] @ 243fac0 │ │ stc2l 11, cr15, [r0, #816]! @ 0x330 @ │ │ movteq ip, #24520 @ 0x5fc8 │ │ movteq r0, #44500 @ 0xadd4 │ │ movteq r6, #23140 @ 0x5a64 │ │ movteq ip, #17064 @ 0x42a8 │ │ movteq lr, #4404 @ 0x1134 │ │ movteq lr, #4388 @ 0x1124 │ │ - stc2l 0, cr4, [r0, #748]! @ 0x2ec │ │ + stc2l 0, cr4, [r0, #928]! @ 0x3a0 │ │ stc2l 11, cr15, [r0] @ │ │ movteq ip, #17612 @ 0x44cc │ │ - ldc2l 6, cr3, [pc, #380] @ 243fb54 │ │ + ldc2l 6, cr3, [pc, #560] @ 243fc08 │ │ stc2l 10, cr15, [r0, #768]! @ 0x300 @ │ │ ldr r0, [pc, #3680] @ 2440840 │ │ ldr r1, [pc, #3680] @ 2440844 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270ea80 │ │ ldr r0, [pc, #3668] @ 2440848 │ │ @@ -1302184,19 +1302183,19 @@ │ │ movteq lr, #4248 @ 0x1098 │ │ ldr r1, [pc, #3160] @ 2440740 │ │ mov r0, r4 │ │ mov r2, r7 │ │ mov r3, #1 │ │ add r1, pc, r1 │ │ b 243ef94 │ │ - stc2l 2, cr5, [r0, #132]! @ 0x84 │ │ + stc2l 2, cr5, [r0, #312]! @ 0x138 │ │ stc2l 10, cr15, [r0, #496]! @ 0x1f0 @ │ │ movteq lr, #4208 @ 0x1070 │ │ movteq lr, #4180 @ 0x1054 │ │ - ldc2l 11, cr8, [lr, #500] @ 0x1f4 @ │ │ + ldc2l 11, cr8, [lr, #680] @ 0x2a8 @ │ │ stc2l 10, cr15, [r0, #224]! @ 0xe0 @ │ │ movteq ip, #25804 @ 0x64cc │ │ ldr r0, [pc, #3564] @ 2440908 │ │ mov r1, #132 @ 0x84 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3552] @ 244090c │ │ @@ -1302236,23 +1302235,23 @@ │ │ movteq ip, #26176 @ 0x6640 │ │ movteq r6, #28660 @ 0x6ff4 │ │ movteq r7, #23468 @ 0x5bac │ │ movteq r6, #28632 @ 0x6fd8 │ │ movteq r7, #23440 @ 0x5b90 │ │ movteq ip, #17736 @ 0x4548 │ │ movteq sp, #7912 @ 0x1ee8 │ │ - ldc2l 7, cr14, [sp, #784] @ 0x310 │ │ + ldc2l 7, cr14, [sp, #964] @ 0x3c4 │ │ vcmla.f16 , q8, q0, #270 │ │ movteq r6, #19544 @ 0x4c58 │ │ movteq sp, #7828 @ 0x1e94 │ │ - ldc2l 3, cr4, [lr, #832] @ 0x340 │ │ + ldc2l 3, cr4, [lr, #1012] @ 0x3f4 │ │ stc2l 8, cr15, [r0, #480]! @ 0x1e0 │ │ movteq r1, #28120 @ 0x6dd8 │ │ movteq sp, #7760 @ 0x1e50 │ │ - stc2l 1, cr2, [r0, #76]! @ 0x4c │ │ + stc2l 1, cr2, [r0, #256]! @ 0x100 │ │ stc2l 8, cr15, [r0, #208]! @ 0xd0 │ │ movteq r1, #21976 @ 0x55d8 │ │ ldr r0, [pc, #3356] @ 2440918 │ │ ldr r0, [pc, r0] │ │ sub r3, r0, #1 │ │ cmp r3, #100 @ 0x64 │ │ bcc 243fc28 │ │ @@ -1302344,15 +1302343,15 @@ │ │ bl 270db20 │ │ cmp r0, #0 │ │ bne 243fb7c │ │ ldr r1, [fp, #20] │ │ mov r0, #1 │ │ str r0, [r1] │ │ b 243fb7c │ │ - vcadd.f32 q8, q15, , #270 │ │ + ldc2l 9, cr0, [lr, #44] @ 0x2c @ │ │ ldr r1, [pc, #2872] @ 24408bc │ │ mov r0, r7 │ │ mov r2, r6 │ │ mov r3, #1 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ mov r1, #0 │ │ @@ -1302362,38 +1302361,38 @@ │ │ add r0, pc, r0 │ │ b 243fb84 │ │ movteq r0, #43556 @ 0xaa24 │ │ movteq r6, #22196 @ 0x56b4 │ │ movteq fp, #20216 @ 0x4ef8 │ │ movteq sp, #7564 @ 0x1d8c │ │ movteq sp, #7548 @ 0x1d7c │ │ - stc2l 13, cr3, [r0, #76]! @ 0x4c │ │ + stc2l 13, cr3, [r0, #256]! @ 0x100 │ │ stc2l 7, cr15, [r0, #352]! @ 0x160 │ │ movteq ip, #16676 @ 0x4124 │ │ - stc2l 1, cr3, [r0, #324]! @ 0x144 │ │ + stc2l 1, cr3, [r0, #504]! @ 0x1f8 │ │ stc2l 7, cr15, [r0, #96]! @ 0x60 │ │ movteq ip, #6241 @ 0x1861 │ │ movteq sl, #37008 @ 0x9090 │ │ movteq pc, #37368 @ 0x91f8 @ │ │ movteq pc, #37356 @ 0x91ec @ │ │ eorseq r8, r1, r0, ror r9 │ │ movteq sl, #36972 @ 0x906c │ │ movteq ip, #25500 @ 0x639c │ │ movteq r6, #27984 @ 0x6d50 │ │ movteq r7, #22792 @ 0x5908 │ │ movteq r6, #27956 @ 0x6d34 │ │ movteq r7, #22764 @ 0x58ec │ │ movteq ip, #17060 @ 0x42a4 │ │ movteq sp, #7236 @ 0x1c44 │ │ - ldc2l 0, cr4, [sp, #708] @ 0x2c4 │ │ + ldc2l 0, cr4, [sp, #888] @ 0x378 │ │ stc2l 6, cr15, [r0, #112]! @ 0x70 │ │ movteq sp, #7804 @ 0x1e7c │ │ - ldc2l 4, cr14, [sp, #932] @ 0x3a4 │ │ + ldc2l 5, cr14, [sp, #88] @ 0x58 │ │ movteq r6, #18756 @ 0x4944 │ │ - ldc2l 8, cr8, [sp, #356] @ 0x164 │ │ + vcadd.f32 d24, d29, d6, #270 │ │ ldr r0, [pc, #2332] @ 2440744 │ │ mov r2, #80 @ 0x50 │ │ ldr r5, [pc, #2328] @ 2440748 │ │ mov r3, #32 │ │ add r0, pc, r0 │ │ mov r6, #32 │ │ add r5, pc, r5 │ │ @@ -1302501,27 +1302500,27 @@ │ │ bhi 24404e4 │ │ ldr r0, [pc, #1976] @ 2440794 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ ldr r0, [fp, #12] │ │ ldr r4, [r0] │ │ b 2440524 │ │ - ldc2l 14, cr3, [lr, #788] @ 0x314 │ │ + ldc2l 14, cr3, [lr, #968] @ 0x3c8 │ │ eorseq r8, r1, r8, asr #16 │ │ eorseq r8, r1, r4, asr #16 │ │ movteq sp, #6353 @ 0x18d1 │ │ movteq fp, #19048 @ 0x4a68 │ │ movteq sp, #7608 @ 0x1db8 │ │ movteq fp, #19016 @ 0x4a48 │ │ movteq sp, #7568 @ 0x1d90 │ │ - ldc2l 7, cr8, [sp, #808] @ 0x328 │ │ - ldc2l 14, cr3, [lr, #180] @ 0xb4 │ │ + ldc2l 7, cr8, [sp, #988] @ 0x3dc │ │ + ldc2l 14, cr3, [lr, #360] @ 0x168 │ │ movteq r6, #18564 @ 0x4884 │ │ - ldc2l 0, cr12, [pc, #592] @ 2440270 │ │ - ldc2l 5, cr0, [lr, #724] @ 0x2d4 │ │ + ldc2l 0, cr12, [pc, #772] @ 2440324 │ │ + ldc2l 5, cr0, [lr, #904] @ 0x388 │ │ ldr r0, [pc, #1764] @ 244070c │ │ ldr r0, [pc, r0] │ │ cmp r0, #1 │ │ bne 24402e8 │ │ ldr r0, [pc, #1752] @ 2440710 │ │ ldr r0, [pc, r0] │ │ cmp r0, #0 │ │ @@ -1302569,19 +1302568,19 @@ │ │ ldr r0, [pc, #1620] @ 244073c │ │ add r0, pc, r0 │ │ b 243fb84 │ │ eorseq r8, r1, r8, ror #14 │ │ movteq r6, #22616 @ 0x5858 │ │ movteq r6, #22032 @ 0x5610 │ │ movteq sp, #6764 @ 0x1a6c │ │ - ldc2l 7, cr10, [sp, #260] @ 0x104 │ │ + ldc2l 7, cr10, [sp, #440] @ 0x1b8 │ │ stc2l 4, cr15, [r0, #272]! @ 0x110 │ │ movteq fp, #18772 @ 0x4954 │ │ movteq sp, #6688 @ 0x1a20 │ │ - stc2l 14, cr2, [r0, #244]! @ 0xf4 │ │ + stc2l 14, cr2, [r0, #424]! @ 0x1a8 │ │ stc2l 4, cr15, [r0, #16]! │ │ movteq ip, #5445 @ 0x1545 │ │ ldr r4, [pc, #1964] @ 24408cc │ │ mov r2, #32 │ │ ldr r1, [pc, #1960] @ 24408d0 │ │ mov r3, #12 │ │ add r4, pc, r4 │ │ @@ -1302625,25 +1302624,25 @@ │ │ mov r2, #80 @ 0x50 │ │ ldr r1, [fp, #-36] @ 0xffffffdc │ │ mov r3, r7 │ │ add r0, pc, r0 │ │ bl 270d940 │ │ b 243f808 │ │ movteq r6, #18216 @ 0x4728 │ │ - ldc2l 6, cr8, [sp, #244] @ 0xf4 │ │ - ldc2l 12, cr3, [lr, #676] @ 0x2a4 │ │ + ldc2l 6, cr8, [sp, #424] @ 0x1a8 │ │ + ldc2l 12, cr3, [lr, #856] @ 0x358 │ │ eorseq r8, r1, r0, lsr r6 │ │ eorseq r8, r1, ip, lsr #12 │ │ movteq sp, #5817 @ 0x16b9 │ │ movteq fp, #18512 @ 0x4850 │ │ movteq sp, #7072 @ 0x1ba0 │ │ movteq sp, #7048 @ 0x1b88 │ │ movteq fp, #18464 @ 0x4820 │ │ movteq sp, #5737 @ 0x1669 │ │ - ldc2l 1, cr14, [sp, #884] @ 0x374 │ │ + ldc2l 2, cr14, [sp, #40] @ 0x28 │ │ ldr r4, [pc, #1648] @ 2440880 │ │ mov r2, #32 │ │ ldr r1, [pc, #1644] @ 2440884 │ │ mov r3, #12 │ │ add r4, pc, r4 │ │ mov r5, #32 │ │ add r1, pc, r1 │ │ @@ -1302696,15 +1302695,15 @@ │ │ movteq r6, #20928 @ 0x51c0 │ │ movteq fp, #18944 @ 0x4a00 │ │ movteq fp, #28544 @ 0x6f80 │ │ mov r0, #0 │ │ b 243e674 │ │ movteq sp, #6288 @ 0x1890 │ │ movteq sp, #6268 @ 0x187c │ │ - stc2l 8, cr3, [r0, #76]! @ 0x4c │ │ + vcmla.f16 , q0, q0, #270 │ │ stc2l 2, cr15, [r0, #352]! @ 0x160 │ │ movteq fp, #19492 @ 0x4c24 │ │ ldr r0, [pc, #1592] @ 2440944 │ │ mov r1, #126 @ 0x7e │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #1580] @ 2440948 │ │ @@ -1302721,15 +1302720,15 @@ │ │ mov r1, r0 │ │ ldr r2, [pc, #1544] @ 2440954 │ │ ldr r0, [pc, #1544] @ 2440958 │ │ add r2, pc, r2 │ │ add r0, pc, r0 │ │ add r1, r2, r1, lsl #5 │ │ b 243fb60 │ │ - stc2l 12, cr2, [r0, #324]! @ 0x144 │ │ + stc2l 12, cr2, [r0, #504]! @ 0x1f8 │ │ stc2l 2, cr15, [r0, #96]! @ 0x60 │ │ movteq ip, #4961 @ 0x1361 │ │ ldr r1, [pc, #1364] @ 24408c4 │ │ mov r4, #0 │ │ ldr r0, [fp, #-36] @ 0xffffffdc │ │ mov r2, sl │ │ add r1, pc, r1 │ │ @@ -1302754,30 +1302753,30 @@ │ │ ldr r0, [pc, r0] │ │ str r0, [r9] │ │ ldr r0, [fp, #-36] @ 0xffffffdc │ │ bl 270d970 │ │ mov r0, #0 │ │ b 243f818 │ │ movteq sp, #6056 @ 0x17a8 │ │ - stc2l 7, cr3, [r0, #252]! @ 0xfc │ │ + stc2l 7, cr3, [r0, #432]! @ 0x1b0 │ │ stc2l 1, cr15, [r0, #528]! @ 0x210 │ │ ldr r1, [pc, #1092] @ 2440834 │ │ mov r4, #0 │ │ ldr r0, [fp, #-36] @ 0xffffffdc │ │ mov r3, #1 │ │ ldr r2, [fp, #28] │ │ add r1, pc, r1 │ │ str r4, [sl] │ │ bl 270d970 │ │ str r4, [r6] │ │ ldr r0, [pc, #1060] @ 2440838 │ │ add r0, pc, r0 │ │ b 243fb84 │ │ movteq fp, #19280 @ 0x4b50 │ │ - stc2l 11, cr2, [r0, #500]! @ 0x1f4 @ │ │ + stc2l 11, cr2, [r0, #680]! @ 0x2a8 @ │ │ stc2l 1, cr15, [r0, #272]! @ 0x110 │ │ movteq ip, #4737 @ 0x1281 │ │ ldr r1, [pc, #1152] @ 24408b0 │ │ mov r3, #1 │ │ ldr r0, [pc, #1148] @ 24408b4 │ │ ldr r2, [fp, #28] │ │ add r1, pc, r1 │ │ @@ -1302787,39 +1302786,39 @@ │ │ bl 270d970 │ │ mov r0, #0 │ │ ldr r1, [fp, #20] │ │ str r0, [r1] │ │ ldr r0, [pc, #1112] @ 24408b8 │ │ add r0, pc, r0 │ │ b 243fb84 │ │ - ldc2l 12, cr3, [lr, #396] @ 0x18c │ │ + ldc2l 12, cr3, [lr, #576] @ 0x240 │ │ ldr r0, [pc, #1280] @ 2440970 │ │ mov r1, #118 @ 0x76 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #1268] @ 2440974 │ │ mov r1, r6 │ │ mov r2, #1 │ │ mov r3, r9 │ │ add r0, pc, r0 │ │ b 243fb68 │ │ movteq sp, #6500 @ 0x1964 │ │ - ldc2l 3, cr10, [sp, #896] @ 0x380 │ │ + ldc2l 4, cr10, [sp, #52] @ 0x34 │ │ stc2l 0, cr15, [r0, #880]! @ 0x370 │ │ - ldc2l 2, cr6, [lr, #328] @ 0x148 │ │ + ldc2l 2, cr6, [lr, #508] @ 0x1fc │ │ movteq r0, #42372 @ 0xa584 │ │ movteq r6, #17456 @ 0x4430 │ │ eorseq r8, r1, r8, ror #6 │ │ eorseq r8, r1, r4, ror #6 │ │ movteq sp, #6372 @ 0x18e4 │ │ movteq fp, #27996 @ 0x6d5c │ │ movteq fp, #17796 @ 0x4584 │ │ - stc2l 1, cr11, [r0, #744]! @ 0x2e8 │ │ + stc2l 1, cr11, [r0, #924]! @ 0x39c │ │ stc2l 12, cr0, [r1, #832]! @ 0x340 │ │ - ldc2l 1, cr6, [lr, #392] @ 0x188 │ │ + ldc2l 1, cr6, [lr, #572] @ 0x23c │ │ movteq r0, #42128 @ 0xa490 │ │ eorseq r8, r1, r0, lsl #5 │ │ eorseq r8, r1, ip, ror r2 │ │ movteq sp, #6144 @ 0x1800 │ │ movteq fp, #27764 @ 0x6c74 │ │ movteq sp, #6104 @ 0x17d8 │ │ movteq fp, #17520 @ 0x4470 │ │ @@ -1302935,15 +1302934,15 @@ │ │ movw r3, #1623 @ 0x657 │ │ ldr r2, [pc, #284] @ 24407c0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2440538 │ │ - ldc2l 9, cr9, [pc, #32] @ 24406dc @ │ │ + ldc2l 9, cr9, [pc, #122] @ 2440736 @ │ │ stc2l 14, cr14, [r0, #784]! @ 0x310 │ │ movteq ip, #21184 @ 0x52c0 │ │ stc2l 11, cr0, [r1, #256]! @ 0x100 @ │ │ movteq r9, #38948 @ 0x9824 │ │ movteq lr, #39308 @ 0x998c │ │ movteq lr, #39296 @ 0x9980 │ │ eorseq r8, r1, r4, lsl #2 │ │ @@ -1302952,176 +1302951,176 @@ │ │ movteq r6, #25828 @ 0x64e4 │ │ movteq r7, #20636 @ 0x509c │ │ movteq r6, #25804 @ 0x64cc │ │ movteq r7, #20608 @ 0x5080 │ │ movteq fp, #19004 @ 0x4a3c │ │ movteq fp, #27340 @ 0x6acc │ │ movteq sp, #5076 @ 0x13d4 │ │ - vcadd.f32 , , , #270 │ │ + vcadd.f32 , , q15, #270 │ │ stc2l 13, cr14, [r0, #688]! @ 0x2b0 │ │ movteq sp, #5644 @ 0x160c │ │ movteq fp, #27240 @ 0x6a68 │ │ stc2l 10, cr0, [r1, #16]! @ │ │ movteq ip, #7636 @ 0x1dd4 │ │ movteq sl, #19052 @ 0x4a6c │ │ movteq r8, #40724 @ 0x9f14 │ │ movteq fp, #25152 @ 0x6240 │ │ movteq r0, #29620 @ 0x73b4 │ │ movteq r5, #18616 @ 0x48b8 │ │ movteq ip, #6948 @ 0x1b24 │ │ movteq fp, #25096 @ 0x6208 │ │ movteq ip, #6896 @ 0x1af0 │ │ - ldc2l 15, cr8, [pc, #64] @ 2440778 │ │ + ldc2l 15, cr8, [pc, #244] @ 244082c │ │ stc2l 4, cr14, [r0, #784]! @ 0x310 │ │ movteq fp, #22720 @ 0x58c0 │ │ - stc2l 6, cr10, [r0, #72]! @ 0x48 │ │ - ldc2l 3, cr7, [sp, #108] @ 0x6c │ │ + stc2l 6, cr10, [r0, #252]! @ 0xfc │ │ + ldc2l 3, cr7, [sp, #288] @ 0x120 │ │ movteq ip, #6869 @ 0x1ad5 │ │ movteq fp, #17284 @ 0x4384 │ │ - ldc2l 6, cr11, [lr, #640] @ 0x280 │ │ + ldc2l 6, cr11, [lr, #820] @ 0x334 │ │ movteq fp, #17204 @ 0x4334 │ │ stc2l 3, cr0, [r1, #568]! @ 0x238 │ │ ldrsbteq r7, [r1], -r4 │ │ movteq fp, #25552 @ 0x63d0 │ │ movteq fp, #25508 @ 0x63a4 │ │ - ldc2l 6, cr1, [lr, #948] @ 0x3b4 │ │ + ldc2l 7, cr1, [lr, #104] @ 0x68 │ │ movteq fp, #25456 @ 0x6370 │ │ movteq r5, #27960 @ 0x6d38 │ │ movteq r6, #22764 @ 0x58ec │ │ movteq fp, #17064 @ 0x42a8 │ │ movteq ip, #7248 @ 0x1c50 │ │ movteq ip, #7216 @ 0x1c30 │ │ - ldc2l 0, cr3, [sp, #612] @ 0x264 │ │ + ldc2l 0, cr3, [sp, #792] @ 0x318 │ │ stc2l 6, cr14, [r0, #16]! │ │ movteq ip, #7772 @ 0x1e5c │ │ movteq fp, #16916 @ 0x4214 │ │ movteq ip, #7108 @ 0x1bc4 │ │ movteq r5, #18788 @ 0x4964 │ │ - ldc2l 15, cr12, [sp, #624] @ 0x270 │ │ + ldc2l 15, cr12, [sp, #804] @ 0x324 │ │ stc2l 0, cr14, [r0, #608]! @ 0x260 │ │ movteq r5, #17468 @ 0x443c │ │ movteq ip, #5752 @ 0x1678 │ │ movteq r0, #26068 @ 0x65d4 │ │ - ldc2l 10, cr2, [lr, #528] @ 0x210 @ │ │ + ldc2l 10, cr2, [lr, #708] @ 0x2c4 @ │ │ stc2l 15, cr13, [r0, #176]! @ 0xb0 │ │ movteq r0, #25744 @ 0x6490 │ │ movteq ip, #5388 @ 0x150c │ │ - stc2l 7, cr0, [r0, #796]! @ 0x31c │ │ + stc2l 7, cr0, [r0, #976]! @ 0x3d0 │ │ stc2l 14, cr13, [r0, #928]! @ 0x3a0 │ │ movteq pc, #19964 @ 0x4dfc @ │ │ movteq r8, #39444 @ 0x9a14 │ │ movteq sl, #27968 @ 0x6d40 │ │ movteq pc, #28336 @ 0x6eb0 @ │ │ movteq sl, #19544 @ 0x4c58 │ │ movteq ip, #5624 @ 0x15f8 │ │ - ldc2l 10, cr8, [pc, #80] @ 2440834 @ │ │ + ldc2l 10, cr8, [pc, #260] @ 24408e8 @ │ │ stc2l 15, cr13, [r0, #800]! @ 0x320 │ │ movteq fp, #21444 @ 0x53c4 │ │ - ldc2l 6, cr11, [pc, #528] @ 2440a00 │ │ - ldc2l 14, cr5, [lr, #712] @ 0x2c8 │ │ + ldc2l 6, cr11, [pc, #708] @ 2440ab4 │ │ + ldc2l 14, cr5, [lr, #892] @ 0x37c │ │ movteq r0, #41440 @ 0xa1e0 │ │ ldrsbteq r7, [r1], -r0 │ │ eorseq r7, r1, ip, asr #31 │ │ movteq sp, #5456 @ 0x1550 │ │ movteq fp, #27076 @ 0x69c4 │ │ movteq sp, #5412 @ 0x1524 │ │ movteq fp, #16828 @ 0x41bc │ │ movteq sp, #4752 @ 0x1290 │ │ movteq r9, #38492 @ 0x965c │ │ movteq fp, #27016 @ 0x6988 │ │ movteq r0, #31488 @ 0x7b00 │ │ movteq fp, #26976 @ 0x6960 │ │ movteq sp, #4664 @ 0x1238 │ │ - ldc2l 6, cr9, [pc, #352] @ 244098c │ │ + ldc2l 6, cr9, [pc, #532] @ 2440a40 │ │ stc2l 12, cr14, [r0, #48]! @ 0x30 │ │ movteq ip, #20488 @ 0x5008 │ │ - ldc2l 7, cr11, [pc, #736] @ 2440b18 │ │ - ldc2l 10, cr6, [sp, #60] @ 0x3c @ │ │ - ldc2l 13, cr10, [pc, #272] @ 2440950 │ │ + ldc2l 7, cr11, [pc, #916] @ 2440bcc │ │ + ldc2l 10, cr6, [sp, #240] @ 0xf0 @ │ │ + ldc2l 13, cr10, [pc, #452] @ 2440a04 │ │ movteq fp, #26552 @ 0x67b8 │ │ movteq r9, #38264 @ 0x9578 │ │ movteq lr, #38624 @ 0x96e0 │ │ movteq lr, #38612 @ 0x96d4 │ │ eorseq r7, r1, r8, asr lr │ │ movteq r9, #38228 @ 0x9554 │ │ movteq fp, #26756 @ 0x6884 │ │ movteq r6, #25144 @ 0x6238 │ │ movteq r6, #24048 @ 0x5df0 │ │ movteq r6, #25120 @ 0x6220 │ │ movteq r6, #24020 @ 0x5dd4 │ │ movteq fp, #18320 @ 0x4790 │ │ movteq fp, #26656 @ 0x6820 │ │ movteq sp, #4392 @ 0x1128 │ │ - ldc2l 5, cr3, [sp, #596] @ 0x254 │ │ + ldc2l 5, cr3, [sp, #776] @ 0x308 │ │ stc2l 11, cr14, [r0] @ │ │ movteq sp, #4948 @ 0x1354 │ │ movteq r5, #18180 @ 0x4704 │ │ - ldc2l 6, cr7, [sp, #100] @ 0x64 │ │ - ldc2l 12, cr2, [lr, #532] @ 0x214 │ │ + ldc2l 6, cr7, [sp, #280] @ 0x118 │ │ + ldc2l 12, cr2, [lr, #712] @ 0x2c8 │ │ movteq fp, #24624 @ 0x6030 │ │ eorseq r7, r1, r8, lsl #12 │ │ eorseq r7, r1, r4, lsl #12 │ │ movteq ip, #5781 @ 0x1695 │ │ movteq ip, #7040 @ 0x1b80 │ │ movteq ip, #7016 @ 0x1b68 │ │ movteq sl, #18432 @ 0x4800 │ │ movteq ip, #5705 @ 0x1649 │ │ movteq sl, #28588 @ 0x6fac │ │ - ldc2l 9, cr6, [sp, #422] @ 0x1a6 @ │ │ + ldc2l 10, cr6, [sp] @ │ │ movteq sl, #28216 @ 0x6e38 │ │ - ldc2l 12, cr10, [pc, #992] @ 2440ca0 │ │ - ldc2l 0, cr7, [sp, #508] @ 0x1fc │ │ - ldc2l 3, cr11, [pc, #704] @ 2440b88 │ │ - ldc2l 10, cr6, [sp, #588] @ 0x24c @ │ │ + ldc2l 13, cr10, [pc, #148] @ 2440954 │ │ + ldc2l 0, cr7, [sp, #688] @ 0x2b0 │ │ + ldc2l 3, cr11, [pc, #884] @ 2440c3c │ │ + ldc2l 10, cr6, [sp, #768] @ 0x300 @ │ │ stc2l 14, cr15, [r0, #576]! @ 0x240 │ │ movteq r5, #18420 @ 0x47f4 │ │ - ldc2l 7, cr7, [sp, #36] @ 0x24 │ │ - ldc2l 13, cr2, [lr, #468] @ 0x1d4 │ │ + ldc2l 7, cr7, [sp, #216] @ 0xd8 │ │ + ldc2l 13, cr2, [lr, #648] @ 0x288 │ │ movteq fp, #24864 @ 0x6120 │ │ ldrshteq r7, [r1], -r8 │ │ ldrshteq r7, [r1], -r4 │ │ movteq ip, #6021 @ 0x1785 │ │ movteq ip, #7280 @ 0x1c70 │ │ movteq ip, #7256 @ 0x1c58 │ │ movteq sl, #18672 @ 0x48f0 │ │ movteq ip, #5945 @ 0x1739 │ │ - ldc2l 10, cr6, [sp, #300] @ 0x12c @ │ │ + ldc2l 10, cr6, [sp, #480] @ 0x1e0 @ │ │ movteq sl, #28336 @ 0x6eb0 │ │ - ldc2l 3, cr3, [lr, #404] @ 0x194 │ │ - ldc2l 5, cr3, [lr, #984] @ 0x3d8 │ │ + ldc2l 3, cr3, [lr, #584] @ 0x248 │ │ + ldc2l 6, cr3, [lr, #140] @ 0x8c │ │ stc2l 7, cr0, [r1, #60]! @ 0x3c │ │ movteq sp, #4812 @ 0x12cc │ │ - ldc2l 13, cr9, [sp, #288] @ 0x120 │ │ + ldc2l 13, cr9, [sp, #468] @ 0x1d4 │ │ stc2l 10, cr14, [r0, #272]! @ 0x110 @ │ │ movteq sp, #4604 @ 0x11fc │ │ - ldc2l 12, cr9, [sp, #464] @ 0x1d0 │ │ + ldc2l 12, cr9, [sp, #644] @ 0x284 │ │ stc2l 9, cr14, [r0, #224]! @ 0xe0 @ │ │ - ldc2l 10, cr15, [sp, #160] @ 0xa0 @ │ │ - ldc2l 0, cr3, [sp, #368] @ 0x170 │ │ + ldc2l 10, cr15, [sp, #340] @ 0x154 @ │ │ + ldc2l 0, cr3, [sp, #548] @ 0x224 │ │ movteq sp, #4480 @ 0x1180 │ │ movteq r5, #24372 @ 0x5f34 │ │ eorseq r7, r1, r4, ror #23 │ │ movteq sp, #4452 @ 0x1164 │ │ movteq pc, #40388 @ 0x9dc4 @ │ │ movteq pc, #40368 @ 0x9db0 @ │ │ - ldc2l 2, cr9, [lr, #420] @ 0x1a4 │ │ + ldc2l 2, cr9, [lr, #600] @ 0x258 │ │ movteq ip, #6876 @ 0x1adc │ │ - ldc2l 5, cr9, [sp, #352] @ 0x160 │ │ + ldc2l 5, cr9, [sp, #532] @ 0x214 │ │ stc2l 2, cr14, [r0, #336]! @ 0x150 │ │ movteq r5, #22608 @ 0x5850 │ │ - ldc2l 11, cr2, [lr, #452] @ 0x1c4 @ │ │ - ldc2l 10, cr5, [lr, #312] @ 0x138 @ │ │ + ldc2l 11, cr2, [lr, #632] @ 0x278 @ │ │ + ldc2l 10, cr5, [lr, #492] @ 0x1ec @ │ │ movteq pc, #40316 @ 0x9d7c @ │ │ eorseq r7, r1, ip, ror #22 │ │ movteq sp, #4336 @ 0x10f0 │ │ movteq pc, #40248 @ 0x9d38 @ │ │ - ldc2l 4, cr7, [sp, #208] @ 0xd0 │ │ - ldc2l 10, cr2, [lr, #228] @ 0xe4 @ │ │ - ldc2l 7, cr11, [lr, #704] @ 0x2c0 │ │ - ldc2l 4, cr9, [pc, #364] @ 2440af0 │ │ + ldc2l 4, cr7, [sp, #388] @ 0x184 │ │ + ldc2l 10, cr2, [lr, #408] @ 0x198 @ │ │ + ldc2l 7, cr11, [lr, #884] @ 0x374 │ │ + ldc2l 4, cr9, [pc, #544] @ 2440ba4 │ │ │ │ 02440980 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ ldr r4, [pc, #64] @ 24409d0 │ │ mov r1, #6 │ │ add r4, pc, r4 │ │ @@ -1303136,17 +1303135,17 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 7, cr10, [pc, #660] @ 2440c6c │ │ - ldc2l 10, cr10, [lr, #520] @ 0x208 @ │ │ - stc2l 10, cr9, [r0, #676]! @ 0x2a4 @ │ │ + ldc2l 7, cr10, [pc, #840] @ 2440d20 │ │ + ldc2l 10, cr10, [lr, #700] @ 0x2bc @ │ │ + stc2l 10, cr9, [r0, #856]! @ 0x358 @ │ │ │ │ 024409dc : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #24 │ │ mov ip, r1 │ │ mov r3, r0 │ │ @@ -1303293,15 +1303292,15 @@ │ │ mov r3, r4 │ │ bl 270ed90 │ │ mov r0, r8 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 10, cr8, [lr, #112] @ 0x70 @ │ │ + ldc2l 10, cr8, [lr, #292] @ 0x124 @ │ │ │ │ 02440c10 : │ │ ldr r1, [r1] │ │ cmp r1, #1 │ │ movlt r0, #0 │ │ bxlt lr │ │ push {r4, r5, r6, r7, fp, lr} │ │ @@ -1303398,21 +1303397,21 @@ │ │ cmp r9, r5 │ │ bne 2440d60 │ │ ldr r0, [r6] │ │ ldr r1, [r8] │ │ sub r9, r1, r0 │ │ str r9, [r8] │ │ b 2440cf0 │ │ - stc2l 11, cr5, [r0, #484]! @ 0x1e4 @ │ │ + stc2l 11, cr5, [r0, #664]! @ 0x298 @ │ │ stc2l 8, cr13, [r0, #736]! @ 0x2e0 │ │ - ldc2l 3, cr14, [pc, #608] @ 2441010 │ │ - ldc2l 1, cr2, [pc, #228] @ 2440e98 │ │ - ldc2l 7, cr12, [lr, #412] @ 0x19c │ │ - ldc2l 10, cr4, [lr, #4] @ │ │ - stc2l 11, cr5, [r0, #132]! @ 0x84 @ │ │ + ldc2l 3, cr14, [pc, #788] @ 24410c4 │ │ + ldc2l 1, cr2, [pc, #408] @ 2440f4c │ │ + ldc2l 7, cr12, [lr, #592] @ 0x250 │ │ + ldc2l 10, cr4, [lr, #184] @ 0xb8 @ │ │ + stc2l 11, cr5, [r0, #312]! @ 0x138 @ │ │ │ │ 02440dbc : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r3 │ │ mov r6, r2 │ │ mov r7, r1 │ │ @@ -1303479,21 +1303478,21 @@ │ │ str r2, [r0], #4 │ │ bcc 2440eb4 │ │ ldr r0, [r5] │ │ ldr r1, [r4] │ │ sub r3, r1, r0 │ │ str r3, [r4] │ │ b 2440e40 │ │ - ldc2l 8, cr10, [sp, #332] @ 0x14c │ │ + vcadd.f32 d26, d29, d0, #270 │ │ stc2l 7, cr13, [r0, #416]! @ 0x1a0 │ │ - ldc2l 2, cr14, [pc, #288] @ 244100c │ │ - ldc2l 15, cr1, [pc, #932] @ 2441294 │ │ - ldc2l 6, cr12, [lr, #108] @ 0x6c │ │ - ldc2l 8, cr4, [lr, #724] @ 0x2d4 │ │ - ldc2l 7, cr10, [sp, #1004] @ 0x3ec │ │ + ldc2l 2, cr14, [pc, #468] @ 24410c0 │ │ + ldc2l 0, cr2, [pc, #88] @ 2440f48 │ │ + ldc2l 6, cr12, [lr, #288] @ 0x120 │ │ + vcadd.f32 q10, q15, q9, #270 │ │ + vcadd.f32 d26, d13, d24, #270 │ │ │ │ 02440ef8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ mov r4, r3 │ │ mov r6, r2 │ │ @@ -1303548,16 +1303547,16 @@ │ │ ldr r0, [pc, #24] @ 2440fec │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 14, cr3, [pc, #792] @ 2441308 │ │ - ldc2l 14, cr3, [pc, #104] @ 244105c │ │ + ldc2l 14, cr3, [pc, #972] @ 24413bc │ │ + ldc2l 14, cr3, [pc, #284] @ 2441110 │ │ │ │ 02440ff0 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r4, r1 │ │ mov r5, r0 │ │ @@ -1303613,16 +1303612,16 @@ │ │ ldr r0, [pc, #24] @ 24410e8 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - stc2l 10, cr7, [r0, #552]! @ 0x228 @ │ │ - stc2l 9, cr7, [r0, #420]! @ 0x1a4 @ │ │ + stc2l 10, cr7, [r0, #732]! @ 0x2dc @ │ │ + stc2l 9, cr7, [r0, #510]! @ 0x1fe @ │ │ │ │ 024410ec : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ mov r6, r1 │ │ ldr r1, [pc, #324] @ 2441248 │ │ @@ -1303704,17 +1303703,17 @@ │ │ add r1, sp, #24 │ │ add r2, sp, #20 │ │ mov r0, r4 │ │ bl 270edf0 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 13, cr5, [sp, #12] │ │ - ldc2l 12, cr5, [sp, #508] @ 0x1fc │ │ - ldc2l 11, cr5, [sp, #972] @ 0x3cc @ │ │ + ldc2l 13, cr5, [sp, #192] @ 0xc0 │ │ + ldc2l 12, cr5, [sp, #688] @ 0x2b0 │ │ + ldc2l 12, cr5, [sp, #128] @ 0x80 │ │ │ │ 02441254 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #36 @ 0x24 │ │ mov r7, r1 │ │ ldr r1, [pc, #244] @ 2441360 │ │ @@ -1303776,15 +1303775,15 @@ │ │ mov r1, r4 │ │ ldr r2, [fp, #16] │ │ mov r3, r9 │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 11, cr5, [sp, #620] @ 0x26c @ │ │ + ldc2l 11, cr5, [sp, #800] @ 0x320 @ │ │ │ │ 02441364 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #180 @ 0xb4 │ │ mov r6, r3 │ │ mov r5, r2 │ │ @@ -1303914,20 +1303913,20 @@ │ │ ldr r0, [pc, #40] @ 2441594 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 3, cr6, [lr, #256] @ 0x100 │ │ - ldc2l 4, cr6, [sp, #316] @ 0x13c │ │ - ldc2l 9, cr1, [lr, #442] @ 0x1ba @ │ │ - ldc2l 12, cr9, [pc, #412] @ 2441730 │ │ - ldc2l 10, cr5, [sp, #60] @ 0x3c @ │ │ - ldc2l 1, cr6, [lr, #416] @ 0x1a0 │ │ + ldc2l 3, cr6, [lr, #436] @ 0x1b4 │ │ + ldc2l 4, cr6, [sp, #496] @ 0x1f0 │ │ + ldc2l 10, cr1, [lr, #40] @ 0x28 @ │ │ + ldc2l 12, cr9, [pc, #592] @ 24417e4 │ │ + ldc2l 10, cr5, [sp, #240] @ 0xf0 @ │ │ + ldc2l 1, cr6, [lr, #596] @ 0x254 │ │ │ │ 02441598 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #156 @ 0x9c │ │ mov r9, r1 │ │ ldr r1, [pc, #584] @ 24417f8 │ │ @@ -1304074,31 +1304073,31 @@ │ │ mov r3, #2 │ │ add r0, pc, r0 │ │ str r2, [sp] │ │ add r1, pc, r1 │ │ mov r2, r6 │ │ bl 270e230 │ │ b 2441798 │ │ - ldc2l 8, cr5, [sp, #348] @ 0x15c │ │ - ldc2l 0, cr6, [lr, #636] @ 0x27c │ │ + vcadd.f32 d21, d29, d4, #270 │ │ + ldc2l 0, cr6, [lr, #816] @ 0x330 │ │ stc2l 14, cr12, [r0, #408]! @ 0x198 │ │ - ldc2l 11, cr9, [pc, #40] @ 2441834 @ │ │ - stc2l 0, cr5, [r0, #864]! @ 0x360 │ │ - ldc2l 7, cr3, [pc, #452] @ 24419d8 │ │ - ldc2l 9, cr11, [pc, #468] @ 24419ec @ │ │ - ldc2l 5, cr5, [pc, #856] @ 2441b74 │ │ + ldc2l 11, cr9, [pc, #220] @ 24418e8 @ │ │ + stc2l 1, cr5, [r0, #20]! │ │ + ldc2l 7, cr3, [pc, #632] @ 2441a8c │ │ + ldc2l 10, cr11, [pc, #92] @ 2441874 @ │ │ + ldc2l 6, cr5, [pc, #12] @ 2441828 │ │ stc2l 14, cr12, [r0, #240]! @ 0xf0 │ │ - ldc2l 10, cr1, [pc, #160] @ 24418c4 @ │ │ - ldc2l 1, cr6, [sp, #768] @ 0x300 │ │ - stc2l 4, cr1, [r0, #448]! @ 0x1c0 │ │ - ldc2l 9, cr11, [pc, #408] @ 24419c8 @ │ │ - stc2l 4, cr1, [r0, #340]! @ 0x154 │ │ - ldc2l 15, cr5, [lr, #92] @ 0x5c │ │ - ldc2l 13, cr13, [lr, #264] @ 0x108 │ │ - stc2l 4, cr8, [r0, #292]! @ 0x124 │ │ + ldc2l 10, cr1, [pc, #340] @ 2441978 @ │ │ + ldc2l 1, cr6, [sp, #948] @ 0x3b4 │ │ + stc2l 4, cr1, [r0, #628]! @ 0x274 │ │ + ldc2l 9, cr11, [pc, #498] @ 2441a22 @ │ │ + stc2l 4, cr1, [r0, #520]! @ 0x208 │ │ + ldc2l 15, cr5, [lr, #272] @ 0x110 │ │ + ldc2l 13, cr13, [lr, #444] @ 0x1bc │ │ + stc2l 4, cr8, [r0, #472]! @ 0x1d8 │ │ movteq lr, #37508 @ 0x9284 │ │ │ │ 02441840 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ ldr r9, [r0] │ │ @@ -1304292,26 +1304291,26 @@ │ │ ldr r1, [pc, #68] @ 2441b88 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270e230 │ │ mov r0, #0 │ │ str r0, [sp, #12] │ │ b 2441aa8 │ │ - ldc2l 12, cr9, [sp, #476] @ 0x1dc │ │ - ldc2l 15, cr7, [sp, #876] @ 0x36c │ │ - ldc2l 5, cr5, [sp, #588] @ 0x24c │ │ - ldc2l 5, cr5, [sp, #252] @ 0xfc │ │ - ldc2l 12, cr7, [lr, #604] @ 0x25c │ │ - ldc2l 12, cr13, [sp, #780] @ 0x30c │ │ - ldc2l 7, cr11, [pc, #376] @ 2441cf0 │ │ + ldc2l 12, cr9, [sp, #656] @ 0x290 │ │ + ldc2l 0, cr8, [sp, #32] │ │ + ldc2l 5, cr5, [sp, #768] @ 0x300 │ │ + ldc2l 5, cr5, [sp, #432] @ 0x1b0 │ │ + ldc2l 12, cr7, [lr, #784] @ 0x310 │ │ + ldc2l 12, cr13, [sp, #960] @ 0x3c0 │ │ + ldc2l 7, cr11, [pc, #556] @ 2441da4 │ │ eorseq r5, r1, sp, asr lr │ │ - stc2l 0, cr1, [r0, #816]! @ 0x330 │ │ + stc2l 0, cr1, [r0, #996]! @ 0x3e4 │ │ ldrsbteq r5, [r1], -ip │ │ eorseq r5, r1, ip, ror sp │ │ - stc2l 4, cr0, [r0, #168]! @ 0xa8 │ │ + stc2l 4, cr0, [r0, #348]! @ 0x15c │ │ movteq sp, #40748 @ 0x9f2c │ │ eorseq r5, r1, r1, asr #31 │ │ eorseq r6, r1, r4, asr #32 │ │ │ │ 02441b94 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ @@ -1304747,27 +1304746,27 @@ │ │ ldr r0, [pc, #68] @ 2442294 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - stc2l 10, cr2, [r0, #264]! @ 0x108 @ │ │ - ldc2l 7, cr5, [lr, #380] @ 0x17c │ │ - ldc2l 15, cr0, [lr, #148] @ 0x94 │ │ + stc2l 10, cr2, [r0, #444]! @ 0x1bc @ │ │ + ldc2l 7, cr5, [lr, #560] @ 0x230 │ │ + ldc2l 15, cr0, [lr, #328] @ 0x148 │ │ stc2l 10, cr10, [r0, #952]! @ 0x3b8 @ │ │ - ldc2l 15, cr14, [pc, #200] @ 2442344 │ │ - ldc2l 15, cr0, [lr, #452] @ 0x1c4 │ │ - ldc2l 7, cr3, [lr, #884] @ 0x374 │ │ - ldc2l 0, cr7, [pc, #88] @ 24422e0 │ │ - ldc2l 14, cr0, [lr, #900] @ 0x384 │ │ - ldc2l 7, cr3, [lr, #380] @ 0x17c │ │ + ldc2l 15, cr14, [pc, #380] @ 24423f8 │ │ + ldc2l 15, cr0, [lr, #632] @ 0x278 │ │ + vcadd.f32 d19, d14, d10, #270 │ │ + ldc2l 0, cr7, [pc, #268] @ 2442394 │ │ + ldc2l 15, cr0, [lr, #56] @ 0x38 │ │ + ldc2l 7, cr3, [lr, #560] @ 0x230 │ │ eorseq r5, r1, ip, lsr r9 │ │ - ldc2l 11, cr4, [sp, #812] @ 0x32c @ │ │ - stc2l 6, cr2, [r0, #824]! @ 0x338 │ │ + ldc2l 11, cr4, [sp, #992] @ 0x3e0 @ │ │ + stc2l 6, cr2, [r0, #1004]! @ 0x3ec │ │ │ │ 02442298 : │ │ b 270ee20 │ │ │ │ 0244229c : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ @@ -1304784,15 +1304783,15 @@ │ │ bl 270da50 │ │ ldr r0, [pc, #20] @ 24422ec │ │ add r0, pc, r0 │ │ bl 270cd00 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ movteq sp, #38876 @ 0x97dc │ │ - ldc2l 11, cr4, [sp, #332] @ 0x14c @ │ │ + ldc2l 11, cr4, [sp, #512] @ 0x200 @ │ │ eorseq r5, r1, r8, lsr #13 │ │ │ │ 024422f0 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #8 │ │ bl 270db20 │ │ @@ -1304970,21 +1304969,21 @@ │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r8, r9, sl, fp, pc} │ │ stc2l 2, cr12, [r0, #152]! @ 0x98 │ │ eorseq r5, r1, r4, ror r5 │ │ mlaseq r1, r8, r5, r5 │ │ - ldc2l 2, cr3, [lr, #656] @ 0x290 │ │ + ldc2l 2, cr3, [lr, #836] @ 0x344 │ │ eorseq r5, r1, r4, asr #9 │ │ eorseq r5, r1, ip, ror #8 │ │ - ldc2l 0, cr15, [sp, #712] @ 0x2c8 │ │ - ldc2l 9, cr0, [lr, #234] @ 0xea @ │ │ + ldc2l 0, cr15, [sp, #892] @ 0x37c │ │ + ldc2l 9, cr0, [lr, #324] @ 0x144 @ │ │ eorseq r5, r1, r8, lsl #8 │ │ - ldc2l 11, cr0, [pc, #424] @ 2442780 @ │ │ + ldc2l 11, cr0, [pc, #604] @ 2442834 @ │ │ mlaseq r1, ip, r4, r5 │ │ stc2l 0, cr12, [r0, #88]! @ 0x58 │ │ │ │ 024425dc : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ @@ -1305487,99 +1305486,99 @@ │ │ add r1, r3, r0, lsl #3 │ │ add r0, r2, r2, lsl #3 │ │ mov r2, r6 │ │ add r0, r3, r0, lsl #3 │ │ sub r0, r0, #72 @ 0x48 │ │ bl 270e780 │ │ b 2442d38 │ │ - ldc2l 5, cr12, [pc, #232] @ 2442eb4 │ │ - vcmla.f16 d23, d16, d17, #270 │ │ + ldc2l 5, cr12, [pc, #412] @ 2442f68 │ │ + vcmla.f16 , q8, q7, #270 │ │ movteq sp, #37968 @ 0x9450 │ │ - ldc2l 14, cr10, [lr, #364] @ 0x16c │ │ + ldc2l 14, cr10, [lr, #544] @ 0x220 │ │ movteq sp, #37956 @ 0x9444 │ │ movteq sp, #37956 @ 0x9444 │ │ movteq sp, #37932 @ 0x942c │ │ movteq sp, #37888 @ 0x9400 │ │ movteq sp, #39488 @ 0x9a40 │ │ - vcadd.f32 d30, d15, d12, #270 │ │ - stc2l 2, cr2, [r0, #196]! @ 0xc4 │ │ + ldc2l 8, cr14, [pc, #228] @ 2442ed4 │ │ + stc2l 2, cr2, [r0, #376]! @ 0x178 │ │ movteq sp, #39452 @ 0x9a1c │ │ ldrhteq r5, [r1], -r4 │ │ movteq sp, #37784 @ 0x9398 │ │ - vcadd.f32 q11, , , #270 │ │ + ldc2l 9, cr6, [pc, #32] @ 2442e24 @ │ │ eorseq r5, r1, r8, ror #9 │ │ movteq sp, #37372 @ 0x91fc │ │ - ldc2l 7, cr6, [pc, #284] @ 2442f2c │ │ + ldc2l 7, cr6, [pc, #464] @ 2442fe0 │ │ eorseq r5, r1, ip, lsr r3 │ │ movteq sp, #38944 @ 0x9820 │ │ movteq sp, #37228 @ 0x916c │ │ movteq sp, #38792 @ 0x9788 │ │ movteq sp, #37264 @ 0x9190 │ │ movteq sp, #37248 @ 0x9180 │ │ movteq sp, #37228 @ 0x916c │ │ - ldc2l 6, cr6, [pc, #732] @ 244310c │ │ + ldc2l 6, cr6, [pc, #912] @ 24431c0 │ │ eorseq r5, r1, ip, lsr #5 │ │ movteq sp, #38796 @ 0x978c │ │ movteq sp, #37132 @ 0x910c │ │ movteq sp, #38648 @ 0x96f8 │ │ movteq sp, #37120 @ 0x9100 │ │ vcmla.f16 , q8, q4, #270 │ │ stc2l 0, cr10, [r0, #776]! @ 0x308 │ │ movteq sp, #38624 @ 0x96e0 │ │ movteq sp, #37048 @ 0x90b8 │ │ - stc2l 15, cr1, [r0, #20]! │ │ + stc2l 15, cr1, [r0, #200]! @ 0xc8 │ │ movteq sp, #38548 @ 0x9694 │ │ movteq sp, #36944 @ 0x9050 │ │ movteq sp, #36968 @ 0x9068 │ │ - stc2l 14, cr1, [r0, #724]! @ 0x2d4 │ │ + stc2l 14, cr1, [r0, #904]! @ 0x388 │ │ eorseq r5, r1, r4, lsr sl │ │ movteq sp, #37400 @ 0x9218 │ │ movteq sp, #37704 @ 0x9348 │ │ - ldc2l 7, cr14, [pc, #144] @ 2442f08 │ │ + ldc2l 7, cr14, [pc, #324] @ 2442fbc │ │ movteq sp, #37640 @ 0x9308 │ │ eorseq r5, r1, r4, lsr r3 │ │ ldrsbteq r5, [r1], -r8 │ │ movteq sp, #37608 @ 0x92e8 │ │ movteq sp, #37600 @ 0x92e0 │ │ - stc2l 1, cr2, [r0, #164]! @ 0xa4 │ │ + stc2l 1, cr2, [r0, #344]! @ 0x158 │ │ movteq sp, #37540 @ 0x92a4 │ │ - stc2l 0, cr2, [r0, #964]! @ 0x3c4 │ │ + stc2l 1, cr2, [r0, #120]! @ 0x78 │ │ movteq sp, #37472 @ 0x9260 │ │ - stc2l 0, cr2, [r0, #692]! @ 0x2b4 │ │ + stc2l 0, cr2, [r0, #872]! @ 0x368 │ │ movteq sp, #37888 @ 0x9400 │ │ eorseq r5, r1, r0, lsl ip │ │ movteq sp, #37872 @ 0x93f0 │ │ - ldc2l 8, cr10, [lr, #588] @ 0x24c │ │ + vcadd.f32 q13, q15, q0, #270 │ │ movteq ip, #40524 @ 0x9e4c │ │ - ldc2l 8, cr10, [lr, #348] @ 0x15c │ │ - ldc2l 5, cr2, [sp, #488] @ 0x1e8 │ │ - ldc2l 2, cr0, [lr, #228] @ 0xe4 │ │ - ldc2l 3, cr0, [pc, #920] @ 244325c │ │ - ldc2l 7, cr10, [lr, #956] @ 0x3bc │ │ - ldc2l 5, cr2, [sp, #72] @ 0x48 │ │ - ldc2l 1, cr0, [lr, #836] @ 0x344 │ │ + vcadd.f32 d26, d30, d4, #270 │ │ + ldc2l 5, cr2, [sp, #668] @ 0x29c │ │ + ldc2l 2, cr0, [lr, #408] @ 0x198 │ │ + ldc2l 4, cr0, [pc, #76] @ 2442f10 │ │ + ldc2l 8, cr10, [lr, #112] @ 0x70 │ │ + ldc2l 5, cr2, [sp, #252] @ 0xfc │ │ + ldc2l 1, cr0, [lr, #1016] @ 0x3f8 │ │ movteq sp, #37840 @ 0x93d0 │ │ eorseq r5, r1, r8, ror #10 │ │ movteq ip, #40228 @ 0x9d24 │ │ - ldc2l 11, cr2, [lr, #976] @ 0x3d0 @ │ │ - ldc2l 2, cr2, [pc, #576] @ 2443124 │ │ - stc2l 12, cr3, [r0, #700]! @ 0x2bc │ │ + ldc2l 12, cr2, [lr, #132] @ 0x84 │ │ + ldc2l 2, cr2, [pc, #756] @ 24431d8 │ │ + stc2l 12, cr3, [r0, #880]! @ 0x370 │ │ movteq ip, #40704 @ 0x9f00 │ │ eorseq r5, r1, r4, asr r5 │ │ eorseq r4, r1, r4, lsl ip │ │ - ldc2l 1, cr4, [pc, #956] @ 24432b4 │ │ - ldc2l 3, cr4, [sp, #332] @ 0x14c │ │ + ldc2l 2, cr4, [pc, #112] @ 2442f68 │ │ + ldc2l 3, cr4, [sp, #512] @ 0x200 │ │ ldrhteq r4, [r1], -r0 │ │ - ldc2l 0, cr4, [pc, #524] @ 2443110 │ │ - stc2l 14, cr1, [r0, #364]! @ 0x16c │ │ - ldc2l 9, cr10, [lr, #412] @ 0x19c @ │ │ - ldc2l 3, cr0, [lr, #756] @ 0x2f4 │ │ - ldc2l 5, cr0, [pc, #984] @ 24432ec │ │ + ldc2l 0, cr4, [pc, #704] @ 24431c4 │ │ + stc2l 14, cr1, [r0, #544]! @ 0x220 │ │ + ldc2l 9, cr10, [lr, #502] @ 0x1f6 @ │ │ + ldc2l 3, cr0, [lr, #936] @ 0x3a8 │ │ + ldc2l 6, cr0, [pc, #140] @ 2442fa0 │ │ movteq ip, #40580 @ 0x9e84 │ │ - stc2l 13, cr1, [r0, #92]! @ 0x5c │ │ + stc2l 13, cr1, [r0, #272]! @ 0x110 │ │ │ │ 02442f18 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 2442f34 │ │ @@ -1305595,16 +1305594,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 1, cr12, [pc, #664] @ 244320c │ │ - stc2l 5, cr7, [r0, #52]! @ 0x34 │ │ + ldc2l 1, cr12, [pc, #844] @ 24432c0 │ │ + stc2l 5, cr7, [r0, #232]! @ 0xe8 │ │ │ │ 02442f74 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #16 │ │ mov r3, r2 │ │ mov r2, r1 │ │ @@ -1305668,18 +1305667,18 @@ │ │ bl 270d970 │ │ ldr r0, [pc, #28] @ 2443084 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 12, cr3, [pc, #444] @ 244323c │ │ - ldc2l 13, cr3, [sp, #844] @ 0x34c │ │ + ldc2l 12, cr3, [pc, #624] @ 24432f0 │ │ + ldc2l 14, cr3, [sp] │ │ eorseq r4, r1, r8, asr #18 │ │ - ldc2l 12, cr3, [pc, #92] @ 24430e8 │ │ + ldc2l 12, cr3, [pc, #272] @ 244319c │ │ │ │ 02443088 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ @@ -1305713,20 +1305712,20 @@ │ │ str r0, [r1] │ │ ldr r0, [pc, #36] @ 2443138 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - stc2l 8, cr1, [r0, #492]! @ 0x1ec │ │ - ldc2l 3, cr10, [lr, #952] @ 0x3b8 │ │ - ldc2l 13, cr15, [sp, #884] @ 0x374 │ │ - ldc2l 0, cr0, [pc, #88] @ 2443190 │ │ + vcmla.f16 d17, d16, d24, #270 │ │ + ldc2l 4, cr10, [lr, #108] @ 0x6c │ │ + ldc2l 14, cr15, [sp, #40] @ 0x28 │ │ + ldc2l 0, cr0, [pc, #268] @ 2443244 │ │ movteq ip, #39304 @ 0x9988 │ │ - stc2l 8, cr1, [r0, #92]! @ 0x5c │ │ + vcmla.f16 , q0, q2, #270 │ │ │ │ 0244313c : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ vpush {d8-d10} │ │ sub sp, sp, #16 │ │ vldr d16, [r0] │ │ @@ -1305845,25 +1305844,25 @@ │ │ add r0, r4, r9, lsl #5 │ │ vstr d8, [r0, #-32] @ 0xffffffe0 │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d10} │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ stc2l 15, cr5, [r9, #656]! @ 0x290 │ │ - stc2l 7, cr1, [r0, #408]! @ 0x198 │ │ + stc2l 7, cr1, [r0, #588]! @ 0x24c │ │ stc2l 0, cr13, [r0, #940]! @ 0x3ac │ │ - stc2l 7, cr1, [r0, #184]! @ 0xb8 │ │ + stc2l 7, cr1, [r0, #364]! @ 0x16c │ │ stc2l 0, cr13, [r0, #716]! @ 0x2cc │ │ - stc2l 6, cr1, [r0, #968]! @ 0x3c8 │ │ + stc2l 7, cr1, [r0, #124]! @ 0x7c │ │ stc2l 0, cr13, [r0, #476]! @ 0x1dc │ │ - stc2l 6, cr1, [r0, #680]! @ 0x2a8 │ │ + stc2l 6, cr1, [r0, #860]! @ 0x35c │ │ stc2l 0, cr13, [r0, #188]! @ 0xbc │ │ - stc2l 6, cr1, [r0, #472]! @ 0x1d8 │ │ + stc2l 6, cr1, [r0, #652]! @ 0x28c │ │ stc2l 15, cr12, [r0, #1004]! @ 0x3ec │ │ - stc2l 6, cr1, [r0, #232]! @ 0xe8 │ │ + stc2l 6, cr1, [r0, #412]! @ 0x19c │ │ stc2l 15, cr12, [r0, #764]! @ 0x2fc │ │ │ │ 0244335c : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #72 @ 0x48 │ │ vldr d26, [r0, #24] │ │ @@ -1306003,17 +1306002,17 @@ │ │ sub r0, r0, #1 │ │ add r1, r7, r0 │ │ sub r3, r9, r0 │ │ mov r0, sl │ │ mov r2, r8 │ │ bl 270d970 │ │ b 2443530 │ │ - ldc2l 9, cr3, [sp, #350] @ 0x15e @ │ │ - vcadd.f32 , , , #270 │ │ - ldc2l 8, cr3, [sp, #748] @ 0x2ec │ │ + ldc2l 9, cr3, [sp, #440] @ 0x1b8 @ │ │ + ldc2l 9, cr3, [sp, #48] @ 0x30 @ │ │ + vcadd.f32 , , q12, #270 │ │ │ │ 024435a0 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #16 │ │ mov r9, r1 │ │ ldr r1, [pc, #264] @ 24436c0 │ │ @@ -1306085,15 +1306084,15 @@ │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ movteq ip, #39796 @ 0x9b74 │ │ movteq ip, #39760 @ 0x9b50 │ │ movteq ip, #39720 @ 0x9b28 │ │ movteq ip, #39660 @ 0x9aec │ │ movteq ip, #39632 @ 0x9ad0 │ │ - stc2l 0, cr7, [r0, #420]! @ 0x1a4 │ │ + stc2l 0, cr7, [r0, #600]! @ 0x258 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 024436e0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ @@ -1307112,25 +1307111,25 @@ │ │ ldr r0, [pc, #1896] @ 2444e2c │ │ vstr d8, [r4] │ │ add r0, pc, r0 │ │ vstr d16, [r0] │ │ b 2444904 │ │ movteq ip, #39484 @ 0x9a3c │ │ movteq sp, #37021 @ 0x909d │ │ - stc2l 0, cr3, [r0, #1004]! @ 0x3ec │ │ + stc2l 1, cr3, [r0, #160]! @ 0xa0 │ │ movteq sp, #37384 @ 0x9208 │ │ - ldc2l 13, cr9, [sp, #248] @ 0xf8 │ │ + ldc2l 13, cr9, [sp, #428] @ 0x1ac │ │ movteq sp, #37845 @ 0x93d5 │ │ stc2l 3, cr9, [r0, #280]! @ 0x118 │ │ movteq sp, #37657 @ 0x9319 │ │ - ldc2l 9, cr11, [pc, #186] @ 24447b2 @ │ │ + ldc2l 9, cr11, [pc, #276] @ 244480c @ │ │ movteq sp, #37100 @ 0x90ec │ │ - ldc2l 12, cr11, [lr, #828] @ 0x33c │ │ + ldc2l 12, cr11, [lr, #1008] @ 0x3f0 │ │ movteq sp, #37441 @ 0x9241 │ │ - ldc2l 9, cr15, [sp, #386] @ 0x182 @ │ │ + ldc2l 9, cr15, [sp, #476] @ 0x1dc @ │ │ movteq ip, #40308 @ 0x9d74 │ │ movteq ip, #39276 @ 0x996c │ │ movteq ip, #40812 @ 0x9f6c │ │ vcmp.f64 d16, #0.0 │ │ vmrs APSR_nzcv, fpscr │ │ ble 2444964 │ │ vmov.f64 d17, #36 @ 0x41200000 10.0 │ │ @@ -1307245,15 +1307244,15 @@ │ │ str r0, [r1] │ │ b 2444a58 │ │ ldr r1, [pc, #1352] @ 2444e28 │ │ add r1, pc, r1 │ │ b 2444a34 │ │ movteq ip, #40612 @ 0x9ea4 │ │ movteq ip, #40616 @ 0x9ea8 │ │ - ldc2l 4, cr3, [sp, #828] @ 0x33c │ │ + ldc2l 4, cr3, [sp, #1008] @ 0x3f0 │ │ movteq ip, #40744 @ 0x9f28 │ │ movteq ip, #40488 @ 0x9e28 │ │ movteq ip, #40448 @ 0x9e00 │ │ ldr r5, [sp, #16] │ │ mov r8, r2 │ │ vcvt.s32.f64 s0, d16 │ │ vmov r0, s0 │ │ @@ -1307324,15 +1307323,15 @@ │ │ str r7, [sp] │ │ stmib sp, {r5, r7} │ │ bl 270eef0 │ │ ldr r0, [pc, #724] @ 2444cf4 │ │ add r0, pc, r0 │ │ b 24448ac │ │ movteq ip, #40500 @ 0x9e34 │ │ - ldc2l 3, cr3, [sp, #652] @ 0x28c │ │ + ldc2l 3, cr3, [sp, #832] @ 0x340 │ │ ldr r1, [pc, #1040] @ 2444e44 │ │ add r1, pc, r1 │ │ mov r0, r7 │ │ mov r2, r9 │ │ mov r3, #160 @ 0xa0 │ │ bl 270d970 │ │ mov r0, r5 │ │ @@ -1307346,15 +1307345,15 @@ │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movteq ip, #40116 @ 0x9cb4 │ │ movteq ip, #40104 @ 0x9ca8 │ │ movteq ip, #40172 @ 0x9cec │ │ movteq ip, #40088 @ 0x9c98 │ │ movteq ip, #40076 @ 0x9c8c │ │ - ldc2l 3, cr3, [sp, #108] @ 0x6c │ │ + ldc2l 3, cr3, [sp, #288] @ 0x120 │ │ nop {0} │ │ andcs r0, r0, r0 │ │ andmi sl, r2, #95 @ 0x5f │ │ ldr r2, [pc, #704] @ 2444d58 │ │ mov r5, #1 │ │ ldr r4, [pc, #700] @ 2444d5c │ │ ldr r1, [pc, #700] @ 2444d60 │ │ @@ -1307418,193 +1307417,193 @@ │ │ movteq ip, #39760 @ 0x9b50 │ │ movteq ip, #39804 @ 0x9b7c │ │ movteq ip, #39688 @ 0x9b08 │ │ movteq ip, #39696 @ 0x9b10 │ │ movteq ip, #39720 @ 0x9b28 │ │ movteq ip, #37220 @ 0x9164 │ │ movteq ip, #37224 @ 0x9168 │ │ - ldc2l 5, cr4, [pc, #860] @ 2444f04 │ │ - ldc2l 14, cr2, [lr, #524] @ 0x20c │ │ + ldc2l 6, cr4, [pc, #16] @ 2444bb8 │ │ + ldc2l 14, cr2, [lr, #704] @ 0x2c0 │ │ movteq ip, #37040 @ 0x90b0 │ │ eorseq r3, r1, r8, lsl sl │ │ movteq fp, #40592 @ 0x9e90 │ │ movteq ip, #40072 @ 0x9c88 │ │ movteq ip, #39044 @ 0x9884 │ │ movteq ip, #39544 @ 0x9a78 │ │ movteq ip, #39808 @ 0x9b80 │ │ movteq ip, #39532 @ 0x9a6c │ │ movteq ip, #39964 @ 0x9c1c │ │ movteq ip, #39552 @ 0x9a80 │ │ movteq ip, #39736 @ 0x9b38 │ │ - ldc2l 10, cr3, [sp, #520] @ 0x208 @ │ │ - ldc2l 3, cr11, [pc, #680] @ 2444e88 │ │ + ldc2l 10, cr3, [sp, #700] @ 0x2bc @ │ │ + ldc2l 3, cr11, [pc, #860] @ 2444f3c │ │ movteq ip, #39432 @ 0x9a08 │ │ movteq ip, #39376 @ 0x99d0 │ │ movteq ip, #37804 @ 0x93ac │ │ movteq ip, #39824 @ 0x9b90 │ │ movteq ip, #38492 @ 0x965c │ │ movteq ip, #38860 @ 0x97cc │ │ movteq ip, #39052 @ 0x988c │ │ movteq ip, #39024 @ 0x9870 │ │ - ldc2l 6, cr3, [sp, #264] @ 0x108 │ │ - ldc2l 15, cr10, [pc, #424] @ 2444db0 │ │ + ldc2l 6, cr3, [sp, #444] @ 0x1bc │ │ + ldc2l 15, cr10, [pc, #604] @ 2444e64 │ │ movteq ip, #38344 @ 0x95c8 │ │ movteq ip, #38288 @ 0x9590 │ │ movteq fp, #40812 @ 0x9f6c │ │ movteq ip, #38728 @ 0x9748 │ │ movteq ip, #38832 @ 0x97b0 │ │ movteq ip, #38892 @ 0x97ec │ │ movteq ip, #39080 @ 0x98a8 │ │ movteq ip, #38832 @ 0x97b0 │ │ movteq ip, #38836 @ 0x97b4 │ │ - ldc2l 7, cr3, [sp, #840] @ 0x348 │ │ - ldc2l 0, cr11, [pc, #1000] @ 244501c │ │ + ldc2l 7, cr3, [sp, #1020] @ 0x3fc │ │ + ldc2l 1, cr11, [pc, #156] @ 2444cd0 │ │ movteq ip, #38744 @ 0x9758 │ │ movteq ip, #38688 @ 0x9720 │ │ movteq ip, #37116 @ 0x90fc │ │ movteq ip, #39116 @ 0x98cc │ │ movteq ip, #38700 @ 0x972c │ │ movteq ip, #37920 @ 0x9420 │ │ movteq ip, #37900 @ 0x940c │ │ - ldc2l 3, cr3, [sp, #344] @ 0x158 │ │ - ldc2l 12, cr10, [pc, #504] @ 2444e50 │ │ + ldc2l 3, cr3, [sp, #524] @ 0x20c │ │ + ldc2l 12, cr10, [pc, #684] @ 2444f04 │ │ movteq ip, #37596 @ 0x92dc │ │ movteq ip, #37540 @ 0x92a4 │ │ movteq fp, #40064 @ 0x9c80 │ │ movteq ip, #37564 @ 0x92bc │ │ movteq ip, #38156 @ 0x950c │ │ movteq ip, #37732 @ 0x9364 │ │ movteq ip, #38108 @ 0x94dc │ │ - ldc2l 2, cr3, [sp, #920] @ 0x398 │ │ - ldc2l 12, cr10, [pc, #56] @ 2444cb4 │ │ + ldc2l 3, cr3, [sp, #76] @ 0x4c │ │ + ldc2l 12, cr10, [pc, #236] @ 2444d68 │ │ movteq ip, #37480 @ 0x9268 │ │ movteq ip, #37428 @ 0x9234 │ │ movteq ip, #37880 @ 0x93f8 │ │ movteq fp, #39936 @ 0x9c00 │ │ movteq ip, #37440 @ 0x9240 │ │ movteq ip, #38264 @ 0x9578 │ │ movteq ip, #38672 @ 0x9710 │ │ movteq ip, #38676 @ 0x9714 │ │ movteq ip, #38676 @ 0x9714 │ │ movteq fp, #40065 @ 0x9c81 │ │ movteq ip, #38820 @ 0x97a4 │ │ - ldc2l 5, cr3, [sp, #440] @ 0x1b8 │ │ - ldc2l 14, cr10, [pc, #600] @ 2444f08 │ │ + ldc2l 5, cr3, [sp, #620] @ 0x26c │ │ + ldc2l 14, cr10, [pc, #780] @ 2444fbc │ │ movteq ip, #38132 @ 0x94f4 │ │ movteq ip, #38076 @ 0x94bc │ │ movteq fp, #40600 @ 0x9e98 │ │ movteq ip, #38520 @ 0x9678 │ │ movteq fp, #40044 @ 0x9c6c │ │ movteq fp, #40048 @ 0x9c70 │ │ - ldc2l 0, cr4, [pc, #892] @ 2445048 │ │ + ldc2l 1, cr4, [pc, #48] @ 2444cfc │ │ movteq ip, #39316 @ 0x9994 │ │ movteq ip, #39576 @ 0x9a98 │ │ movteq ip, #39276 @ 0x996c │ │ movteq ip, #39292 @ 0x997c │ │ movteq ip, #39736 @ 0x9b38 │ │ movteq ip, #39268 @ 0x9964 │ │ movteq ip, #39264 @ 0x9960 │ │ movteq fp, #40388 @ 0x9dc4 │ │ movteq fp, #40392 @ 0x9dc8 │ │ - ldc2l 2, cr4, [pc, #204] @ 2444dc0 │ │ - ldc2l 13, cr2, [lr, #60] @ 0x3c │ │ + ldc2l 2, cr4, [pc, #384] @ 2444e74 │ │ + ldc2l 13, cr2, [lr, #240] @ 0xf0 │ │ movteq ip, #37157 @ 0x9125 │ │ movteq ip, #39228 @ 0x993c │ │ movteq ip, #39172 @ 0x9904 │ │ movteq ip, #39140 @ 0x98e4 │ │ movteq ip, #39156 @ 0x98f4 │ │ movteq ip, #39148 @ 0x98ec │ │ movteq ip, #39392 @ 0x99e0 │ │ movteq ip, #39384 @ 0x99d8 │ │ movteq ip, #37368 @ 0x91f8 │ │ movteq ip, #37993 @ 0x9469 │ │ movteq ip, #37304 @ 0x91b8 │ │ movteq ip, #39120 @ 0x98d0 │ │ - ldc2l 2, cr7, [pc, #568] @ 2444f64 │ │ - ldc2l 2, cr11, [pc, #248] @ 2444e28 │ │ + ldc2l 2, cr7, [pc, #748] @ 2445018 │ │ + ldc2l 2, cr11, [pc, #428] @ 2444edc │ │ movteq ip, #38488 @ 0x9658 │ │ movteq ip, #39288 @ 0x9978 │ │ movteq ip, #39036 @ 0x987c │ │ - ldc2l 8, cr3, [sp, #744] @ 0x2e8 │ │ - ldc2l 1, cr11, [pc, #920] @ 24450dc │ │ + vcadd.f32 , , , #270 │ │ + ldc2l 2, cr11, [pc, #76] @ 2444d90 │ │ movteq ip, #38972 @ 0x983c │ │ movteq ip, #37356 @ 0x91ec │ │ movteq ip, #39200 @ 0x9920 │ │ - stc2l 9, cr2, [r0, #6]! @ │ │ - ldc2l 1, cr11, [pc, #584] @ 2444fa0 │ │ + stc2l 9, cr2, [r0, #96]! @ 0x60 @ │ │ + ldc2l 1, cr11, [pc, #764] @ 2445054 │ │ movteq ip, #38900 @ 0x97f4 │ │ movteq fp, #40176 @ 0x9cf0 │ │ movteq fp, #40160 @ 0x9ce0 │ │ - ldc2l 1, cr4, [pc, #348] @ 2444ec4 │ │ + ldc2l 1, cr4, [pc, #528] @ 2444f78 │ │ movteq fp, #40100 @ 0x9ca4 │ │ - ldc2l 12, cr2, [lr, #156] @ 0x9c │ │ + ldc2l 12, cr2, [lr, #336] @ 0x150 │ │ movteq fp, #40861 @ 0x9f9d │ │ movteq ip, #38672 @ 0x9710 │ │ - ldc2l 0, cr7, [pc, #824] @ 24450b4 │ │ - ldc2l 0, cr11, [pc, #504] @ 2444f78 │ │ + ldc2l 0, cr7, [pc, #1004] @ 2445168 │ │ + ldc2l 0, cr11, [pc, #684] @ 244502c │ │ movteq ip, #38596 @ 0x96c4 │ │ movteq ip, #38608 @ 0x96d0 │ │ movteq ip, #38016 @ 0x9480 │ │ movteq ip, #38528 @ 0x9680 │ │ movteq ip, #38500 @ 0x9664 │ │ movteq ip, #38516 @ 0x9674 │ │ movteq ip, #38500 @ 0x9664 │ │ movteq ip, #38736 @ 0x9750 │ │ movteq ip, #38448 @ 0x9630 │ │ movteq ip, #38076 @ 0x94bc │ │ - ldc2l 14, cr6, [pc, #472] @ 2444f84 │ │ - ldc2l 14, cr10, [pc, #152] @ 2444e48 │ │ + ldc2l 14, cr6, [pc, #652] @ 2445038 │ │ + ldc2l 14, cr10, [pc, #332] @ 2444efc │ │ movteq ip, #38008 @ 0x9478 │ │ movteq ip, #37428 @ 0x9234 │ │ movteq ip, #37952 @ 0x9440 │ │ movteq ip, #37920 @ 0x9420 │ │ movteq ip, #37936 @ 0x9430 │ │ movteq ip, #37924 @ 0x9424 │ │ movteq ip, #37884 @ 0x93fc │ │ movteq ip, #38144 @ 0x9500 │ │ movteq ip, #38128 @ 0x94f0 │ │ movteq ip, #37912 @ 0x9418 │ │ movteq ip, #37860 @ 0x93e4 │ │ movteq ip, #38288 @ 0x9590 │ │ movteq ip, #37848 @ 0x93d8 │ │ movteq ip, #37836 @ 0x93cc │ │ - ldc2l 13, cr6, [pc, #536] @ 2445004 │ │ - ldc2l 13, cr10, [pc, #216] @ 2444ec8 │ │ + ldc2l 13, cr6, [pc, #716] @ 24450b8 │ │ + ldc2l 13, cr10, [pc, #396] @ 2444f7c │ │ movteq ip, #37728 @ 0x9360 │ │ movteq ip, #37772 @ 0x938c │ │ movteq ip, #37180 @ 0x913c │ │ movteq fp, #40784 @ 0x9f50 │ │ movteq fp, #40768 @ 0x9f40 │ │ - ldc2l 3, cr4, [pc, #732] @ 24450e4 │ │ + ldc2l 3, cr4, [pc, #912] @ 2445198 │ │ movteq fp, #40712 @ 0x9f08 │ │ movteq ip, #37576 @ 0x92c8 │ │ movteq ip, #37728 @ 0x9360 │ │ movteq ip, #37316 @ 0x91c4 │ │ movteq ip, #37308 @ 0x91bc │ │ movteq ip, #37700 @ 0x9344 │ │ movteq ip, #37612 @ 0x92ec │ │ movteq ip, #37584 @ 0x92d0 │ │ movteq ip, #37128 @ 0x9108 │ │ movteq ip, #37157 @ 0x9125 │ │ movteq ip, #37500 @ 0x927c │ │ stc2l 12, cr9, [r0, #564]! @ 0x234 │ │ - ldc2l 7, cr10, [pc, #1000] @ 2445224 │ │ + vcadd.f32 d26, d15, d23, #270 │ │ stc2l 7, cr4, [r9, #992]! @ 0x3e0 │ │ movteq ip, #37004 @ 0x908c │ │ movteq ip, #37372 @ 0x91fc │ │ movteq fp, #40345 @ 0x9d99 │ │ movteq ip, #37324 @ 0x91cc │ │ movteq ip, #37984 @ 0x9460 │ │ movteq ip, #37964 @ 0x944c │ │ stc2l 14, cr9, [r0, #20]! │ │ - ldc2l 9, cr10, [pc, #228] @ 2444f44 @ │ │ + ldc2l 9, cr10, [pc, #318] @ 2444f9e @ │ │ stc2l 9, cr4, [r9, #232]! @ 0xe8 @ │ │ movteq ip, #37888 @ 0x9400 │ │ stc2l 13, cr9, [r0, #740]! @ 0x2e4 │ │ - ldc2l 9, cr10, [pc, #76] @ 2444ebc @ │ │ + ldc2l 9, cr10, [pc, #166] @ 2444f16 @ │ │ movteq ip, #36940 @ 0x904c │ │ │ │ 02444e70 : │ │ vldr d16, [r0] │ │ vcmp.f64 d16, #0.0 │ │ vmrs APSR_nzcv, fpscr │ │ ble 2444e88 │ │ @@ -1307948,51 +1307947,51 @@ │ │ andeq r0, r0, r0, lsl r0 │ │ andeq r0, r0, r6 │ │ andeq r0, r0, r8 │ │ andeq r0, r0, r0, lsr #32 │ │ andeq r0, r0, r0, lsl r0 │ │ andeq r0, r0, r5, lsl r0 │ │ andeq r0, r0, r0, lsl r0 │ │ - ldc2l 5, cr8, [sp, #644] @ 0x284 │ │ + ldc2l 5, cr8, [sp, #824] @ 0x338 │ │ movteq fp, #40100 @ 0x9ca4 │ │ eorseq r3, r1, r4, ror #10 │ │ eorseq r3, r1, r0, lsl #14 │ │ eorseq r3, r1, r8, lsl r3 │ │ - ldc2l 9, cr2, [sp, #38] @ 0x26 @ │ │ - ldc2l 2, cr0, [sp, #436] @ 0x1b4 │ │ + ldc2l 9, cr2, [sp, #128] @ 0x80 @ │ │ + ldc2l 2, cr0, [sp, #616] @ 0x268 │ │ eorseq r3, r1, r0, lsl #13 │ │ - ldc2l 15, cr3, [pc, #896] @ 2445778 │ │ - ldc2l 4, cr0, [lr, #800] @ 0x320 │ │ - ldc2l 0, cr12, [lr, #416] @ 0x1a0 │ │ + ldc2l 0, cr4, [pc, #52] @ 244542c │ │ + ldc2l 4, cr0, [lr, #980] @ 0x3d4 │ │ + ldc2l 0, cr12, [lr, #596] @ 0x254 │ │ ldrshteq r3, [r1], -r8 │ │ - ldc2l 1, cr2, [lr, #40] @ 0x28 │ │ - ldc2l 14, cr7, [pc, #316] @ 2445548 │ │ - ldc2l 15, cr11, [lr, #1008] @ 0x3f0 │ │ + ldc2l 1, cr2, [lr, #220] @ 0xdc │ │ + ldc2l 14, cr7, [pc, #496] @ 24455fc │ │ + ldc2l 0, cr12, [lr, #164] @ 0xa4 │ │ eorseq r3, r1, r8, lsl #7 │ │ - ldc2l 12, cr14, [pc, #548] @ 244563c │ │ - ldc2l 0, cr8, [pc, #820] @ 2445750 │ │ + ldc2l 12, cr14, [pc, #728] @ 24456f0 │ │ + ldc2l 0, cr8, [pc, #1000] @ 2445804 │ │ ldrshteq r3, [r1], -r4 │ │ - ldc2l 12, cr14, [pc, #260] @ 2445528 │ │ - ldc2l 0, cr8, [pc, #532] @ 244563c │ │ - ldc2l 6, cr0, [lr, #388] @ 0x184 │ │ - ldc2l 11, cr1, [pc, #344] @ 2445588 @ │ │ - ldc2l 11, cr14, [pc, #852] @ 2445788 @ │ │ - ldc2l 0, cr8, [pc, #100] @ 244549c │ │ - ldc2l 14, cr3, [pc, #760] @ 2445734 │ │ - ldc2l 11, cr14, [pc, #516] @ 2445644 @ │ │ - ldc2l 15, cr7, [pc, #788] @ 2445758 │ │ + ldc2l 12, cr14, [pc, #440] @ 24455dc │ │ + ldc2l 0, cr8, [pc, #712] @ 24456f0 │ │ + ldc2l 6, cr0, [lr, #568] @ 0x238 │ │ + ldc2l 11, cr1, [pc, #524] @ 244563c @ │ │ + ldc2l 12, cr14, [pc, #8] @ 244543c │ │ + ldc2l 0, cr8, [pc, #280] @ 2445550 │ │ + ldc2l 14, cr3, [pc, #940] @ 24457e8 │ │ + ldc2l 11, cr14, [pc, #696] @ 24456f8 @ │ │ + ldc2l 15, cr7, [pc, #968] @ 244580c │ │ ldrshteq r3, [r1], -r4 │ │ - ldc2l 15, cr11, [sp, #256] @ 0x100 │ │ - ldc2l 1, cr6, [sp, #472] @ 0x1d8 │ │ - ldc2l 4, cr6, [sp, #88] @ 0x58 │ │ - ldc2l 15, cr7, [pc, #244] @ 244554c │ │ + ldc2l 15, cr11, [sp, #436] @ 0x1b4 │ │ + ldc2l 1, cr6, [sp, #652] @ 0x28c │ │ + ldc2l 4, cr6, [sp, #268] @ 0x10c │ │ + ldc2l 15, cr7, [pc, #424] @ 2445600 │ │ eorseq r3, r1, ip, ror r2 │ │ - ldc2l 3, cr6, [sp, #872] @ 0x368 │ │ - ldc2l 15, cr7, [pc, #4] @ 2445468 │ │ - ldc2l 1, cr8, [sp, #420] @ 0x1a4 │ │ + ldc2l 4, cr6, [sp, #28] │ │ + ldc2l 15, cr7, [pc, #184] @ 244551c │ │ + ldc2l 1, cr8, [sp, #600] @ 0x258 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 02445468 : │ │ ldr r0, [pc, #64] @ 24454b0 │ │ add r0, pc, r0 │ │ vldr d16, [r0] │ │ vcmp.f64 d16, #0.0 │ │ @@ -1308217,19 +1308216,19 @@ │ │ ldr r0, [pc, #36] @ 24457f4 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 6, cr1, [pc, #516] @ 24459f0 │ │ - ldc2l 0, cr2, [lr, #692] @ 0x2b4 │ │ + ldc2l 6, cr1, [pc, #696] @ 2445aa4 │ │ + ldc2l 0, cr2, [lr, #872] @ 0x368 │ │ eorseq r2, r1, r4, lsr pc │ │ eorseq r2, r1, r4, lsr pc │ │ - ldc2l 4, cr1, [pc, #964] @ 2445bc0 │ │ + ldc2l 5, cr1, [pc, #120] @ 2445874 │ │ │ │ 024457f8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ mov r7, r3 │ │ mov r9, r2 │ │ @@ -1309062,189 +1309061,189 @@ │ │ ldr r1, [r1] │ │ str r1, [r9] │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 10, cr15, [ip, #552] @ 0x228 @ │ │ + ldc2l 10, cr15, [ip, #732] @ 0x2dc @ │ │ movteq fp, #37840 @ 0x93d0 │ │ movteq ip, #37004 @ 0x908c │ │ movteq fp, #37928 @ 0x9428 │ │ - ldc2l 9, cr13, [sp, #144] @ 0x90 @ │ │ - vcadd.f32 d29, d30, d19, #270 │ │ + ldc2l 9, cr13, [sp, #234] @ 0xea @ │ │ + ldc2l 8, cr13, [lr, #832] @ 0x340 │ │ movteq fp, #37888 @ 0x9400 │ │ eorseq r2, r1, ip, lsl #28 │ │ movteq fp, #37820 @ 0x93bc │ │ movteq fp, #37772 @ 0x938c │ │ ldrsbteq r2, [r1], -r8 │ │ movteq fp, #38972 @ 0x983c │ │ movteq fp, #37588 @ 0x92d4 │ │ movteq ip, #37012 @ 0x9094 │ │ movteq fp, #38816 @ 0x97a0 │ │ movteq fp, #37572 @ 0x92c4 │ │ - ldc2l 14, cr15, [sp, #128] @ 0x80 │ │ - ldc2l 7, cr13, [lr, #668] @ 0x29c │ │ + ldc2l 14, cr15, [sp, #308] @ 0x134 │ │ + ldc2l 7, cr13, [lr, #848] @ 0x350 │ │ movteq fp, #37516 @ 0x928c │ │ - ldc2l 8, cr13, [sp, #64] @ 0x40 │ │ - ldc2l 7, cr13, [lr, #428] @ 0x1ac │ │ + ldc2l 8, cr13, [sp, #244] @ 0xf4 │ │ + ldc2l 7, cr13, [lr, #608] @ 0x260 │ │ movteq fp, #38660 @ 0x9704 │ │ movteq fp, #37424 @ 0x9230 │ │ movteq fp, #38640 @ 0x96f0 │ │ movteq fp, #37332 @ 0x91d4 │ │ stc2l 11, cr8, [r0, #372]! @ 0x174 @ │ │ - ldc2l 6, cr13, [lr, #764] @ 0x2fc │ │ + ldc2l 6, cr13, [lr, #944] @ 0x3b0 │ │ movteq fp, #37284 @ 0x91a4 │ │ movteq fp, #38623 @ 0x96df │ │ - ldc2l 11, cr9, [sp, #940] @ 0x3ac @ │ │ - ldc2l 6, cr13, [lr, #524] @ 0x20c │ │ + ldc2l 12, cr9, [sp, #96] @ 0x60 │ │ + ldc2l 6, cr13, [lr, #704] @ 0x2c0 │ │ eorseq r2, r1, ip, lsr #24 │ │ movteq fp, #37328 @ 0x91d0 │ │ movteq fp, #38296 @ 0x9598 │ │ movteq fp, #38276 @ 0x9584 │ │ movteq fp, #37160 @ 0x9128 │ │ stc2l 10, cr8, [r0, #708]! @ 0x2c4 @ │ │ - ldc2l 6, cr13, [lr, #76] @ 0x4c │ │ + ldc2l 6, cr13, [lr, #256] @ 0x100 │ │ movteq fp, #37112 @ 0x90f8 │ │ - ldc2l 6, cr7, [pc, #276] @ 24466c8 │ │ - ldc2l 5, cr13, [lr, #892] @ 0x37c │ │ + ldc2l 6, cr7, [pc, #456] @ 244677c │ │ + ldc2l 6, cr13, [lr, #48] @ 0x30 │ │ eorseq r2, r1, r4, lsl #23 │ │ movteq fp, #37164 @ 0x912c │ │ movteq fp, #37040 @ 0x90b0 │ │ - ldc2l 7, cr15, [ip, #120] @ 0x78 │ │ + ldc2l 7, cr15, [ip, #300] @ 0x12c │ │ movteq fp, #38476 @ 0x964c │ │ movteq fp, #37352 @ 0x91e8 │ │ movteq fp, #36968 @ 0x9068 │ │ movteq fp, #36936 @ 0x9048 │ │ - ldc2l 11, cr15, [sp, #720] @ 0x2d0 @ │ │ - ldc2l 5, cr13, [lr, #236] @ 0xec │ │ - ldc2l 2, cr1, [sp, #60] @ 0x3c │ │ + ldc2l 11, cr15, [sp, #900] @ 0x384 @ │ │ + ldc2l 5, cr13, [lr, #416] @ 0x1a0 │ │ + ldc2l 2, cr1, [sp, #240] @ 0xf0 │ │ movteq fp, #36864 @ 0x9000 │ │ - ldc2l 11, cr15, [sp, #384] @ 0x180 @ │ │ - ldc2l 4, cr13, [lr, #924] @ 0x39c │ │ + ldc2l 11, cr15, [sp, #564] @ 0x234 @ │ │ + ldc2l 5, cr13, [lr, #80] @ 0x50 │ │ movteq fp, #38020 @ 0x9484 │ │ movteq sl, #40888 @ 0x9fb8 │ │ - ldc2l 11, cr15, [sp, #112] @ 0x70 @ │ │ - ldc2l 4, cr13, [lr, #652] @ 0x28c │ │ + ldc2l 11, cr15, [sp, #292] @ 0x124 @ │ │ + ldc2l 4, cr13, [lr, #832] @ 0x340 │ │ movteq sl, #40828 @ 0x9f7c │ │ - ldc2l 10, cr15, [sp, #888] @ 0x378 @ │ │ - ldc2l 4, cr13, [lr, #380] @ 0x17c │ │ + ldc2l 11, cr15, [sp, #44] @ 0x2c @ │ │ + ldc2l 4, cr13, [lr, #560] @ 0x230 │ │ movteq sl, #40748 @ 0x9f2c │ │ movteq fp, #37880 @ 0x93f8 │ │ movteq sl, #40736 @ 0x9f20 │ │ vcmla.f16 d24, d16, d25, #270 │ │ - ldc2l 4, cr13, [lr, #44] @ 0x2c │ │ + ldc2l 4, cr13, [lr, #224] @ 0xe0 │ │ movteq fp, #37927 @ 0x9427 │ │ movteq sl, #40660 @ 0x9ed4 │ │ stc2l 8, cr8, [r0, #356]! @ 0x164 │ │ - ldc2l 3, cr13, [lr, #748] @ 0x2ec │ │ - ldc2l 9, cr9, [sp, #18] @ │ │ + ldc2l 3, cr13, [lr, #928] @ 0x3a0 │ │ + ldc2l 9, cr9, [sp, #108] @ 0x6c @ │ │ movteq fp, #40120 @ 0x9cb8 │ │ eorseq r2, r1, r8, lsr r9 │ │ movteq sl, #40548 @ 0x9e64 │ │ stc2l 7, cr8, [r0, #948]! @ 0x3b4 │ │ - ldc2l 3, cr13, [lr, #316] @ 0x13c │ │ + ldc2l 3, cr13, [lr, #496] @ 0x1f0 │ │ movteq sl, #40500 @ 0x9e34 │ │ - ldc2l 9, cr15, [sp, #288] @ 0x120 @ │ │ - ldc2l 3, cr13, [lr, #92] @ 0x5c │ │ + ldc2l 9, cr15, [sp, #378] @ 0x17a @ │ │ + ldc2l 3, cr13, [lr, #272] @ 0x110 │ │ eorseq r2, r1, r4, asr #17 │ │ movteq sl, #40408 @ 0x9dd8 │ │ stc2l 7, cr8, [r0, #388]! @ 0x184 │ │ - ldc2l 2, cr13, [lr, #780] @ 0x30c │ │ + ldc2l 2, cr13, [lr, #960] @ 0x3c0 │ │ movteq sl, #40360 @ 0x9da8 │ │ stc2l 7, cr8, [r0, #164]! @ 0xa4 │ │ - ldc2l 2, cr13, [lr, #556] @ 0x22c │ │ + ldc2l 2, cr13, [lr, #736] @ 0x2e0 │ │ movteq sl, #40276 @ 0x9d54 │ │ stc2l 6, cr8, [r0, #868]! @ 0x364 │ │ - ldc2l 2, cr13, [lr, #236] @ 0xec │ │ - stc2l 9, cr0, [r0, #316]! @ 0x13c @ │ │ + ldc2l 2, cr13, [lr, #416] @ 0x1a0 │ │ + stc2l 9, cr0, [r0, #406]! @ 0x196 @ │ │ movteq fp, #39736 @ 0x9b38 │ │ movteq sl, #40188 @ 0x9cfc │ │ stc2l 6, cr8, [r0, #516]! @ 0x204 │ │ - ldc2l 1, cr13, [lr, #908] @ 0x38c │ │ + ldc2l 2, cr13, [lr, #64] @ 0x40 │ │ stc2l 11, cr6, [r0, #616]! @ 0x268 @ │ │ movteq fp, #39648 @ 0x9ae0 │ │ movteq sl, #40100 @ 0x9ca4 │ │ - vcadd.f32 d31, d13, d8, #270 │ │ - ldc2l 1, cr13, [lr, #572] @ 0x23c │ │ + ldc2l 8, cr15, [sp, #212] @ 0xd4 │ │ + ldc2l 1, cr13, [lr, #752] @ 0x2f0 │ │ movteq sl, #40052 @ 0x9c74 │ │ stc2l 5, cr8, [r0, #964]! @ 0x3c4 │ │ - ldc2l 1, cr13, [lr, #332] @ 0x14c │ │ + ldc2l 1, cr13, [lr, #512] @ 0x200 │ │ eorseq r2, r1, r0, lsl #14 │ │ movteq sl, #39960 @ 0x9c18 │ │ - ldc2l 7, cr15, [sp, #480] @ 0x1e0 │ │ - ldc2l 0, cr13, [lr, #1020] @ 0x3fc │ │ + ldc2l 7, cr15, [sp, #660] @ 0x294 │ │ + ldc2l 1, cr13, [lr, #176] @ 0xb0 │ │ movteq fp, #37020 @ 0x909c │ │ movteq sl, #39884 @ 0x9bcc │ │ stc2l 5, cr8, [r0, #340]! @ 0x154 │ │ - ldc2l 0, cr13, [lr, #732] @ 0x2dc │ │ + ldc2l 0, cr13, [lr, #912] @ 0x390 │ │ movteq sl, #39836 @ 0x9b9c │ │ - ldc2l 5, cr9, [sp, #924] @ 0x39c │ │ - ldc2l 0, cr13, [lr, #508] @ 0x1fc │ │ + ldc2l 6, cr9, [sp, #80] @ 0x50 │ │ + ldc2l 0, cr13, [lr, #688] @ 0x2b0 │ │ eorseq r2, r1, r8, lsr #12 │ │ movteq sl, #39884 @ 0x9bcc │ │ movteq sl, #40852 @ 0x9f94 │ │ movteq sl, #40836 @ 0x9f84 │ │ movteq sl, #39720 @ 0x9b28 │ │ stc2l 4, cr8, [r0, #708]! @ 0x2c4 │ │ - ldc2l 0, cr13, [lr, #76] @ 0x4c │ │ + ldc2l 0, cr13, [lr, #256] @ 0x100 │ │ movteq sl, #39672 @ 0x9af8 │ │ - ldc2l 0, cr7, [pc, #276] @ 2446814 │ │ - ldc2l 15, cr12, [lr, #892] @ 0x37c │ │ + ldc2l 0, cr7, [pc, #456] @ 24468c8 │ │ + ldc2l 0, cr13, [lr, #48] @ 0x30 │ │ eorseq r2, r1, r8, lsl #11 │ │ movteq sl, #39728 @ 0x9b30 │ │ movteq sl, #39604 @ 0x9ab4 │ │ movteq sl, #39548 @ 0x9a7c │ │ - ldc2l 1, cr15, [ip, #120] @ 0x78 │ │ + ldc2l 1, cr15, [ip, #300] @ 0x12c │ │ movteq sl, #39520 @ 0x9a60 │ │ movteq sl, #40600 @ 0x9e98 │ │ movteq fp, #38912 @ 0x9800 │ │ movteq sl, #39488 @ 0x9a40 │ │ - ldc2l 5, cr15, [sp, #680] @ 0x2a8 │ │ - ldc2l 15, cr12, [lr, #172] @ 0xac │ │ + ldc2l 5, cr15, [sp, #860] @ 0x35c │ │ + ldc2l 15, cr12, [lr, #352] @ 0x160 │ │ movteq sl, #39432 @ 0x9a08 │ │ - ldc2l 5, cr15, [sp, #184] @ 0xb8 │ │ - ldc2l 14, cr12, [lr, #700] @ 0x2bc │ │ + ldc2l 5, cr15, [sp, #364] @ 0x16c │ │ + ldc2l 14, cr12, [lr, #880] @ 0x370 │ │ movteq sl, #39296 @ 0x9980 │ │ - ldc2l 3, cr9, [sp, #844] @ 0x34c │ │ - ldc2l 14, cr12, [lr, #428] @ 0x1ac │ │ - ldc2l 4, cr9, [sp, #188] @ 0xbc │ │ - ldc2l 14, cr12, [lr, #796] @ 0x31c │ │ + ldc2l 4, cr9, [sp] │ │ + ldc2l 14, cr12, [lr, #608] @ 0x260 │ │ + ldc2l 4, cr9, [sp, #368] @ 0x170 │ │ + ldc2l 14, cr12, [lr, #976] @ 0x3d0 │ │ movteq sl, #40344 @ 0x9d98 │ │ movteq sl, #40320 @ 0x9d80 │ │ movteq sl, #39212 @ 0x992c │ │ - ldc2l 4, cr15, [sp, #600] @ 0x258 │ │ - ldc2l 14, cr12, [lr, #92] @ 0x5c │ │ + ldc2l 4, cr15, [sp, #780] @ 0x30c │ │ + ldc2l 14, cr12, [lr, #272] @ 0x110 │ │ movteq sl, #39156 @ 0x98f4 │ │ - ldc2l 4, cr15, [sp, #104] @ 0x68 │ │ - ldc2l 13, cr12, [lr, #620] @ 0x26c │ │ + ldc2l 4, cr15, [sp, #284] @ 0x11c │ │ + ldc2l 13, cr12, [lr, #800] @ 0x320 │ │ movteq sl, #39044 @ 0x9884 │ │ - ldc2l 13, cr6, [pc, #836] @ 2446abc │ │ - ldc2l 13, cr12, [lr, #428] @ 0x1ac │ │ + ldc2l 13, cr6, [pc, #1016] @ 2446b70 │ │ + ldc2l 13, cr12, [lr, #608] @ 0x260 │ │ movteq sl, #38984 @ 0x9848 │ │ - ldc2l 14, cr6, [pc, #196] @ 2446848 │ │ - ldc2l 13, cr12, [lr, #812] @ 0x32c │ │ + ldc2l 14, cr6, [pc, #376] @ 24468fc │ │ + ldc2l 13, cr12, [lr, #992] @ 0x3e0 │ │ movteq sl, #39088 @ 0x98b0 │ │ movteq sl, #40284 @ 0x9d5c │ │ - ldc2l 14, cr4, [lr, #688] @ 0x2b0 │ │ + ldc2l 14, cr4, [lr, #868] @ 0x364 │ │ movteq sl, #38808 @ 0x9798 │ │ - ldc2l 12, cr6, [pc, #932] @ 2446b40 │ │ - ldc2l 12, cr12, [lr, #524] @ 0x20c │ │ + ldc2l 13, cr6, [pc, #88] @ 24467f4 │ │ + ldc2l 12, cr12, [lr, #704] @ 0x2c0 │ │ movteq sl, #38764 @ 0x976c │ │ movteq sl, #40248 @ 0x9d38 │ │ - ldc2l 3, cr1, [lr, #4] │ │ + ldc2l 3, cr1, [lr, #184] @ 0xb8 │ │ movteq sl, #38748 @ 0x975c │ │ - ldc2l 1, cr9, [sp, #700] @ 0x2bc │ │ - ldc2l 12, cr12, [lr, #284] @ 0x11c │ │ + ldc2l 1, cr9, [sp, #880] @ 0x370 │ │ + ldc2l 12, cr12, [lr, #464] @ 0x1d0 │ │ movteq sl, #39796 @ 0x9b74 │ │ - ldc2l 13, cr14, [ip, #776] @ 0x308 │ │ - ldc2l 4, cr3, [sp, #400] @ 0x190 │ │ - ldc2l 10, cr12, [sp, #452] @ 0x1c4 @ │ │ - ldc2l 0, cr9, [lr, #396] @ 0x18c │ │ - ldc2l 14, cr14, [ip, #280] @ 0x118 │ │ + ldc2l 13, cr14, [ip, #956] @ 0x3bc │ │ + ldc2l 4, cr3, [sp, #580] @ 0x244 │ │ + ldc2l 10, cr12, [sp, #632] @ 0x278 @ │ │ + ldc2l 0, cr9, [lr, #576] @ 0x240 │ │ + ldc2l 14, cr14, [ip, #460] @ 0x1cc │ │ │ │ 024467cc : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ ldr r7, [r0] │ │ cmp r7, #1 │ │ blt 2446810 │ │ @@ -1309258,15 +1309257,15 @@ │ │ mov r3, #1 │ │ bl 270d970 │ │ add r5, r5, r4 │ │ subs r7, r7, #1 │ │ bne 24467f0 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 6, cr0, [sp, #124] @ 0x7c │ │ + ldc2l 6, cr0, [sp, #304] @ 0x130 │ │ │ │ 0244681c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ mov r9, r0 │ │ ldr r0, [pc, #336] @ 2446984 │ │ @@ -1309356,15 +1309355,15 @@ │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ movteq fp, #37384 @ 0x9208 │ │ movteq fp, #37368 @ 0x91f8 │ │ movteq fp, #37360 @ 0x91f0 │ │ movteq fp, #37352 @ 0x91e8 │ │ movteq fp, #37256 @ 0x9188 │ │ - ldc2l 4, cr0, [sp, #636] @ 0x27c │ │ + ldc2l 4, cr0, [sp, #816] @ 0x330 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 024469a0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ str r1, [sp, #4] │ │ @@ -1309612,21 +1309611,21 @@ │ │ strne r0, [r9] │ │ ldr r0, [pc, #40] @ 2446da0 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 5, cr2, [pc, #204] @ 2446e5c │ │ + ldc2l 5, cr2, [pc, #384] @ 2446f10 │ │ eorseq r1, r1, r0, asr #23 │ │ eorseq r1, r1, r0, asr #23 │ │ - ldc2l 14, cr11, [pc, #224] @ 2446e7c │ │ - ldc2l 1, cr12, [sp, #500] @ 0x1f4 │ │ + ldc2l 14, cr11, [pc, #404] @ 2446f30 │ │ + ldc2l 1, cr12, [sp, #680] @ 0x2a8 │ │ stc2l 5, cr9, [r0, #444]! @ 0x1bc │ │ - ldc2l 2, cr2, [pc, #796] @ 24470c4 │ │ + ldc2l 2, cr2, [pc, #976] @ 2447178 │ │ │ │ 02446da4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8} │ │ sub sp, sp, #896 @ 0x380 │ │ @@ -1309842,27 +1309841,27 @@ │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #40 @ 0x28 │ │ vpop {d8} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 9, cr14, [sp, #372] @ 0x174 @ │ │ + ldc2l 9, cr14, [sp, #462] @ 0x1ce @ │ │ ldrshteq r1, [r1], -r8 │ │ ldrshteq r1, [r1], -r4 │ │ - ldc2l 6, cr6, [lr, #640] @ 0x280 │ │ - ldc2l 0, cr12, [sp, #244] @ 0xf4 │ │ - ldc2l 8, cr10, [sp, #104] @ 0x68 │ │ - ldc2l 11, cr5, [pc, #332] @ 2447284 @ │ │ - ldc2l 15, cr11, [ip, #860] @ 0x35c │ │ - ldc2l 10, cr5, [pc, #956] @ 24474fc @ │ │ - ldc2l 15, cr11, [ip, #460] @ 0x1cc │ │ - ldc2l 6, cr14, [sp, #632] @ 0x278 │ │ - vcadd.f32 d20, d13, d9, #270 │ │ - ldc2l 11, cr0, [sp, #32] @ │ │ + ldc2l 6, cr6, [lr, #820] @ 0x334 │ │ + ldc2l 0, cr12, [sp, #424] @ 0x1a8 │ │ + vcadd.f32 q13, , , #270 │ │ + ldc2l 11, cr5, [pc, #512] @ 2447338 @ │ │ + ldc2l 0, cr12, [ip, #16] │ │ + ldc2l 11, cr5, [pc, #112] @ 24471b0 @ │ │ + ldc2l 15, cr11, [ip, #640] @ 0x280 │ │ + ldc2l 6, cr14, [sp, #812] @ 0x32c │ │ + ldc2l 8, cr4, [sp, #216] @ 0xd8 │ │ + ldc2l 11, cr0, [sp, #212] @ 0xd4 @ │ │ │ │ 0244714c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ mov r7, r3 │ │ mov r6, r2 │ │ @@ -1309990,23 +1309989,23 @@ │ │ sub r0, r1, r0 │ │ mov r1, r4 │ │ add r0, r0, #1 │ │ str r0, [fp, #-32] @ 0xffffffe0 │ │ sub r0, fp, #32 │ │ bl 270d130 │ │ b 244728c │ │ - ldc2l 5, cr14, [sp, #720] @ 0x2d0 │ │ - ldc2l 15, cr3, [pc, #496] @ 244755c │ │ - ldc2l 12, cr11, [sp, #708] @ 0x2c4 │ │ - ldc2l 15, cr3, [pc, #496] @ 2447564 │ │ - ldc2l 6, cr14, [sp, #48] @ 0x30 │ │ - ldc2l 4, cr4, [sp, #884] @ 0x374 │ │ - ldc2l 13, cr11, [sp, #36] @ 0x24 │ │ - ldc2l 15, cr5, [pc, #664] @ 244761c │ │ - ldc2l 5, cr14, [sp, #448] @ 0x1c0 │ │ + ldc2l 5, cr14, [sp, #900] @ 0x384 │ │ + ldc2l 15, cr3, [pc, #676] @ 2447610 │ │ + ldc2l 12, cr11, [sp, #888] @ 0x378 │ │ + ldc2l 15, cr3, [pc, #676] @ 2447618 │ │ + ldc2l 6, cr14, [sp, #228] @ 0xe4 │ │ + ldc2l 5, cr4, [sp, #40] @ 0x28 │ │ + ldc2l 13, cr11, [sp, #216] @ 0xd8 │ │ + ldc2l 15, cr5, [pc, #844] @ 24476d0 │ │ + ldc2l 5, cr14, [sp, #628] @ 0x274 │ │ │ │ 02447384 : │ │ ldr r1, [r1] │ │ mov r3, r0 │ │ mov r0, #0 │ │ cmp r1, #1 │ │ blt 2447404 │ │ @@ -1310134,16 +1310133,16 @@ │ │ vldrne d16, [r5, #56] @ 0x38 │ │ vstrne d16, [r4, #16] │ │ ldr r0, [pc, #16] @ 244758c │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 11, cr7, [pc, #1000] @ 2447978 @ │ │ - ldc2l 11, cr7, [pc, #728] @ 244786c @ │ │ + ldc2l 12, cr7, [pc, #156] @ 244762c │ │ + ldc2l 11, cr7, [pc, #908] @ 2447920 @ │ │ │ │ 02447590 : │ │ vldr d25, [r0, #8] │ │ vldr d16, [r0] │ │ vmul.f64 d17, d25, d25 │ │ vmov.f64 d18, d17 │ │ vmla.f64 d18, d16, d16 │ │ @@ -1310957,70 +1310956,70 @@ │ │ mov r0, #1 │ │ str r5, [ip] │ │ vstr d11, [r3] │ │ str r0, [r2] │ │ vstr d16, [r6] │ │ vstr d17, [r1] │ │ b 24477a0 │ │ - ldc2l 12, cr9, [lr, #356] @ 0x164 │ │ + ldc2l 12, cr9, [lr, #536] @ 0x218 │ │ eorseq r1, r1, r4, lsr #32 │ │ eorseq r1, r1, r4, lsr #32 │ │ - vcadd.f32 , , , #270 │ │ - vcadd.f32 , , q12, #270 │ │ - ldc2l 5, cr15, [lr, #192] @ 0xc0 │ │ - ldc2l 1, cr13, [pc, #988] @ 2448650 │ │ - ldc2l 9, cr7, [pc, #56] @ 24482b0 @ │ │ - ldc2l 1, cr13, [pc, #544] @ 244849c │ │ - ldc2l 9, cr11, [sp, #22] @ │ │ - ldc2l 5, cr11, [sp, #980] @ 0x3d4 │ │ - ldc2l 10, cr9, [lr, #364] @ 0x16c @ │ │ - ldc2l 12, cr3, [lr, #92] @ 0x5c │ │ + ldc2l 8, cr1, [pc, #1000] @ 2448650 │ │ + ldc2l 9, cr7, [pc, #42] @ 2448296 @ │ │ + ldc2l 5, cr15, [lr, #372] @ 0x174 │ │ + ldc2l 2, cr13, [pc, #144] @ 2448304 │ │ + ldc2l 9, cr7, [pc, #146] @ 244830a @ │ │ + ldc2l 1, cr13, [pc, #724] @ 2448550 │ │ + ldc2l 9, cr11, [sp, #112] @ 0x70 @ │ │ + ldc2l 6, cr11, [sp, #136] @ 0x88 │ │ + ldc2l 10, cr9, [lr, #544] @ 0x220 @ │ │ + ldc2l 12, cr3, [lr, #272] @ 0x110 │ │ stc2l 12, cr10, [r0, #768]! @ 0x300 │ │ - ldc2l 15, cr14, [pc, #992] @ 2448674 │ │ - ldc2l 5, cr11, [sp, #660] @ 0x294 │ │ - ldc2l 11, cr3, [lr, #908] @ 0x38c @ │ │ - ldc2l 5, cr11, [sp, #196] @ 0xc4 │ │ - ldc2l 11, cr5, [lr, #640] @ 0x280 @ │ │ - ldc2l 13, cr7, [sp, #532] @ 0x214 │ │ - ldc2l 4, cr13, [lr, #508] @ 0x1fc │ │ - ldc2l 12, cr9, [sp, #460] @ 0x1cc │ │ - ldc2l 7, cr3, [pc, #360] @ 244841c │ │ - ldc2l 11, cr9, [sp, #188] @ 0xbc @ │ │ - ldc2l 6, cr3, [pc, #88] @ 2448314 │ │ - ldc2l 10, cr9, [sp, #892] @ 0x37c @ │ │ - ldc2l 5, cr3, [pc, #792] @ 24485dc │ │ - ldc2l 10, cr9, [sp, #620] @ 0x26c @ │ │ - ldc2l 5, cr3, [pc, #520] @ 24484d4 │ │ - ldc2l 9, cr9, [sp, #486] @ 0x1e6 @ │ │ - ldc2l 4, cr3, [pc, #872] @ 244863c │ │ - ldc2l 9, cr9, [sp, #398] @ 0x18e @ │ │ - ldc2l 4, cr3, [pc, #696] @ 2448594 │ │ + ldc2l 0, cr15, [pc, #148] @ 2448328 │ │ + ldc2l 5, cr11, [sp, #840] @ 0x348 │ │ + ldc2l 12, cr3, [lr, #64] @ 0x40 │ │ + ldc2l 5, cr11, [sp, #376] @ 0x178 │ │ + ldc2l 11, cr5, [lr, #820] @ 0x334 @ │ │ + ldc2l 13, cr7, [sp, #712] @ 0x2c8 │ │ + ldc2l 4, cr13, [lr, #688] @ 0x2b0 │ │ + ldc2l 12, cr9, [sp, #640] @ 0x280 │ │ + ldc2l 7, cr3, [pc, #540] @ 24484d0 │ │ + ldc2l 11, cr9, [sp, #368] @ 0x170 @ │ │ + ldc2l 6, cr3, [pc, #268] @ 24483c8 │ │ + ldc2l 11, cr9, [sp, #48] @ 0x30 @ │ │ + ldc2l 5, cr3, [pc, #972] @ 2448690 │ │ + ldc2l 10, cr9, [sp, #800] @ 0x320 @ │ │ + ldc2l 5, cr3, [pc, #700] @ 2448588 │ │ + ldc2l 10, cr9, [sp, #128] @ 0x80 @ │ │ + ldc2l 5, cr3, [pc, #28] @ 24482f0 │ │ + ldc2l 9, cr9, [sp, #488] @ 0x1e8 @ │ │ + ldc2l 4, cr3, [pc, #876] @ 2448648 │ │ movteq r9, #40240 @ 0x9d30 │ │ eorseq r0, r1, r8, asr #19 │ │ eorseq r0, r1, r0, asr #19 │ │ ldrhteq r0, [r1], -r8 │ │ mlaseq r1, r0, r7, r0 │ │ eorseq r0, r1, ip, ror r7 │ │ - ldc2l 7, cr3, [lr, #780] @ 0x30c │ │ - ldc2l 3, cr3, [pc, #808] @ 2448624 │ │ - ldc2l 6, cr3, [lr, #652] @ 0x28c │ │ - ldc2l 2, cr3, [pc, #680] @ 24485ac │ │ - ldc2l 5, cr3, [lr, #988] @ 0x3dc │ │ - ldc2l 1, cr3, [pc, #1016] @ 2448704 │ │ - ldc2l 5, cr3, [lr, #732] @ 0x2dc │ │ - ldc2l 1, cr3, [pc, #760] @ 244860c │ │ - ldc2l 5, cr9, [sp, #28] │ │ - ldc2l 15, cr2, [pc, #952] @ 24486d4 │ │ + ldc2l 7, cr3, [lr, #960] @ 0x3c0 │ │ + ldc2l 3, cr3, [pc, #988] @ 24486d8 │ │ + ldc2l 6, cr3, [lr, #832] @ 0x340 │ │ + ldc2l 2, cr3, [pc, #860] @ 2448660 │ │ + ldc2l 6, cr3, [lr, #144] @ 0x90 │ │ + ldc2l 2, cr3, [pc, #172] @ 24483b8 │ │ + ldc2l 5, cr3, [lr, #912] @ 0x390 │ │ + ldc2l 1, cr3, [pc, #940] @ 24486c0 │ │ + ldc2l 5, cr9, [sp, #208] @ 0xd0 │ │ + ldc2l 0, cr3, [pc, #108] @ 2448388 │ │ movteq r9, #39000 @ 0x9858 │ │ ldrshteq r0, [r1], -ip │ │ ldrshteq r0, [r1], -r4 │ │ ldrshteq r0, [r1], -r8 │ │ ldrshteq r0, [r1], -r4 │ │ ldrsbteq r0, [r1], -r8 │ │ - ldc2l 11, cr9, [lr, #532] @ 0x214 @ │ │ + ldc2l 11, cr9, [lr, #712] @ 0x2c8 @ │ │ │ │ 02448334 : │ │ vldr d17, [r2] │ │ vldr d18, [r1] │ │ vldr d16, [r0] │ │ vcmp.f64 d18, d17 │ │ vmrs APSR_nzcv, fpscr │ │ @@ -1311752,55 +1311751,55 @@ │ │ mov r0, #0 │ │ sub sp, fp, #64 @ 0x40 │ │ vpop {d8-d11} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ add r0, sp, #2944 @ 0xb80 │ │ b 24488dc │ │ - ldc2l 2, cr15, [sp, #792] @ 0x318 │ │ - ldc2l 6, cr10, [sp, #924] @ 0x39c │ │ - ldc2l 3, cr10, [sp, #836] @ 0x344 │ │ - ldc2l 8, cr8, [lr, #220] @ 0xdc │ │ + ldc2l 2, cr15, [sp, #972] @ 0x3cc │ │ + ldc2l 7, cr10, [sp, #80] @ 0x50 │ │ + ldc2l 3, cr10, [sp, #1016] @ 0x3f8 │ │ + vcadd.f32 q12, q7, q10, #270 │ │ eorseq r0, r1, r8, lsr #2 │ │ eorseq r0, r1, r8, lsl #2 │ │ eorseq r0, r1, ip, ror #1 │ │ - ldc2l 6, cr10, [sp, #924] @ 0x39c │ │ - ldc2l 3, cr10, [sp, #596] @ 0x254 │ │ - ldc2l 11, cr12, [sp, #876] @ 0x36c @ │ │ + ldc2l 7, cr10, [sp, #80] @ 0x50 │ │ + ldc2l 3, cr10, [sp, #776] @ 0x308 │ │ + ldc2l 12, cr12, [sp, #32] │ │ eorseq r0, r1, r0, lsl #4 │ │ - ldc2l 12, cr10, [sp, #256] @ 0x100 │ │ - ldc2l 4, cr10, [pc, #352] @ 2449038 │ │ - ldc2l 12, cr10, [sp, #80] @ 0x50 │ │ - ldc2l 4, cr10, [pc, #176] @ 2448f90 │ │ + ldc2l 12, cr10, [sp, #436] @ 0x1b4 │ │ + ldc2l 4, cr10, [pc, #532] @ 24490ec │ │ + ldc2l 12, cr10, [sp, #260] @ 0x104 │ │ + ldc2l 4, cr10, [pc, #356] @ 2449044 │ │ eorseq pc, r0, r0, lsr #31 │ │ - ldc2l 14, cr14, [ip, #784] @ 0x310 │ │ - ldc2l 4, cr10, [sp, #4] │ │ - ldc2l 10, cr4, [sp, #112] @ 0x70 @ │ │ + ldc2l 14, cr14, [ip, #964] @ 0x3c4 │ │ + ldc2l 4, cr10, [sp, #184] @ 0xb8 │ │ + ldc2l 10, cr4, [sp, #292] @ 0x124 @ │ │ eorseq pc, r0, r8, ror pc @ │ │ eorseq pc, r0, r0, ror r9 @ │ │ - ldc2l 10, cr10, [sp, #880] @ 0x370 @ │ │ - ldc2l 2, cr10, [pc, #976] @ 24492d0 │ │ + ldc2l 11, cr10, [sp, #36] @ 0x24 @ │ │ + ldc2l 3, cr10, [pc, #132] @ 2448f84 │ │ eorseq pc, r0, r4, ror #28 │ │ - ldc2l 2, cr10, [pc, #32] @ 2448f28 │ │ - ldc2l 15, cr13, [pc, #248] @ 2449004 │ │ - ldc2l 15, cr13, [pc, #56] @ 2448f48 │ │ - ldc2l 9, cr10, [sp, #88] @ 0x58 @ │ │ - ldc2l 1, cr10, [pc, #272] @ 2449028 │ │ - ldc2l 9, cr10, [sp, #16] @ │ │ - ldc2l 1, cr10, [pc, #128] @ 2448fa0 │ │ + ldc2l 2, cr10, [pc, #212] @ 2448fdc │ │ + ldc2l 15, cr13, [pc, #428] @ 24490b8 │ │ + ldc2l 15, cr13, [pc, #236] @ 2448ffc │ │ + ldc2l 9, cr10, [sp, #178] @ 0xb2 @ │ │ + ldc2l 1, cr10, [pc, #452] @ 24490dc │ │ + ldc2l 9, cr10, [sp, #106] @ 0x6a @ │ │ + ldc2l 1, cr10, [pc, #308] @ 2449054 │ │ mlaseq r0, r4, ip, pc @ │ │ eorseq pc, r0, r8, lsr fp @ │ │ - ldc2l 14, cr9, [pc, #928] @ 24492cc │ │ - ldc2l 12, cr13, [pc, #120] @ 2448fa8 │ │ - ldc2l 11, cr13, [pc, #952] @ 24492ec @ │ │ - ldc2l 9, cr2, [sp, #152] @ 0x98 @ │ │ - ldc2l 14, cr9, [pc, #144] @ 2448fcc │ │ - ldc2l 9, cr2, [sp, #80] @ 0x50 @ │ │ - ldc2l 14, cr9, [pc] @ 2448f44 │ │ - vcadd.f32 d30, d29, d18, #270 │ │ + ldc2l 15, cr9, [pc, #84] @ 2448f80 │ │ + ldc2l 12, cr13, [pc, #300] @ 244905c │ │ + ldc2l 12, cr13, [pc, #108] @ 2448fa0 │ │ + ldc2l 9, cr2, [sp, #242] @ 0xf2 @ │ │ + ldc2l 14, cr9, [pc, #324] @ 2449080 │ │ + ldc2l 9, cr2, [sp, #170] @ 0xaa @ │ │ + ldc2l 14, cr9, [pc, #180] @ 2448ff8 │ │ + vcadd.f32 q15, , , #270 │ │ │ │ 02448f44 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d15} │ │ sub sp, sp, #64 @ 0x40 │ │ @@ -1312208,35 +1312207,35 @@ │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #96 @ 0x60 │ │ vpop {d8-d15} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 7, cr14, [sp, #128] @ 0x80 │ │ + ldc2l 7, cr14, [sp, #308] @ 0x134 │ │ stc2l 10, cr3, [r0, #956]! @ 0x3bc @ │ │ stc2l 2, cr7, [r0, #684]! @ 0x2ac │ │ stc2l 10, cr3, [r0, #748]! @ 0x2ec @ │ │ stc2l 3, cr7, [r0, #172]! @ 0xac │ │ stc2l 11, cr3, [r0, #236]! @ 0xec @ │ │ - vcadd.f32 q15, q6, , #270 │ │ + ldc2l 8, cr14, [ip, #488] @ 0x1e8 │ │ stc2l 9, cr3, [r0, #334]! @ 0x14e @ │ │ - ldc2l 8, cr14, [ip, #68] @ 0x44 │ │ + ldc2l 8, cr14, [ip, #248] @ 0xf8 │ │ stc2l 9, cr3, [r0, #214]! @ 0xd6 @ │ │ stc2l 13, cr6, [r0, #992]! @ 0x3e0 │ │ - ldc2l 4, cr11, [pc, #472] @ 24497c4 │ │ - ldc2l 9, cr9, [sp, #370] @ 0x172 @ │ │ - ldc2l 4, cr14, [ip, #228] @ 0xe4 │ │ + ldc2l 4, cr11, [pc, #652] @ 2449878 │ │ + ldc2l 9, cr9, [sp, #460] @ 0x1cc @ │ │ + ldc2l 4, cr14, [ip, #408] @ 0x198 │ │ stc2l 5, cr3, [r0, #588]! @ 0x24c │ │ - ldc2l 9, cr9, [sp, #138] @ 0x8a @ │ │ - ldc2l 15, cr3, [sp, #368] @ 0x170 │ │ + ldc2l 9, cr9, [sp, #228] @ 0xe4 @ │ │ + ldc2l 15, cr3, [sp, #548] @ 0x224 │ │ stc2l 13, cr6, [r0, #272]! @ 0x110 │ │ - ldc2l 7, cr14, [ip, #836] @ 0x344 │ │ + ldc2l 7, cr14, [ip, #1016] @ 0x3f8 │ │ stc2l 9, cr3, [r0, #86]! @ 0x56 @ │ │ - ldc2l 7, cr14, [ip, #468] @ 0x1d4 │ │ + ldc2l 7, cr14, [ip, #648] @ 0x288 │ │ vcmla.f16 , q8, , #270 │ │ stc2l 0, cr7, [r0, #380]! @ 0x17c │ │ vcmla.f16 , q0, , #270 │ │ stc2l 0, cr7, [r0, #172]! @ 0xac │ │ stc2l 8, cr3, [r0, #236]! @ 0xec │ │ stc2l 0, cr7, [r0, #28]! │ │ vcmla.f16 d19, d0, d3, #270 │ │ @@ -1312246,17 +1312245,17 @@ │ │ stc2l 7, cr3, [r0, #172]! @ 0xac │ │ stc2l 7, cr3, [r0, #12]! │ │ stc2l 14, cr6, [r0, #460]! @ 0x1cc │ │ stc2l 6, cr3, [r0, #524]! @ 0x20c │ │ stc2l 14, cr6, [r0, #188]! @ 0xbc │ │ stc2l 6, cr3, [r0, #252]! @ 0xfc │ │ stc2l 14, cr6, [r0, #832]! @ 0x340 │ │ - ldc2l 10, cr7, [pc, #600] @ 24498b0 @ │ │ - ldc2l 10, cr9, [sp, #564] @ 0x234 @ │ │ - ldc2l 15, cr11, [sp, #828] @ 0x33c │ │ + ldc2l 10, cr7, [pc, #780] @ 2449964 @ │ │ + ldc2l 10, cr9, [sp, #744] @ 0x2e8 @ │ │ + ldc2l 15, cr11, [sp, #1008] @ 0x3f0 │ │ │ │ 0244965c : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ vpush {d8} │ │ sub sp, sp, #8 │ │ mov r9, r3 │ │ @@ -1312395,22 +1312394,22 @@ │ │ vld1.64 {d16-d17}, [r6]! │ │ subs r3, r3, #2 │ │ vst1.64 {d16-d17}, [r7]! │ │ bne 2449880 │ │ cmp lr, r1 │ │ bne 24496ac │ │ b 24496d4 │ │ - ldc2l 6, cr11, [lr, #572] @ 0x23c │ │ - ldc2l 1, cr11, [pc, #504] @ 2449aa0 │ │ - ldc2l 6, cr9, [sp, #772] @ 0x304 │ │ - ldc2l 12, cr3, [sp, #640] @ 0x280 │ │ - ldc2l 7, cr11, [lr, #492] @ 0x1ec │ │ - ldc2l 7, cr7, [pc, #728] @ 2449b90 │ │ - ldc2l 7, cr9, [sp, #692] @ 0x2b4 │ │ - ldc2l 12, cr11, [sp, #956] @ 0x3bc │ │ + ldc2l 6, cr11, [lr, #752] @ 0x2f0 │ │ + ldc2l 1, cr11, [pc, #684] @ 2449b54 │ │ + ldc2l 6, cr9, [sp, #952] @ 0x3b8 │ │ + ldc2l 12, cr3, [sp, #820] @ 0x334 │ │ + ldc2l 7, cr11, [lr, #672] @ 0x2a0 │ │ + ldc2l 7, cr7, [pc, #908] @ 2449c44 │ │ + ldc2l 7, cr9, [sp, #872] @ 0x368 │ │ + ldc2l 13, cr11, [sp, #112] @ 0x70 │ │ │ │ 024498bc : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d15} │ │ sub sp, sp, #56 @ 0x38 │ │ @@ -1313246,96 +1313245,96 @@ │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #96 @ 0x60 │ │ vpop {d8-d15} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 10, cr12, [pc, #996] @ 244a9cc @ │ │ - ldc2l 0, cr7, [pc, #504] @ 244a7e4 │ │ - ldc2l 0, cr9, [sp, #468] @ 0x1d4 │ │ - ldc2l 5, cr11, [sp, #732] @ 0x2dc │ │ - stc2l 14, cr0, [r0, #76]! @ 0x4c │ │ + ldc2l 11, cr12, [pc, #152] @ 244a680 @ │ │ + ldc2l 0, cr7, [pc, #684] @ 244a898 │ │ + ldc2l 0, cr9, [sp, #648] @ 0x288 │ │ + ldc2l 5, cr11, [sp, #912] @ 0x390 │ │ + stc2l 14, cr0, [r0, #256]! @ 0x100 │ │ stc2l 9, cr6, [r0, #342]! @ 0x156 @ │ │ - ldc2l 13, cr13, [sp, #672] @ 0x2a0 │ │ + ldc2l 13, cr13, [sp, #852] @ 0x354 │ │ stc2l 8, cr6, [r0, #1004]! @ 0x3ec │ │ - ldc2l 15, cr13, [ip, #356] @ 0x164 │ │ - stc2l 12, cr0, [r0, #1020]! @ 0x3fc │ │ - ldc2l 15, cr13, [ip, #132] @ 0x84 │ │ - stc2l 12, cr0, [r0, #796]! @ 0x31c │ │ - ldc2l 14, cr13, [ip, #964] @ 0x3c4 │ │ - stc2l 12, cr0, [r0, #604]! @ 0x25c │ │ - ldc2l 14, cr13, [ip, #772] @ 0x304 │ │ - stc2l 12, cr0, [r0, #412]! @ 0x19c │ │ - ldc2l 10, cr12, [pc, #612] @ 244a88c @ │ │ - ldc2l 10, cr10, [pc, #856] @ 244a984 @ │ │ - ldc2l 0, cr9, [sp, #100] @ 0x64 │ │ - ldc2l 10, cr13, [ip, #644] @ 0x284 @ │ │ - vcmla.f16 q8, q0, , #270 │ │ - ldc2l 9, cr8, [sp, #58] @ 0x3a @ │ │ - ldc2l 15, cr2, [sp, #208] @ 0xd0 │ │ - ldc2l 3, cr12, [pc, #372] @ 244a7b8 │ │ - stc2l 12, cr0, [r0, #28]! │ │ - stc2l 11, cr0, [r0, #812]! @ 0x32c @ │ │ - stc2l 11, cr0, [r0, #460]! @ 0x1cc @ │ │ - stc2l 11, cr0, [r0, #140]! @ 0x8c @ │ │ - stc2l 10, cr0, [r0, #908]! @ 0x38c @ │ │ - stc2l 10, cr0, [r0, #652]! @ 0x28c @ │ │ - ldc2l 12, cr13, [ip, #788] @ 0x314 │ │ - stc2l 10, cr0, [r0, #428]! @ 0x1ac @ │ │ - stc2l 10, cr0, [r0, #108]! @ 0x6c @ │ │ + ldc2l 15, cr13, [ip, #536] @ 0x218 │ │ + stc2l 13, cr0, [r0, #176]! @ 0xb0 │ │ + ldc2l 15, cr13, [ip, #312] @ 0x138 │ │ + stc2l 12, cr0, [r0, #976]! @ 0x3d0 │ │ + ldc2l 15, cr13, [ip, #120] @ 0x78 │ │ + stc2l 12, cr0, [r0, #784]! @ 0x310 │ │ + ldc2l 14, cr13, [ip, #952] @ 0x3b8 │ │ + stc2l 12, cr0, [r0, #592]! @ 0x250 │ │ + ldc2l 10, cr12, [pc, #792] @ 244a940 @ │ │ + ldc2l 11, cr10, [pc, #12] @ 244a638 @ │ │ + ldc2l 0, cr9, [sp, #280] @ 0x118 │ │ + ldc2l 10, cr13, [ip, #824] @ 0x338 @ │ │ + stc2l 8, cr0, [r0, #464]! @ 0x1d0 │ │ + ldc2l 9, cr8, [sp, #148] @ 0x94 @ │ │ + ldc2l 15, cr2, [sp, #388] @ 0x184 │ │ + ldc2l 3, cr12, [pc, #552] @ 244a86c │ │ + stc2l 12, cr0, [r0, #208]! @ 0xd0 │ │ + stc2l 11, cr0, [r0, #992]! @ 0x3e0 @ │ │ + stc2l 11, cr0, [r0, #640]! @ 0x280 @ │ │ + stc2l 11, cr0, [r0, #320]! @ 0x140 @ │ │ + stc2l 11, cr0, [r0, #64]! @ 0x40 @ │ │ + stc2l 10, cr0, [r0, #832]! @ 0x340 @ │ │ + ldc2l 12, cr13, [ip, #968] @ 0x3c8 │ │ + stc2l 10, cr0, [r0, #608]! @ 0x260 @ │ │ + stc2l 10, cr0, [r0, #288]! @ 0x120 @ │ │ stc2l 5, cr6, [r0, #444]! @ 0x1bc │ │ - stc2l 9, cr0, [r0, #366]! @ 0x16e @ │ │ - stc2l 9, cr0, [r0, #262]! @ 0x106 @ │ │ - stc2l 9, cr0, [r0, #102]! @ 0x66 @ │ │ + stc2l 9, cr0, [r0, #456]! @ 0x1c8 @ │ │ + stc2l 9, cr0, [r0, #352]! @ 0x160 @ │ │ + stc2l 9, cr0, [r0, #192]! @ 0xc0 @ │ │ stc2l 3, cr6, [r0, #652]! @ 0x28c │ │ - stc2l 7, cr0, [r0, #1020]! @ 0x3fc │ │ + vcmla.f16 d16, d0, d28, #270 │ │ stc2l 3, cr6, [r0, #316]! @ 0x13c │ │ - stc2l 7, cr0, [r0, #684]! @ 0x2ac │ │ + stc2l 7, cr0, [r0, #864]! @ 0x360 │ │ stc2l 3, cr6, [r0, #28]! │ │ - stc2l 7, cr0, [r0, #396]! @ 0x18c │ │ - ldc2l 9, cr13, [ip, #242] @ 0xf2 @ │ │ - stc2l 7, cr0, [r0, #124]! @ 0x7c │ │ + stc2l 7, cr0, [r0, #576]! @ 0x240 │ │ + ldc2l 9, cr13, [ip, #332] @ 0x14c @ │ │ + stc2l 7, cr0, [r0, #304]! @ 0x130 │ │ stc2l 2, cr6, [r0, #428]! @ 0x1ac │ │ - stc2l 6, cr0, [r0, #796]! @ 0x31c │ │ + stc2l 6, cr0, [r0, #976]! @ 0x3d0 │ │ stc2l 2, cr6, [r0, #76]! @ 0x4c │ │ - stc2l 6, cr0, [r0, #444]! @ 0x1bc │ │ - ldc2l 7, cr13, [ip, #804] @ 0x324 │ │ - stc2l 5, cr0, [r0, #444]! @ 0x1bc │ │ - ldc2l 7, cr13, [ip, #548] @ 0x224 │ │ - stc2l 5, cr0, [r0, #188]! @ 0xbc │ │ - ldc2l 7, cr13, [ip, #356] @ 0x164 │ │ - stc2l 4, cr0, [r0, #1020]! @ 0x3fc │ │ - ldc2l 7, cr13, [ip, #164] @ 0xa4 │ │ - stc2l 4, cr0, [r0, #828]! @ 0x33c │ │ - ldc2l 3, cr12, [pc, #1012] @ 244aac0 │ │ - ldc2l 4, cr10, [pc, #216] @ 244a7a8 │ │ - ldc2l 9, cr8, [sp, #242] @ 0xf2 @ │ │ - ldc2l 4, cr13, [ip, #68] @ 0x44 │ │ - stc2l 1, cr0, [r0, #732]! @ 0x2dc │ │ + stc2l 6, cr0, [r0, #624]! @ 0x270 │ │ + ldc2l 7, cr13, [ip, #984] @ 0x3d8 │ │ + stc2l 5, cr0, [r0, #624]! @ 0x270 │ │ + ldc2l 7, cr13, [ip, #728] @ 0x2d8 │ │ + stc2l 5, cr0, [r0, #368]! @ 0x170 │ │ + ldc2l 7, cr13, [ip, #536] @ 0x218 │ │ + stc2l 5, cr0, [r0, #176]! @ 0xb0 │ │ + ldc2l 7, cr13, [ip, #344] @ 0x158 │ │ + stc2l 4, cr0, [r0, #1008]! @ 0x3f0 │ │ + ldc2l 4, cr12, [pc, #168] @ 244a774 │ │ + ldc2l 4, cr10, [pc, #396] @ 244a85c │ │ + ldc2l 9, cr8, [sp, #332] @ 0x14c @ │ │ + ldc2l 4, cr13, [ip, #248] @ 0xf8 │ │ + stc2l 1, cr0, [r0, #912]! @ 0x390 │ │ stc2l 0, cr6, [r0, #28]! │ │ - stc2l 4, cr0, [r0, #396]! @ 0x18c │ │ + stc2l 4, cr0, [r0, #576]! @ 0x240 │ │ stc2l 15, cr5, [r0, #828]! @ 0x33c │ │ - stc2l 4, cr0, [r0, #172]! @ 0xac │ │ + stc2l 4, cr0, [r0, #352]! @ 0x160 │ │ stc2l 15, cr5, [r0, #588]! @ 0x24c │ │ - stc2l 3, cr0, [r0, #956]! @ 0x3bc │ │ + stc2l 4, cr0, [r0, #112]! @ 0x70 │ │ stc2l 15, cr5, [r0, #364]! @ 0x16c │ │ - stc2l 3, cr0, [r0, #732]! @ 0x2dc │ │ + stc2l 3, cr0, [r0, #912]! @ 0x390 │ │ stc2l 15, cr5, [r0, #172]! @ 0xac │ │ - stc2l 3, cr0, [r0, #540]! @ 0x21c │ │ + stc2l 3, cr0, [r0, #720]! @ 0x2d0 │ │ stc2l 14, cr5, [r0, #844]! @ 0x34c │ │ - stc2l 3, cr0, [r0, #188]! @ 0xbc │ │ + stc2l 3, cr0, [r0, #368]! @ 0x170 │ │ stc2l 14, cr5, [r0, #652]! @ 0x28c │ │ - stc2l 2, cr0, [r0, #1020]! @ 0x3fc │ │ + stc2l 3, cr0, [r0, #176]! @ 0xb0 │ │ stc2l 14, cr5, [r0, #444]! @ 0x1bc │ │ - stc2l 2, cr0, [r0, #812]! @ 0x32c │ │ + stc2l 2, cr0, [r0, #992]! @ 0x3e0 │ │ stc2l 14, cr5, [r0, #236]! @ 0xec │ │ - stc2l 2, cr0, [r0, #604]! @ 0x25c │ │ + stc2l 2, cr0, [r0, #784]! @ 0x310 │ │ stc2l 13, cr5, [r0, #972]! @ 0x3cc │ │ - stc2l 2, cr0, [r0, #316]! @ 0x13c │ │ + stc2l 2, cr0, [r0, #496]! @ 0x1f0 │ │ │ │ 0244a728 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #96 @ 0x60 │ │ mov r5, r1 │ │ ldr r1, [pc, #92] @ 244a79c │ │ @@ -1314103,52 +1314102,52 @@ │ │ mov r1, r5 │ │ bl 270e090 │ │ vldr d16, [r8] │ │ mov r0, #1 │ │ str r0, [r9] │ │ vstr d16, [r4, #128] @ 0x80 │ │ b 244a99c │ │ - ldc2l 4, cr12, [lr, #412] @ 0x19c │ │ + ldc2l 4, cr12, [lr, #592] @ 0x250 │ │ eorseq sp, r0, ip, asr #29 │ │ eorseq sp, r0, r8, asr #29 │ │ - ldc2l 2, cr8, [pc, #780] @ 244b64c │ │ - ldc2l 5, cr8, [sp, #852] @ 0x354 │ │ - ldc2l 13, cr6, [sp, #712] @ 0x2c8 │ │ - ldc2l 13, cr0, [sp, #164] @ 0xa4 │ │ - ldc2l 0, cr13, [ip, #160] @ 0xa0 │ │ - ldc2l 0, cr2, [pc, #156] @ 244b3f0 │ │ - ldc2l 14, cr9, [pc, #40] @ 244b380 │ │ - ldc2l 11, cr1, [pc, #556] @ 244b588 @ │ │ - ldc2l 9, cr9, [pc, #220] @ 244b43c @ │ │ - ldc2l 11, cr1, [pc, #316] @ 244b4a0 @ │ │ - ldc2l 9, cr9, [pc, #100] @ 244b3cc @ │ │ - ldc2l 14, cr1, [pc, #764] @ 244b668 │ │ - ldc2l 12, cr9, [pc, #648] @ 244b5f8 │ │ - ldc2l 14, cr1, [pc, #572] @ 244b5b0 │ │ - ldc2l 12, cr9, [pc, #456] @ 244b540 │ │ + ldc2l 2, cr8, [pc, #960] @ 244b700 │ │ + ldc2l 6, cr8, [sp, #8] │ │ + ldc2l 13, cr6, [sp, #892] @ 0x37c │ │ + ldc2l 13, cr0, [sp, #344] @ 0x158 │ │ + ldc2l 0, cr13, [ip, #340] @ 0x154 │ │ + ldc2l 0, cr2, [pc, #336] @ 244b4a4 │ │ + ldc2l 14, cr9, [pc, #220] @ 244b434 │ │ + ldc2l 11, cr1, [pc, #736] @ 244b63c @ │ │ + ldc2l 9, cr9, [pc, #310] @ 244b496 @ │ │ + ldc2l 11, cr1, [pc, #496] @ 244b554 @ │ │ + ldc2l 9, cr9, [pc, #190] @ 244b426 @ │ │ + ldc2l 14, cr1, [pc, #944] @ 244b71c │ │ + ldc2l 12, cr9, [pc, #828] @ 244b6ac │ │ + ldc2l 14, cr1, [pc, #752] @ 244b664 │ │ + ldc2l 12, cr9, [pc, #636] @ 244b5f4 │ │ movteq r6, #40188 @ 0x9cfc │ │ ldrsbteq sp, [r0], -ip │ │ ldrsbteq sp, [r0], -r0 │ │ ldrsbteq sp, [r0], -ip │ │ eorseq sp, r0, ip, ror #17 │ │ - ldc2l 12, cr1, [pc, #124] @ 244b40c │ │ - ldc2l 10, cr9, [pc, #8] @ 244b39c @ │ │ + ldc2l 12, cr1, [pc, #304] @ 244b4c0 │ │ + ldc2l 10, cr9, [pc, #188] @ 244b450 @ │ │ ldrshteq sp, [r0], -ip │ │ - ldc2l 10, cr1, [pc, #652] @ 244b628 @ │ │ - vcadd.f32 d25, d31, d6, #270 │ │ - ldc2l 10, cr1, [pc, #268] @ 244b4b0 @ │ │ - vcadd.f32 d25, d15, d22, #270 │ │ - ldc2l 10, cr1, [pc, #44] @ 244b3d8 @ │ │ - ldc2l 7, cr9, [pc, #952] @ 244b768 │ │ + ldc2l 10, cr1, [pc, #832] @ 244b6dc @ │ │ + ldc2l 8, cr9, [pc, #716] @ 244b66c │ │ + ldc2l 10, cr1, [pc, #448] @ 244b564 @ │ │ + ldc2l 8, cr9, [pc, #332] @ 244b4f4 │ │ + ldc2l 10, cr1, [pc, #224] @ 244b48c @ │ │ + ldc2l 8, cr9, [pc, #108] @ 244b41c │ │ eorseq sp, r0, ip, lsl #11 │ │ eorseq sp, r0, r8, lsl #11 │ │ movteq r6, #39048 @ 0x9888 │ │ eorseq sp, r0, r0, lsl #11 │ │ eorseq sp, r0, r4, asr r5 │ │ - ldc2l 3, cr12, [lr, #220] @ 0xdc │ │ + ldc2l 3, cr12, [lr, #400] @ 0x190 │ │ │ │ 0244b3c4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d10} │ │ sub sp, sp, #464 @ 0x1d0 │ │ @@ -1314255,18 +1314254,18 @@ │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #56 @ 0x38 │ │ vpop {d8-d10} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 10, cr5, [pc, #872] @ 244b8f4 @ │ │ + ldc2l 11, cr5, [pc, #28] @ 244b5a8 @ │ │ eorseq sp, r0, r0, asr #6 │ │ eorseq sp, r0, ip, lsr #6 │ │ - ldc2l 9, cr5, [pc, #228] @ 244b67c @ │ │ + ldc2l 9, cr5, [pc, #318] @ 244b6d6 @ │ │ │ │ 0244b594 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #72 @ 0x48 │ │ vldmia r1, {d16-d23} │ │ vldmia r0, {d24-d27} │ │ @@ -1314379,16 +1314378,16 @@ │ │ ldr r0, [pc, #24] @ 244b768 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 0, cr15, [pc, #700] @ 244ba28 │ │ - ldc2l 15, cr14, [pc, #1004] @ 244bb5c │ │ + ldc2l 0, cr15, [pc, #880] @ 244badc │ │ + ldc2l 0, cr15, [pc, #160] @ 244b810 │ │ │ │ 0244b76c : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r1 │ │ ldr r1, [pc, #584] @ 244b9c8 │ │ mov r5, r0 │ │ @@ -1314535,17 +1314534,17 @@ │ │ vneg.f64 d19, d20 │ │ vstr d19, [r4] │ │ vstr d17, [r4, #8] │ │ vstr d18, [r4, #16] │ │ vstr d16, [r4, #24] │ │ pop {r4, r5, fp, pc} │ │ ldrshteq ip, [r0], -r0 │ │ - ldc2l 8, cr7, [lr, #892] @ 0x37c │ │ - ldc2l 6, cr9, [lr, #88] @ 0x58 │ │ - ldc2l 15, cr9, [sp, #328] @ 0x148 │ │ + ldc2l 9, cr7, [lr, #24] @ │ │ + ldc2l 6, cr9, [lr, #268] @ 0x10c │ │ + ldc2l 15, cr9, [sp, #508] @ 0x1fc │ │ │ │ 0244b9d8 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ vpush {d8-d10} │ │ sub sp, sp, #152 @ 0x98 │ │ mov r4, r2 │ │ @@ -1314671,22 +1314670,22 @@ │ │ vcmp.f64 d8, d16 │ │ vmrs APSR_nzcv, fpscr │ │ movweq r6, #1 │ │ and r0, r7, r6 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d10} │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 7, cr7, [lr, #92] @ 0x5c │ │ - ldc2l 9, cr5, [lr, #46] @ 0x2e @ │ │ - ldc2l 4, cr7, [sp, #516] @ 0x204 │ │ - ldc2l 14, cr8, [pc, #416] @ 244bd98 │ │ - ldc2l 6, cr7, [lr, #588] @ 0x24c │ │ - ldc2l 10, cr1, [lr, #976] @ 0x3d0 @ │ │ - ldc2l 4, cr7, [sp, #324] @ 0x144 │ │ - ldc2l 5, cr7, [lr, #428] @ 0x1ac │ │ + ldc2l 7, cr7, [lr, #272] @ 0x110 │ │ + ldc2l 9, cr5, [lr, #136] @ 0x88 @ │ │ + ldc2l 4, cr7, [sp, #696] @ 0x2b8 │ │ + ldc2l 14, cr8, [pc, #596] @ 244be4c │ │ + ldc2l 6, cr7, [lr, #768] @ 0x300 │ │ + ldc2l 11, cr1, [lr, #132] @ 0x84 @ │ │ + ldc2l 4, cr7, [sp, #504] @ 0x1f8 │ │ + ldc2l 5, cr7, [lr, #608] @ 0x260 │ │ │ │ 0244bc04 : │ │ vldr d16, [r0, #64] @ 0x40 │ │ vldmia r0, {d17-d24} │ │ vmul.f64 d25, d21, d16 │ │ vmul.f64 d16, d18, d16 │ │ vmls.f64 d25, d22, d24 │ │ @@ -1315003,18 +1315002,18 @@ │ │ bl 270f0a0 │ │ vmov.f64 d8, d9 │ │ b 244bfcc │ │ stc2l 5, cr4, [r0, #880]! @ 0x370 │ │ eorseq ip, r0, r4, asr sl │ │ eorseq ip, r0, r0, asr sl │ │ stc2l 4, cr4, [r0, #360]! @ 0x168 │ │ - ldc2l 0, cr7, [sp, #100] @ 0x64 │ │ - ldc2l 7, cr5, [sp, #984] @ 0x3d8 │ │ - ldc2l 7, cr15, [ip, #548] @ 0x224 │ │ - ldc2l 10, cr11, [ip, #544] @ 0x220 @ │ │ + ldc2l 0, cr7, [sp, #280] @ 0x118 │ │ + vcadd.f32 d21, d13, d19, #270 │ │ + ldc2l 7, cr15, [ip, #728] @ 0x2d8 │ │ + ldc2l 10, cr11, [ip, #724] @ 0x2d4 @ │ │ mlaseq r0, r8, r7, ip │ │ mlaseq r0, ip, r7, ip │ │ stc2l 4, cr4, [r0] │ │ │ │ 0244c118 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ @@ -1315065,22 +1315064,22 @@ │ │ ldr r0, [pc, #48] @ 244c208 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 7, cr13, [ip, #868] @ 0x364 │ │ + vcadd.f32 d29, d12, d6, #270 │ │ eorseq ip, r0, r4, lsr r6 │ │ eorseq ip, r0, r0, lsr r6 │ │ - ldc2l 0, cr15, [lr, #68] @ 0x44 │ │ - ldc2l 13, cr6, [sp, #36] @ 0x24 │ │ - ldc2l 7, cr11, [ip, #860] @ 0x35c │ │ + ldc2l 0, cr15, [lr, #248] @ 0xf8 │ │ + ldc2l 13, cr6, [sp, #216] @ 0xd8 │ │ + vcadd.f32 d27, d12, d4, #270 │ │ eorseq ip, r0, ip, lsl #12 │ │ - ldc2l 7, cr13, [ip, #276] @ 0x114 │ │ + ldc2l 7, cr13, [ip, #456] @ 0x1c8 │ │ │ │ 0244c20c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d13} │ │ sub sp, sp, #88 @ 0x58 │ │ @@ -1315578,27 +1315577,27 @@ │ │ add r0, r7, r0, lsl #3 │ │ add r5, r5, #1 │ │ vldr d16, [r0] │ │ b 244c8d8 │ │ stc2l 0, cr2, [r0, #896]! @ 0x380 │ │ eorseq ip, r0, ip, lsr #5 │ │ eorseq ip, r0, r8, lsr #5 │ │ - ldc2l 13, cr4, [lr, #276] @ 0x114 │ │ - vcadd.f32 d22, d29, d5, #270 │ │ - ldc2l 0, cr5, [sp, #392] @ 0x188 │ │ - ldc2l 3, cr0, [pc, #796] @ 244cd08 │ │ - ldc2l 9, cr2, [pc, #184] @ 244caa8 @ │ │ - ldc2l 2, cr0, [pc, #892] @ 244cd70 │ │ - ldc2l 8, cr2, [pc, #464] @ 244cbc8 │ │ - ldc2l 3, cr0, [pc, #524] @ 244cc08 │ │ - ldc2l 9, cr2, [pc, #48] @ 244ca30 @ │ │ - ldc2l 2, cr0, [pc, #76] @ 244ca50 │ │ - ldc2l 7, cr2, [pc, #672] @ 244cca8 │ │ - ldc2l 3, cr0, [pc, #28] @ 244ca28 │ │ - ldc2l 8, cr2, [pc, #624] @ 244cc80 │ │ + ldc2l 13, cr4, [lr, #456] @ 0x1c8 │ │ + ldc2l 8, cr6, [sp, #712] @ 0x2c8 │ │ + ldc2l 0, cr5, [sp, #572] @ 0x23c │ │ + ldc2l 3, cr0, [pc, #976] @ 244cdbc │ │ + ldc2l 9, cr2, [pc, #274] @ 244cb02 @ │ │ + ldc2l 3, cr0, [pc, #48] @ 244ca24 │ │ + vcadd.f32 d18, d31, d17, #270 │ │ + ldc2l 3, cr0, [pc, #704] @ 244ccbc │ │ + ldc2l 9, cr2, [pc, #138] @ 244ca8a @ │ │ + ldc2l 2, cr0, [pc, #256] @ 244cb04 │ │ + ldc2l 7, cr2, [pc, #852] @ 244cd5c │ │ + ldc2l 3, cr0, [pc, #208] @ 244cadc │ │ + vcadd.f32 q9, , , #270 │ │ eorseq fp, r0, r0, lsl #29 │ │ stc2l 12, cr1, [r0, #528]! @ 0x210 │ │ │ │ 0244ca14 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ vpush {d8} │ │ @@ -1315658,17 +1315657,17 @@ │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #32 │ │ vpop {d8} │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 12, cr14, [ip, #456] @ 0x1c8 │ │ + ldc2l 12, cr14, [ip, #636] @ 0x27c │ │ eorseq fp, r0, r0, asr #26 │ │ - ldc2l 11, cr14, [ip, #792] @ 0x318 @ │ │ + ldc2l 11, cr14, [ip, #972] @ 0x3cc @ │ │ │ │ 0244cb1c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8} │ │ sub sp, sp, #1016 @ 0x3f8 │ │ @@ -1316638,60 +1316637,60 @@ │ │ ldr r1, [fp, #16] │ │ mov r0, #1 │ │ str r0, [r1] │ │ ldr r1, [pc, #260] @ 244db54 │ │ add r1, pc, r1 │ │ strb r0, [r1] │ │ b 244cd14 │ │ - ldc2l 11, cr14, [ip, #432] @ 0x1b0 @ │ │ + ldc2l 11, cr14, [ip, #612] @ 0x264 @ │ │ movteq r4, #40688 @ 0x9ef0 │ │ movteq r4, #40672 @ 0x9ee0 │ │ eorseq fp, r0, r4, lsr ip │ │ eorseq fp, r0, r4, lsr ip │ │ - ldc2l 4, cr2, [pc, #956] @ 244de30 │ │ - ldc2l 13, cr10, [ip, #16] │ │ - ldc2l 13, cr7, [pc, #140] @ 244db08 │ │ - ldc2l 4, cr2, [pc, #288] @ 244dba0 │ │ - ldc2l 4, cr12, [lr, #320] @ 0x140 │ │ + ldc2l 5, cr2, [pc, #112] @ 244dae4 │ │ + ldc2l 13, cr10, [ip, #196] @ 0xc4 │ │ + ldc2l 13, cr7, [pc, #320] @ 244dbbc │ │ + ldc2l 4, cr2, [pc, #468] @ 244dc54 │ │ + ldc2l 4, cr12, [lr, #500] @ 0x1f4 │ │ movteq r4, #40372 @ 0x9db4 │ │ eorseq fp, r0, r4, lsl fp │ │ eorseq fp, r0, r4, asr #20 │ │ movteq r4, #40188 @ 0x9cfc │ │ eorseq fp, r0, r4, ror #20 │ │ movteq r4, #40152 @ 0x9cd8 │ │ eorseq fp, r0, r8, lsl sl │ │ - ldc2l 13, cr11, [pc, #420] @ 244dc48 │ │ - ldc2l 3, cr2, [pc, #112] @ 244db18 │ │ - ldc2l 15, cr9, [lr, #416] @ 0x1a0 │ │ + ldc2l 13, cr11, [pc, #600] @ 244dcfc │ │ + ldc2l 3, cr2, [pc, #292] @ 244dbcc │ │ + ldc2l 15, cr9, [lr, #596] @ 0x254 │ │ eorseq fp, r0, ip, asr #15 │ │ ldrsbteq fp, [r0], -r0 │ │ eorseq fp, r0, r8, asr #15 │ │ mlaseq r0, r8, r7, fp │ │ mlaseq r0, ip, r7, fp │ │ eorseq fp, r0, ip, ror r7 │ │ eorseq fp, r0, ip, ror r7 │ │ eorseq fp, r0, r4, ror r7 │ │ - ldc2l 12, cr15, [lr, #1004] @ 0x3ec │ │ - ldc2l 1, cr6, [ip, #536] @ 0x218 │ │ - ldc2l 12, cr5, [pc, #44] @ 244db04 │ │ - ldc2l 11, cr5, [sp, #740] @ 0x2e4 @ │ │ - ldc2l 13, cr1, [pc, #360] @ 244dc48 │ │ - ldc2l 9, cr15, [lr, #390] @ 0x186 @ │ │ - ldc2l 14, cr5, [ip, #312] @ 0x138 │ │ - ldc2l 4, cr13, [pc, #392] @ 244dc74 │ │ - vcadd.f32 d19, d15, d20, #270 │ │ - ldc2l 7, cr5, [sp, #964] @ 0x3c4 │ │ + ldc2l 13, cr15, [lr, #160] @ 0xa0 │ │ + ldc2l 1, cr6, [ip, #716] @ 0x2cc │ │ + ldc2l 12, cr5, [pc, #224] @ 244dbb8 │ │ + ldc2l 11, cr5, [sp, #920] @ 0x398 @ │ │ + ldc2l 13, cr1, [pc, #540] @ 244dcfc │ │ + ldc2l 9, cr15, [lr, #480] @ 0x1e0 @ │ │ + ldc2l 14, cr5, [ip, #492] @ 0x1ec │ │ + ldc2l 4, cr13, [pc, #572] @ 244dd28 │ │ + ldc2l 8, cr3, [pc, #324] @ 244dc34 │ │ + ldc2l 8, cr5, [sp, #120] @ 0x78 │ │ stc2l 12, cr2, [r0, #168]! @ 0xa8 │ │ stc2l 13, cr4, [r0, #752]! @ 0x2f0 │ │ stc2l 14, cr4, [r0, #224]! @ 0xe0 │ │ - ldc2l 15, cr12, [pc, #916] @ 244de98 │ │ - ldc2l 7, cr5, [sp, #212] @ 0xd4 │ │ - ldc2l 12, cr5, [sp, #152] @ 0x98 │ │ - ldc2l 7, cr5, [sp, #356] @ 0x164 │ │ - ldc2l 13, cr15, [sp, #448] @ 0x1c0 │ │ + ldc2l 0, cr13, [pc, #72] @ 244db4c │ │ + ldc2l 7, cr5, [sp, #392] @ 0x188 │ │ + ldc2l 12, cr5, [sp, #332] @ 0x14c │ │ + ldc2l 7, cr5, [sp, #536] @ 0x218 │ │ + ldc2l 13, cr15, [sp, #628] @ 0x274 │ │ eorseq sl, r0, ip, asr #31 │ │ movteq r4, #37456 @ 0x9250 │ │ movteq r4, #37436 @ 0x923c │ │ eorseq sl, r0, r4, lsl #31 │ │ eorseq sl, r0, r0, ror pc │ │ eorseq sl, r0, r0, ror #30 │ │ eorseq sl, r0, r4, ror pc │ │ @@ -1316699,18 +1316698,18 @@ │ │ eorseq sl, r0, r8, lsr pc │ │ eorseq sl, r0, r4, lsr pc │ │ eorseq sl, r0, r0, lsr #30 │ │ eorseq sl, r0, r0, asr #30 │ │ eorseq sl, r0, r0, lsl #30 │ │ eorseq sl, r0, r0, lsl #30 │ │ eorseq sl, r0, r4, lsl #30 │ │ - ldc2l 10, cr15, [lr, #780] @ 0x30c @ │ │ - ldc2l 15, cr5, [ip, #312] @ 0x138 │ │ + ldc2l 10, cr15, [lr, #960] @ 0x3c0 @ │ │ + ldc2l 15, cr5, [ip, #492] @ 0x1ec │ │ movteq r4, #36892 @ 0x901c │ │ - ldc2l 9, cr14, [ip, #336] @ 0x150 @ │ │ + ldc2l 9, cr14, [ip, #426] @ 0x1aa @ │ │ │ │ 0244db5c : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ mov r4, r3 │ │ mov r5, r2 │ │ @@ -1316909,27 +1316908,27 @@ │ │ bl 270e090 │ │ mov r0, #0 │ │ sub sp, fp, #72 @ 0x48 │ │ vpop {d8-d12} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ stc2l 5, cr11, [r8, #464]! @ 0x1d0 │ │ - ldc2l 10, cr12, [pc, #636] @ 244e108 @ │ │ - ldc2l 9, cr3, [sp, #324] @ 0x144 @ │ │ - vcadd.f32 d31, d13, d30, #270 │ │ - ldc2l 10, cr12, [pc, #236] @ 244df84 @ │ │ - ldc2l 9, cr3, [sp, #124] @ 0x7c @ │ │ - ldc2l 10, cr12, [pc, #12] @ 244deac @ │ │ - ldc2l 9, cr3, [sp, #12] @ │ │ - ldc2l 7, cr15, [sp, #504] @ 0x1f8 │ │ - vcadd.f32 , , q5, #270 │ │ - ldc2l 9, cr12, [pc, #302] @ 244dfde @ │ │ - ldc2l 11, cr12, [pc, #188] @ 244df70 @ │ │ - ldc2l 10, cr3, [sp, #200] @ 0xc8 @ │ │ - ldc2l 8, cr15, [sp, #712] @ 0x2c8 │ │ + ldc2l 10, cr12, [pc, #816] @ 244e1bc @ │ │ + ldc2l 9, cr3, [sp, #414] @ 0x19e @ │ │ + ldc2l 8, cr15, [sp, #364] @ 0x16c │ │ + ldc2l 10, cr12, [pc, #416] @ 244e038 @ │ │ + ldc2l 9, cr3, [sp, #214] @ 0xd6 @ │ │ + ldc2l 10, cr12, [pc, #192] @ 244df60 @ │ │ + ldc2l 9, cr3, [sp, #102] @ 0x66 @ │ │ + ldc2l 7, cr15, [sp, #684] @ 0x2ac │ │ + ldc2l 8, cr3, [sp, #988] @ 0x3dc │ │ + ldc2l 9, cr12, [pc, #392] @ 244e038 @ │ │ + ldc2l 11, cr12, [pc, #368] @ 244e024 @ │ │ + ldc2l 10, cr3, [sp, #380] @ 0x17c @ │ │ + ldc2l 8, cr15, [sp, #892] @ 0x37c │ │ mlaseq r0, r4, r9, sl │ │ │ │ 0244debc : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r4, [pc, #144] @ 244df5c │ │ ldr r4, [pc, r4] │ │ @@ -1317309,31 +1317308,31 @@ │ │ eoreq sp, lr, r0, asr #1 │ │ ldrdeq sp, [lr], -ip @ │ │ strdeq sp, [lr], -r8 @ │ │ strdeq sp, [lr], -r0 @ │ │ mlaeq lr, r4, r0, sp │ │ ldrdeq sp, [lr], -ip @ │ │ mlaeq lr, r0, r0, sp │ │ - ldc2l 2, cr9, [ip, #888] @ 0x378 │ │ + ldc2l 3, cr9, [ip, #44] @ 0x2c │ │ mlaeq lr, r8, r0, sp │ │ eoreq sp, lr, ip, lsr #2 │ │ eoreq sp, lr, ip, ror r0 │ │ eoreq sp, lr, r4, lsr #2 │ │ eoreq sp, lr, r4, ror r0 │ │ eoreq sp, lr, r8, lsl #2 │ │ eoreq sp, lr, r4, rrx │ │ strdeq sp, [lr], -r4 @ │ │ eoreq sp, lr, r8, lsr #32 │ │ eoreq sp, lr, r8, ror #1 │ │ eoreq sp, lr, r8, lsr r0 │ │ ldrdeq sp, [lr], -r8 @ │ │ eoreq sp, lr, r8 │ │ strdeq ip, [lr], -r4 @ │ │ - ldc2l 11, cr6, [ip, #344] @ 0x158 @ │ │ - ldc2l 11, cr6, [ip, #248] @ 0xf8 @ │ │ + ldc2l 11, cr6, [ip, #524] @ 0x20c @ │ │ + ldc2l 11, cr6, [ip, #428] @ 0x1ac @ │ │ │ │ 0244e4d8 : │ │ ldr r1, [pc, #12] @ 244e4ec │ │ ldr r0, [r0] │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ bx lr │ │ @@ -1318117,30 +1318116,30 @@ │ │ eoreq ip, lr, r4, ror #28 │ │ eoreq ip, lr, ip, asr #28 │ │ strdeq ip, [lr], -r4 @ │ │ eoreq ip, lr, r0, ror #27 │ │ eoreq ip, lr, ip, asr #27 │ │ eoreq ip, lr, r4, lsl #27 │ │ ldrdeq ip, [lr], -r8 @ │ │ - ldc2l 14, cr11, [pc, #324] @ 244f270 │ │ - ldc2l 12, cr6, [sp, #568] @ 0x238 │ │ + ldc2l 14, cr11, [pc, #504] @ 244f324 │ │ + ldc2l 12, cr6, [sp, #748] @ 0x2ec │ │ eoreq r9, lr, r4, lsl #4 │ │ strdeq ip, [lr], -ip @ │ │ ldrdeq ip, [lr], -r4 @ │ │ eoreq ip, lr, r8, ror sl │ │ eoreq ip, lr, r4, lsr #19 │ │ eoreq ip, lr, r8, ror r9 │ │ eoreq ip, lr, r0, lsr sl │ │ strhteq ip, [lr], -r4 │ │ strhteq ip, [lr], -ip │ │ strhteq ip, [lr], -r8 │ │ eoreq ip, lr, ip, ror #14 │ │ eoreq ip, lr, r8, lsl #10 │ │ strhteq ip, [lr], -ip │ │ - ldc2l 4, cr12, [sp, #888] @ 0x378 │ │ + ldc2l 5, cr12, [sp, #44] @ 0x2c │ │ mlaeq lr, r4, r3, ip │ │ movteq r3, #37664 @ 0x9320 │ │ mlaeq lr, ip, fp, ip │ │ eoreq ip, lr, r4, ror r4 │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #84 @ 0x54 │ │ @@ -1318464,15 +1318463,15 @@ │ │ bl 26fe32c │ │ mov r0, r4 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 27018e0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 5, cr9, [pc, #640] @ 244f900 │ │ + ldc2l 5, cr9, [pc, #820] @ 244f9b4 │ │ │ │ 0244f67c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r1 │ │ mov r5, r0 │ │ bl 2701920 │ │ @@ -1319077,19 +1319076,19 @@ │ │ cmp r1, #0 │ │ cmpne r1, #32 │ │ beq 244fa98 │ │ cmp r1, #95 @ 0x5f │ │ movne r0, #32 │ │ strbne r1, [fp, #-33] @ 0xffffffdf │ │ b 244fa98 │ │ - ldc2l 3, cr5, [lr, #620] @ 0x26c │ │ + ldc2l 3, cr5, [lr, #800] @ 0x320 │ │ eoreq r8, lr, r0, asr r2 │ │ - ldc2l 10, cr11, [sp, #300] @ 0x12c @ │ │ - ldc2l 10, cr0, [sp, #772] @ 0x304 @ │ │ - ldc2l 8, cr3, [sp, #628] @ 0x274 │ │ + ldc2l 10, cr11, [sp, #480] @ 0x1e0 @ │ │ + ldc2l 10, cr0, [sp, #952] @ 0x3b8 @ │ │ + vcadd.f32 , , q5, #270 │ │ │ │ 0244fff8 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ ldr r7, [r1] │ │ mov r4, #0 │ │ cmp r7, #1 │ │ @@ -1319293,18 +1319292,18 @@ │ │ mov r0, #0 │ │ mov r1, r4 │ │ bl 270cee0 │ │ cmp r5, #0 │ │ moveq r0, #1 │ │ streq r0, [r4, #16] │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 14, cr2, [lr, #532] @ 0x214 │ │ - ldc2l 5, cr10, [pc, #56] @ 2450368 │ │ - ldc2l 11, cr2, [sp, #996] @ 0x3e4 @ │ │ - ldc2l 6, cr8, [pc, #1000] @ 2450720 │ │ + ldc2l 14, cr2, [lr, #712] @ 0x2c8 │ │ + ldc2l 5, cr10, [pc, #236] @ 245041c │ │ + ldc2l 12, cr2, [sp, #152] @ 0x98 │ │ + ldc2l 7, cr8, [pc, #156] @ 24503d4 │ │ │ │ 02450334 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r5, r2 │ │ mov r6, r1 │ │ @@ -1319348,19 +1319347,19 @@ │ │ ldr r0, [pc, #36] @ 2450408 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 6, cr7, [ip, #344] @ 0x158 │ │ - ldc2l 2, cr11, [sp, #280] @ 0x118 │ │ - ldc2l 10, cr2, [sp, #1012] @ 0x3f4 @ │ │ - ldc2l 6, cr8, [pc, #40] @ 2450434 │ │ - ldc2l 5, cr7, [ip, #840] @ 0x348 │ │ + ldc2l 6, cr7, [ip, #524] @ 0x20c │ │ + ldc2l 2, cr11, [sp, #460] @ 0x1cc │ │ + ldc2l 11, cr2, [sp, #168] @ 0xa8 @ │ │ + ldc2l 6, cr8, [pc, #220] @ 24504e8 │ │ + ldc2l 5, cr7, [ip, #1020] @ 0x3fc │ │ │ │ 0245040c : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r5, r1 │ │ mov r4, r0 │ │ bl 270ce10 │ │ @@ -1319395,19 +1319394,19 @@ │ │ str r0, [r5, #20] │ │ ldr r0, [pc, #32] @ 24504bc │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 10, cr4, [lr, #860] @ 0x35c @ │ │ - ldc2l 1, cr11, [sp, #600] @ 0x258 │ │ - ldc2l 10, cr2, [sp, #308] @ 0x134 @ │ │ - ldc2l 5, cr8, [pc, #360] @ 2450628 │ │ - ldc2l 10, cr4, [lr, #460] @ 0x1cc @ │ │ + ldc2l 11, cr4, [lr, #16] @ │ │ + ldc2l 1, cr11, [sp, #780] @ 0x30c │ │ + ldc2l 10, cr2, [sp, #488] @ 0x1e8 @ │ │ + ldc2l 5, cr8, [pc, #540] @ 24506dc │ │ + ldc2l 10, cr4, [lr, #640] @ 0x280 @ │ │ │ │ 024504c0 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r5, r2 │ │ mov r6, r1 │ │ @@ -1319448,19 +1319447,19 @@ │ │ ldr r0, [pc, #36] @ 2450588 │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 4, cr6, [pc, #224] @ 2450660 │ │ + ldc2l 4, cr6, [pc, #404] @ 2450714 │ │ ldc2l 14, cr15, [pc, #80] @ 24505d4 │ │ - ldc2l 9, cr2, [sp, #266] @ 0x10a @ │ │ - ldc2l 13, cr0, [lr, #892] @ 0x37c │ │ - ldc2l 3, cr6, [pc, #768] @ 2450890 │ │ + ldc2l 9, cr2, [sp, #356] @ 0x164 @ │ │ + ldc2l 14, cr0, [lr, #48] @ 0x30 │ │ + ldc2l 3, cr6, [pc, #948] @ 2450944 │ │ │ │ 0245058c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d10} │ │ sub sp, sp, #96 @ 0x60 │ │ @@ -1320481,15 +1320480,15 @@ │ │ ldr r1, [pc, #4084] @ 2452574 │ │ mov r2, #0 │ │ ldr r0, [pc, #4080] @ 2452578 │ │ add r1, pc, r1 │ │ add r0, pc, r0 │ │ str r2, [r1] │ │ b 2451198 │ │ - ldc2l 10, cr8, [lr, #604] @ 0x25c @ │ │ + ldc2l 10, cr8, [lr, #784] @ 0x310 @ │ │ ldr r0, [pc, #4060] @ 245257c │ │ movw r3, #1467 @ 0x5bb │ │ ldr r2, [pc, #4056] @ 2452580 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r6, [pc, #4044] @ 2452584 │ │ @@ -1320585,16 +1320584,16 @@ │ │ ldr r6, [pc, r6] │ │ sub r1, r6, #1 │ │ cmp r1, #10 │ │ bcs 2451678 │ │ mov r0, r1 │ │ b 2451694 │ │ movteq r1, #38712 @ 0x9738 │ │ - ldc2l 9, cr8, [lr, #126] @ 0x7e @ │ │ - ldc2l 9, cr2, [lr, #498] @ 0x1f2 @ │ │ + ldc2l 9, cr8, [lr, #216] @ 0xd8 @ │ │ + ldc2l 10, cr2, [lr, #152] @ 0x98 @ │ │ movteq r1, #37880 @ 0x93f8 │ │ ldr r6, [pc, #3912] @ 2452690 │ │ ldr r6, [pc, r6] │ │ ldr r1, [pc, #3908] @ 2452694 │ │ mov r0, #1 │ │ cmp r6, #1 │ │ str r6, [fp, #-60] @ 0xffffffc4 │ │ @@ -1320635,16 +1320634,16 @@ │ │ movteq r1, #38436 @ 0x9624 │ │ eorseq r8, r0, r4, asr #1 │ │ cmneq r0, #200, 18 @ 0x320000 │ │ cmneq r0, #36, 24 @ 0x2400 │ │ cmneq r0, #116, 12 @ 0x7400000 │ │ cmneq r0, #8, 16 @ 0x80000 │ │ movteq r1, #37580 @ 0x92cc │ │ - ldc2l 8, cr2, [lr, #612] @ 0x264 │ │ - ldc2l 13, cr0, [sp, #932] @ 0x3a4 │ │ + vcadd.f32 q9, q15, q3, #270 │ │ + ldc2l 14, cr0, [sp, #88] @ 0x58 │ │ movteq r1, #37500 @ 0x927c │ │ cmneq r0, #240, 10 @ 0x3c000000 │ │ cmneq r0, #128, 14 @ 0x2000000 │ │ cmneq r0, #32, 18 @ 0x80000 │ │ vmov d16, r6, r9 │ │ ldr r3, [fp, #-60] @ 0xffffffc4 │ │ vcvt.s32.f64 s0, d16 │ │ @@ -1320732,15 +1320731,15 @@ │ │ movteq r1, #38056 @ 0x94a8 │ │ eorseq r7, r0, r8, asr #30 │ │ cmneq r0, #76, 16 @ 0x4c0000 │ │ cmneq r0, #168, 20 @ 0xa8000 │ │ cmneq r0, #248, 8 @ 0xf8000000 │ │ cmneq r0, #140, 12 @ 0x8c00000 │ │ movteq r1, #37196 @ 0x914c │ │ - ldc2l 12, cr0, [sp, #548] @ 0x224 │ │ + ldc2l 12, cr0, [sp, #728] @ 0x2d8 │ │ ldr r6, [pc, #3940] @ 24528f0 │ │ ldr r6, [pc, r6] │ │ ldr r8, [sp, #72] @ 0x48 │ │ ldr sl, [pc, #3932] @ 24528f4 │ │ add sl, pc, sl │ │ ldr r0, [pc, #3928] @ 24528f8 │ │ ldr r1, [pc, #3928] @ 24528fc │ │ @@ -1320787,15 +1320786,15 @@ │ │ mov r0, r4 │ │ mov r2, #1 │ │ bl 270da60 │ │ ldr r0, [pc, #4036] @ 2452a18 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ b 2451af8 │ │ - ldc2l 1, cr2, [pc, #508] @ 2451c60 │ │ + ldc2l 1, cr2, [pc, #688] @ 2451d14 │ │ movteq r1, #37120 @ 0x9100 │ │ cmneq r0, #116, 8 @ 0x74000000 │ │ cmneq r0, #4, 12 @ 0x400000 │ │ cmneq r0, #164, 14 @ 0x2900000 │ │ mlaseq r0, r4, lr, r7 │ │ mlaseq r0, r4, lr, r7 │ │ movteq r1, #37064 @ 0x90c8 │ │ @@ -1320876,18 +1320875,18 @@ │ │ ldr r2, [pc, #4064] @ 2452b8c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ strb r1, [r2] │ │ mov r1, #16 │ │ bl 270d990 │ │ b 2452308 │ │ - ldc2l 0, cr2, [pc, #124] @ 2451c44 │ │ - ldc2l 13, cr5, [pc, #280] @ 2451ce4 │ │ - vcadd.f32 , , , #270 │ │ - ldc2l 10, cr0, [sp, #696] @ 0x2b8 @ │ │ + ldc2l 0, cr2, [pc, #304] @ 2451cf8 │ │ + ldc2l 13, cr5, [pc, #460] @ 2451d98 │ │ + ldc2l 8, cr9, [pc, #584] @ 2451e18 │ │ + ldc2l 10, cr0, [sp, #876] @ 0x36c @ │ │ movteq r0, #40776 @ 0x9f48 │ │ cmneq r0, #188, 4 @ 0xc000000b │ │ cmneq r0, #76, 8 @ 0x4c000000 │ │ cmneq r0, #236, 10 @ 0x3b000000 │ │ ldrsbteq r7, [r0], -ip │ │ ldrsbteq r7, [r0], -ip │ │ movteq r0, #40720 @ 0x9f10 │ │ @@ -1320968,15 +1320967,15 @@ │ │ eorseq r7, r0, r8, lsl ip │ │ cmneq r0, #24, 10 @ 0x6000000 │ │ cmneq r0, #120, 14 @ 0x1e00000 │ │ cmneq r0, #200, 2 @ 0x32 │ │ cmneq r0, #88, 6 @ 0x60000001 │ │ movteq r1, #37156 @ 0x9124 │ │ movteq r1, #37124 @ 0x9104 │ │ - ldc2l 9, cr0, [sp, #140] @ 0x8c @ │ │ + ldc2l 9, cr0, [sp, #230] @ 0xe6 @ │ │ ldc2l 13, cr11, [pc, #488] @ 2451f24 │ │ movteq r0, #40388 @ 0x9dc4 │ │ cmneq r0, #56, 2 │ │ cmneq r0, #200, 4 @ 0x8000000c │ │ cmneq r0, #104, 8 @ 0x68000000 │ │ eorseq r7, r0, r8, asr fp │ │ eorseq r7, r0, r8, asr fp │ │ @@ -1320988,16 +1320987,16 @@ │ │ cmneq r0, #192 @ 0xc0 │ │ cmneq r0, #80, 4 │ │ cmneq r0, #240, 6 @ 0xc0000003 │ │ eorseq r7, r0, r0, ror #21 │ │ eorseq r7, r0, r0, ror #21 │ │ movteq r0, #40212 @ 0x9d14 │ │ cmneq r0, #84, 10 @ 0x15000000 │ │ - ldc2l 11, cr3, [pc, #120] @ 2451e00 @ │ │ - ldc2l 0, cr2, [sp, #52] @ 0x34 │ │ + ldc2l 11, cr3, [pc, #300] @ 2451eb4 @ │ │ + ldc2l 0, cr2, [sp, #232] @ 0xe8 │ │ eorseq r7, r0, r4, lsl #21 │ │ movteq r0, #40136 @ 0x9cc8 │ │ movteq r0, #40132 @ 0x9cc4 │ │ movteq r0, #40096 @ 0x9ca0 │ │ ldr r1, [pc, #4064] @ 2452d80 │ │ mov r0, #3 │ │ ldr r2, [pc, #4060] @ 2452d84 │ │ @@ -1321148,15 +1321147,15 @@ │ │ vmrs APSR_nzcv, fpscr │ │ bpl 2451f38 │ │ str r3, [r4] │ │ mov r2, r3 │ │ ldr r1, [pc, #3656] @ 2452e44 │ │ ldr r1, [pc, r1] │ │ b 2451f48 │ │ - ldc2l 4, cr2, [sp, #332] @ 0x14c │ │ + ldc2l 4, cr2, [sp, #512] @ 0x200 │ │ movteq r0, #39752 @ 0x9b48 │ │ movteq r0, #39736 @ 0x9b38 │ │ ldrshteq r7, [r0], -ip │ │ cmneq r0, #172, 28 @ 0xac0 │ │ cmneq r0, #60 @ 0x3c │ │ cmneq r0, #224, 2 @ 0x38 │ │ ldrsbteq r7, [r0], -r0 │ │ @@ -1321244,24 +1321243,24 @@ │ │ ldr r5, [pc, #3972] @ 24530f0 │ │ movt r6, #4 │ │ ldr r7, [pc, #3968] @ 24530f4 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ add r7, pc, r7 │ │ b 24521e4 │ │ - ldc2l 2, cr2, [sp, #972] @ 0x3cc │ │ + ldc2l 3, cr2, [sp, #128] @ 0x80 │ │ movteq r0, #39400 @ 0x99e8 │ │ ldc2l 9, cr11, [pc, #172] @ 245223c @ │ │ cmneq r0, #224, 4 │ │ cmneq r0, #164, 4 @ 0x4000000a │ │ cmneq r0, #128, 4 │ │ movteq r0, #39288 @ 0x9978 │ │ movteq r0, #39276 @ 0x996c │ │ ldc2l 3, cr13, [pc, #528] @ 24523b8 │ │ - ldc2l 2, cr2, [sp, #84] @ 0x54 │ │ + ldc2l 2, cr2, [sp, #264] @ 0x108 │ │ mov r0, r4 │ │ mov r2, r5 │ │ mov r3, #992 @ 0x3e0 │ │ bl 270d9c0 │ │ ldr r8, [pc, #4024] @ 2453178 │ │ ldr r8, [pc, r8] │ │ sub r1, r8, #1 │ │ @@ -1321350,19 +1321349,19 @@ │ │ mov r1, #24 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4028] @ 24532dc │ │ add r0, pc, r0 │ │ b 2451198 │ │ ldc2l 2, cr13, [pc, #576] @ 245256c │ │ - ldc2l 1, cr2, [sp, #132] @ 0x84 │ │ + ldc2l 1, cr2, [sp, #312] @ 0x138 │ │ eorseq r7, r0, r0, ror r4 │ │ movteq r0, #38884 @ 0x97e4 │ │ - ldc2l 11, cr1, [sp, #52] @ 0x34 @ │ │ - ldc2l 13, cr1, [lr, #500] @ 0x1f4 │ │ + ldc2l 11, cr1, [sp, #232] @ 0xe8 @ │ │ + ldc2l 13, cr1, [lr, #680] @ 0x2a8 │ │ ldr r1, [pc, #4080] @ 2453334 │ │ cmp r6, #1 │ │ mov r0, #1 │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ blt 245369c │ │ ldr r5, [pc, #4060] @ 2453338 │ │ @@ -1321394,19 +1321393,19 @@ │ │ ldr r0, [pc, #3980] @ 2453350 │ │ ldr r0, [pc, r0] │ │ sub r7, r0, #1 │ │ cmp r7, #10 │ │ bcs 24524b0 │ │ mov r1, r7 │ │ b 24524f8 │ │ - ldc2l 5, cr3, [pc, #64] @ 2452420 │ │ - ldc2l 2, cr0, [sp, #964] @ 0x3c4 │ │ + ldc2l 5, cr3, [pc, #244] @ 24524d4 │ │ + ldc2l 3, cr0, [sp, #120] @ 0x78 │ │ cmneq r0, #196 @ 0xc4 │ │ cmneq r0, #144 @ 0x90 │ │ - ldc2l 9, cr5, [ip, #438] @ 0x1b6 @ │ │ + ldc2l 10, cr5, [ip, #32] @ │ │ movteq r0, #39468 @ 0x9a2c │ │ movteq r0, #39440 @ 0x9a10 │ │ ldr r0, [pc, #4088] @ 24533f4 │ │ movw r2, #57874 @ 0xe212 │ │ movt r2, #4 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4076] @ 24533f8 │ │ @@ -1321440,22 +1321439,22 @@ │ │ vstr d8, [r0] │ │ b 2452528 │ │ movteq r0, #38640 @ 0x96f0 │ │ movteq r0, #38612 @ 0x96d4 │ │ ldc2l 6, cr11, [pc, #440] @ 2452644 │ │ movteq r0, #38584 @ 0x96b8 │ │ ldc2l 0, cr13, [pc, #976] @ 2452864 │ │ - ldc2l 15, cr1, [sp, #532] @ 0x214 │ │ + ldc2l 15, cr1, [sp, #712] @ 0x2c8 │ │ movteq r0, #38560 @ 0x96a0 │ │ movteq r0, #38512 @ 0x9670 │ │ ldc2l 0, cr13, [pc, #672] @ 2452744 │ │ - ldc2l 15, cr1, [sp, #228] @ 0xe4 │ │ + ldc2l 15, cr1, [sp, #408] @ 0x198 │ │ movteq r0, #38488 @ 0x9658 │ │ movteq r0, #38476 @ 0x964c │ │ - ldc2l 15, cr1, [sp, #28] │ │ + ldc2l 15, cr1, [sp, #208] @ 0xd0 │ │ ldr r0, [pc, #4024] @ 2453470 │ │ mov r1, r7 │ │ mov r2, r8 │ │ movw r3, #1032 @ 0x408 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r7, r0 │ │ @@ -1321499,22 +1321498,22 @@ │ │ vldr d16, [r2] │ │ ldr r2, [pc, #4000] @ 245350c │ │ add r2, pc, r2 │ │ vstr d16, [r2] │ │ b 245260c │ │ movteq r0, #38392 @ 0x95f8 │ │ ldc2l 5, cr11, [pc, #616] @ 24527e8 │ │ - ldc2l 0, cr10, [sp, #612] @ 0x264 │ │ - ldc2l 14, cr1, [sp, #804] @ 0x324 │ │ + ldc2l 0, cr10, [sp, #792] @ 0x318 │ │ + ldc2l 14, cr1, [sp, #984] @ 0x3d8 │ │ movteq r0, #39100 @ 0x98bc │ │ movteq r0, #39076 @ 0x98a4 │ │ movteq r0, #38336 @ 0x95c0 │ │ cmneq r0, #28, 28 @ 0x1c0 │ │ - ldc2l 0, cr10, [sp, #260] @ 0x104 │ │ - ldc2l 14, cr1, [sp, #452] @ 0x1c4 │ │ + ldc2l 0, cr10, [sp, #440] @ 0x1b8 │ │ + ldc2l 14, cr1, [sp, #632] @ 0x278 │ │ ldc2l 15, cr12, [pc, #864] @ 2452904 │ │ mov r4, r8 │ │ ldr r8, [pc, #3940] @ 2453510 │ │ mov r2, r4 │ │ mov r3, #1056 @ 0x420 │ │ add r8, pc, r8 │ │ mov r0, r8 │ │ @@ -1321571,15 +1321570,15 @@ │ │ movteq r0, #38156 @ 0x950c │ │ movteq r0, #38132 @ 0x94f4 │ │ movteq r0, #38068 @ 0x94b4 │ │ movteq r0, #38016 @ 0x9480 │ │ movteq r0, #38700 @ 0x972c │ │ movteq r0, #37952 @ 0x9440 │ │ cmneq r0, #72, 26 @ 0x1200 │ │ - ldc2l 12, cr1, [sp, #980] @ 0x3d4 │ │ + ldc2l 13, cr1, [sp, #136] @ 0x88 │ │ ldc2l 14, cr12, [pc, #336] @ 24527f8 │ │ mov r7, r6 │ │ ldr r6, [pc, #4072] @ 2453698 │ │ mov r2, r8 │ │ movw r3, #1057 @ 0x421 │ │ add r6, pc, r6 │ │ mov r4, r5 │ │ @@ -1321718,15 +1321717,15 @@ │ │ ldr r0, [pc, r0] │ │ ldr r2, [pc, #4004] @ 245387c │ │ ldr r2, [pc, r2] │ │ ldr r5, [pc, #4000] @ 2453880 │ │ add r5, pc, r5 │ │ b 245291c │ │ movteq r0, #37548 @ 0x92ac │ │ - ldc2l 8, cr9, [lr, #980] @ 0x3d4 │ │ + ldc2l 9, cr9, [lr, #68] @ 0x44 @ │ │ movteq r0, #37504 @ 0x9280 │ │ movteq r0, #38120 @ 0x94e8 │ │ cmneq r0, #100, 20 @ 0x64000 │ │ cmneq r0, #32, 22 @ 0x8000 │ │ movteq r0, #38092 @ 0x94cc │ │ str r3, [r4] │ │ mov r1, r3 │ │ @@ -1321769,15 +1321768,15 @@ │ │ str r3, [r7] │ │ mov r6, r3 │ │ ldr r1, [pc, #4036] @ 245396c │ │ ldr r1, [pc, r1] │ │ b 2452910 │ │ movteq r0, #37624 @ 0x92f8 │ │ movteq r0, #37600 @ 0x92e0 │ │ - ldc2l 7, cr13, [lr, #716] @ 0x2cc │ │ + ldc2l 7, cr13, [lr, #896] @ 0x380 │ │ movteq r0, #37256 @ 0x9188 │ │ mov r0, r4 │ │ bl 270d200 │ │ ldr r6, [pc, #4004] @ 2453970 │ │ vmov d8, r0, r1 │ │ mov r0, #1 │ │ add r6, pc, r6 │ │ @@ -1321792,25 +1321791,25 @@ │ │ str r1, [fp, #-60] @ 0xffffffc4 │ │ blt 245304c │ │ ldr r8, [pc, #3960] @ 245397c │ │ sub r9, fp, #72 @ 0x48 │ │ mov r1, #0 │ │ add r8, pc, r8 │ │ b 2452a88 │ │ - ldc2l 4, cr1, [sp, #660] @ 0x294 │ │ + ldc2l 4, cr1, [sp, #840] @ 0x348 │ │ movteq r0, #37504 @ 0x9280 │ │ - ldc2l 10, cr11, [ip, #672] @ 0x2a0 @ │ │ - ldc2l 14, cr2, [pc, #788] @ 2452d38 │ │ + ldc2l 10, cr11, [ip, #852] @ 0x354 @ │ │ + ldc2l 14, cr2, [pc, #968] @ 2452dec │ │ movteq r0, #37040 @ 0x90b0 │ │ - ldc2l 3, cr1, [sp, #884] @ 0x374 │ │ - ldc2l 13, cr2, [pc, #992] @ 2452e10 │ │ - ldc2l 11, cr15, [ip, #840] @ 0x348 @ │ │ + ldc2l 4, cr1, [sp, #40] @ 0x28 │ │ + ldc2l 14, cr2, [pc, #148] @ 2452ac4 │ │ + ldc2l 11, cr15, [ip, #1020] @ 0x3fc @ │ │ movteq r0, #36968 @ 0x9068 │ │ - ldc2l 4, cr1, [ip, #896] @ 0x380 │ │ - ldc2l 3, cr1, [sp, #324] @ 0x144 │ │ + ldc2l 5, cr1, [ip, #52] @ 0x34 │ │ + ldc2l 3, cr1, [sp, #504] @ 0x1f8 │ │ cmneq r0, #100, 16 @ 0x640000 │ │ ldr r0, [pc, #3896] @ 2453980 │ │ add r0, pc, r0 │ │ add r0, r0, r1, lsl #3 │ │ vstr d8, [r0] │ │ add r1, sl, r1, lsl #3 │ │ mov r0, r6 │ │ @@ -1321884,20 +1321883,20 @@ │ │ ldr r0, [pc, #3648] @ 24539ac │ │ mov r2, r8 │ │ movw r3, #1531 @ 0x5fb │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2452a50 │ │ - ldc2l 6, cr9, [sp, #868] @ 0x364 │ │ + ldc2l 7, cr9, [sp, #24] │ │ ldc2l 15, cr10, [pc, #584] @ 2452dd4 │ │ - ldc2l 0, cr1, [pc, #184] @ 2452c48 │ │ + ldc2l 0, cr1, [pc, #364] @ 2452cfc │ │ movteq pc, #36812 @ 0x8fcc @ │ │ - ldc2l 8, cr11, [ip, #868] @ 0x364 │ │ - ldc2l 4, cr7, [lr, #468] @ 0x1d4 │ │ + ldc2l 9, cr11, [ip, #12] @ │ │ + ldc2l 4, cr7, [lr, #648] @ 0x288 │ │ cmneq r0, #80, 16 @ 0x500000 │ │ ldr r0, [pc, #4048] @ 2453b74 │ │ movw r4, #21846 @ 0x5556 │ │ movt r4, #21845 @ 0x5555 │ │ ldr r0, [pc, r0] │ │ ldr r5, [pc, #4036] @ 2453b78 │ │ smmul r0, r0, r4 │ │ @@ -1321944,15 +1321943,15 @@ │ │ ldr sl, [pc, #3904] @ 2453b9c │ │ add r8, pc, r8 │ │ add sl, pc, sl │ │ b 2452c94 │ │ eorseq r6, r0, r0, ror #25 │ │ movteq pc, #36604 @ 0x8efc @ │ │ ldc2l 9, cr12, [pc, #112] @ 2452ce4 @ │ │ - ldc2l 7, cr1, [sp, #804] @ 0x324 │ │ + ldc2l 7, cr1, [sp, #984] @ 0x3d8 │ │ str r3, [r4] │ │ mov r1, r3 │ │ ldr r2, [pc, #3868] @ 2453ba0 │ │ ldr r2, [pc, r2] │ │ vorr d8, d16, d16 │ │ sub r3, r2, #1 │ │ cmp r1, r3 │ │ @@ -1321966,16 +1321965,16 @@ │ │ sub r1, r1, #2 │ │ cmp r1, r9 │ │ bcs 2452cd0 │ │ vorr d16, d8, d8 │ │ b 2452cf4 │ │ eorseq r6, r0, ip, lsr #22 │ │ movteq pc, #36512 @ 0x8ea0 @ │ │ - ldc2l 1, cr1, [sp, #804] @ 0x324 │ │ - ldc2l 12, cr7, [ip, #648] @ 0x288 │ │ + ldc2l 1, cr1, [sp, #984] @ 0x3d8 │ │ + ldc2l 12, cr7, [ip, #828] @ 0x33c │ │ ldr r0, [pc, #3788] @ 2453ba4 │ │ mov r2, sl │ │ movw r3, #3140 @ 0xc44 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ vldr d16, [r5] │ │ @@ -1322012,16 +1322011,16 @@ │ │ ldr r2, [pc, #4048] @ 2453d3c │ │ ldr r2, [pc, r2] │ │ ldr r5, [pc, #4044] @ 2453d40 │ │ ldr r6, [pc, #4044] @ 2453d44 │ │ add r5, pc, r5 │ │ add r6, pc, r6 │ │ b 2452db4 │ │ - ldc2l 7, cr11, [ip, #404] @ 0x194 │ │ - ldc2l 2, cr7, [lr, #1012] @ 0x3f4 │ │ + ldc2l 7, cr11, [ip, #584] @ 0x248 │ │ + ldc2l 3, cr7, [lr, #168] @ 0xa8 │ │ cmneq r0, #224, 12 @ 0xe000000 │ │ eorseq r6, r0, r4, ror fp │ │ movteq pc, #36240 @ 0x8d90 @ │ │ add r1, sl, r1, lsl #3 │ │ cmp r0, #2 │ │ mov r0, r3 │ │ str r3, [r8] │ │ @@ -1322043,28 +1322042,28 @@ │ │ ldr r0, [pc, r0] │ │ vldr d16, [r7] │ │ ldr r2, [pc, #4064] @ 2453dd0 │ │ sub r3, r0, #1 │ │ ldr r2, [pc, r2] │ │ b 2452d94 │ │ ldc2l 7, cr12, [pc, #816] @ 2453130 │ │ - ldc2l 6, cr1, [sp, #372] @ 0x174 │ │ + ldc2l 6, cr1, [sp, #552] @ 0x228 │ │ movteq r0, #36904 @ 0x9028 │ │ cmneq r0, #80, 12 @ 0x5000000 │ │ movteq pc, #36128 @ 0x8d20 @ │ │ ldc2l 7, cr12, [pc, #352] @ 2452f74 │ │ - ldc2l 5, cr1, [sp, #932] @ 0x3a4 │ │ + ldc2l 6, cr1, [sp, #88] @ 0x58 │ │ movteq pc, #36796 @ 0x8fbc @ │ │ movteq pc, #36084 @ 0x8cf4 @ │ │ movteq pc, #36324 @ 0x8de4 @ │ │ cmneq r0, #192, 10 @ 0x30000000 │ │ movteq pc, #35988 @ 0x8c94 @ │ │ movteq pc, #36284 @ 0x8dbc @ │ │ ldc2l 6, cr12, [pc, #880] @ 24531a4 │ │ - ldc2l 5, cr1, [sp, #436] @ 0x1b4 │ │ + ldc2l 5, cr1, [sp, #616] @ 0x268 │ │ movteq pc, #36200 @ 0x8d68 @ │ │ cmneq r0, #224, 8 @ 0xe0000000 │ │ movteq pc, #35764 @ 0x8bb4 @ │ │ movteq pc, #36056 @ 0x8cd8 @ │ │ movteq pc, #35776 @ 0x8bc0 @ │ │ ldr r1, [pc, #3972] @ 2453dd4 │ │ ldr r1, [pc, r1] │ │ @@ -1322173,30 +1322172,30 @@ │ │ cmp r0, #1 │ │ ldr r2, [pc, #3636] @ 2453e28 │ │ ldr r0, [fp, #12] │ │ add r2, pc, r2 │ │ bne 24544ac │ │ vstr d16, [r0] │ │ b 2454478 │ │ - ldc2l 1, cr1, [lr, #64] @ 0x40 │ │ + ldc2l 1, cr1, [lr, #244] @ 0xf4 │ │ ldr r0, [pc, #3612] @ 2453e2c │ │ mov r1, #0 │ │ ldr r2, [pc, #3608] @ 2453e30 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ strb r1, [r2] │ │ mov r1, #18 │ │ bl 270d990 │ │ b 24513d4 │ │ movteq pc, #35656 @ 0x8b48 @ │ │ - ldc2l 14, cr0, [sp, #468] @ 0x1d4 │ │ + ldc2l 14, cr0, [sp, #648] @ 0x288 │ │ cmneq r0, #104, 8 @ 0x68000000 │ │ - ldc2l 0, cr1, [lr, #544] @ 0x220 │ │ + ldc2l 0, cr1, [lr, #724] @ 0x2d4 │ │ movteq pc, #35520 @ 0x8ac0 @ │ │ - ldc2l 13, cr0, [sp, #948] @ 0x3b4 │ │ + ldc2l 14, cr0, [sp, #104] @ 0x68 │ │ ldr r0, [pc, #4052] @ 2454020 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #4048] @ 2454024 │ │ movw r2, #57874 @ 0xe212 │ │ movt r2, #4 │ │ ldr r1, [pc, r1] │ │ add r1, r1, r0 │ │ @@ -1322226,21 +1322225,21 @@ │ │ ldr r2, [pc, #4092] @ 24540c0 │ │ str r0, [fp, #-60] @ 0xffffffc4 │ │ add r2, pc, r2 │ │ add r1, r2, r1, lsl #3 │ │ vstr d8, [r1] │ │ b 2453144 │ │ cmneq r0, #224, 6 @ 0x80000003 │ │ - ldc2l 5, cr9, [sp, #132] @ 0x84 │ │ - ldc2l 3, cr1, [sp, #324] @ 0x144 │ │ + ldc2l 5, cr9, [sp, #312] @ 0x138 │ │ + ldc2l 3, cr1, [sp, #504] @ 0x1f8 │ │ movteq pc, #36164 @ 0x8d44 @ │ │ movteq pc, #35412 @ 0x8a54 @ │ │ cmneq r0, #176, 4 │ │ - ldc2l 4, cr9, [sp, #820] @ 0x334 │ │ - ldc2l 2, cr1, [sp, #1012] @ 0x3f4 │ │ + ldc2l 4, cr9, [sp, #1000] @ 0x3e8 │ │ + ldc2l 3, cr1, [sp, #168] @ 0xa8 │ │ ldc2l 4, cr12, [pc, #400] @ 245328c │ │ ldr r0, [pc, #4036] @ 24540c4 │ │ movw r3, #1535 @ 0x5ff │ │ ldr r2, [pc, #4032] @ 24540c8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1322271,15 +1322270,15 @@ │ │ add sl, pc, sl │ │ b 24531f0 │ │ movteq pc, #35292 @ 0x89dc @ │ │ movteq pc, #35268 @ 0x89c4 @ │ │ movteq pc, #35204 @ 0x8984 @ │ │ movteq pc, #35904 @ 0x8c40 @ │ │ movteq pc, #35152 @ 0x8950 @ │ │ - ldc2l 6, cr7, [ip, #608] @ 0x260 │ │ + ldc2l 6, cr7, [ip, #788] @ 0x314 │ │ ldrhteq r6, [r0], -ip │ │ movteq pc, #35076 @ 0x8904 @ │ │ cmneq r0, #36, 4 @ 0x40000002 │ │ movteq pc, #35044 @ 0x88e4 @ │ │ ldr r0, [pc, #4076] @ 2454194 │ │ add r0, pc, r0 │ │ str r5, [r0, r1, lsl #2] │ │ @@ -1322352,18 +1322351,18 @@ │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24531ac │ │ movteq pc, #35756 @ 0x8bac @ │ │ ldc2l 3, cr12, [pc, #28] @ 24532ec │ │ movteq pc, #34968 @ 0x8898 @ │ │ - ldc2l 11, cr0, [sp, #788] @ 0x314 @ │ │ + ldc2l 11, cr0, [sp, #968] @ 0x3c8 @ │ │ movteq pc, #34976 @ 0x88a0 @ │ │ - ldc2l 15, cr2, [ip, #676] @ 0x2a4 │ │ - ldc2l 13, cr6, [lr, #492] @ 0x1ec │ │ + ldc2l 15, cr2, [ip, #856] @ 0x358 │ │ + ldc2l 13, cr6, [lr, #672] @ 0x2a0 │ │ ldr r0, [pc, #3944] @ 2454250 │ │ mov r1, #1 │ │ add r0, pc, r0 │ │ str r1, [r0] │ │ ldr r0, [pc, #3932] @ 2454254 │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-60] @ 0xffffffc4 │ │ @@ -1322379,19 +1322378,19 @@ │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ mov r0, #1 │ │ add r7, pc, r7 │ │ b 2453378 │ │ movteq pc, #34896 @ 0x8850 @ │ │ cmneq r0, #228 @ 0xe4 │ │ - ldc2l 1, cr1, [sp, #20] │ │ + ldc2l 1, cr1, [sp, #200] @ 0xc8 │ │ movteq pc, #34892 @ 0x884c @ │ │ cmneq r0, #80, 2 │ │ - ldc2l 8, cr0, [pc, #364] @ 24534bc │ │ - ldc2l 10, cr4, [ip, #380] @ 0x17c @ │ │ + vcadd.f32 d16, d31, d8, #270 │ │ + ldc2l 10, cr4, [ip, #560] @ 0x230 @ │ │ movteq pc, #34776 @ 0x87d8 @ │ │ ldr r2, [fp, #-60] @ 0xffffffc4 │ │ ldr r1, [pc, #4056] @ 2454338 │ │ ldr r1, [pc, r1] │ │ ldr r3, [pc, #4052] @ 245433c │ │ add r0, r1, #1 │ │ cmp r1, r2 │ │ @@ -1322430,15 +1322429,15 @@ │ │ str r0, [sl] │ │ b 2453440 │ │ movteq pc, #34712 @ 0x8798 @ │ │ movteq pc, #34696 @ 0x8788 @ │ │ ldc2l 1, cr12, [pc, #720] @ 24536d4 │ │ movteq pc, #34656 @ 0x8760 @ │ │ movteq pc, #35384 @ 0x8a38 @ │ │ - ldc2l 11, cr0, [ip, #820] @ 0x334 @ │ │ + ldc2l 11, cr0, [ip, #1000] @ 0x3e8 @ │ │ rsb r0, r1, r1, lsl #4 │ │ mov r1, r5 │ │ mov r3, #1 │ │ str r8, [sp] │ │ add r2, r9, r0, lsl #1 │ │ mov r0, r4 │ │ bl 270e220 │ │ @@ -1322456,15 +1322455,15 @@ │ │ ldr r0, [pc, #4036] @ 2454420 │ │ mov r2, r7 │ │ movw r3, #1563 @ 0x61b │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 245340c │ │ - ldc2l 7, cr0, [pc, #156] @ 2453514 │ │ + ldc2l 7, cr0, [pc, #336] @ 24535c8 │ │ ldr r4, [pc, #4088] @ 2454474 │ │ mov r3, #30 │ │ ldr r0, [sp, #72] @ 0x48 │ │ add r4, pc, r4 │ │ ldr r2, [fp, #32] │ │ mov r1, r4 │ │ bl 270d970 │ │ @@ -1322479,32 +1322478,32 @@ │ │ bge 24534d0 │ │ ldr r0, [sp, #76] @ 0x4c │ │ ldr r1, [r0] │ │ ldr r0, [pc, #4048] @ 2454494 │ │ add r0, pc, r0 │ │ b 2454010 │ │ movteq pc, #34504 @ 0x86c8 @ │ │ - ldc2l 11, cr0, [ip, #276] @ 0x114 @ │ │ + ldc2l 11, cr0, [ip, #456] @ 0x1c8 @ │ │ ldr r5, [pc, #4032] @ 2454498 │ │ ldr r9, [pc, #4032] @ 245449c │ │ ldr r6, [pc, #4032] @ 24544a0 │ │ add r5, pc, r5 │ │ ldr sl, [pc, #4028] @ 24544a4 │ │ add r9, pc, r9 │ │ ldr r8, [pc, #4024] @ 24544a8 │ │ add r6, pc, r6 │ │ add sl, pc, sl │ │ add r8, pc, r8 │ │ b 2453558 │ │ cmneq r0, #172, 30 @ 0x2b0 │ │ movteq pc, #34420 @ 0x8674 @ │ │ - ldc2l 8, cr4, [ip, #844] @ 0x34c │ │ + ldc2l 9, cr4, [ip] @ │ │ movteq pc, #34380 @ 0x864c @ │ │ cmneq r0, #64, 30 @ 0x100 │ │ - ldc2l 10, cr0, [ip, #516] @ 0x204 @ │ │ + ldc2l 10, cr0, [ip, #696] @ 0x2b8 @ │ │ mov r1, r9 │ │ ldr r0, [fp, #32] │ │ mov r3, #30 │ │ str r0, [sp] │ │ rsb r0, r2, r2, lsl #4 │ │ ldr r2, [sp, #72] @ 0x48 │ │ add r0, r4, r0, lsl #1 │ │ @@ -1322594,32 +1322593,32 @@ │ │ mov r2, r6 │ │ movw r3, #1581 @ 0x62d │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r2, r0 │ │ mov r1, sl │ │ b 2453518 │ │ - ldc2l 9, cr0, [ip, #250] @ 0xfa @ │ │ + ldc2l 9, cr0, [ip, #340] @ 0x154 @ │ │ ldr r1, [sp, #68] @ 0x44 │ │ mov r0, #0 │ │ str r0, [r1] │ │ str r0, [r1, #4] │ │ ldr r0, [sp, #76] @ 0x4c │ │ ldr r1, [r0] │ │ ldr r0, [pc, #3724] @ 2454548 │ │ add r0, pc, r0 │ │ b 2454010 │ │ movteq pc, #33992 @ 0x84c8 @ │ │ movteq pc, #33984 @ 0x84c0 @ │ │ movteq pc, #33916 @ 0x847c @ │ │ movteq pc, #33900 @ 0x846c @ │ │ movteq pc, #33868 @ 0x844c @ │ │ - ldc2l 14, cr8, [sp, #820] @ 0x334 │ │ - ldc2l 12, cr0, [sp, #1012] @ 0x3f4 │ │ - ldc2l 8, cr0, [ip, #740] @ 0x2e4 │ │ + ldc2l 14, cr8, [sp, #1000] @ 0x3e8 │ │ + ldc2l 13, cr0, [sp, #168] @ 0xa8 │ │ + vcadd.f32 q8, q14, q11, #270 │ │ movteq pc, #33788 @ 0x83fc @ │ │ movteq pc, #33756 @ 0x83dc @ │ │ movteq pc, #33708 @ 0x83ac @ │ │ movteq pc, #34368 @ 0x8640 @ │ │ movteq pc, #33596 @ 0x833c @ │ │ eorseq r6, r0, r8, lsl #2 │ │ ldr r0, [pc, #3972] @ 2454684 │ │ @@ -1322710,15 +1322709,15 @@ │ │ ldr r2, [pc, r2] │ │ ldr r5, [pc, #3744] @ 24546f8 │ │ ldr r6, [pc, #3744] @ 24546fc │ │ add r5, pc, r5 │ │ add r6, pc, r6 │ │ b 24538a4 │ │ ldc2l 13, cr11, [pc, #432] @ 2453a1c │ │ - ldc2l 11, cr0, [sp, #1012] @ 0x3f4 @ │ │ + ldc2l 12, cr0, [sp, #168] @ 0xa8 │ │ movteq pc, #34256 @ 0x85d0 @ │ │ movteq pc, #33544 @ 0x8308 @ │ │ movteq pc, #33784 @ 0x83f8 @ │ │ eorseq r6, r0, ip, lsl #1 │ │ movteq pc, #33452 @ 0x82ac @ │ │ movteq pc, #33756 @ 0x83dc @ │ │ add r1, r7, r1, lsl #3 │ │ @@ -1322771,35 +1322770,35 @@ │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3464] @ 24546dc │ │ add r1, r7, r1, lsl #3 │ │ add r0, pc, r0 │ │ b 2453b50 │ │ - ldc2l 11, cr0, [sp, #68] @ 0x44 @ │ │ + ldc2l 11, cr0, [sp, #248] @ 0xf8 @ │ │ eorseq r5, r0, r8, ror #31 │ │ movteq pc, #33288 @ 0x8208 @ │ │ movteq pc, #33580 @ 0x832c @ │ │ movteq pc, #33300 @ 0x8214 @ │ │ cmneq r0, #32, 24 @ 0x2000 │ │ movteq pc, #33212 @ 0x81bc @ │ │ movteq pc, #33928 @ 0x8488 @ │ │ - ldc2l 10, cr0, [sp, #420] @ 0x1a4 @ │ │ + ldc2l 10, cr0, [sp, #600] @ 0x258 @ │ │ cmneq r0, #4, 20 @ 0x4000 │ │ movteq pc, #33072 @ 0x8130 @ │ │ movteq pc, #33056 @ 0x8120 @ │ │ - ldc2l 11, cr8, [sp, #644] @ 0x284 @ │ │ + ldc2l 11, cr8, [sp, #824] @ 0x338 @ │ │ movteq pc, #32964 @ 0x80c4 @ │ │ movteq pc, #32948 @ 0x80b4 @ │ │ ldc2l 10, cr11, [pc, #896] @ 2453d20 @ │ │ movteq pc, #32908 @ 0x808c @ │ │ - ldc2l 4, cr0, [ip, #996] @ 0x3e4 │ │ + ldc2l 5, cr0, [ip, #152] @ 0x98 │ │ cmneq r0, #4, 18 @ 0x10000 │ │ movteq pc, #32836 @ 0x8044 @ │ │ - ldc2l 10, cr8, [sp, #820] @ 0x334 @ │ │ + ldc2l 10, cr8, [sp, #1000] @ 0x3e8 @ │ │ ldr r0, [pc, #3408] @ 2454708 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #3404] @ 245470c │ │ add r0, r0, r0, lsl #1 │ │ ldr r1, [pc, r1] │ │ add r0, r1, r0 │ │ sub r1, r0, #1 │ │ @@ -1322909,21 +1322908,21 @@ │ │ ldr r0, [pc, #2932] @ 24546e4 │ │ add r0, pc, r0 │ │ b 2451198 │ │ movteq pc, #33476 @ 0x82c4 @ │ │ cmneq r0, #236, 16 @ 0xec0000 │ │ movteq lr, #36788 @ 0x8fb4 │ │ ldc2l 9, cr11, [pc, #480] @ 2453d68 @ │ │ - vcadd.f32 d16, d29, d1, #270 │ │ + vcadd.f32 d16, d29, d30, #270 │ │ movteq pc, #33364 @ 0x8254 @ │ │ movteq lr, #36748 @ 0x8f8c │ │ movteq pc, #32892 @ 0x807c @ │ │ movteq lr, #36660 @ 0x8f34 │ │ movteq pc, #32864 @ 0x8060 @ │ │ - ldc2l 8, cr0, [sp, #84] @ 0x54 │ │ + vcadd.f32 q8, , q1, #270 │ │ movteq pc, #32812 @ 0x802c @ │ │ ldc2l 9, cr11, [pc] @ 2453bac @ │ │ movteq lr, #36496 @ 0x8e90 │ │ movteq lr, #36788 @ 0x8fb4 │ │ movteq lr, #36508 @ 0x8e9c │ │ movteq pc, #33092 @ 0x8144 @ │ │ ldr r0, [pc, #2520] @ 2454598 │ │ @@ -1323021,15 +1323020,15 @@ │ │ add r6, pc, r6 │ │ b 2453d68 │ │ movteq lr, #36484 @ 0x8e84 │ │ cmneq r0, #104, 14 @ 0x1a00000 │ │ movteq pc, #33052 @ 0x811c @ │ │ movteq lr, #36388 @ 0x8e24 │ │ vcadd.f32 , , q12, #270 │ │ - ldc2l 6, cr0, [sp, #996] @ 0x3e4 │ │ + ldc2l 7, cr0, [sp, #152] @ 0x98 │ │ add r1, r5, r1, lsl #3 │ │ cmp r0, #2 │ │ mov r0, r3 │ │ str r3, [sl] │ │ vldr d17, [r1] │ │ vmul.f64 d16, d17, d16 │ │ vstr d16, [r4] │ │ @@ -1323060,34 +1323059,34 @@ │ │ bl 270d990 │ │ b 2454084 │ │ movteq lr, #36280 @ 0x8db8 │ │ movteq lr, #36252 @ 0x8d9c │ │ movteq lr, #36204 @ 0x8d6c │ │ movteq lr, #36136 @ 0x8d28 │ │ ldc2l 7, cr11, [pc, #384] @ 2453f64 │ │ - ldc2l 5, cr0, [sp, #964] @ 0x3c4 │ │ + ldc2l 6, cr0, [sp, #120] @ 0x78 │ │ ldrhteq r5, [r0], -r0 │ │ movteq lr, #36048 @ 0x8cd0 │ │ movteq lr, #36092 @ 0x8cfc │ │ ldc2l 6, cr11, [pc, #976] @ 24541c8 │ │ - ldc2l 5, cr0, [sp, #532] @ 0x214 │ │ + ldc2l 5, cr0, [sp, #712] @ 0x2c8 │ │ movteq lr, #36028 @ 0x8cbc │ │ movteq lr, #35960 @ 0x8c78 │ │ cmneq r0, #112, 2 │ │ ldc2l 6, cr11, [pc, #608] @ 245406c │ │ - ldc2l 5, cr0, [sp, #164] @ 0xa4 │ │ + ldc2l 5, cr0, [sp, #344] @ 0x158 │ │ movteq lr, #35936 @ 0x8c60 │ │ movteq lr, #35868 @ 0x8c1c │ │ movteq lr, #35892 @ 0x8c34 │ │ ldc2l 6, cr11, [pc, #256] @ 2453f20 │ │ - ldc2l 4, cr0, [sp, #836] @ 0x344 │ │ + ldc2l 4, cr0, [sp, #1016] @ 0x3f8 │ │ cmneq r0, #216, 8 @ 0xd8000000 │ │ cmneq r0, #224, 8 @ 0xe0000000 │ │ movteq lr, #35720 @ 0x8b88 │ │ - ldc2l 0, cr6, [lr, #552] @ 0x228 │ │ + ldc2l 0, cr6, [lr, #732] @ 0x2dc │ │ movteq lr, #35680 @ 0x8b60 │ │ ldr r0, [pc, #2000] @ 245460c │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #1996] @ 2454610 │ │ add r0, r0, r0, lsl #1 │ │ ldr r1, [pc, r1] │ │ add r0, r1, r0 │ │ @@ -1323207,15 +1323206,15 @@ │ │ ldr r2, [pc, #1332] @ 245454c │ │ add r2, pc, r2 │ │ str r1, [r2] │ │ b 2451198 │ │ movteq lr, #36392 @ 0x8e28 │ │ movteq lr, #35640 @ 0x8b38 │ │ ldc2l 5, cr11, [pc, #400] @ 24541c0 │ │ - ldc2l 3, cr0, [sp, #980] @ 0x3d4 │ │ + ldc2l 4, cr0, [sp, #136] @ 0x88 │ │ movteq lr, #36324 @ 0x8de4 │ │ ldr r0, [pc, #1588] @ 2454670 │ │ mov r1, #0 │ │ ldr r2, [pc, #1584] @ 2454674 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ strb r1, [r2] │ │ @@ -1323245,24 +1323244,24 @@ │ │ sub r4, fp, #72 @ 0x48 │ │ ldr r7, [pc, #1432] @ 245464c │ │ mov r1, #1 │ │ add r6, pc, r6 │ │ add r7, pc, r7 │ │ b 245412c │ │ cmneq r0, #132, 6 @ 0x10000002 │ │ - ldc2l 15, cr15, [fp, #180] @ 0xb4 │ │ - ldc2l 3, cr0, [sp, #420] @ 0x1a4 │ │ + ldc2l 15, cr15, [fp, #360] @ 0x168 │ │ + ldc2l 3, cr0, [sp, #600] @ 0x258 │ │ movteq lr, #35456 @ 0x8a80 │ │ cmneq r0, #36, 6 @ 0x90000000 │ │ movteq lr, #36156 @ 0x8d3c │ │ cmneq r0, #108, 6 @ 0xb0000001 │ │ movteq lr, #36076 @ 0x8cec │ │ - ldc2l 15, cr13, [ip, #688] @ 0x2b0 │ │ + ldc2l 15, cr13, [ip, #868] @ 0x364 │ │ cmneq r0, #84, 6 @ 0x50000001 │ │ - ldc2l 3, cr0, [sp, #4] │ │ + ldc2l 3, cr0, [sp, #184] @ 0xb8 │ │ add r0, r5, r1, lsl #3 │ │ vldr d17, [r8] │ │ vldr d16, [r0] │ │ mov r0, r4 │ │ vsub.f64 d16, d8, d16 │ │ vadd.f64 d16, d16, d17 │ │ vstr d16, [fp, #-72] @ 0xffffffb8 │ │ @@ -1323301,18 +1323300,18 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24540ec │ │ cmneq r0, #228, 4 @ 0x4000000e │ │ cmneq r0, #4, 6 @ 0x10000000 │ │ movteq lr, #35268 @ 0x89c4 │ │ movteq lr, #35252 @ 0x89b4 │ │ - ldc2l 14, cr15, [fp, #180] @ 0xb4 │ │ + ldc2l 14, cr15, [fp, #360] @ 0x168 │ │ cmneq r0, #36, 4 @ 0x40000002 │ │ eorseq r5, r0, r0, lsr #14 │ │ - ldc2l 13, cr8, [lr, #992] @ 0x3e0 │ │ + ldc2l 14, cr8, [lr, #148] @ 0x94 │ │ ldr r0, [pc, #840] @ 2454504 │ │ mov r1, #0 │ │ ldr r2, [pc, #836] @ 2454508 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ strb r1, [r2] │ │ mov r1, #52 @ 0x34 │ │ @@ -1323340,18 +1323339,18 @@ │ │ ldr r1, [sp, #72] @ 0x48 │ │ mov r0, r4 │ │ ldr r3, [fp, #32] │ │ mov r2, #1 │ │ bl 270d9f0 │ │ b 2452308 │ │ movteq lr, #35124 @ 0x8934 │ │ - ldc2l 6, cr7, [lr, #680] @ 0x2a8 │ │ + ldc2l 6, cr7, [lr, #860] @ 0x35c │ │ cmneq r0, #252, 2 @ 0x3f │ │ movteq lr, #35072 @ 0x8900 │ │ - ldc2l 9, cr15, [lr, #102] @ 0x66 @ │ │ + ldc2l 9, cr15, [lr, #192] @ 0xc0 @ │ │ movteq lr, #34992 @ 0x88b0 │ │ movteq lr, #35708 @ 0x8b7c │ │ movteq lr, #34948 @ 0x8884 │ │ ldr r0, [pc, #696] @ 245451c │ │ mov r1, #0 │ │ ldr r2, [pc, #692] @ 2454520 │ │ add r0, pc, r0 │ │ @@ -1323392,30 +1323391,30 @@ │ │ ldr r2, [pc, #584] @ 2454544 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ add r1, r2, r1, lsl #3 │ │ mov r2, #1 │ │ bl 270da60 │ │ b 2452308 │ │ - ldc2l 6, cr13, [lr, #116] @ 0x74 │ │ + ldc2l 6, cr13, [lr, #296] @ 0x128 │ │ cmneq r0, #212, 4 @ 0x4000000d │ │ - ldc2l 1, cr0, [sp, #276] @ 0x114 │ │ + ldc2l 1, cr0, [sp, #456] @ 0x1c8 │ │ ldr r6, [pc, #1056] @ 2454744 │ │ sub sl, fp, #72 @ 0x48 │ │ ldr r5, [pc, #1052] @ 2454748 │ │ mov r1, #1 │ │ add r6, pc, r6 │ │ add r5, pc, r5 │ │ b 2454398 │ │ movteq lr, #34876 @ 0x883c │ │ movteq lr, #34860 @ 0x882c │ │ - ldc2l 14, cr7, [lr, #452] @ 0x1c4 │ │ + ldc2l 14, cr7, [lr, #632] @ 0x278 │ │ movteq lr, #34812 @ 0x87fc │ │ cmneq r0, #28, 2 │ │ - ldc2l 5, cr7, [lr, #408] @ 0x198 │ │ + ldc2l 5, cr7, [lr, #588] @ 0x24c │ │ cmneq r0, #180 @ 0xb4 │ │ add r0, r7, r1, lsl #3 │ │ vldr d17, [r4] │ │ vldr d16, [r0] │ │ mov r0, sl │ │ vsub.f64 d16, d8, d16 │ │ vadd.f64 d16, d16, d17 │ │ @@ -1323460,15 +1323459,15 @@ │ │ ldr r1, [r0] │ │ ldr r0, [pc, #864] @ 2454770 │ │ str r1, [r2] │ │ add r0, pc, r0 │ │ b 2451198 │ │ movteq lr, #34672 @ 0x8770 │ │ movteq lr, #34644 @ 0x8754 │ │ - ldc2l 7, cr15, [lr, #540] @ 0x21c │ │ + ldc2l 7, cr15, [lr, #720] @ 0x2d0 │ │ ldr r0, [pc, #328] @ 2454574 │ │ mov r3, #3 │ │ ldr r1, [pc, #324] @ 2454578 │ │ ldr r2, [pc, #324] @ 245457c │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ str r3, [sp] │ │ @@ -1323489,20 +1323488,20 @@ │ │ ldr r1, [r5] │ │ ldr r0, [pc, #236] @ 2454570 │ │ str r1, [r2] │ │ add r0, pc, r0 │ │ b 2451198 │ │ movteq lr, #34560 @ 0x8700 │ │ movteq lr, #35276 @ 0x89cc │ │ - ldc2l 2, cr14, [ip, #72] @ 0x48 │ │ + ldc2l 2, cr14, [ip, #252] @ 0xfc │ │ eorseq r5, r0, ip, ror #8 │ │ eorseq r5, r0, r4, ror r4 │ │ - ldc2l 15, cr15, [ip, #532] @ 0x214 │ │ + ldc2l 15, cr15, [ip, #712] @ 0x2c8 │ │ cmneq r0, #8, 2 │ │ - ldc2l 1, cr6, [sp, #60] @ 0x3c │ │ + ldc2l 1, cr6, [sp, #240] @ 0xf0 │ │ ldr r0, [pc, #212] @ 2454588 │ │ mov r1, #0 │ │ ldr r2, [pc, #208] @ 245458c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ strb r1, [r2] │ │ mov r1, #48 @ 0x30 │ │ @@ -1323517,170 +1323516,170 @@ │ │ mov r0, r4 │ │ mov r1, r5 │ │ mov r2, #1 │ │ bl 270da90 │ │ b 24513d4 │ │ movteq lr, #34396 @ 0x865c │ │ movteq lr, #34380 @ 0x864c │ │ - ldc2l 7, cr3, [ip, #1012] @ 0x3f4 │ │ + vcadd.f32 d19, d12, d26, #270 │ │ movteq sp, #35252 @ 0x89b4 │ │ movteq sp, #35264 @ 0x89c0 │ │ - ldc2l 9, cr14, [lr, #486] @ 0x1e6 @ │ │ - ldc2l 2, cr15, [ip, #484] @ 0x1e4 │ │ - ldc2l 12, cr14, [ip, #692] @ 0x2b4 │ │ - ldc2l 6, cr5, [ip, #776] @ 0x308 │ │ + ldc2l 10, cr14, [lr, #128] @ 0x80 @ │ │ + ldc2l 2, cr15, [ip, #664] @ 0x298 │ │ + ldc2l 12, cr14, [ip, #872] @ 0x368 │ │ + ldc2l 6, cr5, [ip, #956] @ 0x3bc │ │ movteq sp, #35084 @ 0x890c │ │ - ldc2l 12, cr14, [ip, #228] @ 0xe4 │ │ + ldc2l 12, cr14, [ip, #408] @ 0x198 │ │ movteq sp, #35084 @ 0x890c │ │ msreq SPSR_fsxc, #4, 4 @ 0x40000000 │ │ movteq sp, #35048 @ 0x88e8 │ │ movteq sp, #35032 @ 0x88d8 │ │ ldc2l 2, cr10, [pc, #1008] @ 2454930 │ │ - ldc2l 1, cr15, [ip, #564] @ 0x234 │ │ - ldc2l 11, cr14, [ip, #804] @ 0x324 @ │ │ + ldc2l 1, cr15, [ip, #744] @ 0x2e8 │ │ + ldc2l 11, cr14, [ip, #984] @ 0x3d8 @ │ │ movteq sp, #35708 @ 0x8b7c │ │ - ldc2l 9, cr5, [lr, #446] @ 0x1be @ │ │ + ldc2l 10, cr5, [lr, #48] @ 0x30 @ │ │ movteq sp, #35688 @ 0x8b68 │ │ movteq lr, #34644 @ 0x8754 │ │ movteq lr, #34508 @ 0x86cc │ │ movteq lr, #34184 @ 0x8588 │ │ - ldc2l 5, cr15, [lr, #748] @ 0x2ec │ │ + ldc2l 5, cr15, [lr, #928] @ 0x3a0 │ │ movteq lr, #34108 @ 0x853c │ │ - ldc2l 5, cr15, [lr, #396] @ 0x18c │ │ + ldc2l 5, cr15, [lr, #576] @ 0x240 │ │ movteq lr, #34312 @ 0x8608 │ │ - ldc2l 6, cr15, [lr, #220] @ 0xdc │ │ - ldc2l 2, cr13, [ip, #340] @ 0x154 │ │ + ldc2l 6, cr15, [lr, #400] @ 0x190 │ │ + ldc2l 2, cr13, [ip, #520] @ 0x208 │ │ msreq SPSR_fsxc, #108 @ 0x6c │ │ - ldc2l 12, cr4, [lr, #484] @ 0x1e4 │ │ - ldc2l 0, cr9, [ip, #836] @ 0x344 │ │ + ldc2l 12, cr4, [lr, #664] @ 0x298 │ │ + ldc2l 0, cr9, [ip, #1016] @ 0x3f8 │ │ movteq sp, #34588 @ 0x871c │ │ - ldc2l 2, cr13, [ip, #436] @ 0x1b4 │ │ - ldc2l 12, cr14, [sp, #528] @ 0x210 │ │ + ldc2l 2, cr13, [ip, #616] @ 0x268 │ │ + ldc2l 12, cr14, [sp, #708] @ 0x2c4 │ │ movteq sp, #34492 @ 0x86bc │ │ - ldc2l 9, cr14, [ip, #466] @ 0x1d2 @ │ │ + ldc2l 10, cr14, [ip, #88] @ 0x58 @ │ │ msreq SPSR_fsxc, #220, 30 @ 0x370 │ │ movteq lr, #33456 @ 0x82b0 │ │ movteq sp, #36844 @ 0x8fec │ │ msreq SPSR_fsxc, #192, 16 @ 0xc00000 │ │ movteq sp, #36764 @ 0x8f9c │ │ ldc2l 9, cr10, [pc, #416] @ 2454750 @ │ │ - vcadd.f32 , q6, , #270 │ │ + vcadd.f32 d31, d28, d14, #270 │ │ movteq sp, #36760 @ 0x8f98 │ │ movteq sp, #36692 @ 0x8f54 │ │ msreq SPSR_fsxc, #120, 16 @ 0x780000 │ │ eorseq r4, r0, ip, lsl #26 │ │ ldc2l 9, cr10, [pc, #216] @ 24546a0 @ │ │ - ldc2l 7, cr15, [ip, #1012] @ 0x3f4 │ │ + vcadd.f32 d31, d12, d26, #270 │ │ movteq sp, #36660 @ 0x8f34 │ │ movteq sp, #36592 @ 0x8ef0 │ │ movteq sp, #36620 @ 0x8f0c │ │ ldc2l 9, cr10, [pc, #48] @ 245460c @ │ │ - ldc2l 7, cr15, [ip, #676] @ 0x2a4 │ │ - ldc2l 2, cr5, [lr, #936] @ 0x3a8 │ │ + ldc2l 7, cr15, [ip, #856] @ 0x358 │ │ + ldc2l 3, cr5, [lr, #92] @ 0x5c │ │ movteq sp, #36288 @ 0x8dc0 │ │ - vcadd.f32 q8, , q8, #270 │ │ - ldc2l 11, cr14, [lr, #332] @ 0x14c @ │ │ + vcadd.f32 d16, d31, d13, #270 │ │ + ldc2l 11, cr14, [lr, #512] @ 0x200 @ │ │ msreq SPSR_fsxc, #188, 14 @ 0x2f00000 │ │ movteq sp, #36512 @ 0x8ea0 │ │ movteq lr, #33132 @ 0x816c │ │ movteq sp, #36468 @ 0x8e74 │ │ ldc2l 8, cr10, [pc, #736] @ 24548e4 │ │ - ldc2l 7, cr15, [ip, #292] @ 0x124 │ │ + ldc2l 7, cr15, [ip, #472] @ 0x1d8 │ │ movteq sp, #36360 @ 0x8e08 │ │ movteq sp, #36332 @ 0x8dec │ │ movteq sp, #36224 @ 0x8d80 │ │ movteq sp, #36156 @ 0x8d3c │ │ ldc2l 7, cr10, [pc, #464] @ 24547ec │ │ - ldc2l 6, cr15, [ip, #20] │ │ + ldc2l 6, cr15, [ip, #200] @ 0xc8 │ │ msreq SPSR_fsxc, #40, 12 @ 0x2800000 │ │ mlaseq r0, ip, sl, r4 │ │ movteq sp, #36036 @ 0x8cc4 │ │ ldc2l 6, cr10, [pc, #976] @ 2454a00 │ │ - ldc2l 5, cr15, [ip, #532] @ 0x214 │ │ + ldc2l 5, cr15, [ip, #712] @ 0x2c8 │ │ eorseq r4, r0, ip, asr sl │ │ movteq sp, #35964 @ 0x8c7c │ │ ldc2l 6, cr10, [pc, #704] @ 2454900 │ │ - ldc2l 5, cr15, [ip, #260] @ 0x104 │ │ + ldc2l 5, cr15, [ip, #440] @ 0x1b8 │ │ msreq SPSR_fsxc, #64, 10 @ 0x10000000 │ │ movteq sp, #35900 @ 0x8c3c │ │ ldc2l 5, cr10, [pc, #160] @ 24546f0 │ │ - ldc2l 3, cr15, [ip, #740] @ 0x2e4 │ │ + ldc2l 3, cr15, [ip, #920] @ 0x398 │ │ movteq sp, #35416 @ 0x8a58 │ │ movteq sp, #35392 @ 0x8a40 │ │ movteq sp, #35360 @ 0x8a20 │ │ movteq sp, #35456 @ 0x8a80 │ │ eorseq r4, r0, r8, asr #19 │ │ movteq sp, #35816 @ 0x8be8 │ │ ldc2l 6, cr10, [pc, #96] @ 24546d0 │ │ - ldc2l 4, cr15, [ip, #676] @ 0x2a4 │ │ + ldc2l 4, cr15, [ip, #856] @ 0x358 │ │ eorseq r4, r0, r0, asr #15 │ │ movteq sp, #35636 @ 0x8b34 │ │ - ldc2l 14, cr14, [ip, #372] @ 0x174 │ │ - ldc2l 9, cr5, [ip, #108] @ 0x6c @ │ │ - ldc2l 11, cr14, [lr, #892] @ 0x37c @ │ │ + ldc2l 14, cr14, [ip, #552] @ 0x228 │ │ + ldc2l 9, cr5, [ip, #198] @ 0xc6 @ │ │ + ldc2l 12, cr14, [lr, #48] @ 0x30 │ │ movteq lr, #34672 @ 0x8770 │ │ movteq lr, #33968 @ 0x84b0 │ │ movteq lr, #33892 @ 0x8464 │ │ ldc2l 14, cr10, [pc, #624] @ 2454908 │ │ - ldc2l 13, cr15, [ip, #180] @ 0xb4 │ │ + ldc2l 13, cr15, [ip, #360] @ 0x168 │ │ movteq lr, #33892 @ 0x8464 │ │ movteq lr, #33824 @ 0x8420 │ │ msreq SPSR_fsxc, #68, 26 @ 0x1100 │ │ ldrsbteq r5, [r0], -r8 │ │ ldc2l 14, cr10, [pc, #224] @ 2454790 │ │ - ldc2l 12, cr15, [ip, #804] @ 0x324 │ │ + ldc2l 12, cr15, [ip, #984] @ 0x3d8 │ │ movteq lr, #33792 @ 0x8400 │ │ movteq lr, #33724 @ 0x83bc │ │ movteq lr, #33752 @ 0x83d8 │ │ ldc2l 13, cr10, [pc, #912] @ 2454a54 │ │ - ldc2l 12, cr15, [ip, #468] @ 0x1d4 │ │ - ldc2l 9, cr1, [ip, #436] @ 0x1b4 @ │ │ + ldc2l 12, cr15, [ip, #648] @ 0x288 │ │ + ldc2l 10, cr1, [ip, #28] @ │ │ movteq lr, #33404 @ 0x827c │ │ movteq lr, #33448 @ 0x82a8 │ │ movteq lr, #33380 @ 0x8264 │ │ ldc2l 12, cr10, [pc, #640] @ 245495c │ │ - ldc2l 11, cr15, [ip, #196] @ 0xc4 @ │ │ - ldc2l 5, cr15, [ip, #436] @ 0x1b4 │ │ - ldc2l 13, cr0, [pc, #560] @ 2454918 │ │ - ldc2l 6, cr15, [sp, #4] │ │ + ldc2l 11, cr15, [ip, #376] @ 0x178 @ │ │ + ldc2l 5, cr15, [ip, #616] @ 0x268 │ │ + ldc2l 13, cr0, [pc, #740] @ 24549cc │ │ + ldc2l 6, cr15, [sp, #184] @ 0xb8 │ │ msreq SPSR_fsxc, #136, 24 @ 0x8800 │ │ movteq lr, #33644 @ 0x836c │ │ movteq lr, #34360 @ 0x8638 │ │ movteq lr, #33600 @ 0x8340 │ │ ldc2l 13, cr10, [pc, #528] @ 2454910 │ │ - ldc2l 12, cr15, [ip, #84] @ 0x54 │ │ + ldc2l 12, cr15, [ip, #264] @ 0x108 │ │ movteq lr, #33484 @ 0x82cc │ │ movteq lr, #33456 @ 0x82b0 │ │ movteq lr, #33284 @ 0x8204 │ │ movteq lr, #33216 @ 0x81c0 │ │ ldc2l 11, cr10, [pc, #1008] @ 2454b08 @ │ │ - ldc2l 10, cr15, [ip, #564] @ 0x234 @ │ │ + ldc2l 10, cr15, [ip, #744] @ 0x2e8 @ │ │ msreq SPSR_fsxc, #176, 20 @ 0xb0000 │ │ eorseq r4, r0, r0, lsr pc │ │ movteq lr, #33112 @ 0x8158 │ │ ldc2l 11, cr10, [pc, #544] @ 245494c @ │ │ - ldc2l 10, cr15, [ip, #100] @ 0x64 @ │ │ + ldc2l 10, cr15, [ip, #280] @ 0x118 @ │ │ ldrshteq r4, [r0], -r0 │ │ movteq lr, #33040 @ 0x8110 │ │ ldc2l 11, cr10, [pc, #272] @ 245484c @ │ │ - ldc2l 9, cr15, [ip, #426] @ 0x1aa @ │ │ + ldc2l 10, cr15, [ip, #8] @ │ │ msreq SPSR_fsxc, #204, 18 @ 0x330000 │ │ movteq lr, #32972 @ 0x80cc │ │ ldc2l 2, cr10, [pc, #704] @ 2454a0c │ │ - ldc2l 1, cr15, [ip, #260] @ 0x104 │ │ + ldc2l 1, cr15, [ip, #440] @ 0x1b8 │ │ movteq sp, #34796 @ 0x87ec │ │ movteq sp, #34772 @ 0x87d4 │ │ movteq sp, #34740 @ 0x87b4 │ │ movteq sp, #34840 @ 0x8818 │ │ movteq lr, #32896 @ 0x8080 │ │ eorseq r4, r0, ip, ror #25 │ │ movteq lr, #32864 @ 0x8060 │ │ - ldc2l 3, cr15, [ip, #548] @ 0x224 │ │ - ldc2l 14, cr5, [ip, #392] @ 0x188 │ │ - ldc2l 13, cr14, [sp, #372] @ 0x174 │ │ + ldc2l 3, cr15, [ip, #728] @ 0x2d8 │ │ + ldc2l 14, cr5, [ip, #572] @ 0x23c │ │ + ldc2l 13, cr14, [sp, #552] @ 0x228 │ │ │ │ 02454774 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 2454790 │ │ @@ -1323696,16 +1323695,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #4 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 1, cr2, [pc, #584] @ 2454a18 │ │ - ldc2l 12, cr5, [pc, #708] @ 2454a98 │ │ + ldc2l 1, cr2, [pc, #764] @ 2454acc │ │ + ldc2l 12, cr5, [pc, #888] @ 2454b4c │ │ │ │ 024547d0 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #32 │ │ mov ip, r2 │ │ mov r2, r1 │ │ @@ -1324012,18 +1324011,18 @@ │ │ str r4, [r6] │ │ add r1, pc, r1 │ │ mov r3, #1 │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 3, cr2, [ip, #1004] @ 0x3ec │ │ - ldc2l 1, cr2, [ip, #684] @ 0x2ac │ │ - ldc2l 2, cr2, [ip, #204] @ 0xcc │ │ - ldc2l 1, cr2, [ip, #780] @ 0x30c │ │ + ldc2l 4, cr2, [ip, #160] @ 0xa0 │ │ + ldc2l 1, cr2, [ip, #864] @ 0x360 │ │ + ldc2l 2, cr2, [ip, #384] @ 0x180 │ │ + ldc2l 1, cr2, [ip, #960] @ 0x3c0 │ │ │ │ 02454c88 : │ │ push {fp, lr} │ │ mov fp, sp │ │ vpush {d8-d9} │ │ vldr d8, [r1] │ │ vldr d9, [r0] │ │ @@ -1324202,23 +1324201,23 @@ │ │ cmp r6, r0 │ │ addle r0, r4, r6 │ │ movle r1, #46 @ 0x2e │ │ strble r1, [r0, #-1] │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 0, cr2, [ip, #828] @ 0x33c │ │ - ldc2l 2, cr13, [lr, #168] @ 0xa8 │ │ - ldc2l 0, cr2, [ip, #572] @ 0x23c │ │ + ldc2l 0, cr2, [ip, #1008] @ 0x3f0 │ │ + ldc2l 2, cr13, [lr, #348] @ 0x15c │ │ + ldc2l 0, cr2, [ip, #752] @ 0x2f0 │ │ eorseq r3, r0, r4, asr #23 │ │ msreq SPSR_fsxc, #92, 16 @ 0x5c0000 │ │ - ldc2l 0, cr2, [ip, #284] @ 0x11c │ │ + ldc2l 0, cr2, [ip, #464] @ 0x1d0 │ │ eorseq r3, r0, r4, ror #22 │ │ eorseq r3, r0, ip, ror #21 │ │ - ldc2l 15, cr1, [ip, #284] @ 0x11c │ │ + ldc2l 15, cr1, [ip, #464] @ 0x1d0 │ │ │ │ 02454f84 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ mov r4, r0 │ │ bl 270ce10 │ │ @@ -1324238,15 +1324237,15 @@ │ │ bl 270f170 │ │ mov r0, r5 │ │ mov r1, #6 │ │ bl 270ce40 │ │ ldr r0, [sp, #4] │ │ sub sp, fp, #8 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 13, cr1, [lr, #164] @ 0xa4 │ │ + ldc2l 13, cr1, [lr, #344] @ 0x158 │ │ │ │ 02454fec : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #124 @ 0x7c │ │ mov r5, r3 │ │ mov r6, r2 │ │ @@ -1324432,22 +1324431,22 @@ │ │ ldr r2, [fp, #12] │ │ str r1, [r2] │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 11, cr1, [ip, #1020] @ 0x3fc @ │ │ - ldc2l 6, cr10, [ip, #764] @ 0x2fc │ │ + ldc2l 12, cr1, [ip, #176] @ 0xb0 │ │ + ldc2l 6, cr10, [ip, #944] @ 0x3b0 │ │ eorseq r3, r0, ip, lsl #18 │ │ - ldc2l 11, cr1, [ip, #860] @ 0x35c @ │ │ - ldc2l 4, cr10, [ip, #716] @ 0x2cc │ │ - ldc2l 13, cr1, [ip, #188] @ 0xbc │ │ + ldc2l 12, cr1, [ip, #16] │ │ + ldc2l 4, cr10, [ip, #896] @ 0x380 │ │ + ldc2l 13, cr1, [ip, #368] @ 0x170 │ │ eorseq r3, r0, r4, lsl r8 │ │ - ldc2l 4, cr10, [ip, #220] @ 0xdc │ │ + ldc2l 4, cr10, [ip, #400] @ 0x190 │ │ │ │ 02455308 : │ │ cmp r0, #1 │ │ ldreq r0, [pc, #32] @ 2455334 │ │ ldreq r0, [pc, r0] │ │ bxeq lr │ │ ldr r0, [pc, #16] @ 2455330 │ │ @@ -1324531,24 +1324530,24 @@ │ │ bl 270cdf0 │ │ ldr r0, [pc, #52] @ 2455470 │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r4 │ │ pop {r4, sl, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 6, cr2, [ip, #152] @ 0x98 │ │ - ldc2l 0, cr5, [pc, #192] @ 2455518 │ │ - ldc2l 10, cr13, [ip, #852] @ 0x354 @ │ │ - ldc2l 2, cr2, [ip, #488] @ 0x1e8 │ │ - ldc2l 5, cr13, [lr, #576] @ 0x240 │ │ - ldc2l 5, cr2, [ip, #936] @ 0x3a8 │ │ - ldc2l 13, cr5, [sp, #680] @ 0x2a8 │ │ - ldc2l 10, cr13, [ip, #612] @ 0x264 @ │ │ - ldc2l 2, cr2, [ip, #248] @ 0xf8 │ │ - ldc2l 15, cr5, [ip, #8] │ │ + ldc2l 6, cr2, [ip, #332] @ 0x14c │ │ + ldc2l 0, cr5, [pc, #372] @ 24555cc │ │ + ldc2l 11, cr13, [ip, #8] @ │ │ + ldc2l 2, cr2, [ip, #668] @ 0x29c │ │ + ldc2l 5, cr13, [lr, #756] @ 0x2f4 │ │ + ldc2l 6, cr2, [ip, #92] @ 0x5c │ │ + ldc2l 13, cr5, [sp, #860] @ 0x35c │ │ + ldc2l 10, cr13, [ip, #792] @ 0x318 @ │ │ + ldc2l 2, cr2, [ip, #428] @ 0x1ac │ │ + ldc2l 15, cr5, [ip, #188] @ 0xbc │ │ │ │ 02455474 : │ │ push {fp, lr} │ │ mov fp, sp │ │ bl 270db80 │ │ ldr r2, [pc, #12] @ 2455494 │ │ mov r1, #0 │ │ @@ -1324624,17 +1324623,17 @@ │ │ mov r0, #114 @ 0x72 │ │ add r1, pc, r1 │ │ bl 270d8c0 │ │ mov r0, #114 @ 0x72 │ │ pop {r4, r5, fp, pc} │ │ eoreq r5, lr, r0, lsr #29 │ │ mlaeq lr, r0, lr, r5 │ │ - ldc2l 1, cr2, [ip, #984] @ 0x3d8 │ │ - ldc2l 2, cr5, [pc, #488] @ 24557a4 │ │ - ldc2l 2, cr5, [pc, #600] @ 2455818 │ │ + ldc2l 2, cr2, [ip, #140] @ 0x8c │ │ + ldc2l 2, cr5, [pc, #668] @ 2455858 │ │ + ldc2l 2, cr5, [pc, #780] @ 24558cc │ │ │ │ 024555bc : │ │ push {fp, lr} │ │ mov fp, sp │ │ bl 270db80 │ │ ldr r2, [pc, #12] @ 24555dc │ │ mov r1, #0 │ │ @@ -1324916,29 +1324915,29 @@ │ │ b 2455710 │ │ nop {0} │ │ nop {0} │ │ andeq r0, r0, r1 │ │ andeq r0, r0, r2 │ │ andeq r0, r0, r3 │ │ andeq r0, r0, r4 │ │ - ldc2l 11, cr13, [sp, #400] @ 0x190 @ │ │ + ldc2l 11, cr13, [sp, #580] @ 0x244 @ │ │ eorseq r3, r0, r0, asr #6 │ │ eorseq r3, r0, ip, lsr #6 │ │ eorseq r3, r0, r8, lsl r3 │ │ eorseq r3, r0, r4, lsl #6 │ │ ldrshteq r3, [r0], -r0 │ │ - vcadd.f32 , q7, , #270 │ │ - ldc2l 7, cr13, [ip, #948] @ 0x3b4 │ │ - ldc2l 9, cr3, [lr, #346] @ 0x15a @ │ │ + ldc2l 8, cr11, [lr, #624] @ 0x270 │ │ + ldc2l 8, cr13, [ip, #104] @ 0x68 │ │ + ldc2l 9, cr3, [lr, #436] @ 0x1b4 @ │ │ ldc2l 12, cr10, [pc, #92] @ 2455ab8 │ │ - ldc2l 7, cr13, [ip, #452] @ 0x1c4 │ │ - ldc2l 0, cr5, [pc, #648] @ 2455cec │ │ + ldc2l 7, cr13, [ip, #632] @ 0x278 │ │ + ldc2l 0, cr5, [pc, #828] @ 2455da0 │ │ eorseq r3, r0, r4, ror #3 │ │ ldrsbteq r3, [r0], -r0 │ │ - ldc2l 10, cr13, [sp, #368] @ 0x170 @ │ │ + ldc2l 10, cr13, [sp, #548] @ 0x224 @ │ │ │ │ 02455a6c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ sub sp, sp, #864 @ 0x360 │ │ @@ -1325502,51 +1325501,51 @@ │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ add r0, sp, #40 @ 0x28 │ │ sub r4, r4, #1 │ │ b 245624c │ │ - ldc2l 10, cr7, [sp, #880] @ 0x370 @ │ │ + ldc2l 11, cr7, [sp, #36] @ 0x24 @ │ │ cmneq pc, #84, 22 @ 0x15000 │ │ eorseq r2, r0, r0, lsr #29 │ │ eorseq r2, r0, ip, lsl #29 │ │ eorseq r2, r0, r8, ror lr │ │ eorseq r2, r0, r4, ror #28 │ │ - ldc2l 5, cr13, [fp, #96] @ 0x60 │ │ - ldc2l 3, cr13, [ip, #356] @ 0x164 │ │ + ldc2l 5, cr13, [fp, #276] @ 0x114 │ │ + ldc2l 3, cr13, [ip, #536] @ 0x218 │ │ cmneq pc, #136, 20 @ 0x88000 │ │ eorseq r2, r0, r0, lsl #28 │ │ - ldc2l 7, cr15, [fp, #284] @ 0x11c │ │ + ldc2l 7, cr15, [fp, #464] @ 0x1d0 │ │ eorseq r2, r0, r0, asr #27 │ │ eorseq r2, r0, ip, lsr #27 │ │ - ldc2l 14, cr6, [lr, #1004] @ 0x3ec │ │ - ldc2l 3, cr11, [lr, #172] @ 0xac │ │ - ldc2l 11, cr6, [lr, #684] @ 0x2ac @ │ │ - ldc2l 15, cr10, [lr, #876] @ 0x36c │ │ - vcadd.f32 q11, q7, , #270 │ │ - ldc2l 12, cr10, [lr, #604] @ 0x25c │ │ - vcadd.f32 q11, q15, , #270 │ │ - ldc2l 12, cr10, [lr, #988] @ 0x3dc │ │ - ldc2l 8, cr6, [lr, #588] @ 0x24c │ │ - ldc2l 12, cr10, [lr, #780] @ 0x30c │ │ - ldc2l 10, cr6, [lr, #892] @ 0x37c @ │ │ - ldc2l 15, cr10, [lr, #60] @ 0x3c │ │ - ldc2l 10, cr6, [lr, #620] @ 0x26c @ │ │ - ldc2l 14, cr10, [lr, #812] @ 0x32c │ │ - ldc2l 10, cr6, [lr, #364] @ 0x16c @ │ │ - ldc2l 14, cr10, [lr, #556] @ 0x22c │ │ - ldc2l 10, cr6, [lr, #108] @ 0x6c @ │ │ - ldc2l 14, cr10, [lr, #300] @ 0x12c │ │ - ldc2l 9, cr6, [lr, #198] @ 0xc6 @ │ │ - ldc2l 13, cr10, [lr, #588] @ 0x24c │ │ - ldc2l 10, cr1, [ip, #732] @ 0x2dc @ │ │ - ldc2l 15, cr12, [ip, #420] @ 0x1a4 │ │ - ldc2l 7, cr9, [ip, #648] @ 0x288 │ │ - ldc2l 3, cr7, [sp, #32] │ │ + ldc2l 15, cr6, [lr, #160] @ 0xa0 │ │ + ldc2l 3, cr11, [lr, #352] @ 0x160 │ │ + ldc2l 11, cr6, [lr, #864] @ 0x360 @ │ │ + ldc2l 0, cr11, [lr, #32] │ │ + ldc2l 8, cr6, [lr, #592] @ 0x250 │ │ + ldc2l 12, cr10, [lr, #784] @ 0x310 │ │ + ldc2l 8, cr6, [lr, #976] @ 0x3d0 │ │ + ldc2l 13, cr10, [lr, #144] @ 0x90 │ │ + vcadd.f32 q11, q15, q0, #270 │ │ + ldc2l 12, cr10, [lr, #960] @ 0x3c0 │ │ + ldc2l 11, cr6, [lr, #48] @ 0x30 @ │ │ + ldc2l 15, cr10, [lr, #240] @ 0xf0 │ │ + ldc2l 10, cr6, [lr, #800] @ 0x320 @ │ │ + ldc2l 14, cr10, [lr, #992] @ 0x3e0 │ │ + ldc2l 10, cr6, [lr, #544] @ 0x220 @ │ │ + ldc2l 14, cr10, [lr, #736] @ 0x2e0 │ │ + ldc2l 10, cr6, [lr, #288] @ 0x120 @ │ │ + ldc2l 14, cr10, [lr, #480] @ 0x1e0 │ │ + ldc2l 9, cr6, [lr, #288] @ 0x120 @ │ │ + ldc2l 13, cr10, [lr, #768] @ 0x300 │ │ + ldc2l 10, cr1, [ip, #912] @ 0x390 @ │ │ + ldc2l 15, cr12, [ip, #600] @ 0x258 │ │ + ldc2l 7, cr9, [ip, #828] @ 0x33c │ │ + ldc2l 3, cr7, [sp, #212] @ 0xd4 │ │ │ │ 024563e4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #180 @ 0xb4 │ │ mov sl, r3 │ │ mov r8, r2 │ │ @@ -1325896,55 +1325895,55 @@ │ │ eorseq r2, r0, r0, ror r5 │ │ cmneq pc, #224, 2 @ 0x38 │ │ cmneq pc, #48, 4 │ │ cmneq pc, #32, 4 │ │ cmneq pc, #164, 2 @ 0x29 │ │ eorseq r2, r0, ip, lsl r5 │ │ cmneq pc, #208, 2 @ 0x34 │ │ - ldc2l 1, cr5, [sp, #560] @ 0x230 │ │ - ldc2l 4, cr3, [ip, #820] @ 0x334 │ │ - ldc2l 9, cr12, [ip, #434] @ 0x1b2 @ │ │ - ldc2l 12, cr6, [lr, #628] @ 0x274 │ │ - ldc2l 0, cr9, [ip, #124] @ 0x7c │ │ - ldc2l 2, cr0, [pc, #188] @ 2456a48 │ │ + ldc2l 1, cr5, [sp, #740] @ 0x2e4 │ │ + ldc2l 4, cr3, [ip, #1000] @ 0x3e8 │ │ + ldc2l 10, cr12, [ip, #24] @ │ │ + ldc2l 12, cr6, [lr, #808] @ 0x328 │ │ + ldc2l 0, cr9, [ip, #304] @ 0x130 │ │ + ldc2l 2, cr0, [pc, #368] @ 2456afc │ │ cmneq pc, #24, 30 @ 0x60 │ │ - ldc2l 1, cr5, [sp, #208] @ 0xd0 │ │ + ldc2l 1, cr5, [sp, #388] @ 0x184 │ │ cmneq pc, #240 @ 0xf0 │ │ - ldc2l 15, cr4, [sp, #480] @ 0x1e0 │ │ + ldc2l 15, cr4, [sp, #660] @ 0x294 │ │ cmneq pc, #124 @ 0x7c │ │ cmneq pc, #108 @ 0x6c │ │ cmneq pc, #12 │ │ cmneq pc, #224, 30 @ 0x380 │ │ eorseq r2, r0, r8, asr r3 │ │ cmneq pc, #188, 30 @ 0x2f0 │ │ eorseq r2, r0, ip, ror r2 │ │ eorseq r2, r0, r4, ror #8 │ │ cmneq pc, #12, 2 │ │ - ldc2l 0, cr3, [sp, #524] @ 0x20c │ │ - ldc2l 9, cr12, [ip, #82] @ 0x52 @ │ │ + ldc2l 0, cr3, [sp, #704] @ 0x2c0 │ │ + ldc2l 9, cr12, [ip, #172] @ 0xac @ │ │ cmneq pc, #216 @ 0xd8 │ │ ldrshteq r2, [r0], -r4 │ │ - ldc2l 13, cr10, [sp, #884] @ 0x374 │ │ + ldc2l 14, cr10, [sp, #40] @ 0x28 │ │ cmneq pc, #48, 30 @ 0xc0 │ │ cmneq pc, #216, 28 @ 0xd80 │ │ - ldc2l 1, cr0, [pc, #812] @ 2456d0c │ │ - ldc2l 14, cr2, [sp, #940] @ 0x3ac │ │ - ldc2l 15, cr8, [ip, #492] @ 0x1ec │ │ + ldc2l 1, cr0, [pc, #992] @ 2456dc0 │ │ + ldc2l 15, cr2, [sp, #96] @ 0x60 │ │ + ldc2l 15, cr8, [ip, #672] @ 0x2a0 │ │ cmneq pc, #144, 28 @ 0x900 │ │ - ldc2l 14, cr8, [ip, #300] @ 0x12c │ │ - ldc2l 0, cr0, [pc, #364] @ 2456b60 │ │ + ldc2l 14, cr8, [ip, #480] @ 0x1e0 │ │ + ldc2l 0, cr0, [pc, #544] @ 2456c14 │ │ cmneq pc, #36, 28 @ 0x240 │ │ cmneq pc, #12, 28 @ 0xc0 │ │ - ldc2l 1, cr3, [ip, #116] @ 0x74 │ │ - ldc2l 6, cr12, [ip, #164] @ 0xa4 │ │ - ldc2l 8, cr6, [lr, #964] @ 0x3c4 │ │ - ldc2l 13, cr4, [sp, #576] @ 0x240 │ │ - ldc2l 13, cr8, [ip, #972] @ 0x3cc │ │ - ldc2l 0, cr0, [pc, #12] @ 2456a20 │ │ - ldc2l 13, cr4, [sp] │ │ + ldc2l 1, cr3, [ip, #296] @ 0x128 │ │ + ldc2l 6, cr12, [ip, #344] @ 0x158 │ │ + ldc2l 9, cr6, [lr, #60] @ 0x3c @ │ │ + ldc2l 13, cr4, [sp, #756] @ 0x2f4 │ │ + ldc2l 14, cr8, [ip, #128] @ 0x80 │ │ + ldc2l 0, cr0, [pc, #192] @ 2456ad4 │ │ + ldc2l 13, cr4, [sp, #180] @ 0xb4 │ │ │ │ 02456a14 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ mov r4, r1 │ │ ldr r1, [fp, #8] │ │ @@ -1326015,15 +1326014,15 @@ │ │ mov r3, #1 │ │ add r1, pc, r1 │ │ sub r2, r2, r5 │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 2, cr0, [ip, #892] @ 0x37c │ │ + ldc2l 3, cr0, [ip, #48] @ 0x30 │ │ │ │ 02456b48 : │ │ push {fp, lr} │ │ mov fp, sp │ │ mov r4, r1 │ │ ldr r1, [pc, #72] @ 2456ba4 │ │ ldr r5, [pc, #72] @ 2456ba8 │ │ @@ -1326041,15 +1326040,15 @@ │ │ bl 270d170 │ │ ldr r0, [r5] │ │ bl 270b3f0 │ │ mov r0, #6 │ │ mov r1, #0 │ │ bl 270f260 │ │ bl 2707f50 │ │ - ldc2l 1, cr6, [ip, #972] @ 0x3cc │ │ + ldc2l 2, cr6, [ip, #128] @ 0x80 │ │ eoreq r1, lr, r4, ror #3 │ │ │ │ 02456bac : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r6, r0 │ │ ldr r0, [pc, #192] @ 2456c80 │ │ @@ -1326107,15 +1326106,15 @@ │ │ cmneq pc, #156, 20 @ 0x9c000 │ │ eorseq r1, r0, r4, lsl #28 │ │ ldrhteq r1, [r0], -r4 │ │ eorseq r1, r0, r8, lsl #27 │ │ cmneq pc, #80, 20 @ 0x50000 │ │ cmneq pc, #56, 20 @ 0x38000 │ │ cmneq pc, #32, 20 @ 0x20000 │ │ - ldc2l 10, cr10, [ip, #448] @ 0x1c0 @ │ │ + ldc2l 10, cr10, [ip, #628] @ 0x274 @ │ │ │ │ 02456ca8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #428 @ 0x1ac │ │ sub sp, sp, #4096 @ 0x1000 │ │ ldr r2, [pc, #3148] @ 245790c │ │ @@ -1326905,67 +1326904,67 @@ │ │ mov r3, #80 @ 0x50 │ │ bl 270f280 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ cmneq pc, #192, 18 @ 0x300000 │ │ cmneq pc, #168, 18 @ 0x2a0000 │ │ - ldc2l 10, cr0, [sp, #88] @ 0x58 @ │ │ + ldc2l 10, cr0, [sp, #268] @ 0x10c @ │ │ eorseq r1, r0, r8, lsr #28 │ │ - ldc2l 8, cr2, [ip, #884] @ 0x374 │ │ - ldc2l 6, cr12, [ip, #888] @ 0x378 │ │ - ldc2l 9, cr10, [ip, #136] @ 0x88 @ │ │ - ldc2l 5, cr4, [ip, #384] @ 0x180 │ │ - ldc2l 15, cr9, [lr, #340] @ 0x154 │ │ - ldc2l 8, cr4, [sp, #108] @ 0x6c │ │ - ldc2l 9, cr15, [lr, #430] @ 0x1ae @ │ │ - ldc2l 3, cr8, [sp, #948] @ 0x3b4 │ │ - ldc2l 15, cr15, [fp, #428] @ 0x1ac │ │ - ldc2l 9, cr14, [ip, #100] @ 0x64 @ │ │ + ldc2l 9, cr2, [ip, #20] @ │ │ + ldc2l 7, cr12, [ip, #44] @ 0x2c │ │ + ldc2l 9, cr10, [ip, #226] @ 0xe2 @ │ │ + ldc2l 5, cr4, [ip, #564] @ 0x234 │ │ + ldc2l 15, cr9, [lr, #520] @ 0x208 │ │ + vcadd.f32 q10, , q4, #270 │ │ + ldc2l 10, cr15, [lr, #16] @ │ │ + ldc2l 4, cr8, [sp, #104] @ 0x68 │ │ + ldc2l 15, cr15, [fp, #608] @ 0x260 │ │ + ldc2l 9, cr14, [ip, #190] @ 0xbe @ │ │ ldc2l 12, cr5, [pc, #356] @ 2457ab0 │ │ - ldc2l 5, cr12, [ip, #552] @ 0x228 │ │ - ldc2l 7, cr10, [ip, #960] @ 0x3c0 │ │ + ldc2l 5, cr12, [ip, #732] @ 0x2dc │ │ + ldc2l 8, cr10, [ip, #116] @ 0x74 │ │ eorseq r1, r0, r4, lsl ip │ │ - ldc2l 6, cr2, [ip, #868] @ 0x364 │ │ - ldc2l 6, cr2, [ip, #516] @ 0x204 │ │ - ldc2l 3, cr4, [ip, #368] @ 0x170 │ │ - ldc2l 13, cr9, [lr, #180] @ 0xb4 │ │ - ldc2l 7, cr15, [lr, #540] @ 0x21c │ │ - ldc2l 13, cr11, [fp, #544] @ 0x220 │ │ - ldc2l 5, cr4, [sp, #908] @ 0x38c │ │ - ldc2l 13, cr15, [fp, #156] @ 0x9c │ │ + ldc2l 7, cr2, [ip, #24] │ │ + ldc2l 6, cr2, [ip, #696] @ 0x2b8 │ │ + ldc2l 3, cr4, [ip, #548] @ 0x224 │ │ + ldc2l 13, cr9, [lr, #360] @ 0x168 │ │ + ldc2l 7, cr15, [lr, #720] @ 0x2d0 │ │ + ldc2l 13, cr11, [fp, #724] @ 0x2d4 │ │ + ldc2l 6, cr4, [sp, #64] @ 0x40 │ │ + ldc2l 13, cr15, [fp, #336] @ 0x150 │ │ cmneq pc, #128, 10 @ 0x20000000 │ │ - ldc2l 5, cr10, [ip, #736] @ 0x2e0 │ │ - ldc2l 6, cr3, [pc, #860] @ 2457ce0 │ │ + ldc2l 5, cr10, [ip, #916] @ 0x394 │ │ + ldc2l 7, cr3, [pc, #16] @ 2457994 │ │ eorseq r1, r0, r0, ror #19 │ │ - ldc2l 4, cr2, [ip, #468] @ 0x1d4 │ │ - ldc2l 0, cr4, [ip, #832] @ 0x340 │ │ - ldc2l 15, cr3, [lr, #160] @ 0xa0 │ │ + ldc2l 4, cr2, [ip, #648] @ 0x288 │ │ + ldc2l 0, cr4, [ip, #1012] @ 0x3f4 │ │ + ldc2l 15, cr3, [lr, #340] @ 0x154 │ │ eorseq r1, r0, ip, asr #16 │ │ - ldc2l 4, cr2, [ip, #356] @ 0x164 │ │ - ldc2l 1, cr4, [ip, #192] @ 0xc0 │ │ - ldc2l 10, cr15, [fp, #812] @ 0x32c @ │ │ - ldc2l 10, cr9, [lr, #36] @ 0x24 @ │ │ - ldc2l 10, cr15, [fp, #444] @ 0x1bc @ │ │ - ldc2l 10, cr15, [fp, #220] @ 0xdc @ │ │ - vcadd.f32 d31, d11, d19, #270 │ │ - ldc2l 7, cr15, [fp, #940] @ 0x3ac │ │ - ldc2l 0, cr4, [sp, #44] @ 0x2c │ │ - ldc2l 6, cr15, [sp, #448] @ 0x1c0 │ │ - ldc2l 7, cr15, [fp, #476] @ 0x1dc │ │ + ldc2l 4, cr2, [ip, #536] @ 0x218 │ │ + ldc2l 1, cr4, [ip, #372] @ 0x174 │ │ + ldc2l 10, cr15, [fp, #992] @ 0x3e0 @ │ │ + ldc2l 10, cr9, [lr, #216] @ 0xd8 @ │ │ + ldc2l 10, cr15, [fp, #624] @ 0x270 @ │ │ + ldc2l 10, cr15, [fp, #400] @ 0x190 @ │ │ + ldc2l 8, cr15, [fp, #320] @ 0x140 │ │ + ldc2l 8, cr15, [fp, #96] @ 0x60 │ │ + ldc2l 0, cr4, [sp, #224] @ 0xe0 │ │ + ldc2l 6, cr15, [sp, #628] @ 0x274 │ │ + ldc2l 7, cr15, [fp, #656] @ 0x290 │ │ cmneq pc, #252, 30 @ 0x3f0 │ │ - ldc2l 15, cr3, [sp, #68] @ 0x44 │ │ + ldc2l 15, cr3, [sp, #248] @ 0xf8 │ │ eorseq r1, r0, r4, lsl #8 │ │ - ldc2l 14, cr3, [sp, #676] @ 0x2a4 │ │ + ldc2l 14, cr3, [sp, #856] @ 0x358 │ │ ldrsbteq r1, [r0], -ip │ │ - ldc2l 6, cr15, [fp, #28] │ │ - ldc2l 5, cr15, [fp, #828] @ 0x33c │ │ - ldc2l 15, cr14, [lr, #812] @ 0x32c │ │ + ldc2l 6, cr15, [fp, #208] @ 0xd0 │ │ + ldc2l 5, cr15, [fp, #1008] @ 0x3f0 │ │ + ldc2l 15, cr14, [lr, #992] @ 0x3e0 │ │ eorseq r1, r0, r4, lsl #3 │ │ - ldc2l 5, cr15, [fp, #188] @ 0xbc │ │ + ldc2l 5, cr15, [fp, #368] @ 0x170 │ │ cmneq pc, #148, 26 @ 0x2500 │ │ │ │ 024579ec : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ str r2, [sp, #16] │ │ @@ -1327088,17 +1327087,17 @@ │ │ ldr r0, [sp, #4] │ │ ldr r2, [fp, #20] │ │ add r1, pc, r1 │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 3, cr15, [fp, #972] @ 0x3cc │ │ - ldc2l 2, cr15, [fp, #748] @ 0x2ec │ │ - ldc2l 2, cr15, [fp, #220] @ 0xdc │ │ + ldc2l 4, cr15, [fp, #128] @ 0x80 │ │ + ldc2l 2, cr15, [fp, #928] @ 0x3a0 │ │ + ldc2l 2, cr15, [fp, #400] @ 0x190 │ │ │ │ 02457bf4 : │ │ push {fp, lr} │ │ mov fp, sp │ │ mov r3, r2 │ │ cmp r0, #1 │ │ bne 2457c24 │ │ @@ -1327318,35 +1327317,35 @@ │ │ b 2457f50 │ │ ldr r0, [pc, #80] @ 2457fa0 │ │ add r0, pc, r0 │ │ ldrb r0, [r0] │ │ eor r0, r0, #1 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 10, cr14, [lr, #300] @ 0x12c @ │ │ - ldc2l 5, cr2, [pc, #356] @ 24580d0 │ │ + ldc2l 10, cr14, [lr, #480] @ 0x1e0 @ │ │ + ldc2l 5, cr2, [pc, #536] @ 2458184 │ │ cmneq pc, #140, 16 @ 0x8c0000 │ │ cmneq pc, #116, 16 @ 0x740000 │ │ cmneq pc, #96, 16 @ 0x600000 │ │ cmneq pc, #76, 16 @ 0x4c0000 │ │ cmneq pc, #56, 16 @ 0x380000 │ │ - ldc2l 9, cr1, [ip, #106] @ 0x6a @ │ │ + ldc2l 9, cr1, [ip, #196] @ 0xc4 @ │ │ cmneq pc, #192, 14 @ 0x3000000 │ │ - ldc2l 6, cr3, [ip, #224] @ 0xe0 │ │ + ldc2l 6, cr3, [ip, #404] @ 0x194 │ │ cmneq pc, #184, 14 @ 0x2e00000 │ │ - ldc2l 0, cr9, [lr, #180] @ 0xb4 │ │ + ldc2l 0, cr9, [lr, #360] @ 0x168 │ │ cmneq pc, #176, 14 @ 0x2c00000 │ │ - ldc2l 8, cr3, [sp, #972] @ 0x3cc │ │ + ldc2l 9, cr3, [sp, #64] @ 0x40 @ │ │ cmneq pc, #168, 14 @ 0x2a00000 │ │ - ldc2l 10, cr14, [lr, #700] @ 0x2bc @ │ │ + ldc2l 10, cr14, [lr, #880] @ 0x370 @ │ │ cmneq pc, #160, 14 @ 0x2800000 │ │ - vcadd.f32 , , q1, #270 │ │ - ldc2l 0, cr15, [fp, #284] @ 0x11c │ │ + vcadd.f32 , , , #270 │ │ + ldc2l 0, cr15, [fp, #464] @ 0x1d0 │ │ eorseq r0, r0, r8, asr lr │ │ - ldc2l 6, cr11, [ip, #544] @ 0x220 │ │ + ldc2l 6, cr11, [ip, #724] @ 0x2d4 │ │ │ │ 02457fb4 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #256 @ 0x100 │ │ add r4, sp, #1 │ │ mov r1, #255 @ 0xff │ │ @@ -1327363,16 +1327362,16 @@ │ │ mov r2, #255 @ 0xff │ │ mov r3, #17 │ │ add r1, pc, r1 │ │ bl 270f280 │ │ mov r0, #0 │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 9, cr14, [lr, #174] @ 0xae @ │ │ - ldc2l 4, cr2, [pc, #404] @ 24581ac │ │ + ldc2l 9, cr14, [lr, #264] @ 0x108 @ │ │ + ldc2l 4, cr2, [pc, #584] @ 2458260 │ │ │ │ 02458014 : │ │ ldr r0, [r0] │ │ ldr ip, [pc, #120] @ 2458098 │ │ clz r0, r0 │ │ add ip, pc, ip │ │ lsr r0, r0, #5 │ │ @@ -1327505,17 +1327504,17 @@ │ │ add r1, pc, r1 │ │ mov r2, r6 │ │ mov r3, #1 │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 13, cr14, [fp, #44] @ 0x2c │ │ - ldc2l 12, cr14, [fp, #428] @ 0x1ac │ │ - ldc2l 11, cr14, [fp, #1004] @ 0x3ec @ │ │ + ldc2l 13, cr14, [fp, #224] @ 0xe0 │ │ + ldc2l 12, cr14, [fp, #608] @ 0x260 │ │ + ldc2l 12, cr14, [fp, #160] @ 0xa0 │ │ │ │ 02458238 : │ │ push {fp, lr} │ │ mov fp, sp │ │ mov r2, r1 │ │ ldr r1, [pc, #32] @ 245826c │ │ mov r3, #7 │ │ @@ -1327523,15 +1327522,15 @@ │ │ bl 270d890 │ │ cmp r0, #0 │ │ bne 2458264 │ │ mov r0, #1 │ │ bl 2704930 │ │ mov r0, #0 │ │ bl 2704930 │ │ - ldc2l 1, cr9, [sp, #416] @ 0x1a0 │ │ + ldc2l 1, cr9, [sp, #596] @ 0x254 │ │ │ │ 02458270 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ cmp r0, #0 │ │ beq 24582a4 │ │ ldrb r1, [r0] │ │ @@ -1327572,24 +1327571,24 @@ │ │ bl 270cdf0 │ │ ldr r0, [pc, #52] @ 245834c │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r4 │ │ pop {r4, sl, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 15, cr6, [lr, #304] @ 0x130 │ │ - ldc2l 1, cr2, [pc, #336] @ 2458484 │ │ - ldc2l 11, cr10, [ip, #996] @ 0x3e4 @ │ │ - ldc2l 3, cr15, [fp, #632] @ 0x278 │ │ - ldc2l 6, cr10, [lr, #720] @ 0x2d0 │ │ - ldc2l 15, cr6, [lr, #64] @ 0x40 │ │ - ldc2l 14, cr2, [sp, #824] @ 0x338 │ │ - ldc2l 11, cr10, [ip, #756] @ 0x2f4 @ │ │ - ldc2l 3, cr15, [fp, #392] @ 0x188 │ │ - ldc2l 0, cr3, [ip, #152] @ 0x98 │ │ + ldc2l 15, cr6, [lr, #484] @ 0x1e4 │ │ + ldc2l 1, cr2, [pc, #516] @ 2458538 │ │ + ldc2l 12, cr10, [ip, #152] @ 0x98 │ │ + ldc2l 3, cr15, [fp, #812] @ 0x32c │ │ + ldc2l 6, cr10, [lr, #900] @ 0x384 │ │ + ldc2l 15, cr6, [lr, #244] @ 0xf4 │ │ + ldc2l 14, cr2, [sp, #1004] @ 0x3ec │ │ + ldc2l 11, cr10, [ip, #936] @ 0x3a8 @ │ │ + ldc2l 3, cr15, [fp, #572] @ 0x23c │ │ + ldc2l 0, cr3, [ip, #332] @ 0x14c │ │ │ │ 02458350 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r5, r1 │ │ mov r6, r0 │ │ @@ -1327661,24 +1327660,24 @@ │ │ ldr r0, [pc, #56] @ 24584a8 │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, r4 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 14, cr10, [fp, #240] @ 0xf0 │ │ - ldc2l 8, cr4, [lr, #596] @ 0x254 │ │ - ldc2l 10, cr10, [ip, #660] @ 0x294 @ │ │ - ldc2l 15, cr12, [ip, #924] @ 0x39c │ │ - ldc2l 10, cr12, [fp, #64] @ 0x40 @ │ │ - ldc2l 10, cr10, [ip, #468] @ 0x1d4 @ │ │ - ldc2l 3, cr1, [ip, #1020] @ 0x3fc │ │ - ldc2l 10, cr10, [ip, #868] @ 0x364 @ │ │ - ldc2l 5, cr0, [pc, #504] @ 24586a4 │ │ - ldc2l 13, cr10, [fp, #288] @ 0x120 │ │ + ldc2l 14, cr10, [fp, #420] @ 0x1a4 │ │ + vcadd.f32 q10, q15, q1, #270 │ │ + ldc2l 10, cr10, [ip, #840] @ 0x348 @ │ │ + ldc2l 0, cr13, [ip, #80] @ 0x50 │ │ + ldc2l 10, cr12, [fp, #244] @ 0xf4 @ │ │ + ldc2l 10, cr10, [ip, #648] @ 0x288 @ │ │ + ldc2l 4, cr1, [ip, #176] @ 0xb0 │ │ + ldc2l 11, cr10, [ip, #24] @ │ │ + ldc2l 5, cr0, [pc, #684] @ 2458758 │ │ + ldc2l 13, cr10, [fp, #468] @ 0x1d4 │ │ │ │ 024584ac : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r5, r0 │ │ bl 270ce10 │ │ mov r4, #0 │ │ @@ -1327740,24 +1327739,24 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #52] @ 24585dc │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, r4 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 8, cr14, [sp, #340] @ 0x154 │ │ - ldc2l 7, cr4, [lr, #372] @ 0x174 │ │ - ldc2l 9, cr10, [ip, #218] @ 0xda @ │ │ - ldc2l 14, cr12, [ip, #700] @ 0x2bc │ │ - ldc2l 8, cr12, [fp, #864] @ 0x360 │ │ - ldc2l 9, cr10, [ip, #122] @ 0x7a @ │ │ - ldc2l 2, cr1, [ip, #796] @ 0x31c │ │ - ldc2l 9, cr10, [ip, #322] @ 0x142 @ │ │ - ldc2l 4, cr0, [pc, #280] @ 24586f8 │ │ - ldc2l 7, cr14, [sp, #532] @ 0x214 │ │ + vcadd.f32 d30, d29, d2, #270 │ │ + ldc2l 7, cr4, [lr, #552] @ 0x228 │ │ + ldc2l 9, cr10, [ip, #308] @ 0x134 @ │ │ + ldc2l 14, cr12, [ip, #880] @ 0x370 │ │ + ldc2l 9, cr12, [fp, #10] @ │ │ + ldc2l 9, cr10, [ip, #212] @ 0xd4 @ │ │ + ldc2l 2, cr1, [ip, #976] @ 0x3d0 │ │ + ldc2l 9, cr10, [ip, #412] @ 0x19c @ │ │ + ldc2l 4, cr0, [pc, #460] @ 24587ac │ │ + ldc2l 7, cr14, [sp, #712] @ 0x2c8 │ │ │ │ 024585e0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ sub sp, sp, #192 @ 0xc0 │ │ @@ -1328758,38 +1328757,38 @@ │ │ ldr r0, [pc, #4068] @ 245a568 │ │ movw r3, #1190 @ 0x4a6 │ │ ldr r2, [pc, #4064] @ 245a56c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ b 2459498 │ │ - vcadd.f32 q14, , q9, #270 │ │ + ldc2l 9, cr12, [sp, #30] @ │ │ cmneq pc, #176 @ 0xb0 │ │ cmneq pc, #156 @ 0x9c │ │ cmneq r2, #224, 26 @ 0x3800 │ │ @ instruction: 0x03b8fe70 │ │ cmneq pc, #88 @ 0x58 │ │ cmneq r0, #188, 16 @ 0xbc0000 @ │ │ biceq ip, r5, #92, 30 @ 0x170 │ │ - ldc2l 15, cr2, [sp, #308] @ 0x134 │ │ + ldc2l 15, cr2, [sp, #488] @ 0x1e8 │ │ cmneq pc, #208, 30 @ 0x340 │ │ cmneq r3, #92, 18 @ 0x170000 │ │ - ldc2l 13, cr1, [pc, #448] @ 245978c │ │ + ldc2l 13, cr1, [pc, #628] @ 2459840 │ │ ldc2l 12, cr7, [pc, #236] @ 24596bc │ │ cmneq pc, #120, 30 @ 0x1e0 │ │ @ instruction: 0x03b8af48 │ │ - ldc2l 12, cr1, [pc, #992] @ 24599bc │ │ + ldc2l 13, cr1, [pc, #148] @ 2459670 │ │ ldc2l 11, cr7, [pc, #780] @ 24598ec @ │ │ - ldc2l 12, cr1, [pc, #800] @ 2459904 │ │ + ldc2l 12, cr1, [pc, #980] @ 24599b8 │ │ ldc2l 11, cr7, [pc, #588] @ 2459834 @ │ │ - ldc2l 2, cr14, [sp, #380] @ 0x17c │ │ + ldc2l 2, cr14, [sp, #560] @ 0x230 │ │ ldc2l 11, cr7, [pc, #396] @ 245977c @ │ │ - ldc2l 2, cr14, [sp, #220] @ 0xdc │ │ + ldc2l 2, cr14, [sp, #400] @ 0x190 │ │ ldc2l 11, cr7, [pc, #236] @ 24596e4 @ │ │ - ldc2l 10, cr12, [fp, #464] @ 0x1d0 @ │ │ + ldc2l 10, cr12, [fp, #644] @ 0x284 @ │ │ ldr r0, [pc, #3984] @ 245a590 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ movw r0, #10000 @ 0x2710 │ │ cmp r1, r0 │ │ bcc 245962c │ │ ldr r0, [pc, #3964] @ 245a594 │ │ @@ -1328955,30 +1328954,30 @@ │ │ ldr r1, [pc, #3812] @ 245a77c │ │ add r0, sp, #90 @ 0x5a │ │ mov r2, #15 │ │ mov r3, #8 │ │ add r1, pc, r1 │ │ b 245a0d0 │ │ @ instruction: 0x03b8fc48 │ │ - ldc2l 13, cr12, [ip, #716] @ 0x2cc │ │ + ldc2l 13, cr12, [ip, #896] @ 0x380 │ │ ldc2l 10, cr7, [pc, #860] @ 2459c14 @ │ │ - ldc2l 8, cr2, [lr, #980] @ 0x3d4 │ │ - ldc2l 11, cr1, [pc, #212] @ 2459994 @ │ │ + ldc2l 9, cr2, [lr, #68] @ 0x44 @ │ │ + ldc2l 11, cr1, [pc, #392] @ 2459a48 @ │ │ cmneq pc, #176, 26 @ 0x2c00 │ │ eorseq r0, r0, r0, lsl #6 │ │ streq r0, [r4], #-3688 @ 0xfffff198 │ │ - ldc2l 9, cr12, [fp, #240] @ 0xf0 @ │ │ + ldc2l 9, cr12, [fp, #330] @ 0x14a @ │ │ cmneq pc, #100, 26 @ 0x1900 │ │ streq r0, [r4], #-3600 @ 0xfffff1f0 │ │ ldc2l 9, cr7, [pc, #462] @ 2459aaa @ │ │ cmneq r2, #64, 28 @ 0x400 │ │ cmneq pc, #24, 26 @ 0x600 │ │ - ldc2l 4, cr10, [fp, #836] @ 0x344 │ │ + ldc2l 4, cr10, [fp, #1016] @ 0x3f8 │ │ cmneq r2, #224, 26 @ 0x3800 │ │ - ldc2l 4, cr10, [fp, #564] @ 0x234 │ │ + ldc2l 4, cr10, [fp, #744] @ 0x2e8 │ │ ldr r0, [pc, #4072] @ 245a8dc │ │ mov r1, r4 │ │ ldr r2, [pc, #4068] @ 245a8e0 │ │ movw r3, #2204 @ 0x89c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1329067,15 +1329066,15 @@ │ │ bl 270e090 │ │ ldr r0, [pc, #3784] @ 245a924 │ │ mov r1, #1 │ │ str r1, [r6] │ │ add r0, pc, r0 │ │ b 245d4e4 │ │ cmneq r2, #152, 26 @ 0x2600 │ │ - ldc2l 1, cr12, [sp, #252] @ 0xfc │ │ + ldc2l 1, cr12, [sp, #432] @ 0x1b0 │ │ ldr r1, [pc, #4080] @ 245aa68 │ │ movw r0, #5000 @ 0x1388 │ │ ldr r1, [pc, r1] │ │ cmp r1, r0 │ │ bne 2459ae4 │ │ ldr r0, [sp, #36] @ 0x24 │ │ bl 270d240 │ │ @@ -1329094,17 +1329093,17 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #4016] @ 245aa7c │ │ add r0, pc, r0 │ │ b 245d4e4 │ │ cmneq r4, #72, 24 @ 0x4800 │ │ cmneq r2, #252, 24 @ 0xfc00 │ │ - ldc2l 3, cr10, [fp, #740] @ 0x2e4 │ │ + ldc2l 3, cr10, [fp, #920] @ 0x398 │ │ cmneq r2, #200, 24 @ 0xc800 │ │ - ldc2l 3, cr10, [fp, #548] @ 0x224 │ │ + ldc2l 3, cr10, [fp, #728] @ 0x2d8 │ │ ldr r4, [pc, #3988] @ 245aa80 │ │ ldr r4, [pc, r4] │ │ bl 270dda0 │ │ sub r0, r0, #1 │ │ cmp r4, r0 │ │ bge 2459b64 │ │ ldr r8, [pc, #3968] @ 245aa84 │ │ @@ -1329128,15 +1329127,15 @@ │ │ bhi 2459ddc │ │ ldr r0, [pc, #3908] @ 245aa94 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ add r0, pc, r0 │ │ str r5, [r0, r1, lsl #2] │ │ b 2459e40 │ │ cmneq pc, #136, 22 @ 0x22000 │ │ - ldc2l 14, cr9, [lr, #948] @ 0x3b4 │ │ + ldc2l 15, cr9, [lr, #104] @ 0x68 │ │ ldr r0, [pc, #3884] @ 245aa98 │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-56] @ 0xffffffc8 │ │ cmp r0, #1 │ │ blt 2459e64 │ │ ldr r8, [pc, #3868] @ 245aa9c │ │ mov r9, #1 │ │ @@ -1329145,23 +1329144,23 @@ │ │ add r8, pc, r8 │ │ add r5, pc, r5 │ │ add r4, pc, r4 │ │ mov r6, r5 │ │ b 2459c68 │ │ biceq ip, r5, #148, 20 @ 0x94000 │ │ cmneq r2, #140, 16 @ 0x8c0000 │ │ - ldc2l 14, cr9, [lr, #676] @ 0x2a4 │ │ + ldc2l 14, cr9, [lr, #856] @ 0x358 │ │ cmneq r2, #88, 16 @ 0x580000 │ │ cmneq pc, #0, 22 │ │ ldc2l 5, cr7, [pc, #192] @ 2459c78 │ │ cmneq fp, #120, 10 @ 0x1e000000 │ │ ldc2l 4, cr7, [pc, #976] @ 2459f90 │ │ cmneq fp, #68, 10 @ 0x11000000 │ │ cmneq pc, #140, 20 @ 0x8c000 │ │ - ldc2l 5, cr12, [fp, #248] @ 0xf8 │ │ + ldc2l 5, cr12, [fp, #428] @ 0x1ac │ │ cmneq r3, #4, 4 @ 0x40000000 │ │ ldr r7, [pc, #4064] @ 245abb4 │ │ mov r1, sl │ │ ldr r2, [pc, #4060] @ 245abb8 │ │ movw r3, #1309 @ 0x51d │ │ add r7, pc, r7 │ │ add r2, pc, r2 │ │ @@ -1329208,15 +1329207,15 @@ │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270de00 │ │ bic r4, r0, r0, asr #31 │ │ mov r0, sl │ │ mov r7, r5 │ │ b 2459d18 │ │ - ldc2l 5, cr12, [fp, #8] │ │ + ldc2l 5, cr12, [fp, #188] @ 0xbc │ │ cmneq r3, #208, 2 @ 0x34 │ │ cmneq pc, #24, 20 @ 0x18000 │ │ vcadd.f32 , , q6, #270 │ │ cmneq r4, #208, 26 @ 0x3400 │ │ ldc2l 8, cr5, [pc, #64] @ 2459cfc │ │ cmneq r4, #156, 26 @ 0x2700 │ │ cmneq pc, #164, 18 @ 0x290000 │ │ @@ -1329257,17 +1329256,17 @@ │ │ ldr r4, [pc, #3932] @ 245acac │ │ add r1, pc, r1 │ │ add r4, pc, r4 │ │ bgt 2459c48 │ │ mov r0, #0 │ │ str r0, [r8] │ │ b 2459dbc │ │ - ldc2l 1, cr10, [fp, #468] @ 0x1d4 │ │ + ldc2l 1, cr10, [fp, #648] @ 0x288 │ │ cmneq r2, #124, 20 @ 0x7c000 │ │ - ldc2l 1, cr10, [fp, #228] @ 0xe4 │ │ + ldc2l 1, cr10, [fp, #408] @ 0x198 │ │ cmneq r2, #72, 20 @ 0x48000 │ │ mov r0, r7 │ │ ldr r7, [pc, #3888] @ 245acb0 │ │ mov r1, sl │ │ movw r3, #1325 @ 0x52d │ │ add r7, pc, r7 │ │ mov r2, r7 │ │ @@ -1329282,17 +1329281,17 @@ │ │ bl 270d9c0 │ │ mov sl, r0 │ │ mov r0, #0 │ │ mov r4, r7 │ │ str r0, [r5, sl, lsl #2] │ │ b 2459c4c │ │ cmneq pc, #48, 18 @ 0xc0000 │ │ - ldc2l 0, cr8, [lr, #292] @ 0x124 │ │ + ldc2l 0, cr8, [lr, #472] @ 0x1d8 │ │ cmneq pc, #8, 18 @ 0x20000 │ │ - ldc2l 0, cr8, [lr, #36] @ 0x24 │ │ + ldc2l 0, cr8, [lr, #216] @ 0xd8 │ │ cmneq pc, #208, 16 @ 0xd00000 │ │ cmneq pc, #180, 16 @ 0xb40000 │ │ ldr r0, [pc, #4056] @ 245adbc │ │ movw r3, #1350 @ 0x546 │ │ ldr r2, [pc, #4052] @ 245adc0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1329318,17 +1329317,17 @@ │ │ mov r1, r0 │ │ ldr r2, [pc, #3984] @ 245add8 │ │ ldr r0, [pc, #3984] @ 245addc │ │ add r2, pc, r2 │ │ add r0, pc, r0 │ │ str r4, [r2, r1, lsl #2] │ │ b 245d4e4 │ │ - ldc2l 0, cr10, [fp, #556] @ 0x22c │ │ + ldc2l 0, cr10, [fp, #736] @ 0x2e0 │ │ cmneq r0, #12, 2 @ │ │ - ldc2l 0, cr10, [fp, #300] @ 0x12c │ │ + ldc2l 0, cr10, [fp, #480] @ 0x1e0 │ │ ldr r1, [pc, #3956] @ 245ade0 │ │ ldr r1, [pc, r1] │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ cmp r1, #1 │ │ blt 245d504 │ │ ldr r6, [pc, #3940] @ 245ade4 │ │ mov r2, #0 │ │ @@ -1329356,15 +1329355,15 @@ │ │ mov r2, r5 │ │ movw r3, #1337 @ 0x539 │ │ bl 270d9c0 │ │ ldr r1, [fp, #-56] @ 0xffffffc8 │ │ mov r2, r0 │ │ b 2459eb0 │ │ ldc2l 6, cr5, [pc, #200] @ 2459fbc │ │ - ldc2l 5, cr4, [sp, #136] @ 0x88 │ │ + ldc2l 5, cr4, [sp, #316] @ 0x13c │ │ ldr r0, [pc, #3996] @ 245ae98 │ │ mov r1, #0 │ │ ldr ip, [pc, #3992] @ 245ae9c │ │ add r0, pc, r0 │ │ add ip, pc, ip │ │ ldr r2, [r0, r4, lsl #2] │ │ ldr r3, [ip, r4, lsl #2] │ │ @@ -1329379,29 +1329378,29 @@ │ │ add r0, pc, r0 │ │ ldr r0, [r0, r4, lsl #2] │ │ cmp r0, #0 │ │ bne 245a0bc │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ b 245a0ac │ │ cmneq pc, #168, 14 @ 0x2a00000 │ │ - ldc2l 4, cr4, [sp, #952] @ 0x3b8 │ │ + ldc2l 5, cr4, [sp, #108] @ 0x6c │ │ @ instruction: 0x03bfac34 │ │ cmneq pc, #80, 14 @ 0x1400000 │ │ - ldc2l 6, cr12, [ip, #684] @ 0x2ac │ │ + ldc2l 6, cr12, [ip, #864] @ 0x360 │ │ @ instruction: 0x03b8f528 │ │ - ldc2l 6, cr12, [ip, #444] @ 0x1bc │ │ + ldc2l 6, cr12, [ip, #624] @ 0x270 │ │ @ instruction: 0x03b8f4f4 │ │ cmneq pc, #220, 12 @ 0xdc00000 │ │ - ldc2l 6, cr12, [ip, #280] @ 0x118 │ │ + ldc2l 6, cr12, [ip, #460] @ 0x1cc │ │ streq r6, [r3], #-2868 @ 0xfffff4cc │ │ - ldc2l 6, cr12, [ip, #40] @ 0x28 │ │ + ldc2l 6, cr12, [ip, #220] @ 0xdc │ │ streq r6, [r3], #-2816 @ 0xfffff500 │ │ cmneq pc, #104, 12 @ 0x6800000 │ │ - ldc2l 14, cr3, [lr, #892] @ 0x37c │ │ - ldc2l 14, cr3, [lr, #700] @ 0x2bc │ │ + ldc2l 15, cr3, [lr, #48] @ 0x30 │ │ + ldc2l 14, cr3, [lr, #880] @ 0x370 │ │ @ instruction: 0x03b99044 │ │ eoreq pc, pc, r0, asr fp @ │ │ ldr r0, [pc, #4076] @ 245af84 │ │ mov r1, r4 │ │ ldr r9, [pc, #4072] @ 245af88 │ │ movw r3, #2244 @ 0x8c4 │ │ add r0, pc, r0 │ │ @@ -1329496,37 +1329495,37 @@ │ │ ldr r8, [pc, #4084] @ 245b100 │ │ add sl, pc, sl │ │ str r0, [sp, #16] │ │ add r8, pc, r8 │ │ b 245a1b4 │ │ cmneq pc, #220, 10 @ 0x37000000 │ │ cmneq pc, #204, 10 @ 0x33000000 │ │ - ldc2l 5, cr12, [ip, #92] @ 0x5c │ │ + ldc2l 5, cr12, [ip, #272] @ 0x110 │ │ ldc2l 2, cr7, [pc, #252] @ 245a228 │ │ ldc2l 3, cr5, [pc, #936] @ 245a4d8 │ │ @ instruction: 0x03b8f390 │ │ @ instruction: 0x03b8f368 │ │ biceq ip, r5, #144, 8 @ 0x90000000 │ │ @ instruction: 0x03b8f320 │ │ biceq ip, r5, #56, 8 @ 0x38000000 │ │ - ldc2l 4, cr2, [sp, #100] @ 0x64 │ │ + ldc2l 4, cr2, [sp, #280] @ 0x118 │ │ cmneq pc, #156, 8 @ 0x9c000000 │ │ cmneq r3, #40, 28 @ 0x280 │ │ cmneq pc, #116, 8 @ 0x74000000 │ │ cmneq pc, #112, 8 @ 0x70000000 │ │ @ instruction: 0x03b8a43c │ │ ldc2l 0, cr7, [pc, #972] @ 245a52c │ │ - ldc2l 1, cr1, [pc, #944] @ 245a514 │ │ + ldc2l 2, cr1, [pc, #100] @ 245a1c8 │ │ cmneq r3, #144, 26 @ 0x2400 │ │ - ldc2l 1, cr1, [pc, #720] @ 245a43c │ │ + ldc2l 1, cr1, [pc, #900] @ 245a4f0 │ │ cmneq r3, #88, 26 @ 0x1600 │ │ - ldc2l 7, cr13, [sp, #300] @ 0x12c │ │ - ldc2l 7, cr13, [sp, #140] @ 0x8c │ │ - ldc2l 14, cr9, [fp, #216] @ 0xd8 │ │ - ldc2l 1, cr12, [ip, #560] @ 0x230 │ │ + ldc2l 7, cr13, [sp, #480] @ 0x1e0 │ │ + ldc2l 7, cr13, [sp, #320] @ 0x140 │ │ + ldc2l 14, cr9, [fp, #396] @ 0x18c │ │ + ldc2l 1, cr12, [ip, #740] @ 0x2e4 │ │ ldr r1, [pc, #3968] @ 245b104 │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ mov r2, #15 │ │ mov r3, #9 │ │ bl 270d970 │ │ ldr r1, [pc, #4076] @ 245b188 │ │ @@ -1329657,21 +1329656,21 @@ │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ rsb r0, r0, r0, lsl #4 │ │ sub r1, fp, #113 @ 0x71 │ │ add r1, r1, r0 │ │ mov r0, r6 │ │ b 245c414 │ │ - ldc2l 2, cr2, [sp, #692] @ 0x2b4 │ │ + ldc2l 2, cr2, [sp, #872] @ 0x368 │ │ cmneq pc, #60, 6 @ 0xf0000000 │ │ streq r0, [r4], #-1004 @ 0xfffffc14 │ │ cmneq r4, #68, 6 @ 0x10000001 │ │ cmneq r2, #20, 8 @ 0x14000000 │ │ cmneq pc, #236, 4 @ 0xc000000e │ │ - ldc2l 10, cr9, [fp, #660] @ 0x294 @ │ │ + ldc2l 10, cr9, [fp, #840] @ 0x348 @ │ │ ldc2l 15, cr6, [pc, #348] @ 245a524 │ │ cmneq r2, #176, 6 @ 0xc0000002 │ │ sub r1, r7, #1 │ │ movw r0, #10000 @ 0x2710 │ │ cmp r1, r0 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ bcc 245a3f8 │ │ @@ -1329705,15 +1329704,15 @@ │ │ blt 245a17c │ │ ldr r1, [pc, #4044] @ 245b420 │ │ mov r0, r6 │ │ mov r2, #15 │ │ mov r3, #10 │ │ add r1, pc, r1 │ │ b 245a190 │ │ - ldc2l 10, cr9, [fp, #372] @ 0x174 @ │ │ + ldc2l 10, cr9, [fp, #552] @ 0x228 @ │ │ ldc2l 15, cr6, [pc, #60] @ 245a4ac │ │ cmneq r2, #100, 6 @ 0x90000001 │ │ ldr r4, [pc, #4012] @ 245b424 │ │ movw r0, #9999 @ 0x270f │ │ ldr r4, [pc, r4] │ │ cmp r4, r0 │ │ bgt 245a570 │ │ @@ -1329726,18 +1329725,18 @@ │ │ add r1, pc, r1 │ │ add r7, pc, r7 │ │ b 245a6fc │ │ sub r6, r7, #1 │ │ mov sl, r7 │ │ mov r8, #0 │ │ b 245a500 │ │ - ldc2l 7, cr11, [sp, #156] @ 0x9c │ │ + ldc2l 7, cr11, [sp, #336] @ 0x150 │ │ ldc2l 14, cr6, [pc, #732] @ 245a7a0 │ │ cmneq r2, #212, 4 @ 0x4000000d │ │ - ldc2l 9, cr9, [fp, #290] @ 0x122 @ │ │ + ldc2l 9, cr9, [fp, #380] @ 0x17c @ │ │ ldc2l 14, cr6, [pc, #268] @ 245a5dc │ │ ldr r0, [pc, #3936] @ 245b434 │ │ mov r1, r8 │ │ ldr r2, [pc, #3932] @ 245b438 │ │ movw r3, #2436 @ 0x984 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1329770,26 +1329769,26 @@ │ │ ldr r0, [pc, #3832] @ 245b44c │ │ add r0, pc, r0 │ │ ldr r5, [r0, r8, lsl #2] │ │ cmp r4, r5 │ │ bge 245a4fc │ │ b 245acdc │ │ cmneq r2, #156, 4 @ 0xc0000009 │ │ - ldc2l 9, cr9, [fp, #186] @ 0xba @ │ │ + ldc2l 9, cr9, [fp, #276] @ 0x114 @ │ │ ldc2l 14, cr6, [pc, #60] @ 245a5b0 │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ mov r6, #1 │ │ ldr r7, [pc, #3792] @ 245b450 │ │ mov r8, #1 │ │ ldr r7, [pc, r7] │ │ ldr r1, [pc, #3784] @ 245b454 │ │ add r1, pc, r1 │ │ b 245a5b8 │ │ cmneq pc, #248 @ 0xf8 │ │ - ldc2l 4, cr9, [lr, #420] @ 0x1a4 │ │ + ldc2l 4, cr9, [lr, #600] @ 0x258 │ │ ldc2l 13, cr6, [pc, #492] @ 245a78c │ │ ldr r0, [r1, r4, lsl #2] │ │ cmp r0, r7 │ │ movlt r8, r6 │ │ movlt r7, r0 │ │ ldr r0, [fp, #-56] @ 0xffffffc8 │ │ cmp r6, r0 │ │ @@ -1329820,26 +1329819,26 @@ │ │ bl 270d9c0 │ │ ldr r1, [pc, #3976] @ 245b5a8 │ │ mov r8, r6 │ │ add r1, pc, r1 │ │ ldr r7, [r1, r0, lsl #2] │ │ b 245a5ac │ │ cmneq r2, #12, 28 @ 0xc0 │ │ - ldc2l 4, cr9, [lr, #164] @ 0xa4 │ │ + ldc2l 4, cr9, [lr, #344] @ 0x158 │ │ ldc2l 13, cr6, [pc, #236] @ 245a728 │ │ cmneq r2, #212, 26 @ 0x3500 │ │ cmneq pc, #124 @ 0x7c │ │ ldc2l 10, cr6, [pc, #688] @ 245a8f8 @ │ │ ldc2l 12, cr6, [pc, #1020] @ 245aa48 │ │ cmneq sl, #240, 20 @ 0xf0000 @ │ │ ldc2l 10, cr6, [pc, #432] @ 245a804 @ │ │ ldc2l 12, cr6, [pc, #764] @ 245a954 │ │ cmneq sl, #184, 20 @ 0xb8000 @ │ │ cmneq pc, #0 │ │ - ldc2l 10, cr11, [fp, #712] @ 0x2c8 @ │ │ + ldc2l 10, cr11, [fp, #892] @ 0x37c @ │ │ ldc2l 12, cr6, [pc, #524] @ 245a874 │ │ cmneq r3, #116, 14 @ 0x1d00000 │ │ sub r4, r8, #1 │ │ movw r0, #10000 @ 0x2710 │ │ cmp r4, r0 │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ mov r0, r4 │ │ @@ -1329884,34 +1329883,34 @@ │ │ bcs 245a780 │ │ ldr r0, [pc, #4092] @ 245b71c │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ add r0, pc, r0 │ │ str r6, [r0, r4, lsl #2] │ │ mov r0, r4 │ │ b 245a7d0 │ │ - ldc2l 10, cr11, [fp, #456] @ 0x1c8 @ │ │ + ldc2l 10, cr11, [fp, #636] @ 0x27c @ │ │ ldc2l 12, cr6, [pc, #268] @ 245a848 │ │ cmneq r3, #60, 14 @ 0xf00000 │ │ cmneq pc, #132, 30 @ 0x210 │ │ ldc2l 13, cr4, [pc, #736] @ 245aa28 │ │ ldc2l 12, cr6, [pc, #28] @ 245a768 │ │ cmneq r4, #56, 6 @ 0xe0000000 │ │ ldc2l 13, cr4, [pc, #480] @ 245a934 │ │ ldc2l 11, cr6, [pc, #796] @ 245aa74 @ │ │ cmneq r4, #0, 6 │ │ cmneq pc, #8, 30 │ │ - ldc2l 6, cr9, [fp, #868] @ 0x364 │ │ + ldc2l 7, cr9, [fp, #24] │ │ ldc2l 11, cr6, [pc, #556] @ 245a994 @ │ │ cmneq r2, #220, 30 @ 0x370 │ │ - ldc2l 6, cr9, [fp, #628] @ 0x274 │ │ + ldc2l 6, cr9, [fp, #808] @ 0x328 │ │ ldc2l 11, cr6, [pc, #316] @ 245a8b0 @ │ │ cmneq r2, #160, 30 @ 0x280 │ │ cmneq pc, #136, 28 @ 0x880 │ │ cmneq pc, #124, 28 @ 0x7c0 │ │ - ldc2l 11, cr15, [ip, #700] @ 0x2bc @ │ │ + ldc2l 11, cr15, [ip, #880] @ 0x370 @ │ │ ldr r0, [pc, #3992] @ 245b720 │ │ mov r1, r4 │ │ ldr r5, [pc, #3988] @ 245b724 │ │ movw r3, #2373 @ 0x945 │ │ add r0, pc, r0 │ │ add r5, pc, r5 │ │ mov r2, r5 │ │ @@ -1329991,33 +1329990,33 @@ │ │ str r6, [r0, r4, lsl #2] │ │ ldr r0, [pc, #4060] @ 245b8a8 │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ add r0, pc, r0 │ │ str r1, [r0, r4, lsl #2] │ │ mov r0, r4 │ │ b 245a9d0 │ │ - ldc2l 13, cr11, [ip, #460] @ 0x1cc │ │ + ldc2l 13, cr11, [ip, #640] @ 0x280 │ │ ldc2l 10, cr6, [pc, #620] @ 245ab54 @ │ │ @ instruction: 0x03b8ebf4 │ │ - ldc2l 5, cr7, [lr, #4] │ │ + ldc2l 5, cr7, [lr, #184] @ 0xb8 │ │ ldc2l 10, cr6, [pc, #412] @ 245aa90 @ │ │ cmneq pc, #192, 26 @ 0x3000 │ │ - ldc2l 5, cr9, [fp, #524] @ 0x20c │ │ + ldc2l 5, cr9, [fp, #704] @ 0x2c0 │ │ ldc2l 10, cr6, [pc, #172] @ 245a9ac @ │ │ cmneq r0, #4, 12 @ 0x400000 │ │ ldc2l 11, cr4, [pc, #680] @ 245abb0 @ │ │ ldc2l 9, cr6, [pc, #486] @ 245aaf2 @ │ │ biceq fp, r5, #132, 24 @ 0x8400 │ │ - ldc2l 10, cr3, [sp, #584] @ 0x248 @ │ │ + ldc2l 10, cr3, [sp, #764] @ 0x2fc @ │ │ @ instruction: 0x03bfa1cc │ │ - ldc2l 5, cr3, [lr, #460] @ 0x1cc │ │ + ldc2l 5, cr3, [lr, #640] @ 0x280 │ │ ldc2l 9, cr6, [pc, #222] @ 245a9fe @ │ │ @ instruction: 0x03b98700 │ │ eoreq pc, pc, r4, lsl r2 @ │ │ - ldc2l 4, cr11, [sp, #728] @ 0x2d8 │ │ + ldc2l 4, cr11, [sp, #908] @ 0x38c │ │ ldr r0, [pc, #3964] @ 245b8ac │ │ mov r5, sl │ │ ldr sl, [pc, #3960] @ 245b8b0 │ │ mov r1, r4 │ │ add r0, pc, r0 │ │ movw r3, #2376 @ 0x948 │ │ add sl, pc, sl │ │ @@ -1330091,19 +1330090,19 @@ │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ add r0, pc, r0 │ │ add r0, r0, r4, lsl #3 │ │ vstr d8, [r0] │ │ mov r0, r4 │ │ b 245ab20 │ │ cmneq pc, #120, 24 @ 0x7800 │ │ - ldc2l 11, cr5, [ip, #92] @ 0x5c @ │ │ - ldc2l 4, cr9, [ip, #100] @ 0x64 │ │ + ldc2l 11, cr5, [ip, #272] @ 0x110 @ │ │ + ldc2l 4, cr9, [ip, #280] @ 0x118 │ │ eoreq pc, pc, ip, lsr #3 │ │ - ldc2l 0, cr15, [lr, #216] @ 0xd8 │ │ - ldc2l 8, cr11, [fp, #208] @ 0xd0 │ │ + ldc2l 0, cr15, [lr, #396] @ 0x18c │ │ + vcadd.f32 , , , #270 │ │ cmneq pc, #16, 24 @ 0x1000 │ │ cmneq pc, #248, 22 @ 0x3e000 │ │ cmneq pc, #228, 22 @ 0x39000 │ │ cmneq pc, #224, 22 @ 0x38000 │ │ cmneq pc, #216, 22 @ 0x36000 │ │ cmneq r3, #48, 10 @ 0xc000000 │ │ cmneq pc, #140, 22 @ 0x23000 │ │ @@ -1330228,18 +1330227,18 @@ │ │ bl 270d970 │ │ ldr r1, [pc, #3872] @ 245bba0 │ │ add r0, sp, #105 @ 0x69 │ │ mov r2, #15 │ │ mov r3, #12 │ │ add r1, pc, r1 │ │ b 245af58 │ │ - ldc2l 4, cr11, [fp, #984] @ 0x3d8 │ │ + ldc2l 5, cr11, [fp, #140] @ 0x8c │ │ cmneq pc, #8, 20 @ 0x8000 │ │ @ instruction: 0x03b899f4 │ │ - ldc2l 4, cr11, [fp, #744] @ 0x2e8 │ │ + ldc2l 4, cr11, [fp, #924] @ 0x39c │ │ cmneq pc, #188, 18 @ 0x2f0000 │ │ @ instruction: 0x03b899a8 │ │ cmneq r4, #148, 26 @ 0x2500 │ │ ldc2l 6, cr6, [pc, #300] @ 245ade0 │ │ ldc2l 6, cr6, [pc, #92] @ 245ad14 │ │ ldr r0, [pc, #3816] @ 245bba4 │ │ mov r1, r8 │ │ @@ -1330297,33 +1330296,33 @@ │ │ mov r0, #0 │ │ str r0, [sp, #32] │ │ ldr r8, [pc, #4004] @ 245bd3c │ │ ldr sl, [pc, #4004] @ 245bd40 │ │ add r8, pc, r8 │ │ add sl, pc, sl │ │ b 245a194 │ │ - ldc2l 4, cr11, [fp, #120] @ 0x78 │ │ + ldc2l 4, cr11, [fp, #300] @ 0x12c │ │ ldr r6, [pc, #3988] @ 245bd44 │ │ sub r4, r7, #1 │ │ mov r8, r7 │ │ ldr r6, [pc, r6] │ │ b 245ae20 │ │ - ldc2l 6, cr0, [pc, #912] @ 245b154 │ │ + ldc2l 7, cr0, [pc, #68] @ 245ae08 │ │ ldc2l 5, cr6, [pc, #700] @ 245b084 │ │ cmneq r3, #136, 4 @ 0x80000008 │ │ cmneq pc, #236, 16 @ 0xec0000 │ │ cmneq pc, #220, 16 @ 0xdc0000 │ │ - ldc2l 12, cr12, [sp, #396] @ 0x18c │ │ + ldc2l 12, cr12, [sp, #576] @ 0x240 │ │ ldc2l 5, cr6, [pc, #412] @ 245af78 │ │ @ instruction: 0x03b89898 │ │ - ldc2l 4, cr11, [fp, #704] @ 0x2c0 │ │ + ldc2l 4, cr11, [fp, #884] @ 0x374 │ │ cmneq pc, #136, 16 @ 0x880000 │ │ @ instruction: 0x03b89854 │ │ cmneq pc, #92, 16 @ 0x5c0000 │ │ - ldc2l 11, cr12, [sp, #1004] @ 0x3ec @ │ │ + ldc2l 12, cr12, [sp, #160] @ 0xa0 │ │ ldr r0, [pc, #3920] @ 245bd48 │ │ mov r1, r6 │ │ ldr r2, [pc, #3916] @ 245bd4c │ │ movw r3, #2536 @ 0x9e8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1330420,15 +1330419,15 @@ │ │ ldr r0, [sp, #32] │ │ add r0, r0, #1 │ │ str r0, [sp, #32] │ │ b 245a194 │ │ ldc2l 1, cr6, [pc, #656] @ 245b21c │ │ ldc2l 3, cr6, [pc, #988] @ 245b36c │ │ cmneq sl, #224, 2 @ 0x38 @ │ │ - ldc2l 6, cr11, [ip, #728] @ 0x2d8 │ │ + ldc2l 6, cr11, [ip, #908] @ 0x38c │ │ ldr r1, [pc, #3548] @ 245bd78 │ │ mov r0, r6 │ │ mov r2, #15 │ │ mov r3, #1 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ sub r4, r7, #1 │ │ @@ -1330438,16 +1330437,16 @@ │ │ ldr r1, [pc, #3512] @ 245bd7c │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ add r1, pc, r1 │ │ ldr r6, [r1, r4, lsl #2] │ │ b 245b174 │ │ streq r5, [r3], #-2964 @ 0xfffff46c │ │ ldc2l 1, cr6, [pc, #288] @ 245b0fc │ │ - ldc2l 6, cr11, [ip, #392] @ 0x188 │ │ - ldc2l 6, cr11, [ip, #236] @ 0xec │ │ + ldc2l 6, cr11, [ip, #572] @ 0x23c │ │ + ldc2l 6, cr11, [ip, #416] @ 0x1a0 │ │ @ instruction: 0x03b8e4b4 │ │ sub r1, r5, #1 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ ldr r0, [pc, #3468] @ 245bd80 │ │ movw r3, #2540 @ 0x9ec │ │ ldr r2, [pc, #3464] @ 245bd84 │ │ add r0, pc, r0 │ │ @@ -1330469,22 +1330468,22 @@ │ │ mov r7, r8 │ │ bl 270d970 │ │ mov r0, #0 │ │ str r0, [sp, #32] │ │ ldr r8, [pc, #3392] @ 245bd90 │ │ add r8, pc, r8 │ │ b 245a194 │ │ - ldc2l 14, cr8, [fp, #516] @ 0x204 │ │ + ldc2l 14, cr8, [fp, #696] @ 0x2b8 │ │ ldc2l 3, cr6, [pc, #188] @ 245b11c │ │ cmneq r2, #136, 14 @ 0x2200000 │ │ ldc2l 0, cr6, [pc, #688] @ 245b318 │ │ ldc2l 2, cr6, [pc, #1004] @ 245b458 │ │ cmneq sl, #236 @ 0xec @ │ │ - ldc2l 10, cr14, [fp, #312] @ 0x138 @ │ │ - ldc2l 3, cr0, [pc, #952] @ 245b430 │ │ + ldc2l 10, cr14, [fp, #492] @ 0x1ec @ │ │ + ldc2l 4, cr0, [pc, #108] @ 245b0e4 │ │ bl 270d6c0 │ │ mov r6, r0 │ │ ldr r0, [sp, #24] │ │ mov r7, r1 │ │ sub r4, r0, #1 │ │ movw r0, #10000 @ 0x2710 │ │ cmp r4, r0 │ │ @@ -1330513,15 +1330512,15 @@ │ │ add r6, pc, r6 │ │ add r0, r6, r4, lsl #3 │ │ vstr d8, [r0] │ │ mov r0, r4 │ │ b 245b388 │ │ streq pc, [r3], #-1720 @ 0xfffff948 │ │ cmneq fp, #208, 24 @ 0xd000 │ │ - ldc2l 12, cr8, [fp, #688] @ 0x2b0 │ │ + ldc2l 12, cr8, [fp, #868] @ 0x364 │ │ ldr r8, [pc, #3220] @ 245bda4 │ │ mov r1, r4 │ │ ldr r9, [pc, #3216] @ 245bda8 │ │ movw r3, #2484 @ 0x9b4 │ │ add r8, pc, r8 │ │ mov sl, r5 │ │ add r9, pc, r9 │ │ @@ -1330546,36 +1330545,36 @@ │ │ add r8, pc, r8 │ │ mov r4, r0 │ │ ldr r0, [sp, #32] │ │ add r0, r6, r0 │ │ str r0, [r1, r4, lsl #2] │ │ add r6, sp, #90 @ 0x5a │ │ b 245a194 │ │ - ldc2l 3, cr0, [pc, #184] @ 245b248 │ │ - ldc2l 9, cr14, [fp, #172] @ 0xac @ │ │ + ldc2l 3, cr0, [pc, #364] @ 245b2fc │ │ + ldc2l 9, cr14, [fp, #262] @ 0x106 @ │ │ bl 270dda0 │ │ mov r4, r0 │ │ ldr r0, [pc, #4068] @ 245c184 │ │ ldr r0, [pc, r0] │ │ str r0, [fp, #-56] @ 0xffffffc8 │ │ ldr r3, [pc, #4060] @ 245c188 │ │ cmp r0, #1 │ │ add r3, pc, r3 │ │ blt 245b8c0 │ │ ldr r0, [sp, #24] │ │ mov r8, #0 │ │ mov r9, #0 │ │ sub r7, r0, #1 │ │ b 245b210 │ │ - ldc2l 2, cr15, [ip, #428] @ 0x1ac │ │ - ldc2l 12, cr8, [fp, #176] @ 0xb0 │ │ - ldc2l 5, cr15, [fp, #552] @ 0x228 │ │ - ldc2l 7, cr8, [lr, #444] @ 0x1bc │ │ - ldc2l 0, cr5, [sp, #876] @ 0x36c │ │ - ldc2l 5, cr10, [lr, #140] @ 0x8c │ │ + ldc2l 2, cr15, [ip, #608] @ 0x260 │ │ + ldc2l 12, cr8, [fp, #356] @ 0x164 │ │ + ldc2l 5, cr15, [fp, #732] @ 0x2dc │ │ + ldc2l 7, cr8, [lr, #624] @ 0x270 │ │ + ldc2l 1, cr5, [sp, #32] │ │ + ldc2l 5, cr10, [lr, #320] @ 0x140 │ │ ldr r0, [r3, r6, lsl #2] │ │ clz r2, r9 │ │ mov r1, #0 │ │ lsr r2, r2, #5 │ │ cmp r0, r4 │ │ movwlt r1, #1 │ │ orrs r1, r1, r2 │ │ @@ -1330613,18 +1330612,18 @@ │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r3, [pc, #3864] @ 245c1a0 │ │ mov r9, r8 │ │ add r3, pc, r3 │ │ ldr r4, [r3, r0, lsl #2] │ │ b 245b204 │ │ - ldc2l 9, cr10, [sp, #276] @ 0x114 @ │ │ - ldc2l 14, cr2, [ip, #180] @ 0xb4 │ │ - ldc2l 6, cr8, [lr, #852] @ 0x354 │ │ - ldc2l 12, cr8, [ip, #116] @ 0x74 │ │ + ldc2l 9, cr10, [sp, #366] @ 0x16e @ │ │ + ldc2l 14, cr2, [ip, #360] @ 0x168 │ │ + ldc2l 7, cr8, [lr, #8] │ │ + ldc2l 12, cr8, [ip, #296] @ 0x128 │ │ sub r1, r5, #1 │ │ movw r0, #5000 @ 0x1388 │ │ mov r8, r7 │ │ cmp r1, r0 │ │ bcc 245b2d4 │ │ ldr r0, [pc, #3812] @ 245c1a4 │ │ movw r3, #2585 @ 0xa19 │ │ @@ -1330645,19 +1330644,19 @@ │ │ add r1, pc, r1 │ │ ldr r6, [r1, r4, lsl #2] │ │ ldr r0, [pc, #3756] @ 245c1b4 │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ add r0, pc, r0 │ │ str r7, [r0, r4, lsl #2] │ │ b 245ba30 │ │ - ldc2l 12, cr4, [lr, #280] @ 0x118 │ │ - ldc2l 1, cr1, [ip, #540] @ 0x21c │ │ - ldc2l 11, cr0, [lr, #632] @ 0x278 @ │ │ + ldc2l 12, cr4, [lr, #460] @ 0x1cc │ │ + ldc2l 1, cr1, [ip, #720] @ 0x2d0 │ │ + ldc2l 11, cr0, [lr, #812] @ 0x32c @ │ │ ldc2l 0, cr6, [pc, #76] @ 245b374 │ │ - ldc2l 13, cr10, [fp, #888] @ 0x378 │ │ + ldc2l 14, cr10, [fp, #44] @ 0x2c │ │ ldc2l 15, cr5, [pc, #700] @ 245b5ec │ │ cmneq pc, #244, 4 @ 0x4000000f │ │ cmneq r3, #156, 20 @ 0x9c000 │ │ ldr r0, [pc, #3708] @ 245c1b8 │ │ mov r7, r5 │ │ ldr r5, [pc, #3704] @ 245c1bc │ │ mov r1, r4 │ │ @@ -1330709,26 +1330708,26 @@ │ │ bgt 245aba4 │ │ ldr r1, [pc, #4016] @ 245c3b4 │ │ mov r0, r6 │ │ mov r2, #15 │ │ mov r3, #8 │ │ add r1, pc, r1 │ │ b 245a190 │ │ - ldc2l 6, cr12, [sp, #428] @ 0x1ac │ │ + ldc2l 6, cr12, [sp, #608] @ 0x260 │ │ ldc2l 15, cr5, [pc, #444] @ 245b5dc │ │ @ instruction: 0x03b892a4 │ │ - ldc2l 3, cr10, [lr, #316] @ 0x13c │ │ + ldc2l 3, cr10, [lr, #496] @ 0x1f0 │ │ cmneq pc, #124, 4 @ 0xc0000007 │ │ cmneq pc, #104, 4 @ 0x80000006 │ │ cmneq sl, #4, 26 @ 0x100 │ │ streq r5, [r3], #-1760 @ 0xfffff920 │ │ - ldc2l 5, cr12, [sp, #732] @ 0x2dc │ │ + ldc2l 5, cr12, [sp, #912] @ 0x390 │ │ ldc2l 14, cr5, [pc, #748] @ 245b72c │ │ @ instruction: 0x03b891f4 │ │ - ldc2l 12, cr10, [fp, #648] @ 0x288 │ │ + ldc2l 12, cr10, [fp, #828] @ 0x33c │ │ ldc2l 14, cr5, [pc, #460] @ 245b618 │ │ cmneq r3, #104, 18 @ 0x1a0000 │ │ @ instruction: 0x03b89190 │ │ cmneq sl, #32, 24 @ 0x2000 │ │ cmneq sl, #24, 24 @ 0x1800 │ │ ldr r0, [sl, r1, lsl #2] │ │ movw r3, #34464 @ 0x86a0 │ │ @@ -1330811,15 +1330810,15 @@ │ │ b 245b6d8 │ │ ldc2l 11, cr5, [pc, #416] @ 245b73c @ │ │ ldc2l 13, cr5, [pc, #748] @ 245b88c │ │ cmneq sl, #180, 22 @ 0x2d000 │ │ ldc2l 11, cr5, [pc, #224] @ 245b688 @ │ │ ldc2l 13, cr5, [pc, #556] @ 245b7d8 │ │ cmneq sl, #128, 22 @ 0x20000 │ │ - ldc2l 8, cr8, [fp, #340] @ 0x154 │ │ + vcadd.f32 d24, d27, d2, #270 │ │ ldc2l 13, cr5, [pc, #28] @ 245b5d4 │ │ cmneq sl, #0, 22 │ │ cmneq r2, #88, 2 │ │ streq r5, [r3], #-1220 @ 0xfffffb3c │ │ cmneq sl, #168, 20 @ 0xa8000 │ │ ldr r1, [fp, #8] │ │ ldr r0, [fp, #-68] @ 0xffffffbc │ │ @@ -1330904,15 +1330903,15 @@ │ │ ldr r2, [pc, #3904] @ 245c64c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 245b458 │ │ cmneq r2, #32, 26 @ 0x800 │ │ - ldc2l 2, cr8, [lr, #980] @ 0x3d4 │ │ + ldc2l 3, cr8, [lr, #136] @ 0x88 │ │ ldc2l 12, cr5, [pc, #28] @ 245b748 │ │ cmneq r2, #144, 24 @ 0x9000 │ │ mov r0, sl │ │ bl 270e050 │ │ ldr r7, [sp, #24] │ │ cmp r0, #0 │ │ beq 245bb58 │ │ @@ -1330947,22 +1330946,22 @@ │ │ str r4, [r2, r1, lsl #2] │ │ sub r1, r0, #5 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ b 245bc28 │ │ ldc2l 9, cr5, [pc, #264] @ 245b8d0 @ │ │ cmneq sl, #212, 18 @ 0x350000 │ │ cmneq pc, #20, 30 @ 0x50 │ │ - ldc2l 2, cr12, [sp, #604] @ 0x25c │ │ + ldc2l 2, cr12, [sp, #784] @ 0x310 │ │ ldc2l 11, cr5, [pc, #620] @ 245ba44 @ │ │ @ instruction: 0x03b88ecc │ │ - ldc2l 9, cr10, [fp, #276] @ 0x114 @ │ │ + ldc2l 9, cr10, [fp, #366] @ 0x16e @ │ │ ldc2l 11, cr5, [pc, #364] @ 245b950 @ │ │ cmneq r3, #84, 12 @ 0x5400000 │ │ cmneq pc, #152, 28 @ 0x980 │ │ - ldc2l 2, cr12, [sp, #108] @ 0x6c │ │ + ldc2l 2, cr12, [sp, #288] @ 0x120 │ │ ldc2l 11, cr5, [pc, #124] @ 245b870 @ │ │ @ instruction: 0x03b88e50 │ │ add r6, sp, #90 @ 0x5a │ │ cmp r9, #0 │ │ beq 245b8c0 │ │ sub r4, r9, #1 │ │ ldr r7, [sp, #24] │ │ @@ -1331006,15 +1331005,15 @@ │ │ b 245ca58 │ │ cmneq r2, #80, 30 @ 0x140 │ │ cmneq r4, #36, 4 @ 0x40000002 │ │ @ instruction: 0x03b8dc34 │ │ ldc2l 12, cr3, [pc, #64] @ 245b8f4 │ │ ldc2l 10, cr5, [pc, #364] @ 245ba24 @ │ │ cmneq r4, #132, 2 @ 0x21 │ │ - ldc2l 5, cr8, [fp, #484] @ 0x1e4 │ │ + ldc2l 5, cr8, [fp, #664] @ 0x298 │ │ cmneq r2, #124, 28 @ 0x7c0 │ │ ldr r0, [sp, #16] │ │ ldr r7, [sp, #24] │ │ sub r1, r0, #1 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ cmp r1, #2 │ │ bcc 245b8f4 │ │ @@ -1331058,18 +1331057,18 @@ │ │ mov r2, sl │ │ bl 270e030 │ │ mov r6, #0 │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ str r6, [r5, r4, lsl #2] │ │ mov r0, r4 │ │ b 245c270 │ │ - ldc2l 12, cr10, [ip, #860] @ 0x35c │ │ + ldc2l 13, cr10, [ip, #16] │ │ @ instruction: 0x03b8db50 │ │ - ldc2l 12, cr10, [ip, #744] @ 0x2e8 │ │ - ldc2l 4, cr6, [lr, #164] @ 0xa4 │ │ + ldc2l 12, cr10, [ip, #924] @ 0x39c │ │ + ldc2l 4, cr6, [lr, #344] @ 0x158 │ │ ldc2l 9, cr5, [pc, #294] @ 245bac6 @ │ │ cmneq pc, #232, 24 @ 0xe800 │ │ biceq sl, r5, #252, 22 @ 0x3f000 │ │ cmneq r0, #44, 10 @ 0xb000000 │ │ ldr r0, [pc, #3652] @ 245c7f4 │ │ mov r9, r5 │ │ ldr r5, [pc, #3648] @ 245c7f8 │ │ @@ -1331114,15 +1331113,15 @@ │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ mov r7, r8 │ │ ldr r8, [pc, #3504] @ 245c814 │ │ add r8, pc, r8 │ │ b 245a194 │ │ - ldc2l 4, cr8, [fp, #204] @ 0xcc │ │ + ldc2l 4, cr8, [fp, #384] @ 0x180 │ │ ldc2l 8, cr5, [pc, #892] @ 245bdf0 │ │ cmneq r0, #168, 8 @ 0xa8000000 │ │ ldc2l 10, cr3, [pc, #392] @ 245bc04 @ │ │ biceq sl, r5, #60, 22 @ 0xf000 │ │ mov r0, sl │ │ bl 270e050 │ │ cmp r0, #0 │ │ @@ -1331156,17 +1331155,17 @@ │ │ add r0, r0, r0, lsl #2 │ │ add r6, sp, #90 @ 0x5a │ │ add r2, pc, r2 │ │ str r4, [r2, r1, lsl #2] │ │ sub r1, r0, #5 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ b 245c500 │ │ - ldc2l 9, cr2, [sp, #140] @ 0x8c @ │ │ + ldc2l 9, cr2, [sp, #230] @ 0xe6 @ │ │ @ instruction: 0x03bf9090 │ │ - ldc2l 2, cr12, [fp, #780] @ 0x30c │ │ + ldc2l 2, cr12, [fp, #960] @ 0x3c0 │ │ str r5, [sp, #8] │ │ sub r5, r7, #1 │ │ movw r0, #10000 @ 0x2710 │ │ cmp r5, r0 │ │ str r5, [fp, #-56] @ 0xffffffc8 │ │ str r5, [sp, #20] │ │ bcs 245c5b0 │ │ @@ -1331180,31 +1331179,31 @@ │ │ cmneq fp, #120, 4 @ 0x80000007 │ │ ldr r1, [pc, #4016] @ 245cb10 │ │ sub r0, fp, #83 @ 0x53 │ │ mov r2, #15 │ │ mov r3, #12 │ │ add r1, pc, r1 │ │ b 245c434 │ │ - ldc2l 4, cr2, [lr, #124] @ 0x7c │ │ + ldc2l 4, cr2, [lr, #304] @ 0x130 │ │ ldc2l 8, cr5, [pc, #108] @ 245bbe8 │ │ ldr r1, [pc, #3988] @ 245cb14 │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ b 245c414 │ │ @ instruction: 0x03b975b0 │ │ eoreq lr, pc, r0, asr #1 │ │ - ldc2l 14, cr7, [lr, #28] │ │ + ldc2l 14, cr7, [lr, #208] @ 0xd0 │ │ eoreq lr, pc, r0, asr #32 │ │ eoreq lr, pc, r0, asr #32 │ │ - ldc2l 11, cr14, [fp, #248] @ 0xf8 @ │ │ - ldc2l 4, cr2, [ip, #436] @ 0x1b4 │ │ - ldc2l 13, cr11, [sp, #828] @ 0x33c │ │ + ldc2l 11, cr14, [fp, #428] @ 0x1ac @ │ │ + ldc2l 4, cr2, [ip, #616] @ 0x268 │ │ + ldc2l 13, cr11, [sp, #1008] @ 0x3f0 │ │ ldc2l 6, cr5, [pc, #844] @ 245befc │ │ @ instruction: 0x03b88a0c │ │ - ldc2l 4, cr10, [fp, #808] @ 0x328 │ │ + ldc2l 4, cr10, [fp, #988] @ 0x3dc │ │ ldc2l 6, cr5, [pc, #620] @ 245be28 │ │ cmneq r3, #140, 2 @ 0x23 │ │ ldr r0, [pc, #3924] @ 245cb18 │ │ movw r3, #2903 @ 0xb57 │ │ ldr sl, [pc, #3920] @ 245cb1c │ │ mov r9, r5 │ │ add r0, pc, r0 │ │ @@ -1331291,41 +1331290,41 @@ │ │ bl 270d9c0 │ │ mov r4, r0 │ │ ldr r0, [pc, #3932] @ 245cc7c │ │ add r0, pc, r0 │ │ str r6, [r0, r4, lsl #2] │ │ add r6, sp, #90 @ 0x5a │ │ b 245c7b4 │ │ - ldc2l 7, cr15, [lr, #576] @ 0x240 │ │ + ldc2l 7, cr15, [lr, #756] @ 0x2f4 │ │ ldc2l 6, cr5, [pc, #364] @ 245bea4 │ │ cmneq r3, #52, 6 @ 0xd0000000 │ │ - ldc2l 10, cr14, [fp, #216] @ 0xd8 @ │ │ + ldc2l 10, cr14, [fp, #396] @ 0x18c @ │ │ cmneq fp, #72 @ 0x48 │ │ streq lr, [r3], #-2596 @ 0xfffff5dc │ │ cmneq pc, #60, 18 @ 0xf0000 │ │ - ldc2l 12, cr11, [sp, #588] @ 0x24c │ │ + ldc2l 12, cr11, [sp, #768] @ 0x300 │ │ ldc2l 5, cr5, [pc, #604] @ 245bfb0 │ │ @ instruction: 0x03b888d0 │ │ ldc2l 7, cr3, [pc] @ 245bd5c │ │ ldc2l 5, cr5, [pc, #316] @ 245be9c │ │ cmneq r4, #132, 24 @ 0x8400 │ │ @ instruction: 0x03b8886c │ │ eoreq sp, pc, r4, ror sp @ │ │ eoreq sp, pc, r4, ror sp @ │ │ - ldc2l 4, cr4, [sp, #12] │ │ - ldc2l 10, cr7, [lr, #420] @ 0x1a4 @ │ │ - ldc2l 0, cr4, [lr, #24] │ │ - ldc2l 11, cr13, [fp, #472] @ 0x1d8 @ │ │ + ldc2l 4, cr4, [sp, #192] @ 0xc0 │ │ + ldc2l 10, cr7, [lr, #600] @ 0x258 @ │ │ + ldc2l 0, cr4, [lr, #204] @ 0xcc │ │ + ldc2l 11, cr13, [fp, #652] @ 0x28c @ │ │ cmneq sl, #220, 2 @ 0x37 │ │ - ldc2l 4, cr15, [lr, #848] @ 0x350 │ │ + ldc2l 5, cr15, [lr, #4] │ │ ldc2l 3, cr5, [pc, #636] @ 245c008 │ │ cmneq r3, #120 @ 0x78 │ │ - ldc2l 3, cr4, [sp, #44] @ 0x2c │ │ + ldc2l 3, cr4, [sp, #224] @ 0xe0 │ │ cmneq fp, #148, 26 @ 0x2500 │ │ - ldc2l 13, cr5, [lr, #516] @ 0x204 │ │ + ldc2l 13, cr5, [lr, #696] @ 0x2b8 │ │ ldc2l 2, cr5, [pc, #940] @ 245c14c │ │ cmneq pc, #64, 12 @ 0x4000000 │ │ cmneq r0, #152, 28 @ 0x980 │ │ ldc2l 0, cr5, [pc, #176] @ 245be5c │ │ ldc2l 2, cr5, [pc, #492] @ 245bf9c │ │ cmneq sl, #96 @ 0x60 │ │ streq lr, [r3], #-1644 @ 0xfffff994 │ │ @@ -1331577,23 +1331576,23 @@ │ │ cmneq sl, #244, 30 @ 0x3d0 │ │ ldc2l 15, cr4, [pc, #32] @ 245c1b4 │ │ ldc2l 1, cr5, [pc, #364] @ 245c304 │ │ cmneq sl, #84, 30 @ 0x150 │ │ ldc2l 14, cr4, [pc, #832] @ 245c4e0 │ │ ldc2l 1, cr5, [pc, #140] @ 245c230 │ │ cmneq sl, #24, 30 @ 0x60 │ │ - ldc2l 7, cr11, [sp, #828] @ 0x33c │ │ + ldc2l 7, cr11, [sp, #1008] @ 0x3f0 │ │ ldc2l 0, cr5, [pc, #844] @ 245c4fc │ │ @ instruction: 0x03b88400 │ │ cmneq sl, #168, 28 @ 0xa80 │ │ cmneq r4, #216, 14 @ 0x3600000 │ │ - ldc2l 11, cr7, [fp, #668] @ 0x29c @ │ │ + ldc2l 11, cr7, [fp, #848] @ 0x350 @ │ │ ldc2l 0, cr5, [pc, #316] @ 245c300 │ │ cmneq r0, #24, 24 @ 0x1800 │ │ - ldc2l 11, cr7, [fp, #404] @ 0x194 @ │ │ + ldc2l 11, cr7, [fp, #584] @ 0x248 @ │ │ cmneq r2, #104, 8 @ 0x68000000 │ │ ldr r6, [pc, #3936] @ 245d134 │ │ mov r1, r4 │ │ ldr r2, [pc, #3932] @ 245d138 │ │ movw r3, #2798 @ 0xaee │ │ add r6, pc, r6 │ │ add r2, pc, r2 │ │ @@ -1331709,15 +1331708,15 @@ │ │ mov r0, #0 │ │ str r0, [sp, #16] │ │ b 245a194 │ │ ldc2l 1, cr3, [pc, #496] @ 245c59c │ │ ldc2l 15, cr4, [pc, #812] @ 245c6dc │ │ cmneq r4, #252, 12 @ 0xfc00000 │ │ @ instruction: 0x03b882f0 │ │ - ldc2l 0, cr15, [lr, #792] @ 0x318 │ │ + ldc2l 0, cr15, [lr, #972] @ 0x3cc │ │ ldr r1, [sp, #16] │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ cmp r1, #2 │ │ mov r0, r1 │ │ bcc 245c3e8 │ │ ldr r0, [pc, #4076] @ 245d3c0 │ │ movw r3, #3263 @ 0xcbf │ │ @@ -1331754,22 +1331753,22 @@ │ │ bl 270d970 │ │ ldr r1, [pc, #4052] @ 245d42c │ │ mov r0, r6 │ │ mov r2, #15 │ │ mov r3, #7 │ │ add r1, pc, r1 │ │ b 245a190 │ │ - ldc2l 4, cr9, [lr, #440] @ 0x1b8 │ │ + ldc2l 4, cr9, [lr, #620] @ 0x26c │ │ ldc2l 14, cr4, [pc, #1004] @ 245c860 │ │ - ldc2l 9, cr5, [lr, #138] @ 0x8a @ │ │ + ldc2l 9, cr5, [lr, #228] @ 0xe4 @ │ │ ldc2l 14, cr4, [pc, #700] @ 245c738 │ │ cmneq pc, #252, 2 @ 0x3f │ │ - ldc2l 3, cr9, [lr, #872] @ 0x368 │ │ + ldc2l 4, cr9, [lr, #28] │ │ ldc2l 14, cr4, [pc, #412] @ 245c624 │ │ - ldc2l 8, cr5, [lr, #724] @ 0x2d4 │ │ + vcadd.f32 , q15, q9, #270 │ │ ldc2l 14, cr4, [pc, #124] @ 245c50c │ │ cmneq pc, #120, 2 │ │ ldr r0, [pc, #4044] @ 245d464 │ │ movw r3, #2948 @ 0xb84 │ │ ldr sl, [pc, #4040] @ 245d468 │ │ mov r9, r5 │ │ add r0, pc, r0 │ │ @@ -1331834,15 +1331833,15 @@ │ │ ldr r0, [pc, #3984] @ 245d524 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r4, lsl #2] │ │ cmp r0, #1 │ │ bge 245c788 │ │ ldr r6, [sp, #40] @ 0x28 │ │ b 245bd18 │ │ - ldc2l 3, cr9, [lr, #88] @ 0x58 │ │ + ldc2l 3, cr9, [lr, #268] @ 0x10c │ │ ldc2l 13, cr4, [pc, #652] @ 245c840 │ │ ldr r0, [pc, #3952] @ 245d528 │ │ mov r1, r5 │ │ ldr r4, [pc, #3948] @ 245d52c │ │ movw r3, #2993 @ 0xbb1 │ │ add r0, pc, r0 │ │ add r4, pc, r4 │ │ @@ -1331868,21 +1331867,21 @@ │ │ ldr r7, [r1, r0, lsl #2] │ │ str r7, [sp, #120] @ 0x78 │ │ cmp r7, #1 │ │ blt 245d058 │ │ ldr r0, [sp, #8] │ │ sub r4, r0, #1 │ │ b 245c668 │ │ - vcadd.f32 d23, d27, d27, #270 │ │ + ldc2l 8, cr7, [fp, #864] @ 0x360 │ │ ldc2l 13, cr4, [pc, #348] @ 245c798 │ │ - ldc2l 2, cr9, [lr, #552] @ 0x228 │ │ + ldc2l 2, cr9, [lr, #732] @ 0x2dc │ │ ldc2l 13, cr4, [pc, #92] @ 245c6a0 │ │ - vcadd.f32 d23, d11, d19, #270 │ │ + ldc2l 8, cr7, [fp, #320] @ 0x140 │ │ ldc2l 12, cr4, [pc, #828] @ 245c988 │ │ - ldc2l 0, cr9, [lr, #696] @ 0x2b8 │ │ + ldc2l 0, cr9, [lr, #876] @ 0x36c │ │ ldc2l 12, cr4, [pc, #572] @ 245c890 │ │ ldr r7, [sl, r1, lsl #2] │ │ movw r2, #34464 @ 0x86a0 │ │ movt r2, #1 │ │ str r7, [sp, #120] @ 0x78 │ │ cmp r7, #0 │ │ ble 245d058 │ │ @@ -1331927,15 +1331926,15 @@ │ │ movw r3, #3013 @ 0xbc5 │ │ ldr r2, [pc, #3660] @ 245d558 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 245c650 │ │ - ldc2l 13, cr14, [lr, #384] @ 0x180 │ │ + ldc2l 13, cr14, [lr, #564] @ 0x234 │ │ ldc2l 12, cr4, [pc, #172] @ 245c7d4 │ │ cmneq r3, #232, 16 @ 0xe80000 │ │ cmneq r4, #116, 30 @ 0x1d0 │ │ ldr sl, [pc, #4092] @ 245d730 │ │ mov r1, r4 │ │ movw r3, #2957 @ 0xb8d │ │ mov r9, r5 │ │ @@ -1331971,32 +1331970,32 @@ │ │ bl 270e080 │ │ ldr r1, [pc, #3972] @ 245d740 │ │ mov r0, r6 │ │ mov r2, #15 │ │ mov r3, #6 │ │ add r1, pc, r1 │ │ b 245a190 │ │ - ldc2l 6, cr7, [fp, #724] @ 0x2d4 │ │ + ldc2l 6, cr7, [fp, #904] @ 0x388 │ │ ldc2l 11, cr4, [pc, #412] @ 245c974 @ │ │ cmneq r1, #192, 30 @ 0x300 @ │ │ cmneq fp, #140, 10 @ 0x23000000 │ │ cmneq pc, #108, 28 @ 0x6c0 │ │ - ldc2l 6, cr15, [sp, #248] @ 0xf8 │ │ + ldc2l 6, cr15, [sp, #428] @ 0x1ac │ │ ldc2l 10, cr4, [pc, #716] @ 245cab8 @ │ │ - ldc2l 0, cr7, [lr, #708] @ 0x2c4 │ │ + ldc2l 0, cr7, [lr, #888] @ 0x378 │ │ cmneq fp, #196, 8 @ 0xc4000000 │ │ cmneq r1, #184, 28 @ 0xb80 @ │ │ ldc2l 11, cr2, [pc, #576] @ 245ca3c @ │ │ ldc2l 9, cr4, [pc, #438] @ 245c9b6 @ │ │ cmneq r4, #8, 2 │ │ ldc2l 7, cr4, [pc, #368] @ 245c978 │ │ cmneq sl, #156, 14 @ 0x2700000 │ │ ldc2l 9, cr4, [pc, #254] @ 245c90e @ │ │ streq sp, [r3], #-3488 @ 0xfffff260 │ │ - ldc2l 13, cr8, [lr, #364] @ 0x16c │ │ + ldc2l 13, cr8, [lr, #544] @ 0x220 │ │ cmneq fp, #128, 6 │ │ mov r8, r0 │ │ ldr r0, [pc, #3872] @ 245d744 │ │ ldr r5, [pc, #3872] @ 245d748 │ │ mov r1, r4 │ │ add r0, pc, r0 │ │ movw r3, #2843 @ 0xb1b │ │ @@ -1332148,15 +1332147,15 @@ │ │ mov r0, r4 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ cmp r7, r6 │ │ mov r6, r4 │ │ moveq r7, r9 │ │ b 245a194 │ │ - ldc2l 10, cr14, [lr, #80] @ 0x50 @ │ │ + ldc2l 10, cr14, [lr, #260] @ 0x104 @ │ │ ldc2l 8, cr4, [pc, #892] @ 245ce18 │ │ ldr r5, [sp, #20] │ │ movw r0, #9999 @ 0x270f │ │ str r5, [fp, #-56] @ 0xffffffc8 │ │ str r7, [fp, #-68] @ 0xffffffbc │ │ cmp r5, r0 │ │ ldr r8, [pc, #3916] @ 245da00 │ │ @@ -1332180,20 +1332179,20 @@ │ │ bl 270d9c0 │ │ ldr sl, [pc, #4076] @ 245daec │ │ mov r4, r0 │ │ mov r5, r9 │ │ add sl, pc, sl │ │ b 245bd18 │ │ streq r4, [r3], #-60 @ 0xffffffc4 │ │ - ldc2l 5, cr1, [ip, #564] @ 0x234 │ │ - ldc2l 3, cr7, [ip, #676] @ 0x2a4 │ │ - ldc2l 0, cr9, [sp, #236] @ 0xec │ │ + ldc2l 5, cr1, [ip, #744] @ 0x2e8 │ │ + ldc2l 3, cr7, [ip, #856] @ 0x358 │ │ + ldc2l 0, cr9, [sp, #416] @ 0x1a0 │ │ ldc2l 7, cr4, [pc, #812] @ 245ce50 │ │ cmneq r4, #60, 22 @ 0xf000 │ │ - ldc2l 12, cr8, [lr, #1000] @ 0x3e8 │ │ + ldc2l 13, cr8, [lr, #156] @ 0x9c │ │ streq sp, [r3], #-2972 @ 0xfffff464 │ │ ldr r0, [pc, #4028] @ 245daf0 │ │ mov r1, r5 │ │ ldr r2, [pc, #4024] @ 245daf4 │ │ movw r3, #3034 @ 0xbda │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1332263,21 +1332262,21 @@ │ │ cmp r5, r0 │ │ bhi 245cc80 │ │ ldr r6, [pc, #3892] @ 245db84 │ │ mov r0, r5 │ │ add r6, pc, r6 │ │ ldr r4, [r6, r5, lsl #2] │ │ b 245ccec │ │ - ldc2l 13, cr12, [lr, #924] @ 0x39c │ │ + ldc2l 14, cr12, [lr, #80] @ 0x50 │ │ ldc2l 7, cr4, [pc, #204] @ 245cd34 │ │ biceq r3, r6, #4, 12 @ 0x400000 │ │ - ldc2l 2, cr7, [fp, #148] @ 0x94 │ │ + ldc2l 2, cr7, [fp, #328] @ 0x148 │ │ ldc2l 6, cr4, [pc, #860] @ 245cfd0 │ │ cmneq r1, #44, 22 @ 0xb000 @ │ │ - ldc2l 1, cr7, [fp, #884] @ 0x374 │ │ + ldc2l 2, cr7, [fp, #40] @ 0x28 │ │ ldc2l 6, cr4, [pc, #572] @ 245cebc │ │ cmneq r1, #228, 20 @ 0xe4000 @ │ │ mov sl, r8 │ │ mov r8, r9 │ │ ldr r9, [pc, #3832] @ 245db88 │ │ mov r1, r5 │ │ ldr r5, [pc, #3828] @ 245db8c │ │ @@ -1332326,18 +1332325,18 @@ │ │ ldr r1, [fp, #8] │ │ vldr d16, [r0] │ │ vldr d17, [r1] │ │ vcmp.f64 d17, d16 │ │ vmrs APSR_nzcv, fpscr │ │ bmi 245cf20 │ │ b 245db94 │ │ - ldc2l 12, cr6, [lr, #692] @ 0x2b4 │ │ + ldc2l 12, cr6, [lr, #872] @ 0x368 │ │ ldc2l 5, cr4, [pc, #764] @ 245d060 │ │ cmneq r2, #80, 12 @ 0x5000000 │ │ - ldc2l 12, cr6, [lr, #436] @ 0x1b4 │ │ + ldc2l 12, cr6, [lr, #616] @ 0x268 │ │ ldc2l 5, cr4, [pc, #508] @ 245cf6c │ │ cmneq r2, #24, 12 @ 0x1800000 │ │ cmneq pc, #192, 16 @ 0xc00000 │ │ ldc2l 2, cr4, [pc, #960] @ 245d13c │ │ ldc2l 5, cr4, [pc, #268] @ 245ce8c │ │ cmneq sl, #44, 6 @ 0xb0000000 │ │ ldr r0, [pc, #3920] @ 245dcd8 │ │ @@ -1332405,32 +1332404,32 @@ │ │ add r1, pc, r1 │ │ add r0, r1, r0, lsl #3 │ │ b 245cfcc │ │ ldc2l 2, cr4, [pc, #704] @ 245d14c │ │ ldc2l 5, cr4, [pc, #12] @ 245ce9c │ │ cmneq sl, #252, 4 @ 0xc000000f │ │ cmneq pc, #68, 16 @ 0x440000 │ │ - ldc2l 2, cr9, [fp, #984] @ 0x3d8 │ │ + ldc2l 3, cr9, [fp, #140] @ 0x8c │ │ ldc2l 4, cr4, [pc, #796] @ 245d1bc │ │ cmneq r3, #184, 30 @ 0x2e0 │ │ - ldc2l 2, cr9, [fp, #728] @ 0x2d8 │ │ + ldc2l 2, cr9, [fp, #908] @ 0x38c │ │ ldc2l 4, cr4, [pc, #540] @ 245d0c8 │ │ cmneq r3, #128, 30 @ 0x200 │ │ cmneq pc, #200, 14 @ 0x3200000 │ │ ldc2l 5, cr2, [pc, #1008] @ 245d2a8 │ │ ldc2l 4, cr4, [pc, #300] @ 245cfe8 │ │ cmneq r4, #124, 22 @ 0x1f000 │ │ ldc2l 5, cr2, [pc, #752] @ 245d1b4 │ │ ldc2l 4, cr4, [pc, #44] @ 245cef4 │ │ cmneq r4, #68, 22 @ 0x11000 │ │ cmneq pc, #76, 14 @ 0x1300000 │ │ - ldc2l 15, cr6, [fp, #116] @ 0x74 │ │ + ldc2l 15, cr6, [fp, #296] @ 0x128 │ │ ldc2l 3, cr4, [pc, #828] @ 245d214 │ │ cmneq r1, #32, 16 @ 0x200000 @ │ │ - ldc2l 14, cr6, [fp, #884] @ 0x374 │ │ + ldc2l 15, cr6, [fp, #40] @ 0x28 │ │ ldc2l 3, cr4, [pc, #572] @ 245d120 │ │ ldr r0, [fp, #8] │ │ sub r4, r4, #5 │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ movw r3, #3066 @ 0xbfa │ │ mov r1, r4 │ │ vldr d8, [r0] │ │ @@ -1332501,19 +1332500,19 @@ │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 245cc2c │ │ cmneq r1, #232, 14 @ 0x3a00000 @ │ │ cmneq pc, #208, 12 @ 0xd000000 │ │ - ldc2l 13, cr4, [lr, #932] @ 0x3a4 │ │ + ldc2l 14, cr4, [lr, #88] @ 0x58 │ │ ldc2l 3, cr4, [pc, #332] @ 245d16c │ │ cmneq r0, #36, 30 @ 0x90 │ │ cmneq pc, #156, 12 @ 0x9c00000 │ │ - ldc2l 13, cr4, [lr, #612] @ 0x264 │ │ + ldc2l 13, cr4, [lr, #792] @ 0x318 │ │ ldc2l 3, cr4, [pc, #12] @ 245d03c │ │ rsb r0, r7, #0 │ │ str r0, [fp, #-56] @ 0xffffffc8 │ │ sub r0, fp, #56 @ 0x38 │ │ mov r1, sl │ │ bl 270e040 │ │ rsb r0, r0, #0 │ │ @@ -1332538,17 +1332537,17 @@ │ │ str r0, [sp, #4] │ │ ldr r7, [pc, #4008] @ 245e040 │ │ ldr r5, [sp, #20] │ │ add r7, pc, r7 │ │ b 245d0fc │ │ cmneq pc, #92, 12 @ 0x5c00000 │ │ cmneq pc, #64, 12 @ 0x4000000 │ │ - ldc2l 14, cr6, [fp, #92] @ 0x5c │ │ + ldc2l 14, cr6, [fp, #272] @ 0x110 │ │ ldc2l 2, cr4, [pc, #780] @ 245d3c0 │ │ - ldc2l 13, cr6, [fp, #876] @ 0x36c │ │ + ldc2l 14, cr6, [fp, #32] │ │ ldc2l 2, cr4, [pc, #540] @ 245d2d8 │ │ ldr r0, [sp, #12] │ │ str r5, [fp, #-56] @ 0xffffffc8 │ │ vldr d16, [r0] │ │ mov r0, r5 │ │ ldr r5, [pc, #3956] @ 245e044 │ │ vcmp.f64 d16, d8 │ │ @@ -1332573,15 +1332572,15 @@ │ │ ldr r5, [r7, r5, lsl #2] │ │ str r0, [fp, #-56] @ 0xffffffc8 │ │ b 245d188 │ │ cmneq pc, #204, 10 @ 0x33000000 │ │ ldc2l 4, cr2, [pc, #24] @ 245d148 │ │ ldc2l 2, cr4, [pc, #316] @ 245d270 │ │ biceq r9, r5, #224, 8 @ 0xe0000000 │ │ - ldc2l 13, cr6, [fp, #36] @ 0x24 │ │ + ldc2l 13, cr6, [fp, #216] @ 0xd8 │ │ ldc2l 1, cr4, [pc, #748] @ 245d42c │ │ cmneq r1, #12, 12 @ 0xc00000 @ │ │ ldc2l 1, cr4, [pc, #396] @ 245d2d4 │ │ cmneq r1, #172, 10 @ 0x2b000000 @ │ │ ldr r4, [pc, #3832] @ 245e048 │ │ mov r1, r5 │ │ ldr r6, [pc, #3828] @ 245e04c │ │ @@ -1332652,15 +1332651,15 @@ │ │ vcmp.f64 d16, d8 │ │ vmrs APSR_nzcv, fpscr │ │ vmovge.f64 d8, d16 │ │ b 245d334 │ │ ldc2l 14, cr3, [pc, #880] @ 245d5dc │ │ cmneq sl, #44, 30 @ 0xb0 │ │ cmneq pc, #112, 8 @ 0x70000000 │ │ - ldc2l 7, cr10, [sp, #972] @ 0x3cc │ │ + vcadd.f32 d26, d13, d16, #270 │ │ ldc2l 0, cr4, [pc, #988] @ 245d658 │ │ @ instruction: 0x03b87424 │ │ vldr d8, [sp, #72] @ 0x48 │ │ vcmp.f64 d16, d8 │ │ vmrs APSR_nzcv, fpscr │ │ bpl 245da08 │ │ movw r0, #9999 @ 0x270f │ │ @@ -1332672,19 +1332671,19 @@ │ │ mov r0, r5 │ │ ldr r5, [pc, #3924] @ 245e204 │ │ vcmp.f64 d16, d8 │ │ add r5, pc, r5 │ │ vmrs APSR_nzcv, fpscr │ │ vmovls.f64 d8, d16 │ │ b 245d0dc │ │ - ldc2l 14, cr8, [fp, #904] @ 0x388 │ │ + ldc2l 15, cr8, [fp, #60] @ 0x3c │ │ ldc2l 0, cr4, [pc, #716] @ 245d598 │ │ cmneq r3, #172, 22 @ 0x2b000 │ │ cmneq pc, #240, 6 @ 0xc0000003 │ │ - ldc2l 7, cr10, [sp, #460] @ 0x1cc │ │ + ldc2l 7, cr10, [sp, #640] @ 0x280 │ │ ldc2l 0, cr4, [pc, #476] @ 245d4b8 │ │ @ instruction: 0x03b873a8 │ │ ldr r8, [pc, #3876] @ 245e208 │ │ mov r1, r5 │ │ ldr r6, [pc, #3872] @ 245e20c │ │ movw r3, #3177 @ 0xc69 │ │ add r8, pc, r8 │ │ @@ -1332706,15 +1332705,15 @@ │ │ vmrs APSR_nzcv, fpscr │ │ vmovls.f64 d8, d16 │ │ bl 270d9c0 │ │ b 245d0dc │ │ ldc2l 1, cr2, [pc, #944] @ 245d6f4 │ │ ldc2l 0, cr4, [pc, #236] @ 245d434 │ │ cmneq r4, #100, 14 @ 0x1900000 │ │ - ldc2l 6, cr6, [lr, #140] @ 0x8c │ │ + ldc2l 6, cr6, [lr, #320] @ 0x140 │ │ subs r7, sl, #1 │ │ mov r5, #0 │ │ beq 245d3c8 │ │ sub r1, sl, #2 │ │ movw r0, #5002 @ 0x138a │ │ cmp sl, r0 │ │ str r1, [fp, #-56] @ 0xffffffc8 │ │ @@ -1332736,15 +1332735,15 @@ │ │ cmp r0, #0 │ │ bne 245d4dc │ │ cmp sl, #1 │ │ mov sl, r7 │ │ ldr r7, [sp, #24] │ │ bgt 245d090 │ │ b 245d3cc │ │ - ldc2l 11, cr14, [sp, #296] @ 0x128 @ │ │ + ldc2l 11, cr14, [sp, #476] @ 0x1dc @ │ │ ldc2l 15, cr3, [pc, #764] @ 245d6c8 │ │ ldr r7, [sp, #24] │ │ ldr r2, [sp, #20] │ │ movw r0, #10000 @ 0x2710 │ │ str r2, [fp, #-56] @ 0xffffffc8 │ │ cmp r2, r0 │ │ bcc 245d400 │ │ @@ -1332761,34 +1332760,34 @@ │ │ ldr r0, [pc, #3848] @ 245e318 │ │ mov r1, #0 │ │ add r8, pc, r8 │ │ mov sl, r9 │ │ add r0, pc, r0 │ │ str r1, [r0, r2, lsl #2] │ │ b 245b3fc │ │ - ldc2l 5, cr6, [lr, #564] @ 0x234 │ │ - ldc2l 7, cr8, [sp, #936] @ 0x3a8 │ │ - ldc2l 11, cr2, [lr, #72] @ 0x48 @ │ │ + ldc2l 5, cr6, [lr, #744] @ 0x2e8 │ │ + ldc2l 8, cr8, [sp, #92] @ 0x5c │ │ + ldc2l 11, cr2, [lr, #252] @ 0xfc @ │ │ cmp r7, #1 │ │ blt 245d4dc │ │ sub r4, r7, #1 │ │ movw r0, #10001 @ 0x2711 │ │ cmp r7, r0 │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ bcs 245d478 │ │ ldr r1, [pc, #3784] @ 245e31c │ │ mov r0, #0 │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ add r1, pc, r1 │ │ str r0, [r1, r4, lsl #2] │ │ b 245d4cc │ │ - ldc2l 7, cr8, [sp, #412] @ 0x19c │ │ + ldc2l 7, cr8, [sp, #592] @ 0x250 │ │ ldc2l 14, cr3, [pc, #988] @ 245d84c │ │ cmneq r4, #104, 4 @ 0x80000006 │ │ - ldc2l 4, cr8, [lr, #152] @ 0x98 │ │ + ldc2l 4, cr8, [lr, #332] @ 0x14c │ │ streq sp, [r3], #-708 @ 0xfffffd3c │ │ ldr r0, [pc, #3744] @ 245e320 │ │ mov r1, r4 │ │ ldr r5, [pc, #3740] @ 245e324 │ │ movw r3, #3284 @ 0xcd4 │ │ add r0, pc, r0 │ │ add r5, pc, r5 │ │ @@ -1332821,31 +1332820,31 @@ │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ eoreq ip, pc, r0, asr r7 @ │ │ ldr r7, [pc, #3628] @ 245e338 │ │ add r7, pc, r7 │ │ mov r8, r7 │ │ b 2459b14 │ │ - ldc2l 5, cr12, [lr, #60] @ 0x3c │ │ + ldc2l 5, cr12, [lr, #240] @ 0xf0 │ │ ldc2l 14, cr3, [pc, #364] @ 245d68c │ │ biceq r2, r6, #44, 26 @ 0xb00 │ │ - ldc2l 9, cr6, [fp, #194] @ 0xc2 @ │ │ + ldc2l 9, cr6, [fp, #284] @ 0x11c @ │ │ cmneq r1, #112, 4 @ │ │ - ldc2l 0, cr9, [ip, #760] @ 0x2f8 │ │ + ldc2l 0, cr9, [ip, #940] @ 0x3ac │ │ ldc2l 13, cr3, [pc, #860] @ 245d890 │ │ streq r3, [r3], #-1440 @ 0xfffffa60 │ │ - ldc2l 8, cr6, [fp, #964] @ 0x3c4 │ │ - ldc2l 5, cr8, [sp, #1004] @ 0x3ec │ │ + ldc2l 9, cr6, [fp, #60] @ 0x3c @ │ │ + ldc2l 6, cr8, [sp, #160] @ 0xa0 │ │ cmneq r1, #240, 2 @ 0x3c @ │ │ ldc2l 13, cr3, [pc, #76] @ 245d594 │ │ cmneq r4, #136 @ 0x88 │ │ - ldc2l 14, cr13, [lr, #48] @ 0x30 │ │ + ldc2l 14, cr13, [lr, #228] @ 0xe4 │ │ ldc2l 12, cr3, [pc, #860] @ 245d8b0 │ │ cmneq r3, #176, 18 @ 0x2c0000 │ │ - ldc2l 0, cr8, [lr, #696] @ 0x2b8 │ │ + ldc2l 0, cr8, [lr, #876] @ 0x36c │ │ ldc2l 12, cr3, [pc, #572] @ 245d79c │ │ ldr r0, [fp, #-68] @ 0xffffffbc │ │ add r1, r0, r0, lsl #2 │ │ sub r0, r0, #1 │ │ sub r5, r1, #5 │ │ cmp r0, r3 │ │ str r5, [fp, #-56] @ 0xffffffc8 │ │ @@ -1332960,15 +1332959,15 @@ │ │ vstr d9, [r0] │ │ mov r0, r4 │ │ b 245d798 │ │ ldc2l 12, cr3, [pc, #380] @ 245d8b4 │ │ cmneq r1, #176 @ 0xb0 @ │ │ streq sp, [r3], #-60 @ 0xffffffc4 │ │ cmneq r1, #112 @ 0x70 @ │ │ - ldc2l 13, cr14, [fp, #60] @ 0x3c │ │ + ldc2l 13, cr14, [fp, #240] @ 0xf0 │ │ ldc2l 13, cr1, [pc, #152] @ 245d7e4 │ │ ldc2l 11, cr3, [pc, #428] @ 245d8fc @ │ │ ldr r0, [pc, #3112] @ 245e37c │ │ mov r1, r4 │ │ ldr r5, [pc, #3108] @ 245e380 │ │ movw r3, #2666 @ 0xa6a │ │ add r0, pc, r0 │ │ @@ -1333021,24 +1333020,24 @@ │ │ add r1, pc, r1 │ │ str r0, [r1, r4, lsl #2] │ │ add r0, r6, r4, lsl #3 │ │ vstr d8, [r0] │ │ mov r0, r4 │ │ b 245d8e8 │ │ cmneq fp, #136, 10 @ 0x22000000 │ │ - ldc2l 11, cr0, [sp, #1016] @ 0x3f8 @ │ │ + ldc2l 12, cr0, [sp, #172] @ 0xac │ │ cmneq pc, #132, 28 @ 0x840 │ │ - ldc2l 11, cr0, [sp, #824] @ 0x338 @ │ │ + ldc2l 11, cr0, [sp, #1004] @ 0x3ec @ │ │ ldc2l 11, cr3, [pc, #28] @ 245d864 @ │ │ @ instruction: 0x03bf7310 │ │ cmneq pc, #44, 28 @ 0x2c0 │ │ - ldc2l 13, cr8, [ip, #600] @ 0x258 │ │ + ldc2l 13, cr8, [ip, #780] @ 0x30c │ │ ldc2l 10, cr3, [pc, #700] @ 245db14 @ │ │ streq r3, [r3], #-640 @ 0xfffffd80 │ │ - ldc2l 13, cr8, [ip, #344] @ 0x158 │ │ + ldc2l 13, cr8, [ip, #524] @ 0x20c │ │ ldc2l 10, cr3, [pc, #444] @ 245da20 @ │ │ streq r3, [r3], #-584 @ 0xfffffdb8 │ │ cmneq pc, #176, 26 @ 0x2c00 │ │ ldr r0, [pc, #2860] @ 245e39c │ │ mov r1, r4 │ │ ldr r5, [pc, #2856] @ 245e3a0 │ │ movw r3, #2667 @ 0xa6b │ │ @@ -1333091,18 +1333090,18 @@ │ │ add r0, pc, r0 │ │ add r2, r0, r1, lsl #3 │ │ ldr r0, [fp, #12] │ │ mov r1, r3 │ │ bl 270e090 │ │ str r4, [fp, #-56] @ 0xffffffc8 │ │ b 245d9c0 │ │ - ldc2l 13, cr8, [ip, #44] @ 0x2c │ │ + ldc2l 13, cr8, [ip, #224] @ 0xe0 │ │ ldc2l 10, cr3, [pc, #204] @ 245da24 @ │ │ @ instruction: 0x03b8bb84 │ │ - ldc2l 12, cr8, [ip, #828] @ 0x33c │ │ + ldc2l 12, cr8, [ip, #1008] @ 0x3f0 │ │ ldc2l 9, cr3, [pc, #494] @ 245db52 @ │ │ @ instruction: 0x03b8bb4c │ │ cmneq pc, #52, 26 @ 0xd00 │ │ ldr r0, [pc, #2640] @ 245e3c0 │ │ movw r3, #2675 @ 0xa73 │ │ ldr r5, [pc, #2636] @ 245e3c4 │ │ add r0, pc, r0 │ │ @@ -1333127,23 +1333126,23 @@ │ │ ldr r0, [pc, #2572] @ 245e3d4 │ │ mov r1, #1 │ │ ldr r2, [pc, #2568] @ 245e3d8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ str r1, [r2, r4, lsl #2] │ │ b 245d4e4 │ │ - ldc2l 5, cr0, [lr, #684] @ 0x2ac │ │ + ldc2l 5, cr0, [lr, #864] @ 0x360 │ │ ldc2l 9, cr3, [pc, #334] @ 245db36 @ │ │ - ldc2l 5, cr0, [lr, #492] @ 0x1ec │ │ + ldc2l 5, cr0, [lr, #672] @ 0x2a0 │ │ ldc2l 9, cr3, [pc, #238] @ 245dade @ │ │ @ instruction: 0x03b9570c │ │ eoreq ip, pc, r8, lsl r2 @ │ │ cmneq pc, #164, 24 @ 0xa400 │ │ cmneq pc, #144, 24 @ 0x9000 │ │ - ldc2l 10, cr14, [fp, #364] @ 0x16c @ │ │ + ldc2l 10, cr14, [fp, #544] @ 0x220 @ │ │ cmneq r0, #208, 8 @ 0xd0000000 │ │ cmneq r1, #68, 26 @ 0x1100 │ │ ldr r0, [fp, #16] │ │ ldr r1, [fp, #28] │ │ bl 270d2f0 │ │ bl 270db20 │ │ cmp r0, #0 │ │ @@ -1333196,15 +1333195,15 @@ │ │ vmovls.f64 d17, d19 │ │ vmrs APSR_nzcv, fpscr │ │ vstr d17, [r3] │ │ vmovge.f64 d16, d18 │ │ vstr d16, [r7] │ │ b 245e170 │ │ streq ip, [r3], #-3260 @ 0xfffff344 │ │ - ldc2l 3, cr6, [fp, #676] @ 0x2a4 │ │ + ldc2l 3, cr6, [fp, #856] @ 0x358 │ │ ldc2l 8, cr3, [pc, #364] @ 245dc68 │ │ cmneq r1, #180, 24 @ 0xb400 │ │ ldr r0, [pc, #2268] @ 245e3e0 │ │ mov sl, r9 │ │ ldr r9, [pc, #2264] @ 245e3e4 │ │ mov r1, r4 │ │ add r0, pc, r0 │ │ @@ -1333225,24 +1333224,24 @@ │ │ mov r2, r9 │ │ movw r3, #3079 @ 0xc07 │ │ add r0, pc, r0 │ │ mov r1, r5 │ │ str r5, [fp, #-56] @ 0xffffffc8 │ │ bl 270d9c0 │ │ b 245dbb4 │ │ - ldc2l 3, cr6, [fp, #468] @ 0x1d4 │ │ + ldc2l 3, cr6, [fp, #648] @ 0x288 │ │ vcadd.f32 d19, d15, d23, #270 │ │ cmneq r1, #124, 24 @ 0x7c00 │ │ - ldc2l 2, cr4, [lr, #452] @ 0x1c4 │ │ + ldc2l 2, cr4, [lr, #632] @ 0x278 │ │ ldc2l 7, cr3, [pc, #876] @ 245dee8 │ │ cmneq pc, #48, 22 @ 0xc000 │ │ - ldc2l 2, cr6, [fp, #892] @ 0x37c │ │ + ldc2l 3, cr6, [fp, #48] @ 0x30 │ │ ldc2l 7, cr3, [pc, #556] @ 245ddb4 │ │ streq r2, [r3], #-3888 @ 0xfffff0d0 │ │ - ldc2l 9, cr8, [ip, #460] @ 0x1cc @ │ │ + ldc2l 10, cr8, [ip, #76] @ 0x4c @ │ │ ldc2l 6, cr3, [pc, #1020] @ 245df90 │ │ streq r2, [r3], #-3784 @ 0xfffff138 │ │ ldr r1, [pc, #2112] @ 245e3dc │ │ mov sl, r9 │ │ ldr r2, [fp, #12] │ │ add r1, pc, r1 │ │ bl 270e090 │ │ @@ -1333318,18 +1333317,18 @@ │ │ ldr r0, [pc, #1896] @ 245e42c │ │ add r0, pc, r0 │ │ add r0, r0, r5, lsl #3 │ │ vstr d9, [r0] │ │ b 245dd3c │ │ streq ip, [r3], #-2788 @ 0xfffff51c │ │ cmneq fp, #200 @ 0xc8 │ │ - ldc2l 11, cr7, [lr, #488] @ 0x1e8 @ │ │ + ldc2l 11, cr7, [lr, #668] @ 0x29c @ │ │ ldc2l 6, cr3, [pc, #28] @ 245dd00 │ │ cmneq fp, #64 @ 0x40 │ │ - ldc2l 0, cr4, [lr, #340] @ 0x154 │ │ + ldc2l 0, cr4, [lr, #520] @ 0x208 │ │ ldc2l 5, cr3, [pc, #764] @ 245dfec │ │ ldr r0, [pc, #1832] @ 245e41c │ │ mov r1, r5 │ │ ldr r4, [pc, #1828] @ 245e420 │ │ movw r3, #3086 @ 0xc0e │ │ add r0, pc, r0 │ │ add r4, pc, r4 │ │ @@ -1333384,22 +1333383,22 @@ │ │ str r5, [fp, #-56] @ 0xffffffc8 │ │ add r0, pc, r0 │ │ add r0, r0, r5, lsl #3 │ │ vstr d8, [r0] │ │ mov r0, r5 │ │ b 245de84 │ │ cmneq pc, #16, 18 @ 0x40000 │ │ - ldc2l 10, cr7, [lr, #1000] @ 0x3e8 @ │ │ + ldc2l 11, cr7, [lr, #156] @ 0x9c @ │ │ ldc2l 5, cr3, [pc, #540] @ 245e008 │ │ cmneq pc, #220, 16 @ 0xdc0000 │ │ cmneq fp, #176, 30 @ 0x2c0 │ │ - ldc2l 15, cr3, [lr, #788] @ 0x314 │ │ + ldc2l 15, cr3, [lr, #968] @ 0x3c8 │ │ ldc2l 5, cr3, [pc, #188] @ 245deb8 │ │ cmneq pc, #136, 16 @ 0x880000 │ │ - ldc2l 10, cr7, [lr, #40] @ 0x28 @ │ │ + ldc2l 10, cr7, [lr, #220] @ 0xdc @ │ │ ldc2l 4, cr3, [pc, #604] @ 245e064 │ │ ldr r0, [pc, #1588] @ 245e440 │ │ mov r1, r5 │ │ ldr r4, [pc, #1584] @ 245e444 │ │ movw r3, #3087 @ 0xc0f │ │ add r0, pc, r0 │ │ add r4, pc, r4 │ │ @@ -1333460,22 +1333459,22 @@ │ │ ldr r1, [r1, r5, lsl #2] │ │ ldr r3, [pc, #1396] @ 245e474 │ │ str r5, [fp, #-56] @ 0xffffffc8 │ │ add r3, pc, r3 │ │ add r6, r1, r0 │ │ str r2, [r3, r5, lsl #2] │ │ b 245e008 │ │ - ldc2l 15, cr5, [fp, #684] @ 0x2ac │ │ + ldc2l 15, cr5, [fp, #864] @ 0x360 │ │ ldc2l 4, cr3, [pc, #348] @ 245e078 │ │ - ldc2l 9, cr7, [lr, #316] @ 0x13c @ │ │ + ldc2l 9, cr7, [lr, #406] @ 0x196 @ │ │ ldc2l 4, cr3, [pc, #172] @ 245dfd0 │ │ cmneq fp, #92, 28 @ 0x5c0 │ │ - ldc2l 15, cr5, [fp, #188] @ 0xbc │ │ + ldc2l 15, cr5, [fp, #368] @ 0x170 │ │ ldc2l 3, cr3, [pc, #876] @ 245e29c │ │ - ldc2l 7, cr7, [lr, #760] @ 0x2f8 │ │ + ldc2l 7, cr7, [lr, #940] @ 0x3ac │ │ ldc2l 3, cr3, [pc, #636] @ 245e1b4 │ │ ldr r0, [pc, #1340] @ 245e478 │ │ movw r3, #3095 @ 0xc17 │ │ ldr r4, [pc, #1336] @ 245e47c │ │ add r0, pc, r0 │ │ add r4, pc, r4 │ │ mov r2, r4 │ │ @@ -1333538,15 +1333537,15 @@ │ │ mov r2, r4 │ │ bl 270e030 │ │ b 245d4dc │ │ cmneq pc, #140, 12 @ 0x8c00000 │ │ cmneq r0, #252, 28 @ 0xfc0 │ │ streq r2, [r3], #-2792 @ 0xfffff518 │ │ cmneq pc, #48, 12 @ 0x3000000 │ │ - ldc2l 5, cr8, [ip, #152] @ 0x98 │ │ + ldc2l 5, cr8, [ip, #332] @ 0x14c │ │ ldc2l 2, cr3, [pc, #252] @ 245e150 │ │ eoreq fp, pc, ip, lsr #21 │ │ eoreq fp, pc, ip, lsr #21 │ │ ldr r5, [pc, #1112] @ 245e4b8 │ │ movw r3, #3196 @ 0xc7c │ │ ldr r4, [pc, #1108] @ 245e4bc │ │ ldr r7, [sp, #20] │ │ @@ -1333646,19 +1333645,19 @@ │ │ ldr r1, [r1, r7, lsl #2] │ │ ldr r3, [pc, #768] @ 245e4e8 │ │ str r7, [fp, #-56] @ 0xffffffc8 │ │ add r3, pc, r3 │ │ add r6, r1, r0 │ │ str r2, [r3, r7, lsl #2] │ │ b 245e2e0 │ │ - ldc2l 12, cr3, [lr, #84] @ 0x54 │ │ + ldc2l 12, cr3, [lr, #264] @ 0x108 │ │ ldc2l 1, cr3, [pc, #508] @ 245e400 │ │ cmneq pc, #188, 8 @ 0xbc000000 │ │ cmneq r0, #208, 24 @ 0xd000 │ │ - ldc2l 11, cr5, [fp, #1020] @ 0x3fc @ │ │ + ldc2l 12, cr5, [fp, #176] @ 0xb0 │ │ ldc2l 0, cr3, [pc, #684] @ 245e4c0 │ │ ldr r0, [pc, #724] @ 245e4ec │ │ movw r3, #3205 @ 0xc85 │ │ ldr r4, [pc, #720] @ 245e4f0 │ │ add r0, pc, r0 │ │ add r4, pc, r4 │ │ mov r2, r4 │ │ @@ -1333712,147 +1333711,147 @@ │ │ ldr r1, [pc, #552] @ 245e514 │ │ ldr r2, [sp, #20] │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ str r6, [r1, r2, lsl #2] │ │ b 245d4e4 │ │ cmneq r0, #104, 24 @ 0x6800 │ │ - ldc2l 1, cr13, [lr, #336] @ 0x150 │ │ + ldc2l 1, cr13, [lr, #516] @ 0x204 │ │ ldc2l 0, cr3, [pc, #124] @ 245e388 │ │ cmneq r3, #244, 24 @ 0xf400 │ │ - ldc2l 2, cr8, [ip, #568] @ 0x238 │ │ + ldc2l 2, cr8, [ip, #748] @ 0x2ec │ │ ldc2l 15, cr2, [pc, #668] @ 245e5b4 │ │ cmneq fp, #208, 18 @ 0x340000 │ │ streq r2, [r3], #-1896 @ 0xfffff898 │ │ @ instruction: 0x03b8b0a8 │ │ - ldc2l 1, cr8, [ip, #924] @ 0x39c │ │ + ldc2l 2, cr8, [ip, #80] @ 0x50 │ │ ldc2l 15, cr2, [pc, #60] @ 245e368 │ │ - ldc2l 1, cr8, [ip, #872] @ 0x368 │ │ + ldc2l 2, cr8, [ip, #28] │ │ @ instruction: 0x03b8b054 │ │ streq r2, [r3], #-1708 @ 0xfffff954 │ │ - ldc2l 10, cr7, [sp, #216] @ 0xd8 @ │ │ + ldc2l 10, cr7, [sp, #396] @ 0x18c @ │ │ cmneq pc, #232, 2 @ 0x3a │ │ - ldc2l 3, cr7, [lr, #520] @ 0x208 │ │ + ldc2l 3, cr7, [lr, #700] @ 0x2bc │ │ ldc2l 14, cr2, [pc, #60] @ 245e384 │ │ strhteq fp, [pc], -r8 │ │ cmneq fp, #56, 16 @ 0x380000 │ │ - ldc2l 4, cr11, [lr, #412] @ 0x19c │ │ + ldc2l 4, cr11, [lr, #592] @ 0x250 │ │ ldc2l 13, cr2, [pc, #716] @ 245e624 │ │ biceq r1, r6, #124, 24 @ 0x7c00 │ │ - ldc2l 5, cr7, [sp, #812] @ 0x32c │ │ + ldc2l 5, cr7, [sp, #992] @ 0x3e0 │ │ ldc2l 13, cr2, [pc, #364] @ 245e4d0 │ │ cmneq r4, #196 @ 0xc4 │ │ - ldc2l 7, cr3, [lr, #612] @ 0x264 │ │ + ldc2l 7, cr3, [lr, #792] @ 0x318 │ │ ldc2l 13, cr2, [pc, #12] @ 245e37c │ │ cmneq pc, #80 @ 0x50 │ │ - ldc2l 2, cr7, [lr, #184] @ 0xb8 │ │ + ldc2l 2, cr7, [lr, #364] @ 0x16c │ │ ldc2l 12, cr2, [pc, #748] @ 245e668 │ │ cmneq fp, #236, 12 @ 0xec00000 │ │ - ldc2l 6, cr3, [lr, #836] @ 0x344 │ │ + ldc2l 6, cr3, [lr, #1016] @ 0x3f8 │ │ ldc2l 12, cr2, [pc, #236] @ 245e474 │ │ - ldc2l 7, cr5, [fp, #460] @ 0x1cc │ │ + ldc2l 7, cr5, [fp, #640] @ 0x280 │ │ cmneq pc, #132, 30 @ 0x210 │ │ cmneq pc, #228, 30 @ 0x390 │ │ - ldc2l 1, cr7, [lr, #248] @ 0xf8 │ │ + ldc2l 1, cr7, [lr, #428] @ 0x1ac │ │ ldc2l 11, cr2, [pc, #812] @ 245e6c8 @ │ │ cmneq fp, #252, 10 @ 0x3f000000 │ │ - ldc2l 6, cr5, [fp, #460] @ 0x1cc │ │ + ldc2l 6, cr5, [fp, #640] @ 0x280 │ │ ldc2l 11, cr2, [pc, #124] @ 245e424 @ │ │ ldc2l 12, cr0, [pc, #728] @ 245e684 │ │ - ldc2l 11, cr15, [ip, #600] @ 0x258 @ │ │ + ldc2l 11, cr15, [ip, #780] @ 0x30c @ │ │ biceq r7, r5, #112, 26 @ 0x1c00 │ │ biceq r7, r5, #40, 28 @ 0x280 │ │ @ instruction: 0x03bf62c8 │ │ eoreq fp, pc, r0, lsr r3 @ │ │ @ instruction: 0x03b94810 │ │ - ldc2l 6, cr15, [sp, #156] @ 0x9c │ │ + ldc2l 6, cr15, [sp, #336] @ 0x150 │ │ ldc2l 10, cr2, [pc, #140] @ 245e458 @ │ │ ldrdeq fp, [pc], -r0 @ │ │ @ instruction: 0x03b947b0 │ │ - ldc2l 12, cr7, [ip, #764] @ 0x2fc │ │ - ldc2l 5, cr7, [sp, #296] @ 0x128 │ │ + ldc2l 12, cr7, [ip, #944] @ 0x3b0 │ │ + ldc2l 5, cr7, [sp, #476] @ 0x1dc │ │ @ instruction: 0x03b8ab30 │ │ strhteq fp, [pc], -ip │ │ - ldc2l 13, cr6, [lr, #1016] @ 0x3f8 │ │ + ldc2l 14, cr6, [lr, #172] @ 0xac │ │ vcadd.f32 d18, d31, d7, #270 │ │ eoreq fp, pc, r0, lsr r1 @ │ │ cmneq fp, #176, 4 │ │ - ldc2l 14, cr10, [lr, #1004] @ 0x3ec │ │ + ldc2l 15, cr10, [lr, #160] @ 0xa0 │ │ biceq r1, r6, #184, 12 @ 0xb800000 │ │ - ldc2l 0, cr7, [sp, #60] @ 0x3c │ │ + ldc2l 0, cr7, [sp, #240] @ 0xf0 │ │ ldc2l 7, cr2, [pc, #636] @ 245e680 │ │ cmneq r4, #16, 22 @ 0x4000 │ │ - ldc2l 1, cr3, [lr, #900] @ 0x384 │ │ + ldc2l 2, cr3, [lr, #56] @ 0x38 │ │ ldc2l 7, cr2, [pc, #300] @ 245e53c │ │ cmneq pc, #160, 20 @ 0xa0000 │ │ - ldc2l 12, cr6, [lr, #552] @ 0x228 │ │ + ldc2l 12, cr6, [lr, #732] @ 0x2dc │ │ ldc2l 7, cr2, [pc, #92] @ 245e478 │ │ cmneq fp, #72, 2 │ │ - ldc2l 1, cr3, [lr, #196] @ 0xc4 │ │ + ldc2l 1, cr3, [lr, #376] @ 0x178 │ │ ldc2l 6, cr2, [pc, #620] @ 245e694 │ │ - ldc2l 1, cr5, [fp, #844] @ 0x34c │ │ + ldc2l 2, cr5, [fp] │ │ cmneq pc, #228, 18 @ 0x390000 │ │ cmneq pc, #64, 20 @ 0x40000 │ │ cmneq r0, #60, 4 @ 0xc0000003 │ │ - ldc2l 11, cr6, [lr, #664] @ 0x298 @ │ │ + ldc2l 11, cr6, [lr, #844] @ 0x34c @ │ │ ldc2l 6, cr2, [pc, #204] @ 245e50c │ │ cmneq fp, #92 @ 0x5c │ │ - ldc2l 0, cr5, [fp, #860] @ 0x35c │ │ + ldc2l 1, cr5, [fp, #16] │ │ ldc2l 5, cr2, [pc, #524] @ 245e658 │ │ ldc2l 7, cr0, [pc, #104] @ 245e4b8 │ │ cmneq r0, #68, 2 │ │ - ldc2l 5, cr15, [ip, #1000] @ 0x3e8 │ │ + ldc2l 6, cr15, [ip, #156] @ 0x9c │ │ biceq r7, r5, #212, 14 @ 0x3500000 │ │ biceq r7, r5, #136, 16 @ 0x880000 │ │ cmneq r0, #184, 2 @ 0x2e │ │ @ instruction: 0x03bf5d2c │ │ mlaeq pc, r8, sp, sl @ │ │ @ instruction: 0x03b94278 │ │ cmneq sl, #188, 4 @ 0xc000000b │ │ streq r1, [r3], #-3216 @ 0xfffff370 │ │ @ instruction: 0x03b8a600 │ │ - ldc2l 0, cr15, [sp, #364] @ 0x16c │ │ + ldc2l 0, cr15, [sp, #544] @ 0x220 │ │ ldc2l 4, cr2, [pc, #348] @ 245e5e0 │ │ eoreq sl, pc, r4, lsl #26 │ │ @ instruction: 0x03b941e4 │ │ - ldc2l 6, cr7, [ip, #972] @ 0x3cc │ │ + ldc2l 7, cr7, [ip, #128] @ 0x80 │ │ ldc2l 1, cr2, [pc, #688] @ 245e744 │ │ @ instruction: 0x03b8a564 │ │ - ldc2l 6, cr7, [ip, #744] @ 0x2e8 │ │ + ldc2l 6, cr7, [ip, #924] @ 0x39c │ │ cmneq sl, #216, 2 @ 0x36 │ │ streq r1, [r3], #-2964 @ 0xfffff46c │ │ streq fp, [r3], #-1964 @ 0xfffff854 │ │ @ instruction: 0x03bf6190 │ │ @ instruction: 0x03b94708 │ │ - ldc2l 10, cr12, [lr, #496] @ 0x1f0 @ │ │ + ldc2l 10, cr12, [lr, #676] @ 0x2a4 @ │ │ ldc2l 9, cr2, [pc, #142] @ 245e546 @ │ │ cmneq r3, #28, 12 @ 0x1c00000 │ │ - ldc2l 13, cr2, [lr, #788] @ 0x314 │ │ + ldc2l 13, cr2, [lr, #968] @ 0x3c8 │ │ ldc2l 3, cr2, [pc, #188] @ 245e580 │ │ cmneq pc, #104, 12 @ 0x6800000 │ │ - ldc2l 14, cr4, [fp, #140] @ 0x8c │ │ + ldc2l 14, cr4, [fp, #320] @ 0x140 │ │ cmneq r0, #140, 28 @ 0x8c0 │ │ ldc2l 4, cr0, [pc, #168] @ 245e57c │ │ - ldc2l 3, cr15, [ip, #56] @ 0x38 │ │ + ldc2l 3, cr15, [ip, #236] @ 0xec │ │ biceq r7, r5, #232, 8 @ 0xe8000000 │ │ biceq r7, r5, #124, 22 @ 0x1f000 │ │ eoreq sl, pc, r8, lsr #21 │ │ cmneq sl, #212, 30 @ 0x350 │ │ streq r1, [r3], #-2472 @ 0xfffff658 │ │ @ instruction: 0x03b8a318 │ │ - ldc2l 13, cr14, [sp, #508] @ 0x1fc │ │ + ldc2l 13, cr14, [sp, #688] @ 0x2b0 │ │ ldc2l 1, cr2, [pc, #492] @ 245e6e4 │ │ eoreq sl, pc, r4, lsr #20 │ │ - ldc2l 4, cr7, [ip, #124] @ 0x7c │ │ + ldc2l 4, cr7, [ip, #304] @ 0x130 │ │ ldc2l 14, cr1, [pc, #848] @ 245e854 │ │ @ instruction: 0x03b8a28c │ │ - ldc2l 3, cr7, [ip, #920] @ 0x398 │ │ + ldc2l 4, cr7, [ip, #76] @ 0x4c │ │ cmneq sl, #4, 30 │ │ streq r1, [r3], #-2236 @ 0xfffff744 │ │ - ldc2l 12, cr6, [sp, #168] @ 0xa8 │ │ + ldc2l 12, cr6, [sp, #348] @ 0x15c │ │ cmneq sl, #176, 28 @ 0xb00 │ │ │ │ 0245e518 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ @@ -1333869,16 +1333868,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 12, cr12, [sp, #820] @ 0x334 │ │ - ldc2l 15, cr11, [lr, #52] @ 0x34 │ │ + ldc2l 12, cr12, [sp, #1000] @ 0x3e8 │ │ + ldc2l 15, cr11, [lr, #232] @ 0xe8 │ │ │ │ 0245e574 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #24 │ │ mov r3, r1 │ │ mov r1, r0 │ │ @@ -1334034,31 +1334033,31 @@ │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ ldr r0, [pc, #32] @ 245e7f4 │ │ add r0, pc, r0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 3, cr6, [lr, #204] @ 0xcc │ │ - ldc2l 12, cr11, [lr, #944] @ 0x3b0 │ │ - ldc2l 7, cr4, [ip, #580] @ 0x244 │ │ + ldc2l 3, cr6, [lr, #384] @ 0x180 │ │ + ldc2l 13, cr11, [lr, #100] @ 0x64 │ │ + ldc2l 7, cr4, [ip, #760] @ 0x2f8 │ │ ldc2l 14, cr15, [lr, #860] @ 0x35c │ │ - ldc2l 2, cr4, [lr, #304] @ 0x130 │ │ - ldc2l 1, cr6, [lr, #940] @ 0x3ac │ │ - ldc2l 10, cr12, [ip, #472] @ 0x1d8 @ │ │ - ldc2l 7, cr4, [ip, #404] @ 0x194 │ │ + ldc2l 2, cr4, [lr, #484] @ 0x1e4 │ │ + ldc2l 2, cr6, [lr, #96] @ 0x60 │ │ + ldc2l 10, cr12, [ip, #652] @ 0x28c @ │ │ + ldc2l 7, cr4, [ip, #584] @ 0x248 │ │ ldc2l 14, cr15, [lr, #684] @ 0x2ac │ │ - ldc2l 11, cr12, [fp, #824] @ 0x338 @ │ │ - ldc2l 3, cr10, [lr, #584] @ 0x248 │ │ - ldc2l 7, cr4, [ip, #228] @ 0xe4 │ │ - ldc2l 12, cr2, [sp, #260] @ 0x104 │ │ + ldc2l 11, cr12, [fp, #1004] @ 0x3ec @ │ │ + ldc2l 3, cr10, [lr, #764] @ 0x2fc │ │ + ldc2l 7, cr4, [ip, #408] @ 0x198 │ │ + ldc2l 12, cr2, [sp, #440] @ 0x1b8 │ │ eoreq ip, ip, ip, rrx │ │ - ldc2l 12, cr2, [sp, #16] │ │ - ldc2l 9, cr14, [sp, #464] @ 0x1d0 @ │ │ - ldc2l 2, cr6, [lr, #700] @ 0x2bc │ │ + ldc2l 12, cr2, [sp, #196] @ 0xc4 │ │ + ldc2l 10, cr14, [sp, #84] @ 0x54 @ │ │ + ldc2l 2, cr6, [lr, #880] @ 0x370 │ │ │ │ 0245e824 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #268 @ 0x10c │ │ mov r6, r3 │ │ mov r4, r2 │ │ @@ -1334218,30 +1334217,30 @@ │ │ mov r1, r8 │ │ mov r2, r4 │ │ bl 270f300 │ │ b 245ea40 │ │ add r0, sp, #92 @ 0x5c │ │ bl 270d240 │ │ b 245e9d4 │ │ - ldc2l 11, cr2, [sp, #508] @ 0x1fc @ │ │ - ldc2l 13, cr10, [ip, #852] @ 0x354 │ │ - ldc2l 13, cr12, [fp, #696] @ 0x2b8 │ │ - ldc2l 5, cr4, [ip, #564] @ 0x234 │ │ - ldc2l 14, cr6, [ip, #832] @ 0x340 │ │ - ldc2l 9, cr12, [ip, #472] @ 0x1d8 @ │ │ - ldc2l 12, cr4, [ip, #44] @ 0x2c │ │ - ldc2l 5, cr4, [ip, #868] @ 0x364 │ │ - ldc2l 8, cr14, [sp, #720] @ 0x2d0 │ │ - ldc2l 9, cr12, [ip, #88] @ 0x58 @ │ │ - ldc2l 7, cr10, [sp, #268] @ 0x10c │ │ - ldc2l 5, cr4, [ip, #116] @ 0x74 │ │ - ldc2l 0, cr8, [lr, #8] │ │ + ldc2l 11, cr2, [sp, #688] @ 0x2b0 @ │ │ + ldc2l 14, cr10, [ip, #8] │ │ + ldc2l 13, cr12, [fp, #876] @ 0x36c │ │ + ldc2l 5, cr4, [ip, #744] @ 0x2e8 │ │ + ldc2l 14, cr6, [ip, #1012] @ 0x3f4 │ │ + ldc2l 10, cr12, [ip, #100] @ 0x64 @ │ │ + ldc2l 12, cr4, [ip, #224] @ 0xe0 │ │ + ldc2l 6, cr4, [ip, #24] │ │ + vcadd.f32 q15, , , #270 │ │ + ldc2l 9, cr12, [ip, #178] @ 0xb2 @ │ │ + ldc2l 7, cr10, [sp, #448] @ 0x1c0 │ │ + ldc2l 5, cr4, [ip, #296] @ 0x128 │ │ + ldc2l 0, cr8, [lr, #188] @ 0xbc │ │ eoreq sl, pc, ip, ror #3 │ │ eoreq sl, pc, ip, ror #3 │ │ - ldc2l 9, cr2, [sp, #494] @ 0x1ee @ │ │ + ldc2l 10, cr2, [sp, #144] @ 0x90 @ │ │ │ │ 0245eaf8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #436 @ 0x1b4 │ │ mov r5, r3 │ │ mov r8, r2 │ │ @@ -1334788,63 +1334787,63 @@ │ │ mov r2, r9 │ │ mov r3, #3 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ ldr r1, [pc, #184] @ 245f44c │ │ add r1, pc, r1 │ │ b 245f2f4 │ │ - ldc2l 11, cr4, [ip, #44] @ 0x2c @ │ │ - ldc2l 2, cr8, [fp, #812] @ 0x32c │ │ - ldc2l 10, cr12, [fp, #856] @ 0x358 @ │ │ - ldc2l 2, cr4, [sp, #600] @ 0x258 │ │ - ldc2l 10, cr12, [fp, #424] @ 0x1a8 @ │ │ - ldc2l 1, cr4, [ip, #404] @ 0x194 │ │ - ldc2l 13, cr8, [fp, #292] @ 0x124 │ │ - ldc2l 3, cr6, [fp, #508] @ 0x1fc │ │ - ldc2l 15, cr3, [ip, #148] @ 0x94 │ │ - ldc2l 11, cr8, [fp, #116] @ 0x74 @ │ │ - ldc2l 3, cr0, [lr, #420] @ 0x1a4 │ │ - ldc2l 0, cr4, [ip, #84] @ 0x54 │ │ - ldc2l 11, cr10, [fp, #332] @ 0x14c @ │ │ - ldc2l 15, cr11, [sp, #176] @ 0xb0 │ │ - ldc2l 12, cr13, [sp, #800] @ 0x320 │ │ - ldc2l 0, cr10, [ip, #728] @ 0x2d8 │ │ - ldc2l 8, cr9, [fp, #728] @ 0x2d8 │ │ - ldc2l 9, cr0, [sp] @ │ │ + ldc2l 11, cr4, [ip, #224] @ 0xe0 @ │ │ + ldc2l 2, cr8, [fp, #992] @ 0x3e0 │ │ + ldc2l 11, cr12, [fp, #12] @ │ │ + ldc2l 2, cr4, [sp, #780] @ 0x30c │ │ + ldc2l 10, cr12, [fp, #604] @ 0x25c @ │ │ + ldc2l 1, cr4, [ip, #584] @ 0x248 │ │ + ldc2l 13, cr8, [fp, #472] @ 0x1d8 │ │ + ldc2l 3, cr6, [fp, #688] @ 0x2b0 │ │ + ldc2l 15, cr3, [ip, #328] @ 0x148 │ │ + ldc2l 11, cr8, [fp, #296] @ 0x128 @ │ │ + ldc2l 3, cr0, [lr, #600] @ 0x258 │ │ + ldc2l 0, cr4, [ip, #264] @ 0x108 │ │ + ldc2l 11, cr10, [fp, #512] @ 0x200 @ │ │ + ldc2l 15, cr11, [sp, #356] @ 0x164 │ │ + ldc2l 12, cr13, [sp, #980] @ 0x3d4 │ │ + ldc2l 0, cr10, [ip, #908] @ 0x38c │ │ + vcadd.f32 , , , #270 │ │ + ldc2l 9, cr0, [sp, #90] @ 0x5a @ │ │ streq lr, [pc], #-244 @ 245f3e8 │ │ eoreq sl, pc, r4, asr r0 @ │ │ eoreq sl, pc, r0, asr #32 │ │ - ldc2l 6, cr6, [fp, #684] @ 0x2ac │ │ - ldc2l 2, cr4, [ip, #180] @ 0xb4 │ │ - ldc2l 6, cr2, [ip, #1004] @ 0x3ec │ │ - ldc2l 3, cr12, [sp, #400] @ 0x190 │ │ - ldc2l 5, cr10, [ip, #184] @ 0xb8 │ │ - ldc2l 13, cr9, [fp, #200] @ 0xc8 │ │ - ldc2l 10, cr11, [lr, #180] @ 0xb4 @ │ │ - ldc2l 0, cr4, [ip, #596] @ 0x254 │ │ - ldc2l 15, cr9, [sp, #192] @ 0xc0 │ │ - ldc2l 2, cr4, [sp, #128] @ 0x80 │ │ - ldc2l 14, cr3, [sp, #224] @ 0xe0 │ │ + ldc2l 6, cr6, [fp, #864] @ 0x360 │ │ + ldc2l 2, cr4, [ip, #360] @ 0x168 │ │ + ldc2l 7, cr2, [ip, #160] @ 0xa0 │ │ + ldc2l 3, cr12, [sp, #580] @ 0x244 │ │ + ldc2l 5, cr10, [ip, #364] @ 0x16c │ │ + ldc2l 13, cr9, [fp, #380] @ 0x17c │ │ + ldc2l 10, cr11, [lr, #360] @ 0x168 @ │ │ + ldc2l 0, cr4, [ip, #776] @ 0x308 │ │ + ldc2l 15, cr9, [sp, #372] @ 0x174 │ │ + ldc2l 2, cr4, [sp, #308] @ 0x134 │ │ + ldc2l 14, cr3, [sp, #404] @ 0x194 │ │ eoreq r9, pc, r8, lsl #27 │ │ - ldc2l 11, cr9, [fp, #936] @ 0x3a8 @ │ │ - ldc2l 2, cr4, [sp, #28] │ │ - ldc2l 7, cr6, [ip, #100] @ 0x64 │ │ - ldc2l 3, cr10, [ip, #980] @ 0x3d4 │ │ - ldc2l 9, cr8, [fp, #290] @ 0x122 @ │ │ - ldc2l 3, cr10, [ip, #884] @ 0x374 │ │ - ldc2l 2, cr0, [ip, #328] @ 0x148 │ │ - ldc2l 6, cr6, [ip, #880] @ 0x370 │ │ - ldc2l 7, cr10, [fp, #284] @ 0x11c │ │ - ldc2l 15, cr11, [ip, #720] @ 0x2d0 │ │ - ldc2l 8, cr3, [lr, #876] @ 0x36c │ │ - ldc2l 1, cr0, [ip, #424] @ 0x1a8 │ │ - ldc2l 0, cr6, [fp, #212] @ 0xd4 │ │ - ldc2l 15, cr11, [ip, #576] @ 0x240 │ │ - ldc2l 7, cr9, [fp, #920] @ 0x398 │ │ - ldc2l 7, cr4, [ip, #844] @ 0x34c │ │ + ldc2l 12, cr9, [fp, #92] @ 0x5c │ │ + ldc2l 2, cr4, [sp, #208] @ 0xd0 │ │ + ldc2l 7, cr6, [ip, #280] @ 0x118 │ │ + ldc2l 4, cr10, [ip, #136] @ 0x88 │ │ + ldc2l 9, cr8, [fp, #380] @ 0x17c @ │ │ + ldc2l 4, cr10, [ip, #40] @ 0x28 │ │ + ldc2l 2, cr0, [ip, #508] @ 0x1fc │ │ + ldc2l 7, cr6, [ip, #36] @ 0x24 │ │ + ldc2l 7, cr10, [fp, #464] @ 0x1d0 │ │ + ldc2l 15, cr11, [ip, #900] @ 0x384 │ │ + ldc2l 9, cr3, [lr, #16] @ │ │ + ldc2l 1, cr0, [ip, #604] @ 0x25c │ │ + ldc2l 0, cr6, [fp, #392] @ 0x188 │ │ + ldc2l 15, cr11, [ip, #756] @ 0x2f4 │ │ + ldc2l 8, cr9, [fp, #76] @ 0x4c │ │ + vcadd.f32 d20, d12, d0, #270 │ │ │ │ 0245f45c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r4, r3 │ │ mov sl, r2 │ │ @@ -1335056,41 +1335055,41 @@ │ │ ldr r0, [pc, #124] @ 245f828 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 13, cr3, [sp, #116] @ 0x74 │ │ - ldc2l 9, cr7, [fp, #190] @ 0xbe @ │ │ - ldc2l 4, cr9, [fp, #872] @ 0x368 │ │ - ldc2l 9, cr7, [fp, #118] @ 0x76 @ │ │ - ldc2l 12, cr15, [fp, #132] @ 0x84 │ │ + ldc2l 13, cr3, [sp, #296] @ 0x128 │ │ + ldc2l 9, cr7, [fp, #280] @ 0x118 @ │ │ + ldc2l 5, cr9, [fp, #28] │ │ + ldc2l 9, cr7, [fp, #208] @ 0xd0 @ │ │ + ldc2l 12, cr15, [fp, #312] @ 0x138 │ │ eoreq r9, pc, r0, lsl #15 │ │ - ldc2l 4, cr9, [fp, #792] @ 0x318 │ │ - ldc2l 13, cr11, [ip, #288] @ 0x120 │ │ - ldc2l 12, cr11, [ip, #176] @ 0xb0 │ │ - ldc2l 7, cr7, [fp, #348] @ 0x15c │ │ - ldc2l 15, cr15, [fp, #456] @ 0x1c8 │ │ - ldc2l 14, cr15, [fp, #376] @ 0x178 │ │ - ldc2l 15, cr15, [ip, #260] @ 0x104 │ │ - ldc2l 14, cr15, [ip, #356] @ 0x164 │ │ - ldc2l 1, cr0, [ip, #400] @ 0x190 │ │ - ldc2l 15, cr13, [fp, #260] @ 0x104 │ │ - ldc2l 14, cr13, [fp, #260] @ 0x104 │ │ - ldc2l 11, cr13, [sp, #876] @ 0x36c @ │ │ - ldc2l 11, cr11, [ip, #704] @ 0x2c0 @ │ │ - ldc2l 15, cr9, [ip, #372] @ 0x174 │ │ - ldc2l 11, cr11, [ip, #128] @ 0x80 @ │ │ - ldc2l 3, cr9, [fp, #536] @ 0x218 │ │ - ldc2l 13, cr15, [fp, #744] @ 0x2e8 │ │ - ldc2l 13, cr15, [fp, #616] @ 0x268 │ │ - ldc2l 12, cr5, [fp, #356] @ 0x164 │ │ - ldc2l 4, cr9, [fp, #1016] @ 0x3f8 │ │ - ldc2l 10, cr3, [sp, #4] @ │ │ + ldc2l 4, cr9, [fp, #972] @ 0x3cc │ │ + ldc2l 13, cr11, [ip, #468] @ 0x1d4 │ │ + ldc2l 12, cr11, [ip, #356] @ 0x164 │ │ + ldc2l 7, cr7, [fp, #528] @ 0x210 │ │ + ldc2l 15, cr15, [fp, #636] @ 0x27c │ │ + ldc2l 14, cr15, [fp, #556] @ 0x22c │ │ + ldc2l 15, cr15, [ip, #440] @ 0x1b8 │ │ + ldc2l 14, cr15, [ip, #536] @ 0x218 │ │ + ldc2l 1, cr0, [ip, #580] @ 0x244 │ │ + ldc2l 15, cr13, [fp, #440] @ 0x1b8 │ │ + ldc2l 14, cr13, [fp, #440] @ 0x1b8 │ │ + ldc2l 12, cr13, [sp, #32] │ │ + ldc2l 11, cr11, [ip, #884] @ 0x374 @ │ │ + ldc2l 15, cr9, [ip, #552] @ 0x228 │ │ + ldc2l 11, cr11, [ip, #308] @ 0x134 @ │ │ + ldc2l 3, cr9, [fp, #716] @ 0x2cc │ │ + ldc2l 13, cr15, [fp, #924] @ 0x39c │ │ + ldc2l 13, cr15, [fp, #796] @ 0x31c │ │ + ldc2l 12, cr5, [fp, #536] @ 0x218 │ │ + ldc2l 5, cr9, [fp, #172] @ 0xac │ │ + ldc2l 10, cr3, [sp, #184] @ 0xb8 @ │ │ │ │ 0245f82c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #32 │ │ ldr r1, [pc, #220] @ 245f91c │ │ str r0, [fp, #-20] @ 0xffffffec │ │ @@ -1335145,25 +1335144,25 @@ │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ ldr r0, [pc, #32] @ 245f930 │ │ add r0, pc, r0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 6, cr5, [sp, #884] @ 0x374 │ │ - ldc2l 11, cr10, [lr, #352] @ 0x160 @ │ │ - ldc2l 5, cr3, [ip, #1012] @ 0x3f4 │ │ - ldc2l 15, cr6, [fp, #816] @ 0x330 │ │ - ldc2l 0, cr3, [lr, #736] @ 0x2e0 │ │ - ldc2l 6, cr5, [sp, #68] @ 0x44 │ │ - vcadd.f32 , q14, q9, #270 │ │ - ldc2l 5, cr3, [ip, #836] @ 0x344 │ │ - ldc2l 15, cr6, [fp, #640] @ 0x280 │ │ - ldc2l 10, cr11, [fp, #232] @ 0xe8 @ │ │ - ldc2l 6, cr5, [sp, #500] @ 0x1f4 │ │ + ldc2l 7, cr5, [sp, #40] @ 0x28 │ │ + ldc2l 11, cr10, [lr, #532] @ 0x214 @ │ │ + ldc2l 6, cr3, [ip, #168] @ 0xa8 │ │ + ldc2l 15, cr6, [fp, #996] @ 0x3e4 │ │ + ldc2l 0, cr3, [lr, #916] @ 0x394 │ │ + ldc2l 6, cr5, [sp, #248] @ 0xf8 │ │ + ldc2l 9, cr11, [ip, #30] @ │ │ + ldc2l 5, cr3, [ip, #1016] @ 0x3f8 │ │ + ldc2l 15, cr6, [fp, #820] @ 0x334 │ │ + ldc2l 10, cr11, [fp, #412] @ 0x19c @ │ │ + ldc2l 6, cr5, [sp, #680] @ 0x2a8 │ │ │ │ 0245f948 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8} │ │ sub sp, sp, #936 @ 0x3a8 │ │ @@ -1336193,15 +1336192,15 @@ │ │ ldr r0, [pc, #1424] @ 2460ef0 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #1412] @ 2460ef4 │ │ add r0, pc, r0 │ │ b 2460e60 │ │ - ldc2l 11, cr13, [ip, #1020] @ 0x3fc @ │ │ + ldc2l 12, cr13, [ip, #176] @ 0xb0 │ │ streq sp, [pc], #-864 @ 2460980 │ │ streq sp, [pc], #-880 @ 2460984 │ │ eoreq r9, pc, ip, lsr #5 │ │ ldr r1, [pc, #1292] @ 2460e98 │ │ mov r0, r8 │ │ mov r2, r5 │ │ mov r3, #1 │ │ @@ -1336223,20 +1336222,20 @@ │ │ mov r1, #19 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ bl 270db20 │ │ cmp r0, #0 │ │ bne 2460db4 │ │ b 245fa5c │ │ - ldc2l 11, cr13, [ip, #604] @ 0x25c @ │ │ + ldc2l 11, cr13, [ip, #784] @ 0x310 @ │ │ streq sp, [pc], #-780 @ 24609f8 │ │ streq sp, [pc], #-741 @ 24609fc │ │ streq sp, [pc], #-776 @ 2460a00 │ │ eoreq r9, pc, ip, lsl r2 @ │ │ - ldc2l 5, cr1, [lr, #836] @ 0x344 │ │ + ldc2l 5, cr1, [lr, #1016] @ 0x3f8 │ │ ldr r0, [pc, #1424] @ 2460f9c │ │ mov r1, sl │ │ ldr r2, [pc, #1420] @ 2460fa0 │ │ mov r3, #1136 @ 0x470 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1336265,17 +1336264,17 @@ │ │ bl 270e790 │ │ ldr r1, [sp, #24] │ │ add r2, r4, #24 │ │ mov r0, r9 │ │ add r4, sp, #688 @ 0x2b0 │ │ bl 270e790 │ │ b 2460b4c │ │ - ldc2l 10, cr15, [ip, #228] @ 0xe4 @ │ │ - ldc2l 14, cr10, [lr, #568] @ 0x238 │ │ - ldc2l 7, cr15, [sp, #220] @ 0xdc │ │ + ldc2l 10, cr15, [ip, #408] @ 0x198 @ │ │ + ldc2l 14, cr10, [lr, #748] @ 0x2ec │ │ + ldc2l 7, cr15, [sp, #400] @ 0x190 │ │ ldr r0, [sp, #584] @ 0x248 │ │ sub r0, r0, #1 │ │ cmp r0, #20 │ │ bhi 2460ba0 │ │ cmp r5, #0 │ │ beq 2460bb4 │ │ add r1, sp, #504 @ 0x1f8 │ │ @@ -1336294,15 +1336293,15 @@ │ │ add r0, r4, r0, lsl #3 │ │ sub r1, r0, #48 @ 0x30 │ │ mov r0, r9 │ │ bl 270e790 │ │ mvn r0, #2 │ │ add r0, r0, r5, lsl #1 │ │ b 2460c90 │ │ - ldc2l 6, cr15, [sp, #620] @ 0x26c │ │ + ldc2l 6, cr15, [sp, #800] @ 0x320 │ │ ldr r2, [sp, #44] @ 0x2c │ │ add r0, sp, #584 @ 0x248 │ │ sub r1, fp, #100 @ 0x64 │ │ add r3, sp, #208 @ 0xd0 │ │ bl 270dc60 │ │ bl 270db20 │ │ cmp r0, #0 │ │ @@ -1336331,19 +1336330,19 @@ │ │ mov r1, r0 │ │ ldr r2, [pc, #1060] @ 2460fb0 │ │ add r0, r4, r1, lsl #3 │ │ ldr r5, [fp, #8] │ │ add r1, sp, #640 @ 0x280 │ │ add r2, pc, r2 │ │ b 2460d68 │ │ - ldc2l 6, cr15, [sp, #444] @ 0x1bc │ │ + ldc2l 6, cr15, [sp, #624] @ 0x270 │ │ cmp r5, #0 │ │ beq 2460cbc │ │ b 2460cdc │ │ - ldc2l 6, cr15, [sp, #284] @ 0x11c │ │ + ldc2l 6, cr15, [sp, #464] @ 0x1d0 │ │ strdeq r8, [pc], -r4 @ │ │ ldr r0, [pc, #1016] @ 2460fb4 │ │ mov r1, sl │ │ ldr r2, [pc, #1012] @ 2460fb8 │ │ movw r3, #1171 @ 0x493 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1336484,16 +1336483,16 @@ │ │ bl 270e790 │ │ add r1, r5, #24 │ │ add r2, r6, #24 │ │ mov r0, r4 │ │ bl 270e790 │ │ b 2460e28 │ │ eoreq r8, pc, r8, asr lr @ │ │ - ldc2l 3, cr15, [sp, #716] @ 0x2cc │ │ - ldc2l 1, cr1, [lr, #980] @ 0x3d4 │ │ + ldc2l 3, cr15, [sp, #896] @ 0x380 │ │ + ldc2l 2, cr1, [lr, #136] @ 0x88 │ │ ldr r2, [pc, #472] @ 2460fe8 │ │ add r0, sp, #640 @ 0x280 │ │ str r0, [sp] │ │ add r0, sp, #208 @ 0xd0 │ │ add r2, pc, r2 │ │ mov r1, r5 │ │ mov r3, r2 │ │ @@ -1336520,103 +1336519,103 @@ │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [pc, #24] @ 2460e9c │ │ mov r1, #137 @ 0x89 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ b 24609cc │ │ - ldc2l 6, cr15, [ip, #196] @ 0xc4 │ │ - ldc2l 4, cr2, [lr, #200] @ 0xc8 │ │ - ldc2l 4, cr6, [fp, #476] @ 0x1dc │ │ - ldc2l 1, cr0, [lr, #332] @ 0x14c │ │ - ldc2l 14, cr9, [lr, #792] @ 0x318 │ │ - ldc2l 4, cr2, [ip, #1012] @ 0x3f4 │ │ - ldc2l 7, cr4, [fp, #1020] @ 0x3fc │ │ - ldc2l 7, cr12, [ip, #828] @ 0x33c │ │ - ldc2l 1, cr1, [lr, #692] @ 0x2b4 │ │ + ldc2l 6, cr15, [ip, #376] @ 0x178 │ │ + ldc2l 4, cr2, [lr, #380] @ 0x17c │ │ + ldc2l 4, cr6, [fp, #656] @ 0x290 │ │ + ldc2l 1, cr0, [lr, #512] @ 0x200 │ │ + ldc2l 14, cr9, [lr, #972] @ 0x3cc │ │ + ldc2l 5, cr2, [ip, #168] @ 0xa8 │ │ + vcadd.f32 d20, d11, d28, #270 │ │ + ldc2l 7, cr12, [ip, #1008] @ 0x3f0 │ │ + ldc2l 1, cr1, [lr, #872] @ 0x368 │ │ strhteq r8, [pc], -ip │ │ eoreq r8, pc, r4, asr #23 │ │ eoreq r8, pc, ip, lsr ip @ │ │ - ldc2l 4, cr8, [lr, #268] @ 0x10c │ │ + ldc2l 4, cr8, [lr, #448] @ 0x1c0 │ │ streq ip, [pc], #-1580 @ 2460ecc │ │ - ldc2l 15, cr8, [ip, #372] @ 0x174 │ │ - ldc2l 7, cr2, [ip, #548] @ 0x224 │ │ - ldc2l 2, cr8, [lr, #716] @ 0x2cc │ │ + ldc2l 15, cr8, [ip, #552] @ 0x228 │ │ + ldc2l 7, cr2, [ip, #728] @ 0x2d8 │ │ + ldc2l 2, cr8, [lr, #896] @ 0x380 │ │ streq ip, [pc], #-1180 @ 2460edc │ │ - ldc2l 13, cr8, [ip, #820] @ 0x334 │ │ - ldc2l 5, cr2, [ip, #996] @ 0x3e4 │ │ - ldc2l 14, cr14, [fp, #192] @ 0xc0 │ │ - ldc2l 10, cr4, [fp, #676] @ 0x2a4 @ │ │ - ldc2l 12, cr12, [ip, #344] @ 0x158 │ │ - ldc2l 5, cr2, [ip, #452] @ 0x1c4 │ │ - ldc2l 13, cr8, [ip, #92] @ 0x5c │ │ - ldc2l 12, cr12, [ip, #108] @ 0x6c │ │ - ldc2l 3, cr15, [ip, #532] @ 0x214 │ │ - ldc2l 15, cr0, [lr, #4] │ │ - ldc2l 2, cr15, [ip, #468] @ 0x1d4 │ │ - ldc2l 14, cr0, [lr, #116] @ 0x74 │ │ - ldc2l 11, cr0, [lr, #900] @ 0x384 @ │ │ - ldc2l 4, cr10, [lr, #792] @ 0x318 │ │ - ldc2l 11, cr0, [lr, #804] @ 0x324 @ │ │ - ldc2l 7, cr10, [lr, #904] @ 0x388 │ │ + ldc2l 13, cr8, [ip, #1000] @ 0x3e8 │ │ + ldc2l 6, cr2, [ip, #152] @ 0x98 │ │ + ldc2l 14, cr14, [fp, #372] @ 0x174 │ │ + ldc2l 10, cr4, [fp, #856] @ 0x358 @ │ │ + ldc2l 12, cr12, [ip, #524] @ 0x20c │ │ + ldc2l 5, cr2, [ip, #632] @ 0x278 │ │ + ldc2l 13, cr8, [ip, #272] @ 0x110 │ │ + ldc2l 12, cr12, [ip, #288] @ 0x120 │ │ + ldc2l 3, cr15, [ip, #712] @ 0x2c8 │ │ + ldc2l 15, cr0, [lr, #184] @ 0xb8 │ │ + ldc2l 2, cr15, [ip, #648] @ 0x288 │ │ + ldc2l 14, cr0, [lr, #296] @ 0x128 │ │ + ldc2l 12, cr0, [lr, #56] @ 0x38 │ │ + ldc2l 4, cr10, [lr, #972] @ 0x3cc │ │ + ldc2l 11, cr0, [lr, #984] @ 0x3d8 @ │ │ + vcadd.f32 d26, d14, d15, #270 │ │ strdeq r8, [pc], -ip @ │ │ - ldc2l 7, cr10, [lr, #664] @ 0x298 │ │ + ldc2l 7, cr10, [lr, #844] @ 0x34c │ │ strhteq r8, [pc], -r4 │ │ - ldc2l 10, cr0, [lr, #84] @ 0x54 @ │ │ - ldc2l 2, cr15, [ip, #276] @ 0x114 │ │ - ldc2l 13, cr0, [lr, #772] @ 0x304 │ │ - ldc2l 2, cr15, [ip, #84] @ 0x54 │ │ - ldc2l 10, cr0, [lr, #964] @ 0x3c4 @ │ │ - ldc2l 1, cr15, [ip, #884] @ 0x374 │ │ - ldc2l 13, cr0, [lr, #356] @ 0x164 │ │ - ldc2l 1, cr15, [ip, #692] @ 0x2b4 │ │ - ldc2l 1, cr15, [ip, #532] @ 0x214 │ │ - ldc2l 15, cr14, [ip, #308] @ 0x134 │ │ - ldc2l 3, cr10, [lr, #552] @ 0x228 │ │ - ldc2l 3, cr10, [lr, #328] @ 0x148 │ │ - ldc2l 2, cr10, [lr, #920] @ 0x398 │ │ + ldc2l 10, cr0, [lr, #264] @ 0x108 @ │ │ + ldc2l 2, cr15, [ip, #456] @ 0x1c8 │ │ + ldc2l 13, cr0, [lr, #952] @ 0x3b8 │ │ + ldc2l 2, cr15, [ip, #264] @ 0x108 │ │ + ldc2l 11, cr0, [lr, #120] @ 0x78 @ │ │ + ldc2l 2, cr15, [ip, #40] @ 0x28 │ │ + ldc2l 13, cr0, [lr, #536] @ 0x218 │ │ + ldc2l 1, cr15, [ip, #872] @ 0x368 │ │ + ldc2l 1, cr15, [ip, #712] @ 0x2c8 │ │ + ldc2l 15, cr14, [ip, #488] @ 0x1e8 │ │ + ldc2l 3, cr10, [lr, #732] @ 0x2dc │ │ + ldc2l 3, cr10, [lr, #508] @ 0x1fc │ │ + ldc2l 3, cr10, [lr, #76] @ 0x4c │ │ eoreq r8, pc, r0, lsl #12 │ │ - ldc2l 2, cr10, [lr, #680] @ 0x2a8 │ │ - ldc2l 1, cr15, [ip, #308] @ 0x134 │ │ - ldc2l 1, cr15, [ip, #180] @ 0xb4 │ │ - ldc2l 5, cr10, [lr, #360] @ 0x168 │ │ + ldc2l 2, cr10, [lr, #860] @ 0x35c │ │ + ldc2l 1, cr15, [ip, #488] @ 0x1e8 │ │ + ldc2l 1, cr15, [ip, #360] @ 0x168 │ │ + ldc2l 5, cr10, [lr, #540] @ 0x21c │ │ eoreq r8, pc, r0, ror r8 @ │ │ - ldc2l 4, cr10, [lr, #376] @ 0x178 │ │ - ldc2l 11, cr0, [lr, #388] @ 0x184 @ │ │ - ldc2l 4, cr10, [lr, #168] @ 0xa8 │ │ - ldc2l 11, cr0, [lr, #180] @ 0xb4 @ │ │ - ldc2l 2, cr15, [ip, #932] @ 0x3a4 │ │ - ldc2l 14, cr0, [lr, #404] @ 0x194 │ │ - ldc2l 1, cr10, [lr, #280] @ 0x118 │ │ - vcadd.f32 q8, q7, , #270 │ │ + ldc2l 4, cr10, [lr, #556] @ 0x22c │ │ + ldc2l 11, cr0, [lr, #568] @ 0x238 @ │ │ + ldc2l 4, cr10, [lr, #348] @ 0x15c │ │ + ldc2l 11, cr0, [lr, #360] @ 0x168 @ │ │ + ldc2l 3, cr15, [ip, #88] @ 0x58 │ │ + ldc2l 14, cr0, [lr, #584] @ 0x248 │ │ + ldc2l 1, cr10, [lr, #460] @ 0x1cc │ │ + ldc2l 8, cr0, [lr, #472] @ 0x1d8 │ │ eoreq r8, pc, r8, asr r4 @ │ │ - ldc2l 13, cr14, [ip, #36] @ 0x24 │ │ - vcadd.f32 d16, d30, d5, #270 │ │ - ldc2l 10, cr14, [ip, #820] @ 0x334 @ │ │ - ldc2l 6, cr0, [lr, #292] @ 0x124 │ │ + ldc2l 13, cr14, [ip, #216] @ 0xd8 │ │ + ldc2l 8, cr0, [lr, #712] @ 0x2c8 │ │ + ldc2l 10, cr14, [ip, #1000] @ 0x3e8 @ │ │ + ldc2l 6, cr0, [lr, #472] @ 0x1d8 │ │ eoreq r8, pc, r0, asr r1 @ │ │ - ldc2l 13, cr9, [lr, #920] @ 0x398 │ │ - ldc2l 4, cr0, [lr, #932] @ 0x3a4 │ │ + ldc2l 14, cr9, [lr, #76] @ 0x4c │ │ + ldc2l 5, cr0, [lr, #88] @ 0x58 │ │ strdeq r8, [pc], -r8 @ │ │ - ldc2l 9, cr14, [ip, #58] @ 0x3a @ │ │ - ldc2l 4, cr0, [lr, #612] @ 0x264 │ │ - ldc2l 8, cr14, [ip, #964] @ 0x3c4 │ │ - ldc2l 4, cr0, [lr, #436] @ 0x1b4 │ │ - vcadd.f32 q15, q14, , #270 │ │ - ldc2l 4, cr0, [lr, #260] @ 0x104 │ │ - ldc2l 13, cr9, [lr, #24] │ │ + ldc2l 9, cr14, [ip, #148] @ 0x94 @ │ │ + ldc2l 4, cr0, [lr, #792] @ 0x318 │ │ + ldc2l 9, cr14, [ip, #60] @ 0x3c @ │ │ + ldc2l 4, cr0, [lr, #616] @ 0x268 │ │ + ldc2l 8, cr14, [ip, #968] @ 0x3c8 │ │ + ldc2l 4, cr0, [lr, #440] @ 0x1b8 │ │ + ldc2l 13, cr9, [lr, #204] @ 0xcc │ │ ldrdeq r7, [pc], -r8 @ │ │ - ldc2l 8, cr14, [ip, #84] @ 0x54 │ │ - ldc2l 3, cr0, [lr, #580] @ 0x244 │ │ - ldc2l 12, cr9, [lr, #232] @ 0xe8 │ │ - ldc2l 3, cr0, [lr, #244] @ 0xf4 │ │ + vcadd.f32 q15, q6, q1, #270 │ │ + ldc2l 3, cr0, [lr, #760] @ 0x2f8 │ │ + ldc2l 12, cr9, [lr, #412] @ 0x19c │ │ + ldc2l 3, cr0, [lr, #424] @ 0x1a8 │ │ eoreq r7, pc, ip, asr #30 │ │ eoreq r7, pc, r4, ror lr @ │ │ eoreq r7, pc, r8, asr lr @ │ │ - ldc2l 7, cr12, [ip, #188] @ 0xbc │ │ + ldc2l 7, cr12, [ip, #368] @ 0x170 │ │ │ │ 02460ff4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d13} │ │ sub sp, sp, #760 @ 0x2f8 │ │ @@ -1337565,16 +1337564,16 @@ │ │ add r0, r0, r1, lsl #3 │ │ ldr r1, [pc, #556] @ 24620f8 │ │ add r1, pc, r1 │ │ bl 270f460 │ │ mvn r4, #71 @ 0x47 │ │ mov r6, r5 │ │ b 2461f00 │ │ - ldc2l 5, cr12, [ip, #392] @ 0x188 │ │ - ldc2l 5, cr12, [ip, #248] @ 0xf8 │ │ + ldc2l 5, cr12, [ip, #572] @ 0x23c │ │ + ldc2l 5, cr12, [ip, #428] @ 0x1ac │ │ add r0, sp, #2800 @ 0xaf0 │ │ add r4, r4, #1 │ │ add r0, r0, r1, lsl #3 │ │ add r6, r6, #8 │ │ cmn r4, #66 @ 0x42 │ │ vstr d8, [r0] │ │ beq 246205c │ │ @@ -1337685,67 +1337684,67 @@ │ │ bcc 2461dac │ │ mov r0, r8 │ │ mov r2, sl │ │ movw r3, #515 @ 0x203 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2461dac │ │ - ldc2l 14, cr11, [sp, #980] @ 0x3d4 │ │ - ldc2l 12, cr1, [ip, #644] @ 0x284 │ │ - ldc2l 15, cr3, [fp, #636] @ 0x27c │ │ - ldc2l 12, cr11, [sp, #500] @ 0x1f4 │ │ - ldc2l 10, cr1, [ip, #164] @ 0xa4 @ │ │ - ldc2l 2, cr10, [ip, #144] @ 0x90 │ │ - ldc2l 5, cr6, [ip, #176] @ 0xb0 │ │ - ldc2l 6, cr3, [lr, #484] @ 0x1e4 │ │ - ldc2l 0, cr10, [ip, #464] @ 0x1d0 │ │ - ldc2l 3, cr6, [ip, #496] @ 0x1f0 │ │ - ldc2l 0, cr10, [ip, #240] @ 0xf0 │ │ - ldc2l 3, cr6, [ip, #272] @ 0x110 │ │ - ldc2l 6, cr9, [ip, #528] @ 0x210 │ │ - ldc2l 9, cr5, [ip, #280] @ 0x118 @ │ │ - ldc2l 11, cr2, [lr, #516] @ 0x204 @ │ │ + ldc2l 15, cr11, [sp, #136] @ 0x88 │ │ + ldc2l 12, cr1, [ip, #824] @ 0x338 │ │ + ldc2l 15, cr3, [fp, #816] @ 0x330 │ │ + ldc2l 12, cr11, [sp, #680] @ 0x2a8 │ │ + ldc2l 10, cr1, [ip, #344] @ 0x158 @ │ │ + ldc2l 2, cr10, [ip, #324] @ 0x144 │ │ + ldc2l 5, cr6, [ip, #356] @ 0x164 │ │ + ldc2l 6, cr3, [lr, #664] @ 0x298 │ │ + ldc2l 0, cr10, [ip, #644] @ 0x284 │ │ + ldc2l 3, cr6, [ip, #676] @ 0x2a4 │ │ + ldc2l 0, cr10, [ip, #420] @ 0x1a4 │ │ + ldc2l 3, cr6, [ip, #452] @ 0x1c4 │ │ + ldc2l 6, cr9, [ip, #708] @ 0x2c4 │ │ + ldc2l 9, cr5, [ip, #370] @ 0x172 @ │ │ + ldc2l 11, cr2, [lr, #696] @ 0x2b8 @ │ │ eoreq r6, pc, r8, asr #27 │ │ - ldc2l 15, cr9, [ip, #976] @ 0x3d0 │ │ - ldc2l 2, cr6, [ip, #1008] @ 0x3f0 │ │ - ldc2l 12, cr13, [sp, #4] │ │ - ldc2l 1, cr6, [ip, #32] │ │ - ldc2l 10, cr13, [sp, #180] @ 0xb4 @ │ │ - ldc2l 15, cr5, [ip, #208] @ 0xd0 │ │ - ldc2l 9, cr13, [sp, #498] @ 0x1f2 @ │ │ - ldc2l 9, cr13, [sp, #386] @ 0x182 @ │ │ - ldc2l 14, cr5, [ip, #800] @ 0x320 │ │ - ldc2l 9, cr13, [sp, #274] @ 0x112 @ │ │ - ldc2l 14, cr5, [ip, #576] @ 0x240 │ │ - vcadd.f32 d29, d29, d9, #270 │ │ - ldc2l 13, cr5, [ip, #576] @ 0x240 │ │ - ldc2l 7, cr13, [sp, #916] @ 0x394 │ │ - ldc2l 12, cr5, [ip, #944] @ 0x3b0 │ │ - ldc2l 7, cr13, [sp, #148] @ 0x94 │ │ - ldc2l 12, cr5, [ip, #176] @ 0xb0 │ │ - ldc2l 6, cr13, [sp, #756] @ 0x2f4 │ │ - ldc2l 11, cr5, [ip, #784] @ 0x310 @ │ │ - ldc2l 6, cr13, [sp, #548] @ 0x224 │ │ - ldc2l 11, cr5, [ip, #576] @ 0x240 @ │ │ - ldc2l 6, cr13, [sp, #340] @ 0x154 │ │ - ldc2l 11, cr5, [ip, #368] @ 0x170 @ │ │ - ldc2l 6, cr13, [sp, #132] @ 0x84 │ │ - ldc2l 11, cr5, [ip, #160] @ 0xa0 @ │ │ - ldc2l 5, cr13, [sp, #948] @ 0x3b4 │ │ - ldc2l 10, cr5, [ip, #976] @ 0x3d0 @ │ │ - ldc2l 5, cr13, [sp, #724] @ 0x2d4 │ │ - ldc2l 10, cr5, [ip, #752] @ 0x2f0 @ │ │ - ldc2l 15, cr9, [ip, #352] @ 0x160 │ │ - ldc2l 2, cr6, [ip, #384] @ 0x180 │ │ + ldc2l 0, cr10, [ip, #132] @ 0x84 │ │ + ldc2l 3, cr6, [ip, #164] @ 0xa4 │ │ + ldc2l 12, cr13, [sp, #184] @ 0xb8 │ │ + ldc2l 1, cr6, [ip, #212] @ 0xd4 │ │ + ldc2l 10, cr13, [sp, #360] @ 0x168 @ │ │ + ldc2l 15, cr5, [ip, #388] @ 0x184 │ │ + ldc2l 10, cr13, [sp, #152] @ 0x98 @ │ │ + ldc2l 9, cr13, [sp, #476] @ 0x1dc @ │ │ + ldc2l 14, cr5, [ip, #980] @ 0x3d4 │ │ + ldc2l 9, cr13, [sp, #364] @ 0x16c @ │ │ + ldc2l 14, cr5, [ip, #756] @ 0x2f4 │ │ + ldc2l 8, cr13, [sp, #728] @ 0x2d8 │ │ + ldc2l 13, cr5, [ip, #756] @ 0x2f4 │ │ + ldc2l 8, cr13, [sp, #72] @ 0x48 │ │ + ldc2l 13, cr5, [ip, #100] @ 0x64 │ │ + ldc2l 7, cr13, [sp, #328] @ 0x148 │ │ + ldc2l 12, cr5, [ip, #356] @ 0x164 │ │ + ldc2l 6, cr13, [sp, #936] @ 0x3a8 │ │ + ldc2l 11, cr5, [ip, #964] @ 0x3c4 @ │ │ + ldc2l 6, cr13, [sp, #728] @ 0x2d8 │ │ + ldc2l 11, cr5, [ip, #756] @ 0x2f4 @ │ │ + ldc2l 6, cr13, [sp, #520] @ 0x208 │ │ + ldc2l 11, cr5, [ip, #548] @ 0x224 @ │ │ + ldc2l 6, cr13, [sp, #312] @ 0x138 │ │ + ldc2l 11, cr5, [ip, #340] @ 0x154 @ │ │ + ldc2l 6, cr13, [sp, #104] @ 0x68 │ │ + ldc2l 11, cr5, [ip, #132] @ 0x84 @ │ │ + ldc2l 5, cr13, [sp, #904] @ 0x388 │ │ + ldc2l 10, cr5, [ip, #932] @ 0x3a4 @ │ │ + ldc2l 15, cr9, [ip, #532] @ 0x214 │ │ + ldc2l 2, cr6, [ip, #564] @ 0x234 │ │ ldc2l 12, cr14, [lr, #896] @ 0x380 │ │ - ldc2l 4, cr13, [sp, #996] @ 0x3e4 │ │ - ldc2l 10, cr5, [ip] @ │ │ - ldc2l 11, cr2, [lr, #820] @ 0x334 @ │ │ - ldc2l 9, cr5, [ip, #416] @ 0x1a0 @ │ │ - ldc2l 3, cr12, [ip, #328] @ 0x148 │ │ + ldc2l 5, cr13, [sp, #152] @ 0x98 │ │ + ldc2l 10, cr5, [ip, #180] @ 0xb4 @ │ │ + ldc2l 11, cr2, [lr, #1000] @ 0x3e8 @ │ │ + ldc2l 9, cr5, [ip, #506] @ 0x1fa @ │ │ + ldc2l 3, cr12, [ip, #508] @ 0x1fc │ │ │ │ 02462190 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #316 @ 0x13c │ │ ldr r9, [fp, #8] │ │ mov r5, r0 │ │ @@ -1338041,29 +1338040,29 @@ │ │ ldr r0, [pc, #76] @ 246267c │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 7, cr8, [lr, #592] @ 0x250 │ │ + ldc2l 7, cr8, [lr, #772] @ 0x304 │ │ streq sl, [pc], #-2896 @ 2462650 │ │ eoreq r6, pc, ip, lsr #21 │ │ streq sl, [pc], #-2876 @ 2462658 │ │ strdeq r6, [pc], -r8 @ │ │ eoreq r6, pc, r8, lsl sl @ │ │ - ldc2l 2, cr3, [ip, #48] @ 0x30 │ │ + ldc2l 2, cr3, [ip, #228] @ 0xe4 │ │ eoreq r6, pc, r0, asr #14 │ │ eoreq r6, pc, r8, ror #13 │ │ - ldc2l 7, cr4, [sp, #468] @ 0x1d4 │ │ - ldc2l 8, cr0, [ip, #884] @ 0x374 │ │ + ldc2l 7, cr4, [sp, #648] @ 0x288 │ │ + ldc2l 9, cr0, [ip, #20] @ │ │ eoreq r6, pc, r4, lsl #13 │ │ - ldc2l 10, cr0, [sp, #840] @ 0x348 @ │ │ + ldc2l 10, cr0, [sp, #1020] @ 0x3fc @ │ │ eoreq r6, pc, r8, lsl r7 @ │ │ - ldc2l 3, cr8, [lr, #192] @ 0xc0 │ │ + ldc2l 3, cr8, [lr, #372] @ 0x174 │ │ │ │ 02462680 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #588 @ 0x24c │ │ mov r7, r0 │ │ ldr r0, [fp, #8] │ │ @@ -1338186,19 +1338185,19 @@ │ │ ldr r0, [pc, #36] @ 2462890 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 14, cr10, [fp, #372] @ 0x174 │ │ - ldc2l 0, cr5, [ip, #244] @ 0xf4 │ │ + ldc2l 14, cr10, [fp, #552] @ 0x228 │ │ + ldc2l 0, cr5, [ip, #424] @ 0x1a8 │ │ eoreq r6, pc, r8, lsl #9 │ │ eoreq r6, pc, r8, lsl #9 │ │ - ldc2l 12, cr10, [fp, #724] @ 0x2d4 │ │ + ldc2l 12, cr10, [fp, #904] @ 0x388 │ │ │ │ 02462894 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #144 @ 0x90 │ │ vldr d16, [r0] │ │ mov r4, r2 │ │ @@ -1338385,18 +1338384,18 @@ │ │ mov r8, r0 │ │ b 2462ae4 │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 12, cr7, [lr, #620] @ 0x26c │ │ - ldc2l 2, cr4, [sp, #884] @ 0x374 │ │ - ldc2l 12, cr12, [fp, #240] @ 0xf0 │ │ - ldc2l 2, cr4, [sp, #676] @ 0x2a4 │ │ + ldc2l 12, cr7, [lr, #800] @ 0x320 │ │ + ldc2l 3, cr4, [sp, #40] @ 0x28 │ │ + ldc2l 12, cr12, [fp, #420] @ 0x1a4 │ │ + ldc2l 2, cr4, [sp, #856] @ 0x358 │ │ │ │ 02462b94 : │ │ vldmia r1, {d16-d18} │ │ vldmia r0, {d19-d26} │ │ vmul.f64 d24, d24, d17 │ │ vmul.f64 d23, d23, d17 │ │ vmul.f64 d17, d22, d17 │ │ @@ -1339048,93 +1339047,93 @@ │ │ streq sl, [pc], #-836 @ 24635b4 │ │ streq sl, [pc], #-788 @ 24635b8 │ │ streq sl, [pc], #-488 @ 24635bc │ │ streq sl, [pc], #-848 @ 24635c0 │ │ streq sl, [pc], #-860 @ 24635c4 │ │ mlaeq pc, r8, r0, r6 @ │ │ eoreq r6, pc, r0 │ │ - ldc2l 10, cr4, [ip, #400] @ 0x190 @ │ │ - ldc2l 15, cr15, [sp, #976] @ 0x3d0 │ │ + ldc2l 10, cr4, [ip, #580] @ 0x244 @ │ │ + ldc2l 0, cr0, [lr, #132] @ 0x84 │ │ ldrdeq r5, [pc], -r4 @ │ │ eoreq r6, pc, r4, asr r0 @ │ │ - ldc2l 2, cr2, [sp, #120] @ 0x78 │ │ - ldc2l 15, cr15, [sp, #752] @ 0x2f0 │ │ + ldc2l 2, cr2, [sp, #300] @ 0x12c │ │ + ldc2l 15, cr15, [sp, #932] @ 0x3a4 │ │ eoreq r6, pc, r0, lsr #32 │ │ stc2l 4, cr6, [r7, #512]! @ 0x200 │ │ streq sl, [pc], #-616 @ 24635f0 │ │ streq sl, [pc], #-520 @ 24635f4 │ │ streq sl, [pc], #-112 @ 24635f8 │ │ streq sl, [pc], #-300 @ 24635fc │ │ streq sl, [pc], #-392 @ 2463600 │ │ - ldc2l 9, cr4, [ip, #38] @ 0x26 @ │ │ + ldc2l 9, cr4, [ip, #128] @ 0x80 @ │ │ streq sl, [pc], #-336 @ 2463608 │ │ - ldc2l 11, cr3, [lr, #516] @ 0x204 @ │ │ + ldc2l 11, cr3, [lr, #696] @ 0x2b8 @ │ │ streq sl, [pc], #-280 @ 2463610 │ │ - ldc2l 15, cr3, [fp, #476] @ 0x1dc │ │ + ldc2l 15, cr3, [fp, #656] @ 0x290 │ │ streq sl, [pc], #-216 @ 2463618 │ │ streq sl, [pc], #-188 @ 246361c │ │ streq sl, [pc], #-16 @ 2463620 │ │ streq r9, [pc], #-4008 @ 2463624 │ │ streq r9, [pc], #-3884 @ 2463628 │ │ eoreq r5, pc, r8, ror #25 │ │ eoreq r5, pc, ip, asr ip @ │ │ streq r9, [pc], #-3864 @ 2463634 │ │ streq r9, [pc], #-3840 @ 2463638 │ │ - ldc2l 6, cr4, [ip, #640] @ 0x280 │ │ - ldc2l 12, cr15, [sp, #192] @ 0xc0 │ │ + ldc2l 6, cr4, [ip, #820] @ 0x334 │ │ + ldc2l 12, cr15, [sp, #372] @ 0x174 │ │ streq r9, [pc], #-3796 @ 2463644 │ │ mlaeq pc, r0, ip, r5 @ │ │ eoreq r5, pc, r4, lsr ip @ │ │ streq r9, [pc], #-3776 @ 2463650 │ │ streq r9, [pc], #-3752 @ 2463654 │ │ - ldc2l 1, cr12, [sp, #240] @ 0xf0 │ │ - ldc2l 11, cr15, [sp, #864] @ 0x360 @ │ │ + ldc2l 1, cr12, [sp, #420] @ 0x1a4 │ │ + ldc2l 12, cr15, [sp, #20] │ │ streq r9, [pc], #-3812 @ 2463660 │ │ streq r9, [pc], #-3724 @ 2463664 │ │ streq r9, [pc], #-3744 @ 2463668 │ │ - ldc2l 4, cr10, [ip, #340] @ 0x154 │ │ + ldc2l 4, cr10, [ip, #520] @ 0x208 │ │ streq r9, [pc], #-3544 @ 2463670 │ │ streq r9, [pc], #-3520 @ 2463674 │ │ streq r9, [pc], #-3692 @ 2463678 │ │ ldc2l 4, cr11, [lr, #616] @ 0x268 │ │ streq r9, [pc], #-3648 @ 2463680 │ │ - ldc2l 12, cr3, [fp, #412] @ 0x19c │ │ + ldc2l 12, cr3, [fp, #592] @ 0x250 │ │ streq r9, [pc], #-3448 @ 2463688 │ │ streq r9, [pc], #-3344 @ 246368c │ │ streq r9, [pc], #-3320 @ 2463690 │ │ streq r9, [pc], #-3388 @ 2463694 │ │ streq r9, [pc], #-3472 @ 2463698 │ │ streq r9, [pc], #-3260 @ 246369c │ │ streq r9, [pc], #-3440 @ 24636a0 │ │ streq r9, [pc], #-3236 @ 24636a4 │ │ - ldc2l 6, cr13, [sp, #644] @ 0x284 │ │ + ldc2l 6, cr13, [sp, #824] @ 0x338 │ │ streq r9, [pc], #-3392 @ 24636ac │ │ streq r9, [pc], #-3276 @ 24636b0 │ │ streq r9, [pc], #-3188 @ 24636b4 │ │ - ldc2l 0, cr14, [ip, #1016] @ 0x3f8 │ │ + ldc2l 1, cr14, [ip, #172] @ 0xac │ │ streq r9, [pc], #-3260 @ 24636bc │ │ streq r9, [pc], #-3232 @ 24636c0 │ │ streq r9, [pc], #-3104 @ 24636c4 │ │ streq r9, [pc], #-3076 @ 24636c8 │ │ streq r9, [pc], #-3080 @ 24636cc │ │ - ldc2l 10, cr3, [fp, #732] @ 0x2dc @ │ │ + ldc2l 10, cr3, [fp, #912] @ 0x390 @ │ │ streq r9, [pc], #-3112 @ 24636d4 │ │ streq r9, [pc], #-3076 @ 24636d8 │ │ streq r9, [pc], #-2944 @ 24636dc │ │ streq r9, [pc], #-3060 @ 24636e0 │ │ eoreq r5, pc, r8, ror r9 @ │ │ - ldc2l 12, cr8, [sp, #368] @ 0x170 │ │ + ldc2l 12, cr8, [sp, #548] @ 0x224 │ │ streq r9, [pc], #-2900 @ 24636ec │ │ streq r9, [pc], #-3004 @ 24636f0 │ │ streq r9, [pc], #-2872 @ 24636f4 │ │ streq r9, [pc], #-2924 @ 24636f8 │ │ streq r9, [pc], #-2876 @ 24636fc │ │ - ldc2l 13, cr9, [sp, #480] @ 0x1e0 │ │ - vcadd.f32 , , q8, #270 │ │ - ldc2l 13, cr15, [ip, #144] @ 0x90 │ │ + ldc2l 13, cr9, [sp, #660] @ 0x294 │ │ + vcadd.f32 d31, d29, d13, #270 │ │ + ldc2l 13, cr15, [ip, #324] @ 0x144 │ │ eoreq r5, pc, ip, ror r8 @ │ │ streq r9, [pc], #-2488 @ 2463710 │ │ streq r9, [pc], #-2684 @ 2463714 │ │ eoreq r5, pc, r8, ror r8 @ │ │ eoreq r5, pc, r4, lsr r8 @ │ │ │ │ 02463718 : │ │ @@ -1339227,15 +1339226,15 @@ │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r2, #0 │ │ cmp r2, r0 │ │ blt 2463844 │ │ b 2463860 │ │ - ldc2l 5, cr3, [fp, #748] @ 0x2ec │ │ + ldc2l 5, cr3, [fp, #928] @ 0x3a0 │ │ │ │ 02463880 : │ │ vldr d16, [pc, #8] @ 2463890 │ │ vmov r0, r1, d16 │ │ bx lr │ │ nop {0} │ │ ldrbtle pc, [sp], #950 @ 0x3b6 @ │ │ @@ -1339298,25 +1339297,25 @@ │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ ldr r0, [pc, #32] @ 246399c │ │ add r0, pc, r0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 9, cr15, [sl, #192] @ 0xc0 @ │ │ - ldc2l 10, cr6, [lr, #944] @ 0x3b0 @ │ │ - ldc2l 5, cr15, [fp, #580] @ 0x244 │ │ - ldc2l 15, cr2, [fp, #384] @ 0x180 │ │ - ldc2l 0, cr15, [sp, #304] @ 0x130 │ │ - ldc2l 8, cr15, [sl, #592] @ 0x250 │ │ - ldc2l 8, cr7, [ip, #472] @ 0x1d8 │ │ - ldc2l 5, cr15, [fp, #404] @ 0x194 │ │ - ldc2l 15, cr2, [fp, #208] @ 0xd0 │ │ - ldc2l 9, cr7, [fp, #412] @ 0x19c @ │ │ - ldc2l 9, cr15, [sl] @ │ │ + ldc2l 9, cr15, [sl, #282] @ 0x11a @ │ │ + ldc2l 11, cr6, [lr, #100] @ 0x64 @ │ │ + ldc2l 5, cr15, [fp, #760] @ 0x2f8 │ │ + ldc2l 15, cr2, [fp, #564] @ 0x234 │ │ + ldc2l 0, cr15, [sp, #484] @ 0x1e4 │ │ + vcadd.f32 , q13, , #270 │ │ + vcadd.f32 d23, d28, d19, #270 │ │ + ldc2l 5, cr15, [fp, #584] @ 0x248 │ │ + ldc2l 15, cr2, [fp, #388] @ 0x184 │ │ + ldc2l 9, cr7, [fp, #502] @ 0x1f6 @ │ │ + ldc2l 9, cr15, [sl, #90] @ 0x5a @ │ │ │ │ 024639b4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8} │ │ sub sp, sp, #1744 @ 0x6d0 │ │ @@ -1340372,15 +1340371,15 @@ │ │ b 2464b24 │ │ eoreq r5, pc, r8, lsl #6 │ │ ldc2l 0, cr9, [lr, #988] @ 0x3dc │ │ streq r9, [pc], #-1448 @ 2464a40 │ │ streq r9, [pc], #-1409 @ 2464a44 │ │ streq r9, [pc], #-1444 @ 2464a48 │ │ eoreq r5, pc, r4, lsl #5 │ │ - ldc2l 15, cr3, [fp, #992] @ 0x3e0 │ │ + ldc2l 0, cr4, [fp, #148] @ 0x94 │ │ ldr r0, [pc, #796] @ 2464d70 │ │ movw r3, #1047 @ 0x417 │ │ ldr r2, [pc, #792] @ 2464d74 │ │ ldr r1, [sp, #16] │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1340416,18 +1340415,18 @@ │ │ add r1, r2, r1, lsl #1 │ │ add r0, pc, r0 │ │ mov r2, r4 │ │ bl 270d9c0 │ │ add r1, r9, r0, lsl #3 │ │ add r0, sp, #128 @ 0x80 │ │ b 2464b7c │ │ - ldc2l 9, cr11, [ip, #442] @ 0x1ba @ │ │ - ldc2l 14, cr6, [lr, #200] @ 0xc8 │ │ - ldc2l 6, cr11, [sp, #876] @ 0x36c │ │ - ldc2l 6, cr11, [sp, #268] @ 0x10c │ │ + ldc2l 10, cr11, [ip, #40] @ 0x28 @ │ │ + ldc2l 14, cr6, [lr, #380] @ 0x17c │ │ + ldc2l 7, cr11, [sp, #32] │ │ + ldc2l 6, cr11, [sp, #448] @ 0x1c0 │ │ ldr r0, [pc, #636] @ 2464d8c │ │ movw r3, #1061 @ 0x425 │ │ ldr r2, [pc, #632] @ 2464d90 │ │ ldr r1, [sp, #16] │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1340477,16 +1340476,16 @@ │ │ bl 270ebc0 │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 2464c08 │ │ ldr r0, [pc, #180] @ 2464c9c │ │ add r0, pc, r0 │ │ b 2464c54 │ │ - ldc2l 6, cr11, [sp, #108] @ 0x6c │ │ - ldc2l 5, cr11, [sp, #988] @ 0x3dc │ │ + ldc2l 6, cr11, [sp, #288] @ 0x120 │ │ + ldc2l 6, cr11, [sp, #144] @ 0x90 │ │ add r4, sp, #128 @ 0x80 │ │ add r0, sp, #368 @ 0x170 │ │ sub r1, fp, #100 @ 0x64 │ │ mov r2, r4 │ │ bl 270cf80 │ │ add r5, sp, #424 @ 0x1a8 │ │ mov r0, r4 │ │ @@ -1340516,83 +1340515,83 @@ │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r0, [pc, #20] @ 2464c8c │ │ mov r1, #137 @ 0x89 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ b 24648c8 │ │ ldc2l 4, cr8, [lr, #504] @ 0x1f8 │ │ - ldc2l 5, cr2, [fp, #492] @ 0x1ec │ │ - ldc2l 3, cr12, [sp, #380] @ 0x17c │ │ - ldc2l 15, cr5, [lr, #808] @ 0x328 │ │ - ldc2l 6, cr14, [fp, #4] │ │ - ldc2l 9, cr0, [fp, #6] @ │ │ + ldc2l 5, cr2, [fp, #672] @ 0x2a0 │ │ + ldc2l 3, cr12, [sp, #560] @ 0x230 │ │ + ldc2l 15, cr5, [lr, #988] @ 0x3dc │ │ + ldc2l 6, cr14, [fp, #184] @ 0xb8 │ │ + ldc2l 9, cr0, [fp, #96] @ 0x60 @ │ │ ldc2l 15, cr7, [lr, #396] @ 0x18c │ │ eoreq r4, pc, r0, lsr pc @ │ │ - ldc2l 3, cr11, [sp, #812] @ 0x32c │ │ - ldc2l 12, cr3, [fp, #560] @ 0x230 │ │ - ldc2l 6, cr11, [ip, #276] @ 0x114 │ │ - ldc2l 12, cr3, [fp, #256] @ 0x100 │ │ + ldc2l 3, cr11, [sp, #992] @ 0x3e0 │ │ + ldc2l 12, cr3, [fp, #740] @ 0x2e4 │ │ + ldc2l 6, cr11, [ip, #456] @ 0x1c8 │ │ + ldc2l 12, cr3, [fp, #436] @ 0x1b4 │ │ eoreq r4, pc, ip, asr #31 │ │ - ldc2l 5, cr4, [lr, #268] @ 0x10c │ │ + ldc2l 5, cr4, [lr, #448] @ 0x1c0 │ │ streq r8, [pc], #-2604 @ 2464cc4 │ │ - ldc2l 0, cr5, [ip, #372] @ 0x174 │ │ - vcadd.f32 d30, d27, d9, #270 │ │ - ldc2l 3, cr4, [lr, #668] @ 0x29c │ │ + ldc2l 0, cr5, [ip, #552] @ 0x228 │ │ + ldc2l 8, cr14, [fp, #728] @ 0x2d8 │ │ + ldc2l 3, cr4, [lr, #848] @ 0x350 │ │ streq r8, [pc], #-2192 @ 2464cd4 │ │ - ldc2l 14, cr4, [ip, #772] @ 0x304 │ │ - ldc2l 6, cr14, [fp, #948] @ 0x3b4 │ │ - ldc2l 11, cr0, [fp, #824] @ 0x338 @ │ │ - ldc2l 11, cr0, [fp, #628] @ 0x274 @ │ │ - ldc2l 13, cr8, [ip, #296] @ 0x128 │ │ - ldc2l 6, cr14, [fp, #404] @ 0x194 │ │ - ldc2l 14, cr4, [ip, #44] @ 0x2c │ │ + ldc2l 14, cr4, [ip, #952] @ 0x3b8 │ │ + ldc2l 7, cr14, [fp, #104] @ 0x68 │ │ + ldc2l 11, cr0, [fp, #1004] @ 0x3ec @ │ │ + ldc2l 11, cr0, [fp, #808] @ 0x328 @ │ │ + ldc2l 13, cr8, [ip, #476] @ 0x1dc │ │ + ldc2l 6, cr14, [fp, #584] @ 0x248 │ │ + ldc2l 14, cr4, [ip, #224] @ 0xe0 │ │ ldc2l 2, cr8, [lr, #828] @ 0x33c │ │ - ldc2l 4, cr11, [ip, #148] @ 0x94 │ │ - ldc2l 9, cr3, [fp, #112] @ 0x70 @ │ │ - ldc2l 3, cr11, [ip, #132] @ 0x84 │ │ - ldc2l 9, cr3, [fp, #168] @ 0xa8 @ │ │ - ldc2l 5, cr6, [lr, #552] @ 0x228 │ │ - vcadd.f32 d22, d30, d6, #270 │ │ - ldc2l 10, cr3, [fp, #32] @ │ │ - ldc2l 2, cr11, [ip, #916] @ 0x394 │ │ - ldc2l 2, cr11, [ip, #500] @ 0x1f4 │ │ - ldc2l 2, cr11, [ip, #324] @ 0x144 │ │ - ldc2l 2, cr11, [ip, #164] @ 0xa4 │ │ - ldc2l 0, cr11, [ip, #164] @ 0xa4 │ │ - ldc2l 4, cr6, [lr, #424] @ 0x1a8 │ │ - ldc2l 3, cr6, [lr, #888] @ 0x378 │ │ - ldc2l 5, cr3, [fp, #384] @ 0x180 │ │ - ldc2l 3, cr6, [lr, #680] @ 0x2a8 │ │ - ldc2l 1, cr11, [ip, #932] @ 0x3a4 │ │ - ldc2l 1, cr11, [ip, #804] @ 0x324 │ │ - ldc2l 5, cr6, [lr, #1000] @ 0x3e8 │ │ - ldc2l 5, cr6, [lr, #216] @ 0xd8 │ │ - ldc2l 6, cr3, [fp, #736] @ 0x2e0 │ │ - ldc2l 5, cr6, [lr, #8] │ │ + ldc2l 4, cr11, [ip, #328] @ 0x148 │ │ + ldc2l 9, cr3, [fp, #202] @ 0xca @ │ │ + ldc2l 3, cr11, [ip, #312] @ 0x138 │ │ + ldc2l 9, cr3, [fp, #258] @ 0x102 @ │ │ + ldc2l 5, cr6, [lr, #732] @ 0x2dc │ │ + ldc2l 8, cr6, [lr, #716] @ 0x2cc │ │ + ldc2l 10, cr3, [fp, #212] @ 0xd4 @ │ │ + ldc2l 3, cr11, [ip, #72] @ 0x48 │ │ + ldc2l 2, cr11, [ip, #680] @ 0x2a8 │ │ + ldc2l 2, cr11, [ip, #504] @ 0x1f8 │ │ + ldc2l 2, cr11, [ip, #344] @ 0x158 │ │ + ldc2l 0, cr11, [ip, #344] @ 0x158 │ │ + ldc2l 4, cr6, [lr, #604] @ 0x25c │ │ + ldc2l 4, cr6, [lr, #44] @ 0x2c │ │ + ldc2l 5, cr3, [fp, #564] @ 0x234 │ │ + ldc2l 3, cr6, [lr, #860] @ 0x35c │ │ + ldc2l 2, cr11, [ip, #88] @ 0x58 │ │ + ldc2l 1, cr11, [ip, #984] @ 0x3d8 │ │ + ldc2l 6, cr6, [lr, #156] @ 0x9c │ │ + ldc2l 5, cr6, [lr, #396] @ 0x18c │ │ + ldc2l 6, cr3, [fp, #916] @ 0x394 │ │ + ldc2l 5, cr6, [lr, #188] @ 0xbc │ │ eoreq r4, pc, r0, lsr #24 │ │ - ldc2l 3, cr11, [ip, #548] @ 0x224 │ │ - ldc2l 2, cr6, [lr, #184] @ 0xb8 │ │ - ldc2l 3, cr3, [fp, #704] @ 0x2c0 │ │ - ldc2l 13, cr10, [ip, #996] @ 0x3e4 │ │ - ldc2l 3, cr3, [fp, #976] @ 0x3d0 │ │ - ldc2l 11, cr10, [ip, #932] @ 0x3a4 @ │ │ - ldc2l 1, cr3, [fp, #912] @ 0x390 │ │ - ldc2l 15, cr5, [lr, #344] @ 0x158 │ │ - ldc2l 0, cr3, [fp, #864] @ 0x360 │ │ - ldc2l 10, cr10, [ip, #532] @ 0x214 @ │ │ - ldc2l 0, cr3, [fp, #512] @ 0x200 │ │ - ldc2l 10, cr10, [ip, #372] @ 0x174 @ │ │ - ldc2l 0, cr3, [fp, #352] @ 0x160 │ │ - ldc2l 10, cr10, [ip, #212] @ 0xd4 @ │ │ - ldc2l 0, cr3, [fp, #192] @ 0xc0 │ │ - ldc2l 14, cr5, [lr, #488] @ 0x1e8 │ │ - ldc2l 9, cr10, [ip, #402] @ 0x192 @ │ │ - ldc2l 15, cr2, [fp, #784] @ 0x310 │ │ - ldc2l 13, cr5, [lr, #984] @ 0x3d8 │ │ - ldc2l 15, cr2, [fp, #480] @ 0x1e0 │ │ + ldc2l 3, cr11, [ip, #728] @ 0x2d8 │ │ + ldc2l 2, cr6, [lr, #364] @ 0x16c │ │ + ldc2l 3, cr3, [fp, #884] @ 0x374 │ │ + ldc2l 14, cr10, [ip, #152] @ 0x98 │ │ + ldc2l 4, cr3, [fp, #132] @ 0x84 │ │ + ldc2l 12, cr10, [ip, #88] @ 0x58 │ │ + ldc2l 2, cr3, [fp, #68] @ 0x44 │ │ + ldc2l 15, cr5, [lr, #524] @ 0x20c │ │ + ldc2l 1, cr3, [fp, #20] │ │ + ldc2l 10, cr10, [ip, #712] @ 0x2c8 @ │ │ + ldc2l 0, cr3, [fp, #692] @ 0x2b4 │ │ + ldc2l 10, cr10, [ip, #552] @ 0x228 @ │ │ + ldc2l 0, cr3, [fp, #532] @ 0x214 │ │ + ldc2l 10, cr10, [ip, #392] @ 0x188 @ │ │ + ldc2l 0, cr3, [fp, #372] @ 0x174 │ │ + ldc2l 14, cr5, [lr, #668] @ 0x29c │ │ + ldc2l 9, cr10, [ip, #492] @ 0x1ec @ │ │ + ldc2l 15, cr2, [fp, #964] @ 0x3c4 │ │ + ldc2l 14, cr5, [lr, #140] @ 0x8c │ │ + ldc2l 15, cr2, [fp, #660] @ 0x294 │ │ eoreq r4, pc, r0, lsr #2 │ │ ldc2l 14, cr7, [lr, #1004] @ 0x3ec │ │ │ │ 02464da4 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #616 @ 0x268 │ │ @@ -1340881,26 +1340880,26 @@ │ │ mov r3, r8 │ │ bl 270f5c0 │ │ mov r0, r9 │ │ mov r1, r8 │ │ mov r2, r5 │ │ bl 270f3c0 │ │ b 24651ec │ │ - ldc2l 10, cr6, [fp, #20] @ │ │ + ldc2l 10, cr6, [fp, #200] @ 0xc8 @ │ │ eoreq r3, pc, ip, asr pc @ │ │ eoreq r3, pc, r8, asr pc @ │ │ eoreq r3, pc, r4, asr ip @ │ │ - ldc2l 12, cr1, [sp, #780] @ 0x30c │ │ - ldc2l 13, cr13, [fp, #388] @ 0x184 │ │ + ldc2l 12, cr1, [sp, #960] @ 0x3c0 │ │ + ldc2l 13, cr13, [fp, #568] @ 0x238 │ │ eoreq r3, pc, r4, ror #23 │ │ ldc2l 4, cr9, [lr, #596] @ 0x254 │ │ - ldc2l 3, cr8, [fp, #416] @ 0x1a0 │ │ - ldc2l 12, cr13, [fp, #948] @ 0x3b4 │ │ - ldc2l 0, cr10, [sp, #316] @ 0x13c │ │ - ldc2l 5, cr6, [fp, #948] @ 0x3b4 │ │ + ldc2l 3, cr8, [fp, #596] @ 0x254 │ │ + ldc2l 13, cr13, [fp, #104] @ 0x68 │ │ + ldc2l 0, cr10, [sp, #496] @ 0x1f0 │ │ + ldc2l 6, cr6, [fp, #104] @ 0x68 │ │ │ │ 02465264 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d12} │ │ sub sp, sp, #8 │ │ @@ -1341615,114 +1341614,114 @@ │ │ ldrdeq r3, [pc], -ip @ │ │ streq r7, [pc], #-3644 @ 2465d94 │ │ streq r7, [pc], #-3564 @ 2465d98 │ │ streq r7, [pc], #-3408 @ 2465d9c │ │ streq r7, [pc], #-4020 @ 2465da0 │ │ streq r7, [pc], #-3536 @ 2465da4 │ │ streq r7, [pc], #-4020 @ 2465da8 │ │ - ldc2l 12, cr11, [sp, #708] @ 0x2c4 │ │ + ldc2l 12, cr11, [sp, #888] @ 0x378 │ │ ldc2l 2, cr9, [lr, #460] @ 0x1cc │ │ - ldc2l 7, cr3, [lr, #476] @ 0x1dc │ │ + ldc2l 7, cr3, [lr, #656] @ 0x290 │ │ streq r7, [pc], #-3200 @ 2465db8 │ │ streq r7, [pc], #-3152 @ 2465dbc │ │ streq r7, [pc], #-3276 @ 2465dc0 │ │ eoreq r3, pc, ip, ror #17 │ │ streq r7, [pc], #-3068 @ 2465dc8 │ │ streq r7, [pc], #-3428 @ 2465dcc │ │ streq r7, [pc], #-3792 @ 2465dd0 │ │ - ldc2l 2, cr2, [ip, #468] @ 0x1d4 │ │ + ldc2l 2, cr2, [ip, #648] @ 0x288 │ │ streq r7, [pc], #-3152 @ 2465dd8 │ │ streq r7, [pc], #-3516 @ 2465ddc │ │ streq r7, [pc], #-2984 @ 2465de0 │ │ streq r7, [pc], #-2940 @ 2465de4 │ │ streq r7, [pc], #-3076 @ 2465de8 │ │ streq r7, [pc], #-2912 @ 2465dec │ │ - ldc2l 2, cr3, [lr, #948] @ 0x3b4 │ │ - ldc2l 11, cr11, [sp, #36] @ 0x24 @ │ │ + ldc2l 3, cr3, [lr, #104] @ 0x68 │ │ + ldc2l 11, cr11, [sp, #216] @ 0xd8 @ │ │ streq r7, [pc], #-2852 @ 2465df8 │ │ streq r7, [pc], #-3424 @ 2465dfc │ │ streq r7, [pc], #-3476 @ 2465e00 │ │ streq r7, [pc], #-3396 @ 2465e04 │ │ - ldc2l 2, cr3, [lr, #324] @ 0x144 │ │ - ldc2l 10, cr11, [sp, #436] @ 0x1b4 @ │ │ - ldc2l 5, cr3, [lr, #220] @ 0xdc │ │ + ldc2l 2, cr3, [lr, #504] @ 0x1f8 │ │ + ldc2l 10, cr11, [sp, #616] @ 0x268 @ │ │ + ldc2l 5, cr3, [lr, #400] @ 0x190 │ │ streq r7, [pc], #-3304 @ 2465e14 │ │ streq r7, [pc], #-3288 @ 2465e18 │ │ streq r7, [pc], #-2552 @ 2465e1c │ │ eoreq r3, pc, r8, lsr #13 │ │ streq r7, [pc], #-3228 @ 2465e24 │ │ streq r7, [pc], #-2480 @ 2465e28 │ │ - ldc2l 0, cr2, [ip, #148] @ 0x94 │ │ + ldc2l 0, cr2, [ip, #328] @ 0x148 │ │ streq r7, [pc], #-2420 @ 2465e30 │ │ streq r7, [pc], #-2924 @ 2465e34 │ │ streq r7, [pc], #-3028 @ 2465e38 │ │ streq r7, [pc], #-2976 @ 2465e3c │ │ streq r7, [pc], #-2336 @ 2465e40 │ │ streq r7, [pc], #-2280 @ 2465e44 │ │ streq r7, [pc], #-3412 @ 2465e48 │ │ streq r7, [pc], #-3400 @ 2465e4c │ │ streq r7, [pc], #-3320 @ 2465e50 │ │ streq r7, [pc], #-2260 @ 2465e54 │ │ streq r7, [pc], #-2952 @ 2465e58 │ │ - ldc2l 0, cr3, [lr, #388] @ 0x184 │ │ - ldc2l 8, cr11, [sp, #500] @ 0x1f4 │ │ - ldc2l 9, cr0, [sp, #338] @ 0x152 @ │ │ - ldc2l 13, cr7, [ip, #400] @ 0x190 │ │ + ldc2l 0, cr3, [lr, #568] @ 0x238 │ │ + vcadd.f32 d27, d29, d26, #270 │ │ + ldc2l 9, cr0, [sp, #428] @ 0x1ac @ │ │ + ldc2l 13, cr7, [ip, #580] @ 0x244 │ │ streq r7, [pc], #-2756 @ 2465e6c │ │ streq r7, [pc], #-2012 @ 2465e70 │ │ streq r7, [pc], #-1960 @ 2465e74 │ │ streq r7, [pc], #-2576 @ 2465e78 │ │ streq r7, [pc], #-1900 @ 2465e7c │ │ streq r7, [pc], #-2096 @ 2465e80 │ │ streq r7, [pc], #-2220 @ 2465e84 │ │ streq r7, [pc], #-2744 @ 2465e88 │ │ - ldc2l 10, cr15, [sl, #980] @ 0x3d4 @ │ │ + ldc2l 11, cr15, [sl, #136] @ 0x88 @ │ │ streq r7, [pc], #-2536 @ 2465e90 │ │ streq r7, [pc], #-1848 @ 2465e94 │ │ streq r7, [pc], #-1980 @ 2465e98 │ │ - ldc2l 0, cr15, [sp, #144] @ 0x90 │ │ + ldc2l 0, cr15, [sp, #324] @ 0x144 │ │ streq r7, [pc], #-1780 @ 2465ea0 │ │ streq r7, [pc], #-1916 @ 2465ea4 │ │ streq r7, [pc], #-2404 @ 2465ea8 │ │ - ldc2l 9, cr13, [fp, #288] @ 0x120 @ │ │ + ldc2l 9, cr13, [fp, #378] @ 0x17a @ │ │ streq r7, [pc], #-1704 @ 2465eb0 │ │ streq r7, [pc], #-2184 @ 2465eb4 │ │ streq r7, [pc], #-2332 @ 2465eb8 │ │ - ldc2l 14, cr2, [lr, #164] @ 0xa4 │ │ - ldc2l 6, cr11, [sp, #276] @ 0x114 │ │ - ldc2l 0, cr3, [lr, #700] @ 0x2bc │ │ + ldc2l 14, cr2, [lr, #344] @ 0x158 │ │ + ldc2l 6, cr11, [sp, #456] @ 0x1c8 │ │ + ldc2l 0, cr3, [lr, #880] @ 0x370 │ │ streq r7, [pc], #-1552 @ 2465ec8 │ │ eoreq r3, pc, r0, asr #5 │ │ streq r7, [pc], #-2228 @ 2465ed0 │ │ streq r7, [pc], #-1480 @ 2465ed4 │ │ - ldc2l 12, cr1, [ip, #244] @ 0xf4 │ │ + ldc2l 12, cr1, [ip, #424] @ 0x1a8 │ │ streq r7, [pc], #-1420 @ 2465edc │ │ streq r7, [pc], #-1924 @ 2465ee0 │ │ streq r7, [pc], #-2028 @ 2465ee4 │ │ streq r7, [pc], #-1976 @ 2465ee8 │ │ streq r7, [pc], #-1336 @ 2465eec │ │ streq r7, [pc], #-1628 @ 2465ef0 │ │ streq r7, [pc], #-1288 @ 2465ef4 │ │ streq r7, [pc], #-1912 @ 2465ef8 │ │ streq r7, [pc], #-1900 @ 2465efc │ │ - ldc2l 12, cr2, [lr, #532] @ 0x214 │ │ - ldc2l 4, cr11, [sp, #644] @ 0x284 │ │ - ldc2l 5, cr0, [sp, #820] @ 0x334 │ │ - ldc2l 9, cr7, [ip, #280] @ 0x118 @ │ │ + ldc2l 12, cr2, [lr, #712] @ 0x2c8 │ │ + ldc2l 4, cr11, [sp, #824] @ 0x338 │ │ + ldc2l 5, cr0, [sp, #1000] @ 0x3e8 │ │ + ldc2l 9, cr7, [ip, #370] @ 0x172 @ │ │ streq r7, [pc], #-1772 @ 2465f10 │ │ streq r7, [pc], #-944 @ 2465f14 │ │ streq r7, [pc], #-892 @ 2465f18 │ │ streq r7, [pc], #-1508 @ 2465f1c │ │ streq r7, [pc], #-832 @ 2465f20 │ │ streq r7, [pc], #-1108 @ 2465f24 │ │ - ldc2l 13, cr14, [sp, #368] @ 0x170 │ │ + ldc2l 13, cr14, [sp, #548] @ 0x224 │ │ streq r7, [pc], #-1060 @ 2465f2c │ │ streq r7, [pc], #-1196 @ 2465f30 │ │ streq r7, [pc], #-1696 @ 2465f34 │ │ - ldc2l 6, cr13, [fp, #784] @ 0x310 │ │ + ldc2l 6, cr13, [fp, #964] @ 0x3c4 │ │ streq r7, [pc], #-988 @ 2465f3c │ │ streq r7, [pc], #-1200 @ 2465f40 │ │ │ │ 02465f3c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ @@ -1342332,39 +1342331,39 @@ │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - vcadd.f32 d25, d11, d23, #270 │ │ - ldc2l 0, cr11, [fp, #368] @ 0x170 │ │ - ldc2l 8, cr12, [fp, #68] @ 0x44 │ │ - ldc2l 14, cr6, [ip, #512] @ 0x200 │ │ - ldc2l 7, cr0, [lr, #504] @ 0x1f8 │ │ - ldc2l 4, cr7, [fp, #244] @ 0xf4 │ │ - ldc2l 6, cr0, [lr, #664] @ 0x298 │ │ - ldc2l 3, cr7, [fp, #420] @ 0x1a4 │ │ - ldc2l 5, cr0, [lr, #824] @ 0x338 │ │ - ldc2l 2, cr7, [fp, #580] @ 0x244 │ │ - ldc2l 4, cr0, [lr, #984] @ 0x3d8 │ │ - ldc2l 1, cr7, [fp, #740] @ 0x2e4 │ │ - ldc2l 4, cr0, [lr, #136] @ 0x88 │ │ - ldc2l 0, cr7, [fp, #916] @ 0x394 │ │ - ldc2l 3, cr0, [lr, #280] @ 0x118 │ │ - ldc2l 0, cr7, [fp, #36] @ 0x24 │ │ - ldc2l 2, cr13, [fp, #272] @ 0x110 │ │ - ldc2l 4, cr7, [fp, #660] @ 0x294 │ │ - ldc2l 9, cr0, [lr, #68] @ 0x44 @ │ │ - ldc2l 5, cr7, [fp, #900] @ 0x384 │ │ - ldc2l 1, cr0, [lr, #968] @ 0x3c8 │ │ - ldc2l 14, cr6, [fp, #724] @ 0x2d4 │ │ - ldc2l 1, cr0, [lr, #104] @ 0x68 │ │ - ldc2l 13, cr6, [fp, #884] @ 0x374 │ │ - ldc2l 14, cr8, [fp, #924] @ 0x39c │ │ + ldc2l 8, cr9, [fp, #336] @ 0x150 │ │ + ldc2l 0, cr11, [fp, #548] @ 0x224 │ │ + ldc2l 8, cr12, [fp, #248] @ 0xf8 │ │ + ldc2l 14, cr6, [ip, #692] @ 0x2b4 │ │ + ldc2l 7, cr0, [lr, #684] @ 0x2ac │ │ + ldc2l 4, cr7, [fp, #424] @ 0x1a8 │ │ + ldc2l 6, cr0, [lr, #844] @ 0x34c │ │ + ldc2l 3, cr7, [fp, #600] @ 0x258 │ │ + ldc2l 5, cr0, [lr, #1004] @ 0x3ec │ │ + ldc2l 2, cr7, [fp, #760] @ 0x2f8 │ │ + ldc2l 5, cr0, [lr, #140] @ 0x8c │ │ + ldc2l 1, cr7, [fp, #920] @ 0x398 │ │ + ldc2l 4, cr0, [lr, #316] @ 0x13c │ │ + ldc2l 1, cr7, [fp, #72] @ 0x48 │ │ + ldc2l 3, cr0, [lr, #460] @ 0x1cc │ │ + ldc2l 0, cr7, [fp, #216] @ 0xd8 │ │ + ldc2l 2, cr13, [fp, #452] @ 0x1c4 │ │ + ldc2l 4, cr7, [fp, #840] @ 0x348 │ │ + ldc2l 9, cr0, [lr, #158] @ 0x9e @ │ │ + ldc2l 6, cr7, [fp, #56] @ 0x38 │ │ + ldc2l 2, cr0, [lr, #124] @ 0x7c │ │ + ldc2l 14, cr6, [fp, #904] @ 0x388 │ │ + ldc2l 1, cr0, [lr, #284] @ 0x11c │ │ + ldc2l 14, cr6, [fp, #40] @ 0x28 │ │ + ldc2l 15, cr8, [fp, #80] @ 0x50 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 02466938 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ vpush {d8-d13} │ │ sub sp, sp, #280 @ 0x118 │ │ @@ -1342692,37 +1342691,37 @@ │ │ mov r0, r7 │ │ mov r2, r4 │ │ add r1, pc, r1 │ │ bl 270e090 │ │ b 2466aec │ │ stmiahi r3!, {r0, r4, r5, r6, r7, fp, sp, lr}^ │ │ mcrcc 8, 7, pc, cr4, cr5, {5} @ │ │ - ldc2l 5, cr14, [ip, #784] @ 0x310 │ │ - ldc2l 4, cr0, [sp, #816] @ 0x330 │ │ - ldc2l 4, cr12, [fp, #628] @ 0x274 │ │ - ldc2l 12, cr10, [fp, #1008] @ 0x3f0 │ │ - ldc2l 13, cr0, [ip, #432] @ 0x1b0 │ │ - ldc2l 4, cr12, [fp, #820] @ 0x334 │ │ - ldc2l 0, cr1, [fp, #928] @ 0x3a0 │ │ - ldc2l 11, cr12, [fp, #808] @ 0x328 @ │ │ - ldc2l 4, cr12, [fp, #244] @ 0xf4 │ │ - ldc2l 11, cr2, [ip, #1008] @ 0x3f0 @ │ │ - ldc2l 11, cr6, [fp, #532] @ 0x214 @ │ │ - ldc2l 4, cr0, [sp, #520] @ 0x208 │ │ - ldc2l 9, cr10, [ip, #82] @ 0x52 @ │ │ + ldc2l 5, cr14, [ip, #964] @ 0x3c4 │ │ + ldc2l 4, cr0, [sp, #996] @ 0x3e4 │ │ + ldc2l 4, cr12, [fp, #808] @ 0x328 │ │ + ldc2l 13, cr10, [fp, #164] @ 0xa4 │ │ + ldc2l 13, cr0, [ip, #612] @ 0x264 │ │ + ldc2l 4, cr12, [fp, #1000] @ 0x3e8 │ │ + ldc2l 1, cr1, [fp, #84] @ 0x54 │ │ + ldc2l 11, cr12, [fp, #988] @ 0x3dc @ │ │ + ldc2l 4, cr12, [fp, #424] @ 0x1a8 │ │ + ldc2l 12, cr2, [ip, #164] @ 0xa4 │ │ + ldc2l 11, cr6, [fp, #712] @ 0x2c8 @ │ │ + ldc2l 4, cr0, [sp, #700] @ 0x2bc │ │ + ldc2l 9, cr10, [ip, #172] @ 0xac @ │ │ vcadd.f32 , q15, , #270 │ │ - ldc2l 6, cr6, [sp, #780] @ 0x30c │ │ - ldc2l 3, cr12, [fp, #564] @ 0x234 │ │ - ldc2l 5, cr10, [sp, #196] @ 0xc4 │ │ - ldc2l 10, cr2, [ip, #908] @ 0x38c @ │ │ - ldc2l 2, cr12, [fp, #932] @ 0x3a4 │ │ - ldc2l 4, cr10, [sp, #616] @ 0x268 │ │ + ldc2l 6, cr6, [sp, #960] @ 0x3c0 │ │ + ldc2l 3, cr12, [fp, #744] @ 0x2e8 │ │ + ldc2l 5, cr10, [sp, #376] @ 0x178 │ │ + ldc2l 11, cr2, [ip, #64] @ 0x40 @ │ │ + ldc2l 3, cr12, [fp, #88] @ 0x58 │ │ + ldc2l 4, cr10, [sp, #796] @ 0x31c │ │ ldrdeq r1, [pc], -r8 @ │ │ eoreq r1, pc, r8, lsl #31 │ │ - ldc2l 4, cr14, [ip, #224] @ 0xe0 │ │ + ldc2l 4, cr14, [ip, #404] @ 0x194 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 02466ec8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d10} │ │ @@ -1343752,25 +1343751,25 @@ │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #56 @ 0x38 │ │ vpop {d8-d10} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 13, cr11, [sp, #796] @ 0x31c │ │ + ldc2l 13, cr11, [sp, #976] @ 0x3d0 │ │ streq r6, [pc], #-1728 @ 2467efc │ │ streq r6, [pc], #-1188 @ 2467f00 │ │ streq r6, [pc], #-1688 @ 2467f04 │ │ streq r6, [pc], #-1072 @ 2467f08 │ │ eoreq r1, pc, r8, ror lr @ │ │ streq r6, [pc], #-1440 @ 2467f10 │ │ - vcadd.f32 d24, d11, d30, #270 │ │ + ldc2l 8, cr8, [fp, #364] @ 0x16c │ │ ldc2l 12, cr5, [lr, #688] @ 0x2b0 │ │ streq r6, [pc], #-1088 @ 2467f1c │ │ - ldc2l 2, cr2, [sp, #360] @ 0x168 │ │ + ldc2l 2, cr2, [sp, #540] @ 0x21c │ │ streq r6, [pc], #-1040 @ 2467f24 │ │ streq r6, [pc], #-952 @ 2467f28 │ │ streq r6, [pc], #-872 @ 2467f2c │ │ streq r6, [pc], #-792 @ 2467f30 │ │ streq r6, [pc], #-712 @ 2467f34 │ │ ldr r0, [pc, #2852] @ 2468a5c │ │ ldr r1, [pc, #2852] @ 2468a60 │ │ @@ -1343900,21 +1343899,21 @@ │ │ vmov.f64 d16, d18 │ │ vstr d17, [sp, #32] │ │ vstr d18, [sp, #24] │ │ vmovls.f64 d16, d17 │ │ b 24681a0 │ │ streq r6, [pc], #-632 @ 2468140 │ │ streq r6, [pc], #-556 @ 2468144 │ │ - ldc2l 5, cr10, [fp, #520] @ 0x208 │ │ + ldc2l 5, cr10, [fp, #700] @ 0x2bc │ │ streq r6, [pc], #-732 @ 246814c │ │ streq r6, [pc], #-464 @ 2468150 │ │ streq r6, [pc], #-368 @ 2468154 │ │ streq r6, [pc], #-936 @ 2468158 │ │ - ldc2l 8, cr0, [fp, #716] @ 0x2cc │ │ - ldc2l 4, cr2, [ip, #192] @ 0xc0 │ │ + vcadd.f32 q8, , q8, #270 │ │ + ldc2l 4, cr2, [ip, #372] @ 0x174 │ │ bl 270d6b0 │ │ bl 2702bc0 │ │ vldr d16, [r4] │ │ vmov d17, r0, r1 │ │ vmov r2, r3, d16 │ │ vldr d16, [pc, #968] @ 2468540 │ │ vadd.f64 d8, d17, d16 │ │ @@ -1343973,16 +1343972,16 @@ │ │ blt 2468320 │ │ ldr r4, [pc, #2148] @ 2468ab8 │ │ ldr r5, [pc, #2148] @ 2468abc │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ b 24682ac │ │ streq r6, [pc], #-344 @ 2468268 │ │ - ldc2l 15, cr1, [sp, #424] @ 0x1a8 │ │ - ldc2l 5, cr8, [fp, #56] @ 0x38 │ │ + ldc2l 15, cr1, [sp, #604] @ 0x25c │ │ + ldc2l 5, cr8, [fp, #236] @ 0xec │ │ streq r6, [pc], #-296 @ 2468274 │ │ streq r6, [pc], #-504 @ 2468278 │ │ streq r6, [pc], #-268 @ 246827c │ │ mov r0, r4 │ │ mov r2, r5 │ │ movw r3, #953 @ 0x3b9 │ │ bl 270d9c0 │ │ @@ -1343996,16 +1343995,16 @@ │ │ str r1, [r0] │ │ ble 2468318 │ │ sub r2, r1, #2 │ │ cmp r1, #5 │ │ bcs 24682cc │ │ mov r3, r1 │ │ b 24682ec │ │ - ldc2l 15, cr1, [sp, #152] @ 0x98 │ │ - ldc2l 4, cr8, [fp, #808] @ 0x328 │ │ + ldc2l 15, cr1, [sp, #332] @ 0x14c │ │ + ldc2l 4, cr8, [fp, #988] @ 0x3dc │ │ streq r6, [pc], #-216 @ 24682d0 │ │ mov r1, r2 │ │ mov r0, r4 │ │ mov r2, r5 │ │ movw r3, #953 @ 0x3b9 │ │ bl 270d9c0 │ │ ldr r3, [pc, #2008] @ 2468ac0 │ │ @@ -1344043,16 +1344042,16 @@ │ │ lsl r0, r0, #1 │ │ sub r3, r0, #5 │ │ vstr d8, [r2] │ │ vldr d8, [r5, #8] │ │ b 246842c │ │ streq r6, [pc], #-20 @ 246837c │ │ streq r6, [pc], #-632 @ 2468380 │ │ - ldc2l 3, cr2, [ip, #312] @ 0x138 │ │ - ldc2l 3, cr8, [fp, #920] @ 0x398 │ │ + ldc2l 3, cr2, [ip, #492] @ 0x1ec │ │ + ldc2l 4, cr8, [fp, #76] @ 0x4c │ │ streq r5, [pc], #-4052 @ 246838c │ │ streq r6, [pc], #-572 @ 2468390 │ │ streq r5, [pc], #-4072 @ 2468394 │ │ streq r6, [pc], #-216 @ 2468398 │ │ streq r5, [pc], #-4072 @ 246839c │ │ streq r6, [pc], #-404 @ 24683a0 │ │ streq r6, [pc], #-60 @ 24683a4 │ │ @@ -1344452,45 +1344451,45 @@ │ │ streq r5, [pc], #-2644 @ 24689cc │ │ streq r5, [pc], #-2500 @ 24689d0 │ │ streq r5, [pc], #-2544 @ 24689d4 │ │ streq r5, [pc], #-2504 @ 24689d8 │ │ streq r5, [pc], #-2876 @ 24689dc │ │ streq r5, [pc], #-2860 @ 24689e0 │ │ eoreq r1, pc, r8, lsr r3 @ │ │ - ldc2l 13, cr3, [fp, #80] @ 0x50 │ │ - ldc2l 12, cr7, [fp, #808] @ 0x328 │ │ + ldc2l 13, cr3, [fp, #260] @ 0x104 │ │ + ldc2l 12, cr7, [fp, #988] @ 0x3dc │ │ streq r5, [pc], #-2544 @ 24689f0 │ │ streq r5, [pc], #-2304 @ 24689f4 │ │ streq r5, [pc], #-2252 @ 24689f8 │ │ ldc2l 1, cr5, [lr, #60] @ 0x3c │ │ - ldc2l 12, cr7, [fp, #520] @ 0x208 │ │ + ldc2l 12, cr7, [fp, #700] @ 0x2bc │ │ streq r5, [pc], #-2688 @ 2468a04 │ │ streq r5, [pc], #-2344 @ 2468a08 │ │ streq r5, [pc], #-2180 @ 2468a0c │ │ - ldc2l 6, cr1, [sp, #628] @ 0x274 │ │ - ldc2l 12, cr7, [fp, #232] @ 0xe8 │ │ + ldc2l 6, cr1, [sp, #808] @ 0x328 │ │ + ldc2l 12, cr7, [fp, #412] @ 0x19c │ │ streq r5, [pc], #-2688 @ 2468a18 │ │ streq r5, [pc], #-2440 @ 2468a1c │ │ streq r5, [pc], #-2108 @ 2468a20 │ │ - ldc2l 14, cr14, [sp, #264] @ 0x108 │ │ - ldc2l 11, cr7, [fp, #968] @ 0x3c8 @ │ │ + ldc2l 14, cr14, [sp, #444] @ 0x1bc │ │ + ldc2l 12, cr7, [fp, #124] @ 0x7c │ │ streq r5, [pc], #-2232 @ 2468a2c │ │ streq r5, [pc], #-2032 @ 2468a30 │ │ streq r5, [pc], #-2036 @ 2468a34 │ │ - ldc2l 14, cr1, [fp, #172] @ 0xac │ │ - ldc2l 11, cr7, [fp, #664] @ 0x298 @ │ │ + ldc2l 14, cr1, [fp, #352] @ 0x160 │ │ + ldc2l 11, cr7, [fp, #844] @ 0x34c @ │ │ streq r5, [pc], #-2868 @ 2468a40 │ │ - ldc2l 10, cr5, [ip, #1004] @ 0x3ec @ │ │ + ldc2l 11, cr5, [ip, #160] @ 0xa0 @ │ │ streq r5, [pc], #-2232 @ 2468a48 │ │ streq r5, [pc], #-1820 @ 2468a4c │ │ streq r5, [pc], #-2184 @ 2468a50 │ │ streq r5, [pc], #-1868 @ 2468a54 │ │ streq r5, [pc], #-1560 @ 2468a58 │ │ streq r5, [pc], #-1720 @ 2468a5c │ │ - ldc2l 13, cr15, [sl, #428] @ 0x1ac │ │ + ldc2l 13, cr15, [sl, #608] @ 0x260 │ │ streq r5, [pc], #-1676 @ 2468a64 │ │ streq r5, [pc], #-1080 @ 2468a68 │ │ streq r5, [pc], #-1452 @ 2468a6c │ │ streq r5, [pc], #-1120 @ 2468a70 │ │ streq r5, [pc], #-1632 @ 2468a74 │ │ streq r5, [pc], #-968 @ 2468a78 │ │ streq r5, [pc], #-1120 @ 2468a7c │ │ @@ -1344500,120 +1344499,120 @@ │ │ streq r5, [pc], #-924 @ 2468a8c │ │ streq r5, [pc], #-1044 @ 2468a90 │ │ streq r5, [pc], #-580 @ 2468a94 │ │ eoreq r0, pc, r8, lsr ip @ │ │ eoreq r0, pc, r4, lsr ip @ │ │ streq r5, [pc], #-428 @ 2468aa0 │ │ streq r5, [pc], #-392 @ 2468aa4 │ │ - ldc2l 15, cr0, [sp, #968] @ 0x3c8 │ │ - ldc2l 5, cr7, [fp, #600] @ 0x258 │ │ + ldc2l 0, cr1, [sp, #124] @ 0x7c │ │ + ldc2l 5, cr7, [fp, #780] @ 0x30c │ │ streq r5, [pc], #-340 @ 2468ab0 │ │ strhteq r0, [pc], -r4 │ │ streq r5, [pc], #-640 @ 2468ab8 │ │ streq r5, [pc], #-392 @ 2468abc │ │ - ldc2l 15, cr0, [sp, #664] @ 0x298 │ │ - ldc2l 5, cr7, [fp, #296] @ 0x128 │ │ + ldc2l 15, cr0, [sp, #844] @ 0x34c │ │ + ldc2l 5, cr7, [fp, #476] @ 0x1dc │ │ streq r5, [pc], #-224 @ 2468ac8 │ │ streq r5, [pc], #-316 @ 2468acc │ │ streq r5, [pc], #-296 @ 2468ad0 │ │ streq r5, [pc], #-404 @ 2468ad4 │ │ streq r5, [pc], #-160 @ 2468ad8 │ │ streq r5, [pc], #-444 @ 2468adc │ │ ldc2l 8, cr4, [lr, #224] @ 0xe0 │ │ - ldc2l 3, cr7, [fp, #712] @ 0x2c8 │ │ + ldc2l 3, cr7, [fp, #892] @ 0x37c │ │ streq r4, [pc], #-4036 @ 2468ae8 │ │ ldc2l 6, cr4, [lr, #816] @ 0x330 │ │ - ldc2l 2, cr7, [fp, #280] @ 0x118 │ │ + ldc2l 2, cr7, [fp, #460] @ 0x1cc │ │ streq r4, [pc], #-3672 @ 2468af4 │ │ ldc2l 6, cr4, [lr, #384] @ 0x180 │ │ - ldc2l 1, cr7, [fp, #872] @ 0x368 │ │ + ldc2l 2, cr7, [fp, #28] │ │ streq r4, [pc], #-3564 @ 2468b00 │ │ ldc2l 5, cr4, [lr, #1008] @ 0x3f0 │ │ - ldc2l 1, cr7, [fp, #472] @ 0x1d8 │ │ + ldc2l 1, cr7, [fp, #652] @ 0x28c │ │ streq r4, [pc], #-3464 @ 2468b0c │ │ ldc2l 5, cr4, [lr, #480] @ 0x1e0 │ │ - ldc2l 0, cr7, [fp, #968] @ 0x3c8 │ │ + ldc2l 1, cr7, [fp, #124] @ 0x7c │ │ streq r4, [pc], #-3332 @ 2468b18 │ │ ldc2l 5, cr4, [lr, #176] @ 0xb0 │ │ - ldc2l 0, cr7, [fp, #664] @ 0x298 │ │ + ldc2l 0, cr7, [fp, #844] @ 0x34c │ │ streq r4, [pc], #-3260 @ 2468b24 │ │ streq r4, [pc], #-3892 @ 2468b28 │ │ streq r4, [pc], #-4044 @ 2468b2c │ │ streq r5, [pc], #-372 @ 2468b30 │ │ streq r4, [pc], #-3920 @ 2468b34 │ │ streq r5, [pc], #-20 @ 2468b38 │ │ - ldc2l 0, cr9, [fp, #56] @ 0x38 │ │ - ldc2l 0, cr7, [fp, #408] @ 0x198 │ │ + ldc2l 0, cr9, [fp, #236] @ 0xec │ │ + ldc2l 0, cr7, [fp, #588] @ 0x24c │ │ streq r4, [pc], #-3436 @ 2468b44 │ │ streq r4, [pc], #-3772 @ 2468b48 │ │ streq r4, [pc], #-3176 @ 2468b4c │ │ streq r4, [pc], #-3128 @ 2468b50 │ │ streq r4, [pc], #-3284 @ 2468b54 │ │ streq r4, [pc], #-3168 @ 2468b58 │ │ streq r4, [pc], #-3812 @ 2468b5c │ │ - ldc2l 15, cr0, [ip, #296] @ 0x128 │ │ - ldc2l 15, cr6, [fp, #904] @ 0x388 │ │ + ldc2l 15, cr0, [ip, #476] @ 0x1dc │ │ + ldc2l 0, cr7, [fp, #60] @ 0x3c │ │ streq r4, [pc], #-3024 @ 2468b68 │ │ streq r4, [pc], #-3096 @ 2468b6c │ │ streq r4, [pc], #-3044 @ 2468b70 │ │ streq r4, [pc], #-3000 @ 2468b74 │ │ streq r4, [pc], #-3156 @ 2468b78 │ │ streq r5, [pc], #-8 @ 2468b7c │ │ - ldc2l 15, cr2, [fp, #704] @ 0x2c0 │ │ - ldc2l 15, cr6, [fp, #408] @ 0x198 │ │ + ldc2l 15, cr2, [fp, #884] @ 0x374 │ │ + ldc2l 15, cr6, [fp, #588] @ 0x24c │ │ streq r4, [pc], #-3212 @ 2468b88 │ │ streq r4, [pc], #-3084 @ 2468b8c │ │ streq r4, [pc], #-2920 @ 2468b90 │ │ streq r4, [pc], #-2880 @ 2468b94 │ │ streq r5, [pc], #-204 @ 2468b98 │ │ ldc2l 3, cr4, [lr, #556] @ 0x22c │ │ - ldc2l 14, cr6, [fp, #1016] @ 0x3f8 │ │ + ldc2l 15, cr6, [fp, #172] @ 0xac │ │ streq r4, [pc], #-3324 @ 2468ba4 │ │ streq r4, [pc], #-2824 @ 2468ba8 │ │ streq r4, [pc], #-2784 @ 2468bac │ │ streq r5, [pc], #-256 @ 2468bb0 │ │ - ldc2l 8, cr0, [sp, #1012] @ 0x3f4 │ │ - ldc2l 14, cr6, [fp, #616] @ 0x268 │ │ + ldc2l 9, cr0, [sp, #84] @ 0x54 @ │ │ + ldc2l 14, cr6, [fp, #796] @ 0x31c │ │ streq r4, [pc], #-3296 @ 2468bbc │ │ streq r4, [pc], #-2724 @ 2468bc0 │ │ streq r4, [pc], #-2684 @ 2468bc4 │ │ streq r4, [pc], #-3948 @ 2468bc8 │ │ - ldc2l 0, cr14, [sp, #584] @ 0x248 │ │ - ldc2l 14, cr6, [fp, #264] @ 0x108 │ │ + ldc2l 0, cr14, [sp, #764] @ 0x2fc │ │ + ldc2l 14, cr6, [fp, #444] @ 0x1bc │ │ streq r4, [pc], #-2824 @ 2468bd4 │ │ streq r4, [pc], #-2632 @ 2468bd8 │ │ streq r4, [pc], #-2628 @ 2468bdc │ │ - ldc2l 0, cr1, [fp, #492] @ 0x1ec │ │ - ldc2l 13, cr6, [fp, #984] @ 0x3d8 │ │ + ldc2l 0, cr1, [fp, #672] @ 0x2a0 │ │ + ldc2l 14, cr6, [fp, #140] @ 0x8c │ │ streq r4, [pc], #-3952 @ 2468be8 │ │ streq r5, [pc], #-2036 @ 2468bec │ │ streq r5, [pc], #-2044 @ 2468bf0 │ │ streq r5, [pc], #-2012 @ 2468bf4 │ │ streq r5, [pc], #-2016 @ 2468bf8 │ │ streq r5, [pc], #-2052 @ 2468bfc │ │ streq r5, [pc], #-2464 @ 2468c00 │ │ streq r5, [pc], #-2176 @ 2468c04 │ │ streq r5, [pc], #-1884 @ 2468c08 │ │ streq r5, [pc], #-1936 @ 2468c0c │ │ - ldc2l 14, cr0, [lr, #568] @ 0x238 │ │ - ldc2l 1, cr11, [fp, #884] @ 0x374 │ │ - ldc2l 15, cr10, [sp, #776] @ 0x308 │ │ + ldc2l 14, cr0, [lr, #748] @ 0x2ec │ │ + ldc2l 2, cr11, [fp, #40] @ 0x28 │ │ + ldc2l 15, cr10, [sp, #956] @ 0x3bc │ │ streq r5, [pc], #-1692 @ 2468c1c │ │ streq r5, [pc], #-2104 @ 2468c20 │ │ streq r5, [pc], #-1572 @ 2468c24 │ │ streq r5, [pc], #-1800 @ 2468c28 │ │ streq r5, [pc], #-1456 @ 2468c2c │ │ streq r5, [pc], #-1600 @ 2468c30 │ │ streq r5, [pc], #-1532 @ 2468c34 │ │ streq r5, [pc], #-1540 @ 2468c38 │ │ streq r5, [pc], #-1412 @ 2468c3c │ │ streq r5, [pc], #-1420 @ 2468c40 │ │ streq r5, [pc], #-1888 @ 2468c44 │ │ streq r5, [pc], #-1856 @ 2468c48 │ │ - ldc2l 13, cr10, [sp, #1004] @ 0x3ec │ │ + ldc2l 14, cr10, [sp, #160] @ 0xa0 │ │ │ │ 02468c48 : │ │ ldr r2, [r2] │ │ ldr r1, [r1] │ │ ldr r0, [r0] │ │ cmp r1, r2 │ │ mov r3, r2 │ │ @@ -1344994,33 +1344993,33 @@ │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 2, cr12, [ip, #316] @ 0x13c │ │ - ldc2l 5, cr10, [fp, #560] @ 0x230 │ │ - ldc2l 2, cr8, [sp, #664] @ 0x298 │ │ - ldc2l 2, cr8, [sp, #328] @ 0x148 │ │ - ldc2l 10, cr13, [sp, #584] @ 0x248 @ │ │ - ldc2l 10, cr13, [sp, #392] @ 0x188 @ │ │ - ldc2l 1, cr8, [sp, #456] @ 0x1c8 │ │ - ldc2l 9, cr13, [sp, #356] @ 0x164 @ │ │ - ldc2l 9, cr13, [sp, #260] @ 0x104 @ │ │ - ldc2l 0, cr8, [sp, #568] @ 0x238 │ │ - vcadd.f32 , , q7, #270 │ │ - ldc2l 8, cr13, [sp, #632] @ 0x278 │ │ - ldc2l 15, cr7, [sp, #712] @ 0x2c8 │ │ - ldc2l 7, cr13, [sp, #504] @ 0x1f8 │ │ - ldc2l 7, cr13, [sp, #312] @ 0x138 │ │ - ldc2l 13, cr11, [ip, #60] @ 0x3c │ │ - ldc2l 10, cr9, [sp, #1000] @ 0x3e8 @ │ │ - ldc2l 12, cr9, [fp, #756] @ 0x2f4 │ │ - ldc2l 3, cr4, [ip, #176] @ 0xb0 │ │ + ldc2l 2, cr12, [ip, #496] @ 0x1f0 │ │ + ldc2l 5, cr10, [fp, #740] @ 0x2e4 │ │ + ldc2l 2, cr8, [sp, #844] @ 0x34c │ │ + ldc2l 2, cr8, [sp, #508] @ 0x1fc │ │ + ldc2l 10, cr13, [sp, #764] @ 0x2fc @ │ │ + ldc2l 10, cr13, [sp, #572] @ 0x23c @ │ │ + ldc2l 1, cr8, [sp, #636] @ 0x27c │ │ + ldc2l 9, cr13, [sp, #446] @ 0x1be @ │ │ + ldc2l 9, cr13, [sp, #350] @ 0x15e @ │ │ + ldc2l 0, cr8, [sp, #748] @ 0x2ec │ │ + ldc2l 8, cr13, [sp, #1004] @ 0x3ec │ │ + vcadd.f32 , , , #270 │ │ + ldc2l 15, cr7, [sp, #892] @ 0x37c │ │ + ldc2l 7, cr13, [sp, #684] @ 0x2ac │ │ + ldc2l 7, cr13, [sp, #492] @ 0x1ec │ │ + ldc2l 13, cr11, [ip, #240] @ 0xf0 │ │ + ldc2l 11, cr9, [sp, #156] @ 0x9c @ │ │ + ldc2l 12, cr9, [fp, #936] @ 0x3a8 │ │ + ldc2l 3, cr4, [ip, #356] @ 0x164 │ │ │ │ 0246928c : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #16 │ │ mov r5, r2 │ │ mov r6, r1 │ │ @@ -1345131,22 +1345130,22 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 4, cr6, [fp, #792] @ 0x318 │ │ + ldc2l 4, cr6, [fp, #972] @ 0x3cc │ │ ldc2l 1, cr7, [lr, #204] @ 0xcc │ │ - ldc2l 11, cr9, [fp, #724] @ 0x2d4 @ │ │ - ldc2l 0, cr2, [ip, #596] @ 0x254 │ │ - ldc2l 3, cr6, [fp, #664] @ 0x298 │ │ - ldc2l 6, cr0, [fp, #72] @ 0x48 │ │ - ldc2l 10, cr9, [fp, #596] @ 0x254 @ │ │ - ldc2l 13, cr9, [sl, #868] @ 0x364 │ │ + ldc2l 11, cr9, [fp, #904] @ 0x388 @ │ │ + ldc2l 0, cr2, [ip, #776] @ 0x308 │ │ + ldc2l 3, cr6, [fp, #844] @ 0x34c │ │ + ldc2l 6, cr0, [fp, #252] @ 0xfc │ │ + ldc2l 10, cr9, [fp, #776] @ 0x308 @ │ │ + ldc2l 14, cr9, [sl, #24] │ │ │ │ 0246947c : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #584 @ 0x248 │ │ sub sp, sp, #1024 @ 0x400 │ │ mov r4, r2 │ │ @@ -1345318,22 +1345317,22 @@ │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ nop {0} │ │ stclgt 12, cr12, [ip], {205} @ 0xcd │ │ svccc 0x00eccccc │ │ - ldc2l 1, cr2, [fp, #780] @ 0x30c │ │ - ldc2l 3, cr13, [sp, #180] @ 0xb4 │ │ - ldc2l 7, cr9, [fp, #932] @ 0x3a4 │ │ - ldc2l 1, cr2, [fp, #56] @ 0x38 │ │ - ldc2l 0, cr10, [fp, #196] @ 0xc4 │ │ - vcadd.f32 d25, d11, d17, #270 │ │ - ldc2l 4, cr14, [sl, #224] @ 0xe0 │ │ - ldc2l 0, cr2, [fp, #860] @ 0x35c │ │ + ldc2l 1, cr2, [fp, #960] @ 0x3c0 │ │ + ldc2l 3, cr13, [sp, #360] @ 0x168 │ │ + ldc2l 8, cr9, [fp, #88] @ 0x58 │ │ + ldc2l 1, cr2, [fp, #236] @ 0xec │ │ + ldc2l 0, cr10, [fp, #376] @ 0x178 │ │ + vcadd.f32 , , q7, #270 │ │ + ldc2l 4, cr14, [sl, #404] @ 0x194 │ │ + ldc2l 1, cr2, [fp, #16] │ │ │ │ 02469758 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ vpush {d8-d15} │ │ sub sp, sp, #384 @ 0x180 │ │ mov r4, r3 │ │ @@ -1345614,26 +1345613,26 @@ │ │ mov r0, #0 │ │ sub sp, fp, #88 @ 0x58 │ │ vpop {d8-d15} │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ nop {0} │ │ stclgt 12, cr12, [ip], {205} @ 0xcd │ │ svccc 0x00eccccc │ │ - ldc2l 2, cr0, [fp, #808] @ 0x328 │ │ + ldc2l 2, cr0, [fp, #988] @ 0x3dc │ │ streq r3, [pc], #-3712 @ 2469bdc │ │ streq r3, [pc], #-3688 @ 2469be0 │ │ - ldc2l 14, cr9, [fp, #944] @ 0x3b0 │ │ - ldc2l 6, cr9, [fp, #292] @ 0x124 │ │ - ldc2l 15, cr1, [fp, #440] @ 0x1b8 │ │ - ldc2l 12, cr11, [sl, #272] @ 0x110 │ │ - ldc2l 6, cr9, [fp, #660] @ 0x294 │ │ - ldc2l 7, cr13, [ip, #140] @ 0x8c │ │ + ldc2l 15, cr9, [fp, #100] @ 0x64 │ │ + ldc2l 6, cr9, [fp, #472] @ 0x1d8 │ │ + ldc2l 15, cr1, [fp, #620] @ 0x26c │ │ + ldc2l 12, cr11, [sl, #452] @ 0x1c4 │ │ + ldc2l 6, cr9, [fp, #840] @ 0x348 │ │ + ldc2l 7, cr13, [ip, #320] @ 0x140 │ │ streq r3, [pc], #-3192 @ 2469bfc │ │ mlaeq lr, r8, r2, pc @ │ │ - ldc2l 14, cr15, [sl, #680] @ 0x2a8 │ │ + ldc2l 14, cr15, [sl, #860] @ 0x35c │ │ │ │ 02469c00 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ vpush {d8-d10} │ │ sub sp, sp, #40 @ 0x28 │ │ vldr d9, [r2] │ │ @@ -1345698,18 +1345697,18 @@ │ │ vmov r0, r1, d16 │ │ sub sp, fp, #40 @ 0x28 │ │ vpop {d8-d10} │ │ pop {r4, r5, r6, r7, fp, pc} │ │ nop {0} │ │ frdnez f5, f0, #4.0 │ │ svccc 0x00e9eb85 │ │ - ldc2l 2, cr11, [ip, #712] @ 0x2c8 │ │ + ldc2l 2, cr11, [ip, #892] @ 0x37c │ │ ldc2l 9, cr4, [lr, #298] @ 0x12a @ │ │ - ldc2l 2, cr9, [fp, #68] @ 0x44 │ │ - ldc2l 10, cr7, [fp, #420] @ 0x1a4 @ │ │ + ldc2l 2, cr9, [fp, #248] @ 0xf8 │ │ + ldc2l 10, cr7, [fp, #600] @ 0x258 @ │ │ │ │ 02469d28 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ vpush {d8-d15} │ │ sub sp, sp, #120 @ 0x78 │ │ vldr d10, [r0, #8] │ │ @@ -1345879,18 +1345878,18 @@ │ │ vmla.f64 d9, d10, d16 │ │ vdiv.f64 d16, d18, d9 │ │ vsub.f64 d12, d12, d16 │ │ vmov r0, r1, d12 │ │ sub sp, fp, #88 @ 0x58 │ │ vpop {d8-d15} │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - vcadd.f32 , , q14, #270 │ │ - ldc2l 14, cr14, [sp, #340] @ 0x154 │ │ - ldc2l 1, cr9, [fp, #84] @ 0x54 │ │ - ldc2l 8, cr1, [ip, #480] @ 0x1e0 │ │ + ldc2l 9, cr3, [fp, #50] @ 0x32 @ │ │ + ldc2l 14, cr14, [sp, #520] @ 0x208 │ │ + ldc2l 1, cr9, [fp, #264] @ 0x108 │ │ + vcadd.f32 d17, d28, d21, #270 │ │ │ │ 02469ff4 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #16 │ │ mov r8, r2 │ │ mov r5, r1 │ │ @@ -1345981,22 +1345980,22 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 6, cr15, [fp, #768] @ 0x300 │ │ + ldc2l 6, cr15, [fp, #948] @ 0x3b4 │ │ ldc2l 3, cr6, [lr, #812] @ 0x32c │ │ - ldc2l 14, cr8, [fp, #308] @ 0x134 │ │ - ldc2l 3, cr1, [ip, #180] @ 0xb4 │ │ - ldc2l 5, cr15, [fp, #960] @ 0x3c0 │ │ - ldc2l 8, cr15, [sl, #1000] @ 0x3e8 │ │ - ldc2l 13, cr8, [fp, #500] @ 0x1f4 │ │ - ldc2l 0, cr9, [sl, #772] @ 0x304 │ │ + ldc2l 14, cr8, [fp, #488] @ 0x1e8 │ │ + ldc2l 3, cr1, [ip, #360] @ 0x168 │ │ + ldc2l 6, cr15, [fp, #116] @ 0x74 │ │ + ldc2l 9, cr15, [sl, #78] @ 0x4e @ │ │ + ldc2l 13, cr8, [fp, #680] @ 0x2a8 │ │ + ldc2l 0, cr9, [sl, #952] @ 0x3b8 │ │ │ │ 0246a194 : │ │ push {fp, lr} │ │ mov fp, sp │ │ vldmia r2, {d16-d17} │ │ vldr d18, [r3] │ │ ldr r3, [r1] │ │ @@ -1346232,15 +1346231,15 @@ │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ nop {0} │ │ andeq r0, r0, r0 │ │ submi r0, lr, r0 │ │ - ldc2l 10, cr8, [sp, #600] @ 0x258 @ │ │ + ldc2l 10, cr8, [sp, #780] @ 0x30c @ │ │ streq r3, [pc], #-912 @ 246a55c │ │ streq r3, [pc], #-896 @ 246a560 │ │ streq r3, [pc], #-1004 @ 246a564 │ │ streq r3, [pc], #-1004 @ 246a568 │ │ eoreq lr, lr, r0, lsr #22 │ │ streq r3, [pc], #-828 @ 246a570 │ │ strhteq lr, [lr], -ip │ │ @@ -1346252,15 +1346251,15 @@ │ │ streq r3, [pc], #-592 @ 246a58c │ │ streq r3, [pc], #-500 @ 246a590 │ │ streq r3, [pc], #-608 @ 246a594 │ │ streq r3, [pc], #-552 @ 246a598 │ │ streq r3, [pc], #-836 @ 246a59c │ │ eoreq lr, lr, r4, lsl r9 │ │ streq r3, [pc], #-468 @ 246a5a4 │ │ - ldc2l 7, cr8, [sp, #1000] @ 0x3e8 │ │ + vcadd.f32 d24, d13, d23, #270 │ │ │ │ 0246a5a4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ sub sp, sp, #1120 @ 0x460 │ │ @@ -1346459,22 +1346458,22 @@ │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 1, cr15, [fp, #188] @ 0xbc │ │ - ldc2l 2, cr12, [sp, #920] @ 0x398 │ │ - ldc2l 11, cr8, [sl, #968] @ 0x3c8 @ │ │ - ldc2l 2, cr12, [sp, #24] │ │ - ldc2l 11, cr8, [sl, #88] @ 0x58 @ │ │ - ldc2l 1, cr12, [sp, #136] @ 0x88 │ │ - ldc2l 10, cr8, [sl, #200] @ 0xc8 @ │ │ - ldc2l 14, cr14, [fp, #364] @ 0x16c │ │ + ldc2l 1, cr15, [fp, #368] @ 0x170 │ │ + ldc2l 3, cr12, [sp, #76] @ 0x4c │ │ + ldc2l 12, cr8, [sl, #124] @ 0x7c │ │ + ldc2l 2, cr12, [sp, #204] @ 0xcc │ │ + ldc2l 11, cr8, [sl, #268] @ 0x10c @ │ │ + ldc2l 1, cr12, [sp, #316] @ 0x13c │ │ + ldc2l 10, cr8, [sl, #380] @ 0x17c @ │ │ + ldc2l 14, cr14, [fp, #544] @ 0x220 │ │ │ │ 0246a8f4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d15} │ │ sub sp, sp, #40 @ 0x28 │ │ @@ -1347144,64 +1347143,64 @@ │ │ vdiv.f64 d16, d17, d16 │ │ vstr d16, [r4] │ │ mov r0, #0 │ │ sub sp, fp, #96 @ 0x60 │ │ vpop {d8-d15} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 11, cr10, [sl, #828] @ 0x33c @ │ │ - ldc2l 5, cr6, [sp, #104] @ 0x68 │ │ - ldc2l 5, cr8, [fp, #68] @ 0x44 │ │ - ldc2l 10, cr10, [fp, #332] @ 0x14c @ │ │ - ldc2l 12, cr10, [sl, #44] @ 0x2c │ │ - vcadd.f32 q10, , , #270 │ │ - ldc2l 10, cr6, [ip, #964] @ 0x3c4 @ │ │ - ldc2l 3, cr8, [sp, #20] │ │ + ldc2l 11, cr10, [sl, #1008] @ 0x3f0 @ │ │ + ldc2l 5, cr6, [sp, #284] @ 0x11c │ │ + ldc2l 5, cr8, [fp, #248] @ 0xf8 │ │ + ldc2l 10, cr10, [fp, #512] @ 0x200 @ │ │ + ldc2l 12, cr10, [sl, #224] @ 0xe0 │ │ + ldc2l 9, cr4, [sp, #36] @ 0x24 @ │ │ + ldc2l 11, cr6, [ip, #120] @ 0x78 @ │ │ + ldc2l 3, cr8, [sp, #200] @ 0xc8 │ │ ldc2l 8, cr5, [lr, #748] @ 0x2ec │ │ - ldc2l 12, cr12, [fp, #752] @ 0x2f0 │ │ - ldc2l 2, cr8, [sp, #388] @ 0x184 │ │ + ldc2l 12, cr12, [fp, #932] @ 0x3a4 │ │ + ldc2l 2, cr8, [sp, #568] @ 0x238 │ │ ldc2l 8, cr5, [lr, #92] @ 0x5c │ │ - ldc2l 12, cr12, [fp, #80] @ 0x50 │ │ - ldc2l 1, cr8, [sp, #260] @ 0x104 │ │ + ldc2l 12, cr12, [fp, #260] @ 0x104 │ │ + ldc2l 1, cr8, [sp, #440] @ 0x1b8 │ │ ldc2l 6, cr5, [lr, #908] @ 0x38c │ │ ldc2l 6, cr5, [lr, #684] @ 0x2ac │ │ ldc2l 6, cr5, [lr, #348] @ 0x15c │ │ ldc2l 6, cr5, [lr, #60] @ 0x3c │ │ ldc2l 5, cr5, [lr, #844] @ 0x34c │ │ ldc2l 5, cr5, [lr, #604] @ 0x25c │ │ ldc2l 5, cr5, [lr, #348] @ 0x15c │ │ - ldc2l 15, cr7, [sp, #612] @ 0x264 │ │ - ldc2l 15, cr7, [sp, #436] @ 0x1b4 │ │ + ldc2l 15, cr7, [sp, #792] @ 0x318 │ │ + ldc2l 15, cr7, [sp, #616] @ 0x268 │ │ ldc2l 4, cr5, [lr, #972] @ 0x3cc │ │ ldc2l 4, cr5, [lr, #764] @ 0x2fc │ │ ldc2l 4, cr5, [lr, #444] @ 0x1bc │ │ - ldc2l 14, cr7, [sp, #708] @ 0x2c4 │ │ + ldc2l 14, cr7, [sp, #888] @ 0x378 │ │ ldc2l 4, cr5, [lr, #156] @ 0x9c │ │ - ldc2l 14, cr7, [sp, #420] @ 0x1a4 │ │ + ldc2l 14, cr7, [sp, #600] @ 0x258 │ │ ldc2l 3, cr5, [lr, #844] @ 0x34c │ │ - ldc2l 14, cr7, [sp, #84] @ 0x54 │ │ + ldc2l 14, cr7, [sp, #264] @ 0x108 │ │ ldc2l 3, cr5, [lr, #524] @ 0x20c │ │ - ldc2l 13, cr7, [sp, #788] @ 0x314 │ │ + ldc2l 13, cr7, [sp, #968] @ 0x3c8 │ │ ldc2l 3, cr5, [lr, #124] @ 0x7c │ │ - ldc2l 13, cr7, [sp, #388] @ 0x184 │ │ + ldc2l 13, cr7, [sp, #568] @ 0x238 │ │ ldc2l 2, cr5, [lr, #860] @ 0x35c │ │ - ldc2l 13, cr7, [sp, #100] @ 0x64 │ │ - ldc2l 12, cr7, [sp, #820] @ 0x334 │ │ + ldc2l 13, cr7, [sp, #280] @ 0x118 │ │ + ldc2l 12, cr7, [sp, #1000] @ 0x3e8 │ │ ldc2l 1, cr5, [lr, #764] @ 0x2fc │ │ ldc2l 1, cr5, [lr, #556] @ 0x22c │ │ ldc2l 1, cr5, [lr, #332] @ 0x14c │ │ ldc2l 1, cr5, [lr, #124] @ 0x7c │ │ ldc2l 0, cr5, [lr, #972] @ 0x3cc │ │ ldc2l 0, cr5, [lr, #492] @ 0x1ec │ │ ldc2l 0, cr5, [lr, #316] @ 0x13c │ │ ldc2l 0, cr5, [lr, #124] @ 0x7c │ │ ldc2l 15, cr4, [lr, #940] @ 0x3ac │ │ - ldc2l 10, cr7, [sp, #180] @ 0xb4 @ │ │ + ldc2l 10, cr7, [sp, #360] @ 0x168 @ │ │ ldc2l 15, cr4, [lr, #636] @ 0x27c │ │ - ldc2l 9, cr7, [sp, #450] @ 0x1c2 @ │ │ + ldc2l 10, cr7, [sp, #56] @ 0x38 @ │ │ │ │ 0246b448 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ mov r4, r2 │ │ mov r6, r1 │ │ @@ -1347275,19 +1347274,19 @@ │ │ ldr r0, [pc, #36] @ 246b594 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 5, cr14, [sl, #932] @ 0x3a4 │ │ + ldc2l 6, cr14, [sl, #88] @ 0x58 │ │ ldc2l 15, cr4, [lr, #492] @ 0x1ec │ │ - ldc2l 9, cr7, [fp, #506] @ 0x1fa @ │ │ - ldc2l 14, cr15, [fp, #884] @ 0x374 │ │ - ldc2l 4, cr14, [sl, #948] @ 0x3b4 │ │ + ldc2l 10, cr7, [fp, #168] @ 0xa8 @ │ │ + ldc2l 15, cr15, [fp, #40] @ 0x28 │ │ + ldc2l 5, cr14, [sl, #104] @ 0x68 │ │ │ │ 0246b598 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r6, r3 │ │ mov r7, r2 │ │ mov r5, r1 │ │ @@ -1347426,22 +1347425,22 @@ │ │ vstr d16, [ip] │ │ vldr d16, [r0] │ │ vldr d17, [r4] │ │ vmul.f64 d16, d17, d16 │ │ vstr d16, [r0] │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 0, cr2, [fp, #252] @ 0xfc │ │ - ldc2l 11, cr1, [sp, #984] @ 0x3d8 @ │ │ - vcadd.f32 , , , #270 │ │ + ldc2l 0, cr2, [fp, #432] @ 0x1b0 │ │ + ldc2l 12, cr1, [sp, #140] @ 0x8c │ │ + vcadd.f32 d23, d27, d14, #270 │ │ ldc2l 14, cr4, [lr, #28] │ │ - ldc2l 15, cr1, [fp, #1004] @ 0x3ec │ │ - ldc2l 3, cr14, [sl, #616] @ 0x268 │ │ - ldc2l 8, cr7, [fp, #116] @ 0x74 │ │ - ldc2l 11, cr7, [sl, #404] @ 0x194 @ │ │ + ldc2l 0, cr2, [fp, #160] @ 0xa0 │ │ + ldc2l 3, cr14, [sl, #796] @ 0x31c │ │ + vcadd.f32 , , q5, #270 │ │ + ldc2l 11, cr7, [sl, #584] @ 0x248 @ │ │ │ │ 0246b7f8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d12} │ │ sub sp, sp, #16 │ │ @@ -1348265,151 +1348264,151 @@ │ │ bl 270d9c0 │ │ ldr r2, [pc, #536] @ 246c6f4 │ │ mov r1, r0 │ │ ldr r2, [pc, r2] │ │ sub r0, r2, #1 │ │ b 246c440 │ │ streq r2, [pc], #-1540 @ 246c4f0 │ │ - ldc2l 15, cr15, [sl, #772] @ 0x304 │ │ - ldc2l 15, cr9, [fp, #1004] @ 0x3ec │ │ - ldc2l 6, cr7, [fp, #340] @ 0x154 │ │ + ldc2l 15, cr15, [sl, #952] @ 0x3b8 │ │ + ldc2l 0, cr10, [fp, #160] @ 0xa0 │ │ + ldc2l 6, cr7, [fp, #520] @ 0x208 │ │ streq r2, [pc], #-1480 @ 246c500 │ │ eoreq sp, lr, r0, asr r6 │ │ - ldc2l 1, cr11, [sp, #884] @ 0x374 │ │ + ldc2l 2, cr11, [sp, #40] @ 0x28 │ │ eoreq sp, lr, ip, lsr #12 │ │ streq r2, [pc], #-1388 @ 246c510 │ │ streq r2, [pc], #-1392 @ 246c514 │ │ streq r2, [pc], #-116 @ 246c518 │ │ streq r2, [pc], #-1392 @ 246c51c │ │ streq r2, [pc], #-1356 @ 246c520 │ │ streq r2, [pc], #-1344 @ 246c524 │ │ streq r2, [pc], #-220 @ 246c528 │ │ - ldc2l 8, cr10, [ip, #324] @ 0x144 │ │ - ldc2l 11, cr3, [ip, #624] @ 0x270 @ │ │ + ldc2l 8, cr10, [ip, #504] @ 0x1f8 │ │ + ldc2l 11, cr3, [ip, #804] @ 0x324 @ │ │ streq r2, [pc], #-1180 @ 246c534 │ │ streq r2, [pc], #-412 @ 246c538 │ │ streq r2, [pc], #-148 @ 246c53c │ │ streq r2, [pc], #-132 @ 246c540 │ │ streq r2, [pc], #-1136 @ 246c544 │ │ streq r2, [pc], #-1064 @ 246c548 │ │ streq r2, [pc], #-224 @ 246c54c │ │ streq r1, [pc], #-4084 @ 246c550 │ │ streq r2, [pc], #-1008 @ 246c554 │ │ streq r2, [pc], #-192 @ 246c558 │ │ streq r2, [pc], #-1028 @ 246c55c │ │ streq r2, [pc], #-1000 @ 246c560 │ │ streq r2, [pc], #-728 @ 246c564 │ │ - ldc2l 10, cr3, [ip, #432] @ 0x1b0 @ │ │ + ldc2l 10, cr3, [ip, #612] @ 0x264 @ │ │ ldc2l 11, cr2, [lr, #700] @ 0x2bc @ │ │ streq r1, [pc], #-3684 @ 246c570 │ │ - ldc2l 11, cr15, [sl, #852] @ 0x354 @ │ │ - ldc2l 13, cr8, [sp, #540] @ 0x21c │ │ - ldc2l 2, cr7, [fp, #420] @ 0x1a4 │ │ + ldc2l 12, cr15, [sl, #8] │ │ + ldc2l 13, cr8, [sp, #720] @ 0x2d0 │ │ + ldc2l 2, cr7, [fp, #600] @ 0x258 │ │ streq r1, [pc], #-3504 @ 246c580 │ │ - ldc2l 15, cr12, [sp, #956] @ 0x3bc │ │ - ldc2l 11, cr15, [sl, #564] @ 0x234 @ │ │ + ldc2l 0, cr13, [sp, #112] @ 0x70 │ │ + ldc2l 11, cr15, [sl, #744] @ 0x2e8 @ │ │ streq r1, [pc], #-3860 @ 246c58c │ │ streq r1, [pc], #-3812 @ 246c590 │ │ streq r1, [pc], #-3596 @ 246c594 │ │ - ldc2l 15, cr12, [sp, #892] @ 0x37c │ │ + ldc2l 0, cr13, [sp, #48] @ 0x30 │ │ streq r1, [pc], #-3752 @ 246c59c │ │ mlaeq lr, ip, r2, sp │ │ streq r1, [pc], #-3680 @ 246c5a4 │ │ streq r1, [pc], #-3460 @ 246c5a8 │ │ - ldc2l 11, cr11, [fp, #420] @ 0x1a4 @ │ │ + ldc2l 11, cr11, [fp, #600] @ 0x258 @ │ │ streq r1, [pc], #-3604 @ 246c5b0 │ │ streq r1, [pc], #-3560 @ 246c5b4 │ │ streq r1, [pc], #-3748 @ 246c5b8 │ │ streq r1, [pc], #-3664 @ 246c5bc │ │ streq r1, [pc], #-3424 @ 246c5c0 │ │ - ldc2l 11, cr12, [sp, #516] @ 0x204 @ │ │ - ldc2l 8, cr3, [ip, #112] @ 0x70 │ │ + ldc2l 11, cr12, [sp, #696] @ 0x2b8 @ │ │ + vcadd.f32 , q6, , #270 │ │ streq r1, [pc], #-3360 @ 246c5cc │ │ streq r2, [pc], #-244 @ 246c5d0 │ │ streq r2, [pc], #-312 @ 246c5d4 │ │ streq r2, [pc], #-216 @ 246c5d8 │ │ eoreq sp, lr, ip, lsr #1 │ │ streq r1, [pc], #-4068 @ 246c5e0 │ │ - ldc2l 10, cr12, [sp, #868] @ 0x364 @ │ │ - ldc2l 7, cr3, [ip, #464] @ 0x1d0 │ │ + ldc2l 11, cr12, [sp, #24] @ │ │ + ldc2l 7, cr3, [ip, #644] @ 0x284 │ │ streq r2, [pc], #-116 @ 246c5ec │ │ streq r2, [pc], #-100 @ 246c5f0 │ │ - ldc2l 13, cr12, [sp, #124] @ 0x7c │ │ + ldc2l 13, cr12, [sp, #304] @ 0x130 │ │ streq r1, [pc], #-3048 @ 246c5f8 │ │ streq r2, [pc], #-60 @ 246c5fc │ │ streq r1, [pc], #-2984 @ 246c600 │ │ - ldc2l 8, cr11, [fp, #724] @ 0x2d4 │ │ + vcadd.f32 , , q9, #270 │ │ streq r1, [pc], #-2924 @ 246c608 │ │ streq r1, [pc], #-3948 @ 246c60c │ │ streq r1, [pc], #-3896 @ 246c610 │ │ streq r1, [pc], #-2848 @ 246c614 │ │ streq r1, [pc], #-2792 @ 246c618 │ │ streq r2, [pc], #-240 @ 246c61c │ │ streq r2, [pc], #-228 @ 246c620 │ │ streq r2, [pc], #-132 @ 246c624 │ │ streq r1, [pc], #-2768 @ 246c628 │ │ streq r1, [pc], #-3884 @ 246c62c │ │ - ldc2l 8, cr12, [sp, #980] @ 0x3d4 │ │ - ldc2l 5, cr3, [ip, #576] @ 0x240 │ │ - ldc2l 2, cr10, [ip, #244] @ 0xf4 │ │ - ldc2l 5, cr1, [ip, #992] @ 0x3e0 │ │ + ldc2l 9, cr12, [sp, #68] @ 0x44 @ │ │ + ldc2l 5, cr3, [ip, #756] @ 0x2f4 │ │ + ldc2l 2, cr10, [ip, #424] @ 0x1a8 │ │ + ldc2l 6, cr1, [ip, #148] @ 0x94 │ │ streq r1, [pc], #-3672 @ 246c640 │ │ streq r1, [pc], #-2520 @ 246c644 │ │ streq r1, [pc], #-2472 @ 246c648 │ │ streq r1, [pc], #-2696 @ 246c64c │ │ streq r1, [pc], #-3488 @ 246c650 │ │ streq r1, [pc], #-2404 @ 246c654 │ │ streq r1, [pc], #-2604 @ 246c658 │ │ streq r1, [pc], #-2808 @ 246c65c │ │ streq r1, [pc], #-3676 @ 246c660 │ │ - ldc2l 3, cr9, [sl, #532] @ 0x214 │ │ + ldc2l 3, cr9, [sl, #712] @ 0x2c8 │ │ streq r1, [pc], #-3464 @ 246c668 │ │ streq r1, [pc], #-2352 @ 246c66c │ │ streq r1, [pc], #-2564 @ 246c670 │ │ - ldc2l 8, cr8, [sp, #720] @ 0x2d0 │ │ + vcadd.f32 q12, , , #270 │ │ streq r1, [pc], #-2284 @ 246c678 │ │ streq r1, [pc], #-2500 @ 246c67c │ │ streq r1, [pc], #-3332 @ 246c680 │ │ - ldc2l 2, cr7, [fp, #128] @ 0x80 │ │ + ldc2l 2, cr7, [fp, #308] @ 0x134 │ │ streq r1, [pc], #-2208 @ 246c688 │ │ streq r1, [pc], #-2692 @ 246c68c │ │ streq r1, [pc], #-3244 @ 246c690 │ │ streq r1, [pc], #-3004 @ 246c694 │ │ - ldc2l 6, cr12, [sp, #708] @ 0x2c4 │ │ - ldc2l 3, cr3, [ip, #304] @ 0x130 │ │ - ldc2l 9, cr12, [sp, #110] @ 0x6e @ │ │ + ldc2l 6, cr12, [sp, #888] @ 0x378 │ │ + ldc2l 3, cr3, [ip, #484] @ 0x1e4 │ │ + ldc2l 9, cr12, [sp, #200] @ 0xc8 @ │ │ streq r1, [pc], #-2048 @ 246c6a4 │ │ strdeq ip, [lr], -r8 @ │ │ streq r1, [pc], #-3148 @ 246c6ac │ │ streq r1, [pc], #-1976 @ 246c6b0 │ │ - ldc2l 4, cr11, [fp, #788] @ 0x314 │ │ + ldc2l 4, cr11, [fp, #968] @ 0x3c8 │ │ streq r1, [pc], #-1916 @ 246c6b8 │ │ streq r1, [pc], #-2940 @ 246c6bc │ │ streq r1, [pc], #-2888 @ 246c6c0 │ │ streq r1, [pc], #-1840 @ 246c6c4 │ │ streq r1, [pc], #-2124 @ 246c6c8 │ │ streq r1, [pc], #-1788 @ 246c6cc │ │ streq r1, [pc], #-2820 @ 246c6d0 │ │ streq r1, [pc], #-2808 @ 246c6d4 │ │ - ldc2l 5, cr12, [sp, #68] @ 0x44 │ │ - ldc2l 1, cr3, [ip, #688] @ 0x2b0 │ │ - ldc2l 14, cr9, [ip, #356] @ 0x164 │ │ - ldc2l 2, cr1, [ip, #96] @ 0x60 │ │ + ldc2l 5, cr12, [sp, #248] @ 0xf8 │ │ + ldc2l 1, cr3, [ip, #868] @ 0x364 │ │ + ldc2l 14, cr9, [ip, #536] @ 0x218 │ │ + ldc2l 2, cr1, [ip, #276] @ 0x114 │ │ streq r1, [pc], #-2680 @ 246c6e8 │ │ streq r1, [pc], #-1444 @ 246c6ec │ │ streq r1, [pc], #-1396 @ 246c6f0 │ │ streq r1, [pc], #-1620 @ 246c6f4 │ │ streq r1, [pc], #-2412 @ 246c6f8 │ │ streq r1, [pc], #-1328 @ 246c6fc │ │ streq r1, [pc], #-1608 @ 246c700 │ │ - ldc2l 5, cr8, [sp, #928] @ 0x3a0 │ │ + ldc2l 6, cr8, [sp, #84] @ 0x54 │ │ streq r1, [pc], #-1560 @ 246c708 │ │ streq r1, [pc], #-1776 @ 246c70c │ │ streq r1, [pc], #-2620 @ 246c710 │ │ - ldc2l 15, cr6, [fp, #320] @ 0x140 │ │ + ldc2l 15, cr6, [fp, #500] @ 0x1f4 │ │ streq r1, [pc], #-1488 @ 246c718 │ │ streq r1, [pc], #-1700 @ 246c71c │ │ │ │ 0246c718 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ vpush {d8-d10} │ │ @@ -1348658,24 +1348657,24 @@ │ │ strd r0, [r4, #40] @ 0x28 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ eoreq ip, lr, r4, asr #11 │ │ streq r1, [pc], #-2952 @ 246cb00 │ │ streq r1, [pc], #-1320 @ 246cb04 │ │ - ldc2l 15, cr9, [sp, #568] @ 0x238 │ │ - ldc2l 13, cr4, [fp, #860] @ 0x35c │ │ - ldc2l 15, cr9, [sp, #264] @ 0x108 │ │ - ldc2l 13, cr4, [fp, #556] @ 0x22c │ │ - ldc2l 14, cr9, [sp, #984] @ 0x3d8 │ │ - ldc2l 13, cr4, [fp, #252] @ 0xfc │ │ - ldc2l 14, cr9, [sp, #680] @ 0x2a8 │ │ - ldc2l 12, cr4, [fp, #972] @ 0x3cc │ │ - ldc2l 14, cr9, [sp, #376] @ 0x178 │ │ - ldc2l 12, cr4, [fp, #668] @ 0x29c │ │ + ldc2l 15, cr9, [sp, #748] @ 0x2ec │ │ + ldc2l 14, cr4, [fp, #16] │ │ + ldc2l 15, cr9, [sp, #444] @ 0x1bc │ │ + ldc2l 13, cr4, [fp, #736] @ 0x2e0 │ │ + ldc2l 15, cr9, [sp, #140] @ 0x8c │ │ + ldc2l 13, cr4, [fp, #432] @ 0x1b0 │ │ + ldc2l 14, cr9, [sp, #860] @ 0x35c │ │ + ldc2l 13, cr4, [fp, #128] @ 0x80 │ │ + ldc2l 14, cr9, [sp, #556] @ 0x22c │ │ + ldc2l 12, cr4, [fp, #848] @ 0x350 │ │ │ │ 0246cb28 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ vpush {d8} │ │ mov r8, r3 │ │ mov r7, r2 │ │ @@ -1348801,21 +1348800,21 @@ │ │ vld1.64 {d20-d21}, [r4]! │ │ subs r3, r3, #2 │ │ vst1.64 {d20-d21}, [r7]! │ │ bne 246cd18 │ │ cmp r1, r2 │ │ bne 246cc20 │ │ b 246cc48 │ │ - ldc2l 13, cr8, [fp, #380] @ 0x17c │ │ - ldc2l 2, cr4, [sp, #984] @ 0x3d8 │ │ - ldc2l 2, cr6, [fp, #948] @ 0x3b4 │ │ - vcadd.f32 d24, d11, d31, #270 │ │ - ldc2l 13, cr8, [fp, #588] @ 0x24c │ │ - ldc2l 6, cr2, [sp, #740] @ 0x2e4 │ │ - vcadd.f32 q10, q14, , #270 │ │ + ldc2l 13, cr8, [fp, #560] @ 0x230 │ │ + ldc2l 3, cr4, [sp, #140] @ 0x8c │ │ + ldc2l 3, cr6, [fp, #104] @ 0x68 │ │ + ldc2l 8, cr8, [fp, #368] @ 0x170 │ │ + ldc2l 13, cr8, [fp, #768] @ 0x300 │ │ + ldc2l 6, cr2, [sp, #920] @ 0x398 │ │ + ldc2l 8, cr4, [ip, #968] @ 0x3c8 │ │ │ │ 0246cd50 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ mov r4, r3 │ │ mov r5, r2 │ │ @@ -1348906,24 +1348905,24 @@ │ │ add r0, r2, r1 │ │ add r1, sp, #8 │ │ add r2, sp, #4 │ │ str r0, [sp, #4] │ │ mov r0, r6 │ │ bl 270d300 │ │ b 246ce38 │ │ - ldc2l 12, cr12, [sl, #912] @ 0x390 │ │ + ldc2l 13, cr12, [sl, #68] @ 0x44 │ │ eoreq ip, lr, r4, asr r1 │ │ eoreq ip, lr, r0, asr #2 │ │ - vcadd.f32 d30, d27, d14, #270 │ │ - ldc2l 0, cr6, [fp, #788] @ 0x314 │ │ - ldc2l 2, cr12, [ip, #532] @ 0x214 │ │ - ldc2l 12, cr9, [sp, #164] @ 0xa4 │ │ - ldc2l 0, cr6, [fp, #292] @ 0x124 │ │ - ldc2l 9, cr13, [sp, #244] @ 0xf4 @ │ │ - ldc2l 12, cr12, [sl, #144] @ 0x90 │ │ + ldc2l 8, cr14, [fp, #748] @ 0x2ec │ │ + ldc2l 0, cr6, [fp, #968] @ 0x3c8 │ │ + ldc2l 2, cr12, [ip, #712] @ 0x2c8 │ │ + ldc2l 12, cr9, [sp, #344] @ 0x158 │ │ + ldc2l 0, cr6, [fp, #472] @ 0x1d8 │ │ + ldc2l 9, cr13, [sp, #334] @ 0x14e @ │ │ + ldc2l 12, cr12, [sl, #324] @ 0x144 │ │ │ │ 0246cef8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ sub sp, sp, #88 @ 0x58 │ │ @@ -1349115,20 +1349114,20 @@ │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldc2l 12, cr15, [sp, #988] @ 0x3dc │ │ - ldc2l 9, cr9, [sp, #292] @ 0x124 @ │ │ - ldc2l 5, cr8, [sl, #840] @ 0x348 │ │ - ldc2l 8, cr9, [sp, #744] @ 0x2e8 │ │ - ldc2l 4, cr8, [sl, #1016] @ 0x3f8 │ │ - ldc2l 7, cr9, [sp, #904] @ 0x388 │ │ - ldc2l 4, cr8, [sl, #152] @ 0x98 │ │ + ldc2l 9, cr9, [sp, #382] @ 0x17e @ │ │ + ldc2l 5, cr8, [sl, #1020] @ 0x3fc │ │ + vcadd.f32 , , , #270 │ │ + ldc2l 5, cr8, [sl, #172] @ 0xac │ │ + vcadd.f32 d25, d13, d15, #270 │ │ + ldc2l 4, cr8, [sl, #332] @ 0x14c │ │ ldc2l 10, cr15, [sp, #268] @ 0x10c @ │ │ │ │ 0246d228 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ mov r6, r2 │ │ @@ -1349195,15 +1349194,15 @@ │ │ bl 270cf60 │ │ mov r0, r8 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 10, cr11, [sp, #92] @ 0x5c @ │ │ + ldc2l 10, cr11, [sp, #272] @ 0x110 @ │ │ │ │ 0246d348 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #900 @ 0x384 │ │ mov r5, r3 │ │ mov r6, r2 │ │ @@ -1349448,15 +1349447,15 @@ │ │ bl 270d300 │ │ mov r0, r8 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 0, cr12, [fp, #808] @ 0x328 │ │ + ldc2l 0, cr12, [fp, #988] @ 0x3dc │ │ mlaeq lr, r4, r8, fp │ │ mlaeq lr, r0, r8, fp │ │ │ │ 0246d734 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #64 @ 0x40 │ │ @@ -1349519,15 +1349518,15 @@ │ │ bl 270d300 │ │ mov r0, r8 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 10, cr11, [ip, #648] @ 0x288 @ │ │ + ldc2l 10, cr11, [ip, #828] @ 0x33c @ │ │ eoreq fp, lr, r8, lsl #15 │ │ eoreq fp, lr, r4, lsl #15 │ │ │ │ 0246d848 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #916 @ 0x394 │ │ @@ -1349854,32 +1349853,32 @@ │ │ add r4, pc, r4 │ │ mov r1, r4 │ │ bl 270e090 │ │ add r2, r9, #48 @ 0x30 │ │ mov r0, r6 │ │ mov r1, r4 │ │ b 246dc94 │ │ - ldc2l 14, cr13, [fp, #636] @ 0x27c │ │ + ldc2l 14, cr13, [fp, #816] @ 0x330 │ │ eoreq fp, lr, r0, lsl #13 │ │ eoreq fp, lr, ip, ror r6 │ │ - ldc2l 8, cr13, [ip, #864] @ 0x360 │ │ - ldc2l 5, cr5, [fp, #468] @ 0x1d4 │ │ - ldc2l 13, cr15, [sl, #136] @ 0x88 │ │ + ldc2l 9, cr13, [ip, #10] @ │ │ + ldc2l 5, cr5, [fp, #648] @ 0x288 │ │ + ldc2l 13, cr15, [sl, #316] @ 0x13c │ │ ldrdeq fp, [lr], -r8 @ │ │ - ldc2l 11, cr7, [sp, #956] @ 0x3bc @ │ │ - ldc2l 14, cr9, [sl, #404] @ 0x194 │ │ - ldc2l 11, cr7, [sp, #700] @ 0x2bc @ │ │ - ldc2l 14, cr9, [sl, #148] @ 0x94 │ │ + ldc2l 12, cr7, [sp, #112] @ 0x70 │ │ + ldc2l 14, cr9, [sl, #584] @ 0x248 │ │ + ldc2l 11, cr7, [sp, #880] @ 0x370 @ │ │ + ldc2l 14, cr9, [sl, #328] @ 0x148 │ │ eoreq fp, lr, r0, asr #3 │ │ - ldc2l 12, cr7, [sp, #812] @ 0x32c │ │ - ldc2l 15, cr9, [sl, #260] @ 0x104 │ │ - ldc2l 12, cr7, [sp, #556] @ 0x22c │ │ - ldc2l 15, cr9, [sl, #4] │ │ + ldc2l 12, cr7, [sp, #992] @ 0x3e0 │ │ + ldc2l 15, cr9, [sl, #440] @ 0x1b8 │ │ + ldc2l 12, cr7, [sp, #736] @ 0x2e0 │ │ + ldc2l 15, cr9, [sl, #184] @ 0xb8 │ │ eoreq fp, lr, r8, lsl #5 │ │ - ldc2l 10, cr13, [fp, #476] @ 0x1dc @ │ │ + ldc2l 10, cr13, [fp, #656] @ 0x290 @ │ │ │ │ 0246ddb8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ sub sp, sp, #112 @ 0x70 │ │ @@ -1350031,22 +1350030,22 @@ │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ eoreq fp, lr, r4, lsr #2 │ │ eoreq fp, lr, r0, lsr #2 │ │ - ldc2l 2, cr5, [ip, #920] @ 0x398 │ │ + ldc2l 3, cr5, [ip, #76] @ 0x4c │ │ ldc2l 13, cr14, [sp, #356] @ 0x164 │ │ - ldc2l 15, cr4, [fp, #804] @ 0x324 │ │ - ldc2l 7, cr15, [sl, #472] @ 0x1d8 │ │ - ldc2l 2, cr5, [ip, #616] @ 0x268 │ │ - ldc2l 8, cr3, [fp, #236] @ 0xec │ │ - ldc2l 15, cr4, [fp, #500] @ 0x1f4 │ │ - vcadd.f32 d19, d11, d25, #270 │ │ + ldc2l 15, cr4, [fp, #984] @ 0x3d8 │ │ + ldc2l 7, cr15, [sl, #652] @ 0x28c │ │ + ldc2l 2, cr5, [ip, #796] @ 0x31c │ │ + vcadd.f32 , , q12, #270 │ │ + ldc2l 15, cr4, [fp, #680] @ 0x2a8 │ │ + ldc2l 8, cr3, [fp, #344] @ 0x158 │ │ │ │ 0246e04c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ sub sp, sp, #920 @ 0x398 │ │ @@ -1350365,28 +1350364,28 @@ │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mlaeq lr, r8, lr, sl │ │ mlaeq lr, r4, lr, sl │ │ - ldc2l 5, cr3, [fp, #544] @ 0x220 │ │ - ldc2l 7, cr6, [sp, #792] @ 0x318 │ │ - ldc2l 12, cr4, [fp, #420] @ 0x1a4 │ │ - ldc2l 4, cr15, [sl, #88] @ 0x58 │ │ - ldc2l 5, cr3, [fp, #240] @ 0xf0 │ │ - ldc2l 4, cr3, [fp, #876] @ 0x36c │ │ - ldc2l 12, cr4, [fp, #116] @ 0x74 │ │ - ldc2l 4, cr3, [fp, #804] @ 0x324 │ │ - ldc2l 9, cr14, [ip, #414] @ 0x19e @ │ │ - ldc2l 2, cr3, [ip, #672] @ 0x2a0 │ │ - ldc2l 7, cr14, [ip, #668] @ 0x29c │ │ - ldc2l 0, cr3, [ip, #512] @ 0x200 │ │ - ldc2l 7, cr14, [ip, #332] @ 0x14c │ │ - ldc2l 0, cr3, [ip, #176] @ 0xb0 │ │ + ldc2l 5, cr3, [fp, #724] @ 0x2d4 │ │ + ldc2l 7, cr6, [sp, #972] @ 0x3cc │ │ + ldc2l 12, cr4, [fp, #600] @ 0x258 │ │ + ldc2l 4, cr15, [sl, #268] @ 0x10c │ │ + ldc2l 5, cr3, [fp, #420] @ 0x1a4 │ │ + ldc2l 5, cr3, [fp, #32] │ │ + ldc2l 12, cr4, [fp, #296] @ 0x128 │ │ + ldc2l 4, cr3, [fp, #984] @ 0x3d8 │ │ + ldc2l 9, cr14, [ip, #504] @ 0x1f8 @ │ │ + ldc2l 2, cr3, [ip, #852] @ 0x354 │ │ + ldc2l 7, cr14, [ip, #848] @ 0x350 │ │ + ldc2l 0, cr3, [ip, #692] @ 0x2b4 │ │ + ldc2l 7, cr14, [ip, #512] @ 0x200 │ │ + ldc2l 0, cr3, [ip, #356] @ 0x164 │ │ │ │ 0246e594 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ mov r4, r3 │ │ mov r7, r2 │ │ @@ -1350533,15 +1350532,15 @@ │ │ mov r3, r4 │ │ bl 270f5a0 │ │ mov r0, r8 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 12, cr2, [ip, #800] @ 0x320 │ │ + ldc2l 12, cr2, [ip, #980] @ 0x3d4 │ │ │ │ 0246e7f0 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ mov r4, r3 │ │ mov r5, r2 │ │ mov r6, r1 │ │ @@ -1350562,15 +1350561,15 @@ │ │ mov r3, r4 │ │ bl 270f520 │ │ mov r0, r8 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 14, cr14, [sl, #440] @ 0x1b8 │ │ + ldc2l 14, cr14, [sl, #620] @ 0x26c │ │ │ │ 0246e85c : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #32 │ │ mov r6, r3 │ │ mov r5, r2 │ │ @@ -1350642,20 +1350641,20 @@ │ │ ldr r0, [pc, #40] @ 246e9a4 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 0, cr7, [fp, #536] @ 0x218 │ │ - ldc2l 14, cr2, [fp, #684] @ 0x2ac │ │ - ldc2l 5, cr4, [fp, #948] @ 0x3b4 │ │ - ldc2l 14, cr2, [fp, #612] @ 0x264 │ │ + ldc2l 0, cr7, [fp, #716] @ 0x2cc │ │ + ldc2l 14, cr2, [fp, #864] @ 0x360 │ │ + ldc2l 6, cr4, [fp, #104] @ 0x68 │ │ + ldc2l 14, cr2, [fp, #792] @ 0x318 │ │ eoreq sl, lr, r8, lsl r6 │ │ - ldc2l 15, cr6, [fp, #600] @ 0x258 │ │ + ldc2l 15, cr6, [fp, #780] @ 0x30c │ │ │ │ 0246e9a8 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #64 @ 0x40 │ │ mov r4, r3 │ │ mov r6, r1 │ │ @@ -1350724,24 +1350723,24 @@ │ │ ldr r0, [pc, #56] @ 246eaf4 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 8, cr12, [ip, #508] @ 0x1fc │ │ + vcadd.f32 d28, d28, d28, #270 │ │ eoreq sl, lr, r4, asr r5 │ │ eoreq sl, lr, r0, asr r5 │ │ - ldc2l 7, cr10, [ip, #772] @ 0x304 │ │ - ldc2l 4, cr4, [fp, #388] @ 0x184 │ │ - ldc2l 12, cr14, [sl, #56] @ 0x38 │ │ - ldc2l 7, cr4, [ip, #244] @ 0xf4 │ │ - ldc2l 4, cr4, [fp, #164] @ 0xa4 │ │ - ldc2l 9, cr2, [ip, #438] @ 0x1b6 @ │ │ - ldc2l 7, cr12, [ip, #604] @ 0x25c │ │ + ldc2l 7, cr10, [ip, #952] @ 0x3b8 │ │ + ldc2l 4, cr4, [fp, #568] @ 0x238 │ │ + ldc2l 12, cr14, [sl, #236] @ 0xec │ │ + ldc2l 7, cr4, [ip, #424] @ 0x1a8 │ │ + ldc2l 4, cr4, [fp, #344] @ 0x158 │ │ + ldc2l 10, cr2, [ip, #32] @ │ │ + ldc2l 7, cr12, [ip, #784] @ 0x310 │ │ │ │ 0246eaf8 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #64 @ 0x40 │ │ mov r4, r3 │ │ mov r6, r1 │ │ @@ -1350816,25 +1350815,25 @@ │ │ ldr r0, [pc, #60] @ 246ec60 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 7, cr10, [ip, #180] @ 0xb4 │ │ + ldc2l 7, cr10, [ip, #360] @ 0x168 │ │ eoreq sl, lr, ip, lsl #8 │ │ eoreq sl, lr, r8, lsl #8 │ │ - ldc2l 14, cr10, [sl, #828] @ 0x33c │ │ - ldc2l 3, cr4, [fp, #68] @ 0x44 │ │ - ldc2l 10, cr14, [sl, #760] @ 0x2f8 @ │ │ - ldc2l 6, cr4, [sl, #392] @ 0x188 │ │ - ldc2l 2, cr4, [fp, #868] @ 0x364 │ │ + ldc2l 14, cr10, [sl, #1008] @ 0x3f0 │ │ + ldc2l 3, cr4, [fp, #248] @ 0xf8 │ │ + ldc2l 10, cr14, [sl, #940] @ 0x3ac @ │ │ + ldc2l 6, cr4, [sl, #572] @ 0x23c │ │ + ldc2l 3, cr4, [fp, #24] │ │ eoreq sl, lr, ip, asr #6 │ │ - ldc2l 8, cr2, [ip, #460] @ 0x1cc │ │ - ldc2l 6, cr10, [ip, #180] @ 0xb4 │ │ + vcadd.f32 d18, d28, d16, #270 │ │ + ldc2l 6, cr10, [ip, #360] @ 0x168 │ │ │ │ 0246ec64 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #940 @ 0x3ac │ │ mov sl, r3 │ │ mov r6, r2 │ │ @@ -1351179,42 +1351178,42 @@ │ │ sub r0, r0, #1 │ │ str r0, [fp, #-40] @ 0xffffffd8 │ │ mov r0, r4 │ │ add r3, r6, r2, lsl #3 │ │ sub r2, fp, #40 @ 0x28 │ │ bl 270d300 │ │ b 246ee24 │ │ - ldc2l 11, cr12, [sl, #496] @ 0x1f0 @ │ │ + ldc2l 11, cr12, [sl, #676] @ 0x2a4 @ │ │ eoreq sl, lr, r8, lsr #5 │ │ eoreq sl, lr, r4, lsr #5 │ │ - ldc2l 4, cr0, [sp, #756] @ 0x2f4 │ │ - ldc2l 2, cr0, [sp, #768] @ 0x300 │ │ - vcadd.f32 q15, q13, q1, #270 │ │ - ldc2l 9, cr2, [fp, #302] @ 0x12e @ │ │ - ldc2l 0, cr4, [fp, #868] @ 0x364 │ │ - ldc2l 9, cr2, [fp, #266] @ 0x10a @ │ │ - ldc2l 10, cr2, [fp, #332] @ 0x14c @ │ │ - ldc2l 1, cr4, [fp, #260] @ 0x104 │ │ - ldc2l 12, cr5, [sp, #816] @ 0x330 │ │ - ldc2l 3, cr12, [ip, #616] @ 0x268 │ │ - ldc2l 15, cr3, [fp, #964] @ 0x3c4 │ │ - ldc2l 9, cr2, [fp, #240] @ 0xf0 @ │ │ - ldc2l 15, cr3, [fp, #756] @ 0x2f4 │ │ - ldc2l 11, cr7, [sp, #584] @ 0x248 @ │ │ - ldc2l 15, cr3, [fp, #244] @ 0xf4 │ │ - ldc2l 5, cr14, [fp, #688] @ 0x2b0 │ │ - ldc2l 9, cr2, [fp, #252] @ 0xfc @ │ │ - ldc2l 3, cr14, [ip, #12] │ │ + ldc2l 4, cr0, [sp, #936] @ 0x3a8 │ │ + ldc2l 2, cr0, [sp, #948] @ 0x3b4 │ │ + vcadd.f32 q15, q13, , #270 │ │ + ldc2l 9, cr2, [fp, #392] @ 0x188 @ │ │ + ldc2l 1, cr4, [fp, #24] │ │ + ldc2l 9, cr2, [fp, #356] @ 0x164 @ │ │ + ldc2l 10, cr2, [fp, #512] @ 0x200 @ │ │ + ldc2l 1, cr4, [fp, #440] @ 0x1b8 │ │ + ldc2l 12, cr5, [sp, #996] @ 0x3e4 │ │ + ldc2l 3, cr12, [ip, #796] @ 0x31c │ │ + ldc2l 0, cr4, [fp, #120] @ 0x78 │ │ + ldc2l 9, cr2, [fp, #330] @ 0x14a @ │ │ + ldc2l 15, cr3, [fp, #936] @ 0x3a8 │ │ + ldc2l 11, cr7, [sp, #764] @ 0x2fc @ │ │ + ldc2l 15, cr3, [fp, #424] @ 0x1a8 │ │ + ldc2l 5, cr14, [fp, #868] @ 0x364 │ │ + ldc2l 9, cr2, [fp, #342] @ 0x156 @ │ │ + ldc2l 3, cr14, [ip, #192] @ 0xc0 │ │ ldc2l 13, cr13, [sp, #412] @ 0x19c │ │ - ldc2l 4, cr2, [ip, #12] │ │ - ldc2l 11, cr13, [ip, #444] @ 0x1bc @ │ │ - ldc2l 2, cr10, [ip, #160] @ 0xa0 │ │ - ldc2l 9, cr12, [sl, #456] @ 0x1c8 @ │ │ - ldc2l 9, cr12, [sl, #254] @ 0xfe @ │ │ - ldc2l 0, cr4, [fp, #84] @ 0x54 │ │ + ldc2l 4, cr2, [ip, #192] @ 0xc0 │ │ + ldc2l 11, cr13, [ip, #624] @ 0x270 @ │ │ + ldc2l 2, cr10, [ip, #340] @ 0x154 │ │ + ldc2l 10, cr12, [sl, #68] @ 0x44 @ │ │ + ldc2l 9, cr12, [sl, #344] @ 0x158 @ │ │ + ldc2l 0, cr4, [fp, #264] @ 0x108 │ │ │ │ 0246f24c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #964 @ 0x3c4 │ │ mov r9, r3 │ │ mov r6, r2 │ │ @@ -1351997,75 +1351996,75 @@ │ │ cmp r0, #0 │ │ bne 246f618 │ │ ldr r1, [pc, #248] @ 246ff88 │ │ mov r0, #1 │ │ add r1, pc, r1 │ │ strb r0, [r1] │ │ b 246f618 │ │ - ldc2l 0, cr0, [sp, #132] @ 0x84 │ │ + ldc2l 0, cr0, [sp, #312] @ 0x138 │ │ streq pc, [lr], #-2164 @ 0xfffff78c │ │ streq pc, [lr], #-2164 @ 0xfffff78c │ │ ldrdeq r9, [lr], -r0 @ │ │ eoreq r9, lr, ip, asr #25 │ │ - ldc2l 1, cr2, [fp, #860] @ 0x35c │ │ - ldc2l 9, cr3, [fp, #50] @ 0x32 @ │ │ - ldc2l 1, cr2, [fp, #788] @ 0x314 │ │ + ldc2l 2, cr2, [fp, #16] │ │ + ldc2l 9, cr3, [fp, #140] @ 0x8c @ │ │ + ldc2l 1, cr2, [fp, #968] @ 0x3c8 │ │ streq pc, [lr], #-2048 @ 0xfffff800 │ │ eoreq r9, lr, r8, asr ip │ │ eoreq r9, lr, r8, asr r9 │ │ streq pc, [lr], #-1244 @ 0xfffffb24 │ │ eoreq r9, lr, r8, lsr r9 │ │ streq pc, [lr], #-1212 @ 0xfffffb44 │ │ strdeq r9, [lr], -r8 @ │ │ - ldc2l 3, cr11, [sp, #492] @ 0x1ec │ │ - ldc2l 10, cr15, [ip, #448] @ 0x1c0 @ │ │ - ldc2l 0, cr14, [sl, #456] @ 0x1c8 │ │ + ldc2l 3, cr11, [sp, #672] @ 0x2a0 │ │ + ldc2l 10, cr15, [ip, #628] @ 0x274 @ │ │ + ldc2l 0, cr14, [sl, #636] @ 0x27c │ │ strhteq r9, [lr], -r0 │ │ eoreq r9, lr, r8, lsr #17 │ │ eoreq r9, lr, r4, lsl #17 │ │ eoreq r9, lr, r8, lsl #17 │ │ eoreq r9, lr, r8, ror #16 │ │ eoreq r9, lr, r8, ror #16 │ │ eoreq r9, lr, r4, ror #16 │ │ - ldc2l 7, cr13, [ip, #300] @ 0x12c │ │ - ldc2l 6, cr5, [sp, #96] @ 0x60 │ │ - ldc2l 6, cr3, [sp, #300] @ 0x12c │ │ - ldc2l 4, cr3, [fp, #964] @ 0x3c4 │ │ - ldc2l 6, cr15, [ip, #584] @ 0x248 │ │ - ldc2l 3, cr13, [ip, #12] │ │ - ldc2l 1, cr5, [sp, #832] @ 0x340 │ │ - ldc2l 13, cr10, [sp, #616] @ 0x268 │ │ - ldc2l 15, cr9, [sl, #556] @ 0x22c │ │ - ldc2l 3, cr3, [fp, #548] @ 0x224 │ │ - ldc2l 7, cr1, [ip, #876] @ 0x36c │ │ + ldc2l 7, cr13, [ip, #480] @ 0x1e0 │ │ + ldc2l 6, cr5, [sp, #276] @ 0x114 │ │ + ldc2l 6, cr3, [sp, #480] @ 0x1e0 │ │ + ldc2l 5, cr3, [fp, #120] @ 0x78 │ │ + ldc2l 6, cr15, [ip, #764] @ 0x2fc │ │ + ldc2l 3, cr13, [ip, #192] @ 0xc0 │ │ + ldc2l 1, cr5, [sp, #1012] @ 0x3f4 │ │ + ldc2l 13, cr10, [sp, #796] @ 0x31c │ │ + ldc2l 15, cr9, [sl, #736] @ 0x2e0 │ │ + ldc2l 3, cr3, [fp, #728] @ 0x2d8 │ │ + vcadd.f32 d17, d12, d8, #270 │ │ stc2l 6, cr9, [r6, #400]! @ 0x190 │ │ stc2l 6, cr9, [r6, #416]! @ 0x1a0 │ │ - ldc2l 13, cr10, [sp, #876] @ 0x36c │ │ - ldc2l 2, cr3, [fp, #884] @ 0x374 │ │ + ldc2l 14, cr10, [sp, #32] │ │ + ldc2l 3, cr3, [fp, #40] @ 0x28 │ │ ldc2l 1, cr13, [sp, #312] @ 0x138 │ │ - ldc2l 3, cr3, [fp, #4] │ │ - ldc2l 9, cr13, [fp, #56] @ 0x38 @ │ │ + ldc2l 3, cr3, [fp, #184] @ 0xb8 │ │ + ldc2l 9, cr13, [fp, #146] @ 0x92 @ │ │ eoreq r9, lr, r4, lsl #6 │ │ streq lr, [lr], #-3716 @ 0xfffff17c │ │ streq lr, [lr], #-3720 @ 0xfffff178 │ │ eoreq r9, lr, r0, asr #5 │ │ streq lr, [lr], #-3696 @ 0xfffff190 │ │ ldrdeq r9, [lr], -r0 @ │ │ mlaeq lr, r4, r2, r9 │ │ strhteq r9, [lr], -r8 │ │ mlaeq lr, r0, r2, r9 │ │ eoreq r9, lr, r4, lsl #5 │ │ eoreq r9, lr, r0, asr r2 │ │ eoreq r9, lr, ip, ror #4 │ │ eoreq r9, lr, ip, asr #4 │ │ eoreq r9, lr, r8, asr #4 │ │ - ldc2l 4, cr13, [ip, #60] @ 0x3c │ │ - ldc2l 2, cr5, [sp, #880] @ 0x370 │ │ + ldc2l 4, cr13, [ip, #240] @ 0xf0 │ │ + ldc2l 3, cr5, [sp, #36] @ 0x24 │ │ streq lr, [lr], #-3192 @ 0xfffff388 │ │ - ldc2l 12, cr15, [ip, #500] @ 0x1f4 │ │ + ldc2l 12, cr15, [ip, #680] @ 0x2a8 │ │ │ │ 0246ff90 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d15} │ │ sub sp, sp, #104 @ 0x68 │ │ @@ -1352348,21 +1352347,21 @@ │ │ add r0, r3, r2 │ │ adds r1, r1, #1 │ │ vldr d16, [r0] │ │ vstmia r3!, {d16} │ │ bcc 24703e4 │ │ str r9, [r4] │ │ b 247030c │ │ - ldc2l 2, cr15, [fp, #208] @ 0xd0 │ │ + ldc2l 2, cr15, [fp, #388] @ 0x184 │ │ ldc2l 2, cr14, [sp, #624] @ 0x270 │ │ - ldc2l 13, cr14, [ip, #496] @ 0x1f0 │ │ - ldc2l 11, cr2, [ip, #116] @ 0x74 @ │ │ - ldc2l 1, cr13, [fp, #316] @ 0x13c │ │ - ldc2l 3, cr5, [fp, #932] @ 0x3a4 │ │ - ldc2l 1, cr15, [fp, #880] @ 0x370 │ │ + ldc2l 13, cr14, [ip, #676] @ 0x2a4 │ │ + ldc2l 11, cr2, [ip, #296] @ 0x128 @ │ │ + ldc2l 1, cr13, [fp, #496] @ 0x1f0 │ │ + ldc2l 4, cr5, [fp, #88] @ 0x58 │ │ + ldc2l 2, cr15, [fp, #36] @ 0x24 │ │ │ │ 0247041c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #908 @ 0x38c │ │ mov r8, r3 │ │ mov sl, r2 │ │ @@ -1352578,23 +1352577,23 @@ │ │ ldr r0, [pc, #52] @ 24707b0 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 3, cr15, [sl, #404] @ 0x194 │ │ + ldc2l 3, cr15, [sl, #584] @ 0x248 │ │ eoreq r8, lr, r8, asr #22 │ │ eoreq r8, lr, r4, asr #22 │ │ - ldc2l 3, cr5, [fp, #508] @ 0x1fc │ │ - ldc2l 9, cr2, [fp, #434] @ 0x1b2 @ │ │ + ldc2l 3, cr5, [fp, #688] @ 0x2b0 │ │ + ldc2l 10, cr2, [fp, #24] @ │ │ strhteq r8, [lr], -r4 │ │ - ldc2l 5, cr6, [sp, #404] @ 0x194 │ │ + ldc2l 5, cr6, [sp, #584] @ 0x248 │ │ eoreq r8, lr, ip, lsl #17 │ │ - ldc2l 0, cr15, [sl, #212] @ 0xd4 │ │ + ldc2l 0, cr15, [sl, #392] @ 0x188 │ │ │ │ 024707b4 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r2 │ │ mov r5, r1 │ │ mov r6, r0 │ │ @@ -1352654,20 +1352653,20 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #36] @ 24708cc │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 10, cr12, [ip, #956] @ 0x3bc @ │ │ - ldc2l 7, cr6, [ip, #80] @ 0x50 │ │ - ldc2l 6, cr2, [fp, #228] @ 0xe4 │ │ - ldc2l 11, cr4, [fp, #492] @ 0x1ec @ │ │ + ldc2l 11, cr12, [ip, #112] @ 0x70 @ │ │ + ldc2l 7, cr6, [ip, #260] @ 0x104 │ │ + ldc2l 6, cr2, [fp, #408] @ 0x198 │ │ + ldc2l 11, cr4, [fp, #672] @ 0x2a0 @ │ │ streq lr, [lr], #-776 @ 0xfffffcf8 │ │ - ldc2l 10, cr12, [ip, #172] @ 0xac @ │ │ + ldc2l 10, cr12, [ip, #352] @ 0x160 @ │ │ │ │ 024708d0 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r5, r1 │ │ mov r4, r0 │ │ bl 270ce10 │ │ @@ -1352703,19 +1352702,19 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #32] @ 2470984 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 1, cr4, [sp, #480] @ 0x1e0 │ │ - ldc2l 6, cr6, [ip, #352] @ 0x160 │ │ - ldc2l 5, cr2, [fp, #500] @ 0x1f4 │ │ - ldc2l 10, cr4, [fp, #764] @ 0x2fc @ │ │ - ldc2l 1, cr4, [sp, #64] @ 0x40 │ │ + ldc2l 1, cr4, [sp, #660] @ 0x294 │ │ + ldc2l 6, cr6, [ip, #532] @ 0x214 │ │ + ldc2l 5, cr2, [fp, #680] @ 0x2a8 │ │ + ldc2l 10, cr4, [fp, #944] @ 0x3b0 @ │ │ + ldc2l 1, cr4, [sp, #244] @ 0xf4 │ │ │ │ 02470988 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ sub sp, sp, #16 │ │ @@ -1352972,19 +1352971,19 @@ │ │ nop {0} │ │ @ instruction: 0xfefa39ef │ │ svccc 0x00e62e42 │ │ streq lr, [lr], #-380 @ 0xfffffe84 │ │ streq lr, [lr], #-524 @ 0xfffffdf4 │ │ streq lr, [lr], #-340 @ 0xfffffeac │ │ streq lr, [lr], #-424 @ 0xfffffe58 │ │ - ldc2l 7, cr10, [ip, #872] @ 0x368 │ │ - ldc2l 7, cr2, [ip, #456] @ 0x1c8 │ │ - ldc2l 3, cr2, [fp, #900] @ 0x384 │ │ + vcadd.f32 d26, d12, d7, #270 │ │ + ldc2l 7, cr2, [ip, #636] @ 0x27c │ │ + ldc2l 4, cr2, [fp, #56] @ 0x38 │ │ streq lr, [lr], #-236 @ 0xffffff14 │ │ - ldc2l 13, cr3, [sp, #912] @ 0x390 │ │ + ldc2l 14, cr3, [sp, #68] @ 0x44 │ │ streq sp, [lr], #-4004 @ 0xfffff05c │ │ │ │ 02470db8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #124 @ 0x7c │ │ mov r4, r3 │ │ @@ -1353188,22 +1353187,22 @@ │ │ ldr r2, [fp, #12] │ │ str r1, [r2] │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 13, cr5, [sl, #812] @ 0x32c │ │ - ldc2l 6, cr14, [fp, #972] @ 0x3cc │ │ + ldc2l 13, cr5, [sl, #992] @ 0x3e0 │ │ + ldc2l 7, cr14, [fp, #128] @ 0x80 │ │ eoreq r8, lr, r8, lsl r1 │ │ - ldc2l 13, cr5, [sl, #300] @ 0x12c │ │ - ldc2l 4, cr14, [fp, #124] @ 0x7c │ │ - ldc2l 14, cr5, [sl, #988] @ 0x3dc │ │ + ldc2l 13, cr5, [sl, #480] @ 0x1e0 │ │ + ldc2l 4, cr14, [fp, #304] @ 0x130 │ │ + ldc2l 15, cr5, [sl, #144] @ 0x90 │ │ eoreq r8, lr, r8, lsr r0 │ │ - ldc2l 4, cr14, [fp, #316] @ 0x13c │ │ + ldc2l 4, cr14, [fp, #496] @ 0x1f0 │ │ │ │ 02471118 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ ldr r7, [fp, #8] │ │ mov r4, r1 │ │ mov r9, r0 │ │ @@ -1353317,16 +1353316,16 @@ │ │ ldr r0, [pc, #24] @ 24712e0 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 13, cr5, [ip, #416] @ 0x1a0 │ │ - ldc2l 13, cr5, [ip] │ │ + ldc2l 13, cr5, [ip, #596] @ 0x254 │ │ + ldc2l 13, cr5, [ip, #180] @ 0xb4 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 024712e8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d11} │ │ @@ -1354377,15 +1354376,15 @@ │ │ movw r3, #1547 @ 0x60b │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3868] @ 247327c │ │ ldr r0, [pc, r0] │ │ b 2472238 │ │ - ldc2l 3, cr4, [fp, #720] @ 0x2d0 │ │ + ldc2l 3, cr4, [fp, #900] @ 0x384 │ │ streq r0, [pc], #-548 @ 2472370 │ │ streq sp, [lr], #-2896 @ 0xfffff4b0 │ │ streq sp, [lr], #-2936 @ 0xfffff488 │ │ ldreq sl, [lr], #-3600 @ 0xfffff1f0 │ │ streq pc, [lr], #-1156 @ 0xfffffb7c │ │ streq sp, [lr], #-2676 @ 0xfffff58c │ │ streq sp, [lr], #-2652 @ 0xfffff5a4 │ │ @@ -1354440,19 +1354439,19 @@ │ │ cmp r1, r2 │ │ bcs 2472494 │ │ mov r4, r9 │ │ b 24724b8 │ │ streq sp, [lr], #-2716 @ 0xfffff564 │ │ streq sp, [lr], #-2592 @ 0xfffff5e0 │ │ streq pc, [lr], #-1048 @ 0xfffffbe8 │ │ - ldc2l 11, cr5, [ip, #348] @ 0x15c @ │ │ - ldc2l 2, cr8, [fp, #660] @ 0x294 │ │ - ldc2l 14, cr13, [ip, #144] @ 0x90 │ │ + ldc2l 11, cr5, [ip, #528] @ 0x210 @ │ │ + ldc2l 2, cr8, [fp, #840] @ 0x348 │ │ + ldc2l 14, cr13, [ip, #324] @ 0x144 │ │ streq sp, [lr], #-2660 @ 0xfffff59c │ │ - ldc2l 5, cr2, [fp, #28] │ │ + ldc2l 5, cr2, [fp, #208] @ 0xd0 │ │ streq sp, [lr], #-2604 @ 0xfffff5d4 │ │ streq sp, [lr], #-2592 @ 0xfffff5e0 │ │ streq sp, [lr], #-2524 @ 0xfffff624 │ │ streq sp, [lr], #-2512 @ 0xfffff630 │ │ streq sp, [lr], #-2448 @ 0xfffff670 │ │ streq sp, [lr], #-2440 @ 0xfffff678 │ │ streq sp, [lr], #-2384 @ 0xfffff6b0 │ │ @@ -1354538,16 +1354537,16 @@ │ │ ldreq sl, [lr], #-764 @ 0xfffffd04 │ │ ldreq r9, [lr], #-2944 @ 0xfffff480 │ │ ldreq sl, [lr], #-740 @ 0xfffffd1c │ │ ldreq r9, [lr], #-2916 @ 0xfffff49c │ │ streq r2, [pc], #-368 @ 24725e4 │ │ streq r1, [pc], #-2820 @ 24725e8 │ │ streq r1, [pc], #-2800 @ 24725ec │ │ - ldc2l 0, cr12, [sl, #148] @ 0x94 │ │ - ldc2l 9, cr5, [ip, #174] @ 0xae @ │ │ + ldc2l 0, cr12, [sl, #328] @ 0x148 │ │ + ldc2l 9, cr5, [ip, #264] @ 0x108 @ │ │ streq sp, [lr], #-1360 @ 0xfffffab0 │ │ streq r1, [pc], #-2720 @ 24725fc │ │ ldr r0, [pc, #3732] @ 2473494 │ │ mov r2, r7 │ │ movw r3, #1578 @ 0x62a │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1354587,16 +1354586,16 @@ │ │ bl 270d9c0 │ │ ldr r2, [pc, #3608] @ 24734b4 │ │ mov r1, r0 │ │ ldr r2, [pc, r2] │ │ b 2471fd8 │ │ mov r4, #3 │ │ b 247273c │ │ - ldc2l 13, cr15, [fp, #908] @ 0x38c │ │ - ldc2l 9, cr5, [ip, #30] @ │ │ + ldc2l 14, cr15, [fp, #64] @ 0x40 │ │ + ldc2l 9, cr5, [ip, #120] @ 0x78 @ │ │ streq r3, [pc], #-528 @ 24726bc │ │ streq sp, [lr], #-2092 @ 0xfffff7d4 │ │ streq sp, [lr], #-2040 @ 0xfffff808 │ │ streq r1, [pc], #-2612 @ 24726c8 │ │ streq r1, [pc], #-2616 @ 24726cc │ │ streq r1, [pc], #-2580 @ 24726d0 │ │ streq r2, [pc], #-728 @ 24726d4 │ │ @@ -1354631,24 +1354630,24 @@ │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, #157 @ 0x9d │ │ bcs 2472784 │ │ mov r6, r4 │ │ b 24727a4 │ │ streq sp, [lr], #-1764 @ 0xfffff91c │ │ - ldc2l 1, cr0, [fp, #304] @ 0x130 │ │ - ldc2l 7, cr1, [fp, #116] @ 0x74 │ │ + ldc2l 1, cr0, [fp, #484] @ 0x1e4 │ │ + ldc2l 7, cr1, [fp, #296] @ 0x128 │ │ streq sp, [lr], #-1672 @ 0xfffff978 │ │ streq r3, [pc], #-1540 @ 2472770 │ │ streq pc, [lr], #-1852 @ 0xfffff8c4 │ │ streq sp, [lr], #-1640 @ 0xfffff998 │ │ streq sp, [lr], #-1828 @ 0xfffff8dc │ │ streq sp, [lr], #-1612 @ 0xfffff9b4 │ │ - ldc2l 14, cr11, [sl, #528] @ 0x210 │ │ - ldc2l 6, cr1, [fp, #532] @ 0x214 │ │ + ldc2l 14, cr11, [sl, #708] @ 0x2c4 │ │ + ldc2l 6, cr1, [fp, #712] @ 0x2c8 │ │ ldr r0, [pc, #3392] @ 24734cc │ │ mov r2, r9 │ │ movw r3, #1560 @ 0x618 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r6, [pc, #3376] @ 24734d0 │ │ mov r1, r0 │ │ @@ -1354687,16 +1354686,16 @@ │ │ mov r2, r9 │ │ movw r3, #1567 @ 0x61f │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24726d0 │ │ streq sp, [lr], #-1652 @ 0xfffff98c │ │ - ldc2l 14, cr11, [sl, #360] @ 0x168 │ │ - ldc2l 6, cr1, [fp, #244] @ 0xf4 │ │ + ldc2l 14, cr11, [sl, #540] @ 0x21c │ │ + ldc2l 6, cr1, [fp, #424] @ 0x1a8 │ │ eoreq r7, lr, r0, lsr r7 │ │ strteq r6, [r6], #-1804 @ 0xfffff8f4 │ │ streq r3, [pc], #-1320 @ 2472854 │ │ streq sp, [lr], #-1440 @ 0xfffffa60 │ │ streq sp, [lr], #-1420 @ 0xfffffa74 │ │ ldr r0, [pc, #3952] @ 24737d0 │ │ mov r2, r7 │ │ @@ -1354741,28 +1354740,28 @@ │ │ cmp r3, #157 @ 0x9d │ │ sub r4, r1, #200 @ 0xc8 │ │ str r4, [sp, #56] @ 0x38 │ │ bcs 2472950 │ │ ldr r8, [pc, #4028] @ 24738cc │ │ add r8, pc, r8 │ │ b 24729ac │ │ - ldc2l 0, cr4, [fp, #4] │ │ - ldc2l 5, cr1, [fp, #580] @ 0x244 │ │ + ldc2l 0, cr4, [fp, #184] @ 0xb8 │ │ + ldc2l 5, cr1, [fp, #760] @ 0x2f8 │ │ streq sp, [lr], #-1328 @ 0xfffffad0 │ │ streq sp, [lr], #-1408 @ 0xfffffa80 │ │ - ldc2l 0, cr9, [sp, #728] @ 0x2d8 │ │ + ldc2l 0, cr9, [sp, #908] @ 0x38c │ │ streq sp, [lr], #-1304 @ 0xfffffae8 │ │ streq pc, [lr], #-3124 @ 0xfffff3cc │ │ streq pc, [lr], #-3040 @ 0xfffff420 │ │ streq lr, [lr], #-3828 @ 0xfffff10c │ │ ldreq fp, [lr], #-1544 @ 0xfffff9f8 │ │ streq sp, [lr], #-1356 @ 0xfffffab4 │ │ - ldc2l 13, cr7, [fp, #372] @ 0x174 │ │ - ldc2l 6, cr5, [ip, #12] │ │ - ldc2l 2, cr7, [sp, #648] @ 0x288 │ │ + ldc2l 13, cr7, [fp, #552] @ 0x228 │ │ + ldc2l 6, cr5, [ip, #192] @ 0xc0 │ │ + ldc2l 2, cr7, [sp, #828] @ 0x33c │ │ streq sp, [lr], #-1300 @ 0xfffffaec │ │ ldr r0, [pc, #3960] @ 24738d0 │ │ mov r1, r4 │ │ ldr r2, [pc, #3956] @ 24738d4 │ │ movw r3, #1589 @ 0x635 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1354812,15 +1354811,15 @@ │ │ streq sp, [lr], #-1152 @ 0xfffffb80 │ │ streq sp, [lr], #-1096 @ 0xfffffbb8 │ │ streq sp, [lr], #-1084 @ 0xfffffbc4 │ │ streq sp, [lr], #-1032 @ 0xfffffbf8 │ │ streq sp, [lr], #-1020 @ 0xfffffc04 │ │ streq sp, [lr], #-964 @ 0xfffffc3c │ │ streq sp, [lr], #-952 @ 0xfffffc48 │ │ - ldc2l 7, cr13, [ip, #244] @ 0xf4 │ │ + ldc2l 7, cr13, [ip, #424] @ 0x1a8 │ │ streq sp, [lr], #-892 @ 0xfffffc84 │ │ streq sp, [lr], #-884 @ 0xfffffc8c │ │ ldr r0, [pc, #3764] @ 24738f8 │ │ mov r1, r4 │ │ ldr r2, [pc, #3760] @ 24738fc │ │ movw r3, #1590 @ 0x636 │ │ add r0, pc, r0 │ │ @@ -1354907,53 +1354906,53 @@ │ │ cmp r3, #156 @ 0x9c │ │ vstr d16, [r2] │ │ sub r4, r1, #200 @ 0xc8 │ │ str r4, [sp, #56] @ 0x38 │ │ bhi 2472c50 │ │ str r3, [sp, #60] @ 0x3c │ │ b 2472ca8 │ │ - ldc2l 6, cr9, [ip, #884] @ 0x374 │ │ - ldc2l 4, cr5, [ip, #60] @ 0x3c │ │ + ldc2l 7, cr9, [ip, #40] @ 0x28 │ │ + ldc2l 4, cr5, [ip, #240] @ 0xf0 │ │ streq r1, [pc], #-1392 @ 2472bbc │ │ streq r0, [pc], #-1636 @ 2472bc0 │ │ streq r0, [pc], #-1628 @ 2472bc4 │ │ - vcadd.f32 , , q5, #270 │ │ - ldc2l 3, cr5, [ip, #444] @ 0x1bc │ │ + ldc2l 8, cr15, [fp, #476] @ 0x1dc │ │ + ldc2l 3, cr5, [ip, #624] @ 0x270 │ │ streq r1, [pc], #-1232 @ 2472bd0 │ │ strteq r5, [r6], #-3560 @ 0xfffff218 │ │ ldreq r8, [lr], #-1544 @ 0xfffff9f8 │ │ - ldc2l 2, cr3, [ip, #364] @ 0x16c │ │ - ldc2l 2, cr5, [ip, #812] @ 0x32c │ │ + ldc2l 2, cr3, [ip, #544] @ 0x220 │ │ + ldc2l 2, cr5, [ip, #992] @ 0x3e0 │ │ streq r1, [pc], #-1068 @ 2472be4 │ │ streq sp, [lr], #-456 @ 0xfffffe38 │ │ - ldc2l 5, cr9, [ip, #116] @ 0x74 │ │ - ldc2l 2, cr5, [ip, #316] @ 0x13c │ │ + ldc2l 5, cr9, [ip, #296] @ 0x128 │ │ + ldc2l 2, cr5, [ip, #496] @ 0x1f0 │ │ streq r1, [pc], #-944 @ 2472bf4 │ │ - ldc2l 4, cr9, [ip, #836] @ 0x344 │ │ - ldc2l 2, cr5, [ip, #12] │ │ + ldc2l 4, cr9, [ip, #1016] @ 0x3f8 │ │ + ldc2l 2, cr5, [ip, #192] @ 0xc0 │ │ streq r1, [pc], #-868 @ 2472c00 │ │ streq sp, [lr], #-292 @ 0xfffffedc │ │ strteq r6, [r6], #-400 @ 0xfffffe70 │ │ - ldc2l 6, cr15, [fp, #504] @ 0x1f8 │ │ - ldc2l 1, cr5, [ip, #652] @ 0x28c │ │ + ldc2l 6, cr15, [fp, #684] @ 0x2ac │ │ + ldc2l 1, cr5, [ip, #832] @ 0x340 │ │ streq r1, [pc], #-772 @ 2472c14 │ │ - ldc2l 6, cr15, [fp, #200] @ 0xc8 │ │ - ldc2l 1, cr5, [ip, #348] @ 0x15c │ │ + ldc2l 6, cr15, [fp, #380] @ 0x17c │ │ + ldc2l 1, cr5, [ip, #528] @ 0x210 │ │ streq r1, [pc], #-696 @ 2472c20 │ │ streq sp, [lr], #-120 @ 0xffffff88 │ │ strteq r3, [sl], #-2224 @ 0xfffff750 │ │ - ldc2l 0, cr3, [ip, #524] @ 0x20c │ │ - ldc2l 0, cr5, [ip, #972] @ 0x3cc │ │ + ldc2l 0, cr3, [ip, #704] @ 0x2c0 │ │ + ldc2l 1, cr5, [ip, #128] @ 0x80 │ │ streq r1, [pc], #-596 @ 2472c34 │ │ - ldc2l 0, cr3, [ip, #220] @ 0xdc │ │ - ldc2l 0, cr5, [ip, #668] @ 0x29c │ │ + ldc2l 0, cr3, [ip, #400] @ 0x190 │ │ + ldc2l 0, cr5, [ip, #848] @ 0x350 │ │ streq r1, [pc], #-520 @ 2472c40 │ │ streq r1, [pc], #-2108 @ 2472c44 │ │ - ldc2l 11, cr5, [sl, #740] @ 0x2e4 @ │ │ - ldc2l 0, cr5, [ip, #332] @ 0x14c │ │ + ldc2l 11, cr5, [sl, #920] @ 0x398 @ │ │ + ldc2l 0, cr5, [ip, #512] @ 0x200 │ │ ldreq r9, [lr], #-1172 @ 0xfffffb6c │ │ streq ip, [lr], #-3936 @ 0xfffff0a0 │ │ ldr r0, [pc, #3960] @ 2473bd0 │ │ mov r1, r4 │ │ ldr r2, [pc, #3956] @ 2473bd4 │ │ movw r3, #1593 @ 0x639 │ │ add r0, pc, r0 │ │ @@ -1355165,20 +1355164,20 @@ │ │ add r1, pc, r1 │ │ str r0, [sp] │ │ mov r0, r4 │ │ mov r3, r1 │ │ bl 270f740 │ │ b 2471400 │ │ streq ip, [lr], #-3904 @ 0xfffff0c0 │ │ - ldc2l 0, cr5, [ip, #28] │ │ + ldc2l 0, cr5, [ip, #208] @ 0xd0 │ │ ldreq fp, [lr], #-40 @ 0xffffffd8 │ │ streq ip, [lr], #-3852 @ 0xfffff0f4 │ │ ldreq r9, [lr], #-2964 @ 0xfffff46c │ │ streq r1, [pc], #-304 @ 2472fcc │ │ - ldc2l 8, cr15, [sl, #708] @ 0x2c4 │ │ + ldc2l 8, cr15, [sl, #888] @ 0x378 │ │ ldr r0, [pc, #3416] @ 2473d2c │ │ movw r3, #1507 @ 0x5e3 │ │ ldr r2, [pc, #3412] @ 2473d30 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #3400] @ 2473d34 │ │ @@ -1355203,15 +1355202,15 @@ │ │ sub r3, r0, #1 │ │ add r2, r0, r0, lsl #1 │ │ b 2471c04 │ │ ldreq r9, [lr], #-1632 @ 0xfffff9a0 │ │ streq r1, [pc], #-236 @ 2473048 │ │ streq ip, [lr], #-3736 @ 0xfffff168 │ │ streq ip, [lr], #-3736 @ 0xfffff168 │ │ - ldc2l 4, cr3, [sl, #760] @ 0x2f8 │ │ + ldc2l 4, cr3, [sl, #940] @ 0x3ac │ │ streq r1, [pc], #-136 @ 2473058 │ │ streq ip, [lr], #-3648 @ 0xfffff1c0 │ │ ldr r0, [pc, #3300] @ 2473d44 │ │ movw r3, #1508 @ 0x5e4 │ │ ldr r2, [pc, #3296] @ 2473d48 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1355235,15 +1355234,15 @@ │ │ mov r1, r0 │ │ ldr r0, [pc, #4040] @ 2474084 │ │ ldr r0, [pc, r0] │ │ sub r3, r0, #1 │ │ add r2, r0, r0, lsl #1 │ │ b 2471ca4 │ │ streq r2, [pc], #-3332 @ 24730d0 │ │ - ldc2l 4, cr3, [sl, #392] @ 0x188 │ │ + ldc2l 4, cr3, [sl, #572] @ 0x23c │ │ streq r2, [pc], #-3268 @ 24730d8 │ │ streq ip, [lr], #-3536 @ 0xfffff230 │ │ streq r1, [pc], #-4 @ 24730e0 │ │ streq lr, [lr], #-1840 @ 0xfffff8d0 │ │ ldr r0, [pc, #4000] @ 2474088 │ │ movw r3, #1509 @ 0x5e5 │ │ ldr r2, [pc, #3996] @ 247408c │ │ @@ -1355268,21 +1355267,21 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #3928] @ 247409c │ │ ldr r0, [pc, r0] │ │ sub r3, r0, #1 │ │ add r2, r0, r0, lsl #1 │ │ b 2471d48 │ │ - ldc2l 3, cr3, [sl, #968] @ 0x3c8 │ │ + ldc2l 4, cr3, [sl, #124] @ 0x7c │ │ streq ip, [lr], #-3484 @ 0xfffff264 │ │ streq r2, [pc], #-3144 @ 2473160 │ │ ldreq r8, [lr], #-4064 @ 0xfffff020 │ │ streq lr, [lr], #-1712 @ 0xfffff950 │ │ streq r0, [pc], #-3940 @ 247316c │ │ - ldc2l 6, cr15, [sl, #916] @ 0x394 │ │ + ldc2l 7, cr15, [sl, #72] @ 0x48 │ │ ldreq r9, [lr], #-1172 @ 0xfffffb6c │ │ streq ip, [lr], #-3300 @ 0xfffff31c │ │ streq r0, [pc], #-3856 @ 247317c │ │ streq r2, [pc], #-2968 @ 2473180 │ │ ldr r0, [pc, #3868] @ 24740a0 │ │ ldr r2, [pc, #3868] @ 24740a4 │ │ ldr r3, [pc, #3868] @ 24740a8 │ │ @@ -1355335,26 +1355334,26 @@ │ │ mov r3, #35 @ 0x23 │ │ add r1, pc, r1 │ │ bl 270d9f0 │ │ b 2473884 │ │ streq lr, [lr], #-1576 @ 0xfffff9d8 │ │ streq ip, [lr], #-3228 @ 0xfffff364 │ │ streq ip, [lr], #-3212 @ 0xfffff374 │ │ - ldc2l 6, cr15, [sl, #148] @ 0x94 │ │ + ldc2l 6, cr15, [sl, #328] @ 0x148 │ │ streq ip, [lr], #-3124 @ 0xfffff3cc │ │ ldreq r9, [lr], #-968 @ 0xfffffc38 │ │ streq ip, [lr], #-3096 @ 0xfffff3e8 │ │ streq ip, [lr], #-3084 @ 0xfffff3f4 │ │ streq ip, [lr], #-3048 @ 0xfffff418 │ │ streq r0, [pc], #-3616 @ 247327c │ │ - ldc2l 2, cr3, [sl, #104] @ 0x68 │ │ + ldc2l 2, cr3, [sl, #284] @ 0x11c │ │ streq r0, [pc], #-3556 @ 2473284 │ │ streq lr, [lr], #-1232 @ 0xfffffb30 │ │ streq r0, [pc], #-3460 @ 247328c │ │ - ldc2l 5, cr15, [sl, #20] │ │ + ldc2l 5, cr15, [sl, #200] @ 0xc8 │ │ streq r0, [pc], #-3416 @ 2473294 │ │ ldreq r8, [lr], #-3476 @ 0xfffff26c │ │ ldreq r9, [lr], #-668 @ 0xfffffd64 │ │ streq ip, [lr], #-2796 @ 0xfffff514 │ │ streq ip, [lr], #-2784 @ 0xfffff520 │ │ ldr r2, [pc, #4076] @ 2474294 │ │ mov r4, #32 │ │ @@ -1355464,42 +1355463,42 @@ │ │ mov r3, #32 │ │ add r1, pc, r1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3864] @ 2474370 │ │ add r0, pc, r0 │ │ mov r1, #25 │ │ b 2473890 │ │ - ldc2l 0, cr3, [sl, #776] @ 0x308 │ │ + ldc2l 0, cr3, [sl, #956] @ 0x3bc │ │ streq r0, [pc], #-3212 @ 247346c │ │ streq ip, [lr], #-2656 @ 0xfffff5a0 │ │ streq r2, [pc], #-2316 @ 2473474 │ │ - ldc2l 3, cr15, [sl, #916] @ 0x394 │ │ + ldc2l 4, cr15, [sl, #72] @ 0x48 │ │ ldreq r9, [lr], #-404 @ 0xfffffe6c │ │ streq ip, [lr], #-2532 @ 0xfffff61c │ │ streq r0, [pc], #-3072 @ 2473484 │ │ ldreq sl, [lr], #-2724 @ 0xfffff55c │ │ streq lr, [lr], #-788 @ 0xfffffcec │ │ ldreq sl, [lr], #-2656 @ 0xfffff5a0 │ │ streq ip, [lr], #-2404 @ 0xfffff69c │ │ streq lr, [lr], #-2412 @ 0xfffff694 │ │ - ldc2l 0, cr11, [sl, #820] @ 0x334 │ │ + ldc2l 0, cr11, [sl, #1000] @ 0x3e8 │ │ streq lr, [lr], #-2308 @ 0xfffff6fc │ │ streq ip, [lr], #-2260 @ 0xfffff72c │ │ ldreq r8, [lr], #-2904 @ 0xfffff4a8 │ │ streq lr, [lr], #-648 @ 0xfffffd78 │ │ streq ip, [lr], #-2204 @ 0xfffff764 │ │ ldreq r9, [lr], #-2920 @ 0xfffff498 │ │ - ldc2l 12, cr10, [ip, #312] @ 0x138 │ │ + ldc2l 12, cr10, [ip, #492] @ 0x1ec │ │ streq ip, [lr], #-2140 @ 0xfffff7a4 │ │ streq r2, [pc], #-1780 @ 24734c0 │ │ streq ip, [lr], #-2080 @ 0xfffff7e0 │ │ streq ip, [lr], #-2020 @ 0xfffff81c │ │ streq ip, [lr], #-2004 @ 0xfffff82c │ │ streq r0, [pc], #-2560 @ 24734d0 │ │ - ldc2l 1, cr15, [sl, #308] @ 0x134 │ │ + ldc2l 1, cr15, [sl, #488] @ 0x1e8 │ │ streq ip, [lr], #-1884 @ 0xfffff8a4 │ │ ldreq r8, [lr], #-3828 @ 0xfffff10c │ │ streq ip, [lr], #-1860 @ 0xfffff8bc │ │ ldr r0, [pc, #3568] @ 24742d4 │ │ ldr r1, [pc, #3568] @ 24742d8 │ │ ldr r3, [pc, #3568] @ 24742dc │ │ add r0, pc, r0 │ │ @@ -1355683,16 +1355682,16 @@ │ │ mov r1, #23 │ │ add r0, pc, r0 │ │ b 2473890 │ │ streq ip, [lr], #-1852 @ 0xfffff8c4 │ │ streq r0, [pc], #-2408 @ 24737c8 │ │ streq ip, [lr], #-1804 @ 0xfffff8f4 │ │ streq r0, [pc], #-2372 @ 24737d0 │ │ - ldc2l 13, cr2, [sl, #248] @ 0xf8 │ │ - ldc2l 2, cr5, [sl, #864] @ 0x360 │ │ + ldc2l 13, cr2, [sl, #428] @ 0x1ac │ │ + ldc2l 3, cr5, [sl, #20] │ │ ldreq r8, [lr], #-2328 @ 0xfffff6e8 │ │ streq lr, [lr], #-72 @ 0xffffffb8 │ │ streq ip, [lr], #-1632 @ 0xfffff9a0 │ │ ldc2l 11, cr13, [sp, #940] @ 0x3ac @ │ │ ldr r4, [pc, #2700] @ 2474278 │ │ mov r3, #1 │ │ ldr r1, [pc, #2696] @ 247427c │ │ @@ -1355748,39 +1355747,39 @@ │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ streq ip, [lr], #-1592 @ 0xfffff9c8 │ │ mov sl, r5 │ │ mov r4, #2 │ │ b 2473950 │ │ streq r0, [pc], #-2132 @ 24738d0 │ │ streq pc, [lr], #-2420 @ 0xfffff68c │ │ - ldc2l 2, cr4, [sp, #268] @ 0x10c │ │ - ldc2l 6, cr4, [ip, #428] @ 0x1ac │ │ + ldc2l 2, cr4, [sp, #448] @ 0x1c0 │ │ + ldc2l 6, cr4, [ip, #608] @ 0x260 │ │ streq r0, [pc], #-1996 @ 24738e0 │ │ streq pc, [lr], #-2304 @ 0xfffff700 │ │ - ldc2l 12, cr10, [fp, #624] @ 0x270 │ │ - ldc2l 6, cr4, [ip, #188] @ 0xbc │ │ + ldc2l 12, cr10, [fp, #804] @ 0x324 │ │ + ldc2l 6, cr4, [ip, #368] @ 0x170 │ │ ldreq sl, [lr], #-1648 @ 0xfffff990 │ │ strteq r5, [r6], #-248 @ 0xffffff08 │ │ streq lr, [lr], #-1364 @ 0xfffffaac │ │ streq r0, [pc], #-1888 @ 24738fc │ │ - ldc2l 2, cr0, [sp, #948] @ 0x3b4 │ │ - ldc2l 5, cr4, [ip, #508] @ 0x1fc │ │ + ldc2l 3, cr0, [sp, #104] @ 0x68 │ │ + ldc2l 5, cr4, [ip, #688] @ 0x2b0 │ │ streq r0, [pc], #-1760 @ 2473908 │ │ - ldc2l 7, cr0, [ip, #1016] @ 0x3f8 │ │ - ldc2l 5, cr4, [ip, #284] @ 0x11c │ │ + vcadd.f32 d16, d12, d27, #270 │ │ + ldc2l 5, cr4, [ip, #464] @ 0x1d0 │ │ strteq r7, [r2], #-2760 @ 0xfffff538 │ │ strteq r5, [r6], #-644 @ 0xfffffd7c │ │ streq sp, [lr], #-3620 @ 0xfffff1dc │ │ strteq r4, [r6], #-4068 @ 0xfffff01c │ │ streq r0, [pc], #-1644 @ 2473924 │ │ - ldc2l 0, cr5, [sl, #208] @ 0xd0 │ │ - ldc2l 4, cr4, [ip, #796] @ 0x31c │ │ + ldc2l 0, cr5, [sl, #388] @ 0x184 │ │ + ldc2l 4, cr4, [ip, #976] @ 0x3d0 │ │ streq r0, [pc], #-1576 @ 2473930 │ │ - ldc2l 11, cr10, [fp, #16] @ │ │ - ldc2l 4, cr4, [ip, #588] @ 0x24c │ │ + ldc2l 11, cr10, [fp, #196] @ 0xc4 @ │ │ + ldc2l 4, cr4, [ip, #768] @ 0x300 │ │ strteq r5, [r6], #-1116 @ 0xfffffba4 │ │ strteq r2, [sl], #-2464 @ 0xfffff660 │ │ streq lr, [lr], #-952 @ 0xfffffc48 │ │ streq ip, [lr], #-948 @ 0xfffffc4c │ │ streq r0, [pc], #-1468 @ 247394c │ │ add r4, r0, #1 │ │ mov sl, r5 │ │ @@ -1355940,18 +1355939,18 @@ │ │ mov r0, r4 │ │ str r1, [sp, #60] @ 0x3c │ │ add r1, sp, #60 @ 0x3c │ │ bl 270da90 │ │ ldr r0, [pc, #2152] @ 2474434 │ │ add r0, pc, r0 │ │ b 2473458 │ │ - ldc2l 15, cr3, [sp, #268] @ 0x10c │ │ - ldc2l 3, cr4, [ip, #428] @ 0x1ac │ │ + ldc2l 15, cr3, [sp, #448] @ 0x1c0 │ │ + ldc2l 3, cr4, [ip, #608] @ 0x260 │ │ streq r0, [pc], #-1228 @ 2473be0 │ │ - ldc2l 9, cr10, [fp, #320] @ 0x140 @ │ │ + ldc2l 9, cr10, [fp, #410] @ 0x19a @ │ │ ldr r0, [pc, #2128] @ 2474438 │ │ ldr r1, [pc, #2128] @ 247443c │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270f750 │ │ ldr r0, [pc, #2116] @ 2474440 │ │ ldr r0, [pc, r0] │ │ @@ -1355989,34 +1355988,34 @@ │ │ ldr r2, [pc, #2028] @ 247446c │ │ add r2, pc, r2 │ │ add r2, r2, r1, lsl #3 │ │ vstr d8, [r2] │ │ ldr r4, [pc, #2016] @ 2474470 │ │ ldr r4, [pc, r4] │ │ b 2473d94 │ │ - ldc2l 3, cr4, [ip, #204] @ 0xcc │ │ + ldc2l 3, cr4, [ip, #384] @ 0x180 │ │ ldreq r9, [lr], #-1316 @ 0xfffffadc │ │ ldreq sl, [lr], #-880 @ 0xfffffc90 │ │ strteq r4, [r6], #-3576 @ 0xfffff208 │ │ strteq r5, [r6], #-716 @ 0xfffffd34 │ │ streq r0, [pc], #-1116 @ 2473cb0 │ │ - ldc2l 0, cr0, [sp, #148] @ 0x94 │ │ - ldc2l 2, cr4, [ip, #732] @ 0x2dc │ │ + ldc2l 0, cr0, [sp, #328] @ 0x148 │ │ + ldc2l 2, cr4, [ip, #912] @ 0x390 │ │ streq r0, [pc], #-1048 @ 2473cbc │ │ - ldc2l 5, cr0, [ip, #232] @ 0xe8 │ │ - ldc2l 2, cr4, [ip, #524] @ 0x20c │ │ + ldc2l 5, cr0, [ip, #412] @ 0x19c │ │ + ldc2l 2, cr4, [ip, #704] @ 0x2c0 │ │ ldreq r8, [lr], #-3628 @ 0xfffff1d4 │ │ strteq r4, [r6], #-4032 @ 0xfffff040 │ │ strteq r2, [sl], #-2548 @ 0xfffff60c │ │ streq r0, [pc], #-948 @ 2473cd4 │ │ - ldc2l 13, cr4, [sl, #496] @ 0x1f0 │ │ - ldc2l 2, cr4, [ip, #60] @ 0x3c │ │ + ldc2l 13, cr4, [sl, #676] @ 0x2a4 │ │ + ldc2l 2, cr4, [ip, #240] @ 0xf0 │ │ streq r0, [pc], #-880 @ 2473ce0 │ │ - vcadd.f32 q13, , q6, #270 │ │ - ldc2l 1, cr4, [ip, #876] @ 0x36c │ │ + ldc2l 8, cr10, [fp, #484] @ 0x1e4 │ │ + ldc2l 2, cr4, [ip, #32] │ │ ldreq r9, [lr], #-972 @ 0xfffffc34 │ │ streq r0, [pc], #-2428 @ 2473cf0 │ │ strteq r4, [r6], #-3164 @ 0xfffff3a4 │ │ streq ip, [lr], #-192 @ 0xffffff40 │ │ strteq r5, [r6], #-284 @ 0xfffffee4 │ │ strteq r2, [sl], #-1540 @ 0xfffff9fc │ │ streq r0, [pc], #-2188 @ 2473d04 │ │ @@ -1356027,22 +1356026,22 @@ │ │ strteq r2, [sl], #-1432 @ 0xfffffa68 │ │ ldreq sl, [lr], #-12 │ │ streq r0, [pc], #-2080 @ 2473d20 │ │ streq r0, [pc], #-2084 @ 2473d24 │ │ streq fp, [lr], #-3800 @ 0xfffff128 │ │ eoreq r6, lr, r4, lsr r0 │ │ eoreq r6, lr, r4, lsr r0 │ │ - ldc2l 2, cr8, [ip, #772] @ 0x304 │ │ - ldc2l 15, cr3, [ip, #972] @ 0x3cc │ │ + ldc2l 2, cr8, [ip, #952] @ 0x3b8 │ │ + ldc2l 0, cr4, [ip, #128] @ 0x80 │ │ streq r0, [pc], #-340 @ 2473d3c │ │ - ldc2l 2, cr8, [ip, #516] @ 0x204 │ │ - ldc2l 15, cr3, [ip, #716] @ 0x2cc │ │ + ldc2l 2, cr8, [ip, #696] @ 0x2b8 │ │ + ldc2l 15, cr3, [ip, #896] @ 0x380 │ │ streq r0, [pc], #-276 @ 2473d48 │ │ - ldc2l 4, cr14, [fp, #264] @ 0x108 │ │ - ldc2l 15, cr3, [ip, #412] @ 0x19c │ │ + ldc2l 4, cr14, [fp, #444] @ 0x1bc │ │ + ldc2l 15, cr3, [ip, #592] @ 0x250 │ │ streq r0, [pc], #-200 @ 2473d54 │ │ ldr r0, [pc, #1820] @ 2474474 │ │ movw r3, #1473 @ 0x5c1 │ │ ldr r2, [pc, #1816] @ 2474478 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1356239,34 +1356238,34 @@ │ │ add r2, pc, r2 │ │ add r0, pc, r0 │ │ add r2, r2, r3, lsl #3 │ │ add r1, pc, r1 │ │ bl 270e090 │ │ ldr r6, [sp, #16] │ │ b 2471694 │ │ - ldc2l 4, cr14, [fp, #8] │ │ - ldc2l 15, cr3, [ip, #156] @ 0x9c │ │ + ldc2l 4, cr14, [fp, #188] @ 0xbc │ │ + ldc2l 15, cr3, [ip, #336] @ 0x150 │ │ streq r0, [pc], #-136 @ 247408c │ │ - ldc2l 14, cr1, [ip, #444] @ 0x1bc │ │ - ldc2l 14, cr3, [ip, #892] @ 0x37c │ │ + ldc2l 14, cr1, [ip, #624] @ 0x270 │ │ + ldc2l 15, cr3, [ip, #48] @ 0x30 │ │ streq r0, [pc], #-64 @ 2474098 │ │ - ldc2l 14, cr1, [ip, #188] @ 0xbc │ │ - ldc2l 14, cr3, [ip, #636] @ 0x27c │ │ + ldc2l 14, cr1, [ip, #368] @ 0x170 │ │ + ldc2l 14, cr3, [ip, #816] @ 0x330 │ │ streq r0, [pc], #-0 @ 24740a4 │ │ eoreq r5, lr, ip, lsr lr │ │ streq r1, [pc], #-1864 @ 24740ac │ │ ldreq r9, [lr], #-1668 @ 0xfffff97c │ │ streq fp, [lr], #-3272 @ 0xfffff338 │ │ ldreq r9, [lr], #-3660 @ 0xfffff1b4 │ │ ldreq r9, [lr], #-1644 @ 0xfffff994 │ │ - ldc2l 6, cr0, [fp, #24] │ │ + ldc2l 6, cr0, [fp, #204] @ 0xcc │ │ streq fp, [lr], #-3184 @ 0xfffff390 │ │ ldreq r9, [lr], #-1604 @ 0xfffff9bc │ │ - ldc2l 12, cr15, [sl, #724] @ 0x2d4 │ │ - ldc2l 5, cr4, [fp, #796] @ 0x31c │ │ + ldc2l 12, cr15, [sl, #904] @ 0x388 │ │ + ldc2l 5, cr4, [fp, #976] @ 0x3d0 │ │ ldreq r9, [lr], #-1516 @ 0xfffffa14 │ │ ldreq r9, [lr], #-3516 @ 0xfffff244 │ │ ldr r0, [pc, #948] @ 2474490 │ │ movw r3, #1474 @ 0x5c2 │ │ ldr r2, [pc, #944] @ 2474494 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1356366,44 +1356365,44 @@ │ │ ldr r2, [pc, #712] @ 247452c │ │ movw r3, #1481 @ 0x5c9 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r3, r0 │ │ b 2473e14 │ │ - ldc2l 6, cr15, [sl, #820] @ 0x334 │ │ + ldc2l 6, cr15, [sl, #1000] @ 0x3e8 │ │ ldrdeq r5, [lr], -r0 @ │ │ ldreq r9, [lr], #-56 @ 0xffffffc8 │ │ - ldc2l 8, cr13, [ip, #456] @ 0x1c8 │ │ + ldc2l 8, cr13, [ip, #636] @ 0x27c │ │ ldreq r9, [lr], #-1964 @ 0xfffff854 │ │ - ldc2l 2, cr3, [sp, #856] @ 0x358 │ │ + ldc2l 3, cr3, [sp, #12] │ │ ldc2l 14, cr10, [sp, #444] @ 0x1bc │ │ streq lr, [lr], #-832 @ 0xfffffcc0 │ │ streq fp, [lr], #-3096 @ 0xfffff3e8 │ │ eoreq r5, lr, ip, lsl #26 │ │ strteq r4, [r6], #-3300 @ 0xfffff31c │ │ streq lr, [lr], #-792 @ 0xfffffce8 │ │ streq fp, [lr], #-2920 @ 0xfffff498 │ │ - ldc2l 1, cr12, [fp, #1016] @ 0x3f8 │ │ - ldc2l 11, cr15, [sl, #660] @ 0x294 @ │ │ + ldc2l 2, cr12, [fp, #172] @ 0xac │ │ + ldc2l 11, cr15, [sl, #840] @ 0x348 @ │ │ streq fp, [lr], #-3092 @ 0xfffff3ec │ │ - ldc2l 12, cr3, [ip, #572] @ 0x23c │ │ - ldc2l 11, cr15, [sl, #340] @ 0x154 @ │ │ + ldc2l 12, cr3, [ip, #752] @ 0x2f0 │ │ + ldc2l 11, cr15, [sl, #520] @ 0x208 @ │ │ streq fp, [lr], #-2784 @ 0xfffff520 │ │ - ldc2l 11, cr15, [sl, #196] @ 0xc4 @ │ │ + ldc2l 11, cr15, [sl, #376] @ 0x178 @ │ │ eoreq r5, lr, r4, lsr #24 │ │ strteq r4, [r6], #-3068 @ 0xfffff404 │ │ streq fp, [lr], #-2704 @ 0xfffff570 │ │ streq fp, [lr], #-2536 @ 0xfffff618 │ │ ldrdeq r5, [lr], -ip @ │ │ strteq r4, [r6], #-2740 @ 0xfffff54c │ │ streq fp, [lr], #-2376 @ 0xfffff6b8 │ │ streq lr, [lr], #-140 @ 0xffffff74 │ │ streq fp, [lr], #-2360 @ 0xfffff6c8 │ │ - ldc2l 7, cr15, [ip, #1012] @ 0x3f4 │ │ + vcadd.f32 d31, d12, d26, #270 │ │ eoreq r5, lr, r4, lsl #21 │ │ streq fp, [lr], #-2548 @ 0xfffff60c │ │ streq lr, [lr], #-3340 @ 0xfffff2f4 │ │ streq fp, [lr], #-2252 @ 0xfffff734 │ │ ldc2l 14, cr12, [sp, #1000] @ 0x3e8 │ │ eoreq r5, lr, ip, lsl sl │ │ streq fp, [lr], #-2388 @ 0xfffff6ac │ │ @@ -1356417,75 +1356416,75 @@ │ │ ldreq r8, [lr], #-1304 @ 0xfffffae8 │ │ streq fp, [lr], #-2028 @ 0xfffff814 │ │ ldreq r9, [lr], #-2332 @ 0xfffff6e4 │ │ ldc2l 0, cr11, [sp, #544] @ 0x220 │ │ streq lr, [lr], #-3040 @ 0xfffff420 │ │ streq fp, [lr], #-2172 @ 0xfffff784 │ │ streq fp, [lr], #-2036 @ 0xfffff80c │ │ - ldc2l 2, cr0, [fp, #856] @ 0x358 │ │ + ldc2l 3, cr0, [fp, #12] │ │ streq fp, [lr], #-2112 @ 0xfffff7c0 │ │ streq fp, [lr], #-2804 @ 0xfffff50c │ │ streq fp, [lr], #-2668 @ 0xfffff594 │ │ strteq r4, [r6], #-3008 @ 0xfffff440 │ │ streq sp, [lr], #-2848 @ 0xfffff4e0 │ │ streq fp, [lr], #-2644 @ 0xfffff5ac │ │ - ldc2l 5, cr2, [fp, #36] @ 0x24 │ │ - ldc2l 10, cr15, [sl, #612] @ 0x264 @ │ │ + ldc2l 5, cr2, [fp, #216] @ 0xd8 │ │ + ldc2l 10, cr15, [sl, #792] @ 0x318 @ │ │ streq fp, [lr], #-2616 @ 0xfffff5c8 │ │ streq fp, [lr], #-2696 @ 0xfffff578 │ │ - ldc2l 11, cr3, [ip, #616] @ 0x268 @ │ │ + ldc2l 11, cr3, [ip, #796] @ 0x31c @ │ │ streq fp, [lr], #-2084 @ 0xfffff7dc │ │ streq fp, [lr], #-1972 @ 0xfffff84c │ │ eoreq r5, lr, r4, lsr #17 │ │ strteq r4, [r6], #-2176 @ 0xfffff780 │ │ streq sp, [lr], #-340 @ 0xfffffeac │ │ strteq r4, [r6], #-876 @ 0xfffffc94 │ │ - ldc2l 13, cr11, [fp, #736] @ 0x2e0 │ │ - ldc2l 7, cr15, [sl, #308] @ 0x134 │ │ + ldc2l 13, cr11, [fp, #916] @ 0x394 │ │ + ldc2l 7, cr15, [sl, #488] @ 0x1e8 │ │ streq fp, [lr], #-1984 @ 0xfffff840 │ │ eoreq r5, lr, ip, lsr r8 │ │ strteq r4, [r6], #-780 @ 0xfffffcf4 │ │ - ldc2l 0, cr8, [sl, #632] @ 0x278 │ │ + ldc2l 0, cr8, [sl, #812] @ 0x32c │ │ streq fp, [lr], #-1500 @ 0xfffffa24 │ │ streq fp, [lr], #-1280 @ 0xfffffb00 │ │ eoreq r5, lr, r4, ror #12 │ │ ldreq r8, [lr], #-536 @ 0xfffffde8 │ │ streq fp, [lr], #-1504 @ 0xfffffa20 │ │ ldreq r8, [lr], #-500 @ 0xfffffe0c │ │ ldreq r9, [lr], #-1532 @ 0xfffffa04 │ │ streq fp, [lr], #-1196 @ 0xfffffb54 │ │ - ldc2l 11, cr9, [fp, #988] @ 0x3dc @ │ │ + ldc2l 12, cr9, [fp, #144] @ 0x90 │ │ streq fp, [lr], #-1136 @ 0xfffffb90 │ │ ldrdeq r5, [lr], -r8 @ │ │ streq lr, [lr], #-2168 @ 0xfffff788 │ │ streq sp, [lr], #-3060 @ 0xfffff40c │ │ streq fp, [lr], #-1080 @ 0xfffffbc8 │ │ - ldc2l 0, cr1, [sp, #300] @ 0x12c │ │ + ldc2l 0, cr1, [sp, #480] @ 0x1e0 │ │ streq fp, [lr], #-1024 @ 0xfffffc00 │ │ eoreq r5, lr, r8, ror #10 │ │ streq lr, [lr], #-2060 @ 0xfffff7f4 │ │ streq lr, [lr], #-452 @ 0xfffffe3c │ │ streq fp, [lr], #-968 @ 0xfffffc38 │ │ - ldc2l 13, cr7, [sl, #808] @ 0x328 │ │ + ldc2l 13, cr7, [sl, #988] @ 0x3dc │ │ streq fp, [lr], #-912 @ 0xfffffc70 │ │ strdeq r5, [lr], -r8 @ │ │ streq r1, [pc], #-752 @ 2474408 │ │ streq pc, [lr], #-1652 @ 0xfffff98c │ │ streq lr, [lr], #-1912 @ 0xfffff888 │ │ streq lr, [lr], #-1908 @ 0xfffff88c │ │ streq r1, [pc], #-696 @ 2474418 │ │ ldreq r7, [lr], #-2300 @ 0xfffff704 │ │ - ldc2l 10, cr9, [fp, #540] @ 0x21c @ │ │ - ldc2l 5, cr11, [ip, #128] @ 0x80 │ │ - ldc2l 3, cr15, [sl, #372] @ 0x174 │ │ + ldc2l 10, cr9, [fp, #720] @ 0x2d0 @ │ │ + ldc2l 5, cr11, [ip, #308] @ 0x134 │ │ + ldc2l 3, cr15, [sl, #552] @ 0x228 │ │ ldreq r7, [lr], #-2216 @ 0xfffff758 │ │ streq lr, [lr], #-1772 @ 0xfffff914 │ │ streq lr, [lr], #-1768 @ 0xfffff918 │ │ streq r1, [pc], #-552 @ 2474438 │ │ - ldc2l 3, cr1, [ip, #484] @ 0x1e4 │ │ + ldc2l 3, cr1, [ip, #664] @ 0x298 │ │ ldreq r7, [lr], #-1456 @ 0xfffffa50 │ │ streq fp, [lr], #-848 @ 0xfffffcb0 │ │ streq fp, [lr], #-836 @ 0xfffffcbc │ │ strhteq r5, [lr], -r0 │ │ ldreq r7, [lr], #-3324 @ 0xfffff304 │ │ ldreq r7, [lr], #-1408 @ 0xfffffa80 │ │ ldreq r7, [lr], #-3300 @ 0xfffff31c │ │ @@ -1356493,97 +1356492,97 @@ │ │ streq pc, [lr], #-2924 @ 0xfffff494 │ │ strteq r1, [sl], #-2860 @ 0xfffff4d4 │ │ streq pc, [lr], #-1276 @ 0xfffffb04 │ │ streq r1, [pc], #-364 @ 247446c │ │ streq pc, [lr], #-1240 @ 0xfffffb28 │ │ streq r0, [pc], #-3172 @ 2474474 │ │ streq ip, [lr], #-3020 @ 0xfffff434 │ │ - ldc2l 7, cr13, [fp, #268] @ 0x10c │ │ - ldc2l 2, cr3, [ip, #444] @ 0x1bc │ │ + ldc2l 7, cr13, [fp, #448] @ 0x1c0 │ │ + ldc2l 2, cr3, [ip, #624] @ 0x270 │ │ streq r0, [pc], #-2932 @ 2474484 │ │ streq pc, [lr], #-964 @ 0xfffffc3c │ │ streq ip, [lr], #-2764 @ 0xfffff534 │ │ streq sl, [lr], #-3648 @ 0xfffff1c0 │ │ ldreq r7, [lr], #-1664 @ 0xfffff980 │ │ - ldc2l 5, cr9, [sl, #740] @ 0x2e4 │ │ - ldc2l 14, cr2, [ip, #940] @ 0x3ac │ │ + ldc2l 5, cr9, [sl, #920] @ 0x398 │ │ + ldc2l 15, cr2, [ip, #96] @ 0x60 │ │ streq sl, [lr], #-2792 @ 0xfffff518 │ │ streq pc, [lr], #-68 @ 0xffffffbc │ │ ldreq r7, [lr], #-792 @ 0xfffffce8 │ │ ldreq r7, [lr], #-1656 @ 0xfffff988 │ │ ldreq r9, [lr], #-476 @ 0xfffffe24 │ │ - ldc2l 10, cr3, [sl, #68] @ 0x44 @ │ │ - ldc2l 14, cr2, [ip, #684] @ 0x2ac │ │ + ldc2l 10, cr3, [sl, #248] @ 0xf8 @ │ │ + ldc2l 14, cr2, [ip, #864] @ 0x360 │ │ ldreq r7, [lr], #-760 @ 0xfffffd08 │ │ streq pc, [lr], #-4 │ │ ldreq r8, [lr], #-3660 @ 0xfffff1b4 │ │ ldreq r7, [lr], #-2264 @ 0xfffff728 │ │ streq lr, [lr], #-1192 @ 0xfffffb58 │ │ - ldc2l 7, cr13, [sl, #500] @ 0x1f4 │ │ - ldc2l 14, cr2, [ip, #428] @ 0x1ac │ │ + ldc2l 7, cr13, [sl, #680] @ 0x2a8 │ │ + ldc2l 14, cr2, [ip, #608] @ 0x260 │ │ ldreq r7, [lr], #-1324 @ 0xfffffad4 │ │ streq lr, [lr], #-4036 @ 0xfffff03c │ │ streq lr, [lr], #-236 @ 0xffffff14 │ │ strteq r3, [r6], #-3292 @ 0xfffff324 │ │ streq lr, [lr], #-1176 @ 0xfffffb68 │ │ - ldc2l 4, cr9, [fp, #608] @ 0x260 │ │ - ldc2l 14, cr2, [ip, #172] @ 0xac │ │ + ldc2l 4, cr9, [fp, #788] @ 0x314 │ │ + ldc2l 14, cr2, [ip, #352] @ 0x160 │ │ strteq r3, [r6], #-2308 @ 0xfffff6fc │ │ streq lr, [lr], #-3972 @ 0xfffff07c │ │ streq lr, [lr], #-176 @ 0xffffff50 │ │ strteq r3, [r6], #-3896 @ 0xfffff0c8 │ │ streq r0, [pc], #-4052 @ 2474504 │ │ - ldc2l 0, cr15, [fp, #648] @ 0x288 │ │ - ldc2l 13, cr2, [ip, #940] @ 0x3ac │ │ + ldc2l 0, cr15, [fp, #828] @ 0x33c │ │ + ldc2l 14, cr2, [ip, #96] @ 0x60 │ │ strteq r3, [r6], #-2872 @ 0xfffff4c8 │ │ streq lr, [lr], #-3908 @ 0xfffff0bc │ │ streq r0, [pc], #-3012 @ 2474518 │ │ strteq r1, [sl], #-1772 @ 0xfffff914 │ │ - ldc2l 4, cr9, [fp, #112] @ 0x70 │ │ - ldc2l 13, cr2, [ip, #684] @ 0x2ac │ │ + ldc2l 4, cr9, [fp, #292] @ 0x124 │ │ + ldc2l 13, cr2, [ip, #864] @ 0x360 │ │ strteq r1, [sl], #-712 @ 0xfffffd38 │ │ streq lr, [lr], #-3844 @ 0xfffff0fc │ │ - ldc2l 0, cr7, [ip, #212] @ 0xd4 │ │ - ldc2l 13, cr2, [ip, #412] @ 0x19c │ │ + ldc2l 0, cr7, [ip, #392] @ 0x188 │ │ + ldc2l 13, cr2, [ip, #592] @ 0x250 │ │ streq pc, [lr], #-3072 @ 0xfffff400 │ │ streq fp, [lr], #-284 @ 0xfffffee4 │ │ eoreq r5, lr, r0, lsr #3 │ │ streq pc, [lr], #-776 @ 0xfffffcf8 │ │ - ldc2l 6, cr13, [fp, #264] @ 0x108 │ │ - ldc2l 1, cr3, [ip, #412] @ 0x19c │ │ + ldc2l 6, cr13, [fp, #444] @ 0x1bc │ │ + ldc2l 1, cr3, [ip, #592] @ 0x250 │ │ streq lr, [lr], #-1032 @ 0xfffffbf8 │ │ streq fp, [lr], #-132 @ 0xffffff7c │ │ eoreq r5, lr, r0, asr #2 │ │ streq pc, [lr], #-680 @ 0xfffffd58 │ │ - ldc2l 0, cr1, [ip, #620] @ 0x26c │ │ - ldc2l 1, cr3, [ip, #44] @ 0x2c │ │ + ldc2l 0, cr1, [ip, #800] @ 0x320 │ │ + ldc2l 1, cr3, [ip, #224] @ 0xe0 │ │ ldreq r6, [lr], #-1020 @ 0xfffffc04 │ │ streq ip, [lr], #-2432 @ 0xfffff680 │ │ eoreq r5, lr, r4, ror #1 │ │ streq pc, [lr], #-580 @ 0xfffffdbc │ │ ldreq r9, [lr], #-144 @ 0xffffff70 │ │ - ldc2l 6, cr1, [sl, #216] @ 0xd8 │ │ - ldc2l 0, cr3, [ip, #620] @ 0x26c │ │ + ldc2l 6, cr1, [sl, #396] @ 0x18c │ │ + ldc2l 0, cr3, [ip, #800] @ 0x320 │ │ streq r0, [pc], #-3728 @ 2474584 │ │ streq fp, [lr], #-8 │ │ streq pc, [lr], #-480 @ 0xfffffe20 │ │ - ldc2l 12, cr2, [sp, #108] @ 0x6c │ │ - ldc2l 0, cr3, [ip, #268] @ 0x10c │ │ + ldc2l 12, cr2, [sp, #288] @ 0x120 │ │ + ldc2l 0, cr3, [ip, #448] @ 0x1c0 │ │ ldreq r9, [lr], #-132 @ 0xffffff7c │ │ streq sp, [lr], #-1616 @ 0xfffff9b0 │ │ eoreq r5, lr, r4, lsr #32 │ │ streq pc, [lr], #-388 @ 0xfffffe7c │ │ - ldc2l 13, cr14, [ip, #324] @ 0x144 │ │ - ldc2l 15, cr2, [ip, #908] @ 0x38c │ │ + ldc2l 13, cr14, [ip, #504] @ 0x1f8 │ │ + ldc2l 0, cr3, [ip, #64] @ 0x40 │ │ strteq r6, [r2], #-1380 @ 0xfffffa9c │ │ streq sp, [lr], #-3120 @ 0xfffff3d0 │ │ eoreq r4, lr, r4, asr #31 │ │ streq pc, [lr], #-292 @ 0xfffffedc │ │ - ldc2l 10, cr3, [sl, #976] @ 0x3d0 @ │ │ - ldc2l 15, cr2, [ip, #540] @ 0x21c │ │ + ldc2l 11, cr3, [sl, #132] @ 0x84 @ │ │ + ldc2l 15, cr2, [ip, #720] @ 0x2d0 │ │ strteq r3, [r6], #-3920 @ 0xfffff0b0 │ │ streq pc, [lr], #-244 @ 0xffffff0c │ │ eoreq r4, lr, r8, ror #30 │ │ ldc2l 4, cr9, [sp, #784] @ 0x310 │ │ │ │ 024745d0 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ @@ -1356743,18 +1356742,18 @@ │ │ mov r2, r4 │ │ bl 270e8c0 │ │ b 2474808 │ │ ldc2l 7, cr8, [sp, #380] @ 0x17c │ │ eoreq r4, lr, r4, asr r9 │ │ eoreq r4, lr, r4, asr r9 │ │ strdeq r4, [lr], -r0 @ │ │ - ldc2l 11, cr10, [ip, #464] @ 0x1d0 @ │ │ - ldc2l 7, cr14, [sl, #452] @ 0x1c4 │ │ + ldc2l 11, cr10, [ip, #644] @ 0x284 @ │ │ + ldc2l 7, cr14, [sl, #632] @ 0x278 │ │ eoreq r4, lr, r0, lsl #17 │ │ - ldc2l 13, cr0, [sl, #980] @ 0x3d4 │ │ + ldc2l 14, cr0, [sl, #136] @ 0x88 │ │ eoreq r4, lr, r8, lsl #16 │ │ strdeq r4, [lr], -ip @ │ │ ldc2l 7, cr8, [sp, #92] @ 0x5c │ │ │ │ 02474870 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ @@ -1356818,15 +1356817,15 @@ │ │ bl 270d300 │ │ mov r0, r8 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 7, cr2, [ip, #416] @ 0x1a0 │ │ + ldc2l 7, cr2, [ip, #596] @ 0x254 │ │ eoreq r4, lr, r0, lsr r7 │ │ eoreq r4, lr, ip, lsr #14 │ │ │ │ 02474984 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ @@ -1356853,15 +1356852,15 @@ │ │ strd r0, [r4, #16] │ │ mov r0, r5 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 15, cr0, [fp, #912] @ 0x390 │ │ + ldc2l 0, cr1, [fp, #68] @ 0x44 │ │ │ │ 02474a00 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d15} │ │ sub sp, sp, #104 @ 0x68 │ │ @@ -1357033,21 +1357032,21 @@ │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #96 @ 0x60 │ │ vpop {d8-d15} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 15, cr5, [sp, #976] @ 0x3d0 │ │ + ldc2l 0, cr6, [sp, #132] @ 0x84 │ │ eoreq r4, lr, r4, lsr #11 │ │ eoreq r4, lr, r0, lsr #11 │ │ eoreq r4, lr, ip, lsr r4 │ │ ldrdeq r4, [lr], -r4 @ │ │ mlaeq lr, r4, r3, r4 │ │ - ldc2l 13, cr5, [sp, #528] @ 0x210 │ │ + ldc2l 13, cr5, [sp, #708] @ 0x2c4 │ │ │ │ 02474ce0 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r4, r2 │ │ mov r6, r1 │ │ @@ -1357072,15 +1357071,15 @@ │ │ strd r0, [r4, #16] │ │ mov r0, r5 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 10, cr10, [sl, #688] @ 0x2b0 @ │ │ + ldc2l 10, cr10, [sl, #868] @ 0x364 @ │ │ │ │ 02474d5c : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #32 │ │ mov r6, r3 │ │ mov r5, r2 │ │ @@ -1357152,20 +1357151,20 @@ │ │ ldr r0, [pc, #40] @ 2474ea4 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 1, cr0, [ip, #856] @ 0x358 │ │ - ldc2l 9, cr12, [sl, #342] @ 0x156 @ │ │ - ldc2l 0, cr14, [sl, #948] @ 0x3b4 │ │ - ldc2l 9, cr12, [sl, #306] @ 0x132 @ │ │ + ldc2l 2, cr0, [ip, #12] │ │ + ldc2l 9, cr12, [sl, #432] @ 0x1b0 @ │ │ + ldc2l 1, cr14, [sl, #104] @ 0x68 │ │ + ldc2l 9, cr12, [sl, #396] @ 0x18c @ │ │ eoreq r4, lr, r0, ror #3 │ │ - ldc2l 0, cr0, [ip, #920] @ 0x398 │ │ + ldc2l 1, cr0, [ip, #76] @ 0x4c │ │ │ │ 02474ea8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #252 @ 0xfc │ │ mov r4, r2 │ │ mov r5, r1 │ │ @@ -1357369,18 +1357368,18 @@ │ │ vstr d17, [r4, #136] @ 0x88 │ │ ldr r0, [pc, #28] @ 24751f8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 5, cr12, [fp, #868] @ 0x364 │ │ + ldc2l 6, cr12, [fp, #24] │ │ eoreq r3, lr, ip, lsr #31 │ │ eoreq r3, lr, r8, lsr #31 │ │ - ldc2l 2, cr12, [fp, #852] @ 0x354 │ │ + ldc2l 3, cr12, [fp, #8] │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 02475200 : │ │ ldr r0, [pc, #64] @ 2475248 │ │ add r0, pc, r0 │ │ vldr d16, [r0] │ │ vcmp.f64 d16, #0.0 │ │ @@ -1357493,19 +1357492,19 @@ │ │ bl 270eee0 │ │ mov r0, r5 │ │ mov r1, r7 │ │ mov r2, r4 │ │ mov r3, sl │ │ bl 270eee0 │ │ b 2475364 │ │ - ldc2l 4, cr8, [sl, #28] │ │ - ldc2l 12, cr1, [ip, #1004] @ 0x3ec │ │ - ldc2l 11, cr13, [sl, #612] @ 0x264 @ │ │ - ldc2l 2, cr0, [sl, #160] @ 0xa0 │ │ - ldc2l 3, cr8, [sl, #428] @ 0x1ac │ │ + ldc2l 4, cr8, [sl, #208] @ 0xd0 │ │ + ldc2l 13, cr1, [ip, #160] @ 0xa0 │ │ + ldc2l 11, cr13, [sl, #792] @ 0x318 @ │ │ + ldc2l 2, cr0, [sl, #340] @ 0x154 │ │ + ldc2l 3, cr8, [sl, #608] @ 0x260 │ │ │ │ 024753d8 : │ │ ldr r1, [r1] │ │ cmp r1, #0 │ │ beq 2475440 │ │ vldr d16, [r0] │ │ cmn r1, #1 │ │ @@ -1357669,29 +1357668,29 @@ │ │ ldr r0, [pc, #76] @ 24756ac │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 7, cr1, [sp, #172] @ 0xac │ │ - ldc2l 2, cr6, [fp, #552] @ 0x228 │ │ + ldc2l 7, cr1, [sp, #352] @ 0x160 │ │ + ldc2l 2, cr6, [fp, #732] @ 0x2dc │ │ strteq r0, [sl], #-704 @ 0xfffffd40 │ │ - ldc2l 9, cr14, [fp, #200] @ 0xc8 @ │ │ - ldc2l 1, cr4, [fp, #412] @ 0x19c │ │ - vcadd.f32 , q13, , #270 │ │ - ldc2l 12, cr5, [fp, #468] @ 0x1d4 │ │ - ldc2l 2, cr12, [sl, #928] @ 0x3a0 │ │ - vcadd.f32 d29, d26, d29, #270 │ │ - ldc2l 11, cr7, [ip, #544] @ 0x220 @ │ │ - ldc2l 2, cr10, [sl, #380] @ 0x17c │ │ - ldc2l 9, cr13, [sl, #146] @ 0x92 @ │ │ - ldc2l 4, cr15, [ip, #880] @ 0x370 │ │ + ldc2l 9, cr14, [fp, #290] @ 0x122 @ │ │ + ldc2l 1, cr4, [fp, #592] @ 0x250 │ │ + ldc2l 9, cr13, [sl, #44] @ 0x2c @ │ │ + ldc2l 12, cr5, [fp, #648] @ 0x288 │ │ + ldc2l 3, cr12, [sl, #84] @ 0x54 │ │ + ldc2l 8, cr13, [sl, #872] @ 0x368 │ │ + ldc2l 11, cr7, [ip, #724] @ 0x2d4 @ │ │ + ldc2l 2, cr10, [sl, #560] @ 0x230 │ │ + ldc2l 9, cr13, [sl, #236] @ 0xec @ │ │ + ldc2l 5, cr15, [ip, #36] @ 0x24 │ │ ldrdeq r3, [lr], -r0 @ │ │ - ldc2l 5, cr1, [sp, #284] @ 0x11c │ │ + ldc2l 5, cr1, [sp, #464] @ 0x1d0 │ │ │ │ 024756b0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #68 @ 0x44 │ │ mov r5, r2 │ │ mov r6, r1 │ │ @@ -1357750,18 +1357749,18 @@ │ │ mov r0, r8 │ │ mov r1, #6 │ │ ldr r7, [sp, #44] @ 0x2c │ │ bl 270ce40 │ │ mov r0, r7 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 15, cr7, [sl, #1012] @ 0x3f4 │ │ - ldc2l 0, cr6, [fp, #136] @ 0x88 │ │ + ldc2l 0, cr8, [sl, #168] @ 0xa8 │ │ + ldc2l 0, cr6, [fp, #316] @ 0x13c │ │ strteq r0, [sl], #-92 @ 0xffffffa4 │ │ - ldc2l 6, cr14, [fp, #1008] @ 0x3f0 │ │ + ldc2l 7, cr14, [fp, #164] @ 0xa4 │ │ │ │ 024757c0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8} │ │ sub sp, sp, #72 @ 0x48 │ │ @@ -1358785,40 +1358784,40 @@ │ │ bl 270e0a0 │ │ mov r0, #0 │ │ str r0, [r7] │ │ b 2475f28 │ │ strteq r3, [sl], #-2836 @ 0xfffff4ec │ │ eoreq r3, lr, r4, lsl r8 │ │ strteq r4, [sl], #-36 @ 0xffffffdc │ │ - ldc2l 0, cr10, [sl, #72] @ 0x48 │ │ + ldc2l 0, cr10, [sl, #252] @ 0xfc │ │ strteq r3, [sl], #-4072 @ 0xfffff018 │ │ strteq r3, [sl], #-4048 @ 0xfffff030 │ │ strteq r3, [sl], #-2692 @ 0xfffff57c │ │ strteq pc, [r9], #-3860 @ 0xfffff0ec │ │ strteq r3, [sl], #-4016 @ 0xfffff050 │ │ - ldc2l 14, cr3, [fp, #756] @ 0x2f4 │ │ - ldc2l 3, cr1, [sp, #40] @ 0x28 │ │ + ldc2l 14, cr3, [fp, #936] @ 0x3a8 │ │ + ldc2l 3, cr1, [sp, #220] @ 0xdc │ │ strteq r4, [sl], #-1548 @ 0xfffff9f4 │ │ strteq r4, [sl], #-1724 @ 0xfffff944 │ │ - ldc2l 14, cr5, [fp, #316] @ 0x13c │ │ - ldc2l 5, cr13, [sl, #820] @ 0x334 │ │ + ldc2l 14, cr5, [fp, #496] @ 0x1f0 │ │ + ldc2l 5, cr13, [sl, #1000] @ 0x3e8 │ │ strteq r3, [sl], #-3848 @ 0xfffff0f8 │ │ strteq r4, [sl], #-1672 @ 0xfffff978 │ │ strteq pc, [r9], #-3688 @ 0xfffff198 │ │ eoreq r3, lr, ip, ror #13 │ │ strteq r3, [sl], #-2504 @ 0xfffff638 │ │ strteq r3, [sl], #-3828 @ 0xfffff10c │ │ strteq r3, [sl], #-3808 @ 0xfffff120 │ │ strteq r4, [sl], #-1612 @ 0xfffff9b4 │ │ strteq r4, [sl], #-1556 @ 0xfffff9ec │ │ strteq r4, [sl], #-1588 @ 0xfffff9cc │ │ strteq r4, [sl], #-1368 @ 0xfffffaa8 │ │ strteq r4, [sl], #-1416 @ 0xfffffa78 │ │ - ldc2l 4, cr1, [sl, #172] @ 0xac │ │ - ldc2l 8, cr7, [ip, #836] @ 0x344 │ │ + ldc2l 4, cr1, [sl, #352] @ 0x160 │ │ + ldc2l 8, cr7, [ip, #1016] @ 0x3f8 │ │ str r7, [sp, #40] @ 0x28 │ │ add r6, sp, #56 @ 0x38 │ │ ldr r1, [pc, #3040] @ 247742c │ │ sub r8, fp, #48 @ 0x30 │ │ ldr r9, [pc, #3036] @ 2477430 │ │ mov r2, r6 │ │ ldr r0, [pc, #3032] @ 2477434 │ │ @@ -1358944,21 +1358943,21 @@ │ │ strteq r4, [sl], #-1224 @ 0xfffffb38 │ │ strteq r4, [sl], #-1000 @ 0xfffffc18 │ │ strteq r4, [sl], #-1208 @ 0xfffffb48 │ │ strteq pc, [r9], #-3212 @ 0xfffff374 │ │ strteq pc, [r9], #-3204 @ 0xfffff37c │ │ eoreq r3, lr, ip, asr #9 │ │ strteq r3, [sl], #-3296 @ 0xfffff320 │ │ - ldc2l 10, cr15, [r9, #232] @ 0xe8 @ │ │ - ldc2l 15, cr14, [ip, #180] @ 0xb4 │ │ + ldc2l 10, cr15, [r9, #412] @ 0x19c @ │ │ + ldc2l 15, cr14, [ip, #360] @ 0x168 │ │ mlaeq lr, r8, r4, r3 │ │ strteq r3, [sl], #-3244 @ 0xfffff354 │ │ - ldc2l 9, cr9, [fp, #412] @ 0x19c @ │ │ - ldc2l 3, cr13, [sl, #100] @ 0x64 │ │ - ldc2l 12, cr9, [sl, #548] @ 0x224 │ │ + ldc2l 9, cr9, [fp, #502] @ 0x1f6 @ │ │ + ldc2l 3, cr13, [sl, #280] @ 0x118 │ │ + ldc2l 12, cr9, [sl, #728] @ 0x2d8 │ │ strteq r4, [sl], #-996 @ 0xfffffc1c │ │ mov r1, r8 │ │ ldr r0, [pc, #4048] @ 2477a4c │ │ mov r3, #32 │ │ ldr r2, [pc, #4044] @ 2477a50 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1359040,39 +1359039,39 @@ │ │ ldr r0, [pc, #4020] @ 2477b70 │ │ mov r2, r9 │ │ movw r3, #919 @ 0x397 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2476a74 │ │ - ldc2l 4, cr11, [ip, #940] @ 0x3ac │ │ + ldc2l 5, cr11, [ip, #96] @ 0x60 │ │ strteq r3, [sl], #-2676 @ 0xfffff58c │ │ eoreq r3, lr, r4, lsr r4 │ │ strteq r4, [sl], #-732 @ 0xfffffd24 │ │ strteq r4, [sl], #-704 @ 0xfffffd40 │ │ strteq r4, [sl], #-664 @ 0xfffffd68 │ │ - ldc2l 9, cr15, [r9, #346] @ 0x15a @ │ │ + ldc2l 9, cr15, [r9, #436] @ 0x1b4 @ │ │ strteq r4, [sl], #-724 @ 0xfffffd2c │ │ strteq r4, [sl], #-808 @ 0xfffffcd8 │ │ - ldc2l 4, cr11, [ip, #204] @ 0xcc │ │ + ldc2l 4, cr11, [ip, #384] @ 0x180 │ │ strteq r4, [sl], #-920 @ 0xfffffc68 │ │ strteq r4, [sl], #-648 @ 0xfffffd78 │ │ strteq r4, [sl], #-476 @ 0xfffffe24 │ │ strteq r4, [sl], #-456 @ 0xfffffe38 │ │ strteq r4, [sl], #-408 @ 0xfffffe68 │ │ - ldc2l 14, cr0, [sp, #648] @ 0x288 │ │ + ldc2l 14, cr0, [sp, #828] @ 0x33c │ │ strteq r3, [sl], #-2356 @ 0xfffff6cc │ │ strteq r4, [sl], #-784 @ 0xfffffcf0 │ │ strteq r4, [sl], #-392 @ 0xfffffe78 │ │ strteq r4, [sl], #-376 @ 0xfffffe88 │ │ ldc2l 11, cr7, [sp, #1008] @ 0x3f0 @ │ │ strteq r3, [sl], #-2252 @ 0xfffff734 │ │ strteq r4, [sl], #-420 @ 0xfffffe5c │ │ strteq r4, [sl], #-288 @ 0xfffffee0 │ │ - ldc2l 9, cr7, [sl, #64] @ 0x40 @ │ │ + ldc2l 9, cr7, [sl, #154] @ 0x9a @ │ │ strteq r4, [sl], #-352 @ 0xfffffea0 │ │ strteq r4, [sl], #-340 @ 0xfffffeac │ │ strteq r4, [sl], #-328 @ 0xfffffeb8 │ │ strteq r4, [sl], #-180 @ 0xffffff4c │ │ ldc2l 11, cr7, [sp, #240] @ 0xf0 @ │ │ str r7, [sp, #40] @ 0x28 │ │ mov r1, sl │ │ @@ -1359194,19 +1359193,19 @@ │ │ mov r0, r4 │ │ mov r1, r6 │ │ bl 270ebd0 │ │ ldr r7, [sp, #52] @ 0x34 │ │ ldr r5, [sp, #44] @ 0x2c │ │ b 2477318 │ │ strteq r4, [sl], #-132 @ 0xffffff7c │ │ - vcadd.f32 d23, d26, d4, #270 │ │ - ldc2l 9, cr9, [sl, #364] @ 0x16c @ │ │ + ldc2l 8, cr7, [sl, #708] @ 0x2c4 │ │ + ldc2l 9, cr9, [sl, #454] @ 0x1c6 @ │ │ strteq r3, [sl], #-2000 @ 0xfffff830 │ │ - ldc2l 4, cr5, [ip, #48] @ 0x30 │ │ - ldc2l 1, cr6, [ip, #204] @ 0xcc │ │ + ldc2l 4, cr5, [ip, #228] @ 0xe4 │ │ + ldc2l 1, cr6, [ip, #384] @ 0x180 │ │ eoreq r3, lr, ip, ror r1 │ │ ldr r0, [pc, #3796] @ 2477d2c │ │ ldr r1, [pc, #3796] @ 2477d30 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270e0a0 │ │ ldr r1, [sp, #52] @ 0x34 │ │ @@ -1359230,35 +1359229,35 @@ │ │ mov r2, #1 │ │ mov r3, #32 │ │ bl 270d9f0 │ │ ldr r1, [pc, #3708] @ 2477d3c │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ b 2476010 │ │ - ldc2l 9, cr9, [sl, #180] @ 0xb4 @ │ │ - ldc2l 3, cr5, [ip, #752] @ 0x2f0 │ │ + ldc2l 9, cr9, [sl, #270] @ 0x10e @ │ │ + ldc2l 3, cr5, [ip, #932] @ 0x3a4 │ │ eoreq r3, lr, r8, lsl #2 │ │ strteq r3, [sl], #-2332 @ 0xfffff6e4 │ │ eoreq r3, lr, r0, ror #1 │ │ strteq r3, [sl], #-2292 @ 0xfffff70c │ │ - ldc2l 8, cr9, [sl, #992] @ 0x3e0 │ │ + ldc2l 9, cr9, [sl, #74] @ 0x4a @ │ │ strteq r3, [sl], #-3932 @ 0xfffff0a4 │ │ ldc2l 9, cr7, [sp, #464] @ 0x1d0 @ │ │ - ldc2l 12, cr0, [sp, #136] @ 0x88 │ │ - ldc2l 15, cr12, [sl, #116] @ 0x74 │ │ + ldc2l 12, cr0, [sp, #316] @ 0x13c │ │ + ldc2l 15, cr12, [sl, #296] @ 0x128 │ │ strteq r3, [sl], #-1716 @ 0xfffff94c │ │ strteq r3, [sl], #-3852 @ 0xfffff0f4 │ │ - ldc2l 7, cr7, [sl, #48] @ 0x30 │ │ - ldc2l 11, cr0, [sp, #840] @ 0x348 @ │ │ - ldc2l 14, cr12, [sl, #836] @ 0x344 │ │ + ldc2l 7, cr7, [sl, #228] @ 0xe4 │ │ + ldc2l 11, cr0, [sp, #1020] @ 0x3fc @ │ │ + ldc2l 14, cr12, [sl, #1016] @ 0x3f8 │ │ strteq r3, [sl], #-3904 @ 0xfffff0c0 │ │ - ldc2l 15, cr0, [ip, #808] @ 0x328 │ │ - vcadd.f32 d25, d10, d10, #270 │ │ + ldc2l 15, cr0, [ip, #988] @ 0x3dc │ │ + ldc2l 8, cr9, [sl, #220] @ 0xdc │ │ ldc2l 6, cr8, [sp, #800] @ 0x320 │ │ - ldc2l 11, cr0, [sp, #312] @ 0x138 @ │ │ + ldc2l 11, cr0, [sp, #492] @ 0x1ec @ │ │ strteq pc, [r9], #-1812 @ 0xfffff8ec │ │ ldr r0, [pc, #3684] @ 2477d8c │ │ mov r4, #1 │ │ ldr r2, [pc, #3680] @ 2477d90 │ │ mov r6, #32 │ │ ldr r3, [pc, #3676] @ 2477d94 │ │ add r0, pc, r0 │ │ @@ -1359384,24 +1359383,24 @@ │ │ bl 270d9c0 │ │ ldr r2, [pc, #3268] @ 2477de4 │ │ mov r1, r0 │ │ ldr r2, [pc, r2] │ │ b 2477090 │ │ ldrdeq r2, [lr], -ip @ │ │ strteq r3, [sl], #-1776 @ 0xfffff910 │ │ - ldc2l 6, cr9, [sl, #888] @ 0x378 │ │ - ldc2l 6, cr9, [sl, #808] @ 0x328 │ │ + ldc2l 7, cr9, [sl, #44] @ 0x2c │ │ + ldc2l 6, cr9, [sl, #988] @ 0x3dc │ │ ldc2l 5, cr8, [sp, #640] @ 0x280 │ │ - ldc2l 10, cr0, [sp, #152] @ 0x98 @ │ │ + ldc2l 10, cr0, [sp, #332] @ 0x14c @ │ │ strteq pc, [r9], #-1520 @ 0xfffffa10 │ │ ldc2l 5, cr8, [sp, #384] @ 0x180 │ │ - ldc2l 9, cr0, [sp, #460] @ 0x1cc @ │ │ + ldc2l 10, cr0, [sp, #76] @ 0x4c @ │ │ strteq pc, [r9], #-1456 @ 0xfffffa50 │ │ ldc2l 5, cr8, [sp, #128] @ 0x80 │ │ - ldc2l 9, cr0, [sp, #332] @ 0x14c @ │ │ + ldc2l 9, cr0, [sp, #422] @ 0x1a6 @ │ │ strteq pc, [r9], #-1392 @ 0xfffffa90 │ │ ldr r0, [pc, #3060] @ 2477d58 │ │ ldr r1, [pc, #3060] @ 2477d5c │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270e0a0 │ │ ldr r1, [sp, #52] @ 0x34 │ │ @@ -1359448,27 +1359447,27 @@ │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r4, [pc, #2916] @ 2477d88 │ │ add r1, r5, r1, lsl #5 │ │ add r4, pc, r4 │ │ b 2475ff4 │ │ ldc2l 4, cr8, [sp, #896] @ 0x380 │ │ - ldc2l 9, cr0, [sp, #204] @ 0xcc @ │ │ + ldc2l 9, cr0, [sp, #294] @ 0x126 @ │ │ strteq pc, [r9], #-1328 @ 0xfffffad0 │ │ ldc2l 4, cr8, [sp, #640] @ 0x280 │ │ - ldc2l 9, cr0, [sp, #76] @ 0x4c @ │ │ + ldc2l 9, cr0, [sp, #166] @ 0xa6 @ │ │ strteq pc, [r9], #-1264 @ 0xfffffb10 │ │ ldc2l 4, cr8, [sp, #384] @ 0x180 │ │ - vcadd.f32 q8, , q11, #270 │ │ + ldc2l 9, cr0, [sp, #38] @ 0x26 @ │ │ strteq pc, [r9], #-1200 @ 0xfffffb50 │ │ ldc2l 4, cr8, [sp, #128] @ 0x80 │ │ - vcadd.f32 d16, d29, d22, #270 │ │ + ldc2l 8, cr0, [sp, #844] @ 0x34c │ │ strteq pc, [r9], #-1136 @ 0xfffffb90 │ │ ldc2l 3, cr8, [sp, #896] @ 0x380 │ │ - vcadd.f32 q8, , q11, #270 │ │ + ldc2l 8, cr0, [sp, #588] @ 0x24c │ │ ldr r5, [pc, #2772] @ 2477d40 │ │ ldr r1, [pc, #2772] @ 2477d44 │ │ ldr r6, [pc, #2772] @ 2477d48 │ │ add r5, pc, r5 │ │ ldr r3, [pc, #2768] @ 2477d4c │ │ add r1, pc, r1 │ │ add r6, pc, r6 │ │ @@ -1359522,75 +1359521,75 @@ │ │ add r2, pc, r2 │ │ add r1, r2, r1, lsl #3 │ │ vstr d8, [r1] │ │ sub r1, r0, #8 │ │ vldr d8, [r6, #8] │ │ b 2477498 │ │ strteq pc, [r9], #-1072 @ 0xfffffbd0 │ │ - ldc2l 9, cr12, [ip, #378] @ 0x17a @ │ │ - vcadd.f32 d16, d13, d26, #270 │ │ + ldc2l 9, cr12, [ip, #468] @ 0x1d4 @ │ │ + ldc2l 8, cr0, [sp, #348] @ 0x15c │ │ eoreq r2, lr, ip, ror ip │ │ strteq r3, [sl], #-2852 @ 0xfffff4dc │ │ strteq r3, [sl], #-656 @ 0xfffffd70 │ │ strteq r3, [sl], #-3204 @ 0xfffff37c │ │ strteq r3, [sl], #-568 @ 0xfffffdc8 │ │ eoreq r2, lr, r0, ror #23 │ │ strteq r3, [sl], #-1012 @ 0xfffffc0c │ │ - ldc2l 14, cr12, [fp, #168] @ 0xa8 │ │ - ldc2l 10, cr12, [sl, #308] @ 0x134 @ │ │ + ldc2l 14, cr12, [fp, #348] @ 0x15c │ │ + ldc2l 10, cr12, [sl, #488] @ 0x1e8 @ │ │ strteq r3, [sl], #-420 @ 0xfffffe5c │ │ - ldc2l 14, cr8, [ip, #668] @ 0x29c │ │ + ldc2l 14, cr8, [ip, #848] @ 0x350 │ │ eoreq r2, lr, ip, ror #22 │ │ strteq r3, [sl], #-896 @ 0xfffffc80 │ │ - ldc2l 11, cr0, [ip, #400] @ 0x190 @ │ │ - ldc2l 9, cr12, [sl, #458] @ 0x1ca @ │ │ + ldc2l 11, cr0, [ip, #580] @ 0x244 @ │ │ + ldc2l 10, cr12, [sl, #72] @ 0x48 @ │ │ strteq r3, [sl], #-292 @ 0xfffffedc │ │ vcadd.f32 q11, , q11, #270 │ │ strteq r3, [sl], #-284 @ 0xfffffee4 │ │ - ldc2l 4, cr9, [sl, #196] @ 0xc4 │ │ + ldc2l 4, cr9, [sl, #376] @ 0x178 │ │ strteq r3, [sl], #-220 @ 0xffffff24 │ │ - ldc2l 5, cr1, [sl, #872] @ 0x368 │ │ + ldc2l 6, cr1, [sl, #28] │ │ strteq r3, [sl], #-180 @ 0xffffff4c │ │ ldc2l 7, cr6, [sp, #1016] @ 0x3f8 │ │ eoreq r2, lr, r4, ror sl │ │ strteq r3, [sl], #-648 @ 0xfffffd78 │ │ - ldc2l 12, cr4, [ip, #856] @ 0x358 │ │ - ldc2l 8, cr12, [sl, #884] @ 0x374 │ │ + ldc2l 13, cr4, [ip, #12] │ │ + ldc2l 9, cr12, [sl, #20] @ │ │ strteq r3, [sl], #-116 @ 0xffffff8c │ │ strteq r3, [sl], #-56 @ 0xffffffc8 │ │ ldc2l 1, cr8, [sp, #88] @ 0x58 │ │ - ldc2l 0, cr5, [fp, #916] @ 0x394 │ │ + ldc2l 1, cr5, [fp, #72] @ 0x48 │ │ eoreq r2, lr, r4, ror #19 │ │ strteq r3, [sl], #-2180 @ 0xfffff77c │ │ strteq r3, [sl], #-2164 @ 0xfffff78c │ │ strteq r3, [sl], #-2240 @ 0xfffff740 │ │ strteq r3, [sl], #-2328 @ 0xfffff6e8 │ │ strteq r3, [sl], #-2448 @ 0xfffff670 │ │ strteq r3, [sl], #-2160 @ 0xfffff790 │ │ strteq r3, [sl], #-2040 @ 0xfffff808 │ │ strteq r3, [sl], #-1988 @ 0xfffff83c │ │ strteq r3, [sl], #-2116 @ 0xfffff7bc │ │ strteq r3, [sl], #-2096 @ 0xfffff7d0 │ │ strteq r3, [sl], #-2084 @ 0xfffff7dc │ │ - ldc2l 0, cr9, [sl, #872] @ 0x368 │ │ - ldc2l 11, cr4, [ip, #224] @ 0xe0 @ │ │ + ldc2l 1, cr9, [sl, #28] │ │ + ldc2l 11, cr4, [ip, #404] @ 0x194 @ │ │ strhteq r2, [lr], -r4 │ │ - ldc2l 5, cr1, [sp, #96] @ 0x60 │ │ + ldc2l 5, cr1, [sp, #276] @ 0x114 │ │ mlaeq lr, r8, r8, r2 │ │ strteq r3, [sl], #-2200 @ 0xfffff768 │ │ eoreq r2, lr, r8, ror #16 │ │ strteq r3, [sl], #-124 @ 0xffffff84 │ │ ldc2l 5, cr6, [sp, #168] @ 0xa8 │ │ eoreq r2, lr, r4, asr #15 │ │ strteq r3, [sl], #-1644 @ 0xfffff994 │ │ strteq r3, [sl], #-1616 @ 0xfffff9b0 │ │ strteq r3, [sl], #-1572 @ 0xfffff9dc │ │ - ldc2l 10, cr8, [ip, #608] @ 0x260 @ │ │ + ldc2l 10, cr8, [ip, #788] @ 0x314 @ │ │ strteq r3, [sl], #-1508 @ 0xfffffa1c │ │ - ldc2l 3, cr2, [sp, #480] @ 0x1e0 │ │ + ldc2l 3, cr2, [sp, #660] @ 0x294 │ │ strteq r3, [sl], #-1568 @ 0xfffff9e0 │ │ ldr r0, [pc, #2484] @ 2477e0c │ │ movw r3, #1054 @ 0x41e │ │ ldr r2, [pc, #2480] @ 2477e10 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1359897,15 +1359896,15 @@ │ │ add r1, pc, r1 │ │ bl 270dea0 │ │ b 2476128 │ │ ldc2l 4, cr6, [sp, #280] @ 0x118 │ │ strteq r3, [sl], #-1636 @ 0xfffff99c │ │ strteq r3, [sl], #-1764 @ 0xfffff91c │ │ strteq r3, [sl], #-1492 @ 0xfffffa2c │ │ - ldc2l 9, cr8, [ip, #408] @ 0x198 @ │ │ + ldc2l 9, cr8, [ip, #498] @ 0x1f2 @ │ │ ldr r0, [pc, #1200] @ 2477df0 │ │ ldr r1, [pc, #1200] @ 2477df4 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ bl 270e0a0 │ │ ldr r1, [sp, #52] @ 0x34 │ │ mov r0, #0 │ │ @@ -1359923,15 +1359922,15 @@ │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270d9f0 │ │ mov r0, r4 │ │ mov r1, r6 │ │ b 2475ff8 │ │ strteq r3, [sl], #-1432 @ 0xfffffa68 │ │ - ldc2l 2, cr2, [sp, #688] @ 0x2b0 │ │ + ldc2l 2, cr2, [sp, #868] @ 0x364 │ │ strteq r3, [sl], #-1248 @ 0xfffffb20 │ │ ldr r0, [pc, #1140] @ 2477e20 │ │ movw r3, #1055 @ 0x41f │ │ ldr r2, [pc, #1136] @ 2477e24 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1359947,15 +1359946,15 @@ │ │ bhi 2477a00 │ │ ldr r7, [sp, #52] @ 0x34 │ │ ldr r5, [sp, #44] @ 0x2c │ │ b 24774b0 │ │ strteq r3, [sl], #-1232 @ 0xfffffb30 │ │ strteq r3, [sl], #-1180 @ 0xfffffb64 │ │ strteq r3, [sl], #-1340 @ 0xfffffac4 │ │ - ldc2l 1, cr0, [sp, #648] @ 0x288 │ │ + ldc2l 1, cr0, [sp, #828] @ 0x33c │ │ ldr r0, [pc, #1064] @ 2477e30 │ │ mov r3, #1056 @ 0x420 │ │ ldr r2, [pc, #1060] @ 2477e34 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ add r0, r8, r0, lsl #3 │ │ @@ -1360013,15 +1360012,15 @@ │ │ vldr d8, [r1, #32] │ │ sub r1, r0, #5 │ │ bhi 2477b14 │ │ add r7, sp, #44 @ 0x2c │ │ ldm r7, {r5, r6, r7} │ │ b 24774e0 │ │ strteq r3, [sl], #-964 @ 0xfffffc3c │ │ - ldc2l 11, cr6, [sl, #784] @ 0x310 @ │ │ + ldc2l 11, cr6, [sl, #964] @ 0x3c4 @ │ │ strteq r3, [sl], #-1280 @ 0xfffffb00 │ │ strteq r3, [sl], #-1012 @ 0xfffffc0c │ │ strteq r3, [sl], #-1000 @ 0xfffffc18 │ │ ldr r0, [pc, #820] @ 2477e50 │ │ movw r3, #1058 @ 0x422 │ │ ldr r2, [pc, #816] @ 2477e54 │ │ add r0, pc, r0 │ │ @@ -1360040,15 +1360039,15 @@ │ │ bhi 2477b74 │ │ add r7, sp, #44 @ 0x2c │ │ ldm r7, {r5, r6, r7} │ │ b 24774f8 │ │ strteq r3, [sl], #-852 @ 0xfffffcac │ │ ldc2l 13, cr6, [sp, #880] @ 0x370 │ │ strteq r3, [sl], #-804 @ 0xfffffcdc │ │ - ldc2l 11, cr6, [sl, #144] @ 0x90 @ │ │ + ldc2l 11, cr6, [sl, #324] @ 0x144 @ │ │ ldr r0, [pc, #740] @ 2477e60 │ │ movw r3, #1059 @ 0x423 │ │ ldr r2, [pc, #736] @ 2477e64 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ add r0, r8, r0, lsl #3 │ │ @@ -1360081,15 +1360080,15 @@ │ │ cmp r3, #199 @ 0xc7 │ │ vldr d8, [r1, #56] @ 0x38 │ │ sub r1, r0, #2 │ │ bhi 2477c20 │ │ add r7, sp, #44 @ 0x2c │ │ ldm r7, {r5, r6, r7} │ │ b 2477528 │ │ - ldc2l 9, cr6, [fp, #408] @ 0x198 @ │ │ + ldc2l 9, cr6, [fp, #498] @ 0x1f2 @ │ │ strhteq r2, [lr], -r4 │ │ strteq r3, [sl], #-600 @ 0xfffffda8 │ │ ldr r0, [pc, #600] @ 2477e80 │ │ movw r3, #1061 @ 0x425 │ │ ldr r2, [pc, #596] @ 2477e84 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1360141,152 +1360140,152 @@ │ │ b 2477554 │ │ strteq r3, [sl], #-576 @ 0xfffffdc0 │ │ strteq r3, [sl], #-456 @ 0xfffffe38 │ │ strteq r3, [sl], #-404 @ 0xfffffe6c │ │ strteq r3, [sl], #-536 @ 0xfffffde8 │ │ strteq r3, [sl], #-520 @ 0xfffffdf8 │ │ strteq r3, [sl], #-508 @ 0xfffffe04 │ │ - ldc2l 10, cr8, [sl, #728] @ 0x2d8 @ │ │ - ldc2l 5, cr4, [ip, #80] @ 0x50 │ │ + ldc2l 10, cr8, [sl, #908] @ 0x38c @ │ │ + ldc2l 5, cr4, [ip, #260] @ 0x104 │ │ eoreq r2, lr, r0, lsr #5 │ │ - ldc2l 14, cr0, [sp, #976] @ 0x3d0 │ │ + ldc2l 15, cr0, [sp, #132] @ 0x84 │ │ eoreq r2, lr, r4, ror r2 │ │ strteq r3, [sl], #-584 @ 0xfffffdb8 │ │ eoreq r2, lr, r4, asr #4 │ │ eoreq r2, lr, r4, asr r2 │ │ strteq r3, [sl], #-228 @ 0xffffff1c │ │ strteq r3, [sl], #-584 @ 0xfffffdb8 │ │ eoreq r2, lr, r0, asr #3 │ │ strteq r2, [sl], #-2516 @ 0xfffff62c │ │ - ldc2l 9, cr8, [sl, #432] @ 0x1b0 @ │ │ - ldc2l 0, cr12, [sl, #164] @ 0xa4 │ │ + ldc2l 10, cr8, [sl, #20] @ │ │ + ldc2l 0, cr12, [sl, #344] @ 0x158 │ │ strteq r3, [sl], #-140 @ 0xffffff74 │ │ strteq r2, [sl], #-3424 @ 0xfffff2a0 │ │ eoreq r1, lr, r4, lsr #27 │ │ eoreq r1, lr, r8, lsr #27 │ │ strteq r2, [sl], #-3144 @ 0xfffff3b8 │ │ eoreq r1, lr, ip, asr #26 │ │ eoreq r1, lr, r8, lsl sp │ │ strhteq r1, [lr], -r4 │ │ strteq r2, [sl], #-1736 @ 0xfffff938 │ │ - ldc2l 6, cr8, [sl, #816] @ 0x330 │ │ + ldc2l 6, cr8, [sl, #996] @ 0x3e4 │ │ strteq r2, [sl], #-3376 @ 0xfffff2d0 │ │ ldc2l 7, cr6, [sp, #752] @ 0x2f0 │ │ - ldc2l 9, cr15, [ip, #492] @ 0x1ec @ │ │ + ldc2l 10, cr15, [ip, #140] @ 0x8c @ │ │ strteq r2, [sl], #-1160 @ 0xfffffb78 │ │ strteq r2, [sl], #-3672 @ 0xfffff1a8 │ │ - ldc2l 12, cr11, [sl, #900] @ 0x384 │ │ + ldc2l 13, cr11, [sl, #56] @ 0x38 │ │ strteq r2, [sl], #-3288 @ 0xfffff328 │ │ - ldc2l 4, cr6, [sl, #864] @ 0x360 │ │ - ldc2l 9, cr15, [ip, #316] @ 0x13c @ │ │ - ldc2l 12, cr11, [sl, #628] @ 0x274 │ │ - ldc2l 9, cr8, [sl, #12] @ │ │ - ldc2l 3, cr4, [ip, #400] @ 0x190 │ │ + ldc2l 5, cr6, [sl, #20] │ │ + ldc2l 9, cr15, [ip, #406] @ 0x196 @ │ │ + ldc2l 12, cr11, [sl, #808] @ 0x328 │ │ + ldc2l 9, cr8, [sl, #102] @ 0x66 @ │ │ + ldc2l 3, cr4, [ip, #580] @ 0x244 │ │ eoreq r2, lr, ip, ror #1 │ │ - ldc2l 13, cr0, [sp, #224] @ 0xe0 │ │ + ldc2l 13, cr0, [sp, #404] @ 0x194 │ │ eoreq r2, lr, ip, asr #1 │ │ - ldc2l 8, cr8, [sl, #728] @ 0x2d8 │ │ - ldc2l 3, cr4, [ip, #80] @ 0x50 │ │ + vcadd.f32 q12, q13, , #270 │ │ + ldc2l 3, cr4, [ip, #260] @ 0x104 │ │ eoreq r2, lr, r0, lsr #1 │ │ strteq r2, [sl], #-3932 @ 0xfffff0a4 │ │ ldc2l 10, cr5, [sp, #904] @ 0x388 @ │ │ strteq r2, [sl], #-3976 @ 0xfffff078 │ │ eoreq r2, lr, ip, lsr #32 │ │ eoreq r2, lr, r8, lsr r0 │ │ strteq r2, [sl], #-3788 @ 0xfffff134 │ │ strteq r3, [sl], #-44 @ 0xffffffd4 │ │ strteq r2, [sl], #-2040 @ 0xfffff808 │ │ strdeq r1, [lr], -r8 @ │ │ strteq r2, [sl], #-3680 @ 0xfffff1a0 │ │ strteq r2, [sl], #-3708 @ 0xfffff184 │ │ - ldc2l 6, cr4, [fp, #724] @ 0x2d4 │ │ - ldc2l 11, cr15, [ip, #168] @ 0xa8 @ │ │ + ldc2l 6, cr4, [fp, #904] @ 0x388 │ │ + ldc2l 11, cr15, [ip, #348] @ 0x15c @ │ │ strteq r2, [sl], #-3536 @ 0xfffff230 │ │ strteq r2, [sl], #-3496 @ 0xfffff258 │ │ strteq r2, [sl], #-3624 @ 0xfffff1d8 │ │ strteq r1, [sl], #-3520 @ 0xfffff240 │ │ ldrdeq r1, [lr], -r8 @ │ │ strteq r1, [sl], #-3820 @ 0xfffff114 │ │ - ldc2l 14, cr7, [sl, #960] @ 0x3c0 │ │ - ldc2l 5, cr11, [sl, #260] @ 0x104 │ │ + ldc2l 15, cr7, [sl, #116] @ 0x74 │ │ + ldc2l 5, cr11, [sl, #440] @ 0x1b8 │ │ strteq r3, [sl], #-156 @ 0xffffff64 │ │ strteq lr, [r9], #-1140 @ 0xfffffb8c │ │ strteq lr, [r9], #-1116 @ 0xfffffba4 │ │ ldc2l 2, cr7, [sp, #800] @ 0x320 │ │ - ldc2l 7, cr15, [ip, #312] @ 0x138 │ │ + ldc2l 7, cr15, [ip, #492] @ 0x1ec │ │ strteq lr, [r9], #-812 @ 0xfffffcd4 │ │ strteq lr, [r9], #-788 @ 0xfffffcec │ │ strteq lr, [r9], #-764 @ 0xfffffd04 │ │ ldc2l 13, cr6, [sp, #464] @ 0x1d0 │ │ - ldc2l 1, cr15, [ip, #1000] @ 0x3e8 │ │ + ldc2l 2, cr15, [ip, #156] @ 0x9c │ │ strteq sp, [r9], #-3528 @ 0xfffff238 │ │ strteq lr, [r9], #-740 @ 0xfffffd1c │ │ ldc2l 13, cr6, [sp, #96] @ 0x60 │ │ - ldc2l 1, cr15, [ip, #632] @ 0x278 │ │ + ldc2l 1, cr15, [ip, #812] @ 0x32c │ │ strteq sp, [r9], #-3436 @ 0xfffff294 │ │ strteq lr, [r9], #-716 @ 0xfffffd34 │ │ ldc2l 12, cr6, [sp, #416] @ 0x1a0 │ │ - ldc2l 0, cr15, [ip, #952] @ 0x3b8 │ │ + ldc2l 1, cr15, [ip, #108] @ 0x6c │ │ strteq sp, [r9], #-3260 @ 0xfffff344 │ │ strteq lr, [r9], #-692 @ 0xfffffd4c │ │ ldc2l 12, cr6, [sp, #16] │ │ - ldc2l 0, cr15, [ip, #552] @ 0x228 │ │ + ldc2l 0, cr15, [ip, #732] @ 0x2dc │ │ strteq sp, [r9], #-3160 @ 0xfffff3a8 │ │ strteq lr, [r9], #-668 @ 0xfffffd64 │ │ ldc2l 11, cr6, [sp, #656] @ 0x290 @ │ │ - ldc2l 0, cr15, [ip, #168] @ 0xa8 │ │ + ldc2l 0, cr15, [ip, #348] @ 0x15c │ │ strteq sp, [r9], #-3064 @ 0xfffff408 │ │ strteq lr, [r9], #-644 @ 0xfffffd7c │ │ ldc2l 11, cr6, [sp, #336] @ 0x150 @ │ │ - ldc2l 15, cr14, [ip, #872] @ 0x368 │ │ + ldc2l 0, cr15, [ip, #28] │ │ strteq sp, [r9], #-2984 @ 0xfffff458 │ │ strteq lr, [r9], #-620 @ 0xfffffd94 │ │ ldc2l 10, cr6, [sp, #992] @ 0x3e0 @ │ │ - ldc2l 15, cr14, [ip, #504] @ 0x1f8 │ │ + ldc2l 15, cr14, [ip, #684] @ 0x2ac │ │ strteq sp, [r9], #-2892 @ 0xfffff4b4 │ │ strteq lr, [r9], #-592 @ 0xfffffdb0 │ │ ldc2l 10, cr6, [sp, #592] @ 0x250 @ │ │ - ldc2l 15, cr14, [ip, #104] @ 0x68 │ │ + ldc2l 15, cr14, [ip, #284] @ 0x11c │ │ strteq sp, [r9], #-2784 @ 0xfffff520 │ │ - ldc2l 0, cr11, [ip, #436] @ 0x1b4 │ │ - ldc2l 14, cr14, [ip, #872] @ 0x368 │ │ + ldc2l 0, cr11, [ip, #616] @ 0x268 │ │ + ldc2l 15, cr14, [ip, #28] │ │ strteq r1, [sl], #-2688 @ 0xfffff580 │ │ strteq r2, [sl], #-2628 @ 0xfffff5bc │ │ eoreq r1, lr, r0, lsr #21 │ │ strteq r2, [sl], #-2372 @ 0xfffff6bc │ │ strteq r2, [sl], #-2352 @ 0xfffff6d0 │ │ - ldc2l 0, cr14, [r9, #292] @ 0x124 │ │ + ldc2l 0, cr14, [r9, #472] @ 0x1d8 │ │ strteq r2, [sl], #-152 @ 0xffffff68 │ │ strteq r2, [sl], #-2284 @ 0xfffff714 │ │ - ldc2l 10, cr9, [ip, #812] @ 0x32c @ │ │ + ldc2l 10, cr9, [ip, #992] @ 0x3e0 @ │ │ strteq r2, [sl], #-2224 @ 0xfffff750 │ │ - ldc2l 13, cr7, [ip, #160] @ 0xa0 │ │ + ldc2l 13, cr7, [ip, #340] @ 0x154 │ │ strteq r2, [sl], #-2168 @ 0xfffff788 │ │ - ldc2l 0, cr4, [fp, #756] @ 0x2f4 │ │ + ldc2l 0, cr4, [fp, #936] @ 0x3a8 │ │ strteq r2, [sl], #-2104 @ 0xfffff7c8 │ │ - ldc2l 15, cr5, [fp, #592] @ 0x250 │ │ + ldc2l 15, cr5, [fp, #772] @ 0x304 │ │ strteq r2, [sl], #-2044 @ 0xfffff804 │ │ ldc2l 6, cr5, [sp, #632] @ 0x278 │ │ strteq r2, [sl], #-1988 @ 0xfffff83c │ │ - ldc2l 5, cr1, [sp, #352] @ 0x160 │ │ + ldc2l 5, cr1, [sp, #532] @ 0x214 │ │ strteq r2, [sl], #-2048 @ 0xfffff800 │ │ - ldc2l 14, cr13, [r9, #660] @ 0x294 │ │ + ldc2l 14, cr13, [r9, #840] @ 0x348 │ │ strteq r2, [sl], #-2112 @ 0xfffff7c0 │ │ strteq r2, [sl], #-1976 @ 0xfffff848 │ │ - ldc2l 9, cr9, [ip, #86] @ 0x56 @ │ │ + ldc2l 9, cr9, [ip, #176] @ 0xb0 @ │ │ strteq r2, [sl], #-1920 @ 0xfffff880 │ │ - ldc2l 11, cr7, [ip, #496] @ 0x1f0 @ │ │ + ldc2l 11, cr7, [ip, #676] @ 0x2a4 @ │ │ strteq r2, [sl], #-1860 @ 0xfffff8bc │ │ - ldc2l 15, cr3, [fp, #100] @ 0x64 │ │ + ldc2l 15, cr3, [fp, #280] @ 0x118 │ │ strteq r2, [sl], #-1804 @ 0xfffff8f4 │ │ - ldc2l 13, cr5, [fp, #944] @ 0x3b0 │ │ + ldc2l 14, cr5, [fp, #100] @ 0x64 │ │ strteq r2, [sl], #-1744 @ 0xfffff930 │ │ ldc2l 4, cr5, [sp, #984] @ 0x3d8 │ │ strteq r2, [sl], #-1688 @ 0xfffff968 │ │ - ldc2l 3, cr1, [sp, #672] @ 0x2a0 │ │ + ldc2l 3, cr1, [sp, #852] @ 0x354 │ │ eoreq r1, lr, ip, lsr r7 │ │ strteq r2, [sl], #-1496 @ 0xfffffa28 │ │ strteq r2, [sl], #-1684 @ 0xfffff96c │ │ │ │ 02477f38 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ @@ -1360593,22 +1360592,22 @@ │ │ add r0, pc, r0 │ │ str r1, [r4] │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 9, cr3, [sl, #68] @ 0x44 @ │ │ - ldc2l 8, cr3, [sl, #616] @ 0x268 │ │ - ldc2l 10, cr1, [sl, #352] @ 0x160 @ │ │ - ldc2l 14, cr10, [sl, #20] │ │ - ldc2l 5, cr13, [r9, #172] @ 0xac │ │ - ldc2l 7, cr3, [sl, #552] @ 0x228 │ │ - ldc2l 6, cr3, [sl, #696] @ 0x2b8 │ │ - ldc2l 4, cr3, [sl, #536] @ 0x218 │ │ + ldc2l 9, cr3, [sl, #158] @ 0x9e @ │ │ + vcadd.f32 , q13, , #270 │ │ + ldc2l 10, cr1, [sl, #532] @ 0x214 @ │ │ + ldc2l 14, cr10, [sl, #200] @ 0xc8 │ │ + ldc2l 5, cr13, [r9, #352] @ 0x160 │ │ + ldc2l 7, cr3, [sl, #732] @ 0x2dc │ │ + ldc2l 6, cr3, [sl, #876] @ 0x36c │ │ + ldc2l 4, cr3, [sl, #716] @ 0x2cc │ │ │ │ 0247842c : │ │ ldr r0, [r0, #40] @ 0x28 │ │ bx lr │ │ │ │ 02478434 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ @@ -1360892,41 +1360891,41 @@ │ │ mov r2, #1 │ │ mov r3, r5 │ │ bl 270d9f0 │ │ ldr r0, [pc, #108] @ 247890c │ │ mov r1, #18 │ │ add r0, pc, r0 │ │ b 2478778 │ │ - ldc2l 13, cr0, [ip, #976] @ 0x3d0 │ │ - ldc2l 12, cr0, [ip, #844] @ 0x34c │ │ - ldc2l 9, cr10, [sl, #42] @ 0x2a @ │ │ - ldc2l 1, cr3, [fp, #416] @ 0x1a0 │ │ - ldc2l 13, cr2, [ip, #992] @ 0x3e0 │ │ - ldc2l 2, cr3, [fp, #544] @ 0x220 │ │ - ldc2l 15, cr8, [sl, #288] @ 0x120 │ │ - ldc2l 3, cr0, [sp, #72] @ 0x48 │ │ - ldc2l 2, cr1, [fp, #224] @ 0xe0 │ │ - ldc2l 13, cr4, [ip, #664] @ 0x298 │ │ - ldc2l 9, cr10, [sl, #202] @ 0xca @ │ │ - ldc2l 0, cr5, [fp, #764] @ 0x2fc │ │ + ldc2l 14, cr0, [ip, #132] @ 0x84 │ │ + ldc2l 13, cr0, [ip] │ │ + ldc2l 9, cr10, [sl, #132] @ 0x84 @ │ │ + ldc2l 1, cr3, [fp, #596] @ 0x254 │ │ + ldc2l 14, cr2, [ip, #148] @ 0x94 │ │ + ldc2l 2, cr3, [fp, #724] @ 0x2d4 │ │ + ldc2l 15, cr8, [sl, #468] @ 0x1d4 │ │ + ldc2l 3, cr0, [sp, #252] @ 0xfc │ │ + ldc2l 2, cr1, [fp, #404] @ 0x194 │ │ + ldc2l 13, cr4, [ip, #844] @ 0x34c │ │ + ldc2l 9, cr10, [sl, #292] @ 0x124 @ │ │ + ldc2l 0, cr5, [fp, #944] @ 0x3b0 │ │ ldc2l 14, cr7, [sp, #520] @ 0x208 │ │ - vcadd.f32 d26, d26, d5, #270 │ │ - ldc2l 9, cr14, [fp, #404] @ 0x194 @ │ │ - ldc2l 7, cr10, [sl, #660] @ 0x294 │ │ - ldc2l 1, cr3, [sl, #36] @ 0x24 │ │ - ldc2l 9, cr3, [ip, #38] @ 0x26 @ │ │ - ldc2l 15, cr12, [r9, #196] @ 0xc4 │ │ - ldc2l 6, cr10, [sl, #708] @ 0x2c4 │ │ - ldc2l 1, cr2, [sp, #988] @ 0x3dc │ │ - ldc2l 4, cr15, [ip, #752] @ 0x2f0 │ │ - ldc2l 1, cr9, [sl, #164] @ 0xa4 │ │ - ldc2l 3, cr14, [ip, #344] @ 0x158 │ │ - ldc2l 6, cr10, [sl, #292] @ 0x124 │ │ - ldc2l 15, cr14, [r9, #88] @ 0x58 │ │ - ldc2l 10, cr0, [ip, #880] @ 0x370 @ │ │ + ldc2l 8, cr10, [sl, #712] @ 0x2c8 │ │ + ldc2l 9, cr14, [fp, #494] @ 0x1ee @ │ │ + ldc2l 7, cr10, [sl, #840] @ 0x348 │ │ + ldc2l 1, cr3, [sl, #216] @ 0xd8 │ │ + ldc2l 9, cr3, [ip, #128] @ 0x80 @ │ │ + ldc2l 15, cr12, [r9, #376] @ 0x178 │ │ + ldc2l 6, cr10, [sl, #888] @ 0x378 │ │ + ldc2l 2, cr2, [sp, #144] @ 0x90 │ │ + ldc2l 4, cr15, [ip, #932] @ 0x3a4 │ │ + ldc2l 1, cr9, [sl, #344] @ 0x158 │ │ + ldc2l 3, cr14, [ip, #524] @ 0x20c │ │ + ldc2l 6, cr10, [sl, #472] @ 0x1d8 │ │ + ldc2l 15, cr14, [r9, #268] @ 0x10c │ │ + ldc2l 11, cr0, [ip, #36] @ 0x24 @ │ │ │ │ 02478914 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ bl 270f5d0 │ │ add r5, r4, #24 │ │ @@ -1360963,17 +1360962,17 @@ │ │ mov r0, r5 │ │ mov r2, r4 │ │ mov r3, #17 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 13, cr8, [sl, #528] @ 0x210 │ │ - ldc2l 0, cr11, [sl, #260] @ 0x104 │ │ - ldc2l 9, cr0, [ip, #370] @ 0x172 @ │ │ + ldc2l 13, cr8, [sl, #708] @ 0x2c4 │ │ + ldc2l 0, cr11, [sl, #440] @ 0x1b8 │ │ + ldc2l 9, cr0, [ip, #460] @ 0x1cc @ │ │ │ │ 024789c0 : │ │ ldr r0, [r0] │ │ bx lr │ │ │ │ 024789c8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ @@ -1361663,117 +1361662,117 @@ │ │ bl 270f280 │ │ ldr r1, [pc, #188] @ 2479540 │ │ mov r0, r4 │ │ mov r2, #255 @ 0xff │ │ mov r3, #73 @ 0x49 │ │ add r1, pc, r1 │ │ b 2478e80 │ │ - ldc2l 12, cr12, [sl, #140] @ 0x8c │ │ - ldc2l 6, cr1, [sp, #900] @ 0x384 │ │ - ldc2l 11, cr6, [sl, #896] @ 0x380 @ │ │ + ldc2l 12, cr12, [sl, #320] @ 0x140 │ │ + ldc2l 7, cr1, [sp, #56] @ 0x38 │ │ + ldc2l 12, cr6, [sl, #52] @ 0x34 │ │ strteq r1, [sl], #-2024 @ 0xfffff818 │ │ strteq r1, [sl], #-1976 @ 0xfffff848 │ │ strteq r1, [sl], #-1952 @ 0xfffff860 │ │ - ldc2l 4, cr2, [ip, #616] @ 0x268 │ │ - ldc2l 15, cr6, [sl, #184] @ 0xb8 │ │ + ldc2l 4, cr2, [ip, #796] @ 0x31c │ │ + ldc2l 15, cr6, [sl, #364] @ 0x16c │ │ strteq r1, [sl], #-1880 @ 0xfffff8a8 │ │ strteq r1, [sl], #-384 @ 0xfffffe80 │ │ strteq r1, [sl], #-380 @ 0xfffffe84 │ │ - ldc2l 15, cr3, [sl, #468] @ 0x1d4 │ │ - ldc2l 11, cr13, [ip, #404] @ 0x194 @ │ │ + ldc2l 15, cr3, [sl, #648] @ 0x288 │ │ + ldc2l 11, cr13, [ip, #584] @ 0x248 @ │ │ strteq r1, [sl], #-300 @ 0xfffffed4 │ │ strteq r1, [sl], #-296 @ 0xfffffed8 │ │ strteq r1, [sl], #-276 @ 0xfffffeec │ │ strteq r1, [sl], #-264 @ 0xfffffef8 │ │ ldc2l 14, cr4, [sp, #568] @ 0x238 │ │ - ldc2l 5, cr1, [sp, #1016] @ 0x3f8 │ │ + ldc2l 6, cr1, [sp, #172] @ 0xac │ │ strteq r1, [sl], #-1608 @ 0xfffff9b8 │ │ strteq r1, [sl], #-1608 @ 0xfffff9b8 │ │ strteq r1, [sl], #-252 @ 0xffffff04 │ │ strteq r1, [sl], #-168 @ 0xffffff58 │ │ - ldc2l 13, cr1, [ip, #648] @ 0x288 │ │ - ldc2l 8, cr6, [sl, #232] @ 0xe8 │ │ + ldc2l 13, cr1, [ip, #828] @ 0x33c │ │ + vcadd.f32 q11, q5, , #270 │ │ strteq r1, [sl], #-116 @ 0xffffff8c │ │ - ldc2l 6, cr2, [sl, #640] @ 0x280 │ │ - ldc2l 15, cr13, [fp, #464] @ 0x1d0 │ │ - ldc2l 5, cr14, [sl, #768] @ 0x300 │ │ + ldc2l 6, cr2, [sl, #820] @ 0x334 │ │ + ldc2l 15, cr13, [fp, #644] @ 0x284 │ │ + ldc2l 5, cr14, [sl, #948] @ 0x3b4 │ │ strteq r0, [sl], #-4048 @ 0xfffff030 │ │ - ldc2l 12, cr1, [ip, #808] @ 0x328 │ │ - ldc2l 7, cr6, [sl, #392] @ 0x188 │ │ + ldc2l 12, cr1, [ip, #988] @ 0x3dc │ │ + ldc2l 7, cr6, [sl, #572] @ 0x23c │ │ strteq r0, [sl], #-3984 @ 0xfffff070 │ │ - ldc2l 12, cr1, [ip, #552] @ 0x228 │ │ - ldc2l 7, cr6, [sl, #136] @ 0x88 │ │ + ldc2l 12, cr1, [ip, #732] @ 0x2dc │ │ + ldc2l 7, cr6, [sl, #316] @ 0x13c │ │ eoreq pc, sp, r4, lsl #27 │ │ - ldc2l 14, cr7, [sl, #352] @ 0x160 │ │ + ldc2l 14, cr7, [sl, #532] @ 0x214 │ │ strteq r0, [sl], #-3860 @ 0xfffff0ec │ │ - ldc2l 12, cr1, [ip, #56] @ 0x38 │ │ - ldc2l 6, cr6, [sl, #664] @ 0x298 │ │ + ldc2l 12, cr1, [ip, #236] @ 0xec │ │ + ldc2l 6, cr6, [sl, #844] @ 0x34c │ │ strteq r0, [sl], #-3772 @ 0xfffff144 │ │ strteq r0, [sl], #-3768 @ 0xfffff148 │ │ - ldc2l 14, cr9, [fp, #604] @ 0x25c │ │ - ldc2l 8, cr9, [ip, #732] @ 0x2dc │ │ + ldc2l 14, cr9, [fp, #784] @ 0x310 │ │ + vcadd.f32 , q14, q10, #270 │ │ strteq r1, [sl], #-1588 @ 0xfffff9cc │ │ strteq r1, [sl], #-1696 @ 0xfffff960 │ │ strteq r1, [sl], #-1688 @ 0xfffff968 │ │ strteq r1, [sl], #-896 @ 0xfffffc80 │ │ strteq r1, [sl], #-888 @ 0xfffffc88 │ │ strteq r1, [sl], #-1684 @ 0xfffff96c │ │ strteq r1, [sl], #-1780 @ 0xfffff90c │ │ strteq r1, [sl], #-1776 @ 0xfffff910 │ │ - ldc2l 0, cr10, [fp, #228] @ 0xe4 │ │ - ldc2l 1, cr12, [fp, #340] @ 0x154 │ │ - ldc2l 2, cr8, [sl, #896] @ 0x380 │ │ + ldc2l 0, cr10, [fp, #408] @ 0x198 │ │ + ldc2l 1, cr12, [fp, #520] @ 0x208 │ │ + ldc2l 3, cr8, [sl, #52] @ 0x34 │ │ strdeq r0, [lr], -r4 @ │ │ strteq r2, [sl], #-868 @ 0xfffffc9c │ │ strteq r1, [sl], #-1116 @ 0xfffffba4 │ │ strteq r1, [sl], #-1112 @ 0xfffffba8 │ │ strteq r1, [sl], #-584 @ 0xfffffdb8 │ │ - ldc2l 9, cr15, [ip, #22] @ │ │ - ldc2l 2, cr14, [r9, #76] @ 0x4c │ │ + ldc2l 9, cr15, [ip, #112] @ 0x70 @ │ │ + ldc2l 2, cr14, [r9, #256] @ 0x100 │ │ strteq r1, [sl], #-1492 @ 0xfffffa2c │ │ strteq r2, [sl], #-588 @ 0xfffffdb4 │ │ strteq r2, [sl], #-3780 @ 0xfffff13c │ │ - ldc2l 2, cr2, [fp, #772] @ 0x304 │ │ + ldc2l 2, cr2, [fp, #952] @ 0x3b8 │ │ eoreq pc, sp, ip, lsr #25 │ │ - ldc2l 5, cr12, [sl, #648] @ 0x288 │ │ - ldc2l 5, cr6, [sl, #744] @ 0x2e8 │ │ + ldc2l 5, cr12, [sl, #828] @ 0x33c │ │ + ldc2l 5, cr6, [sl, #924] @ 0x39c │ │ strteq r1, [sl], #-2784 @ 0xfffff520 │ │ strteq r1, [sl], #-1440 @ 0xfffffa60 │ │ - ldc2l 9, cr2, [fp, #426] @ 0x1aa @ │ │ + ldc2l 10, cr2, [fp, #8] @ │ │ strhteq r0, [lr], -ip │ │ strteq r1, [sl], #-1392 @ 0xfffffa90 │ │ strteq r1, [sl], #-1376 @ 0xfffffaa0 │ │ - vcadd.f32 d18, d11, d8, #270 │ │ + ldc2l 8, cr2, [fp, #212] @ 0xd4 │ │ strdeq r0, [lr], -r0 @ │ │ strteq r2, [sl], #-2980 @ 0xfffff45c │ │ - ldc2l 6, cr6, [fp, #136] @ 0x88 │ │ + ldc2l 6, cr6, [fp, #316] @ 0x13c │ │ strteq r1, [sl], #-860 @ 0xfffffca4 │ │ strteq r1, [sl], #-840 @ 0xfffffcb8 │ │ strteq r2, [sl], #-3136 @ 0xfffff3c0 │ │ eoreq r0, lr, r0, asr r0 │ │ - ldc2l 6, cr2, [fp, #52] @ 0x34 │ │ - ldc2l 14, cr1, [ip, #712] @ 0x2c8 │ │ - ldc2l 9, cr6, [sl, #148] @ 0x94 @ │ │ + ldc2l 6, cr2, [fp, #232] @ 0xe8 │ │ + ldc2l 14, cr1, [ip, #892] @ 0x37c │ │ + ldc2l 9, cr6, [sl, #238] @ 0xee @ │ │ strteq r1, [sl], #-516 @ 0xfffffdfc │ │ strteq r1, [sl], #-808 @ 0xfffffcd8 │ │ - ldc2l 7, cr2, [fp, #324] @ 0x144 │ │ + ldc2l 7, cr2, [fp, #504] @ 0x1f8 │ │ eoreq r0, lr, r8, lsr r1 │ │ strteq r1, [sl], #-760 @ 0xfffffd08 │ │ strteq r1, [sl], #-744 @ 0xfffffd18 │ │ ldc2l 13, cr3, [sp, #932] @ 0x3a4 │ │ mlaeq lr, r0, r0, r0 │ │ strteq r1, [sl], #-1352 @ 0xfffffab8 │ │ strteq r1, [sl], #-1352 @ 0xfffffab8 │ │ strteq r1, [sl], #-1356 @ 0xfffffab4 │ │ strteq r1, [sl], #-1344 @ 0xfffffac0 │ │ strteq r2, [sl], #-424 @ 0xfffffe58 │ │ strteq r1, [sl], #-1316 @ 0xfffffadc │ │ - ldc2l 12, cr6, [sl, #808] @ 0x328 │ │ - ldc2l 12, cr12, [sl, #600] @ 0x258 │ │ - ldc2l 1, cr2, [ip, #1016] @ 0x3f8 │ │ + ldc2l 12, cr6, [sl, #988] @ 0x3dc │ │ + ldc2l 12, cr12, [sl, #780] @ 0x30c │ │ + ldc2l 2, cr2, [ip, #172] @ 0xac │ │ strteq r1, [sl], #-1660 @ 0xfffff984 │ │ strteq r1, [sl], #-1640 @ 0xfffff998 │ │ strteq r1, [sl], #-1656 @ 0xfffff988 │ │ │ │ 0247963c : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ @@ -1361789,17 +1361788,17 @@ │ │ mov r0, r4 │ │ mov r2, #6 │ │ mov r3, #69 @ 0x45 │ │ add r1, pc, r1 │ │ bl 270f280 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 3, cr12, [sl, #284] @ 0x11c │ │ - ldc2l 14, cr0, [sp, #20] │ │ - ldc2l 3, cr6, [sl, #16] │ │ + ldc2l 3, cr12, [sl, #464] @ 0x1d0 │ │ + ldc2l 14, cr0, [sp, #200] @ 0xc8 │ │ + ldc2l 3, cr6, [sl, #196] @ 0xc4 │ │ │ │ 02479690 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #24 │ │ mov r3, r0 │ │ mov r0, #0 │ │ @@ -1361967,17 +1361966,17 @@ │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ strteq r0, [sl], #-2496 @ 0xfffff640 │ │ strteq r0, [sl], #-2496 @ 0xfffff640 │ │ strteq r0, [sl], #-2500 @ 0xfffff63c │ │ strteq r0, [sl], #-2488 @ 0xfffff648 │ │ strteq r1, [sl], #-1568 @ 0xfffff9e0 │ │ strteq r0, [sl], #-2460 @ 0xfffff664 │ │ - ldc2l 1, cr6, [sl, #264] @ 0x108 │ │ - ldc2l 0, cr12, [sl, #888] @ 0x378 │ │ - ldc2l 6, cr1, [ip, #280] @ 0x118 │ │ + ldc2l 1, cr6, [sl, #444] @ 0x1bc │ │ + ldc2l 1, cr12, [sl, #44] @ 0x2c │ │ + ldc2l 6, cr1, [ip, #460] @ 0x1cc │ │ │ │ 02479920 : │ │ ldr r0, [pc, #44] @ 2479954 │ │ mov r3, #0 │ │ ldr r1, [pc, #40] @ 2479958 │ │ ldr r2, [pc, #40] @ 247995c │ │ add r0, pc, r0 │ │ @@ -1362393,18 +1362392,18 @@ │ │ bl 270d8c0 │ │ mvn r0, #0 │ │ pop {r4, r5, fp, pc} │ │ eoreq r1, ip, ip, lsl #10 │ │ eoreq r1, ip, r8, lsr r5 │ │ eoreq r1, ip, ip, asr #11 │ │ eoreq r1, ip, r8, ror #9 │ │ - ldc2l 13, cr14, [ip, #256] @ 0x100 │ │ + ldc2l 13, cr14, [ip, #436] @ 0x1b4 │ │ eoreq r1, ip, r8, ror #8 │ │ eoreq r1, ip, r8, asr #8 │ │ - ldc2l 13, cr14, [ip, #160] @ 0xa0 │ │ + ldc2l 13, cr14, [ip, #340] @ 0x154 │ │ eoreq r1, ip, r8, lsl #11 │ │ eoreq r1, ip, r4, lsr #9 │ │ │ │ 02479fac : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ ldr ip, [r0] │ │ @@ -1362478,19 +1362477,19 @@ │ │ add r1, pc, r1 │ │ bl 270d8c0 │ │ mvn r0, #0 │ │ pop {r4, sl, fp, pc} │ │ mlaeq ip, r0, r3, r1 │ │ ldrdeq r1, [ip], -r4 @ │ │ eoreq r1, ip, r4, lsl #7 │ │ - ldc2l 4, cr7, [fp, #32] │ │ + ldc2l 4, cr7, [fp, #212] @ 0xd4 │ │ eoreq r1, ip, r0, asr r3 │ │ eoreq r1, ip, r4, lsr r3 │ │ eoreq r1, ip, r0, lsl r3 │ │ - ldc2l 3, cr7, [fp, #960] @ 0x3c0 │ │ + ldc2l 4, cr7, [fp, #116] @ 0x74 │ │ │ │ 0247a0f4 : │ │ ldr r3, [pc, #20] @ 247a110 │ │ ldr r3, [pc, r3] │ │ ldr r3, [r3] │ │ cmp r3, #0 │ │ beq 247a10c │ │ @@ -1363133,111 +1363132,111 @@ │ │ mov r1, #6 │ │ bl 270ce40 │ │ vmov r0, r1, d8 │ │ sub sp, fp, #80 @ 0x50 │ │ vpop {d8-d13} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 4, cr5, [fp, #384] @ 0x180 │ │ + ldc2l 4, cr5, [fp, #564] @ 0x234 │ │ strteq r1, [sl], #-2508 @ 0xfffff634 │ │ strteq r1, [sl], #-2644 @ 0xfffff5ac │ │ strteq r1, [sl], #-2628 @ 0xfffff5bc │ │ strteq r1, [sl], #-2792 @ 0xfffff518 │ │ strteq r1, [sl], #-2692 @ 0xfffff57c │ │ - ldc2l 6, cr13, [sl, #216] @ 0xd8 │ │ - ldc2l 11, cr8, [ip, #660] @ 0x294 @ │ │ - ldc2l 14, cr14, [fp, #708] @ 0x2c4 │ │ - ldc2l 13, cr10, [fp, #536] @ 0x218 │ │ + ldc2l 6, cr13, [sl, #396] @ 0x18c │ │ + ldc2l 11, cr8, [ip, #840] @ 0x348 @ │ │ + ldc2l 14, cr14, [fp, #888] @ 0x378 │ │ + ldc2l 13, cr10, [fp, #716] @ 0x2cc │ │ ldc2l 3, cr6, [sp, #168] @ 0xa8 │ │ strteq r1, [sl], #-2464 @ 0xfffff660 │ │ - ldc2l 7, cr15, [r9, #328] @ 0x148 │ │ - ldc2l 9, cr15, [r9, #58] @ 0x3a @ │ │ - ldc2l 11, cr8, [ip, #68] @ 0x44 @ │ │ - ldc2l 2, cr3, [sl, #484] @ 0x1e4 │ │ + ldc2l 7, cr15, [r9, #508] @ 0x1fc │ │ + ldc2l 9, cr15, [r9, #148] @ 0x94 @ │ │ + ldc2l 11, cr8, [ip, #248] @ 0xf8 @ │ │ + ldc2l 2, cr3, [sl, #664] @ 0x298 │ │ eoreq lr, sp, ip, lsr #28 │ │ eoreq lr, sp, r8, lsl lr │ │ eoreq lr, sp, r0, lsl #28 │ │ strteq r1, [sl], #-2164 @ 0xfffff78c │ │ strteq r1, [sl], #-2340 @ 0xfffff6dc │ │ - ldc2l 2, cr5, [fp, #592] @ 0x250 │ │ + ldc2l 2, cr5, [fp, #772] @ 0x304 │ │ eoreq lr, sp, r4, ror #26 │ │ - ldc2l 2, cr5, [fp, #448] @ 0x1c0 │ │ + ldc2l 2, cr5, [fp, #628] @ 0x274 │ │ strteq r1, [sl], #-2276 @ 0xfffff71c │ │ strteq r1, [sl], #-2008 @ 0xfffff828 │ │ ldc2l 1, cr4, [sp, #904] @ 0x388 │ │ eoreq lr, sp, r0, lsl #23 │ │ strteq r1, [sl], #-1836 @ 0xfffff8d4 │ │ - ldc2l 13, cr8, [r9, #104] @ 0x68 │ │ + ldc2l 13, cr8, [r9, #284] @ 0x11c │ │ strteq r1, [sl], #-1440 @ 0xfffffa60 │ │ ldc2l 7, cr2, [sp, #924] @ 0x39c │ │ strteq r1, [sl], #-1540 @ 0xfffff9fc │ │ - ldc2l 1, cr1, [fp, #392] @ 0x188 │ │ + ldc2l 1, cr1, [fp, #572] @ 0x23c │ │ strdeq lr, [sp], -r0 @ │ │ strteq r1, [sl], #-1356 @ 0xfffffab4 │ │ - ldc2l 15, cr4, [fp, #608] @ 0x260 │ │ + ldc2l 15, cr4, [fp, #788] @ 0x314 │ │ strteq r1, [sl], #-1296 @ 0xfffffaf0 │ │ eoreq lr, sp, r4, lsr sl │ │ - ldc2l 14, cr4, [fp, #992] @ 0x3e0 │ │ + ldc2l 15, cr4, [fp, #148] @ 0x94 │ │ eoreq lr, sp, ip, lsl #20 │ │ eoreq lr, sp, r4, asr #19 │ │ strteq r1, [sl], #-1124 @ 0xfffffb9c │ │ strteq r1, [sl], #-1224 @ 0xfffffb38 │ │ - ldc2l 5, cr12, [ip, #472] @ 0x1d8 │ │ - ldc2l 2, cr9, [sl, #716] @ 0x2cc │ │ - ldc2l 0, cr15, [sl, #252] @ 0xfc │ │ - ldc2l 15, cr2, [sl, #752] @ 0x2f0 │ │ - ldc2l 5, cr14, [ip, #392] @ 0x188 │ │ - ldc2l 12, cr2, [ip, #44] @ 0x2c │ │ + ldc2l 5, cr12, [ip, #652] @ 0x28c │ │ + ldc2l 2, cr9, [sl, #896] @ 0x380 │ │ + ldc2l 0, cr15, [sl, #432] @ 0x1b0 │ │ + ldc2l 15, cr2, [sl, #932] @ 0x3a4 │ │ + ldc2l 5, cr14, [ip, #572] @ 0x23c │ │ + ldc2l 12, cr2, [ip, #224] @ 0xe0 │ │ eoreq lr, sp, r4, lsl #19 │ │ - ldc2l 7, cr8, [sl, #52] @ 0x34 │ │ + ldc2l 7, cr8, [sl, #232] @ 0xe8 │ │ mlaeq sp, r0, r8, lr │ │ eoreq lr, sp, r8, ror #16 │ │ - ldc2l 6, cr8, [sl, #884] @ 0x374 │ │ + ldc2l 7, cr8, [sl, #40] @ 0x28 │ │ eoreq lr, sp, ip, lsr r8 │ │ - ldc2l 6, cr8, [sl, #708] @ 0x2c4 │ │ + ldc2l 6, cr8, [sl, #888] @ 0x378 │ │ eoreq lr, sp, r0, lsl r8 │ │ - ldc2l 6, cr8, [sl, #532] @ 0x214 │ │ - ldc2l 14, cr10, [r9, #196] @ 0xc4 │ │ - ldc2l 8, cr6, [sl, #736] @ 0x2e0 │ │ - ldc2l 2, cr13, [r9, #884] @ 0x374 │ │ - ldc2l 13, cr4, [fp, #272] @ 0x110 │ │ + ldc2l 6, cr8, [sl, #712] @ 0x2c8 │ │ + ldc2l 14, cr10, [r9, #376] @ 0x178 │ │ + vcadd.f32 q11, q13, , #270 │ │ + ldc2l 3, cr13, [r9, #40] @ 0x28 │ │ + ldc2l 13, cr4, [fp, #452] @ 0x1c4 │ │ strteq r1, [sl], #-568 @ 0xfffffdc8 │ │ eoreq lr, sp, r8, lsr #26 │ │ - ldc2l 3, cr1, [fp, #320] @ 0x140 │ │ + ldc2l 3, cr1, [fp, #500] @ 0x1f4 │ │ strteq r1, [sl], #-1856 @ 0xfffff8c0 │ │ - ldc2l 5, cr15, [r9, #300] @ 0x12c │ │ - vcadd.f32 q12, q5, , #270 │ │ - ldc2l 12, cr14, [fp, #956] @ 0x3bc │ │ - ldc2l 15, cr4, [fp, #192] @ 0xc0 │ │ + ldc2l 5, cr15, [r9, #480] @ 0x1e0 │ │ + ldc2l 8, cr8, [sl, #600] @ 0x258 │ │ + ldc2l 13, cr14, [fp, #112] @ 0x70 │ │ + ldc2l 15, cr4, [fp, #372] @ 0x174 │ │ strteq r1, [sl], #-2028 @ 0xfffff814 │ │ - ldc2l 9, cr8, [ip, #2] @ │ │ + ldc2l 9, cr8, [ip, #92] @ 0x5c @ │ │ strteq r1, [sl], #-1032 @ 0xfffffbf8 │ │ - ldc2l 10, cr10, [fp, #952] @ 0x3b8 @ │ │ + ldc2l 11, cr10, [fp, #108] @ 0x6c @ │ │ strteq r1, [sl], #-896 @ 0xfffffc80 │ │ - ldc2l 3, cr13, [sl, #168] @ 0xa8 │ │ - vcadd.f32 d24, d28, d17, #270 │ │ - ldc2l 6, cr15, [r9, #468] @ 0x1d4 │ │ + ldc2l 3, cr13, [sl, #348] @ 0x15c │ │ + vcadd.f32 q12, q14, q7, #270 │ │ + ldc2l 6, cr15, [r9, #648] @ 0x288 │ │ strteq r1, [sl], #-1916 @ 0xfffff884 │ │ strteq r1, [sl], #-1708 @ 0xfffff954 │ │ strteq r1, [sl], #-664 @ 0xfffffd68 │ │ strteq r1, [sl], #-768 @ 0xfffffd00 │ │ strteq r1, [sl], #-596 @ 0xfffffdac │ │ strteq r1, [sl], #-516 @ 0xfffffdfc │ │ strteq r1, [sl], #-620 @ 0xfffffd94 │ │ strteq r1, [sl], #-448 @ 0xfffffe40 │ │ - ldc2l 3, cr8, [ip, #628] @ 0x274 │ │ + ldc2l 3, cr8, [ip, #808] @ 0x328 │ │ strteq r1, [sl], #-496 @ 0xfffffe10 │ │ - ldc2l 5, cr10, [fp, #568] @ 0x238 │ │ + ldc2l 5, cr10, [fp, #748] @ 0x2ec │ │ strteq r1, [sl], #-448 @ 0xfffffe40 │ │ - ldc2l 13, cr12, [sl, #808] @ 0x328 │ │ - ldc2l 3, cr8, [ip, #260] @ 0x104 │ │ - ldc2l 1, cr15, [r9, #84] @ 0x54 │ │ + ldc2l 13, cr12, [sl, #988] @ 0x3dc │ │ + ldc2l 3, cr8, [ip, #440] @ 0x1b8 │ │ + ldc2l 1, cr15, [r9, #264] @ 0x108 │ │ strteq r1, [sl], #-348 @ 0xfffffea4 │ │ strteq r1, [sl], #-524 @ 0xfffffdf4 │ │ - ldc2l 10, cr4, [fp, #848] @ 0x350 @ │ │ + ldc2l 11, cr4, [fp, #4] @ │ │ │ │ 0247ac90 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ mov r7, r3 │ │ mov r4, r2 │ │ @@ -1363493,21 +1363492,21 @@ │ │ mla r0, r0, r2, r1 │ │ mov r1, sl │ │ bl 270d970 │ │ add r8, r8, #1 │ │ add r9, r9, #1 │ │ ldr r7, [sp, #4] │ │ b 247ae88 │ │ - ldc2l 6, cr4, [ip, #616] @ 0x268 │ │ - ldc2l 3, cr2, [ip, #512] @ 0x200 │ │ - ldc2l 1, cr8, [sl, #516] @ 0x204 │ │ + ldc2l 6, cr4, [ip, #796] @ 0x31c │ │ + ldc2l 3, cr2, [ip, #692] @ 0x2b4 │ │ + ldc2l 1, cr8, [sl, #696] @ 0x2b8 │ │ ldc2l 4, cr5, [sp, #384] @ 0x180 │ │ ldc2l 4, cr7, [r9, #480] @ 0x1e0 │ │ - ldc2l 15, cr13, [fp, #552] @ 0x228 │ │ - ldc2l 5, cr4, [ip, #136] @ 0x88 │ │ + ldc2l 15, cr13, [fp, #732] @ 0x2dc │ │ + ldc2l 5, cr4, [ip, #316] @ 0x13c │ │ │ │ 0247b0c0 : │ │ push {fp, lr} │ │ mov fp, sp │ │ bl 270d960 │ │ mov r1, #0 │ │ cmp r0, #0 │ │ @@ -1363785,27 +1363784,27 @@ │ │ ldr r0, [pc, #68] @ 247b554 │ │ mov r1, #4 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, r8 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 5, cr2, [fp, #260] @ 0x104 │ │ - ldc2l 6, cr0, [fp, #16] │ │ - ldc2l 6, cr13, [ip, #680] @ 0x2a8 │ │ - ldc2l 1, cr0, [ip, #48] @ 0x30 │ │ - ldc2l 13, cr9, [fp, #952] @ 0x3b8 │ │ - ldc2l 2, cr6, [sl, #384] @ 0x180 │ │ - ldc2l 4, cr9, [ip, #24] │ │ - ldc2l 7, cr10, [sl, #596] @ 0x254 │ │ - ldc2l 8, cr15, [ip, #380] @ 0x17c │ │ - ldc2l 5, cr12, [sl, #720] @ 0x2d0 │ │ - ldc2l 14, cr3, [ip, #48] @ 0x30 │ │ - ldc2l 1, cr4, [sl, #88] @ 0x58 │ │ - ldc2l 1, cr2, [fp, #292] @ 0x124 │ │ + ldc2l 5, cr2, [fp, #440] @ 0x1b8 │ │ + ldc2l 6, cr0, [fp, #196] @ 0xc4 │ │ + ldc2l 6, cr13, [ip, #860] @ 0x35c │ │ + ldc2l 1, cr0, [ip, #228] @ 0xe4 │ │ + ldc2l 14, cr9, [fp, #108] @ 0x6c │ │ + ldc2l 2, cr6, [sl, #564] @ 0x234 │ │ + ldc2l 4, cr9, [ip, #204] @ 0xcc │ │ + ldc2l 7, cr10, [sl, #776] @ 0x308 │ │ + vcadd.f32 d31, d28, d12, #270 │ │ + ldc2l 5, cr12, [sl, #900] @ 0x384 │ │ + ldc2l 14, cr3, [ip, #228] @ 0xe4 │ │ + ldc2l 1, cr4, [sl, #268] @ 0x10c │ │ + ldc2l 1, cr2, [fp, #472] @ 0x1d8 │ │ │ │ 0247b558 : │ │ ldr r1, [r1] │ │ mov r2, r0 │ │ mov r0, #0 │ │ cmp r1, #1 │ │ bge 247b578 │ │ @@ -1364027,19 +1364026,19 @@ │ │ ldr r0, [pc, #36] @ 247b8c4 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 9, cr11, [fp, #312] @ 0x138 @ │ │ - ldc2l 5, cr7, [ip, #500] @ 0x1f4 │ │ - ldc2l 6, cr7, [sl, #596] @ 0x254 │ │ - ldc2l 11, cr9, [sl, #780] @ 0x30c @ │ │ - ldc2l 8, cr11, [fp, #976] @ 0x3d0 │ │ + ldc2l 9, cr11, [fp, #402] @ 0x192 @ │ │ + ldc2l 5, cr7, [ip, #680] @ 0x2a8 │ │ + ldc2l 6, cr7, [sl, #776] @ 0x308 │ │ + ldc2l 11, cr9, [sl, #960] @ 0x3c0 @ │ │ + ldc2l 9, cr11, [fp, #66] @ 0x42 @ │ │ │ │ 0247b8c8 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ mov r8, r0 │ │ ldr r0, [r0] │ │ cmp r0, #2 │ │ @@ -1364196,15 +1364195,15 @@ │ │ sub r2, r9, r2 │ │ mov r3, #1 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 2, cr11, [r9, #892] @ 0x37c │ │ + ldc2l 3, cr11, [r9, #48] @ 0x30 │ │ │ │ 0247bb44 : │ │ vldmia r0, {d19-d21} │ │ mov r0, #0 │ │ vldmia r1, {d16-d18} │ │ vmul.f64 d22, d19, d17 │ │ vmul.f64 d23, d21, d16 │ │ @@ -1364433,19 +1364432,19 @@ │ │ mov r1, r0 │ │ b 247be64 │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 10, cr11, [sl, #396] @ 0x18c @ │ │ - ldc2l 9, cr15, [sl, #254] @ 0xfe @ │ │ - ldc2l 1, cr9, [fp, #644] @ 0x284 │ │ - ldc2l 1, cr9, [fp, #308] @ 0x134 │ │ - ldc2l 9, cr11, [sl, #414] @ 0x19e @ │ │ + ldc2l 10, cr11, [sl, #576] @ 0x240 @ │ │ + ldc2l 9, cr15, [sl, #344] @ 0x158 @ │ │ + ldc2l 1, cr9, [fp, #824] @ 0x338 │ │ + ldc2l 1, cr9, [fp, #488] @ 0x1e8 │ │ + ldc2l 9, cr11, [sl, #504] @ 0x1f8 @ │ │ │ │ 0247bec8 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ bl 270f060 │ │ vmov d16, r0, r1 │ │ @@ -1365041,15 +1365040,15 @@ │ │ add r2, r3, #1 │ │ cmp r5, #32 │ │ beq 247c770 │ │ b 247c74c │ │ mov r1, #0 │ │ mov r0, r1 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 6, cr10, [r9, #1004] @ 0x3ec │ │ + ldc2l 7, cr10, [r9, #160] @ 0xa0 │ │ │ │ 0247c7a0 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r5, r3 │ │ mov r6, r2 │ │ @@ -1365109,23 +1365108,23 @@ │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ ldr r0, [pc, #44] @ 247c8c4 │ │ add r0, pc, r0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 5, cr10, [ip, #884] @ 0x374 │ │ - ldc2l 5, cr10, [ip, #548] @ 0x224 │ │ - ldc2l 2, cr12, [ip, #824] @ 0x338 │ │ - ldc2l 6, cr6, [sl, #468] @ 0x1d4 │ │ - ldc2l 13, cr2, [fp, #476] @ 0x1dc │ │ + ldc2l 6, cr10, [ip, #40] @ 0x28 │ │ + ldc2l 5, cr10, [ip, #728] @ 0x2d8 │ │ + ldc2l 2, cr12, [ip, #1004] @ 0x3ec │ │ + ldc2l 6, cr6, [sl, #648] @ 0x288 │ │ + ldc2l 13, cr2, [fp, #656] @ 0x290 │ │ strhteq sp, [sl], -r4 │ │ - ldc2l 11, cr4, [fp, #256] @ 0x100 @ │ │ - ldc2l 9, cr0, [ip, #72] @ 0x48 @ │ │ - ldc2l 5, cr10, [ip, #116] @ 0x74 │ │ + ldc2l 11, cr4, [fp, #436] @ 0x1b4 @ │ │ + ldc2l 9, cr0, [ip, #162] @ 0xa2 @ │ │ + ldc2l 5, cr10, [ip, #296] @ 0x128 │ │ │ │ 0247c8c8 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r3 │ │ mov r5, r2 │ │ mov r7, r1 │ │ @@ -1365162,18 +1365161,18 @@ │ │ vstr d16, [r4] │ │ ldr r0, [pc, #28] @ 247c97c │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 1, cr14, [ip, #612] @ 0x264 │ │ - ldc2l 13, cr0, [sl, #812] @ 0x32c │ │ - ldc2l 4, cr0, [ip, #176] @ 0xb0 │ │ - ldc2l 1, cr14, [ip, #212] @ 0xd4 │ │ + ldc2l 1, cr14, [ip, #792] @ 0x318 │ │ + ldc2l 13, cr0, [sl, #992] @ 0x3e0 │ │ + ldc2l 4, cr0, [ip, #356] @ 0x164 │ │ + ldc2l 1, cr14, [ip, #392] @ 0x188 │ │ │ │ 0247c980 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r5, r0 │ │ bl 270ce10 │ │ @@ -1365250,24 +1365249,24 @@ │ │ ldr r0, [pc, #48] @ 247cae4 │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, r4 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 4, cr6, [ip, #212] @ 0xd4 │ │ - ldc2l 2, cr0, [ip, #420] @ 0x1a4 │ │ - ldc2l 4, cr6, [sl, #452] @ 0x1c4 │ │ - ldc2l 9, cr8, [sl, #350] @ 0x15e @ │ │ - ldc2l 3, cr8, [r9, #864] @ 0x360 │ │ - ldc2l 4, cr6, [sl, #212] @ 0xd4 │ │ - ldc2l 15, cr11, [ip, #232] @ 0xe8 │ │ - ldc2l 3, cr6, [ip, #164] @ 0xa4 │ │ - ldc2l 13, cr12, [r9, #940] @ 0x3ac │ │ - ldc2l 4, cr6, [sl, #740] @ 0x2e4 │ │ + ldc2l 4, cr6, [ip, #392] @ 0x188 │ │ + ldc2l 2, cr0, [ip, #600] @ 0x258 │ │ + ldc2l 4, cr6, [sl, #632] @ 0x278 │ │ + ldc2l 9, cr8, [sl, #440] @ 0x1b8 @ │ │ + ldc2l 4, cr8, [r9, #20] │ │ + ldc2l 4, cr6, [sl, #392] @ 0x188 │ │ + ldc2l 15, cr11, [ip, #412] @ 0x19c │ │ + ldc2l 3, cr6, [ip, #344] @ 0x158 │ │ + ldc2l 14, cr12, [r9, #96] @ 0x60 │ │ + ldc2l 4, cr6, [sl, #920] @ 0x398 │ │ │ │ 0247caf0 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ ldr r4, [fp, #8] │ │ str r0, [sp, #8] │ │ @@ -1365318,21 +1365317,21 @@ │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r5 │ │ bl 270cdd0 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 9, cr4, [fp, #196] @ 0xc4 @ │ │ - ldc2l 15, cr11, [ip, #648] @ 0x288 │ │ - ldc2l 3, cr6, [sl, #292] @ 0x124 │ │ - ldc2l 10, cr2, [fp, #300] @ 0x12c @ │ │ + ldc2l 9, cr4, [fp, #286] @ 0x11e @ │ │ + ldc2l 15, cr11, [ip, #828] @ 0x33c │ │ + ldc2l 3, cr6, [sl, #472] @ 0x1d8 │ │ + ldc2l 10, cr2, [fp, #480] @ 0x1e0 @ │ │ mlaeq sl, r4, ip, sp │ │ - ldc2l 8, cr4, [fp, #80] @ 0x50 │ │ - ldc2l 5, cr0, [ip, #992] @ 0x3e0 │ │ + vcadd.f32 q10, , , #270 │ │ + ldc2l 6, cr0, [ip, #148] @ 0x94 │ │ │ │ 0247cbec : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r6, r2 │ │ mov r5, r1 │ │ mov r7, r0 │ │ @@ -1365541,22 +1365540,22 @@ │ │ add r3, r3, #16 │ │ ble 247cf00 │ │ str r1, [sp] │ │ mov r0, sp │ │ mov r1, r4 │ │ bl 270f180 │ │ b 247cd90 │ │ - ldc2l 9, cr0, [fp, #292] @ 0x124 @ │ │ - ldc2l 12, cr6, [sl, #996] @ 0x3e4 │ │ - ldc2l 3, cr2, [ip, #352] @ 0x160 │ │ - ldc2l 7, cr13, [ip, #68] @ 0x44 │ │ + ldc2l 9, cr0, [fp, #382] @ 0x17e @ │ │ + ldc2l 13, cr6, [sl, #152] @ 0x98 │ │ + ldc2l 3, cr2, [ip, #532] @ 0x214 │ │ + ldc2l 7, cr13, [ip, #248] @ 0xf8 │ │ eoreq ip, sp, r0, lsl #7 │ │ - vcadd.f32 q9, , , #270 │ │ - ldc2l 2, cr0, [sl, #792] @ 0x318 │ │ - vcadd.f32 q8, , q3, #270 │ │ + ldc2l 8, cr2, [fp, #496] @ 0x1f0 │ │ + ldc2l 2, cr0, [sl, #972] @ 0x3cc │ │ + ldc2l 8, cr0, [fp, #972] @ 0x3cc │ │ │ │ 0247cf5c : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r5, r0 │ │ bl 270ce10 │ │ @@ -1365633,24 +1365632,24 @@ │ │ ldr r0, [pc, #48] @ 247d0c0 │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, r4 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 4, cr0, [ip] │ │ - ldc2l 12, cr15, [fp, #564] @ 0x234 │ │ - ldc2l 14, cr5, [sl, #596] @ 0x254 │ │ - ldc2l 3, cr8, [sl, #844] @ 0x34c │ │ - ldc2l 13, cr7, [r9, #1008] @ 0x3f0 │ │ - ldc2l 14, cr5, [sl, #356] @ 0x164 │ │ - ldc2l 9, cr11, [ip, #188] @ 0xbc @ │ │ - ldc2l 2, cr0, [ip, #976] @ 0x3d0 │ │ - vcadd.f32 d28, d9, d15, #270 │ │ - ldc2l 14, cr5, [sl, #884] @ 0x374 │ │ + ldc2l 4, cr0, [ip, #180] @ 0xb4 │ │ + ldc2l 12, cr15, [fp, #744] @ 0x2e8 │ │ + ldc2l 14, cr5, [sl, #776] @ 0x308 │ │ + ldc2l 4, cr8, [sl] │ │ + ldc2l 14, cr7, [r9, #164] @ 0xa4 │ │ + ldc2l 14, cr5, [sl, #536] @ 0x218 │ │ + ldc2l 9, cr11, [ip, #278] @ 0x116 @ │ │ + ldc2l 3, cr0, [ip, #132] @ 0x84 │ │ + ldc2l 8, cr12, [r9, #240] @ 0xf0 │ │ + ldc2l 15, cr5, [sl, #40] @ 0x28 │ │ │ │ 0247d0cc : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r5, r1 │ │ mov r4, r0 │ │ bl 270ce10 │ │ @@ -1365689,19 +1365688,19 @@ │ │ vstr d16, [r5, #40] @ 0x28 │ │ ldr r0, [pc, #32] @ 247d18c │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 3, cr4, [fp, #812] @ 0x32c │ │ - ldc2l 4, cr14, [sl, #824] @ 0x338 │ │ - ldc2l 13, cr5, [sl, #532] @ 0x214 │ │ - ldc2l 8, cr11, [ip, #584] @ 0x248 │ │ - ldc2l 3, cr4, [fp, #348] @ 0x15c │ │ + ldc2l 3, cr4, [fp, #992] @ 0x3e0 │ │ + ldc2l 4, cr14, [sl, #1004] @ 0x3ec │ │ + ldc2l 13, cr5, [sl, #712] @ 0x2c8 │ │ + ldc2l 8, cr11, [ip, #764] @ 0x2fc │ │ + ldc2l 3, cr4, [fp, #528] @ 0x210 │ │ │ │ 0247d190 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #692 @ 0x2b4 │ │ mov r4, r3 │ │ mov r5, r1 │ │ @@ -1366143,65 +1366142,65 @@ │ │ bl 270f8a0 │ │ ldr r2, [pc, #92] @ 247d8d8 │ │ mov r0, r4 │ │ mov r1, r5 │ │ mov r3, #98 @ 0x62 │ │ add r2, pc, r2 │ │ b 247d41c │ │ - ldc2l 11, cr5, [r9, #528] @ 0x210 @ │ │ - ldc2l 6, cr8, [sl, #732] @ 0x2dc │ │ - ldc2l 12, cr5, [fp, #608] @ 0x260 │ │ + ldc2l 11, cr5, [r9, #708] @ 0x2c4 @ │ │ + ldc2l 6, cr8, [sl, #912] @ 0x390 │ │ + ldc2l 12, cr5, [fp, #788] @ 0x314 │ │ eoreq fp, sp, ip, asr #26 │ │ eoreq fp, sp, r4, ror sp │ │ eoreq fp, sp, ip, lsr lr │ │ eoreq fp, sp, r4, lsr lr │ │ - ldc2l 11, cr5, [r9, #92] @ 0x5c @ │ │ + ldc2l 11, cr5, [r9, #272] @ 0x110 @ │ │ eoreq fp, sp, r0, asr sp │ │ - ldc2l 5, cr8, [sl, #860] @ 0x35c │ │ - ldc2l 6, cr6, [sl, #160] @ 0xa0 │ │ + ldc2l 6, cr8, [sl, #16] │ │ + ldc2l 6, cr6, [sl, #340] @ 0x154 │ │ eoreq fp, sp, r4, asr #27 │ │ eoreq fp, sp, r4, lsl r9 │ │ strhteq fp, [sp], -r4 │ │ eoreq fp, sp, ip, lsr #19 │ │ - ldc2l 12, cr12, [ip, #496] @ 0x1f0 │ │ + ldc2l 12, cr12, [ip, #676] @ 0x2a4 │ │ strdeq fp, [sp], -r0 @ │ │ - ldc2l 5, cr9, [r9, #700] @ 0x2bc │ │ + ldc2l 5, cr9, [r9, #880] @ 0x370 │ │ ldrdeq fp, [sp], -ip @ │ │ - ldc2l 15, cr9, [sl, #696] @ 0x2b8 │ │ + ldc2l 15, cr9, [sl, #876] @ 0x36c │ │ ldc2l 14, cr0, [sp, #824] @ 0x338 │ │ eoreq fp, sp, r0, lsr #24 │ │ eoreq fp, sp, r4, lsl #25 │ │ eoreq fp, sp, ip, ror ip │ │ - vcadd.f32 d27, d11, d16, #270 │ │ + vcadd.f32 , , , #270 │ │ strdeq fp, [sp], -ip @ │ │ - ldc2l 8, cr9, [r9, #508] @ 0x1fc │ │ - ldc2l 13, cr15, [fp, #904] @ 0x388 │ │ - ldc2l 11, cr3, [sl, #208] @ 0xd0 @ │ │ + vcadd.f32 d25, d25, d28, #270 │ │ + ldc2l 14, cr15, [fp, #60] @ 0x3c │ │ + ldc2l 11, cr3, [sl, #388] @ 0x184 @ │ │ strteq lr, [r9], #-1728 @ 0xfffff940 │ │ ldc2l 4, cr15, [ip, #304] @ 0x130 │ │ ldrdeq fp, [sp], -r0 @ │ │ - ldc2l 11, cr5, [fp, #544] @ 0x220 @ │ │ + ldc2l 11, cr5, [fp, #724] @ 0x2d4 @ │ │ eoreq fp, sp, r8, lsl #22 │ │ - ldc2l 10, cr5, [fp, #304] @ 0x130 @ │ │ + ldc2l 10, cr5, [fp, #484] @ 0x1e4 @ │ │ strdeq fp, [sp], -ip @ │ │ - ldc2l 15, cr7, [r9, #516] @ 0x204 │ │ + ldc2l 15, cr7, [r9, #696] @ 0x2b8 │ │ eoreq fp, sp, r8, lsr #21 │ │ - ldc2l 9, cr3, [sl, #400] @ 0x190 @ │ │ + ldc2l 9, cr3, [sl, #490] @ 0x1ea @ │ │ strteq lr, [r9], #-1364 @ 0xfffffaac │ │ ldc2l 2, cr15, [ip, #896] @ 0x380 │ │ eoreq fp, sp, r4, ror #20 │ │ - ldc2l 10, cr5, [fp, #128] @ 0x80 @ │ │ + ldc2l 10, cr5, [fp, #308] @ 0x134 @ │ │ strhteq fp, [sp], -r0 │ │ eoreq fp, sp, r0, ror #19 │ │ eoreq fp, sp, r0, lsl #31 │ │ mlaeq sp, r4, pc, fp @ │ │ eoreq fp, sp, ip, lsl #31 │ │ - ldc2l 12, cr5, [r9, #444] @ 0x1bc │ │ + ldc2l 12, cr5, [r9, #624] @ 0x270 │ │ eoreq fp, sp, ip, asr pc │ │ - ldc2l 7, cr6, [sl, #728] @ 0x2d8 │ │ + ldc2l 7, cr6, [sl, #908] @ 0x38c │ │ │ │ 0247d958 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #8 │ │ mov ip, r2 │ │ mov r2, r1 │ │ @@ -1366418,21 +1366417,21 @@ │ │ mov r0, r4 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ eoreq sp, fp, ip, lsr #16 │ │ ldc2l 9, cr2, [sp, #506] @ 0x1fa @ │ │ strdeq sp, [fp], -r0 @ │ │ ldrdeq sp, [fp], -ip @ │ │ eoreq sp, fp, ip, asr #15 │ │ - ldc2l 14, cr12, [ip, #608] @ 0x260 │ │ + ldc2l 14, cr12, [ip, #788] @ 0x314 │ │ strdeq sp, [fp], -ip @ │ │ eoreq sp, fp, r4, ror #15 │ │ eoreq sp, fp, r8, lsr #15 │ │ mlaeq fp, r0, r7, sp │ │ - ldc2l 12, cr13, [r9, #156] @ 0x9c │ │ - ldc2l 12, cr13, [r9, #236] @ 0xec │ │ + ldc2l 12, cr13, [r9, #336] @ 0x150 │ │ + ldc2l 12, cr13, [r9, #416] @ 0x1a0 │ │ │ │ 0247dcc4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ sub sp, sp, #24 │ │ @@ -1367586,86 +1367585,86 @@ │ │ eoreq sp, fp, r8, lsr #10 │ │ strdeq sp, [fp], -r0 @ │ │ ldrdeq sp, [fp], -r4 @ │ │ eoreq sp, fp, r4, lsr #8 │ │ eoreq sp, fp, r8, lsr #9 │ │ eoreq sp, fp, r8, ror #8 │ │ eoreq ip, fp, ip, ror r5 │ │ - ldc2l 11, cr6, [sl, #556] @ 0x22c @ │ │ + ldc2l 11, cr6, [sl, #736] @ 0x2e0 @ │ │ ldrdeq sp, [fp], -r8 @ │ │ eoreq sp, fp, ip, asr r2 │ │ eoreq sp, fp, ip, lsr r2 │ │ eoreq sp, fp, r0, lsl r4 │ │ eoreq ip, fp, ip, asr #30 │ │ ldrdeq ip, [fp], -r0 @ │ │ eoreq ip, fp, r8, asr #30 │ │ eoreq ip, fp, r0, lsr pc │ │ eoreq ip, fp, ip, ror lr │ │ eoreq ip, fp, r0, lsl #30 │ │ eoreq ip, fp, r0, lsl #27 │ │ - ldc2l 0, cr15, [sl, #420] @ 0x1a4 │ │ - ldc2l 0, cr15, [sl, #340] @ 0x154 │ │ + ldc2l 0, cr15, [sl, #600] @ 0x258 │ │ + ldc2l 0, cr15, [sl, #520] @ 0x208 │ │ ldrdeq ip, [fp], -r0 @ │ │ - ldc2l 6, cr2, [fp, #56] @ 0x38 │ │ + ldc2l 6, cr2, [fp, #236] @ 0xec │ │ eoreq ip, fp, r4, ror r8 │ │ - ldc2l 2, cr8, [ip, #796] @ 0x31c │ │ - ldc2l 2, cr8, [ip, #716] @ 0x2cc │ │ + ldc2l 2, cr8, [ip, #976] @ 0x3d0 │ │ + ldc2l 2, cr8, [ip, #896] @ 0x380 │ │ eoreq ip, fp, r4, lsr lr │ │ strhteq ip, [fp], -r8 │ │ eoreq sp, fp, r8, ror #7 │ │ strdeq sp, [fp], -r0 @ │ │ eoreq sp, fp, ip, lsr r3 │ │ eoreq sp, fp, r0, asr #7 │ │ eoreq sp, fp, r0, lsr #7 │ │ eoreq sp, fp, r4, lsl #7 │ │ - ldc2l 7, cr11, [sl, #120] @ 0x78 │ │ + ldc2l 7, cr11, [sl, #300] @ 0x12c │ │ eoreq sp, fp, r4, ror r3 │ │ eoreq sp, fp, r4, ror #6 │ │ eoreq ip, fp, ip, asr #26 │ │ ldrdeq ip, [fp], -r0 @ │ │ - ldc2l 2, cr9, [sl, #340] @ 0x154 │ │ + ldc2l 2, cr9, [sl, #520] @ 0x208 │ │ strhteq ip, [fp], -r0 │ │ eoreq ip, fp, r4, lsr #26 │ │ eoreq ip, fp, r0, lsl #27 │ │ mlaeq fp, r0, r2, sp │ │ eoreq sp, fp, r4, lsl r3 │ │ eoreq sp, fp, ip, ror #5 │ │ - ldc2l 7, cr13, [r9, #572] @ 0x23c │ │ + ldc2l 7, cr13, [r9, #752] @ 0x2f0 │ │ ldrdeq sp, [fp], -r0 @ │ │ ldrdeq sp, [fp], -r0 @ │ │ - ldc2l 5, cr7, [r9, #436] @ 0x1b4 │ │ + ldc2l 5, cr7, [r9, #616] @ 0x268 │ │ mlaeq fp, r8, r2, sp │ │ mlaeq fp, ip, r2, sp │ │ eoreq sp, fp, ip, lsl #5 │ │ eoreq sp, fp, r0, ror #4 │ │ - ldc2l 9, cr8, [ip, #254] @ 0xfe @ │ │ - ldc2l 9, cr8, [ip, #214] @ 0xd6 @ │ │ + ldc2l 9, cr8, [ip, #344] @ 0x158 @ │ │ + ldc2l 9, cr8, [ip, #304] @ 0x130 @ │ │ ldrdeq ip, [fp], -r8 @ │ │ eoreq ip, fp, ip, asr lr │ │ eoreq sp, fp, ip, lsr #32 │ │ eoreq sp, fp, ip, lsr #32 │ │ ldc2l 8, cr14, [ip, #224] @ 0xe0 │ │ eoreq ip, fp, r0, lsl #30 │ │ eoreq sp, fp, ip, lsr r2 │ │ eoreq sp, fp, r8, lsl r2 │ │ eoreq sp, fp, r8, lsl #4 │ │ strhteq ip, [fp], -r8 │ │ - ldc2l 11, cr6, [r9, #964] @ 0x3c4 @ │ │ + ldc2l 12, cr6, [r9, #120] @ 0x78 │ │ eoreq ip, fp, r0, asr #22 │ │ eoreq ip, fp, r0, asr #17 │ │ eoreq ip, fp, r4, asr #17 │ │ mlaeq fp, r4, r8, ip │ │ eoreq ip, fp, r0, lsl r8 │ │ eoreq ip, fp, ip, asr #18 │ │ ldrdeq ip, [fp], -r0 @ │ │ strhteq ip, [fp], -r8 │ │ mlaeq fp, ip, r9, ip │ │ eoreq ip, fp, r8, ror r8 │ │ ldrdeq ip, [fp], -r4 @ │ │ - ldc2l 15, cr5, [ip] │ │ + ldc2l 15, cr5, [ip, #180] @ 0xb4 │ │ eoreq ip, fp, r4, lsr sl │ │ eoreq ip, fp, r8, lsl sl │ │ eoreq ip, fp, ip, lsr #11 │ │ eoreq sl, sp, sp, lsl #9 │ │ eoreq ip, fp, r8, lsr #16 │ │ eoreq sp, fp, ip, lsr r1 │ │ eoreq sp, fp, r0, asr #3 │ │ @@ -1367702,15 +1367701,15 @@ │ │ eoreq ip, fp, r0, lsr #24 │ │ ldrdeq ip, [fp], -r4 @ │ │ eoreq ip, fp, r8, asr #23 │ │ eoreq ip, fp, r0, asr ip │ │ eoreq ip, fp, r0, lsr #24 │ │ eoreq ip, fp, ip, lsl #23 │ │ eoreq ip, fp, r4, lsl r5 │ │ - ldc2l 11, cr6, [sl, #252] @ 0xfc @ │ │ + ldc2l 11, cr6, [sl, #432] @ 0x1b0 @ │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #76 @ 0x4c │ │ mov r6, r0 │ │ cmp r0, #0 │ │ beq 247f23c │ │ str r1, [sp, #4] │ │ @@ -1367979,30 +1367978,30 @@ │ │ ldr r2, [pc, #80] @ 247f540 │ │ add r2, pc, r2 │ │ b 247f388 │ │ eoreq ip, fp, r8, lsr #3 │ │ eoreq ip, fp, ip, lsl r3 │ │ eoreq ip, fp, r8, ror #5 │ │ ldrdeq fp, [fp], -r8 @ │ │ - ldc2l 9, cr7, [ip, #28] @ │ │ + ldc2l 9, cr7, [ip, #118] @ 0x76 @ │ │ mlaeq fp, ip, r2, ip │ │ eoreq ip, fp, r0, asr r1 │ │ - ldc2l 5, cr10, [sl, #376] @ 0x178 │ │ + ldc2l 5, cr10, [sl, #556] @ 0x22c │ │ eoreq ip, fp, r0, lsr r1 │ │ eoreq ip, fp, r0 │ │ - ldc2l 2, cr0, [fp, #296] @ 0x128 │ │ + ldc2l 2, cr0, [fp, #476] @ 0x1dc │ │ strhteq fp, [fp], -ip │ │ eoreq ip, fp, r0, asr #32 │ │ - ldc2l 1, cr12, [sl, #696] @ 0x2b8 │ │ + ldc2l 1, cr12, [sl, #876] @ 0x36c │ │ ldrdeq fp, [fp], -ip @ │ │ strhteq fp, [fp], -ip │ │ eoreq fp, fp, r4, lsl #31 │ │ eoreq fp, fp, r0, ror #30 │ │ mlaeq fp, r8, lr, fp │ │ - ldc2l 10, cr5, [fp, #760] @ 0x2f8 @ │ │ + ldc2l 10, cr5, [fp, #940] @ 0x3ac @ │ │ │ │ 0247f544 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ ldr r1, [pc, #352] @ 247f6b4 │ │ mov r4, r0 │ │ mov r0, #1 │ │ @@ -1368099,16 +1368098,16 @@ │ │ eoreq fp, fp, r4, lsl #29 │ │ eoreq fp, fp, r0, asr lr │ │ eoreq fp, fp, r8, lsr #27 │ │ eoreq fp, fp, r8, lsr lr │ │ eoreq fp, fp, r0, lsr lr │ │ eoreq fp, fp, r0, lsl lr │ │ eoreq fp, fp, ip, asr sp │ │ - ldc2l 9, cr5, [r9, #12] @ │ │ - vcadd.f32 , , q15, #270 │ │ + ldc2l 9, cr5, [r9, #102] @ 0x66 @ │ │ + ldc2l 9, cr5, [r9, #54] @ 0x36 @ │ │ strhteq fp, [fp], -r8 │ │ strhteq fp, [fp], -r4 │ │ mlaeq fp, r8, sp, fp │ │ eoreq fp, fp, ip, ror sp │ │ eoreq fp, fp, r4, lsl #26 │ │ strhteq fp, [fp], -ip │ │ │ │ @@ -1368279,30 +1368278,30 @@ │ │ eoreq fp, fp, r4, asr #23 │ │ strhteq fp, [fp], -ip │ │ strhteq fp, [fp], -r4 │ │ ldrdeq fp, [fp], -r4 @ │ │ eoreq fp, fp, r8, asr #22 │ │ mlaeq fp, r0, fp, fp │ │ eoreq fp, fp, r4, asr #22 │ │ - ldc2l 13, cr7, [r9, #696] @ 0x2b8 │ │ + ldc2l 13, cr7, [r9, #876] @ 0x36c │ │ andeq r0, r0, r8, lsl r2 │ │ andeq r0, r0, r8, lsl #3 │ │ eoreq fp, fp, ip, lsr fp │ │ eoreq fp, fp, ip, ror #23 │ │ eoreq fp, fp, r4, lsr #22 │ │ strhteq fp, [fp], -r8 │ │ eoreq fp, fp, r8, lsl fp │ │ eoreq fp, fp, r8, asr #23 │ │ eoreq fp, fp, ip, lsl #22 │ │ strhteq fp, [fp], -r8 │ │ ldrdeq fp, [fp], -r0 @ │ │ eoreq fp, fp, r8, ror #21 │ │ strhteq fp, [fp], -r8 │ │ eoreq fp, fp, r4, lsr #21 │ │ - ldc2l 3, cr5, [fp, #296] @ 0x128 │ │ + ldc2l 3, cr5, [fp, #476] @ 0x1dc │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ ldr r0, [pc, #104] @ 247fa54 │ │ ldr r0, [pc, r0] │ │ ldr r0, [r0] │ │ cmp r0, #0 │ │ beq 247fa18 │ │ @@ -1368637,15 +1368636,15 @@ │ │ bl 2480274 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ ldmibls r9, {r1, r3, r4, r7, r8, fp, ip, pc} │ │ svccc 0x00b99999 │ │ eoreq fp, fp, ip, lsr #16 │ │ - ldc2l 11, cr3, [sl, #444] @ 0x1bc @ │ │ + ldc2l 11, cr3, [sl, #624] @ 0x270 @ │ │ eoreq r7, fp, r0, ror lr │ │ eoreq fp, fp, r8, ror #8 │ │ strdeq fp, [fp], -r4 @ │ │ ldrdeq fp, [fp], -r4 @ │ │ strhteq fp, [fp], -r8 │ │ eoreq fp, fp, r4, ror r5 │ │ eoreq fp, fp, r0, asr #10 │ │ @@ -1368833,19 +1368832,19 @@ │ │ pop {r4, r5, fp, pc} │ │ eoreq fp, fp, r4, asr #8 │ │ strdeq fp, [fp], -r8 @ │ │ strdeq fp, [fp], -ip @ │ │ strdeq fp, [fp], -r8 @ │ │ eoreq fp, fp, r4, ror #5 │ │ eoreq fp, fp, r8, lsl #5 │ │ - vcadd.f32 , , q1, #270 │ │ + vcadd.f32 , , , #270 │ │ eoreq fp, fp, r4, lsr #7 │ │ strhteq fp, [fp], -ip │ │ eoreq fp, fp, ip, lsl r2 │ │ - ldc2l 8, cr10, [ip, #968] @ 0x3c8 │ │ + ldc2l 9, cr10, [ip, #62] @ 0x3e @ │ │ eoreq fp, fp, r8, lsr #7 │ │ eoreq fp, fp, r0, lsl #4 │ │ ldrdeq fp, [fp], -r8 @ │ │ mlaeq fp, r0, r1, fp │ │ mlaeq fp, r4, r3, fp │ │ eoreq fp, fp, r4, lsl r4 │ │ eoreq fp, fp, r0, lsl r4 │ │ @@ -1369131,15 +1369130,15 @@ │ │ cmp r6, r4 │ │ bne 248069c │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ strhteq sl, [fp], -r0 │ │ eoreq sl, fp, r8, ror sp │ │ eoreq sl, fp, ip, asr #26 │ │ - ldc2l 3, cr8, [r9, #104] @ 0x68 │ │ + ldc2l 3, cr8, [r9, #284] @ 0x11c │ │ eoreq sl, fp, r8, lsl sp │ │ strdeq sl, [fp], -r0 @ │ │ │ │ 024806e8 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ ldr r2, [r0] │ │ @@ -1369260,15 +1369259,15 @@ │ │ ldr r0, [r0] │ │ bl 270e1e0 │ │ ldr r0, [pc, #24] @ 24808e4 │ │ ldr r0, [pc, r0] │ │ ldr r0, [r0] │ │ pop {r4, r5, r6, r7, r8, sl, fp, lr} │ │ bx r0 │ │ - ldc2l 14, cr4, [r9, #168] @ 0xa8 │ │ + ldc2l 14, cr4, [r9, #348] @ 0x15c │ │ eoreq r7, fp, r4, lsr #9 │ │ mlaeq fp, ip, sl, sl │ │ ldrdeq sl, [fp], -r0 @ │ │ eoreq sl, fp, ip, lsl #24 │ │ strdeq sl, [fp], -r8 @ │ │ eoreq sl, fp, r8, asr #24 │ │ eoreq sl, fp, r8, lsr ip │ │ @@ -1369619,20 +1369618,20 @@ │ │ ldrb r0, [r4], #1 │ │ cmp r0, #0 │ │ bne 2480e48 │ │ b 2480bf0 │ │ eoreq sl, fp, r0, ror sl │ │ eoreq sl, fp, r4, ror #19 │ │ strhteq sl, [fp], -r4 │ │ - ldc2l 0, cr10, [ip, #644] @ 0x284 │ │ + ldc2l 0, cr10, [ip, #824] @ 0x338 │ │ eoreq sl, fp, r0, lsl r9 │ │ eoreq sl, fp, r4, ror #17 │ │ strhteq sl, [fp], -r8 │ │ mlaeq fp, r4, r8, sl │ │ - ldc2l 14, cr0, [sl, #376] @ 0x178 │ │ + ldc2l 14, cr0, [sl, #556] @ 0x22c │ │ eoreq sl, fp, r4, asr r7 │ │ eoreq sl, fp, r4, lsr #14 │ │ eoreq sl, fp, r8, lsr #14 │ │ eoreq sl, fp, r0, lsr #13 │ │ eoreq sl, fp, r8, ror #13 │ │ eoreq sl, fp, r4, lsr r6 │ │ strdeq sl, [fp], -ip @ │ │ @@ -1369801,15 +1369800,15 @@ │ │ sub sp, fp, #40 @ 0x28 │ │ vpop {d8} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldmibls r9, {r1, r3, r4, r7, r8, fp, ip, pc} │ │ svccc 0x00b99999 │ │ eoreq sl, fp, r4, lsl #9 │ │ - ldc2l 3, cr14, [fp, #980] @ 0x3d4 │ │ + ldc2l 4, cr14, [fp, #136] @ 0x88 │ │ mlaeq fp, ip, r3, sl │ │ eoreq sl, fp, r8, ror r3 │ │ eoreq sl, fp, r0, lsr r3 │ │ eoreq sl, fp, r8, ror #5 │ │ ldrdeq sl, [fp], -ip @ │ │ strhteq sl, [fp], -r4 │ │ eoreq sl, fp, r8, lsl #5 │ │ @@ -1369926,15 +1369925,15 @@ │ │ eoreq sl, fp, r4, asr #2 │ │ strdeq sl, [fp], -r0 @ │ │ eoreq sl, fp, r4, ror #1 │ │ eoreq sl, fp, ip, ror #1 │ │ ldrdeq sl, [fp], -r8 @ │ │ ldrdeq sl, [fp], -r4 @ │ │ eoreq sl, fp, r4, ror r1 │ │ - ldc2l 0, cr12, [fp, #868] @ 0x364 │ │ + ldc2l 1, cr12, [fp, #24] │ │ │ │ 02481324 : │ │ push {fp, lr} │ │ mov fp, sp │ │ mov r0, #10 │ │ bl 270e820 │ │ ldr r2, [pc, #12] @ 2481348 │ │ @@ -1370533,15 +1370532,15 @@ │ │ cmp r2, #0 │ │ strb r2, [r0, r1] │ │ add r1, r1, #1 │ │ mov r2, r3 │ │ bne 2481c74 │ │ add r0, r0, r1 │ │ b 2481bf8 │ │ - ldc2l 0, cr6, [r9, #224] @ 0xe0 │ │ + ldc2l 0, cr6, [r9, #404] @ 0x194 │ │ │ │ 02481c98 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d13} │ │ sub sp, sp, #512 @ 0x200 │ │ @@ -1371111,51 +1371110,51 @@ │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #80 @ 0x50 │ │ vpop {d8-d13} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 6, cr15, [sl, #976] @ 0x3d0 │ │ - ldc2l 4, cr7, [fp, #856] @ 0x358 │ │ - ldc2l 6, cr15, [sl, #156] @ 0x9c │ │ + ldc2l 7, cr15, [sl, #132] @ 0x84 │ │ + ldc2l 5, cr7, [fp, #12] │ │ + ldc2l 6, cr15, [sl, #336] @ 0x150 │ │ stc2l 3, cr7, [r5, #64]! @ 0x40 │ │ - ldc2l 9, cr5, [sl, #316] @ 0x13c @ │ │ - ldc2l 5, cr15, [sl, #844] @ 0x34c │ │ + ldc2l 9, cr5, [sl, #406] @ 0x196 @ │ │ + ldc2l 6, cr15, [sl] │ │ + ldc2l 5, cr15, [sl, #884] @ 0x374 │ │ + ldc2l 9, cr5, [sl, #246] @ 0xf6 @ │ │ ldc2l 5, cr15, [sl, #704] @ 0x2c0 │ │ - ldc2l 9, cr5, [sl, #156] @ 0x9c @ │ │ - ldc2l 5, cr15, [sl, #524] @ 0x20c │ │ - ldc2l 9, cr5, [sl, #4] @ │ │ - ldc2l 5, cr15, [sl, #220] @ 0xdc │ │ - ldc2l 6, cr11, [fp, #956] @ 0x3bc │ │ + ldc2l 9, cr5, [sl, #94] @ 0x5e @ │ │ + ldc2l 5, cr15, [sl, #400] @ 0x190 │ │ + ldc2l 7, cr11, [fp, #112] @ 0x70 │ │ eoreq r7, sp, r4, lsl #11 │ │ - ldc2l 14, cr14, [fp, #256] @ 0x100 │ │ - ldc2l 7, cr15, [sl, #332] @ 0x14c │ │ + ldc2l 14, cr14, [fp, #436] @ 0x1b4 │ │ + ldc2l 7, cr15, [sl, #512] @ 0x200 │ │ stc2l 4, cr7, [r5, #656]! @ 0x290 │ │ - ldc2l 14, cr14, [fp] │ │ - ldc2l 7, cr15, [sl, #76] @ 0x4c │ │ - ldc2l 11, cr14, [fp, #608] @ 0x260 @ │ │ - ldc2l 4, cr15, [sl, #684] @ 0x2ac │ │ - ldc2l 3, cr11, [fp, #332] @ 0x14c │ │ - ldc2l 2, cr7, [fp, #776] @ 0x308 │ │ - ldc2l 4, cr15, [sl, #76] @ 0x4c │ │ + ldc2l 14, cr14, [fp, #180] @ 0xb4 │ │ + ldc2l 7, cr15, [sl, #256] @ 0x100 │ │ + ldc2l 11, cr14, [fp, #788] @ 0x314 @ │ │ + ldc2l 4, cr15, [sl, #864] @ 0x360 │ │ + ldc2l 3, cr11, [fp, #512] @ 0x200 │ │ + ldc2l 2, cr7, [fp, #956] @ 0x3bc │ │ + ldc2l 4, cr15, [sl, #256] @ 0x100 │ │ stc2l 0, cr7, [r5, #992]! @ 0x3e0 │ │ - ldc2l 6, cr5, [sl, #56] @ 0x38 │ │ - ldc2l 2, cr15, [sl, #268] @ 0x10c │ │ - ldc2l 1, cr11, [fp, #76] @ 0x4c │ │ - ldc2l 5, cr5, [sl, #760] @ 0x2f8 │ │ - ldc2l 1, cr15, [sl, #972] @ 0x3cc │ │ - ldc2l 5, cr5, [sl, #488] @ 0x1e8 │ │ - ldc2l 1, cr15, [sl, #700] @ 0x2bc │ │ - ldc2l 5, cr5, [sl, #216] @ 0xd8 │ │ - ldc2l 1, cr15, [sl, #428] @ 0x1ac │ │ - ldc2l 4, cr5, [sl, #984] @ 0x3d8 │ │ - ldc2l 1, cr15, [sl, #172] @ 0xac │ │ - ldc2l 4, cr5, [sl, #760] @ 0x2f8 │ │ - ldc2l 0, cr15, [sl, #972] @ 0x3cc │ │ + ldc2l 6, cr5, [sl, #236] @ 0xec │ │ + ldc2l 2, cr15, [sl, #448] @ 0x1c0 │ │ + ldc2l 1, cr11, [fp, #256] @ 0x100 │ │ + ldc2l 5, cr5, [sl, #940] @ 0x3ac │ │ + ldc2l 2, cr15, [sl, #128] @ 0x80 │ │ + ldc2l 5, cr5, [sl, #668] @ 0x29c │ │ + ldc2l 1, cr15, [sl, #880] @ 0x370 │ │ + ldc2l 5, cr5, [sl, #396] @ 0x18c │ │ + ldc2l 1, cr15, [sl, #608] @ 0x260 │ │ + ldc2l 5, cr5, [sl, #140] @ 0x8c │ │ + ldc2l 1, cr15, [sl, #352] @ 0x160 │ │ + ldc2l 4, cr5, [sl, #940] @ 0x3ac │ │ + ldc2l 1, cr15, [sl, #128] @ 0x80 │ │ │ │ 02482628 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #16 │ │ mov ip, r2 │ │ mov r2, r1 │ │ @@ -1371545,42 +1371544,42 @@ │ │ bl 27023e0 │ │ mov r4, r0 │ │ mov r5, r1 │ │ vneg.f64 d16, d10 │ │ vmov r0, r1, d9 │ │ b 2482b90 │ │ ldc2l 0, cr12, [ip, #476] @ 0x1dc │ │ - ldc2l 8, cr4, [fp, #972] @ 0x3cc │ │ - ldc2l 7, cr0, [sl, #580] @ 0x244 │ │ - ldc2l 14, cr2, [r9, #128] @ 0x80 │ │ - ldc2l 11, cr0, [r9, #92] @ 0x5c @ │ │ + ldc2l 9, cr4, [fp, #64] @ 0x40 @ │ │ + ldc2l 7, cr0, [sl, #760] @ 0x2f8 │ │ + ldc2l 14, cr2, [r9, #308] @ 0x134 │ │ + ldc2l 11, cr0, [r9, #272] @ 0x110 @ │ │ eoreq r6, sp, ip, asr #21 │ │ - ldc2l 9, cr4, [fp, #238] @ 0xee @ │ │ - ldc2l 15, cr2, [sl, #536] @ 0x218 │ │ + ldc2l 9, cr4, [fp, #328] @ 0x148 @ │ │ + ldc2l 15, cr2, [sl, #716] @ 0x2cc │ │ ldc2l 15, cr11, [ip, #908] @ 0x38c │ │ - ldc2l 1, cr14, [fp, #800] @ 0x320 │ │ - ldc2l 0, cr8, [ip, #716] @ 0x2cc │ │ + ldc2l 1, cr14, [fp, #980] @ 0x3d4 │ │ + ldc2l 0, cr8, [ip, #896] @ 0x380 │ │ eoreq r6, sp, r0, ror r8 │ │ stc2l 8, cr6, [r5, #80]! @ 0x50 │ │ ldc2l 11, cr13, [ip, #36] @ 0x24 @ │ │ - ldc2l 0, cr8, [ip, #316] @ 0x13c │ │ + ldc2l 0, cr8, [ip, #496] @ 0x1f0 │ │ ldc2l 10, cr13, [ip, #852] @ 0x354 @ │ │ - ldc2l 0, cr8, [ip, #108] @ 0x6c │ │ + ldc2l 0, cr8, [ip, #288] @ 0x120 │ │ ldc2l 10, cr13, [ip, #644] @ 0x284 @ │ │ - ldc2l 15, cr7, [ip, #924] @ 0x39c │ │ - ldc2l 3, cr14, [fp, #432] @ 0x1b0 │ │ - ldc2l 2, cr8, [ip, #348] @ 0x15c │ │ + ldc2l 0, cr8, [ip, #80] @ 0x50 │ │ + ldc2l 3, cr14, [fp, #612] @ 0x264 │ │ + ldc2l 2, cr8, [ip, #528] @ 0x210 │ │ eoreq r6, sp, ip, lsl sl │ │ stc2l 9, cr6, [r5, #384]! @ 0x180 @ │ │ ldc2l 12, cr13, [ip, #724] @ 0x2d4 │ │ - ldc2l 1, cr8, [ip, #1004] @ 0x3ec │ │ + ldc2l 2, cr8, [ip, #160] @ 0xa0 │ │ ldc2l 12, cr13, [ip, #516] @ 0x204 │ │ - ldc2l 1, cr8, [ip, #796] @ 0x31c │ │ + ldc2l 1, cr8, [ip, #976] @ 0x3d0 │ │ ldc2l 12, cr13, [ip, #308] @ 0x134 │ │ - ldc2l 1, cr8, [ip, #588] @ 0x24c │ │ + ldc2l 1, cr8, [ip, #768] @ 0x300 │ │ ldc2l 11, cr11, [ip, #332] @ 0x14c @ │ │ │ │ 02482cb8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ @@ -1371876,42 +1371875,42 @@ │ │ mov r1, r5 │ │ ldr r2, [pc, #104] @ 24831c0 │ │ movw r3, #379 @ 0x17b │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ b 2483034 │ │ - ldc2l 13, cr4, [r9, #820] @ 0x334 │ │ - ldc2l 10, cr4, [sl, #1012] @ 0x3f4 @ │ │ - ldc2l 1, cr0, [sl, #20] │ │ - ldc2l 5, cr6, [fp, #752] @ 0x2f0 │ │ - ldc2l 13, cr4, [r9, #532] @ 0x214 │ │ - ldc2l 3, cr4, [fp, #812] @ 0x32c │ │ - ldc2l 0, cr0, [sl, #756] @ 0x2f4 │ │ - ldc2l 12, cr7, [ip, #648] @ 0x288 │ │ - ldc2l 13, cr4, [r9, #260] @ 0x104 │ │ - ldc2l 13, cr4, [r9, #224] @ 0xe0 │ │ - ldc2l 0, cr0, [sl, #484] @ 0x1e4 │ │ - ldc2l 10, cr8, [r9, #420] @ 0x1a4 @ │ │ - vcadd.f32 q12, , , #270 │ │ - ldc2l 2, cr12, [fp, #988] @ 0x3dc │ │ + ldc2l 13, cr4, [r9, #1000] @ 0x3e8 │ │ + ldc2l 11, cr4, [sl, #168] @ 0xa8 @ │ │ + ldc2l 1, cr0, [sl, #200] @ 0xc8 │ │ + ldc2l 5, cr6, [fp, #932] @ 0x3a4 │ │ + ldc2l 13, cr4, [r9, #712] @ 0x2c8 │ │ + ldc2l 3, cr4, [fp, #992] @ 0x3e0 │ │ + ldc2l 0, cr0, [sl, #936] @ 0x3a8 │ │ + ldc2l 12, cr7, [ip, #828] @ 0x33c │ │ + ldc2l 13, cr4, [r9, #440] @ 0x1b8 │ │ + ldc2l 13, cr4, [r9, #404] @ 0x194 │ │ + ldc2l 0, cr0, [sl, #664] @ 0x298 │ │ + ldc2l 10, cr8, [r9, #600] @ 0x258 @ │ │ + ldc2l 8, cr8, [r9, #592] @ 0x250 │ │ + ldc2l 3, cr12, [fp, #144] @ 0x90 │ │ ldc2l 6, cr11, [ip, #756] @ 0x2f4 │ │ - ldc2l 8, cr8, [r9, #92] @ 0x5c │ │ - ldc2l 2, cr12, [fp, #668] @ 0x29c │ │ - ldc2l 7, cr8, [r9, #924] @ 0x39c │ │ - ldc2l 2, cr12, [fp, #476] @ 0x1dc │ │ + vcadd.f32 q12, , q2, #270 │ │ + ldc2l 2, cr12, [fp, #848] @ 0x350 │ │ + ldc2l 8, cr8, [r9, #80] @ 0x50 │ │ + ldc2l 2, cr12, [fp, #656] @ 0x290 │ │ ldc2l 6, cr11, [ip, #228] @ 0xe4 │ │ - ldc2l 2, cr12, [fp, #284] @ 0x11c │ │ + ldc2l 2, cr12, [fp, #464] @ 0x1d0 │ │ ldc2l 6, cr11, [ip, #4] │ │ - ldc2l 2, cr12, [fp, #60] @ 0x3c │ │ - ldc2l 14, cr4, [r9, #212] @ 0xd4 │ │ - ldc2l 0, cr0, [ip, #652] @ 0x28c │ │ - ldc2l 1, cr0, [sl, #436] @ 0x1b4 │ │ - ldc2l 6, cr6, [fp, #80] @ 0x50 │ │ - ldc2l 12, cr4, [r9, #1012] @ 0x3f4 │ │ + ldc2l 2, cr12, [fp, #240] @ 0xf0 │ │ + ldc2l 14, cr4, [r9, #392] @ 0x188 │ │ + ldc2l 0, cr0, [ip, #832] @ 0x340 │ │ + ldc2l 1, cr0, [sl, #616] @ 0x268 │ │ + ldc2l 6, cr6, [fp, #260] @ 0x104 │ │ + ldc2l 13, cr4, [r9, #168] @ 0xa8 │ │ │ │ 024831d8 : │ │ vldr d16, [r0] │ │ vstr d16, [r1] │ │ vldr d16, [r0, #32] │ │ vstr d16, [r1, #32] │ │ vldr d16, [r0, #64] @ 0x40 │ │ @@ -1373161,17 +1373160,17 @@ │ │ ldr r0, [pc, #2936] @ 24850b0 │ │ add r0, pc, r0 │ │ ldr r1, [r0, r1, lsl #2] │ │ ldr r0, [pc, #2928] @ 24850b4 │ │ str r1, [r6] │ │ add r0, pc, r0 │ │ b 2484780 │ │ - ldc2l 8, cr15, [fp, #860] @ 0x35c │ │ + ldc2l 9, cr15, [fp, #8] @ │ │ strteq r8, [r9], #-1860 @ 0xfffff8bc │ │ - ldc2l 1, cr2, [r9, #8] │ │ + ldc2l 1, cr2, [r9, #188] @ 0xbc │ │ strbeq r5, [fp], #-3104 @ 0xfffff3e0 │ │ ldrteq r0, [r9], #-1136 @ 0xfffffb90 │ │ strteq r8, [r9], #-1812 @ 0xfffff8ec │ │ ldrteq r0, [r9], #-1116 @ 0xfffffba4 │ │ strbeq r7, [sl], #-452 @ 0xfffffe3c │ │ ldrteq fp, [r6], #-2008 @ 0xfffff828 │ │ strbeq r3, [r2], #-1704 @ 0xfffff958 │ │ @@ -1373233,16 +1373232,16 @@ │ │ strteq r6, [sp], #-2640 @ 0xfffff5b0 │ │ ldrteq r0, [r9], #-996 @ 0xfffffc1c │ │ strteq r2, [sl], #-1676 @ 0xfffff974 │ │ strbeq r7, [sl], #-348 @ 0xfffffea4 │ │ ldrteq sl, [r7], #-400 @ 0xfffffe70 │ │ ldrteq fp, [r5], #-4040 @ 0xfffff038 │ │ strteq r1, [fp], #-124 @ 0xffffff84 │ │ - ldc2l 7, cr15, [fp, #748] @ 0x2ec │ │ - ldc2l 5, cr5, [ip, #1012] @ 0x3f4 │ │ + ldc2l 7, cr15, [fp, #928] @ 0x3a0 │ │ + ldc2l 6, cr5, [ip, #168] @ 0xa8 │ │ strteq r8, [r9], #-1560 @ 0xfffff9e8 │ │ strteq r8, [r9], #-1536 @ 0xfffffa00 │ │ strbeq r7, [sl], #-192 @ 0xffffff40 │ │ mlaeq sp, r8, fp, r5 │ │ strteq r9, [r9], #-820 @ 0xfffffccc │ │ strteq pc, [ip], #-396 @ 0xfffffe74 │ │ strteq r8, [r9], #-1492 @ 0xfffffa2c │ │ @@ -1373311,28 +1373310,28 @@ │ │ b 2484f84 │ │ strteq pc, [fp], #-2472 @ 0xfffff658 │ │ ldrteq fp, [r5], #-368 @ 0xfffffe90 │ │ ldrteq sl, [r5], #-1040 @ 0xfffffbf0 │ │ ldrteq r8, [r8], #-2700 @ 0xfffff574 │ │ ldrteq sl, [r6], #-2276 @ 0xfffff71c │ │ strbeq r3, [r1], #-3452 @ 0xfffff284 │ │ - ldc2l 4, cr5, [ip, #932] @ 0x3a4 │ │ - ldc2l 10, cr15, [r8, #860] @ 0x35c @ │ │ + ldc2l 5, cr5, [ip, #88] @ 0x58 │ │ + ldc2l 11, cr15, [r8, #16] @ │ │ strteq r8, [r9], #-1260 @ 0xfffffb14 │ │ - ldc2l 5, cr3, [r9, #828] @ 0x33c │ │ + ldc2l 5, cr3, [r9, #1008] @ 0x3f0 │ │ strbeq r6, [sl], #-3984 @ 0xfffff070 │ │ eoreq r5, sp, ip, ror #20 │ │ ldrteq r0, [r9], #-456 @ 0xfffffe38 │ │ strbeq r3, [r1], #-3276 @ 0xfffff334 │ │ ldrteq sl, [r6], #-2056 @ 0xfffff7f8 │ │ ldrteq r8, [r8], #-2472 @ 0xfffff658 │ │ strteq r8, [r9], #-1136 @ 0xfffffb90 │ │ strteq r8, [r9], #-1112 @ 0xfffffba8 │ │ - ldc2l 10, cr7, [fp, #720] @ 0x2d0 @ │ │ - ldc2l 14, cr7, [sl, #488] @ 0x1e8 │ │ + ldc2l 10, cr7, [fp, #900] @ 0x384 @ │ │ + ldc2l 14, cr7, [sl, #668] @ 0x29c │ │ ldrteq sl, [r5], #-708 @ 0xfffffd3c │ │ strteq r8, [r9], #-1052 @ 0xfffffbe4 │ │ ldrteq fp, [r5], #-4 │ │ strteq pc, [fp], #-2092 @ 0xfffff7d4 │ │ strteq r0, [sl], #-2372 @ 0xfffff6bc │ │ strteq r8, [r9], #-1004 @ 0xfffffc14 │ │ strteq r8, [r9], #-984 @ 0xfffffc28 │ │ @@ -1373419,23 +1373418,23 @@ │ │ bls 2484d10 │ │ ldr r0, [pc, #2180] @ 24851c8 │ │ movw r3, #1619 @ 0x653 │ │ ldr r2, [pc, #2176] @ 24851cc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ b 2484d08 │ │ - ldc2l 0, cr14, [r9, #160] @ 0xa0 │ │ + ldc2l 0, cr14, [r9, #340] @ 0x154 │ │ ldr r0, [pc, #1956] @ 2485104 │ │ add r0, pc, r0 │ │ b 2484f84 │ │ - ldc2l 13, cr7, [sl, #1000] @ 0x3e8 │ │ + ldc2l 14, cr7, [sl, #156] @ 0x9c │ │ strteq r1, [sl], #-1604 @ 0xfffff9bc │ │ - ldc2l 2, cr4, [r9, #164] @ 0xa4 │ │ + ldc2l 2, cr4, [r9, #344] @ 0x158 │ │ strteq r8, [r9], #-872 @ 0xfffffc98 │ │ - ldc2l 13, cr1, [r9, #152] @ 0x98 │ │ + ldc2l 13, cr1, [r9, #332] @ 0x14c │ │ strbeq r5, [fp], #-2116 @ 0xfffff7bc │ │ ldrteq r0, [r9], #-148 @ 0xffffff6c │ │ strteq r8, [r9], #-824 @ 0xfffffcc8 │ │ ldrteq r0, [r9], #-128 @ 0xffffff80 │ │ strbeq r6, [sl], #-3560 @ 0xfffff218 │ │ mov r1, #0 │ │ ldr r0, [pc, #2152] @ 2485200 │ │ @@ -1373491,18 +1373490,18 @@ │ │ ldr r9, [pc, #1988] @ 2485224 │ │ ldr r8, [pc, #1988] @ 2485228 │ │ add r5, pc, r5 │ │ add r9, pc, r9 │ │ add r8, pc, r8 │ │ b 2484b14 │ │ strbeq r6, [sl], #-3436 @ 0xfffff294 │ │ - ldc2l 1, cr4, [r9, #84] @ 0x54 │ │ - ldc2l 8, cr7, [fp, #892] @ 0x37c │ │ + ldc2l 1, cr4, [r9, #264] @ 0x108 │ │ + ldc2l 9, cr7, [fp, #24] @ │ │ strteq r8, [r9], #-564 @ 0xfffffdcc │ │ - ldc2l 11, cr1, [r9, #968] @ 0x3c8 @ │ │ + ldc2l 12, cr1, [r9, #124] @ 0x7c │ │ strbeq r5, [fp], #-1808 @ 0xfffff8f0 │ │ ldrteq pc, [r8], #-3936 @ 0xfffff0a0 @ │ │ strteq r8, [r9], #-516 @ 0xfffffdfc │ │ ldrteq pc, [r8], #-3916 @ 0xfffff0b4 @ │ │ strbeq r6, [sl], #-3252 @ 0xfffff34c │ │ ldrteq fp, [r6], #-712 @ 0xfffffd38 │ │ strbeq r3, [r2], #-408 @ 0xfffffe68 │ │ @@ -1373513,21 +1373512,21 @@ │ │ strteq r6, [sp], #-1344 @ 0xfffffac0 │ │ ldrteq pc, [r8], #-3796 @ 0xfffff12c @ │ │ strteq r2, [sl], #-380 @ 0xfffffe84 │ │ strbeq r6, [sl], #-3148 @ 0xfffff3b4 │ │ ldrteq r9, [r7], #-3200 @ 0xfffff380 │ │ ldrteq fp, [r5], #-2744 @ 0xfffff548 │ │ strteq r0, [fp], #-2924 @ 0xfffff494 │ │ - ldc2l 7, cr7, [fp, #780] @ 0x30c │ │ - ldc2l 10, cr1, [r9, #904] @ 0x388 @ │ │ + ldc2l 7, cr7, [fp, #960] @ 0x3c0 │ │ + ldc2l 11, cr1, [r9, #60] @ 0x3c @ │ │ strbeq r5, [fp], #-1536 @ 0xfffffa00 │ │ ldrteq pc, [r8], #-3664 @ 0xfffff1b0 @ │ │ strteq r8, [r9], #-244 @ 0xffffff0c │ │ ldrteq pc, [r8], #-3644 @ 0xfffff1c4 @ │ │ - ldc2l 7, cr5, [fp, #452] @ 0x1c4 │ │ + ldc2l 7, cr5, [fp, #632] @ 0x278 │ │ strbeq r6, [sl], #-2964 @ 0xfffff46c │ │ ldrteq fp, [r5], #-2568 @ 0xfffff5f8 │ │ ldrteq r9, [r7], #-3004 @ 0xfffff444 │ │ ldrteq fp, [r6], #-408 @ 0xfffffe68 │ │ str r7, [r9, r1, lsl #2] │ │ add r1, r0, #1 │ │ cmp r0, r4 │ │ @@ -1373632,17 +1373631,17 @@ │ │ b 2484e14 │ │ strbeq r6, [sl], #-2880 @ 0xfffff4c0 │ │ strteq r8, [r9], #-88 @ 0xffffffa8 │ │ strteq r6, [sp], #-1032 @ 0xfffffbf8 │ │ ldrteq pc, [r8], #-3484 @ 0xfffff264 @ │ │ strteq r2, [sl], #-72 @ 0xffffffb8 │ │ strbeq r6, [sl], #-2840 @ 0xfffff4e8 │ │ - ldc2l 6, cr5, [fp, #724] @ 0x2d4 │ │ - ldc2l 9, cr1, [r9, #404] @ 0x194 @ │ │ - ldc2l 7, cr6, [ip, #180] @ 0xb4 │ │ + ldc2l 6, cr5, [fp, #904] @ 0x388 │ │ + ldc2l 9, cr1, [r9, #494] @ 0x1ee @ │ │ + ldc2l 7, cr6, [ip, #360] @ 0x168 │ │ movw r2, #854 @ 0x356 │ │ cmp r0, r2 │ │ bcc 2484cdc │ │ ldr r0, [pc, #1288] @ 24851d0 │ │ movw r3, #1630 @ 0x65e │ │ ldr r2, [pc, #1284] @ 24851d4 │ │ add r0, pc, r0 │ │ @@ -1373690,18 +1373689,18 @@ │ │ strteq r1, [sl], #-492 @ 0xfffffe14 │ │ ldrteq sl, [r6], #-708 @ 0xfffffd3c │ │ strbeq r3, [r1], #-1896 @ 0xfffff898 │ │ strteq r8, [r9], #-3192 @ 0xfffff388 │ │ strteq lr, [ip], #-2764 @ 0xfffff534 │ │ strteq r7, [r9], #-3864 @ 0xfffff0e8 │ │ ldrteq sl, [r5], #-2820 @ 0xfffff4fc │ │ - vcadd.f32 d17, d25, d18, #270 │ │ + vcadd.f32 , , , #270 │ │ eoreq r5, sp, r4, asr #8 │ │ eoreq r5, sp, r0, asr #8 │ │ - ldc2l 14, cr4, [ip, #468] @ 0x1d4 │ │ + ldc2l 14, cr4, [ip, #648] @ 0x288 │ │ strbeq r6, [sl], #-2408 @ 0xfffff698 │ │ strbeq r5, [fp], #-900 @ 0xfffffc7c │ │ eoreq r5, sp, r4, lsr r4 │ │ strteq r8, [r9], #-3024 @ 0xfffff430 │ │ strteq lr, [ip], #-2596 @ 0xfffff5dc │ │ strteq r7, [r9], #-3696 @ 0xfffff190 │ │ ldrteq sl, [r5], #-2652 @ 0xfffff5a4 │ │ @@ -1373713,15 +1373712,15 @@ │ │ strbeq r3, [r1], #-1608 @ 0xfffff9b8 │ │ strteq r8, [r9], #-2900 @ 0xfffff4ac │ │ strteq lr, [ip], #-2472 @ 0xfffff658 │ │ strteq r7, [r9], #-3568 @ 0xfffff210 │ │ ldrteq sl, [r5], #-2524 @ 0xfffff624 │ │ ldrteq sl, [r5], #-2516 @ 0xfffff62c │ │ strteq pc, [fp], #-500 @ 0xfffffe0c │ │ - ldc2l 7, cr1, [r9, #424] @ 0x1a8 │ │ + ldc2l 7, cr1, [r9, #604] @ 0x25c │ │ eoreq r5, sp, ip, lsl #6 │ │ eoreq r5, sp, r8, lsl #6 │ │ ldr r4, [pc, #1124] @ 2485264 │ │ ldr r5, [fp, #16] │ │ ldr r4, [pc, r4] │ │ ldr r8, [pc, #1116] @ 2485268 │ │ ldr r9, [pc, #1116] @ 248526c │ │ @@ -1373823,15 +1373822,15 @@ │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ mov r0, #1 │ │ strb r0, [r5] │ │ b 2483700 │ │ - ldc2l 3, cr15, [r8, #252] @ 0xfc │ │ + ldc2l 3, cr15, [r8, #432] @ 0x1b0 │ │ mov r0, #1 │ │ strb r0, [r8] │ │ b 248382c │ │ strbeq r6, [sl], #-2092 @ 0xfffff7d4 │ │ strbeq r5, [fp], #-584 @ 0xfffffdb8 │ │ mov r0, #1 │ │ strb r0, [r5] │ │ @@ -1373849,199 +1373848,199 @@ │ │ strteq r0, [sl], #-3964 @ 0xfffff084 │ │ ldrteq sl, [r6], #-84 @ 0xffffffac │ │ strbeq r3, [r1], #-1272 @ 0xfffffb08 │ │ strteq r8, [r9], #-2568 @ 0xfffff5f8 │ │ strteq lr, [ip], #-2140 @ 0xfffff7a4 │ │ strteq r7, [r9], #-3240 @ 0xfffff358 │ │ ldrteq sl, [r5], #-2196 @ 0xfffff76c │ │ - ldc2l 6, cr1, [r9, #200] @ 0xc8 │ │ + ldc2l 6, cr1, [r9, #380] @ 0x17c │ │ ldrdeq r5, [sp], -r4 @ │ │ ldrdeq r5, [sp], -r0 @ │ │ - ldc2l 10, cr3, [r9, #900] @ 0x384 @ │ │ + ldc2l 11, cr3, [r9, #56] @ 0x38 @ │ │ strbeq r6, [sl], #-1784 @ 0xfffff908 │ │ strbeq r5, [fp], #-276 @ 0xfffffeec │ │ eoreq r5, sp, r4, asr #3 │ │ strteq r8, [r9], #-2400 @ 0xfffff6a0 │ │ strteq lr, [ip], #-1972 @ 0xfffff84c │ │ strteq r7, [r9], #-3072 @ 0xfffff400 │ │ ldrteq sl, [r5], #-2028 @ 0xfffff814 │ │ - vcadd.f32 q15, , , #270 │ │ + ldc2l 8, cr14, [fp, #464] @ 0x1d0 │ │ ldrteq r9, [r5], #-2672 @ 0xfffff590 │ │ ldrteq r8, [r8], #-236 @ 0xffffff14 │ │ strteq r0, [sl], #-3680 @ 0xfffff1a0 │ │ ldrteq r9, [r6], #-3896 @ 0xfffff0c8 │ │ strbeq r3, [r1], #-992 @ 0xfffffc20 │ │ strteq r8, [r9], #-2284 @ 0xfffff714 │ │ strteq lr, [ip], #-1856 @ 0xfffff8c0 │ │ strteq r7, [r9], #-2952 @ 0xfffff478 │ │ ldrteq sl, [r5], #-1908 @ 0xfffff88c │ │ ldrteq sl, [r5], #-1900 @ 0xfffff894 │ │ strteq lr, [fp], #-3984 @ 0xfffff070 │ │ strteq r0, [sl], #-164 @ 0xffffff5c │ │ - ldc2l 4, cr1, [r9, #1000] @ 0x3e8 │ │ + ldc2l 5, cr1, [r9, #156] @ 0x9c │ │ mlaeq sp, ip, r0, r5 │ │ mlaeq sp, r8, r0, r5 │ │ eoreq r4, sp, r4, ror lr │ │ ldrteq pc, [r8], #-1488 @ 0xfffffa30 @ │ │ strteq r7, [r9], #-2196 @ 0xfffff76c │ │ strbeq r6, [sl], #-860 @ 0xfffffca4 │ │ strbeq r3, [r1], #-3608 @ 0xfffff1e8 │ │ strbeq r2, [r2], #-2116 @ 0xfffff7bc │ │ ldrteq pc, [r8], #-1428 @ 0xfffffa6c @ │ │ strteq r7, [r9], #-2152 @ 0xfffff798 │ │ strteq r7, [r9], #-2132 @ 0xfffff7ac │ │ - ldc2l 9, cr14, [fp, #336] @ 0x150 @ │ │ - ldc2l 2, cr7, [sl, #472] @ 0x1d8 │ │ + ldc2l 9, cr14, [fp, #426] @ 0x1aa @ │ │ + ldc2l 2, cr7, [sl, #652] @ 0x28c │ │ ldrteq sl, [r6], #-2320 @ 0xfffff6f0 │ │ - ldc2l 12, cr2, [fp, #920] @ 0x398 │ │ - ldc2l 2, cr7, [sl, #248] @ 0xf8 │ │ + ldc2l 13, cr2, [fp, #76] @ 0x4c │ │ + ldc2l 2, cr7, [sl, #428] @ 0x1ac │ │ strteq r1, [sl], #-2012 @ 0xfffff824 │ │ - ldc2l 9, cr14, [fp, #134] @ 0x86 @ │ │ + ldc2l 9, cr14, [fp, #224] @ 0xe0 @ │ │ strbeq r2, [r1], #-4052 @ 0xfffff02c │ │ ldrteq r9, [r6], #-2832 @ 0xfffff4f0 │ │ ldrteq r7, [r8], #-3244 @ 0xfffff354 │ │ ldrteq pc, [r8], #-1180 @ 0xfffffb64 @ │ │ strteq r7, [r9], #-1904 @ 0xfffff890 │ │ strteq r7, [r9], #-1884 @ 0xfffff8a4 │ │ - ldc2l 13, cr6, [fp, #736] @ 0x2e0 │ │ - ldc2l 1, cr7, [sl, #504] @ 0x1f8 │ │ + ldc2l 13, cr6, [fp, #916] @ 0x394 │ │ + ldc2l 1, cr7, [sl, #684] @ 0x2ac │ │ ldrteq r9, [r5], #-1484 @ 0xfffffa34 │ │ - ldc2l 2, cr3, [sl, #792] @ 0x318 │ │ - ldc2l 1, cr7, [sl, #296] @ 0x128 │ │ + ldc2l 2, cr3, [sl, #972] @ 0x3cc │ │ + ldc2l 1, cr7, [sl, #476] @ 0x1dc │ │ strteq r7, [r9], #-1784 @ 0xfffff908 │ │ strbeq r6, [sl], #-1468 @ 0xfffffa44 │ │ strbeq r4, [fp], #-4056 @ 0xfffff028 │ │ eoreq r5, sp, r8, lsl #1 │ │ strteq r8, [r9], #-2084 @ 0xfffff7dc │ │ strteq lr, [ip], #-1656 @ 0xfffff988 │ │ strteq r7, [r9], #-2756 @ 0xfffff53c │ │ ldrteq sl, [r5], #-1712 @ 0xfffff950 │ │ - ldc2l 10, cr6, [fp, #268] @ 0x10c @ │ │ + ldc2l 10, cr6, [fp, #448] @ 0x1c0 @ │ │ ldrteq r9, [r5], #-2356 @ 0xfffff6cc │ │ ldrteq r7, [r8], #-4016 @ 0xfffff050 │ │ strteq r0, [sl], #-3364 @ 0xfffff2dc │ │ ldrteq r9, [r6], #-3580 @ 0xfffff204 │ │ strbeq r3, [r1], #-676 @ 0xfffffd5c │ │ strteq r8, [r9], #-1968 @ 0xfffff850 │ │ strteq lr, [ip], #-1540 @ 0xfffff9fc │ │ strteq r7, [r9], #-2636 @ 0xfffff5b4 │ │ ldrteq sl, [r5], #-1592 @ 0xfffff9c8 │ │ ldrteq sl, [r5], #-1584 @ 0xfffff9d0 │ │ strteq lr, [fp], #-3668 @ 0xfffff1ac │ │ strteq pc, [r9], #-3944 @ 0xfffff098 │ │ - ldc2l 3, cr1, [r9, #760] @ 0x2f8 │ │ + ldc2l 3, cr1, [r9, #940] @ 0x3ac │ │ eoreq r4, sp, r0, ror #30 │ │ eoreq r4, sp, ip, asr pc │ │ strteq r7, [r9], #-1632 @ 0xfffff9a0 │ │ ldrteq r9, [r7], #-356 @ 0xfffffe9c │ │ ldrteq sl, [r5], #-4000 @ 0xfffff060 │ │ strteq r0, [fp], #-92 @ 0xffffffa4 │ │ strteq r7, [r9], #-1600 @ 0xfffff9c0 │ │ strteq r7, [r9], #-1580 @ 0xfffff9d4 │ │ - ldc2l 11, cr14, [r8, #832] @ 0x340 @ │ │ - ldc2l 0, cr7, [sl, #312] @ 0x138 │ │ + ldc2l 11, cr14, [r8, #1012] @ 0x3f4 @ │ │ + ldc2l 0, cr7, [sl, #492] @ 0x1ec │ │ strteq pc, [fp], #-1936 @ 0xfffff870 │ │ - ldc2l 15, cr8, [sl, #176] @ 0xb0 │ │ - ldc2l 0, cr7, [sl, #88] @ 0x58 │ │ + ldc2l 15, cr8, [sl, #356] @ 0x164 │ │ + ldc2l 0, cr7, [sl, #268] @ 0x10c │ │ strteq r5, [sp], #-2396 @ 0xfffff6a4 │ │ - ldc2l 12, cr6, [fp, #140] @ 0x8c │ │ + ldc2l 12, cr6, [fp, #320] @ 0x140 │ │ ldrteq sl, [r5], #-276 @ 0xfffffeec │ │ strteq lr, [fp], #-2364 @ 0xfffff6c4 │ │ strteq pc, [r9], #-2648 @ 0xfffff5a8 │ │ strteq r7, [r9], #-1280 @ 0xfffffb00 │ │ strteq r7, [r9], #-1260 @ 0xfffffb14 │ │ strteq r7, [r9], #-1232 @ 0xfffffb30 │ │ - ldc2l 1, cr13, [r9, #176] @ 0xb0 │ │ - ldc2l 14, cr6, [sl, #1016] @ 0x3f8 │ │ + ldc2l 1, cr13, [r9, #356] @ 0x164 │ │ + ldc2l 15, cr6, [sl, #172] @ 0xac │ │ strteq r0, [sl], #-1864 @ 0xfffff8b8 │ │ ldc2l 12, cr11, [ip, #848] @ 0x350 │ │ - ldc2l 14, cr6, [sl, #792] @ 0x318 │ │ + ldc2l 14, cr6, [sl, #972] @ 0x3cc │ │ strbeq r5, [sl], #-3888 @ 0xfffff0d0 │ │ strbeq r3, [r1], #-2540 @ 0xfffff614 │ │ strbeq r2, [r2], #-1048 @ 0xfffffbe8 │ │ strteq lr, [ip], #-0 │ │ strteq r7, [r9], #-1084 @ 0xfffffbc4 │ │ strteq r7, [r9], #-1064 @ 0xfffffbd8 │ │ strteq r7, [r9], #-1044 @ 0xfffffbec │ │ - ldc2l 0, cr13, [r9, #448] @ 0x1c0 │ │ - ldc2l 14, cr6, [sl, #264] @ 0x108 │ │ - ldc2l 1, cr15, [r9, #88] @ 0x58 │ │ - ldc2l 14, cr6, [sl, #88] @ 0x58 │ │ - ldc2l 12, cr12, [r9, #768] @ 0x300 │ │ - ldc2l 10, cr6, [sl, #584] @ 0x248 @ │ │ + ldc2l 0, cr13, [r9, #628] @ 0x274 │ │ + ldc2l 14, cr6, [sl, #444] @ 0x1bc │ │ + ldc2l 1, cr15, [r9, #268] @ 0x10c │ │ + ldc2l 14, cr6, [sl, #268] @ 0x10c │ │ + ldc2l 12, cr12, [r9, #948] @ 0x3b4 │ │ + ldc2l 10, cr6, [sl, #764] @ 0x2fc @ │ │ strteq r0, [sl], #-732 @ 0xfffffd24 │ │ - ldc2l 13, cr14, [r9, #376] @ 0x178 │ │ - ldc2l 10, cr6, [sl, #376] @ 0x178 @ │ │ + ldc2l 13, cr14, [r9, #556] @ 0x22c │ │ + ldc2l 10, cr6, [sl, #556] @ 0x22c @ │ │ strteq r7, [r9], #-3412 @ 0xfffff2ac │ │ - ldc2l 6, cr6, [fp, #396] @ 0x18c │ │ - ldc2l 7, cr15, [r9, #4] │ │ - ldc2l 11, cr14, [r9, #292] @ 0x124 @ │ │ + ldc2l 6, cr6, [fp, #576] @ 0x240 │ │ + ldc2l 7, cr15, [r9, #184] @ 0xb8 │ │ + ldc2l 11, cr14, [r9, #472] @ 0x1d8 @ │ │ strteq r7, [r9], #-2456 @ 0xfffff668 │ │ - ldc2l 3, cr1, [r9, #396] @ 0x18c │ │ - ldc2l 14, cr14, [r8, #764] @ 0x2fc │ │ + ldc2l 3, cr1, [r9, #576] @ 0x240 │ │ + ldc2l 14, cr14, [r8, #944] @ 0x3b0 │ │ strteq r7, [r9], #-904 @ 0xfffffc78 │ │ strteq r7, [r9], #-852 @ 0xfffffcac │ │ - ldc2l 0, cr15, [r9, #600] @ 0x258 │ │ - ldc2l 13, cr6, [sl, #600] @ 0x258 │ │ + ldc2l 0, cr15, [r9, #780] @ 0x30c │ │ + ldc2l 13, cr6, [sl, #780] @ 0x30c │ │ strteq r8, [r9], #-140 @ 0xffffff74 │ │ - vcadd.f32 q15, q12, , #270 │ │ + ldc2l 9, cr14, [r8, #48] @ 0x30 @ │ │ strteq r7, [r9], #-728 @ 0xfffffd28 │ │ ldrteq r9, [r5], #-3788 @ 0xfffff134 │ │ strteq sp, [ip], #-3696 @ 0xfffff190 │ │ strteq r7, [r9], #-700 @ 0xfffffd44 │ │ - ldc2l 12, cr6, [sl, #1000] @ 0x3e8 │ │ - ldc2l 15, cr14, [r9, #184] @ 0xb8 │ │ + ldc2l 13, cr6, [sl, #156] @ 0x9c │ │ + ldc2l 15, cr14, [r9, #364] @ 0x16c │ │ strteq r7, [r9], #-468 @ 0xfffffe2c │ │ - ldc2l 15, cr14, [r9, #8] │ │ + ldc2l 15, cr14, [r9, #188] @ 0xbc │ │ strteq r7, [r9], #-3836 @ 0xfffff104 │ │ strteq r7, [r9], #-388 @ 0xfffffe7c │ │ ldc2l 9, cr11, [ip, #376] @ 0x178 @ │ │ strteq r7, [r9], #-340 @ 0xfffffeac │ │ ldc2l 9, cr11, [ip, #288] @ 0x120 @ │ │ strteq r7, [r9], #-268 @ 0xfffffef4 │ │ - ldc2l 12, cr2, [sl, #728] @ 0x2d8 │ │ + ldc2l 12, cr2, [sl, #908] @ 0x38c │ │ strteq r7, [r9], #-224 @ 0xffffff20 │ │ - ldc2l 12, cr2, [sl, #536] @ 0x218 │ │ + ldc2l 12, cr2, [sl, #716] @ 0x2cc │ │ strteq r7, [r9], #-176 @ 0xffffff50 │ │ strteq r7, [r9], #-524 @ 0xfffffdf4 │ │ ldrteq r9, [r5], #-2836 @ 0xfffff4ec │ │ strbeq r2, [r1], #-1872 @ 0xfffff8b0 │ │ ldrteq r9, [r6], #-656 @ 0xfffffd70 │ │ ldrteq sl, [r5], #-1356 @ 0xfffffab4 │ │ - ldc2l 5, cr3, [sl, #20] │ │ - ldc2l 10, cr14, [r9, #820] @ 0x334 @ │ │ + ldc2l 5, cr3, [sl, #200] @ 0xc8 │ │ + ldc2l 10, cr14, [r9, #1000] @ 0x3e8 @ │ │ ldrteq sl, [r5], #-1288 @ 0xfffffaf8 │ │ - ldc2l 8, cr4, [ip, #708] @ 0x2c4 │ │ + ldc2l 8, cr4, [ip, #888] @ 0x378 │ │ ldrteq r9, [r5], #-3216 @ 0xfffff370 │ │ strteq r6, [r9], #-3816 @ 0xfffff118 │ │ - ldc2l 12, cr14, [r9, #136] @ 0x88 │ │ - ldc2l 9, cr6, [sl, #68] @ 0x44 @ │ │ + ldc2l 12, cr14, [r9, #316] @ 0x13c │ │ + ldc2l 9, cr6, [sl, #158] @ 0x9e @ │ │ strteq r7, [r9], #-3096 @ 0xfffff3e8 │ │ ldrteq r9, [r5], #-2724 @ 0xfffff55c │ │ ldc2l 6, cr11, [ip, #880] @ 0x370 │ │ - vcadd.f32 q11, q13, q7, #270 │ │ + ldc2l 8, cr6, [sl, #1004] @ 0x3ec │ │ ldrteq lr, [r8], #-2952 @ 0xfffff478 │ │ strteq sp, [ip], #-2584 @ 0xfffff5e8 │ │ ldrteq r9, [r5], #-2628 @ 0xfffff5bc │ │ - ldc2l 9, cr2, [sl, #476] @ 0x1dc @ │ │ - ldc2l 8, cr6, [sl, #456] @ 0x1c8 │ │ + ldc2l 10, cr2, [sl, #108] @ 0x6c @ │ │ + ldc2l 8, cr6, [sl, #636] @ 0x27c │ │ strteq r6, [r9], #-3608 @ 0xfffff1e8 │ │ strteq pc, [r9], #-856 @ 0xfffffca8 │ │ strteq lr, [fp], #-560 @ 0xfffffdd0 │ │ ldrteq r9, [r5], #-2552 @ 0xfffff608 │ │ ldrteq r8, [r5], #-3212 @ 0xfffff374 │ │ strteq r0, [sl], #-144 @ 0xffffff70 │ │ eoreq r4, sp, r4, lsl #7 │ │ strteq r7, [r9], #-2844 @ 0xfffff4e4 │ │ strteq sp, [ip], #-2416 @ 0xfffff690 │ │ ldrteq r9, [r5], #-2480 @ 0xfffff650 │ │ ldrteq r7, [r8], #-724 @ 0xfffffd2c │ │ - ldc2l 3, cr14, [r8, #412] @ 0x19c │ │ - ldc2l 7, cr3, [r9, #516] @ 0x204 │ │ - ldc2l 0, cr5, [fp, #52] @ 0x34 │ │ + ldc2l 3, cr14, [r8, #592] @ 0x250 │ │ + ldc2l 7, cr3, [r9, #696] @ 0x2b8 │ │ + ldc2l 0, cr5, [fp, #232] @ 0xe8 │ │ strbeq r6, [sl], #-1064 @ 0xfffffbd8 │ │ │ │ 024852f4 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ @@ -1374058,16 +1374057,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 3, cr0, [r9, #824] @ 0x338 │ │ - ldc2l 1, cr5, [ip, #196] @ 0xc4 │ │ + ldc2l 3, cr0, [r9, #1004] @ 0x3ec │ │ + ldc2l 1, cr5, [ip, #376] @ 0x178 │ │ │ │ 02485350 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #16 │ │ mov ip, r2 │ │ mov r2, r1 │ │ @@ -1374430,44 +1374429,44 @@ │ │ mov r2, #1 │ │ add r0, pc, r0 │ │ bl 270da90 │ │ ldr r0, [pc, #108] @ 2485944 │ │ mov r1, #24 │ │ add r0, pc, r0 │ │ b 24856d0 │ │ - ldc2l 7, cr4, [r9, #284] @ 0x11c │ │ + ldc2l 7, cr4, [r9, #464] @ 0x1d0 │ │ strdeq r3, [sp], -r4 @ │ │ eoreq r3, sp, r0, lsl lr │ │ eoreq r3, sp, ip, lsl #28 │ │ eoreq r3, sp, r4, lsl #27 │ │ - ldc2l 0, cr6, [sl, #976] @ 0x3d0 │ │ - vcadd.f32 d29, d9, d25, #270 │ │ - ldc2l 7, cr1, [ip, #44] @ 0x2c │ │ + ldc2l 1, cr6, [sl, #132] @ 0x84 │ │ + ldc2l 8, cr13, [r9, #344] @ 0x158 │ │ + ldc2l 7, cr1, [ip, #224] @ 0xe0 │ │ eoreq r3, sp, r0, asr sp │ │ eoreq r3, sp, r0, lsl #26 │ │ - ldc2l 6, cr4, [r9, #128] @ 0x80 │ │ - ldc2l 14, cr11, [r9, #20] │ │ - ldc2l 12, cr5, [sl, #816] @ 0x330 │ │ - ldc2l 12, cr11, [sl, #688] @ 0x2b0 │ │ + ldc2l 6, cr4, [r9, #308] @ 0x134 │ │ + ldc2l 14, cr11, [r9, #200] @ 0xc8 │ │ + ldc2l 12, cr5, [sl, #996] @ 0x3e4 │ │ + ldc2l 12, cr11, [sl, #868] @ 0x364 │ │ eoreq r3, sp, r4, asr #25 │ │ ldc2l 7, cr7, [ip, #448] @ 0x1c0 │ │ - ldc2l 0, cr6, [sl, #144] @ 0x90 │ │ - ldc2l 6, cr13, [r9, #628] @ 0x274 │ │ - ldc2l 5, cr1, [ip, #644] @ 0x284 │ │ - ldc2l 9, cr11, [fp, #362] @ 0x16a @ │ │ + ldc2l 0, cr6, [sl, #324] @ 0x144 │ │ + ldc2l 6, cr13, [r9, #808] @ 0x328 │ │ + ldc2l 5, cr1, [ip, #824] @ 0x338 │ │ + ldc2l 9, cr11, [fp, #452] @ 0x1c4 @ │ │ ldc2l 6, cr7, [ip, #208] @ 0xd0 │ │ - ldc2l 9, cr11, [fp, #42] @ 0x2a @ │ │ - ldc2l 6, cr1, [r9, #172] @ 0xac │ │ - ldc2l 1, cr14, [r9, #708] @ 0x2c4 │ │ - ldc2l 5, cr13, [r9, #996] @ 0x3e4 │ │ - ldc2l 14, cr15, [r8, #92] @ 0x5c │ │ + ldc2l 9, cr11, [fp, #132] @ 0x84 @ │ │ + ldc2l 6, cr1, [r9, #352] @ 0x160 │ │ + ldc2l 1, cr14, [r9, #888] @ 0x378 │ │ + ldc2l 6, cr13, [r9, #152] @ 0x98 │ │ + ldc2l 14, cr15, [r8, #272] @ 0x110 │ │ ldc2l 6, cr7, [ip, #736] @ 0x2e0 │ │ - ldc2l 13, cr11, [sl, #588] @ 0x24c │ │ + ldc2l 13, cr11, [sl, #768] @ 0x300 │ │ mlaeq sp, r8, fp, r3 │ │ - ldc2l 5, cr4, [r9, #332] @ 0x14c │ │ + ldc2l 5, cr4, [r9, #512] @ 0x200 │ │ │ │ 02485958 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #36 @ 0x24 │ │ ldr r5, [fp, #8] │ │ mov r6, r1 │ │ @@ -1374618,26 +1374617,26 @@ │ │ bl 270da90 │ │ ldr r0, [pc, #60] @ 2485bf4 │ │ mov r1, #11 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r5 │ │ b 24859e0 │ │ - ldc2l 6, cr15, [sl, #196] @ 0xc4 │ │ - ldc2l 3, cr3, [ip, #312] @ 0x138 │ │ - ldc2l 5, cr13, [r9, #68] @ 0x44 │ │ - ldc2l 0, cr15, [fp, #996] @ 0x3e4 │ │ - ldc2l 4, cr15, [sl, #948] @ 0x3b4 │ │ - ldc2l 5, cr11, [fp, #1004] @ 0x3ec │ │ - ldc2l 3, cr13, [r9, #804] @ 0x324 │ │ - ldc2l 0, cr2, [r9, #760] @ 0x2f8 │ │ - ldc2l 4, cr15, [sl, #228] @ 0xe4 │ │ - ldc2l 1, cr4, [r9, #428] @ 0x1ac │ │ - ldc2l 3, cr13, [r9, #100] @ 0x64 │ │ - ldc2l 2, cr1, [ip, #280] @ 0x118 │ │ + ldc2l 6, cr15, [sl, #376] @ 0x178 │ │ + ldc2l 3, cr3, [ip, #492] @ 0x1ec │ │ + ldc2l 5, cr13, [r9, #248] @ 0xf8 │ │ + ldc2l 1, cr15, [fp, #152] @ 0x98 │ │ + ldc2l 5, cr15, [sl, #104] @ 0x68 │ │ + ldc2l 6, cr11, [fp, #160] @ 0xa0 │ │ + ldc2l 3, cr13, [r9, #984] @ 0x3d8 │ │ + ldc2l 0, cr2, [r9, #940] @ 0x3ac │ │ + ldc2l 4, cr15, [sl, #408] @ 0x198 │ │ + ldc2l 1, cr4, [r9, #608] @ 0x260 │ │ + ldc2l 3, cr13, [r9, #280] @ 0x118 │ │ + ldc2l 2, cr1, [ip, #460] @ 0x1cc │ │ │ │ 02485bf8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #604 @ 0x25c │ │ sub sp, sp, #5120 @ 0x1400 │ │ mov r6, r3 │ │ @@ -1375046,67 +1375045,67 @@ │ │ str r1, [r8] │ │ add r0, pc, r0 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 10, cr4, [ip, #756] @ 0x2f4 @ │ │ - ldc2l 4, cr4, [ip, #244] @ 0xf4 │ │ - ldc2l 11, cr9, [r9, #76] @ 0x4c @ │ │ + ldc2l 10, cr4, [ip, #936] @ 0x3a8 @ │ │ + ldc2l 4, cr4, [ip, #424] @ 0x1a8 │ │ + ldc2l 11, cr9, [r9, #256] @ 0x100 @ │ │ strbeq r3, [fp], #-840 @ 0xfffffcb8 │ │ strbeq r3, [fp], #-800 @ 0xfffffce0 │ │ strbeq r3, [fp], #-3564 @ 0xfffff214 │ │ strbeq r9, [fp], #-3868 @ 0xfffff0e4 │ │ - ldc2l 14, cr0, [r9, #956] @ 0x3bc │ │ + ldc2l 15, cr0, [r9, #112] @ 0x70 │ │ eoreq r3, sp, r0, lsl #8 │ │ strbeq r3, [fp], #-644 @ 0xfffffd7c │ │ - ldc2l 0, cr15, [sl, #88] @ 0x58 │ │ - ldc2l 15, cr12, [r9, #4] │ │ + ldc2l 0, cr15, [sl, #268] @ 0x10c │ │ + ldc2l 15, cr12, [r9, #184] @ 0xb8 │ │ eoreq r3, sp, r0, ror #6 │ │ - ldc2l 0, cr9, [fp, #552] @ 0x228 │ │ - ldc2l 9, cr9, [r9, #438] @ 0x1b6 @ │ │ + ldc2l 0, cr9, [fp, #732] @ 0x2dc │ │ + ldc2l 10, cr9, [r9, #32] @ │ │ strbeq r3, [fp], #-2792 @ 0xfffff518 │ │ eoreq r3, sp, r4, lsr #2 │ │ strbeq r9, [fp], #-3080 @ 0xfffff3f8 │ │ strbeq r2, [fp], #-4048 @ 0xfffff030 │ │ - ldc2l 7, cr9, [r9, #476] @ 0x1dc │ │ - ldc2l 4, cr15, [sl, #36] @ 0x24 │ │ + ldc2l 7, cr9, [r9, #656] @ 0x290 │ │ + ldc2l 4, cr15, [sl, #216] @ 0xd8 │ │ eoreq r3, sp, r8, lsr #13 │ │ eoreq r3, sp, ip, ror r6 │ │ - ldc2l 9, cr9, [sl, #122] @ 0x7a @ │ │ + ldc2l 9, cr9, [sl, #212] @ 0xd4 @ │ │ strbeq r3, [fp], #-1308 @ 0xfffffae4 │ │ strbeq r3, [fp], #-4072 @ 0xfffff018 │ │ - ldc2l 9, cr7, [sl, #206] @ 0xce @ │ │ - ldc2l 13, cr14, [fp, #660] @ 0x294 │ │ + ldc2l 9, cr7, [sl, #296] @ 0x128 @ │ │ + ldc2l 13, cr14, [fp, #840] @ 0x348 │ │ ldrdeq r3, [sp], -r0 @ │ │ strbeq r3, [fp], #-1212 @ 0xfffffb44 │ │ - ldc2l 0, cr1, [r9, #604] @ 0x25c │ │ - ldc2l 11, cr5, [sl, #700] @ 0x2bc @ │ │ - ldc2l 15, cr2, [ip, #916] @ 0x394 │ │ - ldc2l 4, cr13, [sl, #920] @ 0x398 │ │ + ldc2l 0, cr1, [r9, #784] @ 0x310 │ │ + ldc2l 11, cr5, [sl, #880] @ 0x370 @ │ │ + ldc2l 0, cr3, [ip, #72] @ 0x48 │ │ + ldc2l 5, cr13, [sl, #76] @ 0x4c │ │ strbeq r3, [fp], #-964 @ 0xfffffc3c │ │ - ldc2l 5, cr7, [fp, #360] @ 0x168 │ │ - ldc2l 11, cr15, [r9, #156] @ 0x9c @ │ │ + ldc2l 5, cr7, [fp, #540] @ 0x21c │ │ + ldc2l 11, cr15, [r9, #336] @ 0x150 @ │ │ strbeq r3, [fp], #-3872 @ 0xfffff0e0 │ │ eoreq r3, sp, r8, asr #10 │ │ - ldc2l 3, cr5, [fp, #416] @ 0x1a0 │ │ - ldc2l 10, cr14, [fp, #484] @ 0x1e4 @ │ │ + ldc2l 3, cr5, [fp, #596] @ 0x254 │ │ + ldc2l 10, cr14, [fp, #664] @ 0x298 @ │ │ eoreq r3, sp, r4, lsr #5 │ │ strbeq r3, [fp], #-3164 @ 0xfffff3a4 │ │ - ldc2l 13, cr0, [r9, #412] @ 0x19c │ │ - ldc2l 15, cr14, [sl, #568] @ 0x238 │ │ - ldc2l 12, cr2, [ip, #724] @ 0x2d4 │ │ - ldc2l 1, cr13, [sl, #616] @ 0x268 │ │ + ldc2l 13, cr0, [r9, #592] @ 0x250 │ │ + ldc2l 15, cr14, [sl, #748] @ 0x2ec │ │ + ldc2l 12, cr2, [ip, #904] @ 0x388 │ │ + ldc2l 1, cr13, [sl, #796] @ 0x31c │ │ strbeq r3, [fp], #-120 @ 0xffffff88 │ │ - ldc2l 7, cr15, [r9, #988] @ 0x3dc │ │ - ldc2l 2, cr7, [fp, #856] @ 0x358 │ │ + vcadd.f32 d31, d9, d20, #270 │ │ + ldc2l 3, cr7, [fp, #12] │ │ strbeq r3, [fp], #-3028 @ 0xfffff42c │ │ strdeq r3, [sp], -ip @ │ │ - ldc2l 14, cr14, [sl, #420] @ 0x1a4 │ │ + ldc2l 14, cr14, [sl, #600] @ 0x258 │ │ │ │ 02486344 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 2486360 │ │ @@ -1375122,16 +1375121,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 7, cr4, [ip, #388] @ 0x184 │ │ - ldc2l 0, cr4, [ip, #900] @ 0x384 │ │ + ldc2l 7, cr4, [ip, #568] @ 0x238 │ │ + ldc2l 1, cr4, [ip, #56] @ 0x38 │ │ │ │ 024863a0 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #32 │ │ mov ip, r2 │ │ mov r2, r1 │ │ @@ -1375474,27 +1375473,27 @@ │ │ bgt 24867c0 │ │ ldr r1, [pc, #60] @ 248691c │ │ mov r0, r5 │ │ mov r2, r4 │ │ mov r3, #3 │ │ add r1, pc, r1 │ │ b 24866c0 │ │ - ldc2l 11, cr0, [fp, #676] @ 0x2a4 @ │ │ - ldc2l 4, cr2, [r9, #376] @ 0x178 │ │ + ldc2l 11, cr0, [fp, #856] @ 0x358 @ │ │ + ldc2l 4, cr2, [r9, #556] @ 0x22c │ │ eoreq r2, sp, r8, lsr #24 │ │ eoreq r2, sp, r4, lsr #24 │ │ - ldc2l 12, cr4, [r9, #1000] @ 0x3e8 │ │ + ldc2l 13, cr4, [r9, #156] @ 0x9c │ │ eoreq r2, sp, r0, ror #23 │ │ eoreq r2, sp, r4, asr #23 │ │ strbeq pc, [fp], #-2056 @ 0xfffff7f8 @ │ │ eoreq r2, sp, ip, asr #22 │ │ eoreq r2, sp, r4, asr #22 │ │ eoreq r2, sp, r4, asr #22 │ │ - ldc2l 9, cr4, [sl, #368] @ 0x170 @ │ │ - ldc2l 11, cr0, [fp, #260] @ 0x104 @ │ │ + ldc2l 9, cr4, [sl, #458] @ 0x1ca @ │ │ + ldc2l 11, cr0, [fp, #440] @ 0x1b8 @ │ │ │ │ 02486924 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ mov r7, r0 │ │ ldr r0, [pc, #224] @ 2486a1c │ │ @@ -1375551,16 +1375550,16 @@ │ │ ldr r0, [pc, #24] @ 2486a20 │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 13, cr6, [r9, #820] @ 0x334 │ │ - ldc2l 13, cr6, [r9, #20] │ │ + ldc2l 13, cr6, [r9, #1000] @ 0x3e8 │ │ + ldc2l 13, cr6, [r9, #200] @ 0xc8 │ │ │ │ 02486a24 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r6, r3 │ │ mov r4, r2 │ │ mov r5, r1 │ │ @@ -1375707,32 +1375706,32 @@ │ │ add r0, r1, #1 │ │ str r0, [r4, #4] │ │ ldr r0, [pc, #84] @ 2486ccc │ │ ldr r0, [pc, r0] │ │ str r0, [r4] │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 2, cr12, [fp, #796] @ 0x31c │ │ - ldc2l 13, cr4, [sl, #464] @ 0x1d0 │ │ - vcadd.f32 , q6, , #270 │ │ + ldc2l 2, cr12, [fp, #976] @ 0x3d0 │ │ + ldc2l 13, cr4, [sl, #644] @ 0x284 │ │ + ldc2l 8, cr3, [ip, #600] @ 0x258 │ │ strbeq pc, [fp], #-1304 @ 0xfffffae8 @ │ │ strbeq pc, [fp], #-1284 @ 0xfffffafc @ │ │ strbeq pc, [fp], #-1272 @ 0xfffffb08 @ │ │ strbeq pc, [fp], #-1248 @ 0xfffffb20 @ │ │ strbeq pc, [fp], #-1004 @ 0xfffffc14 @ │ │ strbeq pc, [fp], #-992 @ 0xfffffc20 @ │ │ strbeq pc, [fp], #-852 @ 0xfffffcac @ │ │ strbeq pc, [fp], #-840 @ 0xfffffcb8 @ │ │ strbeq pc, [fp], #-1224 @ 0xfffffb38 @ │ │ strbeq pc, [fp], #-1204 @ 0xfffffb4c @ │ │ strbeq pc, [fp], #-1192 @ 0xfffffb58 @ │ │ strbeq pc, [fp], #-1164 @ 0xfffffb74 @ │ │ - ldc2l 0, cr1, [r9, #712] @ 0x2c8 │ │ - ldc2l 12, cr2, [sl, #492] @ 0x1ec │ │ - ldc2l 14, cr4, [sl, #720] @ 0x2d0 │ │ + ldc2l 0, cr1, [r9, #892] @ 0x37c │ │ + ldc2l 12, cr2, [sl, #672] @ 0x2a0 │ │ + ldc2l 14, cr4, [sl, #900] @ 0x384 │ │ strbeq pc, [fp], #-796 @ 0xfffffce4 @ │ │ │ │ 02486cd0 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ @@ -1375753,17 +1375752,17 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 1, cr12, [fp, #652] @ 0x28c │ │ - ldc2l 12, cr4, [sl, #320] @ 0x140 │ │ - ldc2l 7, cr3, [ip, #276] @ 0x114 │ │ + ldc2l 1, cr12, [fp, #832] @ 0x340 │ │ + ldc2l 12, cr4, [sl, #500] @ 0x1f4 │ │ + ldc2l 7, cr3, [ip, #456] @ 0x1c8 │ │ │ │ 02486d40 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ @@ -1375903,15 +1375902,15 @@ │ │ mov r2, r4 │ │ bl 270dea0 │ │ mov r0, r7 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 2, cr0, [fp, #900] @ 0x384 │ │ + ldc2l 3, cr0, [fp, #56] @ 0x38 │ │ │ │ 02486f68 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #316 @ 0x13c │ │ sub sp, sp, #2048 @ 0x800 │ │ mov r5, r3 │ │ @@ -1376144,43 +1376143,43 @@ │ │ ldr r0, [pc, #132] @ 2487390 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 4, cr6, [fp, #232] @ 0xe8 │ │ + ldc2l 4, cr6, [fp, #412] @ 0x19c │ │ strbeq lr, [fp], #-4072 @ 0xfffff018 │ │ - ldc2l 3, cr12, [r8, #64] @ 0x40 │ │ + ldc2l 3, cr12, [r8, #244] @ 0xf4 │ │ strbeq lr, [fp], #-4020 @ 0xfffff04c │ │ - ldc2l 1, cr10, [fp, #68] @ 0x44 │ │ - ldc2l 0, cr14, [sl, #476] @ 0x1dc │ │ - ldc2l 0, cr6, [r9, #700] @ 0x2bc │ │ + ldc2l 1, cr10, [fp, #248] @ 0xf8 │ │ + ldc2l 0, cr14, [sl, #656] @ 0x290 │ │ + ldc2l 0, cr6, [r9, #880] @ 0x370 │ │ eoreq r2, sp, r4, ror #5 │ │ strbeq lr, [fp], #-3848 @ 0xfffff0f8 │ │ strbeq lr, [fp], #-3828 @ 0xfffff10c │ │ - ldc2l 3, cr8, [sl, #800] @ 0x320 │ │ - ldc2l 12, cr11, [r9, #452] @ 0x1c4 │ │ - ldc2l 14, cr7, [fp, #72] @ 0x48 │ │ + ldc2l 3, cr8, [sl, #980] @ 0x3d4 │ │ + ldc2l 12, cr11, [r9, #632] @ 0x278 │ │ + ldc2l 14, cr7, [fp, #252] @ 0xfc │ │ strbeq lr, [fp], #-3796 @ 0xfffff12c │ │ - ldc2l 8, cr13, [fp, #888] @ 0x378 │ │ - ldc2l 12, cr11, [r9, #692] @ 0x2b4 │ │ - ldc2l 7, cr14, [r9, #664] @ 0x298 │ │ - ldc2l 1, cr4, [sl, #512] @ 0x200 │ │ + ldc2l 9, cr13, [fp, #22] @ │ │ + ldc2l 12, cr11, [r9, #872] @ 0x368 │ │ + ldc2l 7, cr14, [r9, #844] @ 0x34c │ │ + ldc2l 1, cr4, [sl, #692] @ 0x2b4 │ │ strbeq lr, [fp], #-3728 @ 0xfffff170 │ │ strbeq lr, [fp], #-3656 @ 0xfffff1b8 │ │ eoreq r2, sp, r8, ror #3 │ │ ldrdeq r2, [sp], -ip @ │ │ - ldc2l 5, cr14, [r8, #432] @ 0x1b0 │ │ - ldc2l 14, cr13, [sl, #796] @ 0x31c │ │ + ldc2l 5, cr14, [r8, #612] @ 0x264 │ │ + ldc2l 14, cr13, [sl, #976] @ 0x3d0 │ │ eoreq r2, sp, ip, ror #1 │ │ ldrdeq r2, [sp], -ip @ │ │ strhteq r2, [sp], -r4 │ │ eoreq r2, sp, r4, lsl #1 │ │ - ldc2l 0, cr6, [fp, #824] @ 0x338 │ │ + ldc2l 0, cr6, [fp, #1004] @ 0x3ec │ │ │ │ 02487394 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #404 @ 0x194 │ │ sub sp, sp, #1024 @ 0x400 │ │ mov r4, r3 │ │ @@ -1376488,30 +1376487,30 @@ │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldc2l 1, cr9, [ip, #668] @ 0x29c │ │ strbeq lr, [fp], #-3048 @ 0xfffff418 │ │ - ldc2l 14, cr11, [r8, #912] @ 0x390 │ │ + ldc2l 15, cr11, [r8, #68] @ 0x44 │ │ strbeq lr, [fp], #-2996 @ 0xfffff44c │ │ - ldc2l 12, cr9, [fp, #916] @ 0x394 │ │ - ldc2l 5, cr0, [sl, #384] @ 0x180 │ │ - ldc2l 12, cr5, [r9, #524] @ 0x20c │ │ + ldc2l 13, cr9, [fp, #72] @ 0x48 │ │ + ldc2l 5, cr0, [sl, #564] @ 0x234 │ │ + ldc2l 12, cr5, [r9, #704] @ 0x2c0 │ │ eoreq r1, sp, ip, ror #29 │ │ strbeq lr, [fp], #-2824 @ 0xfffff4f8 │ │ strbeq lr, [fp], #-2804 @ 0xfffff50c │ │ - ldc2l 15, cr7, [sl, #336] @ 0x150 │ │ - ldc2l 7, cr11, [r9, #1012] @ 0x3f4 │ │ - ldc2l 9, cr7, [fp, #316] @ 0x13c @ │ │ + ldc2l 15, cr7, [sl, #516] @ 0x204 │ │ + vcadd.f32 d27, d9, d26, #270 │ │ + ldc2l 9, cr7, [fp, #406] @ 0x196 @ │ │ strbeq lr, [fp], #-2772 @ 0xfffff52c │ │ - ldc2l 4, cr13, [fp, #424] @ 0x1a8 │ │ - ldc2l 8, cr11, [r9, #228] @ 0xe4 │ │ - ldc2l 3, cr14, [r9, #200] @ 0xc8 │ │ - ldc2l 13, cr3, [sl, #336] @ 0x150 │ │ + ldc2l 4, cr13, [fp, #604] @ 0x25c │ │ + vcadd.f32 , , q11, #270 │ │ + ldc2l 3, cr14, [r9, #380] @ 0x17c │ │ + ldc2l 13, cr3, [sl, #516] @ 0x204 │ │ strbeq lr, [fp], #-2704 @ 0xfffff570 │ │ strbeq lr, [fp], #-2632 @ 0xfffff5b8 │ │ strdeq r1, [sp], -r0 @ │ │ strdeq r1, [sp], -ip @ │ │ eoreq r1, sp, r0, ror #27 │ │ eoreq r1, sp, r4, asr #27 │ │ eoreq r1, sp, r8, lsr #27 │ │ @@ -1376921,59 +1376920,59 @@ │ │ str r0, [fp, #-48] @ 0xffffffd0 │ │ bge 2487bc8 │ │ sub r1, r0, #1 │ │ cmp r0, #0 │ │ ble 2487ee8 │ │ mov r2, r0 │ │ b 2487f00 │ │ - ldc2l 1, cr12, [r9, #792] @ 0x318 │ │ + ldc2l 1, cr12, [r9, #972] @ 0x3cc │ │ strbeq lr, [fp], #-1724 @ 0xfffff944 │ │ - ldc2l 9, cr11, [r8, #272] @ 0x110 @ │ │ + ldc2l 9, cr11, [r8, #362] @ 0x16a @ │ │ strbeq lr, [fp], #-2696 @ 0xfffff578 │ │ - ldc2l 7, cr9, [fp, #548] @ 0x224 │ │ + ldc2l 7, cr9, [fp, #728] @ 0x2d8 │ │ ldc2l 13, cr6, [ip, #924] @ 0x39c │ │ - ldc2l 7, cr5, [r9, #156] @ 0x9c │ │ + ldc2l 7, cr5, [r9, #336] @ 0x150 │ │ eoreq r1, sp, r0, asr #19 │ │ strbeq lr, [fp], #-2524 @ 0xfffff624 │ │ strbeq lr, [fp], #-1480 @ 0xfffffa38 │ │ - ldc2l 10, cr7, [sl, #48] @ 0x30 @ │ │ - ldc2l 2, cr11, [r9, #724] @ 0x2d4 │ │ - ldc2l 4, cr7, [fp, #344] @ 0x158 │ │ + ldc2l 10, cr7, [sl, #228] @ 0xe4 @ │ │ + ldc2l 2, cr11, [r9, #904] @ 0x388 │ │ + ldc2l 4, cr7, [fp, #524] @ 0x20c │ │ strbeq lr, [fp], #-1448 @ 0xfffffa58 │ │ - ldc2l 15, cr12, [fp, #1016] @ 0x3f8 │ │ - ldc2l 3, cr11, [r9, #820] @ 0x334 │ │ - ldc2l 14, cr13, [r9, #792] @ 0x318 │ │ - ldc2l 7, cr3, [sl, #992] @ 0x3e0 │ │ + ldc2l 0, cr13, [fp, #172] @ 0xac │ │ + ldc2l 3, cr11, [r9, #1000] @ 0x3e8 │ │ + ldc2l 14, cr13, [r9, #972] @ 0x3cc │ │ + vcadd.f32 d19, d10, d21, #270 │ │ strbeq lr, [fp], #-2404 @ 0xfffff69c │ │ strbeq lr, [fp], #-1240 @ 0xfffffb28 │ │ eoreq r1, sp, r0, lsl #17 │ │ strbeq lr, [fp], #-1180 @ 0xfffffb64 │ │ eoreq r1, sp, r4, ror r8 │ │ - ldc2l 11, cr13, [r8, #640] @ 0x280 @ │ │ + ldc2l 11, cr13, [r8, #820] @ 0x334 @ │ │ ldc2l 11, cr6, [ip, #972] @ 0x3cc @ │ │ mlaeq sp, r4, r7, r1 │ │ eoreq r1, sp, r4, lsl #15 │ │ eoreq r1, sp, r8, asr r7 │ │ strbeq lr, [fp], #-880 @ 0xfffffc90 │ │ strbeq lr, [fp], #-816 @ 0xfffffcd0 │ │ - ldc2l 9, cr13, [r8, #264] @ 0x108 @ │ │ + ldc2l 9, cr13, [r8, #354] @ 0x162 @ │ │ ldc2l 9, cr6, [ip, #430] @ 0x1ae @ │ │ strbeq lr, [fp], #-580 @ 0xfffffdbc │ │ - ldc2l 14, cr1, [r9, #924] @ 0x39c │ │ + ldc2l 15, cr1, [r9, #80] @ 0x50 │ │ ldc2l 9, cr6, [ip, #70] @ 0x46 @ │ │ strbeq lr, [fp], #-412 @ 0xfffffe64 │ │ - ldc2l 14, cr1, [r9, #492] @ 0x1ec │ │ + ldc2l 14, cr1, [r9, #672] @ 0x2a0 │ │ ldc2l 8, cr6, [ip, #732] @ 0x2dc │ │ strbeq lr, [fp], #-736 @ 0xfffffd20 │ │ - vcadd.f32 d29, d8, d28, #270 │ │ + ldc2l 8, cr13, [r8, #356] @ 0x164 │ │ ldc2l 8, cr6, [ip, #508] @ 0x1fc │ │ strbeq lr, [fp], #-240 @ 0xffffff10 │ │ strbeq lr, [fp], #-1056 @ 0xfffffbe0 │ │ eoreq r1, sp, r0, lsl #16 │ │ - ldc2l 14, cr11, [r9, #280] @ 0x118 │ │ + ldc2l 14, cr11, [r9, #460] @ 0x1cc │ │ │ │ 02487fe8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #172 @ 0xac │ │ mov r5, r3 │ │ mov r4, r2 │ │ @@ -1377199,15 +1377198,15 @@ │ │ ldr r0, [pc, #124] @ 24883ec │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 13, cr1, [r9, #36] @ 0x24 │ │ + ldc2l 13, cr1, [r9, #216] @ 0xd8 │ │ strbeq lr, [fp], #-1008 @ 0xfffffc10 │ │ strbeq lr, [fp], #-992 @ 0xfffffc20 │ │ strbeq lr, [fp], #-1608 @ 0xfffff9b8 │ │ strbeq lr, [fp], #-1431 @ 0xfffffa69 │ │ strdeq r1, [sp], -ip @ │ │ strbeq lr, [fp], #-780 @ 0xfffffcf4 │ │ eoreq r1, sp, r0, lsl #5 │ │ @@ -1377221,19 +1377220,19 @@ │ │ mlaeq sp, r0, r1, r1 │ │ eoreq r1, sp, r0, ror r1 │ │ strbeq lr, [fp], #-412 @ 0xfffffe64 │ │ eoreq r1, sp, ip, asr #2 │ │ strbeq lr, [fp], #-979 @ 0xfffffc2d │ │ eoreq r1, sp, r8, lsr #2 │ │ strbeq lr, [fp], #-972 @ 0xfffffc34 │ │ - ldc2l 13, cr12, [sl, #452] @ 0x1c4 │ │ - ldc2l 11, cr10, [r9, #692] @ 0x2b4 @ │ │ + ldc2l 13, cr12, [sl, #632] @ 0x278 │ │ + ldc2l 11, cr10, [r9, #872] @ 0x368 @ │ │ ldc2l 1, cr6, [ip, #912] @ 0x390 │ │ - ldc2l 6, cr10, [fp, #520] @ 0x208 │ │ - ldc2l 9, cr1, [r9, #362] @ 0x16a @ │ │ + ldc2l 6, cr10, [fp, #700] @ 0x2bc │ │ + ldc2l 9, cr1, [r9, #452] @ 0x1c4 @ │ │ │ │ 024883f0 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #1312 @ 0x520 │ │ mov r5, r2 │ │ mov r4, r1 │ │ @@ -1377387,36 +1377386,36 @@ │ │ mov r3, r5 │ │ str r1, [sp] │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ add r1, sp, #24 │ │ bl 270f990 │ │ b 2488628 │ │ - ldc2l 5, cr15, [r9, #424] @ 0x1a8 │ │ + ldc2l 5, cr15, [r9, #604] @ 0x25c │ │ strbeq lr, [fp], #-932 @ 0xfffffc5c │ │ strbeq lr, [fp], #-916 @ 0xfffffc6c │ │ - ldc2l 0, cr7, [r9, #536] @ 0x218 │ │ + ldc2l 0, cr7, [r9, #716] @ 0x2cc │ │ strbeq lr, [fp], #-872 @ 0xfffffc98 │ │ strbeq lr, [fp], #-828 @ 0xfffffcc4 │ │ - ldc2l 14, cr4, [fp, #588] @ 0x24c │ │ - ldc2l 9, cr10, [r9, #186] @ 0xba @ │ │ - ldc2l 4, cr13, [r9, #344] @ 0x158 │ │ + ldc2l 14, cr4, [fp, #768] @ 0x300 │ │ + ldc2l 9, cr10, [r9, #276] @ 0x114 @ │ │ + ldc2l 4, cr13, [r9, #524] @ 0x20c │ │ strbeq lr, [fp], #-768 @ 0xfffffd00 │ │ strbeq lr, [fp], #-764 @ 0xfffffd04 │ │ eoreq r0, sp, r4, lsl pc │ │ eoreq r0, sp, r0, lsl pc │ │ - ldc2l 8, cr0, [ip, #364] @ 0x16c │ │ - ldc2l 8, cr10, [r9, #852] @ 0x354 │ │ - ldc2l 10, cr12, [r8, #700] @ 0x2bc @ │ │ + vcadd.f32 d16, d28, d8, #270 │ │ + ldc2l 9, cr10, [r9, #4] @ │ │ + ldc2l 10, cr12, [r8, #880] @ 0x370 @ │ │ mlaeq sp, r0, lr, r0 │ │ eoreq r0, sp, ip, ror lr │ │ - ldc2l 13, cr2, [fp, #852] @ 0x354 │ │ + ldc2l 14, cr2, [fp, #8] │ │ strbeq lr, [fp], #-380 @ 0xfffffe84 │ │ eoreq r0, sp, r8, asr #27 │ │ - ldc2l 3, cr15, [r9, #344] @ 0x158 │ │ + ldc2l 3, cr15, [r9, #524] @ 0x20c │ │ │ │ 024886c4 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #1312 @ 0x520 │ │ mov r5, r2 │ │ mov r4, r1 │ │ @@ -1377570,36 +1377569,36 @@ │ │ mov r3, r5 │ │ str r1, [sp] │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ add r1, sp, #24 │ │ bl 270f9a0 │ │ b 24888fc │ │ - ldc2l 12, cr6, [fp, #524] @ 0x20c │ │ + ldc2l 12, cr6, [fp, #704] @ 0x2c0 │ │ strbeq lr, [fp], #-224 @ 0xffffff20 │ │ strbeq lr, [fp], #-208 @ 0xffffff30 │ │ - ldc2l 13, cr6, [r9, #712] @ 0x2c8 │ │ + ldc2l 13, cr6, [r9, #892] @ 0x37c │ │ strbeq lr, [fp], #-164 @ 0xffffff5c │ │ strbeq lr, [fp], #-120 @ 0xffffff88 │ │ - ldc2l 11, cr4, [fp, #764] @ 0x2fc @ │ │ - ldc2l 6, cr10, [r9, #548] @ 0x224 │ │ - ldc2l 1, cr13, [r9, #520] @ 0x208 │ │ + ldc2l 11, cr4, [fp, #944] @ 0x3b0 @ │ │ + ldc2l 6, cr10, [r9, #728] @ 0x2d8 │ │ + ldc2l 1, cr13, [r9, #700] @ 0x2bc │ │ strbeq lr, [fp], #-60 @ 0xffffffc4 │ │ strbeq lr, [fp], #-56 @ 0xffffffc8 │ │ eoreq r0, sp, r0, ror ip │ │ eoreq r0, sp, ip, ror #24 │ │ ldc2l 1, cr4, [ip, #872] @ 0x368 │ │ - ldc2l 6, cr10, [r9, #4] │ │ - ldc2l 7, cr12, [r8, #876] @ 0x36c │ │ + ldc2l 6, cr10, [r9, #184] @ 0xb8 │ │ + vcadd.f32 d28, d8, d8, #270 │ │ eoreq r0, sp, ip, ror #23 │ │ ldrdeq r0, [sp], -r8 @ │ │ - ldc2l 0, cr3, [r9, #192] @ 0xc0 │ │ + ldc2l 0, cr3, [r9, #372] @ 0x174 │ │ strbeq sp, [fp], #-3768 @ 0xfffff148 │ │ eoreq r0, sp, r4, lsr #22 │ │ - ldc2l 10, cr6, [fp, #444] @ 0x1bc @ │ │ + ldc2l 10, cr6, [fp, #624] @ 0x270 @ │ │ │ │ 02488998 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #172 @ 0xac │ │ str r3, [sp, #16] │ │ mov r6, r2 │ │ @@ -1377816,15 +1377815,15 @@ │ │ ldr r0, [pc, #120] @ 2488d74 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 0, cr13, [r9, #80] @ 0x50 │ │ + ldc2l 0, cr13, [r9, #260] @ 0x104 │ │ strbeq sp, [fp], #-3596 @ 0xfffff1f4 │ │ strbeq sp, [fp], #-3580 @ 0xfffff204 │ │ strbeq lr, [fp], #-108 @ 0xffffff94 │ │ strbeq sp, [fp], #-4031 @ 0xfffff041 │ │ eoreq r0, sp, ip, asr #19 │ │ strbeq sp, [fp], #-3376 @ 0xfffff2d0 │ │ eoreq r0, sp, r0, asr r9 │ │ @@ -1377837,19 +1377836,19 @@ │ │ eoreq r0, sp, r0, lsl #17 │ │ eoreq r0, sp, r0, ror #16 │ │ strbeq sp, [fp], #-3040 @ 0xfffff420 │ │ eoreq r0, sp, ip, lsr r8 │ │ strbeq sp, [fp], #-3611 @ 0xfffff1e5 │ │ eoreq r0, sp, r8, lsl r8 │ │ strbeq sp, [fp], #-3608 @ 0xfffff1e8 │ │ - ldc2l 3, cr12, [sl, #916] @ 0x394 │ │ - ldc2l 2, cr10, [r9, #132] @ 0x84 │ │ + ldc2l 4, cr12, [sl, #72] @ 0x48 │ │ + ldc2l 2, cr10, [r9, #312] @ 0x138 │ │ ldc2l 8, cr5, [ip, #352] @ 0x160 │ │ - ldc2l 3, cr12, [r8, #668] @ 0x29c │ │ - ldc2l 12, cr12, [r9, #912] @ 0x390 │ │ + ldc2l 3, cr12, [r8, #848] @ 0x350 │ │ + ldc2l 13, cr12, [r9, #68] @ 0x44 │ │ │ │ 02488d78 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ sub sp, sp, #1024 @ 0x400 │ │ mov r6, r3 │ │ @@ -1378070,37 +1378069,37 @@ │ │ bl 270d970 │ │ ldr r2, [fp, #24] │ │ add r1, sp, #16 │ │ mov r0, r9 │ │ mov r3, #60 @ 0x3c │ │ bl 270d970 │ │ b 248901c │ │ - ldc2l 13, cr1, [ip, #152] @ 0x98 │ │ + ldc2l 13, cr1, [ip, #332] @ 0x14c │ │ strbeq sp, [fp], #-3564 @ 0xfffff214 │ │ eoreq r0, sp, ip, lsr #13 │ │ - ldc2l 6, cr6, [r9, #984] @ 0x3d8 │ │ + ldc2l 7, cr6, [r9, #140] @ 0x8c │ │ strbeq sp, [fp], #-3496 @ 0xfffff258 │ │ eoreq r0, sp, r8, lsl #13 │ │ eoreq r0, sp, r4, lsr r6 │ │ eoreq r0, sp, r0, lsr #12 │ │ eoreq r0, sp, r8, lsr #12 │ │ eoreq r0, sp, r8, lsl #12 │ │ eoreq r0, sp, r8, ror #11 │ │ eoreq r0, sp, r8, asr #11 │ │ eoreq r0, sp, r8, lsr #11 │ │ eoreq r0, sp, r8, lsl #11 │ │ - ldc2l 3, cr10, [r8, #672] @ 0x2a0 │ │ - ldc2l 15, cr9, [r9, #388] @ 0x184 │ │ - ldc2l 0, cr12, [r8, #748] @ 0x2ec │ │ + ldc2l 3, cr10, [r8, #852] @ 0x354 │ │ + ldc2l 15, cr9, [r9, #568] @ 0x238 │ │ + ldc2l 0, cr12, [r8, #928] @ 0x3a0 │ │ eoreq r0, sp, r8, lsl r5 │ │ eoreq r0, sp, ip, lsl #10 │ │ - ldc2l 12, cr14, [r8, #60] @ 0x3c │ │ - ldc2l 14, cr9, [r9, #900] @ 0x384 │ │ + ldc2l 12, cr14, [r8, #240] @ 0xf0 │ │ + ldc2l 15, cr9, [r9, #56] @ 0x38 │ │ eoreq r0, sp, r8, lsr r4 │ │ - ldc2l 10, cr1, [ip, #696] @ 0x2b8 @ │ │ + ldc2l 10, cr1, [ip, #876] @ 0x36c @ │ │ │ │ 0248915c : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ add r5, sp, #8 │ │ mov r4, r2 │ │ @@ -1378164,15 +1378163,15 @@ │ │ mov r3, #8 │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ eoreq r0, sp, r8, ror #6 │ │ strdeq r0, [sp], -r8 @ │ │ - ldc2l 12, cr13, [r8, #252] @ 0xfc │ │ + ldc2l 12, cr13, [r8, #432] @ 0x1b0 │ │ strhteq r0, [sp], -ip │ │ eoreq r0, sp, r0, asr #5 │ │ strhteq r0, [sp], -r4 │ │ │ │ 02489280 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ @@ -1379085,15 +1379084,15 @@ │ │ str r0, [r7] │ │ mov r0, #1 │ │ b 248a0c4 │ │ mov r0, #0 │ │ str r0, [r7] │ │ str r0, [sl] │ │ b 248b66c │ │ - ldc2l 0, cr0, [fp, #744] @ 0x2e8 │ │ + ldc2l 0, cr0, [fp, #924] @ 0x39c │ │ strbeq sp, [fp], #-2212 @ 0xfffff75c │ │ strbteq fp, [r1], #-3980 @ 0xfffff074 │ │ strbteq fp, [r1], #-4056 @ 0xfffff028 │ │ strbteq fp, [r1], #-4064 @ 0xfffff020 │ │ strbteq fp, [r1], #-3992 @ 0xfffff068 │ │ strbteq fp, [r1], #-4020 @ 0xfffff04c │ │ strbteq fp, [r1], #-3948 @ 0xfffff094 │ │ @@ -1379285,16 +1379284,16 @@ │ │ b 248b664 │ │ eoreq r0, sp, ip, lsl #2 │ │ strbteq fp, [r1], #-3780 @ 0xfffff13c │ │ strhteq r0, [sp], -r4 │ │ strbteq fp, [r1], #-3720 @ 0xfffff178 │ │ strbteq r6, [r1], #-3820 @ 0xfffff114 │ │ strbeq sp, [fp], #-1832 @ 0xfffff8d8 │ │ - ldc2l 12, cr11, [sl, #84] @ 0x54 │ │ - ldc2l 15, cr1, [fp, #356] @ 0x164 │ │ + ldc2l 12, cr11, [sl, #264] @ 0x108 │ │ + ldc2l 15, cr1, [fp, #536] @ 0x218 │ │ strbeq sp, [fp], #-1768 @ 0xfffff918 │ │ strbteq fp, [r1], #-3528 @ 0xfffff238 │ │ strbteq fp, [r1], #-3604 @ 0xfffff1ec │ │ strbteq fp, [r1], #-3612 @ 0xfffff1e4 │ │ strbteq fp, [r1], #-3540 @ 0xfffff22c │ │ strbteq fp, [r1], #-3564 @ 0xfffff214 │ │ strbteq fp, [r1], #-3496 @ 0xfffff258 │ │ @@ -1379426,23 +1379425,23 @@ │ │ mov r2, #1 │ │ mov r3, r8 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3984] @ 248b5a8 │ │ mov r1, #22 │ │ add r0, pc, r0 │ │ b 248b584 │ │ - ldc2l 3, cr12, [r9, #756] @ 0x2f4 │ │ + ldc2l 3, cr12, [r9, #936] @ 0x3a8 │ │ strbeq sp, [fp], #-1400 @ 0xfffffa88 │ │ strbteq fp, [r1], #-3168 @ 0xfffff3a0 │ │ strbteq fp, [r1], #-3244 @ 0xfffff354 │ │ strbteq fp, [r1], #-3252 @ 0xfffff34c │ │ strbteq fp, [r1], #-3180 @ 0xfffff394 │ │ strbteq fp, [r1], #-3208 @ 0xfffff378 │ │ strbteq fp, [r1], #-3136 @ 0xfffff3c0 │ │ - ldc2l 3, cr12, [r9, #276] @ 0x114 │ │ + ldc2l 3, cr12, [r9, #456] @ 0x1c8 │ │ strbeq sp, [fp], #-1260 @ 0xfffffb14 │ │ strbteq fp, [r1], #-3020 @ 0xfffff434 │ │ strbteq fp, [r1], #-3096 @ 0xfffff3e8 │ │ strbteq fp, [r1], #-3104 @ 0xfffff3e0 │ │ strbteq fp, [r1], #-3032 @ 0xfffff428 │ │ strbteq fp, [r1], #-3060 @ 0xfffff40c │ │ strbteq fp, [r1], #-2988 @ 0xfffff454 │ │ @@ -1379511,21 +1379510,21 @@ │ │ add r0, pc, r0 │ │ mov r2, #1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3900] @ 248b6a8 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ b 248a3c4 │ │ - ldc2l 15, cr3, [sl, #12] │ │ - ldc2l 11, cr5, [fp, #976] @ 0x3d0 @ │ │ + ldc2l 15, cr3, [sl, #192] @ 0xc0 │ │ + ldc2l 12, cr5, [fp, #132] @ 0x84 │ │ strbteq r6, [r1], #-3048 @ 0xfffff418 │ │ strbeq sp, [fp], #-1012 @ 0xfffffc0c │ │ strbeq r2, [ip], #-544 @ 0xfffffde0 │ │ - ldc2l 12, cr0, [ip, #784] @ 0x310 │ │ - ldc2l 11, cr5, [fp, #448] @ 0x1c0 @ │ │ + ldc2l 12, cr0, [ip, #964] @ 0x3c4 │ │ + ldc2l 11, cr5, [fp, #628] @ 0x274 @ │ │ strbeq r0, [sp], #-3120 @ 0xfffff3d0 │ │ strhteq pc, [ip], -r0 @ │ │ strbteq fp, [r1], #-2692 @ 0xfffff57c │ │ strbeq fp, [ip], #-3468 @ 0xfffff274 │ │ ldr r0, [pc, #3844] @ 248b6ac │ │ mov r1, #93 @ 0x5d │ │ add r0, pc, r0 │ │ @@ -1379598,34 +1379597,34 @@ │ │ strbeq sp, [fp], #-764 @ 0xfffffd04 │ │ strbteq fp, [r1], #-2524 @ 0xfffff624 │ │ strbteq fp, [r1], #-2600 @ 0xfffff5d8 │ │ strbteq fp, [r1], #-2608 @ 0xfffff5d0 │ │ strbteq fp, [r1], #-2536 @ 0xfffff618 │ │ strbteq fp, [r1], #-2560 @ 0xfffff600 │ │ strbteq fp, [r1], #-2492 @ 0xfffff644 │ │ - ldc2l 10, cr5, [fp, #372] @ 0x174 @ │ │ + ldc2l 10, cr5, [fp, #552] @ 0x228 @ │ │ strbeq sp, [fp], #-600 @ 0xfffffda8 │ │ strbteq fp, [r1], #-2364 @ 0xfffff6c4 │ │ strbteq fp, [r1], #-2440 @ 0xfffff678 │ │ strbteq fp, [r1], #-2448 @ 0xfffff670 │ │ strbteq fp, [r1], #-2376 @ 0xfffff6b8 │ │ strbteq fp, [r1], #-2404 @ 0xfffff69c │ │ strbteq fp, [r1], #-2332 @ 0xfffff6e4 │ │ strbeq sp, [fp], #-472 @ 0xfffffe28 │ │ strbeq r2, [ip], #-0 │ │ - ldc2l 10, cr0, [ip, #672] @ 0x2a0 @ │ │ - ldc2l 9, cr5, [fp, #168] @ 0xa8 @ │ │ + ldc2l 10, cr0, [ip, #852] @ 0x354 @ │ │ + ldc2l 9, cr5, [fp, #258] @ 0x102 @ │ │ strbeq r0, [sp], #-2580 @ 0xfffff5ec │ │ mlaeq ip, r8, sl, pc @ │ │ strbteq fp, [r1], #-2156 @ 0xfffff794 │ │ - ldc2l 9, cr3, [fp, #424] @ 0x1a8 @ │ │ - ldc2l 8, cr5, [fp, #720] @ 0x2d0 │ │ + ldc2l 10, cr3, [fp, #4] @ │ │ + vcadd.f32 , , , #270 │ │ strbeq fp, [ip], #-2900 @ 0xfffff4ac │ │ - ldc2l 9, cr1, [fp, #58] @ 0x3a @ │ │ - ldc2l 8, cr5, [fp, #368] @ 0x170 │ │ + ldc2l 9, cr1, [fp, #148] @ 0x94 @ │ │ + vcadd.f32 d21, d27, d9, #270 │ │ cmp r7, #4 │ │ bhi 248afd0 │ │ mov r0, #1 │ │ mov r1, #22 │ │ tst r1, r0, lsl r7 │ │ beq 248afd0 │ │ ldr r1, [pc, #4084] @ 248b934 │ │ @@ -1379747,21 +1379746,21 @@ │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3980] @ 248baa4 │ │ mov r1, #10 │ │ add r0, pc, r0 │ │ b 248b584 │ │ strbeq r6, [ip], #-3292 @ 0xfffff324 │ │ - ldc2l 5, cr11, [sl, #996] @ 0x3e4 │ │ - ldc2l 9, cr3, [fp, #80] @ 0x50 @ │ │ - vcadd.f32 d21, d11, d8, #270 │ │ + ldc2l 6, cr11, [sl, #152] @ 0x98 │ │ + ldc2l 9, cr3, [fp, #170] @ 0xaa @ │ │ + ldc2l 8, cr5, [fp, #212] @ 0xd4 │ │ strbeq fp, [ip], #-2728 @ 0xfffff558 │ │ - ldc2l 15, cr9, [r9, #772] @ 0x304 │ │ - ldc2l 7, cr5, [fp, #864] @ 0x360 │ │ - ldc2l 3, cr9, [r9, #4] │ │ + ldc2l 15, cr9, [r9, #952] @ 0x3b8 │ │ + vcadd.f32 d21, d11, d5, #270 │ │ + ldc2l 3, cr9, [r9, #184] @ 0xb8 │ │ movw r0, #5001 @ 0x1389 │ │ cmp r5, r0 │ │ str r9, [fp, #-48] @ 0xffffffd0 │ │ bcc 248ab70 │ │ ldr r0, [pc, #3920] @ 248baa8 │ │ mov r1, r9 │ │ ldr r2, [pc, #3916] @ 248baac │ │ @@ -1379786,41 +1379785,41 @@ │ │ ldr r8, [pc, #4056] @ 248bb84 │ │ add r1, pc, r1 │ │ add r6, r1, r0 │ │ add r7, pc, r7 │ │ add r8, pc, r8 │ │ b 248ac48 │ │ ldc2l 11, cr4, [ip, #880] @ 0x370 @ │ │ - ldc2l 7, cr5, [fp, #576] @ 0x240 │ │ + ldc2l 7, cr5, [fp, #756] @ 0x2f4 │ │ strbeq r5, [sp], #-1632 @ 0xfffff9a0 │ │ - ldc2l 2, cr9, [r9, #708] @ 0x2c4 │ │ - ldc2l 1, cr0, [r9, #40] @ 0x28 │ │ + ldc2l 2, cr9, [r9, #888] @ 0x378 │ │ + ldc2l 1, cr0, [r9, #220] @ 0xdc │ │ strbeq ip, [fp], #-3968 @ 0xfffff080 │ │ strbteq fp, [r1], #-1632 @ 0xfffff9a0 │ │ strbteq fp, [r1], #-1708 @ 0xfffff954 │ │ strbteq fp, [r1], #-1716 @ 0xfffff94c │ │ strbteq fp, [r1], #-1644 @ 0xfffff994 │ │ strbteq fp, [r1], #-1672 @ 0xfffff978 │ │ strbteq fp, [r1], #-1600 @ 0xfffff9c0 │ │ strbeq ip, [fp], #-3832 @ 0xfffff108 │ │ strbeq r1, [ip], #-3364 @ 0xfffff2dc │ │ strbeq r0, [sp], #-1876 @ 0xfffff8ac │ │ strbteq fp, [r1], #-1452 @ 0xfffffa54 │ │ - ldc2l 9, cr11, [r8, #464] @ 0x1d0 @ │ │ + ldc2l 10, cr11, [r8, #84] @ 0x54 @ │ │ strbeq ip, [fp], #-3704 @ 0xfffff188 │ │ strbteq fp, [r1], #-1376 @ 0xfffffaa0 │ │ strbteq fp, [r1], #-1452 @ 0xfffffa54 │ │ strbteq fp, [r1], #-1460 @ 0xfffffa4c │ │ strbteq fp, [r1], #-1388 @ 0xfffffa94 │ │ strbteq fp, [r1], #-1416 @ 0xfffffa78 │ │ strbteq fp, [r1], #-1344 @ 0xfffffac0 │ │ - ldc2l 9, cr11, [r8, #224] @ 0xe0 @ │ │ - ldc2l 8, cr3, [sl, #728] @ 0x2d8 │ │ - ldc2l 6, cr0, [ip, #516] @ 0x204 │ │ - ldc2l 0, cr13, [r8, #60] @ 0x3c │ │ + ldc2l 9, cr11, [r8, #314] @ 0x13a @ │ │ + vcadd.f32 , q13, , #270 │ │ + ldc2l 6, cr0, [ip, #696] @ 0x2b8 │ │ + ldc2l 0, cr13, [r8, #240] @ 0xf0 │ │ ldr r0, [fp, #-48] @ 0xffffffd0 │ │ add r5, r5, #1 │ │ add r1, r4, r9, lsl #3 │ │ add r6, r6, #255 @ 0xff │ │ cmp r5, r0 │ │ vstr d8, [r1] │ │ bge 248b1fc │ │ @@ -1379932,20 +1379931,20 @@ │ │ add r7, pc, r7 │ │ ldr r4, [r7, r0, lsl #2] │ │ bcs 248ae20 │ │ add r0, r7, r5, lsl #2 │ │ str r4, [r0, #-4] │ │ mov r0, r9 │ │ b 248ae60 │ │ - ldc2l 6, cr0, [ip, #656] @ 0x290 │ │ - ldc2l 5, cr5, [fp, #320] @ 0x140 │ │ + ldc2l 6, cr0, [ip, #836] @ 0x344 │ │ + ldc2l 5, cr5, [fp, #500] @ 0x1f4 │ │ strbeq r0, [sp], #-1552 @ 0xfffff9f0 │ │ ldc2l 9, cr4, [ip, #208] @ 0xd0 @ │ │ - ldc2l 5, cr5, [fp, #96] @ 0x60 │ │ - ldc2l 4, cr9, [sl, #992] @ 0x3e0 │ │ + ldc2l 5, cr5, [fp, #276] @ 0x114 │ │ + ldc2l 5, cr9, [sl, #148] @ 0x94 │ │ ldr r0, [pc, #3988] @ 248bdbc │ │ mov r1, r9 │ │ mov r2, r8 │ │ movw r3, #1693 @ 0x69d │ │ add r0, pc, r0 │ │ str r6, [sp, #84] @ 0x54 │ │ mov r6, r8 │ │ @@ -1379970,25 +1379969,25 @@ │ │ mov r3, #255 @ 0xff │ │ bl 270d970 │ │ mov r0, r5 │ │ mov r7, r8 │ │ b 248af1c │ │ strbteq r6, [r1], #-1340 @ 0xfffffac4 │ │ strbeq r5, [sp], #-956 @ 0xfffffc44 │ │ - ldc2l 5, cr3, [fp, #816] @ 0x330 │ │ + ldc2l 5, cr3, [fp, #996] @ 0x3e4 │ │ strbeq fp, [ip], #-1860 @ 0xfffff8bc │ │ - ldc2l 2, cr11, [sl, #252] @ 0xfc │ │ + ldc2l 2, cr11, [sl, #432] @ 0x1b0 │ │ strbeq ip, [fp], #-3256 @ 0xfffff348 │ │ - ldc2l 5, cr1, [fp, #84] @ 0x54 │ │ + ldc2l 5, cr1, [fp, #264] @ 0x108 │ │ strbeq r6, [ip], #-2252 @ 0xfffff734 │ │ - ldc2l 14, cr12, [r8, #700] @ 0x2bc │ │ - ldc2l 5, cr0, [ip, #256] @ 0x100 │ │ - ldc2l 3, cr5, [fp, #944] @ 0x3b0 │ │ + ldc2l 14, cr12, [r8, #880] @ 0x370 │ │ + ldc2l 5, cr0, [ip, #436] @ 0x1b4 │ │ + ldc2l 4, cr5, [fp, #100] @ 0x64 │ │ strbeq r0, [sp], #-1196 @ 0xfffffb54 │ │ - ldc2l 1, cr11, [sl, #460] @ 0x1cc │ │ + ldc2l 1, cr11, [sl, #640] @ 0x280 │ │ ldr r0, [pc, #3828] @ 248bdc8 │ │ mov r1, r5 │ │ mov r2, r8 │ │ movw r3, #1694 @ 0x69e │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ rsb r0, r0, r0, lsl #8 │ │ @@ -1380041,15 +1380040,15 @@ │ │ mov r1, r9 │ │ mov r2, r7 │ │ mov r3, #1696 @ 0x6a0 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r9, r0 │ │ b 248ac2c │ │ - ldc2l 3, cr5, [fp, #704] @ 0x2c0 │ │ + ldc2l 3, cr5, [fp, #884] @ 0x374 │ │ strbteq fp, [r1], #-740 @ 0xfffffd1c │ │ strbeq ip, [fp], #-3044 @ 0xfffff41c │ │ strbeq ip, [fp], #-2976 @ 0xfffff460 │ │ strbteq fp, [r1], #-564 @ 0xfffffdcc │ │ mov sl, #0 │ │ mov r3, #0 │ │ mov r2, #0 │ │ @@ -1380076,19 +1380075,19 @@ │ │ mov r2, #1 │ │ mov r3, #255 @ 0xff │ │ bl 270d9f0 │ │ ldr r0, [pc, #4052] @ 248c014 │ │ add r0, pc, r0 │ │ mov r1, #13 │ │ b 248b584 │ │ - ldc2l 11, cr13, [r8, #888] @ 0x378 @ │ │ - ldc2l 3, cr5, [fp, #144] @ 0x90 │ │ + ldc2l 12, cr13, [r8, #44] @ 0x2c │ │ + ldc2l 3, cr5, [fp, #324] @ 0x144 │ │ strbteq ip, [r0], #-1644 @ 0xfffff994 │ │ - ldc2l 11, cr13, [r8, #600] @ 0x258 @ │ │ - ldc2l 2, cr5, [fp, #880] @ 0x370 │ │ + ldc2l 11, cr13, [r8, #780] @ 0x30c @ │ │ + ldc2l 3, cr5, [fp, #36] @ 0x24 │ │ strbeq ip, [fp], #-2728 @ 0xfffff558 │ │ strbeq r1, [ip], #-2260 @ 0xfffff72c │ │ str r3, [sp, #80] @ 0x50 │ │ mov r4, r6 │ │ str r2, [sp, #84] @ 0x54 │ │ ldr r6, [pc, #4000] @ 248c018 │ │ ldr r5, [pc, #4000] @ 248c01c │ │ @@ -1380137,16 +1380136,16 @@ │ │ bcc 248b884 │ │ ldr r0, [pc, #4012] @ 248c0d8 │ │ movw r3, #1051 @ 0x41b │ │ ldr r2, [pc, #4008] @ 248c0dc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ b 248b878 │ │ - ldc2l 3, cr0, [ip, #464] @ 0x1d0 │ │ - ldc2l 2, cr5, [fp, #128] @ 0x80 │ │ + ldc2l 3, cr0, [ip, #644] @ 0x284 │ │ + ldc2l 2, cr5, [fp, #308] @ 0x134 │ │ strbeq r0, [sp], #-732 @ 0xfffffd24 │ │ eoreq pc, ip, r0, ror #6 │ │ strbteq fp, [r1], #-308 @ 0xfffffecc │ │ ldr r0, [pc, #4080] @ 248c148 │ │ add r2, sp, #124 @ 0x7c │ │ ldr r1, [pc, #4076] @ 248c14c │ │ ldr r9, [pc, #4076] @ 248c150 │ │ @@ -1380170,26 +1380169,26 @@ │ │ add r0, pc, r0 │ │ ldr r0, [r0, r5, lsl #2] │ │ cmp r0, #2 │ │ beq 248bb08 │ │ cmp r0, #4 │ │ beq 248bb08 │ │ b 248c270 │ │ - ldc2l 2, cr3, [fp, #624] @ 0x270 │ │ - ldc2l 1, cr5, [fp, #496] @ 0x1f0 │ │ + ldc2l 2, cr3, [fp, #804] @ 0x324 │ │ + ldc2l 1, cr5, [fp, #676] @ 0x2a4 │ │ strbeq fp, [ip], #-1052 @ 0xfffffbe4 │ │ strbeq ip, [fp], #-2456 @ 0xfffff668 │ │ strbteq sl, [r1], #-4048 @ 0xfffff030 │ │ strbeq ip, [fp], #-2452 @ 0xfffff66c │ │ strbteq ip, [r0], #-1172 @ 0xfffffb6c │ │ strbeq ip, [fp], #-2388 @ 0xfffff6ac │ │ - ldc2l 13, cr8, [fp, #44] @ 0x2c │ │ - ldc2l 0, cr5, [fp, #976] @ 0x3d0 │ │ - ldc2l 3, cr3, [sl, #780] @ 0x30c │ │ - ldc2l 0, cr5, [fp, #720] @ 0x2d0 │ │ + ldc2l 13, cr8, [fp, #224] @ 0xe0 │ │ + ldc2l 1, cr5, [fp, #132] @ 0x84 │ │ + ldc2l 3, cr3, [sl, #960] @ 0x3c0 │ │ + ldc2l 0, cr5, [fp, #900] @ 0x384 │ │ strbteq r6, [r1], #-168 @ 0xffffff58 │ │ strbteq r6, [r1], #-144 @ 0xffffff70 │ │ strbeq ip, [fp], #-2252 @ 0xfffff734 │ │ ldr r0, [pc, #3964] @ 248c180 │ │ ldr r6, [fp, #12] │ │ ldr r0, [pc, r0] │ │ ldr r7, [sp, #80] @ 0x50 │ │ @@ -1380251,34 +1380250,34 @@ │ │ add r0, pc, r0 │ │ stm sp, {r0, r6} │ │ add r0, sp, #124 @ 0x7c │ │ bl 270fa50 │ │ ldr r0, [pc, #3912] @ 248c248 │ │ add r0, pc, r0 │ │ b 248b664 │ │ - ldc2l 1, cr1, [fp, #172] @ 0xac │ │ + ldc2l 1, cr1, [fp, #352] @ 0x160 │ │ cmp r7, #0 │ │ beq 248b5ac │ │ ldr r0, [pc, #4092] @ 248c314 │ │ mov r1, #110 @ 0x6e │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #4080] @ 248c318 │ │ mov r1, #23 │ │ add r0, pc, r0 │ │ b 248a8a4 │ │ ldc2l 4, cr4, [ip, #512] @ 0x200 │ │ - ldc2l 0, cr5, [fp, #208] @ 0xd0 │ │ + ldc2l 0, cr5, [fp, #388] @ 0x184 │ │ strbeq r4, [sp], #-3844 @ 0xfffff0fc │ │ - ldc2l 11, cr8, [r9, #340] @ 0x154 @ │ │ - ldc2l 11, cr12, [fp, #484] @ 0x1e4 @ │ │ - ldc2l 7, cr0, [ip, #364] @ 0x16c │ │ - ldc2l 11, cr8, [r9, #68] @ 0x44 @ │ │ - ldc2l 15, cr8, [r8, #836] @ 0x344 │ │ - ldc2l 6, cr11, [r9, #116] @ 0x74 │ │ + ldc2l 11, cr8, [r9, #520] @ 0x208 @ │ │ + ldc2l 11, cr12, [fp, #664] @ 0x298 @ │ │ + ldc2l 7, cr0, [ip, #544] @ 0x220 │ │ + ldc2l 11, cr8, [r9, #248] @ 0xf8 @ │ │ + ldc2l 15, cr8, [r8, #1016] @ 0x3f8 │ │ + ldc2l 6, cr11, [r9, #296] @ 0x128 │ │ ldr r0, [pc, #4076] @ 248c348 │ │ mov r1, r4 │ │ ldr r2, [pc, #4072] @ 248c34c │ │ movw r3, #2422 @ 0x976 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1380326,17 +1380325,17 @@ │ │ strbeq fp, [ip], #-416 @ 0xfffffe60 │ │ strbteq r5, [r1], #-3828 @ 0xfffff10c │ │ strbeq ip, [fp], #-1824 @ 0xfffff8e0 │ │ strbteq ip, [r0], #-636 @ 0xfffffd84 │ │ strbeq ip, [fp], #-1768 @ 0xfffff918 │ │ strbteq sl, [r1], #-3360 @ 0xfffff2e0 │ │ strbteq ip, [r0], #-504 @ 0xfffffe08 │ │ - ldc2l 2, cr11, [r8, #16] │ │ - ldc2l 5, cr9, [r9, #812] @ 0x32c │ │ - ldc2l 9, cr8, [r9, #250] @ 0xfa @ │ │ + ldc2l 2, cr11, [r8, #196] @ 0xc4 │ │ + ldc2l 5, cr9, [r9, #992] @ 0x3e0 │ │ + ldc2l 9, cr8, [r9, #340] @ 0x154 @ │ │ ldr r0, [pc, #3912] @ 248c38c │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce20 │ │ ldr r0, [pc, #3900] @ 248c390 │ │ mov r1, #95 @ 0x5f │ │ add r0, pc, r0 │ │ @@ -1380402,33 +1380401,33 @@ │ │ ldr r0, [pc, #3956] @ 248c4c0 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3944] @ 248c4c4 │ │ add r0, pc, r0 │ │ b 248b664 │ │ - ldc2l 4, cr5, [r9, #432] @ 0x1b0 │ │ - ldc2l 11, cr6, [fp, #496] @ 0x1f0 @ │ │ + ldc2l 4, cr5, [r9, #612] @ 0x264 │ │ + ldc2l 11, cr6, [fp, #676] @ 0x2a4 @ │ │ ldr r0, [pc, #3928] @ 248c4c8 │ │ mov r1, #71 @ 0x47 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #3916] @ 248c4cc │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3904] @ 248c4d0 │ │ add r0, pc, r0 │ │ b 248b664 │ │ - ldc2l 4, cr5, [r9, #476] @ 0x1dc │ │ - ldc2l 9, cr8, [r9, #34] @ 0x22 @ │ │ - ldc2l 10, cr4, [fp, #712] @ 0x2c8 @ │ │ - ldc2l 1, cr3, [r9, #236] @ 0xec │ │ - ldc2l 8, cr8, [r9, #836] @ 0x344 │ │ - ldc2l 7, cr12, [fp, #968] @ 0x3c8 │ │ + ldc2l 4, cr5, [r9, #656] @ 0x290 │ │ + ldc2l 9, cr8, [r9, #124] @ 0x7c @ │ │ + ldc2l 10, cr4, [fp, #892] @ 0x37c @ │ │ + ldc2l 1, cr3, [r9, #416] @ 0x1a0 │ │ + ldc2l 8, cr8, [r9, #1016] @ 0x3f8 │ │ + ldc2l 8, cr12, [fp, #124] @ 0x7c │ │ ldr r0, [pc, #3872] @ 248c4d4 │ │ ldr r0, [pc, r0] │ │ ldr r1, [pc, #3868] @ 248c4d8 │ │ ldr r1, [pc, r1] │ │ cmp r1, r0 │ │ bge 248b65c │ │ ldr r0, [pc, #3856] @ 248c4dc │ │ @@ -1380464,42 +1380463,42 @@ │ │ ldr r7, [pc, #3760] @ 248c4f4 │ │ ldr r8, [pc, #3760] @ 248c4f8 │ │ ldr r4, [pc, #3760] @ 248c4fc │ │ add r7, pc, r7 │ │ add r8, pc, r8 │ │ add r4, pc, r4 │ │ b 248b6dc │ │ - ldc2l 3, cr7, [r9, #124] @ 0x7c │ │ + ldc2l 3, cr7, [r9, #304] @ 0x130 │ │ ldr r0, [pc, #4084] @ 248c658 │ │ add r0, pc, r0 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #40 @ 0x28 │ │ vpop {d8} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 13, cr2, [fp, #960] @ 0x3c0 │ │ - ldc2l 12, cr4, [fp, #832] @ 0x340 │ │ - ldc2l 4, cr9, [r9, #580] @ 0x244 │ │ - ldc2l 12, cr4, [fp, #672] @ 0x2a0 │ │ - ldc2l 7, cr8, [r9, #836] @ 0x344 │ │ - ldc2l 12, cr14, [r8, #564] @ 0x234 │ │ + ldc2l 14, cr2, [fp, #116] @ 0x74 │ │ + ldc2l 12, cr4, [fp, #1012] @ 0x3f4 │ │ + ldc2l 4, cr9, [r9, #760] @ 0x2f8 │ │ + ldc2l 12, cr4, [fp, #852] @ 0x354 │ │ + ldc2l 7, cr8, [r9, #1016] @ 0x3f8 │ │ + ldc2l 12, cr14, [r8, #744] @ 0x2e8 │ │ ldc2l 0, cr4, [ip, #592] @ 0x250 │ │ - ldc2l 12, cr4, [fp, #288] @ 0x120 │ │ + ldc2l 12, cr4, [fp, #468] @ 0x1d4 │ │ strbeq r4, [sp], #-2840 @ 0xfffff4e8 │ │ - ldc2l 11, cr2, [sl, #864] @ 0x360 @ │ │ - ldc2l 12, cr0, [fp, #732] @ 0x2dc │ │ - ldc2l 11, cr8, [r8, #540] @ 0x21c @ │ │ - ldc2l 12, cr2, [fp, #784] @ 0x310 │ │ - ldc2l 11, cr4, [fp, #656] @ 0x290 @ │ │ + ldc2l 12, cr2, [sl, #20] │ │ + ldc2l 12, cr0, [fp, #912] @ 0x390 │ │ + ldc2l 11, cr8, [r8, #720] @ 0x2d0 @ │ │ + ldc2l 12, cr2, [fp, #964] @ 0x3c4 │ │ + ldc2l 11, cr4, [fp, #836] @ 0x344 @ │ │ strbeq sl, [ip], #-3652 @ 0xfffff1bc │ │ - ldc2l 3, cr9, [r9, #372] @ 0x174 │ │ - ldc2l 11, cr4, [fp, #464] @ 0x1d0 @ │ │ - ldc2l 6, cr8, [r9, #628] @ 0x274 │ │ + ldc2l 3, cr9, [r9, #552] @ 0x228 │ │ + ldc2l 11, cr4, [fp, #644] @ 0x284 @ │ │ + ldc2l 6, cr8, [r9, #808] @ 0x328 │ │ ldr r0, [fp, #-48] @ 0xffffffd0 │ │ add r6, r6, #1 │ │ str r5, [sl, r9, lsl #2] │ │ cmp r6, r0 │ │ bge 248c158 │ │ cmp r6, #23 │ │ mov r0, r6 │ │ @@ -1380582,21 +1380581,21 @@ │ │ mov r1, r9 │ │ mov r2, r4 │ │ movw r3, #1777 @ 0x6f1 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r9, r0 │ │ b 248b6c8 │ │ - ldc2l 11, cr14, [r8, #356] @ 0x164 @ │ │ + ldc2l 11, cr14, [r8, #536] @ 0x218 @ │ │ ldc2l 15, cr3, [ip, #384] @ 0x180 │ │ - ldc2l 11, cr4, [fp, #80] @ 0x50 @ │ │ + ldc2l 11, cr4, [fp, #260] @ 0x104 @ │ │ strbeq r4, [sp], #-2532 @ 0xfffff61c │ │ - ldc2l 10, cr2, [sl, #656] @ 0x290 @ │ │ - ldc2l 11, cr0, [fp, #524] @ 0x20c @ │ │ - ldc2l 10, cr4, [fp, #1012] @ 0x3f4 @ │ │ + ldc2l 10, cr2, [sl, #836] @ 0x344 @ │ │ + ldc2l 11, cr0, [fp, #704] @ 0x2c0 @ │ │ + ldc2l 11, cr4, [fp, #168] @ 0xa8 @ │ │ ldr r1, [sp, #124] @ 0x7c │ │ mvn r6, r0 │ │ sub r1, r1, #1 │ │ str r1, [fp, #-48] @ 0xffffffd0 │ │ cmp r1, #23 │ │ bcc 248b884 │ │ ldr r0, [pc, #4020] @ 248c820 │ │ @@ -1380647,15 +1380646,15 @@ │ │ str r1, [sp, #100] @ 0x64 │ │ beq 248bdec │ │ ldr r0, [pc, #4084] @ 248c91c │ │ mov r1, #50 @ 0x32 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ b 248c514 │ │ - ldc2l 4, cr12, [r8, #780] @ 0x30c │ │ + ldc2l 4, cr12, [r8, #960] @ 0x3c0 │ │ strbteq r5, [r1], #-2524 @ 0xfffff624 │ │ strbteq sl, [r1], #-2220 @ 0xfffff754 │ │ strbeq ip, [fp], #-524 @ 0xfffffdf4 │ │ strbteq fp, [r0], #-3436 @ 0xfffff294 │ │ strbteq r5, [r1], #-2552 @ 0xfffff608 │ │ strbeq r4, [sp], #-2188 @ 0xfffff774 │ │ cmp r7, #4 │ │ @@ -1380738,18 +1380737,18 @@ │ │ ldr r2, [fp, #16] │ │ add r0, pc, r0 │ │ ldr r1, [r0, r1, lsl #2] │ │ ldr r0, [pc, #3968] @ 248ca18 │ │ str r1, [r2] │ │ add r0, pc, r0 │ │ b 248b664 │ │ - ldc2l 14, cr4, [r9, #932] @ 0x3a4 │ │ - ldc2l 5, cr4, [fp, #360] @ 0x168 │ │ - ldc2l 8, cr0, [fp, #868] @ 0x364 │ │ - ldc2l 8, cr4, [fp, #96] @ 0x60 │ │ + ldc2l 15, cr4, [r9, #88] @ 0x58 │ │ + ldc2l 5, cr4, [fp, #540] @ 0x21c │ │ + ldc2l 9, cr0, [fp, #12] @ │ │ + vcadd.f32 q10, , , #270 │ │ ldr r0, [pc, #3940] @ 248ca1c │ │ mov r1, r5 │ │ ldr r2, [pc, #3936] @ 248ca20 │ │ movw r3, #2071 @ 0x817 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1380794,22 +1380793,22 @@ │ │ ldr r0, [r0, r5, lsl #2] │ │ str r0, [fp, #-72] @ 0xffffffb8 │ │ mov r0, r5 │ │ b 248bbe8 │ │ strbeq r5, [ip], #-3220 @ 0xfffff36c │ │ strbeq ip, [fp], #-56 @ 0xffffffc8 │ │ strbeq r4, [sp], #-1728 @ 0xfffff940 │ │ - ldc2l 7, cr4, [fp, #816] @ 0x330 │ │ + ldc2l 7, cr4, [fp, #996] @ 0x3e4 │ │ strbeq r5, [ip], #-3156 @ 0xfffff3ac │ │ - ldc2l 10, cr2, [sl, #164] @ 0xa4 @ │ │ + ldc2l 10, cr2, [sl, #344] @ 0x158 @ │ │ strbeq r0, [ip], #-3440 @ 0xfffff290 │ │ - ldc2l 9, cr2, [sl, #490] @ 0x1ea @ │ │ + ldc2l 10, cr2, [sl, #136] @ 0x88 @ │ │ strbeq r0, [ip], #-3392 @ 0xfffff2c0 │ │ - ldc2l 7, cr0, [fp, #452] @ 0x1c4 │ │ - ldc2l 7, cr0, [fp, #292] @ 0x124 │ │ + ldc2l 7, cr0, [fp, #632] @ 0x278 │ │ + ldc2l 7, cr0, [fp, #472] @ 0x1d8 │ │ ldr r0, [pc, #4004] @ 248cb4c │ │ mov r1, r5 │ │ ldr r4, [pc, #4000] @ 248cb50 │ │ movw r3, #2074 @ 0x81a │ │ add r0, pc, r0 │ │ add r4, pc, r4 │ │ mov r2, r4 │ │ @@ -1380888,17 +1380887,17 @@ │ │ add r1, sp, #120 @ 0x78 │ │ mov r0, r4 │ │ mov r2, #1 │ │ bl 270da90 │ │ ldr r0, [pc, #4032] @ 248ccb4 │ │ add r0, pc, r0 │ │ b 248a3c0 │ │ - ldc2l 7, cr2, [fp, #512] @ 0x200 │ │ + ldc2l 7, cr2, [fp, #692] @ 0x2b4 │ │ strbeq sl, [ip], #-2304 @ 0xfffff700 │ │ - ldc2l 7, cr2, [fp, #320] @ 0x140 │ │ + ldc2l 7, cr2, [fp, #500] @ 0x1f4 │ │ strbeq sl, [ip], #-2256 @ 0xfffff730 │ │ movw r0, #5001 @ 0x1389 │ │ cmp r7, r0 │ │ mov r1, r5 │ │ bcc 248bd38 │ │ ldr r0, [pc, #3992] @ 248ccb8 │ │ mov r1, r5 │ │ @@ -1380916,17 +1380915,17 @@ │ │ str r1, [fp, #-48] @ 0xffffffd0 │ │ ldr r6, [pc, #4076] @ 248cd44 │ │ cmp r1, #22 │ │ add r6, pc, r6 │ │ bhi 248c0e0 │ │ str r4, [r6, r1, lsl #2] │ │ b 248c134 │ │ - ldc2l 3, cr10, [sl, #764] @ 0x2fc │ │ + ldc2l 3, cr10, [sl, #944] @ 0x3b0 │ │ strbeq fp, [fp], #-3648 @ 0xfffff1c0 │ │ - ldc2l 3, cr10, [sl, #572] @ 0x23c │ │ + ldc2l 3, cr10, [sl, #752] @ 0x2f0 │ │ cmp r2, #0 │ │ beq 248c190 │ │ ldr r0, [sp, #124] @ 0x7c │ │ mov r1, #1 │ │ str r1, [fp, #-84] @ 0xffffffac │ │ sub r1, r0, #1 │ │ str r1, [fp, #-48] @ 0xffffffd0 │ │ @@ -1380935,28 +1380934,28 @@ │ │ ldr r0, [pc, #4008] @ 248cd48 │ │ movw r3, #1126 @ 0x466 │ │ ldr r2, [pc, #4004] @ 248cd4c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ b 248c1cc │ │ strbeq fp, [fp], #-3600 @ 0xfffff1f0 │ │ - ldc2l 6, cr15, [fp, #976] @ 0x3d0 │ │ + ldc2l 7, cr15, [fp, #132] @ 0x84 │ │ strbeq pc, [ip], #-1628 @ 0xfffff9a4 @ │ │ - ldc2l 6, cr15, [fp, #624] @ 0x270 │ │ + ldc2l 6, cr15, [fp, #804] @ 0x324 │ │ ldc2l 9, cr3, [ip, #216] @ 0xd8 @ │ │ strbeq r4, [sp], #-1020 @ 0xfffffc04 │ │ vcadd.f32 , q14, q12, #270 │ │ - ldc2l 4, cr8, [sl, #432] @ 0x1b0 │ │ + ldc2l 4, cr8, [sl, #612] @ 0x264 │ │ strbteq r5, [r1], #-1208 @ 0xfffffb48 │ │ strbeq r5, [ip], #-2260 @ 0xfffff72c │ │ - ldc2l 4, cr8, [sl, #208] @ 0xd0 │ │ + ldc2l 4, cr8, [sl, #388] @ 0x184 │ │ strbteq r5, [r1], #-1152 @ 0xfffffb80 │ │ - ldc2l 9, cr14, [r9, #120] @ 0x78 @ │ │ + ldc2l 9, cr14, [r9, #210] @ 0xd2 @ │ │ strbteq fp, [r0], #-1972 @ 0xfffff84c │ │ - ldc2l 9, cr14, [r9, #24] @ │ │ + ldc2l 9, cr14, [r9, #114] @ 0x72 @ │ │ ldr r1, [pc, #4024] @ 248cdac │ │ add r0, sp, #137 @ 0x89 │ │ mov r2, #255 @ 0xff │ │ mov r3, #14 │ │ add r1, pc, r1 │ │ mov r8, #255 @ 0xff │ │ bl 270d970 │ │ @@ -1381076,26 +1381075,26 @@ │ │ mov r3, #255 @ 0xff │ │ add r0, pc, r0 │ │ bl 270d9f0 │ │ ldr r0, [pc, #4012] @ 248cf8c │ │ add r0, pc, r0 │ │ b 248c6b4 │ │ strbeq fp, [fp], #-3020 @ 0xfffff434 │ │ - ldc2l 3, cr8, [sl, #164] @ 0xa4 │ │ + ldc2l 3, cr8, [sl, #344] @ 0x158 │ │ ldr r0, [pc, #4060] @ 248cfd0 │ │ mov r1, #145 @ 0x91 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #4048] @ 248cfd4 │ │ mov r1, #10 │ │ add r0, pc, r0 │ │ b 248a8a4 │ │ - ldc2l 14, cr7, [r9, #692] @ 0x2b4 │ │ + ldc2l 14, cr7, [r9, #872] @ 0x368 │ │ strbeq fp, [fp], #-2976 @ 0xfffff460 │ │ - ldc2l 7, cr2, [r9, #272] @ 0x110 │ │ + ldc2l 7, cr2, [r9, #452] @ 0x1c4 │ │ strbeq fp, [fp], #-2884 @ 0xfffff4bc │ │ strbteq sl, [r1], #-380 @ 0xfffffe84 │ │ strbeq fp, [fp], #-2880 @ 0xfffff4c0 │ │ strbteq fp, [r0], #-1592 @ 0xfffff9c8 │ │ strbteq r5, [r1], #-724 @ 0xfffffd2c │ │ strbteq sl, [r1], #-420 @ 0xfffffe5c │ │ cmp r0, #0 │ │ @@ -1381136,16 +1381135,16 @@ │ │ bhi 248cd50 │ │ ldr r0, [r9, r8, lsl #2] │ │ cmp r0, #1 │ │ beq 248cd9c │ │ b 248cdc0 │ │ strbeq fp, [fp], #-2760 @ 0xfffff538 │ │ strbeq fp, [fp], #-2756 @ 0xfffff53c │ │ - ldc2l 11, cr12, [r8, #8] @ │ │ - ldc2l 2, cr4, [fp, #288] @ 0x120 │ │ + ldc2l 11, cr12, [r8, #188] @ 0xbc @ │ │ + ldc2l 2, cr4, [fp, #468] @ 0x1d4 │ │ ldr r0, [pc, #3824] @ 248cfd8 │ │ movw r3, #2135 @ 0x857 │ │ ldr r2, [pc, #3820] @ 248cfdc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ @@ -1381221,22 +1381220,22 @@ │ │ str r3, [fp, #-52] @ 0xffffffcc │ │ str r3, [fp, #-60] @ 0xffffffc4 │ │ str r1, [fp, #-80] @ 0xffffffb0 │ │ bl 270e830 │ │ str r0, [sp, #120] @ 0x78 │ │ b 248c354 │ │ ldc2l 2, cr3, [ip, #720] @ 0x2d0 │ │ - ldc2l 4, cr10, [r8, #472] @ 0x1d8 │ │ - ldc2l 0, cr4, [fp, #880] @ 0x370 │ │ + ldc2l 4, cr10, [r8, #652] @ 0x28c │ │ + ldc2l 1, cr4, [fp, #36] @ 0x24 │ │ strbteq r9, [r1], #-4004 @ 0xfffff05c │ │ strbeq fp, [fp], #-2276 @ 0xfffff71c │ │ strbteq r9, [r1], #-3872 @ 0xfffff0e0 │ │ strbteq fp, [r0], #-1024 @ 0xfffffc00 │ │ strbteq r5, [r1], #-152 @ 0xffffff68 │ │ - ldc2l 0, cr4, [fp, #692] @ 0x2b4 │ │ + ldc2l 0, cr4, [fp, #872] @ 0x368 │ │ ldr r0, [pc, #4064] @ 248d234 │ │ mov r1, r5 │ │ ldr r2, [pc, #4060] @ 248d238 │ │ movw r3, #2081 @ 0x821 │ │ add r0, pc, r0 │ │ str r5, [fp, #-48] @ 0xffffffd0 │ │ add r2, pc, r2 │ │ @@ -1381279,48 +1381278,48 @@ │ │ add r1, pc, r1 │ │ ldr r1, [r1, r0, lsl #2] │ │ ldr r0, [pc, #3916] @ 248d254 │ │ str r1, [fp, #-72] @ 0xffffffb8 │ │ mov r1, r5 │ │ add r0, pc, r0 │ │ b 248bbe4 │ │ - ldc2l 11, cr11, [fp, #456] @ 0x1c8 @ │ │ - ldc2l 14, cr9, [sl, #408] @ 0x198 │ │ + ldc2l 11, cr11, [fp, #636] @ 0x27c @ │ │ + ldc2l 14, cr9, [sl, #588] @ 0x24c │ │ ldr r0, [pc, #3892] @ 248d258 │ │ mov r1, #0 │ │ ldr r2, [fp, #16] │ │ add r0, pc, r0 │ │ str r1, [r2] │ │ mov r1, #59 @ 0x3b │ │ bl 270d990 │ │ ldr r0, [pc, #3868] @ 248d25c │ │ mov r1, #10 │ │ add r0, pc, r0 │ │ b 248a3c4 │ │ - ldc2l 1, cr2, [fp, #208] @ 0xd0 │ │ - ldc2l 0, cr4, [fp, #80] @ 0x50 │ │ + ldc2l 1, cr2, [fp, #388] @ 0x184 │ │ + ldc2l 0, cr4, [fp, #260] @ 0x104 │ │ ldr r0, [sp, #120] @ 0x78 │ │ cmp r0, #0 │ │ beq 248c3a0 │ │ cmp r7, #4 │ │ bne 248c500 │ │ ldr r0, [pc, #3400] @ 248d0b4 │ │ mov r1, #53 @ 0x35 │ │ add r0, pc, r0 │ │ b 248c50c │ │ strbeq sl, [ip], #-692 @ 0xfffffd4c │ │ - ldc2l 0, cr0, [fp, #660] @ 0x294 │ │ - ldc2l 15, cr3, [fp, #896] @ 0x380 │ │ + ldc2l 0, cr0, [fp, #840] @ 0x348 │ │ + ldc2l 0, cr4, [fp, #52] @ 0x34 │ │ strbeq r5, [ip], #-1116 @ 0xfffffba4 │ │ - ldc2l 2, cr2, [sl, #684] @ 0x2ac │ │ - ldc2l 15, cr3, [fp, #624] @ 0x270 │ │ - ldc2l 12, cr5, [fp, #768] @ 0x300 │ │ - ldc2l 5, cr6, [r9, #252] @ 0xfc │ │ - ldc2l 0, cr2, [fp, #96] @ 0x60 │ │ - ldc2l 14, cr3, [fp, #992] @ 0x3e0 │ │ + ldc2l 2, cr2, [sl, #864] @ 0x360 │ │ + ldc2l 15, cr3, [fp, #804] @ 0x324 │ │ + ldc2l 12, cr5, [fp, #948] @ 0x3b4 │ │ + ldc2l 5, cr6, [r9, #432] @ 0x1b0 │ │ + ldc2l 0, cr2, [fp, #276] @ 0x114 │ │ + ldc2l 15, cr3, [fp, #148] @ 0x94 │ │ strbeq sl, [ip], #-408 @ 0xfffffe68 │ │ cmp sl, #0 │ │ beq 248c840 │ │ ldr r0, [sp, #124] @ 0x7c │ │ sub r1, r0, #1 │ │ str r1, [fp, #-48] @ 0xffffffd0 │ │ cmp r1, #23 │ │ @@ -1381378,38 +1381377,38 @@ │ │ mov r1, r0 │ │ ldr r2, [pc, #3160] @ 248d0e8 │ │ ldr r0, [pc, #3160] @ 248d0ec │ │ add r2, pc, r2 │ │ add r0, pc, r0 │ │ add r1, r2, r1, lsl #3 │ │ b 248cf74 │ │ - ldc2l 6, cr8, [r9, #708] @ 0x2c4 │ │ - ldc2l 14, cr3, [fp, #800] @ 0x320 │ │ - ldc2l 9, cr7, [r9, #482] @ 0x1e2 @ │ │ - ldc2l 14, cr13, [r8, #692] @ 0x2b4 │ │ + ldc2l 6, cr8, [r9, #888] @ 0x378 │ │ + ldc2l 14, cr3, [fp, #980] @ 0x3d4 │ │ + ldc2l 10, cr7, [r9, #120] @ 0x78 @ │ │ + ldc2l 14, cr13, [r8, #872] @ 0x368 │ │ ldc2l 2, cr3, [ip, #720] @ 0x2d0 │ │ - ldc2l 14, cr3, [fp, #416] @ 0x1a0 │ │ + ldc2l 14, cr3, [fp, #596] @ 0x254 │ │ strbeq r3, [sp], #-3384 @ 0xfffff2c8 │ │ - ldc2l 13, cr1, [sl, #992] @ 0x3e0 │ │ - ldc2l 14, cr15, [sl, #860] @ 0x35c │ │ - ldc2l 11, cr5, [fp, #688] @ 0x2b0 @ │ │ - ldc2l 5, cr9, [fp, #988] @ 0x3dc │ │ - ldc2l 9, cr7, [sl, #468] @ 0x1d4 @ │ │ - ldc2l 14, cr13, [sl, #184] @ 0xb8 │ │ + ldc2l 14, cr1, [sl, #148] @ 0x94 │ │ + ldc2l 15, cr15, [sl, #16] │ │ + ldc2l 11, cr5, [fp, #868] @ 0x364 @ │ │ + ldc2l 6, cr9, [fp, #144] @ 0x90 │ │ + ldc2l 10, cr7, [sl, #92] @ 0x5c @ │ │ + ldc2l 14, cr13, [sl, #364] @ 0x16c │ │ strbeq fp, [fp], #-1552 @ 0xfffff9f0 │ │ strbeq fp, [fp], #-1536 @ 0xfffffa00 │ │ strbteq r9, [r1], #-3404 @ 0xfffff2b4 │ │ strbteq fp, [r0], #-268 @ 0xfffffef4 │ │ - ldc2l 1, cr10, [r8, #40] @ 0x28 │ │ - ldc2l 13, cr3, [fp, #464] @ 0x1d0 │ │ + ldc2l 1, cr10, [r8, #220] @ 0xdc │ │ + ldc2l 13, cr3, [fp, #644] @ 0x284 │ │ strbteq r9, [r1], #-3136 @ 0xfffff3c0 │ │ strbeq fp, [fp], #-1428 @ 0xfffffa6c │ │ strbteq r9, [r1], #-2996 @ 0xfffff44c │ │ strbteq r4, [r1], #-3380 @ 0xfffff2cc │ │ - ldc2l 13, cr3, [fp, #176] @ 0xb0 │ │ + ldc2l 13, cr3, [fp, #356] @ 0x164 │ │ ldr r0, [pc, #2992] @ 248d0b8 │ │ mov r1, #60 @ 0x3c │ │ add r0, pc, r0 │ │ bl 270d990 │ │ mov r6, r8 │ │ ldr r0, [pc, #2976] @ 248d0bc │ │ add r1, sp, #137 @ 0x89 │ │ @@ -1381488,15 +1381487,15 @@ │ │ add r0, pc, r0 │ │ ldr r1, [pc, r1] │ │ ldr r2, [pc, #2816] @ 248d14c │ │ sub r1, r1, #1 │ │ add r2, pc, r2 │ │ str r1, [r2] │ │ b 248b664 │ │ - ldc2l 13, cr3, [fp, #292] @ 0x124 │ │ + ldc2l 13, cr3, [fp, #472] @ 0x1d8 │ │ mov sl, #1 │ │ ldr r2, [sp, #84] @ 0x54 │ │ ldr r3, [sp, #80] @ 0x50 │ │ mov r6, r4 │ │ b 248afe4 │ │ ldr r0, [pc, #2432] @ 248cff8 │ │ mov r1, #44 @ 0x2c │ │ @@ -1381513,22 +1381512,22 @@ │ │ mov r0, r4 │ │ mov r2, #1 │ │ bl 270da90 │ │ ldr r0, [pc, #2380] @ 248d000 │ │ add r0, pc, r0 │ │ mov r1, #19 │ │ b 248b584 │ │ - ldc2l 8, cr7, [fp, #604] @ 0x25c │ │ - vcadd.f32 , , , #270 │ │ - ldc2l 4, cr12, [r8, #920] @ 0x398 │ │ + vcadd.f32 , , q2, #270 │ │ + ldc2l 8, cr7, [fp, #608] @ 0x260 │ │ + ldc2l 5, cr12, [r8, #76] @ 0x4c │ │ strbteq sl, [r0], #-3972 @ 0xfffff07c │ │ - ldc2l 4, cr12, [r8, #728] @ 0x2d8 │ │ + ldc2l 4, cr12, [r8, #908] @ 0x38c │ │ strbteq sl, [r0], #-3924 @ 0xfffff0ac │ │ - ldc2l 14, cr1, [sl, #876] @ 0x36c │ │ - ldc2l 14, cr1, [sl, #716] @ 0x2cc │ │ + ldc2l 15, cr1, [sl, #32] │ │ + ldc2l 14, cr1, [sl, #896] @ 0x380 │ │ ldr r0, [pc, #2352] @ 248d014 │ │ mov r1, #83 @ 0x53 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #2340] @ 248d018 │ │ add r1, sp, #137 @ 0x89 │ │ mov r2, #1 │ │ @@ -1381586,31 +1381585,31 @@ │ │ add r1, r2, r1, lsl #3 │ │ mov r2, #1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #2156] @ 248d044 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ b 248b584 │ │ - ldc2l 15, cr9, [r8, #72] @ 0x48 │ │ - ldc2l 14, cr9, [r8, #952] @ 0x3b8 │ │ + ldc2l 15, cr9, [r8, #252] @ 0xfc │ │ + ldc2l 15, cr9, [r8, #108] @ 0x6c │ │ ldr r0, [pc, #2136] @ 248d048 │ │ mov r1, #24 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #2124] @ 248d04c │ │ add r1, sp, #137 @ 0x89 │ │ mov r2, #1 │ │ mov r3, #255 @ 0xff │ │ add r0, pc, r0 │ │ bl 270d9f0 │ │ ldr r0, [pc, #2104] @ 248d050 │ │ mov r1, #23 │ │ add r0, pc, r0 │ │ b 248b584 │ │ - ldc2l 3, cr12, [r8, #776] @ 0x308 │ │ + ldc2l 3, cr12, [r8, #956] @ 0x3bc │ │ ldr r0, [sp, #100] @ 0x64 │ │ cmp r0, #0 │ │ beq 248ce9c │ │ ldr r1, [pc, #2236] @ 248d0f4 │ │ ldr r1, [pc, r1] │ │ cmp r0, r1 │ │ bne 248cebc │ │ @@ -1381622,19 +1381621,19 @@ │ │ ldr r4, [pc, r4] │ │ bhi 248c888 │ │ sub r0, r7, #3 │ │ str r4, [r5, r3, lsl #2] │ │ clz r0, r0 │ │ lsr r4, r0, #5 │ │ b 248c8c8 │ │ - ldc2l 11, cr3, [fp, #32] @ │ │ - ldc2l 14, cr9, [r8, #344] @ 0x158 │ │ - ldc2l 10, cr3, [fp, #768] @ 0x300 @ │ │ - ldc2l 11, cr1, [sl, #84] @ 0x54 @ │ │ - ldc2l 5, cr1, [fp, #768] @ 0x300 │ │ + ldc2l 11, cr3, [fp, #212] @ 0xd4 @ │ │ + ldc2l 14, cr9, [r8, #524] @ 0x20c │ │ + ldc2l 10, cr3, [fp, #948] @ 0x3b4 @ │ │ + ldc2l 11, cr1, [sl, #264] @ 0x108 @ │ │ + ldc2l 5, cr1, [fp, #948] @ 0x3b4 │ │ strbteq r9, [r1], #-2464 @ 0xfffff660 │ │ ldr r0, [pc, #2240] @ 248d150 │ │ mov r1, r3 │ │ ldr r2, [pc, #2236] @ 248d154 │ │ movw r3, #1367 @ 0x557 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1381665,18 +1381664,18 @@ │ │ rsbmi r4, r4, #0 │ │ cmp r1, r5 │ │ bhi 248c934 │ │ ldr r0, [pc, #2160] @ 248d184 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 248c970 │ │ - ldc2l 4, cr11, [fp, #996] @ 0x3e4 │ │ - ldc2l 13, cr9, [r8, #552] @ 0x228 │ │ - ldc2l 9, cr3, [fp, #488] @ 0x1e8 @ │ │ - ldc2l 5, cr1, [fp, #16] │ │ + ldc2l 5, cr11, [fp, #152] @ 0x98 │ │ + ldc2l 13, cr9, [r8, #732] @ 0x2dc │ │ + ldc2l 10, cr3, [fp, #132] @ 0x84 @ │ │ + ldc2l 5, cr1, [fp, #196] @ 0xc4 │ │ ldc2l 10, cr2, [ip, #40] @ 0x28 @ │ │ strbteq r9, [r1], #-2252 @ 0xfffff734 │ │ ldr r0, [pc, #2124] @ 248d188 │ │ movw r3, #1384 @ 0x568 │ │ ldr r2, [pc, #2120] @ 248d18c │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1381723,22 +1381722,22 @@ │ │ str r1, [fp, #-48] @ 0xffffffd0 │ │ bhi 248ca28 │ │ ldr r0, [pc, #2016] @ 248d1d8 │ │ str r1, [fp, #-48] @ 0xffffffd0 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 248ca84 │ │ - ldc2l 12, cr1, [sl, #316] @ 0x13c │ │ - ldc2l 9, cr3, [fp, #128] @ 0x80 @ │ │ - ldc2l 12, cr9, [r8, #632] @ 0x278 │ │ - ldc2l 9, cr3, [fp, #16] @ │ │ + ldc2l 12, cr1, [sl, #496] @ 0x1f0 │ │ + ldc2l 9, cr3, [fp, #218] @ 0xda @ │ │ + ldc2l 12, cr9, [r8, #812] @ 0x32c │ │ + ldc2l 9, cr3, [fp, #106] @ 0x6a @ │ │ strbteq r9, [r1], #-2000 @ 0xfffff830 │ │ - ldc2l 15, cr9, [r9, #324] @ 0x144 │ │ - ldc2l 9, cr15, [sl, #242] @ 0xf2 @ │ │ - ldc2l 8, cr3, [fp, #736] @ 0x2e0 │ │ + ldc2l 15, cr9, [r9, #504] @ 0x1f8 │ │ + ldc2l 9, cr15, [sl, #332] @ 0x14c @ │ │ + vcadd.f32 , , , #270 │ │ strbeq r4, [ip], #-3384 @ 0xfffff2c8 │ │ ldr r0, [pc, #1964] @ 248d1dc │ │ movw r3, #1398 @ 0x576 │ │ ldr r2, [pc, #1960] @ 248d1e0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1381776,18 +1381775,18 @@ │ │ cmp r1, r4 │ │ bhi 248cae8 │ │ ldr r0, [pc, #1840] @ 248d1fc │ │ vldr d8, [sp, #88] @ 0x58 │ │ add r0, pc, r0 │ │ str r5, [r0, r1, lsl #2] │ │ b 248cb28 │ │ - ldc2l 9, cr15, [sl, #146] @ 0x92 @ │ │ - vcadd.f32 d19, d27, d8, #270 │ │ - ldc2l 11, cr9, [r8, #888] @ 0x378 @ │ │ - vcadd.f32 , , q4, #270 │ │ + ldc2l 9, cr15, [sl, #236] @ 0xec @ │ │ + ldc2l 8, cr3, [fp, #724] @ 0x2d4 │ │ + ldc2l 12, cr9, [r8, #44] @ 0x2c │ │ + ldc2l 8, cr3, [fp, #468] @ 0x1d4 │ │ ldr r0, [pc, #1808] @ 248d200 │ │ movw r3, #1400 @ 0x578 │ │ ldr r2, [pc, #1804] @ 248d204 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #1792] @ 248d208 │ │ @@ -1381805,16 +1381804,16 @@ │ │ add r0, pc, r0 │ │ str r1, [fp, #-48] @ 0xffffffd0 │ │ add r0, r0, r1, lsl #3 │ │ vstr d8, [r0] │ │ b 248cd24 │ │ strbteq r9, [r1], #-1812 @ 0xfffff8ec │ │ strbteq r4, [r1], #-2172 @ 0xfffff784 │ │ - ldc2l 7, cr7, [sl, #832] @ 0x340 │ │ - ldc2l 7, cr3, [fp, #800] @ 0x320 │ │ + ldc2l 7, cr7, [sl, #1012] @ 0x3f4 │ │ + ldc2l 7, cr3, [fp, #980] @ 0x3d4 │ │ strbteq r4, [r1], #-2064 @ 0xfffff7f0 │ │ ldr r0, [pc, #1540] @ 248d164 │ │ mov r1, r3 │ │ ldr r2, [pc, #1536] @ 248d168 │ │ movw r3, #1373 @ 0x55d │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1381841,24 +1381840,24 @@ │ │ bl 270d9c0 │ │ mov r3, r0 │ │ ldr r0, [pc, #1456] @ 248d180 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ b 248c8ec │ │ ldc2l 11, cr2, [ip, #912] @ 0x390 @ │ │ - ldc2l 2, cr1, [fp, #656] @ 0x290 │ │ - ldc2l 5, cr15, [sl] │ │ + ldc2l 2, cr1, [fp, #836] @ 0x344 │ │ + ldc2l 5, cr15, [sl, #180] @ 0xb4 │ │ strbeq r3, [sp], #-1632 @ 0xfffff9a0 │ │ strbeq sl, [fp], #-3952 @ 0xfffff090 │ │ strbteq r9, [r1], #-1452 @ 0xfffffa54 │ │ strbteq sl, [r0], #-2696 @ 0xfffff578 │ │ strbteq r9, [r1], #-1532 @ 0xfffffa04 │ │ - ldc2l 12, cr13, [r9, #296] @ 0x128 │ │ + ldc2l 12, cr13, [r9, #476] @ 0x1dc │ │ ldc2l 11, cr2, [ip, #128] @ 0x80 @ │ │ - ldc2l 6, cr3, [fp, #848] @ 0x350 │ │ + ldc2l 7, cr3, [fp, #4] │ │ ldr r0, [pc, #1424] @ 248d19c │ │ movw r3, #1390 @ 0x56e │ │ ldr r2, [pc, #1420] @ 248d1a0 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #1408] @ 248d1a4 │ │ @@ -1381893,19 +1381892,19 @@ │ │ mov r3, #1392 @ 0x570 │ │ ldr r2, [pc, #1320] @ 248d1c4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 248c994 │ │ - ldc2l 1, cr7, [r9, #1012] @ 0x3f4 │ │ + ldc2l 2, cr7, [r9, #168] @ 0xa8 │ │ strbeq r3, [sp], #-1436 @ 0xfffffa64 │ │ - ldc2l 6, cr3, [fp, #600] @ 0x258 │ │ - ldc2l 7, cr14, [fp, #656] @ 0x290 │ │ - ldc2l 6, cr3, [fp, #320] @ 0x140 │ │ + ldc2l 6, cr3, [fp, #780] @ 0x30c │ │ + ldc2l 7, cr14, [fp, #836] @ 0x344 │ │ + ldc2l 6, cr3, [fp, #500] @ 0x1f4 │ │ ldr r0, [pc, #1356] @ 248d214 │ │ movw r3, #1401 @ 0x579 │ │ ldr r2, [pc, #1352] @ 248d218 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #1340] @ 248d21c │ │ @@ -1381932,16 +1381931,16 @@ │ │ ldr r1, [r0, r1, lsl #2] │ │ ldr r0, [pc, #1272] @ 248d230 │ │ str r1, [r2] │ │ add r0, pc, r0 │ │ b 248b664 │ │ strbeq lr, [ip], #-1800 @ 0xfffff8f8 │ │ strbteq sl, [r0], #-2440 @ 0xfffff678 │ │ - ldc2l 9, cr9, [r8, #212] @ 0xd4 @ │ │ - ldc2l 5, cr3, [fp, #848] @ 0x350 │ │ + ldc2l 9, cr9, [r8, #302] @ 0x12e @ │ │ + ldc2l 6, cr3, [fp, #4] │ │ ldr r0, [pc, #764] @ 248d054 │ │ mov r1, r8 │ │ ldr r2, [pc, #760] @ 248d058 │ │ movw r3, #959 @ 0x3bf │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1381957,18 +1381956,18 @@ │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r8, r0 │ │ ldr r1, [sl, r8, lsl #2] │ │ ldr r0, [pc, #736] @ 248d088 │ │ add r0, pc, r0 │ │ b 2489da8 │ │ - ldc2l 5, cr3, [fp, #632] @ 0x278 │ │ - ldc2l 13, cr7, [r9, #196] @ 0xc4 │ │ - ldc2l 5, cr3, [fp, #288] @ 0x120 │ │ - ldc2l 0, cr7, [r9, #404] @ 0x194 │ │ + ldc2l 5, cr3, [fp, #812] @ 0x32c │ │ + ldc2l 13, cr7, [r9, #376] @ 0x178 │ │ + ldc2l 5, cr3, [fp, #468] @ 0x1d4 │ │ + ldc2l 0, cr7, [r9, #584] @ 0x248 │ │ strbteq r9, [r1], #-1168 @ 0xfffffb70 │ │ ldr r0, [pc, #660] @ 248d05c │ │ mov r1, #90 @ 0x5a │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r7, [pc, #648] @ 248d060 │ │ add r1, sp, #137 @ 0x89 │ │ @@ -1382015,24 +1382014,24 @@ │ │ mov r3, #8 │ │ add r0, pc, r0 │ │ bl 270d9f0 │ │ ldr r0, [pc, #496] @ 248d07c │ │ mov r1, #17 │ │ add r0, pc, r0 │ │ b 248b584 │ │ - vcadd.f32 , q4, q15, #270 │ │ - ldc2l 4, cr3, [fp, #864] @ 0x360 │ │ + ldc2l 8, cr9, [r8, #620] @ 0x26c │ │ + ldc2l 5, cr3, [fp, #20] │ │ ldr r0, [pc, #588] @ 248d0f0 │ │ mov r1, #195 @ 0xc3 │ │ add r0, pc, r0 │ │ b 248cf9c │ │ - ldc2l 4, cr3, [fp, #488] @ 0x1e8 │ │ - ldc2l 12, cr7, [r9, #68] @ 0x44 │ │ - ldc2l 4, cr3, [fp, #160] @ 0xa0 │ │ - ldc2l 15, cr6, [r9, #308] @ 0x134 │ │ + ldc2l 4, cr3, [fp, #668] @ 0x29c │ │ + ldc2l 12, cr7, [r9, #248] @ 0xf8 │ │ + ldc2l 4, cr3, [fp, #340] @ 0x154 │ │ + ldc2l 15, cr6, [r9, #488] @ 0x1e8 │ │ ldr r0, [pc, #564] @ 248d0f8 │ │ mov r1, #241 @ 0xf1 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #552] @ 248d0fc │ │ add r1, sp, #137 @ 0x89 │ │ mov r2, #1 │ │ @@ -1382075,17 +1382074,17 @@ │ │ ldr r0, [pc, #428] @ 248d11c │ │ add r1, r4, r1, lsl #3 │ │ add r0, pc, r0 │ │ mov r2, #1 │ │ mov r3, #8 │ │ b 248cfb4 │ │ strbteq r9, [r1], #-884 @ 0xfffffc8c │ │ - ldc2l 4, cr13, [sl, #44] @ 0x2c │ │ - ldc2l 14, cr6, [r9, #964] @ 0x3c4 │ │ - ldc2l 10, cr11, [r8, #932] @ 0x3a4 @ │ │ + ldc2l 4, cr13, [sl, #224] @ 0xe0 │ │ + ldc2l 15, cr6, [r9, #120] @ 0x78 │ │ + ldc2l 11, cr11, [r8, #88] @ 0x58 @ │ │ ldr r0, [pc, #260] @ 248d09c │ │ mov r1, #194 @ 0xc2 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #248] @ 248d0a0 │ │ add r1, sp, #137 @ 0x89 │ │ mov r2, #1 │ │ @@ -1382094,178 +1382093,178 @@ │ │ bl 270d9f0 │ │ ldr r0, [pc, #352] @ 248d120 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r6, r8 │ │ b 248c594 │ │ - ldc2l 6, cr3, [sl, #860] @ 0x35c │ │ - ldc2l 0, cr3, [fp, #440] @ 0x1b8 │ │ - ldc2l 11, cr11, [r8, #280] @ 0x118 @ │ │ - ldc2l 2, cr3, [fp, #560] @ 0x230 │ │ - ldc2l 5, cr1, [sl, #412] @ 0x19c │ │ - ldc2l 2, cr3, [fp, #352] @ 0x160 │ │ + ldc2l 7, cr3, [sl, #16] │ │ + ldc2l 0, cr3, [fp, #620] @ 0x26c │ │ + ldc2l 11, cr11, [r8, #460] @ 0x1cc @ │ │ + ldc2l 2, cr3, [fp, #740] @ 0x2e4 │ │ + ldc2l 5, cr1, [sl, #592] @ 0x250 │ │ + ldc2l 2, cr3, [fp, #532] @ 0x214 │ │ strbteq r9, [r1], #-188 @ 0xffffff44 │ │ strbeq sl, [fp], #-2660 @ 0xfffff59c │ │ strbeq sl, [fp], #-2652 @ 0xfffff5a4 │ │ - ldc2l 2, cr3, [fp, #212] @ 0xd4 │ │ - ldc2l 13, cr0, [fp, #972] @ 0x3cc │ │ - ldc2l 8, cr6, [r9, #196] @ 0xc4 │ │ - ldc2l 4, cr14, [fp, #172] @ 0xac │ │ + ldc2l 2, cr3, [fp, #392] @ 0x188 │ │ + ldc2l 14, cr0, [fp, #128] @ 0x80 │ │ + ldc2l 8, cr6, [r9, #376] @ 0x178 │ │ + ldc2l 4, cr14, [fp, #352] @ 0x160 │ │ strbeq sl, [fp], #-2916 @ 0xfffff49c │ │ strbeq pc, [fp], #-2448 @ 0xfffff670 @ │ │ - ldc2l 4, cr1, [fp, #32] │ │ - ldc2l 2, cr3, [fp, #928] @ 0x3a0 │ │ - ldc2l 15, cr2, [sl, #588] @ 0x24c │ │ - ldc2l 7, cr6, [r9, #788] @ 0x314 │ │ - ldc2l 4, cr7, [r9, #244] @ 0xf4 │ │ - ldc2l 12, cr2, [fp, #336] @ 0x150 │ │ - ldc2l 7, cr6, [r9, #516] @ 0x204 │ │ + ldc2l 4, cr1, [fp, #212] @ 0xd4 │ │ + ldc2l 3, cr3, [fp, #84] @ 0x54 │ │ + ldc2l 15, cr2, [sl, #768] @ 0x300 │ │ + ldc2l 7, cr6, [r9, #968] @ 0x3c8 │ │ + ldc2l 4, cr7, [r9, #424] @ 0x1a8 │ │ + ldc2l 12, cr2, [fp, #516] @ 0x204 │ │ + ldc2l 7, cr6, [r9, #696] @ 0x2b8 │ │ strbteq r8, [r1], #-2996 @ 0xfffff44c │ │ - ldc2l 13, cr0, [fp, #144] @ 0x90 │ │ - ldc2l 12, cr2, [fp, #16] │ │ - ldc2l 3, cr7, [r9, #772] @ 0x304 │ │ - ldc2l 11, cr2, [fp, #864] @ 0x360 @ │ │ - ldc2l 7, cr6, [r9, #20] │ │ + ldc2l 13, cr0, [fp, #324] @ 0x144 │ │ + ldc2l 12, cr2, [fp, #196] @ 0xc4 │ │ + ldc2l 3, cr7, [r9, #952] @ 0x3b8 │ │ + ldc2l 12, cr2, [fp, #20] │ │ + ldc2l 7, cr6, [r9, #200] @ 0xc8 │ │ strbteq r8, [r1], #-2872 @ 0xfffff4c8 │ │ - ldc2l 12, cr14, [sl, #300] @ 0x12c │ │ - ldc2l 0, cr13, [r9, #700] @ 0x2bc │ │ - ldc2l 6, cr6, [r9, #740] @ 0x2e4 │ │ - ldc2l 11, cr12, [sl, #800] @ 0x320 @ │ │ - ldc2l 6, cr14, [sl, #868] @ 0x364 │ │ - ldc2l 6, cr2, [fp, #96] @ 0x60 │ │ + ldc2l 12, cr14, [sl, #480] @ 0x1e0 │ │ + ldc2l 0, cr13, [r9, #880] @ 0x370 │ │ + ldc2l 6, cr6, [r9, #920] @ 0x398 │ │ + ldc2l 11, cr12, [sl, #980] @ 0x3d4 @ │ │ + ldc2l 7, cr14, [sl, #24] │ │ + ldc2l 6, cr2, [fp, #276] @ 0x114 │ │ ldc2l 9, cr1, [ip, #322] @ 0x142 @ │ │ - ldc2l 0, cr6, [r9, #900] @ 0x384 │ │ + ldc2l 1, cr6, [r9, #56] @ 0x38 │ │ strbteq r8, [r1], #-1244 @ 0xfffffb24 │ │ - ldc2l 6, cr14, [sl, #36] @ 0x24 │ │ - ldc2l 5, cr2, [fp, #288] @ 0x120 │ │ + ldc2l 6, cr14, [sl, #216] @ 0xd8 │ │ + ldc2l 5, cr2, [fp, #468] @ 0x1d4 │ │ ldc2l 7, cr3, [ip, #128] @ 0x80 │ │ - ldc2l 5, cr2, [fp, #112] @ 0x70 │ │ - ldc2l 0, cr6, [r9, #276] @ 0x114 │ │ - ldc2l 11, cr2, [r9, #468] @ 0x1d4 @ │ │ - ldc2l 7, cr13, [fp, #272] @ 0x110 │ │ - ldc2l 5, cr2, [fp, #944] @ 0x3b0 │ │ - ldc2l 6, cr12, [sl, #88] @ 0x58 │ │ - ldc2l 3, cr9, [r8, #280] @ 0x118 │ │ - ldc2l 15, cr2, [fp, #704] @ 0x2c0 │ │ + ldc2l 5, cr2, [fp, #292] @ 0x124 │ │ + ldc2l 0, cr6, [r9, #456] @ 0x1c8 │ │ + ldc2l 11, cr2, [r9, #648] @ 0x288 @ │ │ + ldc2l 7, cr13, [fp, #452] @ 0x1c4 │ │ + ldc2l 6, cr2, [fp, #100] @ 0x64 │ │ + ldc2l 6, cr12, [sl, #268] @ 0x10c │ │ + ldc2l 3, cr9, [r8, #460] @ 0x1cc │ │ + ldc2l 15, cr2, [fp, #884] @ 0x374 │ │ strbteq r8, [r1], #-3848 @ 0xfffff0f8 │ │ strbteq r8, [r1], #-3828 @ 0xfffff10c │ │ - ldc2l 7, cr0, [r9, #984] @ 0x3d8 │ │ - ldc2l 15, cr5, [r9, #68] @ 0x44 │ │ - ldc2l 12, cr0, [fp, #784] @ 0x310 │ │ - ldc2l 15, cr14, [sl, #96] @ 0x60 │ │ - ldc2l 5, cr9, [r8, #296] @ 0x128 │ │ - ldc2l 1, cr3, [fp, #720] @ 0x2d0 │ │ - ldc2l 10, cr10, [fp, #928] @ 0x3a0 @ │ │ - ldc2l 4, cr11, [r9, #540] @ 0x21c │ │ - ldc2l 14, cr0, [sl, #48] @ 0x30 │ │ + vcadd.f32 d16, d9, d19, #270 │ │ + ldc2l 15, cr5, [r9, #248] @ 0xf8 │ │ + ldc2l 12, cr0, [fp, #964] @ 0x3c4 │ │ + ldc2l 15, cr14, [sl, #276] @ 0x114 │ │ + ldc2l 5, cr9, [r8, #476] @ 0x1dc │ │ + ldc2l 1, cr3, [fp, #900] @ 0x384 │ │ + ldc2l 11, cr10, [fp, #84] @ 0x54 @ │ │ + ldc2l 4, cr11, [r9, #720] @ 0x2d0 │ │ + ldc2l 14, cr0, [sl, #228] @ 0xe4 │ │ ldc2l 0, cr4, [ip, #208] @ 0xd0 │ │ - ldc2l 14, cr2, [fp, #192] @ 0xc0 │ │ - ldc2l 14, cr12, [r8, #180] @ 0xb4 │ │ - ldc2l 9, cr6, [r9, #138] @ 0x8a @ │ │ - ldc2l 13, cr2, [fp, #1000] @ 0x3e8 │ │ + ldc2l 14, cr2, [fp, #372] @ 0x174 │ │ + ldc2l 14, cr12, [r8, #360] @ 0x168 │ │ + ldc2l 9, cr6, [r9, #228] @ 0xe4 @ │ │ + ldc2l 14, cr2, [fp, #156] @ 0x9c │ │ strbeq sl, [fp], #-880 @ 0xfffffc90 │ │ - ldc2l 5, cr15, [r9, #848] @ 0x350 │ │ - ldc2l 10, cr6, [r9, #452] @ 0x1c4 @ │ │ - ldc2l 12, cr4, [fp, #532] @ 0x214 │ │ - ldc2l 15, cr2, [fp] │ │ + ldc2l 6, cr15, [r9, #4] │ │ + ldc2l 10, cr6, [r9, #632] @ 0x278 @ │ │ + ldc2l 12, cr4, [fp, #712] @ 0x2c8 │ │ + ldc2l 15, cr2, [fp, #180] @ 0xb4 │ │ strbteq r8, [r1], #-3624 @ 0xfffff1d8 │ │ - ldc2l 10, cr6, [r9, #180] @ 0xb4 @ │ │ - ldc2l 11, cr10, [r9, #160] @ 0xa0 @ │ │ + ldc2l 10, cr6, [r9, #360] @ 0x168 @ │ │ + ldc2l 11, cr10, [r9, #340] @ 0x154 @ │ │ strbteq r8, [r1], #-2688 @ 0xfffff580 │ │ - ldc2l 15, cr5, [fp, #868] @ 0x364 │ │ - ldc2l 15, cr5, [r9, #916] @ 0x394 │ │ - ldc2l 1, cr4, [fp, #996] @ 0x3e4 │ │ - ldc2l 4, cr2, [fp, #464] @ 0x1d0 │ │ + ldc2l 0, cr6, [fp, #24] │ │ + ldc2l 0, cr6, [r9, #72] @ 0x48 │ │ + ldc2l 2, cr4, [fp, #152] @ 0x98 │ │ + ldc2l 4, cr2, [fp, #644] @ 0x284 │ │ strbteq r8, [r1], #-916 @ 0xfffffc6c │ │ - ldc2l 15, cr5, [r9, #612] @ 0x264 │ │ + ldc2l 15, cr5, [r9, #792] @ 0x318 │ │ strbteq r8, [r1], #-892 @ 0xfffffc84 │ │ - ldc2l 1, cr4, [fp, #660] @ 0x294 │ │ - ldc2l 4, cr2, [fp, #128] @ 0x80 │ │ - ldc2l 15, cr5, [r9, #324] @ 0x144 │ │ - ldc2l 6, cr9, [fp, #408] @ 0x198 │ │ + ldc2l 1, cr4, [fp, #840] @ 0x348 │ │ + ldc2l 4, cr2, [fp, #308] @ 0x134 │ │ + ldc2l 15, cr5, [r9, #504] @ 0x1f8 │ │ + ldc2l 6, cr9, [fp, #588] @ 0x24c │ │ ldc2l 15, cr1, [ip, #512] @ 0x200 │ │ - ldc2l 1, cr9, [r8, #248] @ 0xf8 │ │ - ldc2l 13, cr2, [fp, #656] @ 0x290 │ │ + ldc2l 1, cr9, [r8, #428] @ 0x1ac │ │ + ldc2l 13, cr2, [fp, #836] @ 0x344 │ │ strbeq sl, [fp], #-1488 @ 0xfffffa30 │ │ strbteq r3, [r1], #-3468 @ 0xfffff274 │ │ strbeq sl, [fp], #-1440 @ 0xfffffa60 │ │ strbteq r8, [r1], #-3040 @ 0xfffff420 │ │ strbteq sl, [r0], #-188 @ 0xffffff44 │ │ - ldc2l 13, cr12, [sl, #504] @ 0x1f8 │ │ + ldc2l 13, cr12, [sl, #684] @ 0x2ac │ │ strbeq sl, [fp], #-1404 @ 0xfffffa84 │ │ strbeq sl, [fp], #-1392 @ 0xfffffa90 │ │ - ldc2l 6, cr6, [fp, #988] @ 0x3dc │ │ - ldc2l 10, cr2, [fp, #896] @ 0x380 @ │ │ + ldc2l 7, cr6, [fp, #144] @ 0x90 │ │ + ldc2l 11, cr2, [fp, #52] @ 0x34 @ │ │ strbteq r3, [r1], #-2736 @ 0xfffff550 │ │ strbeq sl, [fp], #-740 @ 0xfffffd1c │ │ strbeq sl, [fp], #-728 @ 0xfffffd28 │ │ - ldc2l 11, cr0, [sl, #124] @ 0x7c @ │ │ - ldc2l 8, cr2, [fp, #64] @ 0x40 │ │ + ldc2l 11, cr0, [sl, #304] @ 0x130 @ │ │ + ldc2l 8, cr2, [fp, #244] @ 0xf4 │ │ strbeq sl, [fp], #-56 @ 0xffffffc8 │ │ strbteq r3, [r1], #-2040 @ 0xfffff808 │ │ strbeq sl, [fp], #-32 @ 0xffffffe0 │ │ - ldc2l 0, cr11, [r8, #488] @ 0x1e8 │ │ - ldc2l 7, cr2, [fp, #768] @ 0x300 │ │ + ldc2l 0, cr11, [r8, #668] @ 0x29c │ │ + ldc2l 7, cr2, [fp, #948] @ 0x3b4 │ │ strbeq r9, [fp], #-4076 @ 0xfffff014 │ │ strbeq pc, [fp], #-216 @ 0xffffff28 @ │ │ - ldc2l 13, cr0, [sl, #308] @ 0x134 │ │ - ldc2l 10, cr2, [fp, #224] @ 0xe0 @ │ │ + ldc2l 13, cr0, [sl, #488] @ 0x1e8 │ │ + ldc2l 10, cr2, [fp, #404] @ 0x194 @ │ │ strbeq pc, [fp], #-152 @ 0xffffff68 @ │ │ strbeq sl, [fp], #-604 @ 0xfffffda4 │ │ strbeq r3, [ip], #-3728 @ 0xfffff170 │ │ - vcadd.f32 d30, d10, d25, #270 │ │ - ldc2l 7, cr2, [fp, #416] @ 0x1a0 │ │ + ldc2l 8, cr14, [sl, #344] @ 0x158 │ │ + ldc2l 7, cr2, [fp, #596] @ 0x254 │ │ strbeq r3, [ip], #-3044 @ 0xfffff41c │ │ strbeq r9, [fp], #-3976 @ 0xfffff078 │ │ strbeq r8, [ip], #-3232 @ 0xfffff360 │ │ - vcadd.f32 q8, , q2, #270 │ │ - ldc2l 7, cr2, [fp, #144] @ 0x90 │ │ + ldc2l 8, cr0, [fp, #452] @ 0x1c4 │ │ + ldc2l 7, cr2, [fp, #324] @ 0x144 │ │ strbeq r8, [ip], #-2496 @ 0xfffff640 │ │ strbeq r9, [fp], #-3908 @ 0xfffff0bc │ │ - ldc2l 4, cr8, [sl, #636] @ 0x27c │ │ - ldc2l 6, cr2, [fp, #896] @ 0x380 │ │ + ldc2l 4, cr8, [sl, #816] @ 0x330 │ │ + ldc2l 7, cr2, [fp, #52] @ 0x34 │ │ strbeq sl, [fp], #-552 @ 0xfffffdd8 │ │ - ldc2l 2, cr11, [r8, #456] @ 0x1c8 │ │ - ldc2l 9, cr2, [fp, #368] @ 0x170 @ │ │ + ldc2l 2, cr11, [r8, #636] @ 0x27c │ │ + ldc2l 9, cr2, [fp, #458] @ 0x1ca @ │ │ strbeq sl, [fp], #-484 @ 0xfffffe1c │ │ strbeq sp, [ip], #-2640 @ 0xfffff5b0 │ │ - ldc2l 10, cr13, [fp, #608] @ 0x260 @ │ │ - ldc2l 9, cr2, [fp, #136] @ 0x88 @ │ │ + ldc2l 10, cr13, [fp, #788] @ 0x314 @ │ │ + ldc2l 9, cr2, [fp, #226] @ 0xe2 @ │ │ strbeq sp, [ip], #-2564 @ 0xfffff5fc │ │ strbeq sl, [fp], #-360 @ 0xfffffe98 │ │ ldc2l 13, cr1, [ip, #320] @ 0x140 │ │ - ldc2l 9, cr2, [fp, #8] @ │ │ + ldc2l 9, cr2, [fp, #98] @ 0x62 @ │ │ strbeq r2, [sp], #-2004 @ 0xfffff82c │ │ strbeq sl, [fp], #-264 @ 0xfffffef8 │ │ strbteq r3, [r1], #-2320 @ 0xfffff6f0 │ │ - vcadd.f32 d22, d26, d12, #270 │ │ - vcadd.f32 d18, d27, d4, #270 │ │ + ldc2l 8, cr6, [sl, #740] @ 0x2e4 │ │ + ldc2l 8, cr2, [fp, #708] @ 0x2c4 │ │ strbteq r3, [r1], #-2260 @ 0xfffff72c │ │ strbeq sl, [fp], #-164 @ 0xffffff5c │ │ strbteq r9, [r0], #-3088 @ 0xfffff3f0 │ │ - ldc2l 11, cr12, [r9, #944] @ 0x3b0 @ │ │ - ldc2l 6, cr2, [fp, #688] @ 0x2b0 │ │ + ldc2l 12, cr12, [r9, #100] @ 0x64 │ │ + ldc2l 6, cr2, [fp, #868] @ 0x364 │ │ strbteq r9, [r0], #-2660 @ 0xfffff59c │ │ strbeq r9, [fp], #-3788 @ 0xfffff134 │ │ - ldc2l 7, cr13, [fp, #752] @ 0x2f0 │ │ - ldc2l 6, cr2, [fp, #416] @ 0x1a0 │ │ + ldc2l 7, cr13, [fp, #932] @ 0x3a4 │ │ + ldc2l 6, cr2, [fp, #596] @ 0x254 │ │ strbeq sp, [ip], #-1824 @ 0xfffff8e0 │ │ - ldc2l 6, cr12, [sl, #520] @ 0x208 │ │ - ldc2l 1, cr15, [sl, #884] @ 0x374 │ │ - ldc2l 1, cr3, [fp, #96] @ 0x60 │ │ - ldc2l 4, cr9, [r8, #440] @ 0x1b8 │ │ - ldc2l 0, cr3, [fp, #864] @ 0x360 │ │ + ldc2l 6, cr12, [sl, #700] @ 0x2bc │ │ + ldc2l 2, cr15, [sl, #40] @ 0x28 │ │ + ldc2l 1, cr3, [fp, #276] @ 0x114 │ │ + ldc2l 4, cr9, [r8, #620] @ 0x26c │ │ + ldc2l 1, cr3, [fp, #20] │ │ strbteq r8, [r1], #-4004 @ 0xfffff05c │ │ - ldc2l 0, cr7, [sl, #656] @ 0x290 │ │ - ldc2l 0, cr3, [fp, #624] @ 0x270 │ │ + ldc2l 0, cr7, [sl, #836] @ 0x344 │ │ + ldc2l 0, cr3, [fp, #804] @ 0x324 │ │ strbteq r4, [r1], #-228 @ 0xffffff1c │ │ ldc2l 4, cr2, [ip, #736] @ 0x2e0 │ │ - ldc2l 5, cr1, [r9, #164] @ 0xa4 │ │ - ldc2l 13, cr2, [fp, #200] @ 0xc8 │ │ + ldc2l 5, cr1, [r9, #344] @ 0x158 │ │ + ldc2l 13, cr2, [fp, #380] @ 0x17c │ │ │ │ 0248d260 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 248d27c │ │ @@ -1382281,16 +1382280,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 3, cr0, [sl, #1000] @ 0x3e8 │ │ - ldc2l 1, cr13, [fp, #788] @ 0x314 │ │ + ldc2l 4, cr0, [sl, #156] @ 0x9c │ │ + ldc2l 1, cr13, [fp, #968] @ 0x3c8 │ │ │ │ 0248d2bc : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #48 @ 0x30 │ │ mov ip, r0 │ │ ldr r0, [fp, #16] │ │ @@ -1382665,28 +1382664,28 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 5, cr13, [fp, #124] @ 0x7c │ │ - ldc2l 14, cr1, [sl, #608] @ 0x260 │ │ - ldc2l 12, cr5, [r8, #416] @ 0x1a0 │ │ - ldc2l 10, cr15, [r8, #252] @ 0xfc @ │ │ + ldc2l 5, cr13, [fp, #304] @ 0x130 │ │ + ldc2l 14, cr1, [sl, #788] @ 0x314 │ │ + ldc2l 12, cr5, [r8, #596] @ 0x254 │ │ + ldc2l 10, cr15, [r8, #432] @ 0x1b0 @ │ │ eoreq fp, ip, r8, lsr #28 │ │ - ldc2l 0, cr12, [r9, #968] @ 0x3c8 │ │ - ldc2l 13, cr1, [sl, #880] @ 0x370 │ │ - ldc2l 6, cr5, [r9, #532] @ 0x214 │ │ - vcadd.f32 d17, d11, d22, #270 │ │ - ldc2l 6, cr11, [fp, #764] @ 0x2fc │ │ - ldc2l 6, cr9, [r8, #764] @ 0x2fc │ │ + ldc2l 1, cr12, [r9, #124] @ 0x7c │ │ + ldc2l 14, cr1, [sl, #36] @ 0x24 │ │ + ldc2l 6, cr5, [r9, #712] @ 0x2c8 │ │ + ldc2l 8, cr1, [fp, #332] @ 0x14c │ │ + ldc2l 6, cr11, [fp, #944] @ 0x3b0 │ │ + ldc2l 6, cr9, [r8, #944] @ 0x3b0 │ │ ldrdeq fp, [ip], -r0 @ │ │ - ldc2l 1, cr12, [r9, #168] @ 0xa8 │ │ - ldc2l 2, cr8, [r9, #24] │ │ + ldc2l 1, cr12, [r9, #348] @ 0x15c │ │ + ldc2l 2, cr8, [r9, #204] @ 0xcc │ │ │ │ 0248d8a4 : │ │ ldr r2, [r1] │ │ cmp r2, #1 │ │ movlt r0, #0 │ │ bxlt lr │ │ push {fp, lr} │ │ @@ -1383080,30 +1383079,30 @@ │ │ ldr r3, [fp, #36] @ 0x24 │ │ str r0, [sp, #8] │ │ add r0, sp, #32 │ │ bl 270fa50 │ │ ldr r0, [pc, #60] @ 248df10 │ │ add r0, pc, r0 │ │ b 248da40 │ │ - ldc2l 11, cr13, [sl, #244] @ 0xf4 @ │ │ - ldc2l 4, cr9, [r8, #444] @ 0x1bc │ │ - ldc2l 10, cr13, [sl, #164] @ 0xa4 @ │ │ + ldc2l 11, cr13, [sl, #424] @ 0x1a8 @ │ │ + ldc2l 4, cr9, [r8, #624] @ 0x270 │ │ + ldc2l 10, cr13, [sl, #344] @ 0x158 @ │ │ ldc2l 13, cr0, [ip, #600] @ 0x258 │ │ - ldc2l 4, cr5, [r9, #436] @ 0x1b4 │ │ - ldc2l 4, cr5, [r8, #348] @ 0x15c │ │ - ldc2l 9, cr13, [sl, #226] @ 0xe2 @ │ │ - ldc2l 9, cr13, [sl, #82] @ 0x52 @ │ │ - ldc2l 9, cr13, [sl, #282] @ 0x11a @ │ │ - ldc2l 3, cr15, [sl] │ │ - ldc2l 5, cr13, [sl, #224] @ 0xe0 │ │ - ldc2l 14, cr7, [r9, #164] @ 0xa4 │ │ - ldc2l 2, cr5, [r9, #372] @ 0x174 │ │ - ldc2l 0, cr11, [sl, #976] @ 0x3d0 │ │ + ldc2l 4, cr5, [r9, #616] @ 0x268 │ │ + ldc2l 4, cr5, [r8, #528] @ 0x210 │ │ + ldc2l 9, cr13, [sl, #316] @ 0x13c @ │ │ + ldc2l 9, cr13, [sl, #172] @ 0xac @ │ │ + ldc2l 9, cr13, [sl, #372] @ 0x174 @ │ │ + ldc2l 3, cr15, [sl, #180] @ 0xb4 │ │ + ldc2l 5, cr13, [sl, #404] @ 0x194 │ │ + ldc2l 14, cr7, [r9, #344] @ 0x158 │ │ + ldc2l 2, cr5, [r9, #552] @ 0x228 │ │ + ldc2l 1, cr11, [sl, #132] @ 0x84 │ │ ldc2l 8, cr0, [ip, #1000] @ 0x3e8 │ │ - ldc2l 10, cr13, [sl, #260] @ 0x104 @ │ │ + ldc2l 10, cr13, [sl, #440] @ 0x1b8 @ │ │ │ │ 0248df18 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #108 @ 0x6c │ │ mov r9, r3 │ │ mov r4, r2 │ │ @@ -1383258,21 +1383257,21 @@ │ │ sub r0, fp, #40 @ 0x28 │ │ str r1, [fp, #-40] @ 0xffffffd8 │ │ str r1, [fp, #-32] @ 0xffffffe0 │ │ bl 270d160 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - vcadd.f32 d27, d9, d3, #270 │ │ - ldc2l 15, cr2, [fp, #932] @ 0x3a4 │ │ - ldc2l 15, cr0, [fp, #248] @ 0xf8 │ │ - ldc2l 10, cr1, [r9, #60] @ 0x3c @ │ │ - ldc2l 4, cr3, [sl, #456] @ 0x1c8 │ │ - ldc2l 9, cr1, [r9, #454] @ 0x1c6 @ │ │ - ldc2l 4, cr3, [sl, #280] @ 0x118 │ │ + ldc2l 8, cr11, [r9, #192] @ 0xc0 │ │ + ldc2l 0, cr3, [fp, #88] @ 0x58 │ │ + ldc2l 15, cr0, [fp, #428] @ 0x1ac │ │ + ldc2l 10, cr1, [r9, #240] @ 0xf0 @ │ │ + ldc2l 4, cr3, [sl, #636] @ 0x27c │ │ + ldc2l 10, cr1, [r9, #64] @ 0x40 @ │ │ + ldc2l 4, cr3, [sl, #460] @ 0x1cc │ │ │ │ 0248e1b4 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ vpush {d8} │ │ sub sp, sp, #288 @ 0x120 │ │ mov r7, r0 │ │ @@ -1383602,35 +1383601,35 @@ │ │ add r1, sp, #24 │ │ add r3, sp, #104 @ 0x68 │ │ bl 270f9a0 │ │ bl 270db20 │ │ cmp r0, #0 │ │ bne 248e4b8 │ │ b 248e4ec │ │ - ldc2l 9, cr6, [fp, #406] @ 0x196 @ │ │ + ldc2l 9, cr6, [fp, #496] @ 0x1f0 @ │ │ strbteq r7, [r1], #-304 @ 0xfffffed0 │ │ strbteq r7, [r1], #-272 @ 0xfffffef0 │ │ strbteq r7, [r1], #-268 @ 0xfffffef4 │ │ strbteq r7, [r1], #-280 @ 0xfffffee8 │ │ ldrdeq fp, [ip], -r0 @ │ │ eoreq fp, ip, ip, ror #5 │ │ ldrdeq fp, [ip], -r4 @ │ │ - ldc2l 15, cr12, [r9, #144] @ 0x90 │ │ + ldc2l 15, cr12, [r9, #324] @ 0x144 │ │ strhteq fp, [ip], -ip │ │ strbteq r6, [r1], #-3652 @ 0xfffff1bc │ │ strbteq r6, [r1], #-3300 @ 0xfffff31c │ │ strbteq r6, [r1], #-3280 @ 0xfffff330 │ │ eoreq sl, ip, r8, asr #29 │ │ ldrdeq sl, [ip], -r0 @ │ │ strhteq sl, [ip], -r4 │ │ mlaeq ip, r4, lr, sl │ │ eoreq sl, ip, r0, ror pc │ │ eoreq sl, ip, ip, asr pc │ │ - ldc2l 1, cr1, [r9, #312] @ 0x138 │ │ - ldc2l 6, cr6, [fp, #956] @ 0x3bc │ │ + ldc2l 1, cr1, [r9, #492] @ 0x1ec │ │ + ldc2l 7, cr6, [fp, #112] @ 0x70 │ │ │ │ 0248e744 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r8, r0 │ │ bl 270ce10 │ │ @@ -1383734,28 +1383733,28 @@ │ │ bl 270d9a0 │ │ ldr r0, [pc, #64] @ 248e928 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ b 248e89c │ │ strbteq r6, [r1], #-3032 @ 0xfffff428 │ │ - ldc2l 12, cr4, [r8, #132] @ 0x84 │ │ - ldc2l 11, cr4, [r8, #320] @ 0x140 @ │ │ + ldc2l 12, cr4, [r8, #312] @ 0x138 │ │ + ldc2l 11, cr4, [r8, #500] @ 0x1f4 @ │ │ strbteq r6, [r1], #-2972 @ 0xfffff464 │ │ - ldc2l 9, cr2, [fp, #162] @ 0xa2 @ │ │ - ldc2l 1, cr11, [r9, #400] @ 0x190 │ │ - vcadd.f32 q15, q12, , #270 │ │ + ldc2l 9, cr2, [fp, #252] @ 0xfc @ │ │ + ldc2l 1, cr11, [r9, #580] @ 0x244 │ │ + ldc2l 9, cr14, [r8, #56] @ 0x38 @ │ │ eoreq sl, ip, ip, lsl sp │ │ strbteq r6, [r1], #-2800 @ 0xfffff510 │ │ strbteq r6, [r1], #-2780 @ 0xfffff524 │ │ - ldc2l 13, cr0, [sl, #320] @ 0x140 │ │ - ldc2l 5, cr4, [r9, #996] @ 0x3e4 │ │ - ldc2l 7, cr0, [fp, #616] @ 0x268 │ │ - ldc2l 10, cr4, [r8, #740] @ 0x2e4 @ │ │ - ldc2l 11, cr4, [r8, #148] @ 0x94 @ │ │ + ldc2l 13, cr0, [sl, #500] @ 0x1f4 │ │ + ldc2l 6, cr4, [r9, #152] @ 0x98 │ │ + ldc2l 7, cr0, [fp, #796] @ 0x31c │ │ + ldc2l 10, cr4, [r8, #920] @ 0x398 @ │ │ + ldc2l 11, cr4, [r8, #328] @ 0x148 @ │ │ strbteq r6, [r1], #-2748 @ 0xfffff544 │ │ strbteq r6, [r1], #-2732 @ 0xfffff554 │ │ │ │ 0248e938 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #60 @ 0x3c │ │ @@ -1384255,75 +1384254,75 @@ │ │ mov r1, r5 │ │ mov r2, #1 │ │ add r0, pc, r0 │ │ bl 270da70 │ │ b 248eed8 │ │ mov r0, #2 │ │ b 248f04c │ │ - ldc2l 10, cr0, [fp, #280] @ 0x118 @ │ │ + ldc2l 10, cr0, [fp, #460] @ 0x1cc @ │ │ strbteq r6, [r1], #-2540 @ 0xfffff614 │ │ - ldc2l 9, cr4, [r8, #144] @ 0x90 @ │ │ + ldc2l 9, cr4, [r8, #234] @ 0xea @ │ │ strbteq r6, [r1], #-2524 @ 0xfffff624 │ │ - ldc2l 7, cr2, [fp, #292] @ 0x124 │ │ - ldc2l 12, cr14, [r9, #876] @ 0x36c │ │ - ldc2l 10, cr0, [sl, #672] @ 0x2a0 @ │ │ + ldc2l 7, cr2, [fp, #472] @ 0x1d8 │ │ + ldc2l 13, cr14, [r9, #32] │ │ + ldc2l 10, cr0, [sl, #852] @ 0x354 @ │ │ strbteq r6, [r1], #-2372 @ 0xfffff6bc │ │ - ldc2l 1, cr5, [r9, #148] @ 0x94 │ │ - ldc2l 12, cr14, [r9, #332] @ 0x14c │ │ + ldc2l 1, cr5, [r9, #328] @ 0x148 │ │ + ldc2l 12, cr14, [r9, #512] @ 0x200 │ │ strbteq r6, [r1], #-2234 @ 0xfffff746 │ │ strbteq r6, [r1], #-2242 @ 0xfffff73e │ │ strbteq r6, [r1], #-2300 @ 0xfffff704 │ │ strbteq r6, [r1], #-2213 @ 0xfffff75b │ │ strbteq r6, [r1], #-2164 @ 0xfffff78c │ │ - ldc2l 12, cr0, [sl, #244] @ 0xf4 │ │ - ldc2l 3, cr4, [r9, #564] @ 0x234 │ │ - ldc2l 15, cr6, [r9, #420] @ 0x1a4 │ │ + ldc2l 12, cr0, [sl, #424] @ 0x1a8 │ │ + ldc2l 3, cr4, [r9, #744] @ 0x2e8 │ │ + ldc2l 15, cr6, [r9, #600] @ 0x258 │ │ eoreq sl, ip, r8, lsl sl │ │ eoreq sl, ip, ip, lsl sl │ │ - ldc2l 15, cr12, [r9, #372] @ 0x174 │ │ - ldc2l 3, cr4, [r9, #4] │ │ - ldc2l 7, cr2, [r9, #812] @ 0x32c │ │ + ldc2l 15, cr12, [r9, #552] @ 0x228 │ │ + ldc2l 3, cr4, [r9, #184] @ 0xb8 │ │ + ldc2l 7, cr2, [r9, #992] @ 0x3e0 │ │ eoreq sl, ip, r4, asr r9 │ │ strbteq r6, [r1], #-1840 @ 0xfffff8d0 │ │ - ldc2l 4, cr8, [sl, #1016] @ 0x3f8 │ │ - ldc2l 1, cr4, [r9, #564] @ 0x234 │ │ - ldc2l 10, cr0, [sl, #384] @ 0x180 @ │ │ - ldc2l 13, cr4, [r9, #948] @ 0x3b4 │ │ - ldc2l 9, cr14, [r9, #54] @ 0x36 @ │ │ - ldc2l 1, cr4, [r9, #180] @ 0xb4 │ │ - ldc2l 5, cr14, [r9, #544] @ 0x220 │ │ - ldc2l 13, cr4, [r9, #596] @ 0x254 │ │ - vcadd.f32 q15, , , #270 │ │ - ldc2l 5, cr10, [r8, #676] @ 0x2a4 │ │ - ldc2l 6, cr2, [sl, #976] @ 0x3d0 │ │ - ldc2l 7, cr0, [fp, #760] @ 0x2f8 │ │ - ldc2l 14, cr12, [r9, #696] @ 0x2b8 │ │ - ldc2l 14, cr4, [r9, #628] @ 0x274 │ │ - ldc2l 9, cr14, [r9, #406] @ 0x196 @ │ │ - ldc2l 6, cr14, [r9, #304] @ 0x130 │ │ - ldc2l 1, cr4, [r9, #804] @ 0x324 │ │ - ldc2l 2, cr8, [fp, #24] │ │ + ldc2l 5, cr8, [sl, #172] @ 0xac │ │ + ldc2l 1, cr4, [r9, #744] @ 0x2e8 │ │ + ldc2l 10, cr0, [sl, #564] @ 0x234 @ │ │ + ldc2l 14, cr4, [r9, #104] @ 0x68 │ │ + ldc2l 9, cr14, [r9, #144] @ 0x90 @ │ │ + ldc2l 1, cr4, [r9, #360] @ 0x168 │ │ + ldc2l 5, cr14, [r9, #724] @ 0x2d4 │ │ + ldc2l 13, cr4, [r9, #776] @ 0x308 │ │ + ldc2l 8, cr14, [r9, #960] @ 0x3c0 │ │ + ldc2l 5, cr10, [r8, #856] @ 0x358 │ │ + ldc2l 7, cr2, [sl, #132] @ 0x84 │ │ + ldc2l 7, cr0, [fp, #940] @ 0x3ac │ │ + ldc2l 14, cr12, [r9, #876] @ 0x36c │ │ + ldc2l 14, cr4, [r9, #808] @ 0x328 │ │ + ldc2l 9, cr14, [r9, #496] @ 0x1f0 @ │ │ + ldc2l 6, cr14, [r9, #484] @ 0x1e4 │ │ + ldc2l 1, cr4, [r9, #984] @ 0x3d8 │ │ + ldc2l 2, cr8, [fp, #204] @ 0xcc │ │ strbteq r6, [r1], #-1378 @ 0xfffffa9e │ │ eoreq sl, ip, r8, ror r7 │ │ eoreq sl, ip, r4, lsr #14 │ │ strbteq r6, [r1], #-1296 @ 0xfffffaf0 │ │ - ldc2l 6, cr2, [sl, #396] @ 0x18c │ │ - ldc2l 0, cr4, [r9, #36] @ 0x24 │ │ - ldc2l 2, cr14, [r8, #12] │ │ + ldc2l 6, cr2, [sl, #576] @ 0x240 │ │ + ldc2l 0, cr4, [r9, #216] @ 0xd8 │ │ + ldc2l 2, cr14, [r8, #192] @ 0xc0 │ │ eoreq sl, ip, r8, ror #12 │ │ strbteq r6, [r1], #-1100 @ 0xfffffbb4 │ │ - ldc2l 6, cr2, [sl, #204] @ 0xcc │ │ - ldc2l 1, cr0, [fp, #24] │ │ + ldc2l 6, cr2, [sl, #384] @ 0x180 │ │ + ldc2l 1, cr0, [fp, #204] @ 0xcc │ │ strhteq sl, [ip], -ip │ │ mlaeq ip, r0, r5, sl │ │ - ldc2l 14, cr7, [fp, #936] @ 0x3a8 │ │ - ldc2l 11, cr8, [r8, #304] @ 0x130 @ │ │ - ldc2l 13, cr3, [r9, #772] @ 0x304 │ │ - ldc2l 5, cr10, [sl, #96] @ 0x60 │ │ - vcadd.f32 q13, , q5, #270 │ │ + ldc2l 15, cr7, [fp, #92] @ 0x5c │ │ + ldc2l 11, cr8, [r8, #484] @ 0x1e4 @ │ │ + ldc2l 13, cr3, [r9, #952] @ 0x3b8 │ │ + ldc2l 5, cr10, [sl, #276] @ 0x114 │ │ + ldc2l 8, cr10, [r9, #476] @ 0x1dc │ │ │ │ 0248f208 : │ │ ldrb ip, [r0] │ │ ldrb r0, [r0, #1] │ │ and r3, ip, #240 @ 0xf0 │ │ cmp r3, #128 @ 0x80 │ │ andseq r3, r0, #15 │ │ @@ -1384602,18 +1384601,18 @@ │ │ ldr r2, [sp, #32] │ │ ldr ip, [fp, #12] │ │ ldr r7, [fp, #8] │ │ b 248f4e4 │ │ ldr r2, [sp, #32] │ │ ldr r7, [fp, #8] │ │ b 248f4e4 │ │ - ldc2l 7, cr8, [r9, #432] @ 0x1b0 │ │ - ldc2l 7, cr0, [r9, #312] @ 0x138 │ │ - ldc2l 11, cr3, [r9, #468] @ 0x1d4 @ │ │ - ldc2l 12, cr3, [sl, #360] @ 0x168 │ │ + ldc2l 7, cr8, [r9, #612] @ 0x264 │ │ + ldc2l 7, cr0, [r9, #492] @ 0x1ec │ │ + ldc2l 11, cr3, [r9, #648] @ 0x288 @ │ │ + ldc2l 12, cr3, [sl, #540] @ 0x21c │ │ │ │ 0248f678 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #492 @ 0x1ec │ │ sub r0, r0, #1 │ │ cmp r0, #4 │ │ @@ -1385633,25 +1385632,25 @@ │ │ ldr r1, [pc, r1] │ │ cmp r0, r1 │ │ ble 2491430 │ │ ldr r1, [pc, #3768] @ 249152c │ │ mov r0, r7 │ │ add r1, pc, r1 │ │ b 248fe48 │ │ - ldc2l 4, cr5, [fp, #944] @ 0x3b0 │ │ + ldc2l 5, cr5, [fp, #100] @ 0x64 │ │ strbteq r5, [r1], #-3316 @ 0xfffff30c │ │ strbteq r9, [r2], #-3396 @ 0xfffff2bc │ │ strbteq r9, [r2], #-3372 @ 0xfffff2d4 │ │ eoreq r9, ip, r8, lsl #29 │ │ - ldc2l 14, cr6, [fp, #676] @ 0x2a4 │ │ + ldc2l 14, cr6, [fp, #856] @ 0x358 │ │ strbteq r5, [r1], #-3224 @ 0xfffff368 │ │ eoreq r9, ip, ip, lsl #29 │ │ streq ip, [r4], #2804 @ 0xaf4 │ │ - ldc2l 4, cr5, [fp, #288] @ 0x120 │ │ - ldc2l 2, cr10, [r9, #304] @ 0x130 │ │ + ldc2l 4, cr5, [fp, #468] @ 0x1d4 │ │ + ldc2l 2, cr10, [r9, #484] @ 0x1e4 │ │ strbteq r9, [r2], #-3204 @ 0xfffff37c │ │ ldr r5, [pc, #3708] @ 2491530 │ │ ldr r0, [pc, #3708] @ 2491534 │ │ add r5, pc, r5 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ str r0, [fp, #-48] @ 0xffffffd0 │ │ @@ -1385717,41 +1385716,41 @@ │ │ ldr r0, [pc, #4092] @ 24917b4 │ │ mov r2, r8 │ │ movw r3, #2207 @ 0x89f │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24906ac │ │ - ldc2l 12, cr13, [sl, #808] @ 0x328 │ │ + ldc2l 12, cr13, [sl, #988] @ 0x3dc │ │ strbteq r5, [r1], #-3052 @ 0xfffff414 │ │ strbteq r9, [r2], #-3132 @ 0xfffff3c4 │ │ streq r0, [r6], #732 @ 0x2dc │ │ strbteq r5, [r1], #-2984 @ 0xfffff458 │ │ streq r0, [r6], #700 @ 0x2bc │ │ streq r0, [r6], #684 @ 0x2ac │ │ strbteq r5, [r1], #-2948 @ 0xfffff47c │ │ strbteq r5, [r1], #-3356 @ 0xfffff2e4 │ │ strbteq r9, [r2], #-3024 @ 0xfffff430 │ │ eoreq r9, ip, r0, lsr sp │ │ - ldc2l 2, cr9, [r8, #648] @ 0x288 │ │ - ldc2l 6, cr7, [fp, #864] @ 0x360 │ │ + ldc2l 2, cr9, [r8, #828] @ 0x33c │ │ + ldc2l 7, cr7, [fp, #20] │ │ strbteq r5, [r1], #-2848 @ 0xfffff4e0 │ │ strbteq r9, [r2], #-2928 @ 0xfffff490 │ │ eoreq r9, ip, r4, asr #25 │ │ - ldc2l 12, cr6, [fp, #916] @ 0x394 │ │ + ldc2l 13, cr6, [fp, #72] @ 0x48 │ │ strbteq r5, [r1], #-2792 @ 0xfffff518 │ │ mlaeq ip, r4, ip, r9 │ │ - ldc2l 11, cr10, [fp, #760] @ 0x2f8 @ │ │ + ldc2l 11, cr10, [fp, #940] @ 0x3ac @ │ │ eoreq r9, ip, r8, ror #24 │ │ - ldc2l 1, cr9, [r8, #856] @ 0x358 │ │ + ldc2l 2, cr9, [r8, #12] │ │ strbteq sl, [r1], #-3016 @ 0xfffff438 │ │ - ldc2l 2, cr12, [r9, #716] @ 0x2cc │ │ - ldc2l 14, cr4, [fp, #332] @ 0x14c │ │ + ldc2l 2, cr12, [r9, #896] @ 0x380 │ │ + ldc2l 14, cr4, [fp, #512] @ 0x200 │ │ strbteq sl, [r1], #-3800 @ 0xfffff128 │ │ - ldc2l 5, cr7, [fp, #988] @ 0x3dc │ │ + ldc2l 6, cr7, [fp, #144] @ 0x90 │ │ strbteq r5, [r1], #-2632 @ 0xfffff5b8 │ │ ldr r0, [pc, #3980] @ 24917d0 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ bcc 249086c │ │ @@ -1385833,20 +1385832,20 @@ │ │ ldr r0, [sp, #12] │ │ add r0, r0, #1 │ │ str r0, [sp, #12] │ │ b 248fbcc │ │ strbteq r9, [r2], #-2712 @ 0xfffff568 │ │ strbteq r9, [r2], #-2692 @ 0xfffff57c │ │ eoreq r9, ip, r0, ror #23 │ │ - ldc2l 12, cr6, [fp, #4] │ │ + ldc2l 12, cr6, [fp, #184] @ 0xb8 │ │ strbteq r5, [r1], #-2536 @ 0xfffff618 │ │ strbteq r5, [r1], #-3348 @ 0xfffff2ec │ │ strbteq r9, [r2], #-2612 @ 0xfffff5cc │ │ - ldc2l 10, cr10, [fp, #688] @ 0x2b0 @ │ │ - ldc2l 1, cr12, [r9, #908] @ 0x38c │ │ + ldc2l 10, cr10, [fp, #868] @ 0x364 @ │ │ + ldc2l 2, cr12, [r9, #64] @ 0x40 │ │ mov r6, sl │ │ ldr sl, [pc, #4008] @ 2491968 │ │ mov r2, r8 │ │ movw r3, #2006 @ 0x7d6 │ │ add sl, pc, sl │ │ mov r0, sl │ │ bl 270d9c0 │ │ @@ -1385883,22 +1385882,22 @@ │ │ mov r4, r0 │ │ ldr r0, [pc, #3884] @ 2491980 │ │ mov r5, #0 │ │ mov r6, #0 │ │ add r0, pc, r0 │ │ b 2490ac0 │ │ strbteq r4, [r2], #-2976 @ 0xfffff460 │ │ - ldc2l 10, cr10, [fp, #176] @ 0xb0 @ │ │ - ldc2l 1, cr12, [r9, #396] @ 0x18c │ │ - ldc2l 9, cr10, [fp, #504] @ 0x1f8 @ │ │ - ldc2l 1, cr12, [r9, #204] @ 0xcc │ │ - ldc2l 15, cr6, [sl, #588] @ 0x24c │ │ - ldc2l 1, cr12, [r9, #12] │ │ - ldc2l 15, cr6, [sl, #428] @ 0x1ac │ │ - ldc2l 0, cr12, [r9, #876] @ 0x36c │ │ + ldc2l 10, cr10, [fp, #356] @ 0x164 @ │ │ + ldc2l 1, cr12, [r9, #576] @ 0x240 │ │ + ldc2l 10, cr10, [fp, #164] @ 0xa4 @ │ │ + ldc2l 1, cr12, [r9, #384] @ 0x180 │ │ + ldc2l 15, cr6, [sl, #768] @ 0x300 │ │ + ldc2l 1, cr12, [r9, #192] @ 0xc0 │ │ + ldc2l 15, cr6, [sl, #608] @ 0x260 │ │ + ldc2l 1, cr12, [r9, #32] │ │ ldr r0, [pc, #3832] @ 2491984 │ │ clz r2, r6 │ │ mov r1, #0 │ │ add r0, pc, r0 │ │ lsr r2, r2, #5 │ │ ldr r3, [r0, r7, lsl #2] │ │ ldr r0, [pc, #3812] @ 2491988 │ │ @@ -1385938,16 +1385937,16 @@ │ │ ldr r1, [pc, #3692] @ 2491998 │ │ mov r6, r5 │ │ add r1, pc, r1 │ │ ldr r4, [r1, r0, lsl #2] │ │ ldr r0, [pc, #3680] @ 249199c │ │ add r0, pc, r0 │ │ b 2490ab8 │ │ - ldc2l 6, cr5, [sl, #344] @ 0x158 │ │ - ldc2l 7, cr7, [sl, #184] @ 0xb8 │ │ + ldc2l 6, cr5, [sl, #524] @ 0x20c │ │ + ldc2l 7, cr7, [sl, #364] @ 0x16c │ │ strbteq sl, [r1], #-2860 @ 0xfffff4d4 │ │ strbteq r5, [r1], #-2116 @ 0xfffff7bc │ │ strbteq r9, [r2], #-2188 @ 0xfffff774 │ │ movw r0, #5000 @ 0x1388 │ │ cmp r1, r0 │ │ bcc 2490b78 │ │ ldr r0, [pc, #3640] @ 24919a0 │ │ @@ -1385965,30 +1385964,30 @@ │ │ cmp r1, #99 @ 0x63 │ │ bhi 2491468 │ │ ldr r0, [pc, #3596] @ 24919ac │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 249149c │ │ strdeq r9, [ip], -r8 @ │ │ - ldc2l 14, cr2, [fp, #12] │ │ - ldc2l 15, cr8, [r8, #344] @ 0x158 │ │ + ldc2l 14, cr2, [fp, #192] @ 0xc0 │ │ + ldc2l 15, cr8, [r8, #524] @ 0x20c │ │ strbteq sl, [r1], #-2380 @ 0xfffff6b4 │ │ - ldc2l 8, cr10, [fp, #984] @ 0x3d8 │ │ - ldc2l 8, cr9, [r9, #220] @ 0xdc │ │ - ldc2l 1, cr3, [r8, #992] @ 0x3e0 │ │ - ldc2l 11, cr9, [r8, #344] @ 0x158 @ │ │ - ldc2l 13, cr2, [fp, #236] @ 0xec │ │ - ldc2l 6, cr15, [r9, #668] @ 0x29c │ │ - ldc2l 15, cr4, [sl, #376] @ 0x178 │ │ - ldc2l 4, cr13, [r8, #4] │ │ - ldc2l 12, cr2, [fp, #676] @ 0x2a4 │ │ - ldc2l 2, cr15, [sl, #248] @ 0xf8 │ │ - ldc2l 7, cr11, [r8, #508] @ 0x1fc │ │ + ldc2l 9, cr10, [fp, #70] @ 0x46 @ │ │ + vcadd.f32 , , q10, #270 │ │ + ldc2l 2, cr3, [r8, #148] @ 0x94 │ │ + ldc2l 11, cr9, [r8, #524] @ 0x20c @ │ │ + ldc2l 13, cr2, [fp, #416] @ 0x1a0 │ │ + ldc2l 6, cr15, [r9, #848] @ 0x350 │ │ + ldc2l 15, cr4, [sl, #556] @ 0x22c │ │ + ldc2l 4, cr13, [r8, #184] @ 0xb8 │ │ + ldc2l 12, cr2, [fp, #856] @ 0x358 │ │ + ldc2l 2, cr15, [sl, #428] @ 0x1ac │ │ + ldc2l 7, cr11, [r8, #688] @ 0x2b0 │ │ streq pc, [r5], #3464 @ 0xd88 │ │ - ldc2l 1, cr11, [sl, #632] @ 0x278 │ │ + ldc2l 1, cr11, [sl, #812] @ 0x32c │ │ streq pc, [r5], #3392 @ 0xd40 │ │ ldr r4, [pc, #3512] @ 24919b0 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270e050 │ │ cmp r0, #0 │ │ beq 24917b8 │ │ @@ -1386098,55 +1386097,55 @@ │ │ mov r1, r0 │ │ ldr r0, [pc, #4024] @ 2491d68 │ │ add r0, pc, r0 │ │ str r4, [r0, r1, lsl #2] │ │ b 2491720 │ │ streq pc, [r5], #3380 @ 0xd34 │ │ strbteq r9, [r2], #-1628 @ 0xfffff9a4 │ │ - ldc2l 3, cr5, [r8, #888] @ 0x378 │ │ + ldc2l 4, cr5, [r8, #44] @ 0x2c │ │ strbteq r5, [r1], #-1480 @ 0xfffffa38 │ │ - ldc2l 12, cr6, [sl, #476] @ 0x1dc │ │ + ldc2l 12, cr6, [sl, #656] @ 0x290 │ │ strbteq r4, [r2], #-2008 @ 0xfffff828 │ │ - ldc2l 15, cr2, [r8, #944] @ 0x3b0 │ │ + ldc2l 0, cr3, [r8, #100] @ 0x64 │ │ strbteq r5, [r1], #-1384 @ 0xfffffa98 │ │ strbteq r5, [r1], #-1364 @ 0xfffffaac │ │ strbteq r4, [r2], #-1528 @ 0xfffffa08 │ │ strbteq r9, [r2], #-1440 @ 0xfffffa60 │ │ - ldc2l 0, cr3, [r8, #260] @ 0x104 │ │ + ldc2l 0, cr3, [r8, #440] @ 0x1b8 │ │ strbteq r9, [r2], #-1396 @ 0xfffffa8c │ │ strbteq r5, [r1], #-1304 @ 0xfffffae8 │ │ ldc2l 2, cr0, [ip, #384] @ 0x180 │ │ strbteq r9, [r2], #-1332 @ 0xfffffacc │ │ strbteq r4, [r2], #-1396 @ 0xfffffa8c │ │ - ldc2l 15, cr2, [r8, #788] @ 0x314 │ │ + ldc2l 15, cr2, [r8, #968] @ 0x3c8 │ │ strbteq r5, [r1], #-1180 @ 0xfffffb64 │ │ strbteq r4, [r2], #-1700 @ 0xfffff95c │ │ strbteq r9, [r2], #-1212 @ 0xfffffb44 │ │ strbteq r9, [r2], #-1196 @ 0xfffffb54 │ │ strbteq r9, [r2], #-1180 @ 0xfffffb64 │ │ - ldc2l 2, cr5, [r8, #120] @ 0x78 │ │ + ldc2l 2, cr5, [r8, #300] @ 0x12c │ │ strbteq r9, [r2], #-1140 @ 0xfffffb8c │ │ - ldc2l 10, cr6, [sl, #732] @ 0x2dc @ │ │ - ldc2l 10, cr6, [sl, #556] @ 0x22c @ │ │ + ldc2l 10, cr6, [sl, #912] @ 0x390 @ │ │ + ldc2l 10, cr6, [sl, #736] @ 0x2e0 @ │ │ strbteq r9, [r2], #-1040 @ 0xfffffbf0 │ │ strbteq r4, [r2], #-1508 @ 0xfffffa1c │ │ - ldc2l 1, cr5, [r8, #536] @ 0x218 │ │ + ldc2l 1, cr5, [r8, #716] @ 0x2cc │ │ strbteq r9, [r2], #-972 @ 0xfffffc34 │ │ strbteq r9, [r2], #-968 @ 0xfffffc38 │ │ - ldc2l 4, cr10, [fp, #288] @ 0x120 │ │ + ldc2l 4, cr10, [fp, #468] @ 0x1d4 │ │ strbteq r5, [r1], #-1628 @ 0xfffff9a4 │ │ streq pc, [r5], #2632 @ 0xa48 │ │ - ldc2l 6, cr9, [r8, #952] @ 0x3b8 │ │ + ldc2l 7, cr9, [r8, #108] @ 0x6c │ │ strbteq r4, [r2], #-928 @ 0xfffffc60 │ │ strbteq r4, [r2], #-920 @ 0xfffffc68 │ │ ldc2l 0, cr0, [ip, #160] @ 0xa0 │ │ strbteq r4, [r2], #-844 @ 0xfffffcb4 │ │ ldc2l 15, cr15, [fp, #1008] @ 0x3f0 │ │ strbteq r4, [r2], #-796 @ 0xfffffce4 │ │ - ldc2l 13, cr2, [r8, #388] @ 0x184 │ │ + ldc2l 13, cr2, [r8, #568] @ 0x238 │ │ ldr r7, [pc, #4044] @ 2491e38 │ │ cmp r6, #0 │ │ ldr r5, [pc, #4040] @ 2491e3c │ │ add r7, pc, r7 │ │ add r5, pc, r5 │ │ beq 2491204 │ │ sub r2, r6, #1 │ │ @@ -1386342,40 +1386341,40 @@ │ │ ldr r1, [pc, #3984] @ 249210c │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ b 2491720 │ │ strbteq r5, [r1], #-576 @ 0xfffffdc0 │ │ streq ip, [r4], #136 @ 0x88 │ │ strbteq r4, [r2], #-656 @ 0xfffffd70 │ │ - ldc2l 5, cr4, [fp, #780] @ 0x30c │ │ + ldc2l 5, cr4, [fp, #960] @ 0x3c0 │ │ streq pc, [r5], #2292 @ 0x8f4 │ │ strbteq r5, [r1], #-868 @ 0xfffffc9c │ │ - vcadd.f32 q9, , , #270 │ │ + ldc2l 8, cr2, [fp, #584] @ 0x248 │ │ strbteq r5, [r1], #-816 @ 0xfffffcd0 │ │ ldc2l 15, cr15, [fp] │ │ strbteq r4, [r2], #-548 @ 0xfffffddc │ │ strbteq r5, [r1], #-352 @ 0xfffffea0 │ │ - ldc2l 8, cr6, [sl, #76] @ 0x4c │ │ + vcadd.f32 q11, q5, q0, #270 │ │ strbteq r4, [r2], #-880 @ 0xfffffc90 │ │ - ldc2l 15, cr4, [r8, #72] @ 0x48 │ │ + ldc2l 15, cr4, [r8, #252] @ 0xfc │ │ strbteq sl, [r1], #-596 @ 0xfffffdac │ │ strbteq r5, [r1], #-244 @ 0xffffff0c │ │ - ldc2l 7, cr6, [sl, #668] @ 0x29c │ │ + ldc2l 7, cr6, [sl, #848] @ 0x350 │ │ strbteq r4, [r2], #-772 @ 0xfffffcfc │ │ ldc2l 2, cr14, [fp, #160] @ 0xa0 │ │ strbteq sl, [r1], #-880 @ 0xfffffc90 │ │ - ldc2l 11, cr2, [r8, #644] @ 0x284 @ │ │ + ldc2l 11, cr2, [r8, #824] @ 0x338 @ │ │ strbteq r9, [r2], #-204 @ 0xffffff34 │ │ strbteq r5, [r1], #-72 @ 0xffffffb8 │ │ strbteq r9, [r2], #-172 @ 0xffffff54 │ │ strbteq r9, [r2], #-156 @ 0xffffff64 │ │ ldc2l 1, cr14, [fp, #640] @ 0x280 │ │ strbteq r9, [r2], #-116 @ 0xffffff8c │ │ strbteq sl, [r1], #-740 @ 0xfffffd1c │ │ - ldc2l 6, cr6, [sl, #700] @ 0x2bc │ │ + ldc2l 6, cr6, [sl, #880] @ 0x370 │ │ strbteq r4, [r2], #-528 @ 0xfffffdf0 │ │ strbteq r9, [r2], #-36 @ 0xffffffdc │ │ strbteq r9, [r2], #-8 │ │ ldr r0, [pc, #4092] @ 2492208 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, #2 │ │ @@ -1386509,27 +1386508,27 @@ │ │ bl 270d970 │ │ ldr r0, [pc, #3664] @ 249226c │ │ mov r1, #0 │ │ add r0, pc, r0 │ │ str r1, [r0] │ │ b 248fbcc │ │ strbteq r9, [r2], #-4 │ │ - ldc2l 0, cr10, [fp, #528] @ 0x210 │ │ + ldc2l 0, cr10, [fp, #708] @ 0x2c4 │ │ ldr r1, [pc, #3640] @ 2492270 │ │ mov r0, r7 │ │ mov r2, #40 @ 0x28 │ │ mov r3, #8 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ b 248fbcc │ │ strbteq r5, [r1], #-664 @ 0xfffffd68 │ │ streq pc, [r5], #1668 @ 0x684 │ │ - ldc2l 14, cr14, [r9, #748] @ 0x2ec │ │ + ldc2l 14, cr14, [r9, #928] @ 0x3a0 │ │ strbteq r8, [r2], #-3976 @ 0xfffff078 │ │ - ldc2l 0, cr10, [fp, #32] │ │ + ldc2l 0, cr10, [fp, #212] @ 0xd4 │ │ strbteq r5, [r1], #-536 @ 0xfffffde8 │ │ streq pc, [r5], #1540 @ 0x604 │ │ ldr r0, [pc, #3588] @ 2492274 │ │ mov r2, r8 │ │ movw r3, #2127 @ 0x84f │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1386561,31 +1386560,31 @@ │ │ ldr sl, [pc, #4092] @ 24924e4 │ │ add sl, pc, sl │ │ b 248fbcc │ │ streq pc, [r5], #1528 @ 0x5f8 │ │ eoreq r9, ip, r8, asr #1 │ │ streq pc, [r5], #1480 @ 0x5c8 │ │ strbteq r8, [r2], #-3832 @ 0xfffff108 │ │ - ldc2l 15, cr9, [fp, #480] @ 0x1e0 │ │ + ldc2l 15, cr9, [fp, #660] @ 0x294 │ │ strbteq r5, [r1], #-396 @ 0xfffffe74 │ │ streq pc, [r5], #1380 @ 0x564 │ │ - ldc2l 2, cr9, [r8, #56] @ 0x38 │ │ - ldc2l 11, cr12, [r8, #244] @ 0xf4 @ │ │ + ldc2l 2, cr9, [r8, #236] @ 0xec │ │ + ldc2l 11, cr12, [r8, #424] @ 0x1a8 @ │ │ strbteq r8, [r2], #-3680 @ 0xfffff1a0 │ │ strbteq r8, [r2], #-3632 @ 0xfffff1d0 │ │ strbteq r3, [r2], #-3688 @ 0xfffff198 │ │ strbteq r8, [r2], #-3584 @ 0xfffff200 │ │ ldc2l 15, cr13, [fp, #16] │ │ strbteq sl, [r1], #-80 @ 0xffffffb0 │ │ strbteq r3, [r2], #-4004 @ 0xfffff05c │ │ - ldc2l 3, cr2, [fp, #252] @ 0xfc │ │ + ldc2l 3, cr2, [fp, #432] @ 0x1b0 │ │ strbteq r9, [r1], #-3680 @ 0xfffff1a0 │ │ streq fp, [r4], #2944 @ 0xb80 │ │ - ldc2l 5, cr4, [sl, #108] @ 0x6c │ │ - ldc2l 15, cr12, [r9, #484] @ 0x1e4 │ │ + ldc2l 5, cr4, [sl, #288] @ 0x120 │ │ + ldc2l 15, cr12, [r9, #664] @ 0x298 │ │ ldr r4, [pc, #4000] @ 24924e8 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270e050 │ │ cmp r0, #0 │ │ beq 249186c │ │ add r1, sp, #20 │ │ @@ -1386705,15 +1386704,15 @@ │ │ ldr r1, [pc, #3856] @ 2492638 │ │ mov r0, r7 │ │ mov r2, #40 @ 0x28 │ │ mov r3, #6 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ b 248fbcc │ │ - ldc2l 13, cr12, [sl, #636] @ 0x27c │ │ + ldc2l 13, cr12, [sl, #816] @ 0x330 │ │ ldrbteq sp, [pc], #-2240 @ 2491748 │ │ strbteq r8, [r2], #-3260 @ 0xfffff344 │ │ ldr r1, [pc, #3820] @ 249263c │ │ ldr r1, [pc, r1] │ │ ldr r2, [pc, #3816] @ 2492640 │ │ cmp r1, #2 │ │ add r0, r1, #1 │ │ @@ -1386735,15 +1386734,15 @@ │ │ bl 270d970 │ │ sub r1, fp, #240 @ 0xf0 │ │ mov r0, r7 │ │ mov r2, #40 @ 0x28 │ │ mov r3, #40 @ 0x28 │ │ bl 270d970 │ │ b 248fbcc │ │ - ldc2l 15, cr3, [fp, #1000] @ 0x3e8 │ │ + ldc2l 0, cr4, [fp, #156] @ 0x9c │ │ ldr r1, [pc, #4068] @ 24927a4 │ │ sub r0, fp, #88 @ 0x58 │ │ mov r2, #40 @ 0x28 │ │ mov r3, #12 │ │ add r1, pc, r1 │ │ b 2491880 │ │ strbteq r8, [r2], #-3052 @ 0xfffff414 │ │ @@ -1386776,15 +1386775,15 @@ │ │ ldr r0, [pc, #4044] @ 2492810 │ │ mov r2, r8 │ │ movw r3, #2129 @ 0x851 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24914b4 │ │ - ldc2l 12, cr9, [fp, #432] @ 0x1b0 │ │ + ldc2l 12, cr9, [fp, #612] @ 0x264 │ │ strbteq r4, [r1], #-3708 @ 0xfffff184 │ │ streq pc, [r5], #616 @ 0x268 │ │ streq pc, [r5], #604 @ 0x25c │ │ eoreq r8, ip, ip, lsr #26 │ │ ldr r1, [pc, #4000] @ 2492814 │ │ sub r0, fp, #88 @ 0x58 │ │ mov r2, #40 @ 0x28 │ │ @@ -1386802,15 +1386801,15 @@ │ │ mov r2, #40 @ 0x28 │ │ mov r3, #7 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ b 248fbcc │ │ strbteq r8, [r2], #-2924 @ 0xfffff494 │ │ streq pc, [r5], #544 @ 0x220 │ │ - ldc2l 11, cr9, [fp, #880] @ 0x370 @ │ │ + ldc2l 12, cr9, [fp, #36] @ 0x24 │ │ ldr r4, [sp, #20] │ │ ldr r0, [pc, #4048] @ 24928a0 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, #100 @ 0x64 │ │ bcc 2490da8 │ │ ldr r0, [pc, #4092] @ 24928e0 │ │ @@ -1386829,52 +1386828,52 @@ │ │ ldr r9, [pc, #4052] @ 24928ec │ │ mov r1, #1 │ │ add r5, pc, r5 │ │ movw r7, #10000 @ 0x2710 │ │ add r9, pc, r9 │ │ b 2491c24 │ │ streq pc, [r5], #444 @ 0x1bc │ │ - ldc2l 9, cr14, [r9, #494] @ 0x1ee @ │ │ - ldc2l 0, cr2, [fp, #372] @ 0x174 │ │ + ldc2l 10, cr14, [r9, #144] @ 0x90 @ │ │ + ldc2l 0, cr2, [fp, #552] @ 0x228 │ │ ldr r1, [pc, #4084] @ 2492930 │ │ add r1, pc, r1 │ │ ldr r0, [r1, r0, lsl #2] │ │ cmp r0, #0 │ │ ble 24919c4 │ │ ldr r1, [sp, #12] │ │ ldr sl, [pc, #4080] @ 2492944 │ │ add r1, r1, #1 │ │ ldr sl, [pc, sl] │ │ cmp r1, sl │ │ ble 2491c24 │ │ b 2491dbc │ │ - ldc2l 5, cr14, [sl, #1000] @ 0x3e8 │ │ + ldc2l 6, cr14, [sl, #156] @ 0x9c │ │ ldc2l 7, cr15, [fp, #512] @ 0x200 │ │ strbteq r8, [r2], #-2644 @ 0xfffff5ac │ │ strbteq r3, [r2], #-2708 @ 0xfffff56c │ │ strbteq r3, [r2], #-2668 @ 0xfffff594 │ │ - ldc2l 13, cr3, [fp, #604] @ 0x25c │ │ + ldc2l 13, cr3, [fp, #784] @ 0x310 │ │ strbteq r4, [r1], #-2440 @ 0xfffff678 │ │ ldc2l 6, cr15, [fp, #944] @ 0x3b0 │ │ strbteq r3, [r2], #-2532 @ 0xfffff61c │ │ ldc2l 6, cr15, [fp, #640] @ 0x280 │ │ strbteq r8, [r2], #-2396 @ 0xfffff6a4 │ │ strbteq r3, [r2], #-2432 @ 0xfffff680 │ │ ldc2l 6, cr15, [fp, #272] @ 0x110 │ │ strbteq r3, [r2], #-2376 @ 0xfffff6b8 │ │ ldc2l 6, cr15, [fp, #48] @ 0x30 │ │ - ldc2l 15, cr5, [sl, #156] @ 0x9c │ │ + ldc2l 15, cr5, [sl, #336] @ 0x150 │ │ strbteq r8, [r2], #-2220 @ 0xfffff754 │ │ strbteq r3, [r2], #-2688 @ 0xfffff580 │ │ strbteq r9, [r1], #-2824 @ 0xfffff4f8 │ │ streq fp, [r4], #1604 @ 0x644 │ │ strbteq r8, [r2], #-2068 @ 0xfffff7ec │ │ - ldc2l 8, cr9, [fp, #592] @ 0x250 │ │ + vcadd.f32 , , , #270 │ │ strbteq r4, [r1], #-2728 @ 0xfffff558 │ │ - ldc2l 15, cr3, [sl, #604] @ 0x25c │ │ + ldc2l 15, cr3, [sl, #784] @ 0x310 │ │ ldr r0, [pc, #3964] @ 2492948 │ │ ldr r0, [pc, r0] │ │ ldr r1, [sp, #12] │ │ cmp r1, r0 │ │ beq 2491c10 │ │ sub r1, r0, #1 │ │ cmp r1, #100 @ 0x64 │ │ @@ -1387048,22 +1387047,22 @@ │ │ mov r1, sl │ │ ldr r2, [pc, #4008] @ 2492c30 │ │ movw r3, #1144 @ 0x478 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ b 2491934 │ │ - ldc2l 9, cr12, [r9, #490] @ 0x1ea @ │ │ + ldc2l 10, cr12, [r9, #136] @ 0x88 @ │ │ ldrbteq sp, [pc], #-896 @ 2491ca4 │ │ eoreq r8, ip, ip, lsl #18 │ │ - vcadd.f32 d28, d10, d3, #270 │ │ + ldc2l 8, cr12, [sl, #192] @ 0xc0 │ │ strbteq r8, [r2], #-1836 @ 0xfffff8d4 │ │ strhteq r8, [ip], -ip │ │ strbteq r8, [r2], #-1780 @ 0xfffff90c │ │ - ldc2l 1, cr2, [r8, #596] @ 0x254 │ │ + ldc2l 1, cr2, [r8, #776] @ 0x308 │ │ ldr r1, [pc, #3956] @ 2492c34 │ │ add r1, pc, r1 │ │ str r8, [r1, r0, lsl #2] │ │ mov r0, r6 │ │ mov r1, r6 │ │ mov r2, r5 │ │ bl 270e030 │ │ @@ -1387099,15 +1387098,15 @@ │ │ cmp r4, r0 │ │ mov r0, sl │ │ beq 2491cb8 │ │ b 2491cc4 │ │ strbteq r4, [r1], #-1648 @ 0xfffff990 │ │ streq fp, [r4], #1224 @ 0x4c8 │ │ strbteq r8, [r2], #-1704 @ 0xfffff958 │ │ - ldc2l 1, cr2, [r8, #292] @ 0x124 │ │ + ldc2l 1, cr2, [r8, #472] @ 0x1d8 │ │ strbteq r4, [r1], #-1576 @ 0xfffff9d8 │ │ ldr r0, [pc, #3980] @ 2492d00 │ │ mov r1, sl │ │ ldr r2, [pc, #3976] @ 2492d04 │ │ movw r3, #1124 @ 0x464 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1387154,15 +1387153,15 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #3836] @ 2492d30 │ │ add r0, pc, r0 │ │ b 2492ad8 │ │ eoreq r8, ip, r4, lsr r7 │ │ strbteq r9, [r1], #-1696 @ 0xfffff960 │ │ - ldc2l 0, cr2, [r8, #260] @ 0x104 │ │ + ldc2l 0, cr2, [r8, #440] @ 0x1b8 │ │ ldr r1, [pc, #3816] @ 2492d34 │ │ mov r0, r4 │ │ ldr r2, [pc, #3812] @ 2492d38 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270de00 │ │ ldr r1, [pc, #3800] @ 2492d3c │ │ @@ -1387185,19 +1387184,19 @@ │ │ ldr r7, [pc, #3748] @ 2492d4c │ │ movw sl, #5000 @ 0x1388 │ │ add r7, pc, r7 │ │ b 2491ef0 │ │ strbteq r4, [r1], #-1312 @ 0xfffffae0 │ │ streq fp, [r4], #872 @ 0x368 │ │ strbteq r4, [r1], #-1220 @ 0xfffffb3c │ │ - ldc2l 8, cr3, [fp, #604] @ 0x25c │ │ - ldc2l 12, cr7, [r8, #8] │ │ - ldc2l 11, cr1, [fp, #308] @ 0x134 @ │ │ + vcadd.f32 , , q2, #270 │ │ + ldc2l 12, cr7, [r8, #188] @ 0xbc │ │ + ldc2l 11, cr1, [fp, #488] @ 0x1e8 @ │ │ strbteq r4, [r1], #-1560 @ 0xfffff9e8 │ │ - ldc2l 11, cr1, [fp, #68] @ 0x44 @ │ │ + ldc2l 11, cr1, [fp, #248] @ 0xf8 @ │ │ strbteq r4, [r1], #-1504 @ 0xfffffa20 │ │ strbteq r4, [r1], #-1076 @ 0xfffffbcc │ │ ldc2l 1, cr15, [fp, #608] @ 0x260 │ │ add r4, r4, #1 │ │ str r7, [r6, r5, lsl #2] │ │ mov r7, r6 │ │ cmp r8, r4 │ │ @@ -1387266,28 +1387265,28 @@ │ │ ldr r0, [pc, #3900] @ 2492f28 │ │ add r1, pc, r1 │ │ add r0, pc, r0 │ │ str r2, [r1] │ │ b 2492ad8 │ │ strbteq r3, [r2], #-1144 @ 0xfffffb88 │ │ strbteq r4, [r1], #-956 @ 0xfffffc44 │ │ - ldc2l 1, cr4, [r8, #648] @ 0x288 │ │ + ldc2l 1, cr4, [r8, #828] @ 0x33c │ │ ldr r0, [pc, #3436] @ 2492d78 │ │ ldr r0, [pc, r0] │ │ cmp r0, #1 │ │ blt 249255c │ │ ldr r8, [pc, #3424] @ 2492d7c │ │ sub r7, fp, #48 @ 0x30 │ │ ldr r4, [pc, #3420] @ 2492d80 │ │ mov r1, #1 │ │ add r8, pc, r8 │ │ movw r5, #10000 @ 0x2710 │ │ add r4, pc, r4 │ │ b 249207c │ │ - ldc2l 1, cr4, [r8, #440] @ 0x1b8 │ │ + ldc2l 1, cr4, [r8, #620] @ 0x26c │ │ strbteq r4, [r1], #-856 @ 0xfffffca8 │ │ ldc2l 4, cr13, [fp, #768] @ 0x300 │ │ strbteq r9, [r1], #-1544 @ 0xfffff9f8 │ │ ldc2l 4, cr13, [fp, #528] @ 0x210 │ │ strbteq r9, [r1], #-1488 @ 0xfffffa30 │ │ strbteq r4, [r1], #-740 @ 0xfffffd1c │ │ ldr r1, [pc, #3428] @ 2492dbc │ │ @@ -1387326,17 +1387325,17 @@ │ │ mov r1, sl │ │ ldr r2, [pc, #3288] @ 2492db8 │ │ movw r3, #773 @ 0x305 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ b 2492050 │ │ - ldc2l 13, cr1, [r8, #932] @ 0x3a4 │ │ + ldc2l 14, cr1, [r8, #88] @ 0x58 │ │ strbteq r4, [r1], #-708 @ 0xfffffd3c │ │ - ldc2l 13, cr1, [r8, #708] @ 0x2c4 │ │ + ldc2l 13, cr1, [r8, #888] @ 0x378 │ │ strbteq r4, [r1], #-656 @ 0xfffffd70 │ │ strbteq r4, [r1], #-628 @ 0xfffffd8c │ │ strbteq r8, [r2], #-720 @ 0xfffffd30 │ │ strbteq r8, [r2], #-700 @ 0xfffffd44 │ │ strbteq r4, [r1], #-588 @ 0xfffffdb4 │ │ ldr r1, [pc, #3224] @ 2492db0 │ │ add r1, pc, r1 │ │ @@ -1387397,45 +1387396,45 @@ │ │ ldr r2, [pc, #2996] @ 2492dac │ │ mov r3, #756 @ 0x2f4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ b 2492110 │ │ streq lr, [r5], #2280 @ 0x8e8 │ │ - ldc2l 12, cr9, [sl, #1016] @ 0x3f8 │ │ - ldc2l 7, cr1, [fp, #468] @ 0x1d4 │ │ + ldc2l 13, cr9, [sl, #172] @ 0xac │ │ + ldc2l 7, cr1, [fp, #648] @ 0x288 │ │ strbteq r8, [r2], #-464 @ 0xfffffe30 │ │ - ldc2l 5, cr3, [fp, #284] @ 0x11c │ │ - ldc2l 12, cr1, [r8, #404] @ 0x194 │ │ - vcadd.f32 d23, d24, d2, #270 │ │ + ldc2l 5, cr3, [fp, #464] @ 0x1d0 │ │ + ldc2l 12, cr1, [r8, #584] @ 0x248 │ │ + vcadd.f32 d23, d24, d31, #270 │ │ strbteq r4, [r1], #-312 @ 0xfffffec8 │ │ streq sl, [r4], #3976 @ 0xf88 │ │ strbteq r8, [r2], #-336 @ 0xfffffeb0 │ │ ldc2l 14, cr14, [fp, #320] @ 0x140 │ │ strbteq r3, [r2], #-364 @ 0xfffffe94 │ │ strbteq r4, [r1], #-172 @ 0xffffff54 │ │ strbteq r9, [r1], #-1296 @ 0xfffffaf0 │ │ - ldc2l 7, cr5, [sl, #348] @ 0x15c │ │ + ldc2l 7, cr5, [sl, #528] @ 0x210 │ │ strbteq r8, [r2], #-220 @ 0xffffff24 │ │ strbteq r3, [r2], #-688 @ 0xfffffd50 │ │ - ldc2l 14, cr3, [r8, #328] @ 0x148 │ │ + ldc2l 14, cr3, [r8, #508] @ 0x1fc │ │ strbteq r4, [r1], #-56 @ 0xffffffc8 │ │ - ldc2l 6, cr5, [sl, #940] @ 0x3ac │ │ + ldc2l 7, cr5, [sl, #96] @ 0x60 │ │ strbteq r3, [r2], #-588 @ 0xfffffdb4 │ │ strbteq r8, [r2], #-100 @ 0xffffff9c │ │ ldc2l 1, cr13, [fp, #416] @ 0x1a0 │ │ strbteq r9, [r1], #-684 @ 0xfffffd54 │ │ - ldc2l 5, cr1, [fp, #668] @ 0x29c │ │ + ldc2l 5, cr1, [fp, #848] @ 0x350 │ │ streq lr, [r5], #1748 @ 0x6d4 │ │ - ldc2l 0, cr9, [fp, #584] @ 0x248 │ │ + ldc2l 0, cr9, [fp, #764] @ 0x2fc │ │ ldc2l 0, cr13, [fp, #848] @ 0x350 │ │ strbteq r9, [r1], #-548 @ 0xfffffddc │ │ strbteq r7, [r2], #-3996 @ 0xfffff064 │ │ strbteq r2, [r2], #-4048 @ 0xfffff030 │ │ - ldc2l 2, cr3, [fp, #924] @ 0x39c │ │ + ldc2l 3, cr3, [fp, #80] @ 0x50 │ │ strbteq r3, [r1], #-3852 @ 0xfffff0f4 │ │ ldr r0, [pc, #2860] @ 2492dc0 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, #100 @ 0x64 │ │ bcc 24922bc │ │ ldr r0, [pc, #2844] @ 2492dc4 │ │ @@ -1387606,17 +1387605,17 @@ │ │ mov r1, #22 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #2348] @ 2492e74 │ │ add r0, pc, r0 │ │ b 2492ad8 │ │ strbteq r7, [r2], #-3780 @ 0xfffff13c │ │ - ldc2l 15, cr8, [fp, #272] @ 0x110 │ │ + ldc2l 15, cr8, [fp, #452] @ 0x1c4 │ │ strbteq r4, [r1], #-344 @ 0xfffffea8 │ │ - ldc2l 6, cr3, [sl, #284] @ 0x11c │ │ + ldc2l 6, cr3, [sl, #464] @ 0x1d0 │ │ ldr r4, [pc, #2292] @ 2492e58 │ │ ldr r4, [pc, r4] │ │ bl 270dda0 │ │ sub r0, r0, #1 │ │ cmp r4, r0 │ │ bge 24925d0 │ │ ldr r8, [pc, #2272] @ 2492e5c │ │ @@ -1387637,15 +1387636,15 @@ │ │ movw r0, #4999 @ 0x1387 │ │ cmp r4, r0 │ │ bhi 249281c │ │ ldr r0, [pc, #2352] @ 2492ef4 │ │ add r0, pc, r0 │ │ str r6, [r0, r4, lsl #2] │ │ b 2492884 │ │ - ldc2l 0, cr12, [r9, #660] @ 0x294 │ │ + ldc2l 0, cr12, [r9, #840] @ 0x348 │ │ ldr r0, [pc, #2208] @ 2492e78 │ │ ldr r0, [pc, r0] │ │ cmp r0, #1 │ │ blt 24928a4 │ │ ldr r9, [pc, #2196] @ 2492e7c │ │ rsb r5, r0, #0 │ │ ldr r6, [pc, #2192] @ 2492e80 │ │ @@ -1387654,28 +1387653,28 @@ │ │ add r9, pc, r9 │ │ add r6, pc, r6 │ │ str r5, [sp, #12] │ │ add r7, pc, r7 │ │ b 2492748 │ │ ldrbteq ip, [pc], #-2608 @ 2492610 │ │ strhteq r7, [ip], -ip │ │ - ldc2l 14, cr11, [sl, #716] @ 0x2cc │ │ + ldc2l 14, cr11, [sl, #896] @ 0x380 │ │ strbteq r7, [r2], #-3548 @ 0xfffff224 │ │ eoreq r7, ip, ip, ror #30 │ │ strbteq r7, [r2], #-3492 @ 0xfffff25c │ │ - vcadd.f32 , q4, , #270 │ │ + ldc2l 8, cr1, [r8, #456] @ 0x1c8 │ │ strbteq r3, [r1], #-3364 @ 0xfffff2dc │ │ strbteq r7, [r2], #-3428 @ 0xfffff29c │ │ - vcadd.f32 d17, d8, d5, #270 │ │ + ldc2l 8, cr1, [r8, #200] @ 0xc8 │ │ strbteq r3, [r1], #-3296 @ 0xfffff320 │ │ streq sl, [r4], #2880 @ 0xb40 │ │ - ldc2l 13, cr9, [r8, #652] @ 0x28c │ │ + ldc2l 13, cr9, [r8, #832] @ 0x340 │ │ streq lr, [r5], #932 @ 0x3a4 │ │ streq lr, [r5], #916 @ 0x394 │ │ - ldc2l 7, cr9, [sl, #696] @ 0x2b8 │ │ + ldc2l 7, cr9, [sl, #876] @ 0x36c │ │ ldr r2, [pc, #2116] @ 2492e94 │ │ mov r0, r7 │ │ mov r1, sl │ │ movw r3, #842 @ 0x34a │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [pc, #2096] @ 2492e98 │ │ @@ -1387755,15 +1387754,15 @@ │ │ cmp r0, #0 │ │ bgt 249271c │ │ mov r4, #0 │ │ str r4, [r9] │ │ ldr r7, [pc, #1776] @ 2492e90 │ │ add r7, pc, r7 │ │ b 24927fc │ │ - ldc2l 9, cr11, [r8, #90] @ 0x5a @ │ │ + ldc2l 9, cr11, [r8, #180] @ 0xb4 @ │ │ ldc2l 9, cr14, [fp, #200] @ 0xc8 @ │ │ strbteq r2, [r2], #-3200 @ 0xfffff380 │ │ strbteq r7, [r2], #-3108 @ 0xfffff3dc │ │ mov r0, r7 │ │ mov r1, sl │ │ mov r2, r5 │ │ movw r3, #877 @ 0x36d │ │ @@ -1387782,17 +1387781,17 @@ │ │ ldr r5, [sp, #12] │ │ mov sl, r0 │ │ ldr r0, [pc, #1736] @ 2492ecc │ │ add r0, pc, r0 │ │ str r4, [r0, sl, lsl #2] │ │ b 2492730 │ │ strbteq r7, [r2], #-3068 @ 0xfffff404 │ │ - ldc2l 6, cr1, [r8, #628] @ 0x274 │ │ - ldc2l 1, cr1, [fp, #260] @ 0x104 │ │ - ldc2l 3, cr3, [sl, #632] @ 0x278 │ │ + ldc2l 6, cr1, [r8, #808] @ 0x328 │ │ + ldc2l 1, cr1, [fp, #440] @ 0x1b8 │ │ + ldc2l 3, cr3, [sl, #812] @ 0x32c │ │ ldr r0, [pc, #1748] @ 2492ef8 │ │ mov r1, r4 │ │ ldr r2, [pc, #1744] @ 2492efc │ │ mov r3, #904 @ 0x388 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1387817,15 +1387816,15 @@ │ │ mov r4, r0 │ │ ldr r1, [pc, #1672] @ 2492f14 │ │ ldr r0, [pc, #1672] @ 2492f18 │ │ add r1, pc, r1 │ │ add r0, pc, r0 │ │ str r5, [r1, r4, lsl #2] │ │ b 2492ad8 │ │ - ldc2l 6, cr13, [sl, #792] @ 0x318 │ │ + ldc2l 6, cr13, [sl, #972] @ 0x3cc │ │ strbteq r7, [r2], #-2908 @ 0xfffff4a4 │ │ ldr r4, [pc, #1572] @ 2492ed0 │ │ ldr r4, [pc, r4] │ │ cmp r4, #1 │ │ blt 2492934 │ │ ldr r5, [pc, #1564] @ 2492ed8 │ │ mov r1, #0 │ │ @@ -1387834,15 +1387833,15 @@ │ │ ldr r9, [pc, #1556] @ 2492ee0 │ │ add r5, pc, r5 │ │ ldr sl, [pc, #1552] @ 2492ee4 │ │ add r8, pc, r8 │ │ add r9, pc, r9 │ │ add sl, pc, sl │ │ b 2492900 │ │ - ldc2l 5, cr1, [r8, #1012] @ 0x3f4 │ │ + ldc2l 6, cr1, [r8, #168] @ 0xa8 │ │ strbteq r3, [r1], #-2764 @ 0xfffff534 │ │ streq sl, [r4], #2336 @ 0x920 │ │ strbteq r8, [r1], #-3860 @ 0xfffff0ec │ │ str r6, [r5, r1, lsl #2] │ │ cmp r4, r6 │ │ mov r1, r6 │ │ beq 249257c │ │ @@ -1387861,30 +1387860,30 @@ │ │ strbteq r3, [r1], #-2716 @ 0xfffff564 │ │ ldr r3, [pc, #1432] @ 2492ed4 │ │ add r3, pc, r3 │ │ mov r8, r3 │ │ b 249258c │ │ strbteq r3, [r1], #-2672 @ 0xfffff590 │ │ strbteq r3, [r1], #-2556 @ 0xfffff604 │ │ - ldc2l 0, cr1, [fp, #596] @ 0x254 │ │ - ldc2l 2, cr10, [r9, #76] @ 0x4c │ │ + ldc2l 0, cr1, [fp, #776] @ 0x308 │ │ + ldc2l 2, cr10, [r9, #256] @ 0x100 │ │ strbteq r3, [r1], #-2908 @ 0xfffff4a4 │ │ - ldc2l 0, cr1, [fp, #372] @ 0x174 │ │ - ldc2l 1, cr10, [r9, #876] @ 0x36c │ │ + ldc2l 0, cr1, [fp, #552] @ 0x228 │ │ + ldc2l 2, cr10, [r9, #32] │ │ strbteq r3, [r1], #-2860 @ 0xfffff4d4 │ │ strbteq r3, [r1], #-2432 @ 0xfffff680 │ │ ldc2l 6, cr14, [fp, #912] @ 0x390 │ │ - ldc2l 1, cr10, [r9, #652] @ 0x28c │ │ + ldc2l 1, cr10, [r9, #832] @ 0x340 │ │ strbteq r2, [r2], #-2556 @ 0xfffff604 │ │ ldc2l 6, cr14, [fp, #688] @ 0x2b0 │ │ - ldc2l 1, cr10, [r9, #428] @ 0x1ac │ │ + ldc2l 1, cr10, [r9, #608] @ 0x260 │ │ strbteq r2, [r2], #-2508 @ 0xfffff634 │ │ strbteq r3, [r1], #-2320 @ 0xfffff6f0 │ │ - ldc2l 6, cr3, [r8, #984] @ 0x3d8 │ │ - ldc2l 1, cr10, [r9, #204] @ 0xcc │ │ + ldc2l 7, cr3, [r8, #140] @ 0x8c │ │ + ldc2l 1, cr10, [r9, #384] @ 0x180 │ │ strbteq r8, [r1], #-2604 @ 0xfffff5d4 │ │ mvn r0, #7 │ │ add r3, r0, r1, lsl #3 │ │ movw r0, #14464 @ 0x3880 │ │ movt r0, #1 │ │ cmp r3, r0 │ │ bcc 24929c8 │ │ @@ -1387965,30 +1387964,30 @@ │ │ str r1, [r2] │ │ add r0, pc, r0 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 6, cr3, [r8, #760] @ 0x2f8 │ │ - ldc2l 0, cr10, [r9, #1004] @ 0x3ec │ │ + ldc2l 6, cr3, [r8, #940] @ 0x3ac │ │ + ldc2l 1, cr10, [r9, #160] @ 0xa0 │ │ strbteq r8, [r1], #-2556 @ 0xfffff604 │ │ strbteq r3, [r1], #-2208 @ 0xfffff760 │ │ ldc2l 10, cr12, [fp, #32] @ │ │ - ldc2l 0, cr10, [r9, #780] @ 0x30c │ │ + ldc2l 0, cr10, [r9, #960] @ 0x3c0 │ │ strbteq r8, [r1], #-2892 @ 0xfffff4b4 │ │ ldc2l 9, cr12, [fp, #416] @ 0x1a0 @ │ │ - ldc2l 0, cr10, [r9, #556] @ 0x22c │ │ + ldc2l 0, cr10, [r9, #736] @ 0x2e0 │ │ strbteq r8, [r1], #-2844 @ 0xfffff4e4 │ │ strbteq r3, [r1], #-2096 @ 0xfffff7d0 │ │ - ldc2l 3, cr1, [r8, #212] @ 0xd4 │ │ - ldc2l 0, cr10, [r9, #332] @ 0x14c │ │ + ldc2l 3, cr1, [r8, #392] @ 0x188 │ │ + ldc2l 0, cr10, [r9, #512] @ 0x200 │ │ strbteq r3, [r1], #-2060 @ 0xfffff7f4 │ │ - ldc2l 3, cr1, [r8, #4] │ │ - ldc2l 0, cr10, [r9, #124] @ 0x7c │ │ + ldc2l 3, cr1, [r8, #184] @ 0xb8 │ │ + ldc2l 0, cr10, [r9, #304] @ 0x130 │ │ mov r7, sl │ │ cmp r1, #100 @ 0x64 │ │ bcc 2492b54 │ │ ldr r0, [pc, #1068] @ 2492f6c │ │ movw r3, #2312 @ 0x908 │ │ ldr r2, [pc, #1064] @ 2492f70 │ │ add r0, pc, r0 │ │ @@ -1388042,19 +1388041,19 @@ │ │ ldr r4, [pc, #880] @ 2492f7c │ │ sub r5, fp, #40 @ 0x28 │ │ ldr sl, [pc, #876] @ 2492f80 │ │ movw r8, #5000 @ 0x1388 │ │ add r4, pc, r4 │ │ add sl, pc, sl │ │ b 2492c44 │ │ - ldc2l 2, cr1, [r8, #628] @ 0x274 │ │ - ldc2l 15, cr9, [r9, #748] @ 0x2ec │ │ + ldc2l 2, cr1, [r8, #808] @ 0x328 │ │ + ldc2l 15, cr9, [r9, #928] @ 0x3a0 │ │ strbteq r3, [r1], #-1916 @ 0xfffff884 │ │ - ldc2l 2, cr1, [r8, #372] @ 0x174 │ │ - ldc2l 15, cr9, [r9, #492] @ 0x1ec │ │ + ldc2l 2, cr1, [r8, #552] @ 0x228 │ │ + ldc2l 15, cr9, [r9, #672] @ 0x2a0 │ │ strbteq r3, [r1], #-1816 @ 0xfffff8e8 │ │ cmp r6, #0 │ │ str r6, [fp, #-40] @ 0xffffffd8 │ │ ble 2492b88 │ │ mov r0, r5 │ │ mov r1, r4 │ │ bl 270e040 │ │ @@ -1388095,191 +1388094,191 @@ │ │ ldr r1, [fp, #-40] @ 0xffffffd8 │ │ cmp r1, r0 │ │ ldreq r0, [pc, #684] @ 2492f94 │ │ moveq r1, #0 │ │ addeq r0, pc, r0 │ │ streq r1, [r0] │ │ b 2492c38 │ │ - ldc2l 14, cr2, [sl, #988] @ 0x3dc │ │ - ldc2l 14, cr9, [r9, #972] @ 0x3cc │ │ + ldc2l 15, cr2, [sl, #144] @ 0x90 │ │ + ldc2l 15, cr9, [r9, #128] @ 0x80 │ │ strbteq r3, [r1], #-1684 @ 0xfffff96c │ │ - ldc2l 1, cr1, [r8, #420] @ 0x1a4 │ │ - ldc2l 14, cr9, [r9, #540] @ 0x21c │ │ + ldc2l 1, cr1, [r8, #600] @ 0x258 │ │ + ldc2l 14, cr9, [r9, #720] @ 0x2d0 │ │ strbteq r3, [r1], #-1608 @ 0xfffff9b8 │ │ - ldc2l 1, cr1, [r8, #228] @ 0xe4 │ │ - ldc2l 14, cr9, [r9, #348] @ 0x15c │ │ - ldc2l 1, cr5, [fp, #700] @ 0x2bc │ │ - ldc2l 1, cr5, [fp, #656] @ 0x290 │ │ - ldc2l 6, cr11, [sl, #764] @ 0x2fc │ │ - ldc2l 14, cr5, [r8, #884] @ 0x374 │ │ - ldc2l 6, cr11, [sl, #616] @ 0x268 │ │ - ldc2l 5, cr13, [sl, #668] @ 0x29c │ │ + ldc2l 1, cr1, [r8, #408] @ 0x198 │ │ + ldc2l 14, cr9, [r9, #528] @ 0x210 │ │ + ldc2l 1, cr5, [fp, #880] @ 0x370 │ │ + ldc2l 1, cr5, [fp, #836] @ 0x344 │ │ + ldc2l 6, cr11, [sl, #944] @ 0x3b0 │ │ + ldc2l 15, cr5, [r8, #40] @ 0x28 │ │ + ldc2l 6, cr11, [sl, #796] @ 0x31c │ │ + ldc2l 5, cr13, [sl, #848] @ 0x350 │ │ ldc2l 9, cr12, [fp, #410] @ 0x19a @ │ │ - ldc2l 1, cr5, [fp, #288] @ 0x120 │ │ + ldc2l 1, cr5, [fp, #468] @ 0x1d4 │ │ strbteq r3, [r1], #-1392 @ 0xfffffa90 │ │ strbteq r3, [r1], #-2208 @ 0xfffff760 │ │ strbteq r7, [r2], #-1480 @ 0xfffffa38 │ │ strbteq r3, [r1], #-1344 @ 0xfffffac0 │ │ strbteq r3, [r1], #-1340 @ 0xfffffac4 │ │ strbteq r7, [r2], #-1432 @ 0xfffffa68 │ │ strbteq r2, [r2], #-1884 @ 0xfffff8a4 │ │ - ldc2l 5, cr8, [fp, #768] @ 0x300 │ │ - ldc2l 12, cr9, [r9, #988] @ 0x3dc │ │ + ldc2l 5, cr8, [fp, #948] @ 0x3b4 │ │ + ldc2l 13, cr9, [r9, #144] @ 0x90 │ │ strbteq r3, [r1], #-2000 @ 0xfffff830 │ │ - ldc2l 5, cr8, [fp, #544] @ 0x220 │ │ - ldc2l 12, cr9, [r9, #764] @ 0x2fc │ │ + ldc2l 5, cr8, [fp, #724] @ 0x2d4 │ │ + ldc2l 12, cr9, [r9, #944] @ 0x3b0 │ │ strbteq r3, [r1], #-1948 @ 0xfffff864 │ │ - ldc2l 11, cr4, [sl, #108] @ 0x6c @ │ │ - ldc2l 12, cr9, [r9, #556] @ 0x22c │ │ - ldc2l 10, cr4, [sl, #956] @ 0x3bc @ │ │ - ldc2l 12, cr9, [r9, #380] @ 0x17c │ │ + ldc2l 11, cr4, [sl, #288] @ 0x120 @ │ │ + ldc2l 12, cr9, [r9, #736] @ 0x2e0 │ │ + ldc2l 11, cr4, [sl, #112] @ 0x70 @ │ │ + ldc2l 12, cr9, [r9, #560] @ 0x230 │ │ strbteq r3, [r1], #-956 @ 0xfffffc44 │ │ streq sl, [r4], #532 @ 0x214 │ │ strbteq r8, [r1], #-2056 @ 0xfffff7f8 │ │ - ldc2l 14, cr0, [r8, #276] @ 0x114 │ │ - ldc2l 11, cr9, [r9, #396] @ 0x18c @ │ │ + ldc2l 14, cr0, [r8, #456] @ 0x1c8 │ │ + ldc2l 11, cr9, [r9, #576] @ 0x240 @ │ │ strbteq r3, [r1], #-804 @ 0xfffffcdc │ │ - ldc2l 10, cr2, [sl, #716] @ 0x2cc @ │ │ - ldc2l 10, cr9, [r9, #700] @ 0x2bc @ │ │ + ldc2l 10, cr2, [sl, #896] @ 0x380 @ │ │ + ldc2l 10, cr9, [r9, #880] @ 0x370 @ │ │ strbteq r3, [r1], #-568 @ 0xfffffdc8 │ │ - ldc2l 13, cr0, [r8, #132] @ 0x84 │ │ - ldc2l 10, cr9, [r9, #252] @ 0xfc @ │ │ + ldc2l 13, cr0, [r8, #312] @ 0x138 │ │ + ldc2l 10, cr9, [r9, #432] @ 0x1b0 @ │ │ strbteq r3, [r1], #-508 @ 0xfffffe04 │ │ - ldc2l 12, cr0, [r8, #948] @ 0x3b4 │ │ - ldc2l 10, cr9, [r9, #44] @ 0x2c @ │ │ + ldc2l 13, cr0, [r8, #104] @ 0x68 │ │ + ldc2l 10, cr9, [r9, #224] @ 0xe0 @ │ │ strbteq r3, [r1], #-704 @ 0xfffffd40 │ │ - ldc2l 14, cr0, [r8, #20] │ │ - ldc2l 11, cr9, [r9, #140] @ 0x8c @ │ │ + ldc2l 14, cr0, [r8, #200] @ 0xc8 │ │ + ldc2l 11, cr9, [r9, #320] @ 0x140 @ │ │ strbteq r3, [r1], #-896 @ 0xfffffc80 │ │ strbteq r3, [r1], #-308 @ 0xfffffecc │ │ - ldc2l 7, cr0, [fp, #868] @ 0x364 │ │ - ldc2l 9, cr9, [r9, #174] @ 0xae @ │ │ + vcadd.f32 d16, d11, d6, #270 │ │ + ldc2l 9, cr9, [r9, #264] @ 0x108 @ │ │ strbteq r3, [r1], #-672 @ 0xfffffd60 │ │ - ldc2l 7, cr0, [fp, #644] @ 0x284 │ │ - ldc2l 9, cr9, [r9, #62] @ 0x3e @ │ │ + ldc2l 7, cr0, [fp, #824] @ 0x338 │ │ + ldc2l 9, cr9, [r9, #152] @ 0x98 @ │ │ strbteq r3, [r1], #-624 @ 0xfffffd90 │ │ strbteq r3, [r1], #-196 @ 0xffffff3c │ │ ldc2l 14, cr13, [fp, #160] @ 0xa0 │ │ - vcadd.f32 , , , #270 │ │ + ldc2l 9, cr9, [r9, #40] @ 0x28 @ │ │ strbteq r2, [r2], #-320 @ 0xfffffec0 │ │ ldc2l 13, cr13, [fp, #960] @ 0x3c0 │ │ - vcadd.f32 d25, d25, d31, #270 │ │ + ldc2l 8, cr9, [r9, #880] @ 0x370 │ │ strbteq r2, [r2], #-272 @ 0xfffffef0 │ │ strbteq r3, [r1], #-84 @ 0xffffffac │ │ - ldc2l 14, cr2, [r8, #232] @ 0xe8 │ │ - ldc2l 8, cr9, [r9, #476] @ 0x1dc │ │ + ldc2l 14, cr2, [r8, #412] @ 0x19c │ │ + vcadd.f32 d25, d25, d20, #270 │ │ strbteq r8, [r1], #-368 @ 0xfffffe90 │ │ - ldc2l 14, cr2, [r8, #8] │ │ - ldc2l 8, cr9, [r9, #252] @ 0xfc │ │ + ldc2l 14, cr2, [r8, #188] @ 0xbc │ │ + vcadd.f32 , , q14, #270 │ │ strbteq r8, [r1], #-320 @ 0xfffffec0 │ │ strbteq r2, [r1], #-4068 @ 0xfffff01c │ │ ldc2l 1, cr12, [fp, #304] @ 0x130 │ │ - vcadd.f32 d25, d9, d7, #270 │ │ + ldc2l 8, cr9, [r9, #208] @ 0xd0 │ │ strbteq r8, [r1], #-656 @ 0xfffffd70 │ │ ldc2l 1, cr12, [fp, #80] @ 0x50 │ │ - ldc2l 7, cr9, [r9, #828] @ 0x33c │ │ + ldc2l 7, cr9, [r9, #1008] @ 0x3f0 │ │ strbteq r8, [r1], #-608 @ 0xfffffda0 │ │ strbteq r2, [r1], #-3956 @ 0xfffff08c │ │ - ldc2l 10, cr0, [r8, #484] @ 0x1e4 @ │ │ - ldc2l 7, cr9, [r9, #604] @ 0x25c │ │ + ldc2l 10, cr0, [r8, #664] @ 0x298 @ │ │ + ldc2l 7, cr9, [r9, #784] @ 0x310 │ │ strbteq r2, [r1], #-3920 @ 0xfffff0b0 │ │ - ldc2l 10, cr0, [r8, #276] @ 0x114 @ │ │ - ldc2l 7, cr9, [r9, #396] @ 0x18c │ │ + ldc2l 10, cr0, [r8, #456] @ 0x1c8 @ │ │ + ldc2l 7, cr9, [r9, #576] @ 0x240 │ │ strbteq r2, [r1], #-3868 @ 0xfffff0e4 │ │ strbteq r2, [r1], #-3840 @ 0xfffff100 │ │ strbteq r2, [r1], #-3828 @ 0xfffff10c │ │ strbteq r3, [r1], #-852 @ 0xfffffcac │ │ strbteq r2, [r1], #-3688 @ 0xfffff198 │ │ strbteq r2, [r1], #-3664 @ 0xfffff1b0 │ │ strbteq r2, [r1], #-3788 @ 0xfffff134 │ │ vcadd.f32 q13, , q9, #270 │ │ - ldc2l 9, cr0, [r9, #314] @ 0x13a @ │ │ + ldc2l 9, cr0, [r9, #404] @ 0x194 @ │ │ eoreq r7, ip, r8, lsr #1 │ │ - ldc2l 7, cr5, [r8, #536] @ 0x218 │ │ - ldc2l 6, cr2, [fp, #464] @ 0x1d0 │ │ + ldc2l 7, cr5, [r8, #716] @ 0x2cc │ │ + ldc2l 6, cr2, [fp, #644] @ 0x284 │ │ strbteq r2, [r1], #-3568 @ 0xfffff210 │ │ strbteq r8, [r1], #-176 @ 0xffffff50 │ │ strbteq r7, [r1], #-3868 @ 0xfffff0e4 │ │ - ldc2l 11, cr2, [r8, #792] @ 0x318 @ │ │ + ldc2l 11, cr2, [r8, #972] @ 0x3cc @ │ │ strbteq r2, [r1], #-3168 @ 0xfffff3a0 │ │ strbteq r1, [r2], #-3744 @ 0xfffff160 │ │ - ldc2l 10, cr2, [r8, #168] @ 0xa8 @ │ │ - ldc2l 5, cr9, [r9, #700] @ 0x2bc │ │ + ldc2l 10, cr2, [r8, #348] @ 0x15c @ │ │ + ldc2l 5, cr9, [r9, #880] @ 0x370 │ │ strbteq r7, [r1], #-3760 @ 0xfffff150 │ │ strbteq r2, [r1], #-3404 @ 0xfffff2b4 │ │ strbteq r1, [r2], #-3980 @ 0xfffff074 │ │ strbteq r8, [r1], #-8 │ │ - ldc2l 5, cr9, [r9, #444] @ 0x1bc │ │ + ldc2l 5, cr9, [r9, #624] @ 0x270 │ │ strbteq r7, [r1], #-3684 @ 0xfffff19c │ │ ldc2l 14, cr11, [fp, #496] @ 0x1f0 │ │ strbteq r2, [r1], #-3292 @ 0xfffff324 │ │ strbteq r1, [r2], #-3868 @ 0xfffff0e4 │ │ - ldc2l 10, cr2, [r8, #648] @ 0x288 @ │ │ + ldc2l 10, cr2, [r8, #828] @ 0x33c @ │ │ strbteq r7, [r1], #-3964 @ 0xfffff084 │ │ strbteq r7, [r1], #-3788 @ 0xfffff134 │ │ - ldc2l 9, cr2, [r8, #444] @ 0x1bc @ │ │ + ldc2l 10, cr2, [r8, #44] @ 0x2c @ │ │ strbteq r7, [r1], #-3348 @ 0xfffff2ec │ │ strbteq r2, [r1], #-2840 @ 0xfffff4e8 │ │ strbteq r2, [r1], #-2696 @ 0xfffff578 │ │ strbteq r1, [r2], #-3388 @ 0xfffff2c4 │ │ strbteq r2, [r1], #-2800 @ 0xfffff510 │ │ - ldc2l 1, cr4, [sl, #764] @ 0x2fc │ │ - ldc2l 3, cr9, [r9, #188] @ 0xbc │ │ + ldc2l 1, cr4, [sl, #944] @ 0x3b0 │ │ + ldc2l 3, cr9, [r9, #368] @ 0x170 │ │ strbteq r2, [r1], #-3644 @ 0xfffff1c4 │ │ strbteq r2, [r1], #-3640 @ 0xfffff1c8 │ │ strbteq r2, [r1], #-3632 @ 0xfffff1d0 │ │ strbteq r3, [r1], #-308 @ 0xfffffecc │ │ - ldc2l 12, cr7, [fp, #640] @ 0x280 │ │ - ldc2l 3, cr9, [r9, #860] @ 0x35c │ │ + ldc2l 12, cr7, [fp, #820] @ 0x334 │ │ + ldc2l 4, cr9, [r9, #16] │ │ strbteq r2, [r1], #-3768 @ 0xfffff148 │ │ strbteq r2, [r1], #-2936 @ 0xfffff488 │ │ strbteq r2, [r1], #-2924 @ 0xfffff494 │ │ - ldc2l 2, cr4, [sl, #124] @ 0x7c │ │ - ldc2l 3, cr9, [r9, #572] @ 0x23c │ │ + ldc2l 2, cr4, [sl, #304] @ 0x130 │ │ + ldc2l 3, cr9, [r9, #752] @ 0x2f0 │ │ strbteq r1, [r2], #-3448 @ 0xfffff288 │ │ - ldc2l 3, cr2, [fp, #160] @ 0xa0 │ │ + ldc2l 3, cr2, [fp, #340] @ 0x154 │ │ ldrdeq r7, [ip], -r4 @ │ │ - ldc2l 4, cr7, [r9, #492] @ 0x1ec │ │ + ldc2l 4, cr7, [r9, #672] @ 0x2a0 │ │ strbteq r3, [r1], #-1000 @ 0xfffffc18 │ │ - ldc2l 4, cr11, [sl, #712] @ 0x2c8 │ │ - ldc2l 6, cr4, [fp, #320] @ 0x140 │ │ - ldc2l 12, cr10, [r9, #916] @ 0x394 │ │ - ldc2l 2, cr9, [r9, #300] @ 0x12c │ │ + ldc2l 4, cr11, [sl, #892] @ 0x37c │ │ + ldc2l 6, cr4, [fp, #500] @ 0x1f4 │ │ + ldc2l 13, cr10, [r9, #72] @ 0x48 │ │ + ldc2l 2, cr9, [r9, #480] @ 0x1e0 │ │ eoreq r6, ip, r0, lsl #24 │ │ ldrbteq fp, [pc], #-1632 @ 2492f44 │ │ - ldc2l 10, cr10, [sl, #924] @ 0x39c @ │ │ - ldc2l 1, cr9, [r9, #940] @ 0x3ac │ │ + ldc2l 11, cr10, [sl, #80] @ 0x50 @ │ │ + ldc2l 2, cr9, [r9, #96] @ 0x60 │ │ eoreq r6, ip, r4, lsr #23 │ │ strbteq r6, [r2], #-2560 @ 0xfffff600 │ │ - ldc2l 1, cr2, [sl, #668] @ 0x29c │ │ - ldc2l 1, cr9, [r9, #652] @ 0x28c │ │ - ldc2l 13, cr1, [fp, #56] @ 0x38 │ │ - ldc2l 1, cr9, [r9, #364] @ 0x16c │ │ + ldc2l 1, cr2, [sl, #848] @ 0x350 │ │ + ldc2l 1, cr9, [r9, #832] @ 0x340 │ │ + ldc2l 13, cr1, [fp, #236] @ 0xec │ │ + ldc2l 1, cr9, [r9, #544] @ 0x220 │ │ streq r9, [r4], #1912 @ 0x778 │ │ strbteq r2, [r1], #-2316 @ 0xfffff6f4 │ │ - ldc2l 4, cr4, [fp, #656] @ 0x290 │ │ - ldc2l 3, cr0, [r8, #644] @ 0x284 │ │ - ldc2l 0, cr9, [r9, #764] @ 0x2fc │ │ + ldc2l 4, cr4, [fp, #836] @ 0x344 │ │ + ldc2l 3, cr0, [r8, #824] @ 0x338 │ │ + ldc2l 0, cr9, [r9, #944] @ 0x3b0 │ │ strbteq r2, [r1], #-2172 @ 0xfffff784 │ │ streq r9, [r4], #1740 @ 0x6cc │ │ streq r9, [r4], #1572 @ 0x624 │ │ - ldc2l 15, cr8, [r9, #956] @ 0x3bc │ │ - ldc2l 15, cr1, [sl, #588] @ 0x24c │ │ + ldc2l 0, cr9, [r9, #112] @ 0x70 │ │ + ldc2l 15, cr1, [sl, #768] @ 0x300 │ │ strbteq r6, [r2], #-1960 @ 0xfffff858 │ │ - vcadd.f32 d23, d11, d24, #270 │ │ + ldc2l 8, cr7, [fp, #340] @ 0x154 │ │ strbteq r2, [r1], #-2624 @ 0xfffff5c0 │ │ strbteq r2, [r1], #-1756 @ 0xfffff924 │ │ eoreq r6, ip, ip, lsl #20 │ │ - ldc2l 9, cr7, [fp, #108] @ 0x6c @ │ │ - ldc2l 13, cr6, [r9, #660] @ 0x294 │ │ + ldc2l 9, cr7, [fp, #198] @ 0xc6 @ │ │ + ldc2l 13, cr6, [r9, #840] @ 0x348 │ │ streq ip, [r5], #3900 @ 0xf3c │ │ - ldc2l 2, cr0, [r9, #964] @ 0x3c4 │ │ + ldc2l 3, cr0, [r9, #120] @ 0x78 │ │ streq ip, [r5], #3860 @ 0xf14 │ │ - ldc2l 6, cr4, [sl, #780] @ 0x30c │ │ - ldc2l 3, cr4, [fp, #544] @ 0x220 │ │ + ldc2l 6, cr4, [sl, #960] @ 0x3c0 │ │ + ldc2l 3, cr4, [fp, #724] @ 0x2d4 │ │ │ │ 02492fb8 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ beq 2492fd4 │ │ @@ -1388295,16 +1388294,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 1, cr2, [sl, #808] @ 0x328 │ │ - ldc2l 2, cr4, [sl, #648] @ 0x288 │ │ + ldc2l 1, cr2, [sl, #988] @ 0x3dc │ │ + ldc2l 2, cr4, [sl, #828] @ 0x33c │ │ │ │ 02493014 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #32 │ │ mov r3, r1 │ │ mov r1, r0 │ │ @@ -1388405,15 +1388404,15 @@ │ │ add r0, pc, r0 │ │ bl 270e9e0 │ │ mov r0, r6 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 8, cr6, [r9, #464] @ 0x1d0 │ │ + vcadd.f32 d22, d25, d17, #270 │ │ strbteq r6, [r2], #-688 @ 0xfffffd50 │ │ │ │ 024931a4 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r4, r2 │ │ @@ -1388452,17 +1388451,17 @@ │ │ ldr r0, [pc, #28] @ 2493258 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 13, cr3, [fp, #708] @ 0x2c4 │ │ + ldc2l 13, cr3, [fp, #888] @ 0x378 │ │ strdeq r6, [ip], -r4 @ │ │ - ldc2l 13, cr3, [fp, #276] @ 0x114 │ │ + ldc2l 13, cr3, [fp, #456] @ 0x1c8 │ │ │ │ 0249325c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r4, r2 │ │ mov r5, r1 │ │ @@ -1388500,17 +1388499,17 @@ │ │ ldr r0, [pc, #28] @ 2493310 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 6, cr8, [r8, #764] @ 0x2fc │ │ + ldc2l 6, cr8, [r8, #944] @ 0x3b0 │ │ eoreq r6, ip, r0, asr #6 │ │ - ldc2l 6, cr8, [r8, #332] @ 0x14c │ │ + ldc2l 6, cr8, [r8, #512] @ 0x200 │ │ │ │ 02493314 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r4, r3 │ │ mov r5, r2 │ │ @@ -1388544,17 +1388543,17 @@ │ │ ldr r0, [pc, #24] @ 24933b4 │ │ add r0, pc, r0 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 9, cr6, [r8, #510] @ 0x1fe @ │ │ - ldc2l 9, cr6, [r8, #342] @ 0x156 @ │ │ - ldc2l 9, cr6, [r8, #366] @ 0x16e @ │ │ + ldc2l 10, cr6, [r8, #176] @ 0xb0 @ │ │ + ldc2l 9, cr6, [r8, #432] @ 0x1b0 @ │ │ + ldc2l 9, cr6, [r8, #456] @ 0x1c8 @ │ │ │ │ 024933bc : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ mov r4, r2 │ │ mov r6, r1 │ │ @@ -1388596,19 +1388595,19 @@ │ │ ldr r0, [pc, #36] @ 2493488 │ │ mov r1, #5 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 11, cr3, [fp, #640] @ 0x280 @ │ │ - ldc2l 6, cr12, [r8, #896] @ 0x380 │ │ - ldc2l 10, cr15, [r8, #660] @ 0x294 @ │ │ - ldc2l 4, cr2, [r9] │ │ - ldc2l 11, cr3, [fp, #144] @ 0x90 @ │ │ + ldc2l 11, cr3, [fp, #820] @ 0x334 @ │ │ + ldc2l 7, cr12, [r8, #52] @ 0x34 │ │ + ldc2l 10, cr15, [r8, #840] @ 0x348 @ │ │ + ldc2l 4, cr2, [r9, #180] @ 0xb4 │ │ + ldc2l 11, cr3, [fp, #324] @ 0x144 @ │ │ │ │ 0249348c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #36 @ 0x24 │ │ mov r5, r1 │ │ ldr r1, [pc, #368] @ 2493614 │ │ @@ -1388745,17 +1388744,17 @@ │ │ ldr r0, [pc, #24] @ 24936c0 │ │ add r0, pc, r0 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 13, cr15, [r7, #360] @ 0x168 │ │ - ldc2l 13, cr15, [r7, #24] │ │ - ldc2l 13, cr15, [r7, #72] @ 0x48 │ │ + ldc2l 13, cr15, [r7, #540] @ 0x21c │ │ + ldc2l 13, cr15, [r7, #204] @ 0xcc │ │ + ldc2l 13, cr15, [r7, #252] @ 0xfc │ │ │ │ 024936c8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #148 @ 0x94 │ │ mov r4, r3 │ │ mov r6, r2 │ │ @@ -1389141,44 +1389140,44 @@ │ │ ldr r0, [pc, #136] @ 2493d58 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 2, cr8, [r8, #344] @ 0x158 │ │ - ldc2l 15, cr1, [r8, #580] @ 0x244 │ │ - ldc2l 7, cr15, [r8, #180] @ 0xb4 │ │ - ldc2l 11, cr11, [sl, #792] @ 0x318 @ │ │ - ldc2l 6, cr15, [r8, #532] @ 0x214 │ │ + ldc2l 2, cr8, [r8, #524] @ 0x20c │ │ + ldc2l 15, cr1, [r8, #760] @ 0x2f8 │ │ + ldc2l 7, cr15, [r8, #360] @ 0x168 │ │ + ldc2l 11, cr11, [sl, #972] @ 0x3cc @ │ │ + ldc2l 6, cr15, [r8, #712] @ 0x2c8 │ │ eoreq r5, ip, r8, asr sp │ │ - ldc2l 8, cr13, [sl, #596] @ 0x254 │ │ - ldc2l 5, cr15, [r8, #868] @ 0x364 │ │ + vcadd.f32 , q13, q1, #270 │ │ + ldc2l 6, cr15, [r8, #24] │ │ mlaeq ip, r0, ip, r5 │ │ - ldc2l 9, cr3, [sl, #162] @ 0xa2 @ │ │ - ldc2l 13, cr1, [r8, #548] @ 0x224 │ │ - ldc2l 5, cr15, [r8, #212] @ 0xd4 │ │ - ldc2l 9, cr11, [sl, #428] @ 0x1ac @ │ │ - ldc2l 4, cr15, [r8, #596] @ 0x254 │ │ + ldc2l 9, cr3, [sl, #252] @ 0xfc @ │ │ + ldc2l 13, cr1, [r8, #728] @ 0x2d8 │ │ + ldc2l 5, cr15, [r8, #392] @ 0x188 │ │ + ldc2l 10, cr11, [sl, #12] @ │ │ + ldc2l 4, cr15, [r8, #776] @ 0x308 │ │ eoreq r5, ip, r4, ror fp │ │ - ldc2l 13, cr13, [r8, #732] @ 0x2dc │ │ - ldc2l 2, cr15, [r8, #452] @ 0x1c4 │ │ - ldc2l 5, cr7, [r9, #628] @ 0x274 │ │ - ldc2l 1, cr4, [r8, #532] @ 0x214 │ │ - ldc2l 3, cr15, [r8, #260] @ 0x104 │ │ - ldc2l 12, cr7, [r8, #788] @ 0x314 │ │ + ldc2l 13, cr13, [r8, #912] @ 0x390 │ │ + ldc2l 2, cr15, [r8, #632] @ 0x278 │ │ + ldc2l 5, cr7, [r9, #808] @ 0x328 │ │ + ldc2l 1, cr4, [r8, #712] @ 0x2c8 │ │ + ldc2l 3, cr15, [r8, #440] @ 0x1b8 │ │ + ldc2l 12, cr7, [r8, #968] @ 0x3c8 │ │ eoreq r5, ip, r8, lsr #22 │ │ - ldc2l 4, cr3, [fp, #424] @ 0x1a8 │ │ - ldc2l 3, cr15, [r8, #532] @ 0x214 │ │ + ldc2l 4, cr3, [fp, #604] @ 0x25c │ │ + ldc2l 3, cr15, [r8, #712] @ 0x2c8 │ │ ldc2l 3, cr9, [fp, #392] @ 0x188 │ │ eoreq r5, ip, r0, lsr #20 │ │ - ldc2l 13, cr7, [r8, #332] @ 0x14c │ │ - ldc2l 2, cr15, [r8, #660] @ 0x294 │ │ - ldc2l 4, cr11, [sl, #280] @ 0x118 │ │ - ldc2l 12, cr7, [r8, #504] @ 0x1f8 │ │ + ldc2l 13, cr7, [r8, #512] @ 0x200 │ │ + ldc2l 2, cr15, [r8, #840] @ 0x348 │ │ + ldc2l 4, cr11, [sl, #460] @ 0x1cc │ │ + ldc2l 12, cr7, [r8, #684] @ 0x2ac │ │ │ │ 02493d5c : │ │ push {r4, r5, r6, r8, r9, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #16 │ │ mov r8, r3 │ │ mov r4, r2 │ │ @@ -1389218,16 +1389217,16 @@ │ │ ldr r0, [pc, #24] @ 2493e14 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r8, r9, sl, fp, pc} │ │ - ldc2l 0, cr4, [r8, #216] @ 0xd8 │ │ - ldc2l 15, cr3, [r8, #792] @ 0x318 │ │ + ldc2l 0, cr4, [r8, #396] @ 0x18c │ │ + ldc2l 15, cr3, [r8, #972] @ 0x3cc │ │ │ │ 02493e18 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r4, r1 │ │ mov r5, r0 │ │ @@ -1389309,16 +1389308,16 @@ │ │ sub r2, r8, r2 │ │ add r1, pc, r1 │ │ mov r3, #1 │ │ bl 270d960 │ │ clz r0, r0 │ │ lsr r0, r0, #5 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ - ldc2l 4, cr15, [r7, #740] @ 0x2e4 │ │ - ldc2l 14, cr2, [r8, #732] @ 0x2dc │ │ + ldc2l 4, cr15, [r7, #920] @ 0x398 │ │ + ldc2l 14, cr2, [r8, #912] @ 0x390 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 02493f78 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ @@ -1390319,15 +1390318,15 @@ │ │ add r1, pc, r1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3116] @ 2495b4c │ │ add r0, pc, r0 │ │ mov r1, #20 │ │ bl 270d9a0 │ │ b 2494a44 │ │ - ldc2l 9, cr7, [r8, #438] @ 0x1b6 @ │ │ + ldc2l 10, cr7, [r8, #32] @ │ │ ldr r1, [pc, #3096] @ 2495b50 │ │ add lr, sp, #1536 @ 0x600 │ │ add r0, lr, #11 │ │ mov r2, #80 @ 0x50 │ │ add r1, pc, r1 │ │ mov r3, #10 │ │ sub r5, fp, #1120 @ 0x460 │ │ @@ -1390359,22 +1390358,22 @@ │ │ bl 270d990 │ │ ldr r4, [pc, #2980] @ 2495b60 │ │ add lr, sp, #1536 @ 0x600 │ │ add r1, lr, #11 │ │ add r4, pc, r4 │ │ b 2494e34 │ │ streq fp, [r5], #2852 @ 0xb24 │ │ - ldc2l 7, cr1, [r9, #256] @ 0x100 │ │ + ldc2l 7, cr1, [r9, #436] @ 0x1b4 │ │ streq fp, [r5], #3660 @ 0xe4c │ │ - ldc2l 7, cr1, [r8, #124] @ 0x7c │ │ + ldc2l 7, cr1, [r8, #304] @ 0x130 │ │ streq fp, [r5], #2796 @ 0xaec │ │ eoreq r5, ip, r3, asr #12 │ │ eoreq r5, ip, r8, asr #12 │ │ - ldc2l 13, cr5, [r8, #24] │ │ - ldc2l 10, cr1, [r9, #480] @ 0x1e0 @ │ │ + ldc2l 13, cr5, [r8, #204] @ 0xcc │ │ + ldc2l 10, cr1, [r9, #660] @ 0x294 @ │ │ streq fp, [r5], #3460 @ 0xd84 │ │ ldr r0, [pc, #2924] @ 2495b64 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #120 @ 0x78 │ │ add r0, pc, r0 │ │ bl 270d130 │ │ add r0, sp, #528 @ 0x210 │ │ @@ -1390404,27 +1390403,27 @@ │ │ str r0, [sp, #56] @ 0x38 │ │ mov r0, #1 │ │ vldr d8, [pc, #852] @ 24953c8 │ │ str r2, [sp, #40] @ 0x28 │ │ str r1, [sp, #36] @ 0x24 │ │ str r0, [fp, #-1076] @ 0xfffffbcc │ │ b 24950e4 │ │ - ldc2l 2, cr15, [r9, #840] @ 0x348 │ │ - vcadd.f32 , q12, q4, #270 │ │ - ldc2l 9, cr1, [r9, #412] @ 0x19c @ │ │ + ldc2l 2, cr15, [r9, #1020] @ 0x3fc │ │ + ldc2l 8, cr7, [r8, #980] @ 0x3d4 │ │ + ldc2l 9, cr1, [r9, #502] @ 0x1f6 @ │ │ streq fp, [r5], #2732 @ 0xaac │ │ - ldc2l 2, cr15, [r7, #496] @ 0x1f0 │ │ - ldc2l 2, cr15, [r9, #152] @ 0x98 │ │ - ldc2l 2, cr15, [r7, #240] @ 0xf0 │ │ + ldc2l 2, cr15, [r7, #676] @ 0x2a4 │ │ + ldc2l 2, cr15, [r9, #332] @ 0x14c │ │ + ldc2l 2, cr15, [r7, #420] @ 0x1a4 │ │ ldc2l 6, cr10, [fp, #424] @ 0x1a8 │ │ streq fp, [r5], #3072 @ 0xc00 │ │ - ldc2l 0, cr13, [sl, #280] @ 0x118 │ │ - ldc2l 1, cr15, [r9, #488] @ 0x1e8 │ │ - ldc2l 0, cr13, [sl, #24] │ │ - ldc2l 1, cr15, [r7, #492] @ 0x1ec │ │ + ldc2l 0, cr13, [sl, #460] @ 0x1cc │ │ + ldc2l 1, cr15, [r9, #668] @ 0x29c │ │ + ldc2l 0, cr13, [sl, #204] @ 0xcc │ │ + ldc2l 1, cr15, [r7, #672] @ 0x2a0 │ │ add lr, sp, #1024 @ 0x400 │ │ add r0, lr, #120 @ 0x78 │ │ add r2, r0, r1, lsl #3 │ │ ldr r1, [pc, #2720] @ 2495b68 │ │ sub r0, fp, #1488 @ 0x5d0 │ │ add r1, pc, r1 │ │ bl 270e090 │ │ @@ -1390520,16 +1390519,16 @@ │ │ cmp r1, #1 │ │ bhi 2495258 │ │ sub r0, fp, #484 @ 0x1e4 │ │ str r6, [r0, r1, lsl #2] │ │ mov r6, r0 │ │ b 24952a8 │ │ streq fp, [r5], #2260 @ 0x8d4 │ │ - ldc2l 2, cr9, [sl, #440] @ 0x1b8 │ │ - ldc2l 0, cr15, [r9, #824] @ 0x338 │ │ + ldc2l 2, cr9, [sl, #620] @ 0x26c │ │ + ldc2l 0, cr15, [r9, #1004] @ 0x3ec │ │ ldr r0, [pc, #3804] @ 249613c │ │ movw r3, #1157 @ 0x485 │ │ ldr r2, [pc, #3800] @ 2496140 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [fp, #-1076] @ 0xfffffbcc │ │ @@ -1390551,21 +1390550,21 @@ │ │ beq 24974cc │ │ ldr r0, [fp, #-1076] @ 0xfffffbcc │ │ sub r6, r0, #1 │ │ cmp r6, #2 │ │ bcs 24952e8 │ │ mov r1, r6 │ │ b 2495334 │ │ - ldc2l 2, cr9, [sl, #184] @ 0xb8 │ │ - ldc2l 6, cr5, [r9, #948] @ 0x3b4 │ │ + ldc2l 2, cr9, [sl, #364] @ 0x16c │ │ + ldc2l 7, cr5, [r9, #104] @ 0x68 │ │ streq fp, [r5], #2280 @ 0x8e8 │ │ - ldc2l 8, cr11, [r8, #196] @ 0xc4 │ │ - ldc2l 0, cr15, [r9, #136] @ 0x88 │ │ - ldc2l 7, cr11, [r8, #964] @ 0x3c4 │ │ - ldc2l 7, cr6, [fp, #488] @ 0x1e8 │ │ + ldc2l 8, cr11, [r8, #376] @ 0x178 │ │ + ldc2l 0, cr15, [r9, #316] @ 0x13c │ │ + ldc2l 8, cr11, [r8, #120] @ 0x78 │ │ + ldc2l 7, cr6, [fp, #668] @ 0x29c │ │ ldr r0, [pc, #3676] @ 249614c │ │ mov r1, r6 │ │ ldr r2, [pc, #3672] @ 2496150 │ │ movw r3, #1189 @ 0x4a5 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1390610,18 +1390609,18 @@ │ │ cmp r6, #2 │ │ bcs 24953d4 │ │ ldr r4, [pc, #3512] @ 2496164 │ │ mov r1, r6 │ │ add r4, pc, r4 │ │ b 2495420 │ │ streq fp, [r5], #2300 @ 0x8fc │ │ - ldc2l 5, cr5, [r9, #1008] @ 0x3f0 │ │ - ldc2l 15, cr14, [r9, #472] @ 0x1d8 │ │ - ldc2l 5, cr5, [r9, #752] @ 0x2f0 │ │ - ldc2l 13, cr12, [sl, #932] @ 0x3a4 │ │ + ldc2l 6, cr5, [r9, #164] @ 0xa4 │ │ + ldc2l 15, cr14, [r9, #652] @ 0x28c │ │ + ldc2l 5, cr5, [r9, #932] @ 0x3a4 │ │ + ldc2l 14, cr12, [sl, #88] @ 0x58 │ │ andeq r0, r0, r0 │ │ cdpcc 0, 4, cr0, cr0, cr0, {0} │ │ streq fp, [r5], #2256 @ 0x8d0 │ │ ldr r4, [pc, #3468] @ 2496168 │ │ mov r1, r6 │ │ ldr r2, [pc, #3464] @ 249616c │ │ movw r3, #1197 @ 0x4ad │ │ @@ -1390658,46 +1390657,46 @@ │ │ ldr r0, [fp, #-1076] @ 0xfffffbcc │ │ sub r6, r0, #1 │ │ cmp r6, #2 │ │ bcs 2495500 │ │ mov r1, r6 │ │ b 2495544 │ │ ldc2l 10, cr8, [fp, #156] @ 0x9c @ │ │ - ldc2l 14, cr14, [r9, #808] @ 0x328 │ │ + ldc2l 14, cr14, [r9, #988] @ 0x3dc │ │ ldc2l 9, cr8, [fp, #462] @ 0x1ce @ │ │ - ldc2l 14, cr14, [r7, #840] @ 0x348 │ │ + ldc2l 14, cr14, [r7, #1020] @ 0x3fc │ │ streq fp, [r5], #1892 @ 0x764 │ │ - ldc2l 4, cr5, [r9, #684] @ 0x2ac │ │ - ldc2l 14, cr14, [r9, #120] @ 0x78 │ │ - ldc2l 4, cr5, [r9, #428] @ 0x1ac │ │ - ldc2l 12, cr12, [sl, #608] @ 0x260 │ │ + ldc2l 4, cr5, [r9, #864] @ 0x360 │ │ + ldc2l 14, cr14, [r9, #300] @ 0x12c │ │ + ldc2l 4, cr5, [r9, #608] @ 0x260 │ │ + ldc2l 12, cr12, [sl, #788] @ 0x314 │ │ streq fp, [r5], #1656 @ 0x678 │ │ - ldc2l 5, cr6, [r9, #128] @ 0x80 │ │ - ldc2l 13, cr14, [r9, #456] @ 0x1c8 │ │ - ldc2l 4, cr6, [r9, #896] @ 0x380 │ │ - ldc2l 5, cr7, [r9, #756] @ 0x2f4 │ │ + ldc2l 5, cr6, [r9, #308] @ 0x134 │ │ + ldc2l 13, cr14, [r9, #636] @ 0x27c │ │ + ldc2l 5, cr6, [r9, #52] @ 0x34 │ │ + ldc2l 5, cr7, [r9, #936] @ 0x3a8 │ │ streq fp, [r5], #1164 @ 0x48c │ │ - ldc2l 3, cr5, [r8, #508] @ 0x1fc │ │ - ldc2l 12, cr14, [r9, #792] @ 0x318 │ │ - ldc2l 3, cr5, [r8, #252] @ 0xfc │ │ - ldc2l 5, cr7, [r9, #92] @ 0x5c │ │ + ldc2l 3, cr5, [r8, #688] @ 0x2b0 │ │ + ldc2l 12, cr14, [r9, #972] @ 0x3cc │ │ + ldc2l 3, cr5, [r8, #432] @ 0x1b0 │ │ + ldc2l 5, cr7, [r9, #272] @ 0x110 │ │ streq fp, [r5], #1120 @ 0x460 │ │ - ldc2l 4, cr11, [r8, #200] @ 0xc8 │ │ - ldc2l 12, cr14, [r9, #104] @ 0x68 │ │ - ldc2l 3, cr11, [r8, #968] @ 0x3c8 │ │ - ldc2l 3, cr1, [r9, #116] @ 0x74 │ │ + ldc2l 4, cr11, [r8, #380] @ 0x17c │ │ + ldc2l 12, cr14, [r9, #284] @ 0x11c │ │ + ldc2l 4, cr11, [r8, #124] @ 0x7c │ │ + ldc2l 3, cr1, [r9, #296] @ 0x128 │ │ streq fp, [r5], #1460 @ 0x5b4 │ │ ldc2l 13, cr11, [fp, #572] @ 0x23c │ │ - ldc2l 11, cr14, [r9, #456] @ 0x1c8 @ │ │ + ldc2l 11, cr14, [r9, #636] @ 0x27c @ │ │ ldc2l 13, cr11, [fp, #332] @ 0x14c │ │ - ldc2l 12, cr8, [sl, #752] @ 0x2f0 │ │ + ldc2l 12, cr8, [sl, #932] @ 0x3a4 │ │ streq fp, [r5], #1168 @ 0x490 │ │ - ldc2l 10, cr14, [r9, #936] @ 0x3a8 @ │ │ - ldc2l 2, cr1, [r9, #80] @ 0x50 │ │ - ldc2l 1, cr3, [r9, #756] @ 0x2f4 │ │ + ldc2l 11, cr14, [r9, #92] @ 0x5c @ │ │ + ldc2l 2, cr1, [r9, #260] @ 0x104 │ │ + ldc2l 1, cr3, [r9, #936] @ 0x3a8 │ │ streq fp, [r5], #504 @ 0x1f8 │ │ eoreq r4, ip, ip, ror sp │ │ ldr r2, [pc, #3912] @ 2496450 │ │ mov r0, r4 │ │ mov r1, r6 │ │ movw r3, #1198 @ 0x4ae │ │ add r2, pc, r2 │ │ @@ -1390951,20 +1390950,20 @@ │ │ add r3, sp, #928 @ 0x3a0 │ │ mov r0, r5 │ │ mov r1, r7 │ │ mov r2, r6 │ │ str r4, [sp] │ │ bl 270f970 │ │ b 2496520 │ │ - ldc2l 4, cr3, [r8, #20] │ │ - ldc2l 12, cr8, [r9, #544] @ 0x220 │ │ + ldc2l 4, cr3, [r8, #200] @ 0xc8 │ │ + ldc2l 12, cr8, [r9, #724] @ 0x2d4 │ │ eoreq r4, ip, ip, ror #24 │ │ - ldc2l 15, cr6, [r8, #316] @ 0x13c │ │ - ldc2l 12, cr8, [r9, #216] @ 0xd8 │ │ - ldc2l 1, cr0, [fp, #52] @ 0x34 │ │ + ldc2l 15, cr6, [r8, #496] @ 0x1f0 │ │ + ldc2l 12, cr8, [r9, #396] @ 0x18c │ │ + ldc2l 1, cr0, [fp, #232] @ 0xe8 │ │ ldrdeq r4, [ip], -r4 @ │ │ cmp r1, #2 │ │ bcc 249594c │ │ ldr r0, [pc, #3948] @ 24968a4 │ │ movw r3, #1208 @ 0x4b8 │ │ ldr r2, [pc, #3944] @ 24968a8 │ │ add r0, pc, r0 │ │ @@ -1391069,50 +1391068,50 @@ │ │ add r2, pc, r2 │ │ bl 270fb60 │ │ bl 270db20 │ │ ldr r9, [sp, #76] @ 0x4c │ │ cmp r0, #0 │ │ beq 2496c64 │ │ b 2494a44 │ │ - ldc2l 3, cr2, [r8, #28] │ │ + ldc2l 3, cr2, [r8, #208] @ 0xd0 │ │ streq fp, [r5], #824 @ 0x338 │ │ - ldc2l 6, cr12, [sl, #1020] @ 0x3fc │ │ - ldc2l 9, cr6, [sl, #172] @ 0xac @ │ │ - ldc2l 4, cr14, [sl, #84] @ 0x54 │ │ - ldc2l 8, cr4, [sl, #344] @ 0x158 │ │ + ldc2l 7, cr12, [sl, #176] @ 0xb0 │ │ + ldc2l 9, cr6, [sl, #262] @ 0x106 @ │ │ + ldc2l 4, cr14, [sl, #264] @ 0x108 │ │ + vcadd.f32 d20, d26, d3, #270 │ │ ldrdeq r4, [ip], -r4 @ │ │ ldc2l 2, cr8, [fp, #644] @ 0x284 │ │ eoreq r4, ip, r8, asr sl │ │ - ldc2l 14, cr5, [fp, #356] @ 0x164 │ │ - ldc2l 7, cr6, [sl, #924] @ 0x39c │ │ + ldc2l 14, cr5, [fp, #536] @ 0x218 │ │ + ldc2l 8, cr6, [sl, #80] @ 0x50 │ │ vcadd.f32 , , q2, #270 │ │ eoreq r4, ip, r0, asr #18 │ │ - ldc2l 7, cr6, [sl, #416] @ 0x1a0 │ │ + ldc2l 7, cr6, [sl, #596] @ 0x254 │ │ streq sl, [r5], #3420 @ 0xd5c │ │ streq fp, [r5], #76 @ 0x4c │ │ eoreq r4, ip, r0, lsl #17 │ │ - ldc2l 6, cr6, [sl, #936] @ 0x3a8 │ │ - ldc2l 0, cr14, [r8, #580] @ 0x244 │ │ - ldc2l 4, cr12, [r9, #828] @ 0x33c │ │ - ldc2l 13, cr15, [sl, #320] @ 0x140 │ │ - ldc2l 0, cr14, [r8, #196] @ 0xc4 │ │ - ldc2l 3, cr12, [sl, #768] @ 0x300 │ │ - ldc2l 0, cr14, [r8, #4] │ │ - ldc2l 5, cr4, [sl, #72] @ 0x48 │ │ + ldc2l 7, cr6, [sl, #92] @ 0x5c │ │ + ldc2l 0, cr14, [r8, #760] @ 0x2f8 │ │ + ldc2l 4, cr12, [r9, #1008] @ 0x3f0 │ │ + ldc2l 13, cr15, [sl, #500] @ 0x1f4 │ │ + ldc2l 0, cr14, [r8, #376] @ 0x178 │ │ + ldc2l 3, cr12, [sl, #948] @ 0x3b4 │ │ + ldc2l 0, cr14, [r8, #184] @ 0xb8 │ │ + ldc2l 5, cr4, [sl, #252] @ 0xfc │ │ ldc2l 15, cr7, [fp, #756] @ 0x2f4 │ │ - ldc2l 14, cr3, [fp, #836] @ 0x344 │ │ - ldc2l 9, cr8, [r8, #154] @ 0x9a @ │ │ - ldc2l 10, cr6, [r8, #260] @ 0x104 @ │ │ - ldc2l 14, cr4, [r8, #644] @ 0x284 │ │ - ldc2l 3, cr2, [sl, #836] @ 0x344 │ │ - ldc2l 15, cr13, [r8, #4] │ │ + ldc2l 14, cr3, [fp, #1016] @ 0x3f8 │ │ + ldc2l 9, cr8, [r8, #244] @ 0xf4 @ │ │ + ldc2l 10, cr6, [r8, #440] @ 0x1b8 @ │ │ + ldc2l 14, cr4, [r8, #824] @ 0x338 │ │ + ldc2l 3, cr2, [sl, #1016] @ 0x3f8 │ │ + ldc2l 15, cr13, [r8, #184] @ 0xb8 │ │ mlaeq ip, ip, r6, r4 │ │ eoreq r4, ip, r8, asr #11 │ │ - ldc2l 9, cr0, [r9, #396] @ 0x18c @ │ │ - ldc2l 12, cr4, [r8, #296] @ 0x128 │ │ + ldc2l 9, cr0, [r9, #486] @ 0x1e6 @ │ │ + ldc2l 12, cr4, [r8, #476] @ 0x1dc │ │ cmp r1, #2 │ │ bcc 2495b98 │ │ ldr r0, [pc, #3412] @ 24968d8 │ │ movw r3, #1238 @ 0x4d6 │ │ ldr r2, [pc, #3408] @ 24968dc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1391469,34 +1391468,34 @@ │ │ ldr r1, [pc, #3980] @ 249709c │ │ sub r0, fp, #1488 @ 0x5d0 │ │ add r1, pc, r1 │ │ bl 270e090 │ │ b 2496c60 │ │ streq sl, [r5], #2684 @ 0xa7c │ │ eoreq r4, ip, r0, asr #10 │ │ - ldc2l 12, cr1, [r8, #508] @ 0x1fc │ │ + ldc2l 12, cr1, [r8, #688] @ 0x2b0 │ │ streq sl, [r5], #3248 @ 0xcb0 │ │ - ldc2l 13, cr12, [sl, #600] @ 0x258 │ │ - ldc2l 4, cr4, [r8, #452] @ 0x1c4 │ │ + ldc2l 13, cr12, [sl, #780] @ 0x30c │ │ + ldc2l 4, cr4, [r8, #632] @ 0x278 │ │ eoreq r4, ip, r8, ror r4 │ │ ldrdeq r4, [ip], -r8 @ │ │ ldc2l 14, cr12, [r7, #512] @ 0x200 │ │ - ldc2l 10, cr4, [r8, #904] @ 0x388 @ │ │ + ldc2l 11, cr4, [r8, #60] @ 0x3c @ │ │ ldc2l 14, cr12, [r7, #304] @ 0x130 │ │ - ldc2l 10, cr4, [r8, #696] @ 0x2b8 @ │ │ + ldc2l 10, cr4, [r8, #876] @ 0x36c @ │ │ ldc2l 5, cr9, [fp, #72] @ 0x48 │ │ - ldc2l 10, cr4, [r8, #312] @ 0x138 @ │ │ + ldc2l 10, cr4, [r8, #492] @ 0x1ec @ │ │ ldc2l 4, cr9, [fp, #948] @ 0x3b4 │ │ - ldc2l 10, cr4, [r8, #136] @ 0x88 @ │ │ + ldc2l 10, cr4, [r8, #316] @ 0x13c @ │ │ streq sl, [r5], #2632 @ 0xa48 │ │ eoreq r4, ip, ip, lsl #6 │ │ ldc2l 4, cr9, [fp, #404] @ 0x194 │ │ ldc2l 4, cr9, [fp, #180] @ 0xb4 │ │ - ldc2l 9, cr4, [r8, #196] @ 0xc4 @ │ │ - ldc2l 9, cr4, [r8, #108] @ 0x6c @ │ │ + ldc2l 9, cr4, [r8, #286] @ 0x11e @ │ │ + ldc2l 9, cr4, [r8, #198] @ 0xc6 @ │ │ cmp r1, #2 │ │ bcc 2496198 │ │ ldr r0, [pc, #4012] @ 2497130 │ │ movw r3, #1402 @ 0x57a │ │ ldr r2, [pc, #4008] @ 2497134 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1391670,32 +1391669,32 @@ │ │ ldr r2, [pc, #4012] @ 24973e0 │ │ sub r0, fp, #784 @ 0x310 │ │ sub r1, fp, #1488 @ 0x5d0 │ │ add r2, pc, r2 │ │ mov r3, r2 │ │ bl 270e7a0 │ │ b 2496c60 │ │ - ldc2l 9, cr1, [r8, #374] @ 0x176 @ │ │ + ldc2l 9, cr1, [r8, #464] @ 0x1d0 @ │ │ streq sl, [r5], #2540 @ 0x9ec │ │ - ldc2l 8, cr4, [r8, #232] @ 0xe8 │ │ - ldc2l 8, cr4, [r8, #72] @ 0x48 │ │ - ldc2l 7, cr4, [r8, #792] @ 0x318 │ │ - ldc2l 2, cr8, [r8, #944] @ 0x3b0 │ │ - ldc2l 7, cr4, [r8, #456] @ 0x1c8 │ │ - ldc2l 10, cr1, [fp, #612] @ 0x264 @ │ │ - ldc2l 7, cr4, [r8, #120] @ 0x78 │ │ + vcadd.f32 q10, q4, , #270 │ │ + ldc2l 8, cr4, [r8, #252] @ 0xfc │ │ + ldc2l 7, cr4, [r8, #972] @ 0x3cc │ │ + ldc2l 3, cr8, [r8, #100] @ 0x64 │ │ + ldc2l 7, cr4, [r8, #636] @ 0x27c │ │ + ldc2l 10, cr1, [fp, #792] @ 0x318 @ │ │ + ldc2l 7, cr4, [r8, #300] @ 0x12c │ │ ldc2l 1, cr9, [fp, #784] @ 0x310 │ │ ldc2l 1, cr9, [fp, #580] @ 0x244 │ │ - ldc2l 6, cr4, [r8, #792] @ 0x318 │ │ - ldc2l 11, cr15, [r9, #12] @ │ │ - ldc2l 3, cr4, [r9, #52] @ 0x34 │ │ - ldc2l 6, cr4, [r8, #440] @ 0x1b8 │ │ + ldc2l 6, cr4, [r8, #972] @ 0x3cc │ │ + ldc2l 11, cr15, [r9, #192] @ 0xc0 @ │ │ + ldc2l 3, cr4, [r9, #232] @ 0xe8 │ │ + ldc2l 6, cr4, [r8, #620] @ 0x26c │ │ streq sl, [r5], #1276 @ 0x4fc │ │ - ldc2l 12, cr13, [r7, #540] @ 0x21c │ │ - ldc2l 6, cr4, [r8, #24] │ │ + ldc2l 12, cr13, [r7, #720] @ 0x2d0 │ │ + ldc2l 6, cr4, [r8, #204] @ 0xcc │ │ streq sl, [r5], #944 @ 0x3b0 │ │ cmp r0, #0 │ │ beq 249652c │ │ ldr r0, [fp, #-1076] @ 0xfffffbcc │ │ sub r1, r0, #1 │ │ cmp r1, #2 │ │ bcc 24964c8 │ │ @@ -1391882,15 +1391881,15 @@ │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #4088] @ 2497788 │ │ add r0, pc, r0 │ │ b 2496904 │ │ eoreq r3, ip, ip, ror #29 │ │ - ldc2l 4, cr14, [r8, #380] @ 0x17c │ │ + ldc2l 4, cr14, [r8, #560] @ 0x230 │ │ ldr r0, [fp, #-1076] @ 0xfffffbcc │ │ sub r1, r0, #1 │ │ cmp r1, #2 │ │ bcc 24967c8 │ │ ldr r0, [pc, #4056] @ 249778c │ │ movw r3, #1748 @ 0x6d4 │ │ ldr r2, [pc, #4052] @ 2497790 │ │ @@ -1391912,16 +1391911,16 @@ │ │ add r2, r0, r1, lsl #5 │ │ ldr r1, [sp, #76] @ 0x4c │ │ ldr r3, [pc, #3988] @ 2497798 │ │ add r0, lr, #808 @ 0x328 │ │ add r3, pc, r3 │ │ bl 270fbb0 │ │ b 24969a8 │ │ - ldc2l 2, cr5, [fp, #744] @ 0x2e8 │ │ - ldc2l 4, cr4, [r8, #904] @ 0x388 │ │ + ldc2l 2, cr5, [fp, #924] @ 0x39c │ │ + ldc2l 5, cr4, [r8, #60] @ 0x3c │ │ streq sl, [r5], #1076 @ 0x434 │ │ cmp r1, #2 │ │ bcc 2496840 │ │ ldr r0, [pc, #3952] @ 249779c │ │ movw r3, #1767 @ 0x6e7 │ │ ldr r2, [pc, #3948] @ 24977a0 │ │ add r0, pc, r0 │ │ @@ -1391948,30 +1391947,30 @@ │ │ add r8, sp, #920 @ 0x398 │ │ sub r1, r0, #1 │ │ cmp r1, #2 │ │ bcs 24968e0 │ │ ldr r0, [pc, #3856] @ 24977ac │ │ add r0, pc, r0 │ │ b 2496904 │ │ - ldc2l 14, cr15, [r8, #272] @ 0x110 │ │ - ldc2l 8, cr11, [sl, #1012] @ 0x3f4 │ │ - ldc2l 4, cr4, [r8, #40] @ 0x28 │ │ + ldc2l 14, cr15, [r8, #452] @ 0x1c4 │ │ + ldc2l 9, cr11, [sl, #84] @ 0x54 @ │ │ + ldc2l 4, cr4, [r8, #220] @ 0xdc │ │ streq sl, [r5], #984 @ 0x3d8 │ │ - ldc2l 1, cr5, [fp, #552] @ 0x228 │ │ - ldc2l 3, cr4, [r8, #712] @ 0x2c8 │ │ + ldc2l 1, cr5, [fp, #732] @ 0x2dc │ │ + ldc2l 3, cr4, [r8, #892] @ 0x37c │ │ streq sl, [r5], #768 @ 0x300 │ │ - ldc2l 9, cr13, [r7, #438] @ 0x1b6 @ │ │ - ldc2l 3, cr4, [r8, #360] @ 0x168 │ │ + ldc2l 10, cr13, [r7, #32] @ │ │ + ldc2l 3, cr4, [r8, #540] @ 0x21c │ │ streq sl, [r5], #268 @ 0x10c │ │ eoreq r3, ip, r8, asr #24 │ │ - ldc2l 12, cr9, [sl, #292] @ 0x124 │ │ - ldc2l 2, cr4, [r8, #840] @ 0x348 │ │ - ldc2l 12, cr15, [r8, #400] @ 0x190 │ │ - ldc2l 6, cr11, [sl, #708] @ 0x2c4 │ │ - ldc2l 1, cr4, [r8, #760] @ 0x2f8 │ │ + ldc2l 12, cr9, [sl, #472] @ 0x1d8 │ │ + ldc2l 2, cr4, [r8, #1020] @ 0x3fc │ │ + ldc2l 12, cr15, [r8, #580] @ 0x244 │ │ + ldc2l 6, cr11, [sl, #888] @ 0x378 │ │ + ldc2l 1, cr4, [r8, #940] @ 0x3ac │ │ ldr r0, [pc, #4064] @ 24978c8 │ │ movw r3, #1770 @ 0x6ea │ │ ldr r2, [pc, #4060] @ 24978cc │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ @@ -1392141,23 +1392140,23 @@ │ │ sub r2, fp, #1488 @ 0x5d0 │ │ add r0, lr, #120 @ 0x78 │ │ add r0, r0, r1, lsl #3 │ │ ldr r1, [sp, #28] │ │ bl 270f680 │ │ b 2496c08 │ │ streq sl, [r5], #396 @ 0x18c │ │ - ldc2l 15, cr4, [fp, #248] @ 0xf8 │ │ - ldc2l 1, cr4, [r8, #408] @ 0x198 │ │ + ldc2l 15, cr4, [fp, #428] @ 0x1ac │ │ + ldc2l 1, cr4, [r8, #588] @ 0x24c │ │ streq sl, [r5], #180 @ 0xb4 │ │ - ldc2l 7, cr13, [r7, #572] @ 0x23c │ │ - ldc2l 1, cr4, [r8, #56] @ 0x38 │ │ + ldc2l 7, cr13, [r7, #752] @ 0x2f0 │ │ + ldc2l 1, cr4, [r8, #236] @ 0xec │ │ streq r9, [r5], #3776 @ 0xec0 │ │ strdeq r3, [ip], -ip @ │ │ - ldc2l 13, cr3, [r9, #196] @ 0xc4 │ │ - ldc2l 0, cr4, [r8, #584] @ 0x248 │ │ + ldc2l 13, cr3, [r9, #376] @ 0x178 │ │ + ldc2l 0, cr4, [r8, #764] @ 0x2fc │ │ streq r9, [r5], #3864 @ 0xf18 │ │ cmp r0, #2 │ │ bcc 2496bf0 │ │ ldr r0, [pc, #4088] @ 2497bd4 │ │ mov r3, #1872 @ 0x750 │ │ ldr r2, [pc, #4084] @ 2497bd8 │ │ add r0, pc, r0 │ │ @@ -1392335,18 +1392334,18 @@ │ │ movw r3, #2059 @ 0x80b │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r6, [fp, #-1076] @ 0xfffffbcc │ │ mov r1, r0 │ │ b 2496dbc │ │ eoreq r3, ip, r8, ror #15 │ │ - ldc2l 7, cr9, [sl, #900] @ 0x384 │ │ - ldc2l 14, cr3, [r8, #424] @ 0x1a8 │ │ - ldc2l 7, cr9, [sl, #596] @ 0x254 │ │ - ldc2l 14, cr3, [r8, #120] @ 0x78 │ │ + vcadd.f32 d25, d10, d14, #270 │ │ + ldc2l 14, cr3, [r8, #604] @ 0x25c │ │ + ldc2l 7, cr9, [sl, #776] @ 0x308 │ │ + ldc2l 14, cr3, [r8, #300] @ 0x12c │ │ ldr r2, [pc, #4084] @ 2497eb8 │ │ sub lr, fp, #1024 @ 0x400 │ │ ldr r3, [pc, #4080] @ 2497ebc │ │ mov r0, #5 │ │ sub r5, lr, #60 @ 0x3c │ │ add lr, sp, #1024 @ 0x400 │ │ str r0, [sp, #12] │ │ @@ -1392371,18 +1392370,18 @@ │ │ ldr r7, [pc, #4052] @ 2497efc │ │ add r8, r1, #8 │ │ sub r9, fp, #472 @ 0x1d8 │ │ sub r4, fp, #1904 @ 0x770 │ │ add r7, pc, r7 │ │ mov r5, #7 │ │ b 2496f7c │ │ - ldc2l 7, cr15, [r8, #192] @ 0xc0 │ │ + ldc2l 7, cr15, [r8, #372] @ 0x174 │ │ streq r9, [r5], #3592 @ 0xe08 │ │ streq r9, [r5], #3564 @ 0xdec │ │ - ldc2l 6, cr9, [sl, #196] @ 0xc4 │ │ + ldc2l 6, cr9, [sl, #376] @ 0x178 │ │ add r3, r9, r1, lsl #3 │ │ mov r0, r8 │ │ mov r1, r4 │ │ mov r2, r7 │ │ str r6, [sp] │ │ str r5, [sp, #4] │ │ bl 270d190 │ │ @@ -1392455,18 +1392454,18 @@ │ │ movw r3, #2084 @ 0x824 │ │ ldr r2, [pc, #4092] @ 2498078 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2496f4c │ │ - ldc2l 12, cr3, [r8, #744] @ 0x2e8 │ │ + ldc2l 12, cr3, [r8, #924] @ 0x39c │ │ eoreq r3, ip, r0, ror #11 │ │ - ldc2l 5, cr9, [sl, #836] @ 0x344 │ │ - ldc2l 12, cr3, [r8, #360] @ 0x168 │ │ + ldc2l 5, cr9, [sl, #1016] @ 0x3f8 │ │ + ldc2l 12, cr3, [r8, #540] @ 0x21c │ │ eoreq r3, ip, r0, lsl #11 │ │ ldr r0, [pc, #4052] @ 249807c │ │ mov r1, #186 @ 0xba │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #4040] @ 2498080 │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1392496,22 +1392495,22 @@ │ │ bl 270d9f0 │ │ ldr r1, [pc, #4044] @ 24980ec │ │ mov r0, r4 │ │ mov r2, #1 │ │ mov r3, #8 │ │ add r1, pc, r1 │ │ b 2494e58 │ │ - ldc2l 0, cr11, [sl, #708] @ 0x2c4 │ │ - ldc2l 11, cr3, [r8, #760] @ 0x2f8 @ │ │ + ldc2l 0, cr11, [sl, #888] @ 0x378 │ │ + ldc2l 11, cr3, [r8, #940] @ 0x3ac @ │ │ streq r9, [r5], #2956 @ 0xb8c │ │ - ldc2l 9, cr4, [fp, #124] @ 0x7c @ │ │ - ldc2l 11, cr3, [r8, #408] @ 0x198 @ │ │ + ldc2l 9, cr4, [fp, #214] @ 0xd6 @ │ │ + ldc2l 11, cr3, [r8, #588] @ 0x24c @ │ │ streq r9, [r5], #2740 @ 0xab4 │ │ - ldc2l 1, cr13, [r7, #572] @ 0x23c │ │ - ldc2l 11, cr3, [r8, #56] @ 0x38 @ │ │ + ldc2l 1, cr13, [r7, #752] @ 0x2f0 │ │ + ldc2l 11, cr3, [r8, #236] @ 0xec @ │ │ streq r9, [r5], #2240 @ 0x8c0 │ │ strdeq r3, [ip], -ip @ │ │ eoreq r3, ip, r4, ror #6 │ │ eoreq r3, ip, r0, lsl #6 │ │ ldr r2, [pc, #3956] @ 24980dc │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r4, [pc, #3952] @ 24980e0 │ │ @@ -1392666,16 +1392665,16 @@ │ │ bl 270d9f0 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #120 @ 0x78 │ │ mov r0, r4 │ │ mov r2, #1 │ │ mov r3, #80 @ 0x50 │ │ b 2494e58 │ │ - ldc2l 2, cr9, [sl, #708] @ 0x2c4 │ │ - ldc2l 9, cr3, [r8, #116] @ 0x74 @ │ │ + ldc2l 2, cr9, [sl, #888] @ 0x378 │ │ + ldc2l 9, cr3, [r8, #206] @ 0xce @ │ │ eoreq r3, ip, r8, asr r2 │ │ ldr r0, [sp, #64] @ 0x40 │ │ sub r1, fp, #1072 @ 0x430 │ │ add r2, sp, #84 @ 0x54 │ │ mov r3, #36 @ 0x24 │ │ bl 270cd90 │ │ ldr r0, [sp, #84] @ 0x54 │ │ @@ -1392715,26 +1392714,26 @@ │ │ mov r3, #36 @ 0x24 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3208] @ 2498118 │ │ mov r1, #23 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 2494a44 │ │ - ldc2l 6, cr4, [fp, #408] @ 0x198 │ │ - vcadd.f32 d19, d24, d14, #270 │ │ + ldc2l 6, cr4, [fp, #588] @ 0x24c │ │ + ldc2l 8, cr3, [r8, #748] @ 0x2ec │ │ add r1, sp, #456 @ 0x1c8 │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [sp] │ │ add r2, r1, #4 │ │ add r3, r1, #8 │ │ sub r0, fp, #472 @ 0x1d8 │ │ bl 270f740 │ │ b 249798c │ │ streq r9, [r5], #2016 @ 0x7e0 │ │ - ldc2l 2, cr15, [r8, #80] @ 0x50 │ │ + ldc2l 2, cr15, [r8, #260] @ 0x104 │ │ ldr r0, [pc, #3200] @ 2498154 │ │ mov r1, #205 @ 0xcd │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #3188] @ 2498158 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #808 @ 0x328 │ │ @@ -1392754,19 +1392753,19 @@ │ │ mov r3, #80 @ 0x50 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3120] @ 249815c │ │ mov r1, #18 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 2494a44 │ │ - ldc2l 15, cr6, [sl, #784] @ 0x310 │ │ - ldc2l 7, cr3, [r8, #1016] @ 0x3f8 │ │ + ldc2l 15, cr6, [sl, #964] @ 0x3c4 │ │ + vcadd.f32 d19, d8, d27, #270 │ │ streq r9, [r5], #1908 @ 0x774 │ │ strdeq r3, [ip], -r0 @ │ │ - ldc2l 8, cr0, [r8, #220] @ 0xdc │ │ + vcadd.f32 q8, q4, q10, #270 │ │ streq r9, [r5], #2152 @ 0x868 │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r2, [pc, #2976] @ 24980fc │ │ ldr r3, [pc, #2976] @ 2498100 │ │ mov r1, #9 │ │ add r6, lr, #840 @ 0x348 │ │ sub lr, fp, #1024 @ 0x400 │ │ @@ -1392800,28 +1392799,28 @@ │ │ cmp r0, r1 │ │ bne 2497de0 │ │ sub lr, fp, #2048 @ 0x800 │ │ mov r1, r4 │ │ sub r0, lr, #152 @ 0x98 │ │ bl 270fbc0 │ │ b 2497898 │ │ - ldc2l 5, cr9, [r8, #512] @ 0x200 │ │ - ldc2l 9, cr12, [sl, #294] @ 0x126 @ │ │ - ldc2l 6, cr14, [sl, #344] @ 0x158 │ │ - ldc2l 4, cr15, [r8, #356] @ 0x164 │ │ - ldc2l 6, cr3, [r8, #856] @ 0x358 │ │ + ldc2l 5, cr9, [r8, #692] @ 0x2b4 │ │ + ldc2l 9, cr12, [sl, #384] @ 0x180 @ │ │ + ldc2l 6, cr14, [sl, #524] @ 0x20c │ │ + ldc2l 4, cr15, [r8, #536] @ 0x218 │ │ + ldc2l 7, cr3, [r8, #12] │ │ streq r9, [r5], #1740 @ 0x6cc │ │ eoreq r2, ip, r8, asr #31 │ │ - ldc2l 8, cr12, [sl, #876] @ 0x36c │ │ - ldc2l 5, cr5, [r9, #36] @ 0x24 │ │ - ldc2l 6, cr3, [r8, #248] @ 0xf8 │ │ + ldc2l 9, cr12, [sl, #16] @ │ │ + ldc2l 5, cr5, [r9, #216] @ 0xd8 │ │ + ldc2l 6, cr3, [r8, #428] @ 0x1ac │ │ streq r9, [r5], #960 @ 0x3c0 │ │ eoreq r2, ip, ip, lsr pc │ │ - ldc2l 4, cr5, [r9, #636] @ 0x27c │ │ - ldc2l 5, cr3, [r8, #824] @ 0x338 │ │ + ldc2l 4, cr5, [r9, #816] @ 0x330 │ │ + ldc2l 5, cr3, [r8, #1004] @ 0x3ec │ │ ldr r2, [pc, #2912] @ 2498190 │ │ sub lr, fp, #1024 @ 0x400 │ │ ldr r3, [pc, #2908] @ 2498194 │ │ mov r0, #32 │ │ sub r7, lr, #60 @ 0x3c │ │ add r1, sp, #904 @ 0x388 │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1392903,20 +1392902,20 @@ │ │ mov r0, r5 │ │ mov r2, #1 │ │ mov r3, #13 │ │ add r1, pc, r1 │ │ bl 270d9f0 │ │ b 2497dac │ │ streq r9, [r5], #1008 @ 0x3f0 │ │ - ldc2l 2, cr1, [r9, #900] @ 0x384 │ │ - ldc2l 5, cr3, [r8, #568] @ 0x238 │ │ + ldc2l 3, cr1, [r9, #56] @ 0x38 │ │ + ldc2l 5, cr3, [r8, #748] @ 0x2ec │ │ streq r9, [r5], #1548 @ 0x60c │ │ mlaeq ip, r0, lr, r2 │ │ - ldc2l 11, cr12, [r7, #632] @ 0x278 @ │ │ - ldc2l 5, cr3, [r8, #88] @ 0x58 │ │ + ldc2l 11, cr12, [r7, #812] @ 0x32c @ │ │ + ldc2l 5, cr3, [r8, #268] @ 0x10c │ │ streq r9, [r5], #1048 @ 0x418 │ │ eoreq r2, ip, r4, lsl lr │ │ streq r9, [r5], #932 @ 0x3a4 │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r2, [pc, #2408] @ 2498124 │ │ ldr r3, [pc, #2408] @ 2498128 │ │ mov r1, #11 │ │ @@ -1392982,16 +1392981,16 @@ │ │ mov r2, r8 │ │ mov r3, r8 │ │ bl 270e770 │ │ add r1, sp, #160 @ 0xa0 │ │ mov r0, r9 │ │ bl 270dde0 │ │ b 2494de4 │ │ - ldc2l 9, cr10, [sl, #168] @ 0xa8 @ │ │ - ldc2l 4, cr3, [r8, #360] @ 0x168 │ │ + ldc2l 9, cr10, [sl, #258] @ 0x102 @ │ │ + ldc2l 4, cr3, [r8, #540] @ 0x21c │ │ streq r9, [r5], #828 @ 0x33c │ │ eoreq r2, ip, ip, asr sp │ │ ldr r0, [pc, #2280] @ 24981c8 │ │ mov r1, #115 @ 0x73 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #2268] @ 24981cc │ │ @@ -1393012,16 +1393011,16 @@ │ │ mov r2, #1 │ │ bl 270da90 │ │ ldr r0, [pc, #2204] @ 24981d0 │ │ add r0, pc, r0 │ │ b 2494f20 │ │ ldc2l 1, cr6, [fp, #328] @ 0x148 │ │ eoreq r2, ip, r0, lsl #26 │ │ - ldc2l 12, cr8, [sl, #948] @ 0x3b4 │ │ - ldc2l 3, cr3, [r8, #472] @ 0x1d8 │ │ + ldc2l 13, cr8, [sl, #104] @ 0x68 │ │ + ldc2l 3, cr3, [r8, #652] @ 0x28c │ │ ldr r0, [pc, #2044] @ 249814c │ │ sub lr, fp, #2048 @ 0x800 │ │ sub r4, fp, #376 @ 0x178 │ │ ldr r1, [fp, #8] │ │ add r0, pc, r0 │ │ sub r2, lr, #152 @ 0x98 │ │ mov r3, r4 │ │ @@ -1393050,16 +1393049,16 @@ │ │ ldr r4, [pc, #2136] @ 249821c │ │ ldr r5, [pc, #2136] @ 2498220 │ │ ldr r6, [pc, #2136] @ 2498224 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ add r6, pc, r6 │ │ b 2497a04 │ │ - ldc2l 12, cr8, [sl, #644] @ 0x284 │ │ - ldc2l 3, cr3, [r8, #168] @ 0xa8 │ │ + ldc2l 12, cr8, [sl, #824] @ 0x338 │ │ + ldc2l 3, cr3, [r8, #348] @ 0x15c │ │ ldr r0, [sp, #72] @ 0x48 │ │ add r1, r0, r1, lsl #3 │ │ mov r0, r4 │ │ bl 270d130 │ │ ldr r1, [fp, #-1076] @ 0xfffffbcc │ │ add r0, r1, #1 │ │ cmp r1, #3 │ │ @@ -1393092,16 +1393091,16 @@ │ │ ldr r4, [pc, #1924] @ 24981f0 │ │ ldr r5, [pc, #1924] @ 24981f4 │ │ ldr r6, [pc, #1924] @ 24981f8 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ add r6, pc, r6 │ │ b 2497ab0 │ │ - ldc2l 12, cr8, [sl, #100] @ 0x64 │ │ - ldc2l 2, cr3, [r8, #648] @ 0x288 │ │ + ldc2l 12, cr8, [sl, #280] @ 0x118 │ │ + ldc2l 2, cr3, [r8, #828] @ 0x33c │ │ eoreq r2, ip, r8, asr #23 │ │ ldr r0, [sp, #72] @ 0x48 │ │ add r1, r0, r1, lsl #3 │ │ mov r0, r4 │ │ bl 270d130 │ │ ldr r1, [fp, #-1076] @ 0xfffffbcc │ │ add r0, r1, #1 │ │ @@ -1393114,16 +1393113,16 @@ │ │ bgt 2497a8c │ │ mov r0, r5 │ │ mov r2, r6 │ │ movw r3, #2233 @ 0x8b9 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2497a8c │ │ - ldc2l 11, cr8, [sl, #740] @ 0x2e4 @ │ │ - ldc2l 2, cr3, [r8, #264] @ 0x108 │ │ + ldc2l 11, cr8, [sl, #920] @ 0x398 @ │ │ + ldc2l 2, cr3, [r8, #444] @ 0x1bc │ │ eoreq r2, ip, r8, ror #22 │ │ ldr r0, [pc, #1720] @ 24981a4 │ │ mov r1, #203 @ 0xcb │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #1708] @ 24981a8 │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1393146,16 +1393145,16 @@ │ │ ldr r0, [pc, #1648] @ 24981b4 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, r1, r1, lsl #2 │ │ add r2, lr, #840 @ 0x348 │ │ add r0, pc, r0 │ │ add r1, r2, r1, lsl #4 │ │ b 24973cc │ │ - ldc2l 11, cr8, [sl, #292] @ 0x124 @ │ │ - ldc2l 1, cr3, [r8, #840] @ 0x348 │ │ + ldc2l 11, cr8, [sl, #472] @ 0x1d8 @ │ │ + ldc2l 1, cr3, [r8, #1020] @ 0x3fc │ │ ldr r1, [pc, #1684] @ 24981fc │ │ sub lr, fp, #2048 @ 0x800 │ │ ldr r0, [fp, #8] │ │ sub r2, lr, #152 @ 0x98 │ │ add r1, pc, r1 │ │ sub r3, fp, #376 @ 0x178 │ │ bl 270fb80 │ │ @@ -1393177,16 +1393176,16 @@ │ │ ldr r4, [pc, #1604] @ 2498204 │ │ ldr r5, [pc, #1604] @ 2498208 │ │ ldr r6, [pc, #1604] @ 249820c │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ add r6, pc, r6 │ │ b 2497bfc │ │ - ldc2l 10, cr8, [sl, #884] @ 0x374 @ │ │ - ldc2l 1, cr3, [r8, #408] @ 0x198 │ │ + ldc2l 11, cr8, [sl, #40] @ 0x28 @ │ │ + ldc2l 1, cr3, [r8, #588] @ 0x24c │ │ add r1, r9, r1, lsl #3 │ │ mov r0, r4 │ │ bl 270d130 │ │ ldr r1, [fp, #-1076] @ 0xfffffbcc │ │ add r0, r1, #1 │ │ cmp r1, #3 │ │ str r0, [fp, #-1076] @ 0xfffffbcc │ │ @@ -1393197,18 +1393196,18 @@ │ │ bgt 2497bdc │ │ mov r0, r5 │ │ mov r2, r6 │ │ movw r3, #2255 @ 0x8cf │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2497bdc │ │ - ldc2l 10, cr8, [sl, #516] @ 0x204 @ │ │ - ldc2l 1, cr3, [r8, #40] @ 0x28 │ │ - ldc2l 10, cr8, [sl, #148] @ 0x94 @ │ │ - ldc2l 0, cr3, [r8, #696] @ 0x2b8 │ │ + ldc2l 10, cr8, [sl, #696] @ 0x2b8 @ │ │ + ldc2l 1, cr3, [r8, #220] @ 0xdc │ │ + ldc2l 10, cr8, [sl, #328] @ 0x148 @ │ │ + ldc2l 0, cr3, [r8, #876] @ 0x36c │ │ ldrdeq r2, [ip], -r4 @ │ │ ldr r0, [sp, #72] @ 0x48 │ │ sub r1, fp, #484 @ 0x1e4 │ │ add lr, sp, #1024 @ 0x400 │ │ str r0, [sp] │ │ add r3, r1, #4 │ │ add r0, lr, #120 @ 0x78 │ │ @@ -1393239,17 +1393238,17 @@ │ │ add r1, sp, #160 @ 0xa0 │ │ ldr r2, [pc, #1288] @ 24981c4 │ │ add r2, pc, r2 │ │ str r2, [sp] │ │ str r0, [sp, #4] │ │ sub r0, fp, #376 @ 0x178 │ │ b 2497984 │ │ - ldc2l 9, cr8, [sl, #418] @ 0x1a2 @ │ │ - ldc2l 0, cr3, [r8, #360] @ 0x168 │ │ - ldc2l 6, cr10, [sl, #392] @ 0x188 │ │ + ldc2l 9, cr8, [sl, #508] @ 0x1fc @ │ │ + ldc2l 0, cr3, [r8, #540] @ 0x21c │ │ + ldc2l 6, cr10, [sl, #572] @ 0x23c │ │ eoreq r2, ip, r4, ror #18 │ │ ldr r0, [pc, #1160] @ 249816c │ │ mov r1, #452 @ 0x1c4 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #1148] @ 2498170 │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1393266,18 +1393265,18 @@ │ │ bl 270da90 │ │ mov r0, r4 │ │ mov r1, r5 │ │ mov r2, #1 │ │ mov r3, #32 │ │ bl 270d9f0 │ │ b 24980c8 │ │ - ldc2l 11, cr14, [r7, #520] @ 0x208 @ │ │ + ldc2l 11, cr14, [r7, #700] @ 0x2bc @ │ │ eoreq r2, ip, r0, lsl r9 │ │ strdeq r2, [ip], -r8 @ │ │ - ldc2l 15, cr2, [r8, #600] @ 0x258 │ │ + ldc2l 15, cr2, [r8, #780] @ 0x30c │ │ ldr r0, [pc, #1060] @ 2498174 │ │ movw r1, #329 @ 0x149 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #1048] @ 2498178 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #808 @ 0x328 │ │ @@ -1393307,15 +1393306,15 @@ │ │ ldr r0, [pc, #920] @ 2498160 │ │ add r0, pc, r0 │ │ b 2498090 │ │ ldr r0, [pc, #840] @ 249811c │ │ mov r1, #168 @ 0xa8 │ │ add r0, pc, r0 │ │ b 2497fb4 │ │ - ldc2l 8, cr2, [sl, #220] @ 0xdc │ │ + vcadd.f32 q9, q5, q10, #270 │ │ ldr r0, [sp, #64] @ 0x40 │ │ sub r1, fp, #1072 @ 0x430 │ │ add r2, sp, #84 @ 0x54 │ │ mov r3, #36 @ 0x24 │ │ bl 270cd90 │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r0, #0 │ │ @@ -1393324,15 +1393323,15 @@ │ │ sub r1, fp, #1072 @ 0x430 │ │ mov r2, #36 @ 0x24 │ │ bl 270daa0 │ │ ldr r0, [pc, #756] @ 249810c │ │ mov r1, #212 @ 0xd4 │ │ add r0, pc, r0 │ │ b 2498030 │ │ - ldc2l 13, cr0, [r9, #316] @ 0x13c │ │ + ldc2l 13, cr0, [r9, #496] @ 0x1f0 │ │ strhteq r2, [ip], -r7 │ │ ldr r0, [pc, #1024] @ 2498230 │ │ mov r1, #215 @ 0xd7 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #1012] @ 2498234 │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1393340,15 +1393339,15 @@ │ │ mov r2, #1 │ │ add r4, pc, r4 │ │ mov r3, #32 │ │ mov r0, r4 │ │ bl 270d9f0 │ │ sub r1, fp, #472 @ 0x1d8 │ │ b 24973c8 │ │ - ldc2l 15, cr2, [r8, #608] @ 0x260 │ │ + ldc2l 15, cr2, [r8, #788] @ 0x314 │ │ sub r4, fp, #1824 @ 0x720 │ │ sub r0, fp, #376 @ 0x178 │ │ mov r1, r4 │ │ bl 270dde0 │ │ sub r9, fp, #1072 @ 0x430 │ │ add r1, sp, #160 @ 0xa0 │ │ mov r0, r4 │ │ @@ -1393362,15 +1393361,15 @@ │ │ ldr r4, [pc, #876] @ 2498210 │ │ ldr r5, [pc, #876] @ 2498214 │ │ ldr r8, [pc, #876] @ 2498218 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ add r8, pc, r8 │ │ b 2497ee4 │ │ - ldc2l 12, cr8, [r8, #664] @ 0x298 │ │ + ldc2l 12, cr8, [r8, #844] @ 0x34c │ │ strhteq r2, [ip], -r0 │ │ ldr r2, [sp, #72] @ 0x48 │ │ add r0, r9, r7, lsl #3 │ │ add r1, r2, r1, lsl #3 │ │ bl 270efa0 │ │ ldr r1, [fp, #-1076] @ 0xfffffbcc │ │ add r0, r1, #1 │ │ @@ -1393397,15 +1393396,15 @@ │ │ bcc 2497ec0 │ │ mov r0, r4 │ │ mov r2, r5 │ │ movw r3, #2273 @ 0x8e1 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2497ec0 │ │ - ldc2l 11, cr0, [r9, #860] @ 0x35c @ │ │ + ldc2l 12, cr0, [r9, #16] │ │ ldr r0, [pc, #560] @ 2498180 │ │ movw r1, #322 @ 0x142 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #548] @ 2498184 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #808 @ 0x328 │ │ @@ -1393419,17 +1393418,17 @@ │ │ add r1, lr, #171 @ 0xab │ │ mov r2, #1 │ │ mov r3, #5 │ │ bl 270d9f0 │ │ ldr r0, [pc, #496] @ 2498188 │ │ add r0, pc, r0 │ │ b 2494f20 │ │ - ldc2l 13, cr2, [r8, #664] @ 0x298 │ │ - ldc2l 14, cr2, [r8, #384] @ 0x180 │ │ - ldc2l 13, cr2, [r8, #488] @ 0x1e8 │ │ + ldc2l 13, cr2, [r8, #844] @ 0x34c │ │ + ldc2l 14, cr2, [r8, #564] @ 0x234 │ │ + ldc2l 13, cr2, [r8, #668] @ 0x29c │ │ ldr r0, [pc, #404] @ 2498144 │ │ mov r1, #169 @ 0xa9 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #352] @ 2498120 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #808 @ 0x328 │ │ @@ -1393438,17 +1393437,17 @@ │ │ mov r3, #32 │ │ mov r0, r4 │ │ bl 270d9f0 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #840 @ 0x348 │ │ b 24973c8 │ │ eoreq r2, ip, r8, lsl #13 │ │ - ldc2l 13, cr1, [fp, #872] @ 0x368 │ │ - ldc2l 13, cr2, [r8, #120] @ 0x78 │ │ - ldc2l 13, cr1, [fp, #552] @ 0x228 │ │ + ldc2l 14, cr1, [fp, #28] │ │ + ldc2l 13, cr2, [r8, #300] @ 0x12c │ │ + ldc2l 13, cr1, [fp, #732] @ 0x2dc │ │ ldr r0, [sp, #64] @ 0x40 │ │ sub r1, fp, #1072 @ 0x430 │ │ add r2, sp, #84 @ 0x54 │ │ mov r3, #36 @ 0x24 │ │ bl 270cd90 │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r0, #0 │ │ @@ -1393474,17 +1393473,17 @@ │ │ mov r2, #1 │ │ mov r3, #36 @ 0x24 │ │ mov r1, r5 │ │ bl 270d9f0 │ │ ldr r1, [pc, #160] @ 2498114 │ │ add r1, pc, r1 │ │ b 2497464 │ │ - ldc2l 12, cr2, [r8, #824] @ 0x338 │ │ - ldc2l 10, cr12, [r8, #768] @ 0x300 @ │ │ - ldc2l 14, cr11, [r8, #4] │ │ + ldc2l 12, cr2, [r8, #1004] @ 0x3ec │ │ + ldc2l 10, cr12, [r8, #948] @ 0x3b4 @ │ │ + ldc2l 14, cr11, [r8, #184] @ 0xb8 │ │ ldc2l 13, cr5, [fp, #948] @ 0x3b4 │ │ ldr r0, [pc, #252] @ 249818c │ │ add r0, pc, r0 │ │ movw r1, #310 @ 0x136 │ │ bl 270d990 │ │ ldr r4, [pc, #196] @ 2498164 │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1393499,101 +1393498,101 @@ │ │ mov r2, #1 │ │ bl 270da90 │ │ ldr r0, [pc, #152] @ 2498168 │ │ mov r1, #24 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 2494a44 │ │ - ldc2l 9, cr2, [r9, #146] @ 0x92 @ │ │ + ldc2l 9, cr2, [r9, #236] @ 0xec @ │ │ eoreq r2, ip, r4, lsr r5 │ │ - ldc2l 7, cr14, [r7, #188] @ 0xbc │ │ - ldc2l 3, cr4, [sl, #812] @ 0x32c │ │ - ldc2l 9, cr3, [fp, #506] @ 0x1fa @ │ │ - ldc2l 11, cr15, [sl, #660] @ 0x294 @ │ │ - ldc2l 10, cr11, [r8, #564] @ 0x234 @ │ │ - ldc2l 0, cr4, [sl, #528] @ 0x210 │ │ - ldc2l 5, cr14, [r8, #364] @ 0x16c │ │ + ldc2l 7, cr14, [r7, #368] @ 0x170 │ │ + ldc2l 3, cr4, [sl, #992] @ 0x3e0 │ │ + ldc2l 10, cr3, [fp, #168] @ 0xa8 @ │ │ + ldc2l 11, cr15, [sl, #840] @ 0x348 @ │ │ + ldc2l 10, cr11, [r8, #744] @ 0x2e8 @ │ │ + ldc2l 0, cr4, [sl, #708] @ 0x2c4 │ │ + ldc2l 5, cr14, [r8, #544] @ 0x220 │ │ eoreq r2, ip, r8, lsl #2 │ │ - ldc2l 0, cr10, [r9, #492] @ 0x1ec │ │ + ldc2l 0, cr10, [r9, #672] @ 0x2a0 │ │ streq r8, [r5], #1320 @ 0x528 │ │ - ldc2l 11, cr1, [r9, #912] @ 0x390 @ │ │ - ldc2l 14, cr10, [r8, #500] @ 0x1f4 │ │ - ldc2l 5, cr9, [r9, #748] @ 0x2ec │ │ - ldc2l 15, cr11, [r7, #276] @ 0x114 │ │ - ldc2l 14, cr3, [r9, #296] @ 0x128 │ │ - ldc2l 14, cr10, [r8, #996] @ 0x3e4 │ │ - ldc2l 3, cr14, [r8, #20] │ │ + ldc2l 12, cr1, [r9, #68] @ 0x44 │ │ + ldc2l 14, cr10, [r8, #680] @ 0x2a8 │ │ + ldc2l 5, cr9, [r9, #928] @ 0x3a0 │ │ + ldc2l 15, cr11, [r7, #456] @ 0x1c8 │ │ + ldc2l 14, cr3, [r9, #476] @ 0x1dc │ │ + ldc2l 15, cr10, [r8, #152] @ 0x98 │ │ + ldc2l 3, cr14, [r8, #200] @ 0xc8 │ │ eoreq r1, ip, r8, lsr #29 │ │ - ldc2l 14, cr9, [r9, #108] @ 0x6c │ │ + ldc2l 14, cr9, [r9, #288] @ 0x120 │ │ streq r8, [r5], #712 @ 0x2c8 │ │ - ldc2l 10, cr15, [r8, #464] @ 0x1d0 @ │ │ + ldc2l 10, cr15, [r8, #644] @ 0x284 @ │ │ eoreq r1, ip, r8, lsr lr │ │ eoreq r1, ip, ip, lsl lr │ │ eoreq r1, ip, ip, lsl #28 │ │ - ldc2l 3, cr15, [r9, #140] @ 0x8c │ │ + ldc2l 3, cr15, [r9, #320] @ 0x140 │ │ eoreq r1, ip, ip, ror #27 │ │ streq r8, [r5], #1252 @ 0x4e4 │ │ eoreq r1, ip, ip, lsl sp │ │ - ldc2l 15, cr1, [sl, #268] @ 0x10c │ │ - ldc2l 9, cr11, [r8, #426] @ 0x1aa @ │ │ - ldc2l 15, cr3, [sl, #796] @ 0x31c │ │ - ldc2l 6, cr11, [r7, #164] @ 0xa4 │ │ - ldc2l 14, cr10, [r8, #100] @ 0x64 │ │ + ldc2l 15, cr1, [sl, #448] @ 0x1c0 │ │ + ldc2l 10, cr11, [r8, #8] @ │ │ + ldc2l 15, cr3, [sl, #976] @ 0x3d0 │ │ + ldc2l 6, cr11, [r7, #344] @ 0x158 │ │ + ldc2l 14, cr10, [r8, #280] @ 0x118 │ │ ldc2l 6, cr6, [fp, #172] @ 0xac │ │ - ldc2l 10, cr13, [r7, #292] @ 0x124 @ │ │ - ldc2l 1, cr11, [r8, #788] @ 0x314 │ │ - ldc2l 7, cr1, [sl, #596] @ 0x254 │ │ - ldc2l 1, cr11, [r8, #356] @ 0x164 │ │ + ldc2l 10, cr13, [r7, #472] @ 0x1d8 @ │ │ + ldc2l 1, cr11, [r8, #968] @ 0x3c8 │ │ + ldc2l 7, cr1, [sl, #776] @ 0x308 │ │ + ldc2l 1, cr11, [r8, #536] @ 0x218 │ │ ldc2l 7, cr8, [fp, #892] @ 0x37c │ │ - ldc2l 14, cr15, [r7, #520] @ 0x208 │ │ - ldc2l 15, cr10, [r8, #356] @ 0x164 │ │ - ldc2l 4, cr13, [r8, #684] @ 0x2ac │ │ - ldc2l 11, cr9, [r8, #128] @ 0x80 @ │ │ + ldc2l 14, cr15, [r7, #700] @ 0x2bc │ │ + ldc2l 15, cr10, [r8, #536] @ 0x218 │ │ + ldc2l 4, cr13, [r8, #864] @ 0x360 │ │ + ldc2l 11, cr9, [r8, #308] @ 0x134 @ │ │ eoreq r2, ip, pc │ │ eoreq r2, ip, ip, lsr r0 │ │ - ldc2l 10, cr15, [sl, #440] @ 0x1b8 @ │ │ - ldc2l 7, cr11, [r8, #612] @ 0x264 │ │ - vcadd.f32 , q5, , #270 │ │ - ldc2l 5, cr15, [sl, #792] @ 0x318 │ │ - ldc2l 3, cr11, [r8, #756] @ 0x2f4 │ │ + ldc2l 10, cr15, [sl, #620] @ 0x26c @ │ │ + ldc2l 7, cr11, [r8, #792] @ 0x318 │ │ + ldc2l 8, cr11, [sl, #464] @ 0x1d0 │ │ + ldc2l 5, cr15, [sl, #972] @ 0x3cc │ │ + ldc2l 3, cr11, [r8, #936] @ 0x3a8 │ │ ldc2l 12, cr6, [fp, #916] @ 0x394 │ │ - ldc2l 2, cr2, [r8, #104] @ 0x68 │ │ - ldc2l 3, cr11, [r8, #468] @ 0x1d4 │ │ + ldc2l 2, cr2, [r8, #284] @ 0x11c │ │ + ldc2l 3, cr11, [r8, #648] @ 0x288 │ │ streq r8, [r5], #472 @ 0x1d8 │ │ eoreq r1, ip, ip, lsl #20 │ │ streq r8, [r5], #424 @ 0x1a8 │ │ ldrdeq r1, [ip], -r8 @ │ │ - ldc2l 13, cr7, [sl, #896] @ 0x380 │ │ - ldc2l 5, cr11, [r8, #804] @ 0x324 │ │ - ldc2l 3, cr13, [sl, #452] @ 0x1c4 │ │ + ldc2l 14, cr7, [sl, #52] @ 0x34 │ │ + ldc2l 5, cr11, [r8, #984] @ 0x3d8 │ │ + ldc2l 3, cr13, [sl, #632] @ 0x278 │ │ eoreq r2, ip, r0, lsl r4 │ │ strdeq r2, [ip], -r4 @ │ │ ldc2l 2, cr9, [fp, #964] @ 0x3c4 │ │ - ldc2l 10, cr2, [r8, #568] @ 0x238 @ │ │ - ldc2l 11, cr1, [fp, #52] @ 0x34 @ │ │ - ldc2l 10, cr2, [r8, #296] @ 0x128 @ │ │ + ldc2l 10, cr2, [r8, #748] @ 0x2ec @ │ │ + ldc2l 11, cr1, [fp, #232] @ 0xe8 @ │ │ + ldc2l 10, cr2, [r8, #476] @ 0x1dc @ │ │ eoreq r2, ip, ip, lsl r3 │ │ eoreq r1, ip, r4, lsr #24 │ │ - ldc2l 9, cr11, [r9, #48] @ 0x30 @ │ │ - ldc2l 2, cr2, [r8, #840] @ 0x348 │ │ + ldc2l 9, cr11, [r9, #138] @ 0x8a @ │ │ + ldc2l 2, cr2, [r8, #1020] @ 0x3fc │ │ streq r8, [r5], #716 @ 0x2cc │ │ strdeq r1, [ip], -r8 @ │ │ ldrdeq r1, [ip], -r0 @ │ │ - ldc2l 0, cr13, [sl, #952] @ 0x3b8 │ │ - ldc2l 1, cr2, [r8, #504] @ 0x1f8 │ │ - ldc2l 4, cr11, [r9, #912] @ 0x390 │ │ - ldc2l 14, cr1, [r8, #632] @ 0x278 │ │ + ldc2l 1, cr13, [sl, #108] @ 0x6c │ │ + ldc2l 1, cr2, [r8, #684] @ 0x2ac │ │ + ldc2l 5, cr11, [r9, #68] @ 0x44 │ │ + ldc2l 14, cr1, [r8, #812] @ 0x32c │ │ ldc2l 7, cr8, [fp] │ │ eoreq r1, ip, ip, asr #25 │ │ - ldc2l 9, cr11, [r9, #384] @ 0x180 @ │ │ - ldc2l 3, cr2, [r8, #488] @ 0x1e8 │ │ - ldc2l 2, cr8, [sl, #488] @ 0x1e8 │ │ - ldc2l 11, cr11, [r8, #68] @ 0x44 @ │ │ - ldc2l 15, cr1, [r8, #144] @ 0x90 │ │ - ldc2l 0, cr11, [r8, #484] @ 0x1e4 │ │ + ldc2l 9, cr11, [r9, #474] @ 0x1da @ │ │ + ldc2l 3, cr2, [r8, #668] @ 0x29c │ │ + ldc2l 2, cr8, [sl, #668] @ 0x29c │ │ + ldc2l 11, cr11, [r8, #248] @ 0xf8 @ │ │ + ldc2l 15, cr1, [r8, #324] @ 0x144 │ │ + ldc2l 0, cr11, [r8, #664] @ 0x298 │ │ │ │ 02498238 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #148 @ 0x94 │ │ mov r5, r3 │ │ mov sl, r2 │ │ @@ -1394000,43 +1393999,43 @@ │ │ mov r2, #1 │ │ mov r3, #32 │ │ bl 270d9f0 │ │ ldr r0, [pc, #100] @ 2498904 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ b 2498824 │ │ - ldc2l 9, cr15, [r8, #44] @ 0x2c @ │ │ - ldc2l 4, cr13, [r7, #132] @ 0x84 │ │ - ldc2l 11, cr10, [r8, #756] @ 0x2f4 @ │ │ - ldc2l 14, cr12, [r9, #192] @ 0xc0 │ │ - ldc2l 11, cr10, [r8, #132] @ 0x84 @ │ │ + ldc2l 9, cr15, [r8, #134] @ 0x86 @ │ │ + ldc2l 4, cr13, [r7, #312] @ 0x138 │ │ + ldc2l 11, cr10, [r8, #936] @ 0x3a8 @ │ │ + ldc2l 14, cr12, [r9, #372] @ 0x174 │ │ + ldc2l 11, cr10, [r8, #312] @ 0x138 @ │ │ strhteq r1, [ip], -ip │ │ - ldc2l 13, cr8, [sl, #244] @ 0xf4 │ │ - ldc2l 10, cr10, [r8, #516] @ 0x204 @ │ │ + ldc2l 13, cr8, [sl, #424] @ 0x1a8 │ │ + ldc2l 10, cr10, [r8, #696] @ 0x2b8 @ │ │ strdeq r1, [ip], -r8 @ │ │ - ldc2l 13, cr14, [r9, #980] @ 0x3d4 │ │ - ldc2l 2, cr13, [r7, #180] @ 0xb4 │ │ - ldc2l 9, cr10, [r8, #434] @ 0x1b2 @ │ │ - ldc2l 12, cr12, [r9, #256] @ 0x100 │ │ - ldc2l 9, cr10, [r8, #98] @ 0x62 @ │ │ + ldc2l 14, cr14, [r9, #136] @ 0x88 │ │ + ldc2l 2, cr13, [r7, #360] @ 0x168 │ │ + ldc2l 10, cr10, [r8, #24] @ │ │ + ldc2l 12, cr12, [r9, #436] @ 0x1b4 │ │ + ldc2l 9, cr10, [r8, #188] @ 0xbc @ │ │ ldrdeq r1, [ip], -r4 @ │ │ ldc2l 14, cr7, [fp, #52] @ 0x34 │ │ - ldc2l 10, cr2, [r9, #244] @ 0xf4 @ │ │ - ldc2l 6, cr15, [r7, #180] @ 0xb4 │ │ - ldc2l 7, cr10, [r8, #932] @ 0x3a4 │ │ - ldc2l 1, cr3, [r8, #436] @ 0x1b4 │ │ + ldc2l 10, cr2, [r9, #424] @ 0x1a8 @ │ │ + ldc2l 6, cr15, [r7, #360] @ 0x168 │ │ + ldc2l 8, cr10, [r8, #88] @ 0x58 │ │ + ldc2l 1, cr3, [r8, #616] @ 0x268 │ │ eoreq r1, ip, r0, lsl #1 │ │ - ldc2l 2, cr1, [r9, #580] @ 0x244 │ │ - ldc2l 6, cr10, [r8, #372] @ 0x174 │ │ + ldc2l 2, cr1, [r9, #760] @ 0x2f8 │ │ + ldc2l 6, cr10, [r8, #552] @ 0x228 │ │ ldc2l 6, cr4, [fp, #56] @ 0x38 │ │ eoreq r0, ip, ip, lsl #31 │ │ - ldc2l 1, cr5, [r8, #356] @ 0x164 │ │ - ldc2l 7, cr10, [r8, #324] @ 0x144 │ │ - ldc2l 8, cr6, [sl, #872] @ 0x368 │ │ - ldc2l 3, cr15, [r8, #312] @ 0x138 │ │ + ldc2l 1, cr5, [r8, #536] @ 0x218 │ │ + ldc2l 7, cr10, [r8, #504] @ 0x1f8 │ │ + ldc2l 9, cr6, [sl, #14] @ │ │ + ldc2l 3, cr15, [r8, #492] @ 0x1ec │ │ │ │ 0249891c : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #336 @ 0x150 │ │ mov r3, #320 @ 0x140 │ │ add r4, sp, #16 │ │ @@ -1394066,17 +1394065,17 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 4, cr14, [r7, #748] @ 0x2ec │ │ - ldc2l 13, cr6, [sl, #816] @ 0x330 │ │ - ldc2l 13, cr4, [r9, #208] @ 0xd0 │ │ + ldc2l 4, cr14, [r7, #928] @ 0x3a0 │ │ + ldc2l 13, cr6, [sl, #996] @ 0x3e4 │ │ + ldc2l 13, cr4, [r9, #388] @ 0x184 │ │ │ │ 024989b4 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #24 │ │ mov r4, r3 │ │ mov r6, r2 │ │ @@ -1394111,16 +1394110,16 @@ │ │ mov r1, #8 │ │ vstr d16, [r4] │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 14, cr6, [r9, #168] @ 0xa8 │ │ - ldc2l 13, cr6, [r9, #840] @ 0x348 │ │ + ldc2l 14, cr6, [r9, #348] @ 0x15c │ │ + ldc2l 13, cr6, [r9, #1020] @ 0x3fc │ │ │ │ 02498a5c : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #24 │ │ vldr d16, [r3] │ │ vcmp.f64 d16, #0.0 │ │ @@ -1394154,17 +1394153,17 @@ │ │ vdiv.f64 d16, d18, d16 │ │ vstr d17, [sp, #8] │ │ vstr d16, [sp, #16] │ │ bl 270f640 │ │ mov r0, #0 │ │ sub sp, fp, #8 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 2, cr9, [r8, #396] @ 0x18c │ │ - ldc2l 9, cr12, [r9, #176] @ 0xb0 @ │ │ - ldc2l 10, cr4, [r8, #272] @ 0x110 @ │ │ + ldc2l 2, cr9, [r8, #576] @ 0x240 │ │ + ldc2l 9, cr12, [r9, #266] @ 0x10a @ │ │ + ldc2l 10, cr4, [r8, #452] @ 0x1c4 @ │ │ │ │ 02498b04 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r7, r3 │ │ mov r4, r2 │ │ @@ -1394210,16 +1394209,16 @@ │ │ ldr r0, [pc, #24] @ 2498bd4 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 8, cr14, [sl, #960] @ 0x3c0 │ │ - vcadd.f32 q15, q5, q14, #270 │ │ + ldc2l 9, cr14, [sl, #58] @ 0x3a @ │ │ + ldc2l 8, cr14, [sl, #612] @ 0x264 │ │ │ │ 02498bd8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d15} │ │ sub sp, sp, #520 @ 0x208 │ │ @@ -1395245,27 +1395244,27 @@ │ │ movw r3, #1457 @ 0x5b1 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2499afc │ │ vldr d16, [fp, #-240] @ 0xffffff10 │ │ vldr d17, [fp, #-272] @ 0xfffffef0 │ │ b 24999e8 │ │ - ldc2l 15, cr1, [fp, #120] @ 0x78 │ │ + ldc2l 15, cr1, [fp, #300] @ 0x12c │ │ vmov.f64 d12, d15 │ │ mov r0, #1 │ │ str r0, [fp, #-212] @ 0xffffff2c │ │ vmov.f64 d15, d8 │ │ vmov.f64 d8, #112 @ 0x3f800000 1.0 │ │ vldr d16, [fp, #-240] @ 0xffffff10 │ │ vstr d16, [fp, #-280] @ 0xfffffee8 │ │ b 2499c58 │ │ eoreq r0, ip, ip, asr sl │ │ - ldc2l 14, cr15, [r7, #616] @ 0x268 │ │ - ldc2l 10, cr4, [r9, #304] @ 0x130 @ │ │ - ldc2l 2, cr10, [r8, #164] @ 0xa4 │ │ + ldc2l 14, cr15, [r7, #796] @ 0x31c │ │ + ldc2l 10, cr4, [r9, #484] @ 0x1e4 @ │ │ + ldc2l 2, cr10, [r8, #344] @ 0x158 │ │ sub r0, fp, #208 @ 0xd0 │ │ add r0, r0, r1, lsl #3 │ │ vldr d16, [r0] │ │ vdiv.f64 d9, d16, d9 │ │ add r0, sp, #144 @ 0x90 │ │ ldr r2, [fp, #-212] @ 0xffffff2c │ │ add r0, r0, r1, lsl #3 │ │ @@ -1395339,18 +1395338,18 @@ │ │ mov r2, r9 │ │ movw r3, #1533 @ 0x5fd │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 2499c38 │ │ ldc2l 3, cr9, [r7, #240] @ 0xf0 │ │ - ldc2l 13, cr12, [r8, #260] @ 0x104 │ │ + ldc2l 13, cr12, [r8, #440] @ 0x1b8 │ │ ldc2l 2, cr9, [r7, #848] @ 0x350 │ │ - ldc2l 12, cr12, [r8, #868] @ 0x364 │ │ - ldc2l 7, cr3, [r8, #288] @ 0x120 │ │ + ldc2l 13, cr12, [r8, #24] │ │ + ldc2l 7, cr3, [r8, #468] @ 0x1d4 │ │ ldr r0, [sp, #92] @ 0x5c │ │ mov r1, #0 │ │ bic r0, r0, #1 │ │ sub r0, r0, #2 │ │ clz r0, r0 │ │ lsr r0, r0, #5 │ │ and r0, r4, r0 │ │ @@ -1395411,16 +1395410,16 @@ │ │ vmrs APSR_nzcv, fpscr │ │ ble 2499f2c │ │ vcmp.f64 d17, #0.0 │ │ vmrs APSR_nzcv, fpscr │ │ vmov.i32 d18, #0 @ 0x00000000 │ │ vmovls.f64 d17, d18 │ │ b 2499edc │ │ - ldc2l 6, cr3, [r8, #80] @ 0x50 │ │ - ldc2l 11, cr12, [r8, #612] @ 0x264 @ │ │ + ldc2l 6, cr3, [r8, #260] @ 0x104 │ │ + ldc2l 11, cr12, [r8, #792] @ 0x318 @ │ │ ldr r0, [sp, #44] @ 0x2c │ │ cmp r0, #0 │ │ beq 2499f2c │ │ vldr d21, [sp, #32] │ │ vdiv.f64 d19, d19, d21 │ │ vldr d21, [sp, #48] @ 0x30 │ │ vstr d19, [sp, #224] @ 0xe0 │ │ @@ -1395636,15 +1395635,15 @@ │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r2, [fp, #-212] @ 0xffffff2c │ │ mov r1, r0 │ │ add r3, sp, #120 @ 0x78 │ │ b 249a160 │ │ ldc2l 14, cr8, [r7, #512] @ 0x200 │ │ - ldc2l 8, cr1, [fp, #452] @ 0x1c4 │ │ + ldc2l 8, cr1, [fp, #632] @ 0x278 │ │ add r1, sp, #264 @ 0x108 │ │ mov r0, r3 │ │ mov r7, r2 │ │ bl 270f820 │ │ mov r0, r7 │ │ bl 270f040 │ │ vcmp.f64 d15, #0.0 │ │ @@ -1395778,15 +1395777,15 @@ │ │ beq 249a714 │ │ add r0, r7, #1 │ │ cmp r7, #6 │ │ vstr d9, [sp, #16] │ │ vstr d10, [sp, #24] │ │ bcc 2498f58 │ │ b 249a718 │ │ - ldc2l 6, cr1, [fp, #756] @ 0x2f4 │ │ + ldc2l 6, cr1, [fp, #936] @ 0x3a8 │ │ ldc2l 12, cr8, [r7, #224] @ 0xe0 │ │ ldc2l 11, cr8, [r7, #768] @ 0x300 @ │ │ ldr r0, [pc, #1032] @ 249a864 │ │ mov r1, #92 @ 0x5c │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [fp, #-212] @ 0xffffff2c │ │ @@ -1395835,15 +1395834,15 @@ │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #96 @ 0x60 │ │ vpop {d8-d15} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 5, cr1, [fp, #884] @ 0x374 │ │ + ldc2l 6, cr1, [fp, #40] @ 0x28 │ │ ldr r0, [pc, #844] @ 249a884 │ │ mov r1, #137 @ 0x89 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [fp, #-212] @ 0xffffff2c │ │ sub r1, r0, #1 │ │ cmp r1, #3 │ │ @@ -1395899,15 +1395898,15 @@ │ │ sub r1, fp, #212 @ 0xd4 │ │ mov r2, #1 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270da90 │ │ sub r1, fp, #232 @ 0xe8 │ │ b 249a6f8 │ │ - ldc2l 14, cr9, [r7, #640] @ 0x280 │ │ + ldc2l 14, cr9, [r7, #820] @ 0x334 │ │ ldc2l 10, cr8, [r7, #208] @ 0xd0 @ │ │ ldr r0, [pc, #616] @ 249a8a4 │ │ mov r1, #187 @ 0xbb │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #604] @ 249a8a8 │ │ mov r2, #1 │ │ @@ -1395979,15 +1395978,15 @@ │ │ add sl, pc, sl │ │ ldr r8, [pc, #444] @ 249a918 │ │ add r5, pc, r5 │ │ add r9, pc, r9 │ │ vldr d9, [sp, #16] │ │ add r8, pc, r8 │ │ b 249a78c │ │ - ldc2l 13, cr9, [r7, #640] @ 0x280 │ │ + ldc2l 13, cr9, [r7, #820] @ 0x334 │ │ ldr r2, [fp, #-212] @ 0xffffff2c │ │ add r0, r6, r1, lsl #3 │ │ vstr d8, [r0] │ │ add r0, r2, #1 │ │ cmp r2, #3 │ │ str r0, [fp, #-212] @ 0xffffff2c │ │ bge 249a804 │ │ @@ -1396041,61 +1396040,61 @@ │ │ bl 270da60 │ │ add r1, r5, #8 │ │ mov r0, r4 │ │ mov r2, #1 │ │ bl 270da60 │ │ add r1, r5, #16 │ │ b 249a6f8 │ │ - ldc2l 15, cr12, [r9, #780] @ 0x30c │ │ - ldc2l 2, cr5, [sl, #748] @ 0x2ec │ │ - ldc2l 6, cr11, [r8, #420] @ 0x1a4 │ │ - ldc2l 11, cr4, [sl, #848] @ 0x350 @ │ │ + ldc2l 15, cr12, [r9, #960] @ 0x3c0 │ │ + ldc2l 2, cr5, [sl, #928] @ 0x3a0 │ │ + ldc2l 6, cr11, [r8, #600] @ 0x258 │ │ + ldc2l 12, cr4, [sl, #4] │ │ ldc2l 12, cr7, [r7, #64] @ 0x40 │ │ - ldc2l 6, cr11, [r8, #84] @ 0x54 │ │ - ldc2l 11, cr4, [sl, #528] @ 0x210 @ │ │ - ldc2l 6, cr15, [r8, #632] @ 0x278 │ │ - ldc2l 14, cr6, [sl, #336] @ 0x150 │ │ - ldc2l 1, cr5, [sl, #892] @ 0x37c │ │ - ldc2l 5, cr11, [r8, #564] @ 0x234 │ │ - ldc2l 10, cr4, [sl, #992] @ 0x3e0 @ │ │ + ldc2l 6, cr11, [r8, #264] @ 0x108 │ │ + ldc2l 11, cr4, [sl, #708] @ 0x2c4 @ │ │ + ldc2l 6, cr15, [r8, #812] @ 0x32c │ │ + ldc2l 14, cr6, [sl, #516] @ 0x204 │ │ + ldc2l 2, cr5, [sl, #48] @ 0x30 │ │ + ldc2l 5, cr11, [r8, #744] @ 0x2e8 │ │ + ldc2l 11, cr4, [sl, #148] @ 0x94 @ │ │ eoreq pc, fp, r4, ror #6 │ │ - ldc2l 10, cr8, [sl, #116] @ 0x74 @ │ │ - ldc2l 0, cr7, [r9, #472] @ 0x1d8 │ │ - vcadd.f32 q12, q12, , #270 │ │ - ldc2l 8, cr13, [r7, #868] @ 0x364 │ │ - ldc2l 8, cr8, [r8, #452] @ 0x1c4 │ │ + ldc2l 10, cr8, [sl, #296] @ 0x128 @ │ │ + ldc2l 0, cr7, [r9, #652] @ 0x28c │ │ + ldc2l 9, cr8, [r8, #44] @ 0x2c @ │ │ + ldc2l 9, cr13, [r7, #12] @ │ │ + ldc2l 8, cr8, [r8, #632] @ 0x278 │ │ eoreq pc, fp, r4, lsr #5 │ │ eoreq pc, fp, r8, lsl #31 │ │ eoreq pc, fp, ip, ror #30 │ │ ldc2l 6, cr8, [r7, #816] @ 0x330 │ │ - ldc2l 10, cr9, [r7, #544] @ 0x220 @ │ │ - ldc2l 9, cr9, [r7, #288] @ 0x120 @ │ │ - ldc2l 12, cr3, [r8, #460] @ 0x1cc │ │ - ldc2l 14, cr11, [r8, #116] @ 0x74 │ │ - ldc2l 9, cr8, [sl, #454] @ 0x1c6 @ │ │ - vcadd.f32 d24, d24, d25, #270 │ │ - ldc2l 9, cr4, [sl, #204] @ 0xcc @ │ │ - ldc2l 6, cr0, [fp, #136] @ 0x88 │ │ - ldc2l 14, cr5, [r8, #432] @ 0x1b0 │ │ - ldc2l 11, cr3, [r8, #796] @ 0x31c @ │ │ - ldc2l 4, cr11, [r9, #208] @ 0xd0 │ │ - ldc2l 8, cr3, [r8, #748] @ 0x2ec │ │ - ldc2l 12, cr9, [sl, #408] @ 0x198 │ │ - ldc2l 5, cr15, [r9, #376] @ 0x178 │ │ - ldc2l 2, cr11, [r8, #848] @ 0x350 │ │ - ldc2l 6, cr8, [r8, #532] @ 0x214 │ │ - ldc2l 3, cr11, [r9, #48] @ 0x30 │ │ - ldc2l 7, cr3, [r8, #604] @ 0x25c │ │ - ldc2l 11, cr9, [sl, #296] @ 0x128 @ │ │ - ldc2l 4, cr15, [r9, #264] @ 0x108 │ │ - ldc2l 12, cr12, [sl, #892] @ 0x37c │ │ - ldc2l 3, cr11, [r8, #596] @ 0x254 │ │ - ldc2l 12, cr6, [sl, #744] @ 0x2e8 │ │ - ldc2l 15, cr4, [sl, #860] @ 0x35c │ │ - ldc2l 3, cr0, [fp, #104] @ 0x68 │ │ + ldc2l 10, cr9, [r7, #724] @ 0x2d4 @ │ │ + ldc2l 9, cr9, [r7, #378] @ 0x17a @ │ │ + ldc2l 12, cr3, [r8, #640] @ 0x280 │ │ + ldc2l 14, cr11, [r8, #296] @ 0x128 │ │ + ldc2l 10, cr8, [sl, #64] @ 0x40 @ │ │ + ldc2l 8, cr8, [r8, #856] @ 0x358 │ │ + ldc2l 9, cr4, [sl, #294] @ 0x126 @ │ │ + ldc2l 6, cr0, [fp, #316] @ 0x13c │ │ + ldc2l 14, cr5, [r8, #612] @ 0x264 │ │ + ldc2l 11, cr3, [r8, #976] @ 0x3d0 @ │ │ + ldc2l 4, cr11, [r9, #388] @ 0x184 │ │ + vcadd.f32 , q12, q12, #270 │ │ + ldc2l 12, cr9, [sl, #588] @ 0x24c │ │ + ldc2l 5, cr15, [r9, #556] @ 0x22c │ │ + ldc2l 3, cr11, [r8, #4] │ │ + ldc2l 6, cr8, [r8, #712] @ 0x2c8 │ │ + ldc2l 3, cr11, [r9, #228] @ 0xe4 │ │ + ldc2l 7, cr3, [r8, #784] @ 0x310 │ │ + ldc2l 11, cr9, [sl, #476] @ 0x1dc @ │ │ + ldc2l 4, cr15, [r9, #444] @ 0x1bc │ │ + ldc2l 13, cr12, [sl, #48] @ 0x30 │ │ + ldc2l 3, cr11, [r8, #776] @ 0x308 │ │ + ldc2l 12, cr6, [sl, #924] @ 0x39c │ │ + ldc2l 0, cr5, [sl, #16] │ │ + ldc2l 3, cr0, [fp, #284] @ 0x11c │ │ │ │ 0249a920 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ push {r1} @ (str r1, [sp, #-4]!) │ │ ldr r1, [r1] │ │ cmp r1, #1 │ │ @@ -1396392,22 +1396391,22 @@ │ │ ldr r0, [pc, #48] @ 249adcc │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - vcadd.f32 q9, q13, , #270 │ │ + ldc2l 9, cr2, [sl, #56] @ 0x38 @ │ │ eoreq lr, fp, r4, lsr #24 │ │ - ldc2l 14, cr12, [r8, #428] @ 0x1ac │ │ + ldc2l 14, cr12, [r8, #608] @ 0x260 │ │ eoreq lr, fp, r8, ror #25 │ │ - ldc2l 9, cr2, [r9, #280] @ 0x118 @ │ │ - ldc2l 1, cr8, [r8, #420] @ 0x1a4 │ │ - ldc2l 14, cr14, [r8, #72] @ 0x48 │ │ - ldc2l 7, cr2, [sl, #476] @ 0x1dc │ │ + ldc2l 9, cr2, [r9, #370] @ 0x172 @ │ │ + ldc2l 1, cr8, [r8, #600] @ 0x258 │ │ + ldc2l 14, cr14, [r8, #252] @ 0xfc │ │ + ldc2l 7, cr2, [sl, #656] @ 0x290 │ │ │ │ 0249add0 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #80 @ 0x50 │ │ vldr d16, [r0] │ │ vldr d18, [r0, #8] │ │ @@ -1396641,20 +1396640,20 @@ │ │ mov r2, r9 │ │ bl 270e790 │ │ add r0, sp, #40 @ 0x28 │ │ mov r1, r4 │ │ bl 270f000 │ │ strd r0, [sl] │ │ b 249b0dc │ │ - ldc2l 14, cr14, [r7, #564] @ 0x234 │ │ + ldc2l 14, cr14, [r7, #744] @ 0x2e8 │ │ eoreq lr, fp, r0, lsr #20 │ │ strhteq lr, [fp], -r8 │ │ eoreq lr, fp, r8, lsr #18 │ │ eoreq lr, fp, r4, lsr r9 │ │ - ldc2l 13, cr14, [r7, #340] @ 0x154 │ │ + ldc2l 13, cr14, [r7, #520] @ 0x208 │ │ │ │ 0249b194 : │ │ vldmia r1, {d16-d19} │ │ vmov.i32 d23, #0 @ 0x00000000 │ │ vldmia r0, {d20-d22} │ │ vldmia r2, {d24-d26} │ │ vmul.f64 d16, d20, d16 │ │ @@ -1396742,15 +1396741,15 @@ │ │ bl 270f670 │ │ mov r0, r8 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 4, cr4, [sl, #568] @ 0x238 │ │ + ldc2l 4, cr4, [sl, #748] @ 0x2ec │ │ │ │ 0249b2fc : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ vpush {d8} │ │ sub sp, sp, #88 @ 0x58 │ │ mov r4, r2 │ │ @@ -1396834,20 +1396833,20 @@ │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ vpop {d8} │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 12, cr12, [r7, #660] @ 0x294 │ │ - ldc2l 1, cr2, [sl, #264] @ 0x108 │ │ - ldc2l 12, cr3, [sl, #528] @ 0x210 │ │ - ldc2l 4, cr9, [sl, #816] @ 0x330 │ │ + ldc2l 12, cr12, [r7, #840] @ 0x348 │ │ + ldc2l 1, cr2, [sl, #444] @ 0x1bc │ │ + ldc2l 12, cr3, [sl, #708] @ 0x2c4 │ │ + ldc2l 4, cr9, [sl, #996] @ 0x3e4 │ │ eoreq lr, fp, r0, asr r6 │ │ - ldc2l 11, cr12, [r7, #548] @ 0x224 @ │ │ + ldc2l 11, cr12, [r7, #728] @ 0x2d8 @ │ │ │ │ 0249b478 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ ldr r7, [r2] │ │ cmp r7, #0 │ │ bmi 249b53c │ │ @@ -1397019,20 +1397018,20 @@ │ │ bge 249b5b4 │ │ b 249b6e8 │ │ mov r0, #0 │ │ sub sp, fp, #48 @ 0x30 │ │ vpop {d8-d9} │ │ add sp, sp, #4 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 1, cr15, [sl, #172] @ 0xac │ │ - ldc2l 12, cr7, [r9, #984] @ 0x3d8 │ │ + ldc2l 1, cr15, [sl, #352] @ 0x160 │ │ + ldc2l 13, cr7, [r9, #140] @ 0x8c │ │ ldc2l 1, cr3, [fp, #904] @ 0x388 │ │ - ldc2l 13, cr7, [r9, #280] @ 0x118 │ │ - ldc2l 3, cr9, [sl, #344] @ 0x158 │ │ - ldc2l 13, cr7, [r9, #712] @ 0x2c8 │ │ + ldc2l 13, cr7, [r9, #460] @ 0x1cc │ │ + ldc2l 3, cr9, [sl, #524] @ 0x20c │ │ + ldc2l 13, cr7, [r9, #892] @ 0x37c │ │ │ │ 0249b74c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #100 @ 0x64 │ │ mov r4, r3 │ │ mov r7, r2 │ │ @@ -1397292,35 +1397291,35 @@ │ │ ldr r0, [pc, #100] @ 249bbc0 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 14, cr5, [r9, #880] @ 0x370 │ │ - ldc2l 15, cr9, [r7, #36] @ 0x24 │ │ - ldc2l 6, cr7, [r8, #660] @ 0x294 │ │ - ldc2l 6, cr7, [r8, #420] @ 0x1a4 │ │ - ldc2l 13, cr9, [r7, #548] @ 0x224 │ │ - ldc2l 5, cr7, [r8, #212] @ 0xd4 │ │ - ldc2l 2, cr9, [sl, #676] @ 0x2a4 │ │ - ldc2l 4, cr7, [r8, #596] @ 0x254 │ │ - ldc2l 15, cr14, [sl, #892] @ 0x37c │ │ - ldc2l 8, cr5, [sl, #612] @ 0x264 │ │ - ldc2l 5, cr7, [r8, #884] @ 0x374 │ │ + ldc2l 15, cr5, [r9, #36] @ 0x24 │ │ + ldc2l 15, cr9, [r7, #216] @ 0xd8 │ │ + ldc2l 6, cr7, [r8, #840] @ 0x348 │ │ + ldc2l 6, cr7, [r8, #600] @ 0x258 │ │ + ldc2l 13, cr9, [r7, #728] @ 0x2d8 │ │ + ldc2l 5, cr7, [r8, #392] @ 0x188 │ │ + ldc2l 2, cr9, [sl, #856] @ 0x358 │ │ + ldc2l 4, cr7, [r8, #776] @ 0x308 │ │ + ldc2l 0, cr15, [sl, #48] @ 0x30 │ │ + vcadd.f32 , q13, q3, #270 │ │ + ldc2l 6, cr7, [r8, #40] @ 0x28 │ │ eoreq lr, fp, r0, lsr r1 │ │ - ldc2l 9, cr11, [r9, #162] @ 0xa2 @ │ │ + ldc2l 9, cr11, [r9, #252] @ 0xfc @ │ │ ldc2l 4, cr1, [fp, #400] @ 0x190 │ │ - ldc2l 4, cr7, [r8, #196] @ 0xc4 │ │ - ldc2l 13, cr15, [r7, #660] @ 0x294 │ │ + ldc2l 4, cr7, [r8, #376] @ 0x178 │ │ + ldc2l 13, cr15, [r7, #840] @ 0x348 │ │ eoreq sp, fp, r0, lsr #31 │ │ - ldc2l 14, cr15, [r7, #204] @ 0xcc │ │ - ldc2l 3, cr7, [r8, #532] @ 0x214 │ │ - ldc2l 5, cr3, [sl, #152] @ 0x98 │ │ - ldc2l 11, cr5, [r9] @ │ │ + ldc2l 14, cr15, [r7, #384] @ 0x180 │ │ + ldc2l 3, cr7, [r8, #712] @ 0x2c8 │ │ + ldc2l 5, cr3, [sl, #332] @ 0x14c │ │ + ldc2l 11, cr5, [r9, #180] @ 0xb4 @ │ │ │ │ 0249bbc4 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #100 @ 0x64 │ │ mov r5, r3 │ │ mov r7, r2 │ │ @@ -1397587,34 +1397586,34 @@ │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldc2l 11, cr4, [fp, #504] @ 0x1f8 @ │ │ - ldc2l 10, cr9, [r7, #564] @ 0x234 @ │ │ - ldc2l 2, cr7, [r8, #164] @ 0xa4 │ │ - ldc2l 1, cr7, [r8, #932] @ 0x3a4 │ │ - ldc2l 9, cr9, [r7, #26] @ │ │ - ldc2l 0, cr7, [r8, #740] @ 0x2e4 │ │ - ldc2l 0, cr7, [r8, #420] @ 0x1a4 │ │ - ldc2l 6, cr7, [r7, #548] @ 0x224 │ │ - ldc2l 0, cr7, [r8, #36] @ 0x24 │ │ - ldc2l 11, cr14, [sl, #332] @ 0x14c @ │ │ - ldc2l 4, cr5, [sl, #116] @ 0x74 │ │ - ldc2l 1, cr7, [r8, #388] @ 0x184 │ │ + ldc2l 10, cr9, [r7, #744] @ 0x2e8 @ │ │ + ldc2l 2, cr7, [r8, #344] @ 0x158 │ │ + ldc2l 2, cr7, [r8, #88] @ 0x58 │ │ + ldc2l 9, cr9, [r7, #116] @ 0x74 @ │ │ + ldc2l 0, cr7, [r8, #920] @ 0x398 │ │ + ldc2l 0, cr7, [r8, #600] @ 0x258 │ │ + ldc2l 6, cr7, [r7, #728] @ 0x2d8 │ │ + ldc2l 0, cr7, [r8, #216] @ 0xd8 │ │ + ldc2l 11, cr14, [sl, #512] @ 0x200 @ │ │ + ldc2l 4, cr5, [sl, #296] @ 0x128 │ │ + ldc2l 1, cr7, [r8, #568] @ 0x238 │ │ strhteq sp, [fp], -ip │ │ - ldc2l 4, cr11, [r9, #852] @ 0x354 │ │ + ldc2l 5, cr11, [r9, #8] │ │ ldc2l 15, cr0, [fp, #864] @ 0x360 │ │ - ldc2l 15, cr6, [r8, #660] @ 0x294 │ │ - ldc2l 9, cr15, [r7, #42] @ 0x2a @ │ │ + ldc2l 15, cr6, [r8, #840] @ 0x348 │ │ + ldc2l 9, cr15, [r7, #132] @ 0x84 @ │ │ eoreq sp, fp, r4, lsl fp │ │ - ldc2l 9, cr15, [r7, #326] @ 0x146 @ │ │ - ldc2l 14, cr6, [r8, #980] @ 0x3d4 │ │ - ldc2l 0, cr3, [sl, #600] @ 0x258 │ │ + ldc2l 9, cr15, [r7, #416] @ 0x1a0 @ │ │ + ldc2l 15, cr6, [r8, #136] @ 0x88 │ │ + ldc2l 0, cr3, [sl, #780] @ 0x30c │ │ ldc2l 7, cr4, [fp, #568] @ 0x238 │ │ │ │ 0249c058 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8} │ │ @@ -1398377,15 +1398376,15 @@ │ │ sub r7, fp, #344 @ 0x158 │ │ str r0, [sp, #40] @ 0x28 │ │ mov r6, #0 │ │ mov r0, #0 │ │ str r1, [sp, #32] │ │ str r0, [sp, #52] @ 0x34 │ │ b 249cc94 │ │ - ldc2l 12, cr15, [r8, #124] @ 0x7c │ │ + ldc2l 12, cr15, [r8, #304] @ 0x130 │ │ streq r3, [r5], #3476 @ 0xd94 │ │ ldr r1, [sp, #52] @ 0x34 │ │ add r6, r6, #32 │ │ add r4, r4, #80 @ 0x50 │ │ sub r7, fp, #344 @ 0x158 │ │ add r0, r1, #2 │ │ str r0, [fp, #-340] @ 0xfffffeac │ │ @@ -1398661,25 +1398660,25 @@ │ │ sub r2, lr, #56 @ 0x38 │ │ mov r1, sl │ │ mov r0, r6 │ │ str r4, [sp] │ │ mov sl, r5 │ │ bl 270f970 │ │ b 249d788 │ │ - ldc2l 6, cr9, [r8, #352] @ 0x160 │ │ + ldc2l 6, cr9, [r8, #532] @ 0x214 │ │ streq r4, [r5], #184 @ 0xb8 │ │ - ldc2l 6, cr9, [r7, #220] @ 0xdc │ │ + ldc2l 6, cr9, [r7, #400] @ 0x190 │ │ streq r3, [r5], #3416 @ 0xd58 │ │ eoreq sp, fp, r0, lsr #20 │ │ - vcadd.f32 , , q10, #270 │ │ + ldc2l 8, cr15, [r7, #580] @ 0x244 │ │ eoreq sp, fp, pc, asr #19 │ │ streq r3, [r5], #3500 @ 0xdac │ │ - ldc2l 2, cr7, [r7, #176] @ 0xb0 │ │ + ldc2l 2, cr7, [r7, #356] @ 0x164 │ │ streq r3, [r5], #3948 @ 0xf6c │ │ - ldc2l 0, cr5, [sl, #456] @ 0x1c8 │ │ + ldc2l 0, cr5, [sl, #636] @ 0x27c │ │ mov r7, #32 │ │ add lr, sp, #1024 @ 0x400 │ │ str r7, [sp] │ │ add r6, lr, #472 @ 0x1d8 │ │ str r7, [sp, #4] │ │ sub r3, fp, #80 @ 0x50 │ │ ldr r0, [pc, #4080] @ 249e100 │ │ @@ -1398732,33 +1398731,33 @@ │ │ add r2, pc, r2 │ │ bl 270fb50 │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 249db50 │ │ b 249c5c8 │ │ streq r3, [r5], #3248 @ 0xcb0 │ │ - ldc2l 3, cr1, [sl, #40] @ 0x28 │ │ + ldc2l 3, cr1, [sl, #220] @ 0xdc │ │ streq r3, [r5], #3380 @ 0xd34 │ │ - ldc2l 9, cr3, [r8, #122] @ 0x7a @ │ │ + ldc2l 9, cr3, [r8, #212] @ 0xd4 @ │ │ streq r3, [r5], #3512 @ 0xdb8 │ │ - ldc2l 7, cr13, [r8, #480] @ 0x1e0 │ │ + ldc2l 7, cr13, [r8, #660] @ 0x294 │ │ streq r3, [r5], #3580 @ 0xdfc │ │ ldc2l 12, cr0, [fp, #28] │ │ streq r3, [r5], #3328 @ 0xd00 │ │ - ldc2l 6, cr13, [r8, #1004] @ 0x3ec │ │ + ldc2l 7, cr13, [r8, #160] @ 0xa0 │ │ streq r3, [r5], #3204 @ 0xc84 │ │ - ldc2l 7, cr14, [r8, #944] @ 0x3b0 │ │ + ldc2l 8, cr14, [r8, #100] @ 0x64 │ │ streq r3, [r5], #2824 @ 0xb08 │ │ - ldc2l 6, cr13, [r7, #700] @ 0x2bc │ │ + ldc2l 6, cr13, [r7, #880] @ 0x370 │ │ streq r3, [r5], #2892 @ 0xb4c │ │ - ldc2l 7, cr3, [r8, #840] @ 0x348 │ │ + ldc2l 7, cr3, [r8, #1020] @ 0x3fc │ │ streq r3, [r5], #3344 @ 0xd10 │ │ ldc2l 1, cr4, [fp, #668] @ 0x29c │ │ streq r3, [r5], #3160 @ 0xc58 │ │ - ldc2l 6, cr9, [r8, #688] @ 0x2b0 │ │ + ldc2l 6, cr9, [r8, #868] @ 0x364 │ │ streq r3, [r5], #3356 @ 0xd1c │ │ streq r3, [r5], #2512 @ 0x9d0 │ │ eoreq sp, fp, r4, lsr #13 │ │ mlaeq fp, r0, r6, sp │ │ mov r7, #32 │ │ add lr, sp, #1024 @ 0x400 │ │ str r7, [sp] │ │ @@ -1398920,25 +1398919,25 @@ │ │ ldr r1, [pc, #4032] @ 249e47c │ │ mov r0, r6 │ │ mov r2, r7 │ │ mov r6, r5 │ │ add r1, pc, r1 │ │ bl 270e090 │ │ b 249db50 │ │ - ldc2l 8, cr11, [r7, #500] @ 0x1f4 │ │ - ldc2l 1, cr1, [r9, #32] │ │ + vcadd.f32 d27, d23, d26, #270 │ │ + ldc2l 1, cr1, [r9, #212] @ 0xd4 │ │ mlaeq fp, r4, r5, sp │ │ - ldc2l 6, cr15, [r8, #988] @ 0x3dc │ │ - ldc2l 0, cr1, [r9, #712] @ 0x2c8 │ │ - ldc2l 5, cr8, [sl, #580] @ 0x244 │ │ + ldc2l 7, cr15, [r8, #144] @ 0x90 │ │ + ldc2l 0, cr1, [r9, #892] @ 0x37c │ │ + ldc2l 5, cr8, [sl, #760] @ 0x2f8 │ │ eoreq sp, fp, r4, lsl #10 │ │ - ldc2l 7, cr10, [r7, #572] @ 0x23c │ │ + ldc2l 7, cr10, [r7, #752] @ 0x2f0 │ │ streq r3, [r5], #2836 @ 0xb14 │ │ - ldc2l 11, cr4, [sl, #524] @ 0x20c @ │ │ - ldc2l 13, cr14, [r9, #872] @ 0x368 │ │ + ldc2l 11, cr4, [sl, #704] @ 0x2c0 @ │ │ + ldc2l 14, cr14, [r9, #28] │ │ mov r7, #32 │ │ add lr, sp, #1024 @ 0x400 │ │ str r7, [sp] │ │ sub r4, fp, #80 @ 0x50 │ │ str r7, [sp, #4] │ │ add r6, lr, #472 @ 0x1d8 │ │ ldr r0, [pc, #3940] @ 249e480 │ │ @@ -1399052,32 +1399051,32 @@ │ │ cmp r0, #0 │ │ bne 249c5c8 │ │ ldr r2, [sp, #60] @ 0x3c │ │ sub r0, fp, #256 @ 0x100 │ │ sub r1, fp, #440 @ 0x1b8 │ │ bl 270e790 │ │ b 249db50 │ │ - ldc2l 8, cr6, [sl, #628] @ 0x274 │ │ - ldc2l 12, cr12, [r9, #904] @ 0x388 │ │ + vcadd.f32 q11, q13, q5, #270 │ │ + ldc2l 13, cr12, [r9, #60] @ 0x3c │ │ eoreq sp, fp, ip, lsl #8 │ │ ldc2l 7, cr0, [fp, #228] @ 0xe4 │ │ mlaeq fp, ip, r3, sp │ │ - ldc2l 12, cr14, [r9, #956] @ 0x3bc │ │ - ldc2l 3, cr14, [sl, #84] @ 0x54 │ │ + ldc2l 13, cr14, [r9, #112] @ 0x70 │ │ + ldc2l 3, cr14, [sl, #264] @ 0x108 │ │ ldc2l 12, cr3, [fp, #976] @ 0x3d0 │ │ mlaeq fp, ip, r2, sp │ │ - ldc2l 12, cr14, [r9, #64] @ 0x40 │ │ + ldc2l 12, cr14, [r9, #244] @ 0xf4 │ │ streq r3, [r5], #1372 @ 0x55c │ │ eoreq sp, fp, r4, lsr #4 │ │ streq r3, [r5], #2064 @ 0x810 │ │ mlaeq fp, r8, r1, sp │ │ - ldc2l 11, cr14, [r9, #360] @ 0x168 @ │ │ - ldc2l 5, cr6, [r8, #4] │ │ - ldc2l 9, cr4, [r9, #126] @ 0x7e @ │ │ - ldc2l 1, cr8, [sl, #768] @ 0x300 │ │ + ldc2l 11, cr14, [r9, #540] @ 0x21c @ │ │ + ldc2l 5, cr6, [r8, #184] @ 0xb8 │ │ + ldc2l 9, cr4, [r9, #216] @ 0xd8 @ │ │ + ldc2l 1, cr8, [sl, #948] @ 0x3b4 │ │ ldr sl, [sp, #56] @ 0x38 │ │ cmp r0, #0 │ │ ldr r9, [sp, #64] @ 0x40 │ │ beq 249d794 │ │ mov r0, #32 │ │ sub r4, fp, #408 @ 0x198 │ │ str r0, [sp] │ │ @@ -1399256,18 +1399255,18 @@ │ │ ldr r0, [pc, #4068] @ 249e9e0 │ │ add r1, sp, #616 @ 0x268 │ │ ldr r2, [sp, #40] @ 0x28 │ │ add r3, sp, #560 @ 0x230 │ │ add r0, pc, r0 │ │ bl 270e5f0 │ │ b 249da64 │ │ - ldc2l 4, cr6, [r8, #644] @ 0x284 │ │ - ldc2l 14, cr0, [r8, #308] @ 0x134 │ │ - ldc2l 15, cr14, [r7, #276] @ 0x114 │ │ - ldc2l 3, cr13, [r7, #660] @ 0x294 │ │ + ldc2l 4, cr6, [r8, #824] @ 0x338 │ │ + ldc2l 14, cr0, [r8, #488] @ 0x1e8 │ │ + ldc2l 15, cr14, [r7, #456] @ 0x1c8 │ │ + ldc2l 3, cr13, [r7, #840] @ 0x348 │ │ sub r0, fp, #344 @ 0x158 │ │ str r0, [sp] │ │ add r0, sp, #560 @ 0x230 │ │ str r0, [sp, #4] │ │ mov r0, #32 │ │ add lr, sp, #1024 @ 0x400 │ │ str r0, [sp, #8] │ │ @@ -1399286,18 +1399285,18 @@ │ │ ldr r1, [pc, r1] │ │ cmp r0, r1 │ │ bne 249da98 │ │ ldr r1, [sp, #60] @ 0x3c │ │ add r0, sp, #560 @ 0x230 │ │ bl 270efa0 │ │ b 249dacc │ │ - ldc2l 8, cr10, [r9, #852] @ 0x354 │ │ - ldc2l 4, cr6, [r8, #20] │ │ - ldc2l 7, cr4, [sl, #624] @ 0x270 │ │ - ldc2l 3, cr6, [r8, #884] @ 0x374 │ │ + ldc2l 9, cr10, [r9, #4] @ │ │ + ldc2l 4, cr6, [r8, #200] @ 0xc8 │ │ + ldc2l 7, cr4, [sl, #804] @ 0x324 │ │ + ldc2l 4, cr6, [r8, #40] @ 0x28 │ │ ldr r1, [pc, #3912] @ 249e9e8 │ │ sub r0, fp, #76 @ 0x4c │ │ add r2, sp, #552 @ 0x228 │ │ add r3, sp, #160 @ 0xa0 │ │ add r1, pc, r1 │ │ bl 270fbf0 │ │ bl 270db20 │ │ @@ -1399317,19 +1399316,19 @@ │ │ cmp r0, #0 │ │ beq 249db1c │ │ ldr r0, [sp, #60] @ 0x3c │ │ sub r2, fp, #440 @ 0x1b8 │ │ ldr r1, [sp, #24] │ │ bl 270f680 │ │ b 249db2c │ │ - vcadd.f32 q14, , q15, #270 │ │ + ldc2l 9, cr12, [r9, #54] @ 0x36 @ │ │ ldc2l 3, cr0, [fp, #612] @ 0x264 │ │ - ldc2l 2, cr12, [sl, #676] @ 0x2a4 │ │ - ldc2l 0, cr7, [r8, #80] @ 0x50 │ │ - ldc2l 3, cr6, [r8, #340] @ 0x154 │ │ + ldc2l 2, cr12, [sl, #856] @ 0x358 │ │ + ldc2l 0, cr7, [r8, #260] @ 0x104 │ │ + ldc2l 3, cr6, [r8, #520] @ 0x208 │ │ ldc2l 3, cr0, [fp, #260] @ 0x104 │ │ ldr r0, [sp, #60] @ 0x3c │ │ sub r2, fp, #440 @ 0x1b8 │ │ ldr r1, [sp, #24] │ │ bl 270f670 │ │ bl 270db20 │ │ ldr sl, [sp, #56] @ 0x38 │ │ @@ -1399352,31 +1399351,31 @@ │ │ ldr r1, [pc, #3696] @ 249e9ec │ │ mov r0, r6 │ │ mov r2, r7 │ │ mov r6, r5 │ │ add r1, pc, r1 │ │ bl 270e090 │ │ b 249cc5c │ │ - ldc2l 9, cr14, [r9, #62] @ 0x3e @ │ │ - ldc2l 15, cr13, [sl, #324] @ 0x144 │ │ + ldc2l 9, cr14, [r9, #152] @ 0x98 @ │ │ + ldc2l 15, cr13, [sl, #504] @ 0x1f8 │ │ eoreq ip, fp, r4, asr pc │ │ streq r3, [r5], #588 @ 0x24c │ │ eoreq ip, fp, r8, ror #28 │ │ - ldc2l 0, cr10, [r7, #988] @ 0x3dc │ │ + ldc2l 1, cr10, [r7, #144] @ 0x90 │ │ streq r3, [r5], #1148 @ 0x47c │ │ - ldc2l 2, cr5, [sl, #56] @ 0x38 │ │ - vcadd.f32 q14, , , #270 │ │ + ldc2l 2, cr5, [sl, #236] @ 0xec │ │ + ldc2l 9, cr12, [r7, #52] @ 0x34 @ │ │ eoreq ip, fp, r0, lsr #27 │ │ eoreq ip, fp, r0, lsl #26 │ │ streq r3, [r5], #800 @ 0x320 │ │ eoreq ip, fp, ip, lsr sp │ │ - ldc2l 15, cr9, [r7, #844] @ 0x34c │ │ + ldc2l 0, cr10, [r7] │ │ streq r3, [r5], #856 @ 0x358 │ │ - ldc2l 10, cr0, [r8, #192] @ 0xc0 @ │ │ - ldc2l 2, cr10, [sl, #68] @ 0x44 │ │ + ldc2l 10, cr0, [r8, #372] @ 0x174 @ │ │ + ldc2l 2, cr10, [sl, #248] @ 0xf8 │ │ ldr r2, [pc, #3640] @ 249ea14 │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r3, [pc, #3636] @ 249ea18 │ │ mov r0, #0 │ │ str r4, [sp, #12] │ │ add r5, lr, #472 @ 0x1d8 │ │ ldr r4, [sp, #56] @ 0x38 │ │ @@ -1399545,19 +1399544,19 @@ │ │ str r1, [sp] │ │ mov r1, r4 │ │ stmib sp, {r0, r8} │ │ mov r0, sl │ │ bl 270dad0 │ │ b 249c5c8 │ │ ldc2l 9, cr1, [fp, #224] @ 0xe0 @ │ │ - ldc2l 2, cr8, [r9, #924] @ 0x39c │ │ + ldc2l 3, cr8, [r9, #80] @ 0x50 │ │ streq r3, [r5], #84 @ 0x54 │ │ streq r2, [r5], #3904 @ 0xf40 │ │ eoreq ip, fp, r0, ror #23 │ │ - ldc2l 12, cr6, [r8, #604] @ 0x25c │ │ + ldc2l 12, cr6, [r8, #784] @ 0x310 │ │ ldr r2, [pc, #2972] @ 249ea4c │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r4, [pc, #2968] @ 249ea50 │ │ add r1, lr, #504 @ 0x1f8 │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r7, [sp, #56] @ 0x38 │ │ add r4, pc, r4 │ │ @@ -1399630,15 +1399629,15 @@ │ │ bhi 249dfec │ │ add r1, sp, #756 @ 0x2f4 │ │ mov r0, r6 │ │ mov r2, #32 │ │ bl 270dc10 │ │ b 249e040 │ │ streq r2, [r5], #4048 @ 0xfd0 │ │ - ldc2l 6, cr8, [r8, #608] @ 0x260 │ │ + ldc2l 6, cr8, [r8, #788] @ 0x314 │ │ ldr r0, [pc, #2676] @ 249ea68 │ │ mov r1, r9 │ │ ldr r5, [pc, #2672] @ 249ea6c │ │ movw r3, #2049 @ 0x801 │ │ add r0, pc, r0 │ │ add r5, pc, r5 │ │ mov r2, r5 │ │ @@ -1399749,15 +1399748,15 @@ │ │ mov r2, #1 │ │ mov r3, #36 @ 0x24 │ │ bl 270d9f0 │ │ ldr r0, [pc, #1976] @ 249e974 │ │ mov r1, #23 │ │ add r0, pc, r0 │ │ b 249c9f8 │ │ - ldc2l 5, cr8, [r8, #416] @ 0x1a0 │ │ + ldc2l 5, cr8, [r8, #596] @ 0x254 │ │ ldr r0, [pc, #2008] @ 249e9a8 │ │ mov r1, #205 @ 0xcd │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #1996] @ 249e9ac │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #472 @ 0x1d8 │ │ @@ -1399868,15 +1399867,15 @@ │ │ mov r3, #13 │ │ add r1, pc, r1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #1644] @ 249ea04 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ b 249c9f8 │ │ - ldc2l 3, cr8, [r8] │ │ + ldc2l 3, cr8, [r8, #180] @ 0xb4 │ │ streq r2, [r5], #3368 @ 0xd28 │ │ ldr r2, [pc, #1448] @ 249e958 │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r3, [pc, #1444] @ 249e95c │ │ mov r1, #9 │ │ mov r0, #80 @ 0x50 │ │ add r6, lr, #504 @ 0x1f8 │ │ @@ -1400103,15 +1400102,15 @@ │ │ add r0, pc, r0 │ │ b 249e8e8 │ │ ldr r0, [pc, #576] @ 249e980 │ │ mov r1, #168 @ 0xa8 │ │ add r0, pc, r0 │ │ b 249e818 │ │ streq r2, [r5], #2232 @ 0x8b8 │ │ - ldc2l 15, cr7, [r8, #688] @ 0x2b0 │ │ + ldc2l 15, cr7, [r8, #868] @ 0x364 │ │ ldr r0, [sp, #48] @ 0x30 │ │ sub r1, fp, #688 @ 0x2b0 │ │ add r2, sp, #72 @ 0x48 │ │ mov r3, #36 @ 0x24 │ │ bl 270cd90 │ │ ldr r0, [sp, #72] @ 0x48 │ │ cmp r0, #0 │ │ @@ -1400148,17 +1400147,17 @@ │ │ mov r2, #1 │ │ mov r3, #5 │ │ bl 270d9f0 │ │ ldr r0, [pc, #472] @ 249e9d0 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ b 249c9f8 │ │ - ldc2l 5, cr9, [r7, #1020] @ 0x3fc │ │ + ldc2l 6, cr9, [r7, #176] @ 0xb0 │ │ streq r2, [r5], #2436 @ 0x984 │ │ - ldc2l 3, cr2, [r8, #288] @ 0x120 │ │ + ldc2l 3, cr2, [r8, #468] @ 0x1d4 │ │ ldr r0, [pc, #396] @ 249e9a0 │ │ mov r1, #169 @ 0xa9 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #352] @ 249e984 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #472 @ 0x1d8 │ │ @@ -1400166,16 +1400165,16 @@ │ │ add r4, pc, r4 │ │ mov r3, #32 │ │ mov r0, r4 │ │ bl 270d9f0 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #504 @ 0x1f8 │ │ b 249e0f0 │ │ - ldc2l 7, cr5, [sl, #364] @ 0x16c │ │ - ldc2l 4, cr7, [sl, #104] @ 0x68 │ │ + ldc2l 7, cr5, [sl, #544] @ 0x220 │ │ + ldc2l 4, cr7, [sl, #284] @ 0x11c │ │ streq r2, [r5], #2052 @ 0x804 │ │ eoreq ip, fp, r0, ror #4 │ │ ldr r0, [sp, #48] @ 0x30 │ │ sub r1, fp, #688 @ 0x2b0 │ │ add r2, sp, #72 @ 0x48 │ │ mov r3, #36 @ 0x24 │ │ bl 270cd90 │ │ @@ -1400203,15 +1400202,15 @@ │ │ mov r2, #1 │ │ mov r3, #36 @ 0x24 │ │ mov r1, r5 │ │ bl 270d9f0 │ │ ldr r1, [pc, #152] @ 249e970 │ │ add r1, pc, r1 │ │ b 249e190 │ │ - ldc2l 6, cr5, [sl, #780] @ 0x30c │ │ + ldc2l 6, cr5, [sl, #960] @ 0x3c0 │ │ ldr r0, [pc, #236] @ 249e9d4 │ │ add r0, pc, r0 │ │ movw r1, #310 @ 0x136 │ │ bl 270d990 │ │ ldr r4, [pc, #192] @ 249e9b8 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #472 @ 0x1d8 │ │ @@ -1400231,92 +1400230,92 @@ │ │ streq r2, [r5], #1304 @ 0x518 │ │ streq r2, [r5], #1684 @ 0x694 │ │ strdeq ip, [fp], -r8 @ │ │ streq r2, [r5], #1356 @ 0x54c │ │ streq r2, [r5], #1544 @ 0x608 │ │ eoreq ip, fp, ip, lsr #3 │ │ ldc2l 0, cr15, [sl, #936] @ 0x3a8 │ │ - ldc2l 14, cr8, [sl, #484] @ 0x1e4 │ │ - ldc2l 13, cr4, [r8, #388] @ 0x184 │ │ - ldc2l 3, cr13, [r9, #352] @ 0x160 │ │ - ldc2l 7, cr7, [r8, #44] @ 0x2c │ │ + ldc2l 14, cr8, [sl, #664] @ 0x298 │ │ + ldc2l 13, cr4, [r8, #568] @ 0x238 │ │ + ldc2l 3, cr13, [r9, #532] @ 0x214 │ │ + ldc2l 7, cr7, [r8, #224] @ 0xe0 │ │ eoreq fp, fp, r4, ror #14 │ │ - ldc2l 2, cr3, [r9, #156] @ 0x9c │ │ + ldc2l 2, cr3, [r9, #336] @ 0x150 │ │ streq r1, [r5], #2600 @ 0xa28 │ │ - ldc2l 2, cr11, [r8, #464] @ 0x1d0 │ │ - ldc2l 6, cr4, [r8, #100] @ 0x64 │ │ - ldc2l 13, cr2, [r9, #348] @ 0x15c │ │ - ldc2l 2, cr5, [r7, #100] @ 0x64 │ │ - ldc2l 5, cr1, [sl, #312] @ 0x138 │ │ - ldc2l 13, cr4, [r8, #916] @ 0x394 │ │ - ldc2l 4, cr13, [r8, #888] @ 0x378 │ │ - ldc2l 6, cr4, [r8, #596] @ 0x254 │ │ - ldc2l 6, cr7, [r8, #164] @ 0xa4 │ │ + ldc2l 2, cr11, [r8, #644] @ 0x284 │ │ + ldc2l 6, cr4, [r8, #280] @ 0x118 │ │ + ldc2l 13, cr2, [r9, #528] @ 0x210 │ │ + ldc2l 2, cr5, [r7, #280] @ 0x118 │ │ + ldc2l 5, cr1, [sl, #492] @ 0x1ec │ │ + ldc2l 14, cr4, [r8, #72] @ 0x48 │ │ + ldc2l 5, cr13, [r8, #44] @ 0x2c │ │ + ldc2l 6, cr4, [r8, #776] @ 0x308 │ │ + ldc2l 6, cr7, [r8, #344] @ 0x158 │ │ mlaeq fp, r4, r6, fp │ │ - ldc2l 1, cr3, [r9, #236] @ 0xec │ │ + ldc2l 1, cr3, [r9, #416] @ 0x1a0 │ │ streq r1, [r5], #2364 @ 0x93c │ │ - ldc2l 2, cr9, [r8, #64] @ 0x40 │ │ + ldc2l 2, cr9, [r8, #244] @ 0xf4 │ │ streq r1, [r5], #3160 @ 0xc58 │ │ - ldc2l 10, cr8, [r9, #764] @ 0x2fc @ │ │ + ldc2l 10, cr8, [r9, #944] @ 0x3b0 @ │ │ streq r1, [r5], #2984 @ 0xba8 │ │ - ldc2l 2, cr11, [r9, #284] @ 0x11c │ │ - ldc2l 12, cr4, [r8, #868] @ 0x364 │ │ - ldc2l 2, cr13, [r9, #828] @ 0x33c │ │ - ldc2l 12, cr4, [r7, #756] @ 0x2f4 │ │ - ldc2l 5, cr4, [r8, #772] @ 0x304 │ │ + ldc2l 2, cr11, [r9, #464] @ 0x1d0 │ │ + ldc2l 13, cr4, [r8, #24] │ │ + ldc2l 2, cr13, [r9, #1008] @ 0x3f0 │ │ + ldc2l 12, cr4, [r7, #936] @ 0x3a8 │ │ + ldc2l 5, cr4, [r8, #952] @ 0x3b8 │ │ ldc2l 13, cr15, [sl, #844] @ 0x34c │ │ - ldc2l 0, cr7, [r7, #340] @ 0x154 │ │ - ldc2l 7, cr4, [r8, #836] @ 0x344 │ │ - ldc2l 6, cr9, [r7, #136] @ 0x88 │ │ - ldc2l 6, cr4, [r8, #996] @ 0x3e4 │ │ - ldc2l 12, cr6, [r8, #284] @ 0x11c │ │ - ldc2l 2, cr3, [r8, #800] @ 0x320 │ │ + ldc2l 0, cr7, [r7, #520] @ 0x208 │ │ + ldc2l 7, cr4, [r8, #1016] @ 0x3f8 │ │ + ldc2l 6, cr9, [r7, #316] @ 0x13c │ │ + ldc2l 7, cr4, [r8, #152] @ 0x98 │ │ + ldc2l 12, cr6, [r8, #464] @ 0x1d0 │ │ + ldc2l 2, cr3, [r8, #980] @ 0x3d4 │ │ streq r2, [r5], #1800 @ 0x708 │ │ eoreq ip, fp, r0, ror #1 │ │ eoreq ip, fp, r4, asr #2 │ │ streq r2, [r5], #1828 @ 0x724 │ │ streq r2, [r5], #1768 @ 0x6e8 │ │ strhteq fp, [fp], -r8 │ │ eoreq fp, fp, r7, lsr #17 │ │ ldrdeq fp, [fp], -r8 @ │ │ - ldc2l 14, cr8, [sl, #392] @ 0x188 │ │ - ldc2l 11, cr4, [r8, #564] @ 0x234 @ │ │ - ldc2l 12, cr4, [sl, #236] @ 0xec │ │ + ldc2l 14, cr8, [sl, #572] @ 0x23c │ │ + ldc2l 11, cr4, [r8, #744] @ 0x2e8 @ │ │ + ldc2l 12, cr4, [sl, #416] @ 0x1a0 │ │ ldc2l 1, cr2, [fp, #1004] @ 0x3ec │ │ streq r1, [r5], #2832 @ 0xb10 │ │ mlaeq fp, r8, r4, fp │ │ streq r1, [r5], #2784 @ 0xae0 │ │ - ldc2l 7, cr3, [sl, #584] @ 0x248 │ │ + ldc2l 7, cr3, [sl, #764] @ 0x2fc │ │ eoreq fp, fp, r0, asr #30 │ │ - ldc2l 12, cr7, [r7, #584] @ 0x248 │ │ + ldc2l 12, cr7, [r7, #764] @ 0x2fc │ │ ldrdeq fp, [fp], -r8 @ │ │ eoreq fp, fp, fp, lsl #28 │ │ strhteq fp, [fp], -r4 │ │ eoreq fp, fp, r7, lsl #27 │ │ - ldc2l 14, cr1, [r8, #200] @ 0xc8 │ │ + ldc2l 14, cr1, [r8, #380] @ 0x17c │ │ eoreq fp, fp, ip, asr #27 │ │ streq r2, [r5], #1028 @ 0x404 │ │ ldc2l 12, cr14, [sl, #888] @ 0x378 │ │ streq r2, [r5], #932 @ 0x3a4 │ │ streq r2, [r5], #864 @ 0x360 │ │ ldc2l 12, cr14, [sl, #312] @ 0x138 │ │ - ldc2l 12, cr11, [r8, #4] │ │ + ldc2l 12, cr11, [r8, #184] @ 0xb8 │ │ mlaeq fp, r4, ip, fp │ │ - ldc2l 9, cr7, [r7, #478] @ 0x1de @ │ │ - ldc2l 1, cr1, [sl, #256] @ 0x100 │ │ - ldc2l 9, cr4, [r8, #82] @ 0x52 @ │ │ - ldc2l 6, cr6, [sl, #836] @ 0x344 │ │ + ldc2l 10, cr7, [r7, #112] @ 0x70 @ │ │ + ldc2l 1, cr1, [sl, #436] @ 0x1b4 │ │ + ldc2l 9, cr4, [r8, #172] @ 0xac @ │ │ + ldc2l 6, cr6, [sl, #1016] @ 0x3f8 │ │ eoreq fp, fp, r4, ror fp │ │ ldc2l 5, cr2, [fp, #692] @ 0x2b4 │ │ - ldc2l 11, cr11, [r8, #716] @ 0x2cc @ │ │ - ldc2l 13, cr10, [sl, #852] @ 0x354 │ │ + ldc2l 11, cr11, [r8, #896] @ 0x380 @ │ │ + ldc2l 14, cr10, [sl, #8] │ │ mlaeq fp, r4, sl, fp │ │ - ldc2l 5, cr11, [r7, #752] @ 0x2f0 │ │ - ldc2l 10, cr8, [sl, #648] @ 0x288 @ │ │ - ldc2l 8, cr4, [r8, #612] @ 0x264 │ │ + ldc2l 5, cr11, [r7, #932] @ 0x3a4 │ │ + ldc2l 10, cr8, [sl, #828] @ 0x33c @ │ │ + vcadd.f32 q10, q12, q3, #270 │ │ │ │ 0249ea84 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #76 @ 0x4c │ │ mov r5, r3 │ │ mov r8, r2 │ │ @@ -1400479,32 +1400478,32 @@ │ │ ldr r0, [pc, #88] @ 249ed68 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 11, cr10, [r9, #536] @ 0x218 @ │ │ - ldc2l 11, cr10, [r9, #68] @ 0x44 @ │ │ - ldc2l 3, cr4, [r8, #500] @ 0x1f4 │ │ + ldc2l 11, cr10, [r9, #716] @ 0x2cc @ │ │ + ldc2l 11, cr10, [r9, #248] @ 0xf8 @ │ │ + ldc2l 3, cr4, [r8, #680] @ 0x2a8 │ │ ldc2l 4, cr14, [sl, #292] @ 0x124 │ │ - ldc2l 11, cr10, [r9, #748] @ 0x2ec @ │ │ - ldc2l 3, cr4, [r8, #724] @ 0x2d4 │ │ - ldc2l 1, cr3, [r8, #824] @ 0x338 │ │ - ldc2l 1, cr3, [r8, #432] @ 0x1b0 │ │ - ldc2l 10, cr2, [r9, #820] @ 0x334 @ │ │ + ldc2l 11, cr10, [r9, #928] @ 0x3a0 @ │ │ + ldc2l 3, cr4, [r8, #904] @ 0x388 │ │ + ldc2l 1, cr3, [r8, #1004] @ 0x3ec │ │ + ldc2l 1, cr3, [r8, #612] @ 0x264 │ │ + ldc2l 10, cr2, [r9, #1000] @ 0x3e8 @ │ │ stc2l 6, cr10, [r3, #640]! @ 0x280 │ │ - ldc2l 1, cr3, [r8, #224] @ 0xe0 │ │ - ldc2l 10, cr2, [r9, #612] @ 0x264 @ │ │ - ldc2l 13, cr5, [sl, #200] @ 0xc8 │ │ - ldc2l 10, cr2, [r9, #388] @ 0x184 @ │ │ - ldc2l 10, cr14, [r8, #220] @ 0xdc @ │ │ - ldc2l 7, cr8, [sl, #360] @ 0x168 │ │ + ldc2l 1, cr3, [r8, #404] @ 0x194 │ │ + ldc2l 10, cr2, [r9, #792] @ 0x318 @ │ │ + ldc2l 13, cr5, [sl, #380] @ 0x17c │ │ + ldc2l 10, cr2, [r9, #568] @ 0x238 @ │ │ + ldc2l 10, cr14, [r8, #400] @ 0x190 @ │ │ + ldc2l 7, cr8, [sl, #540] @ 0x21c │ │ eoreq sl, fp, r8, asr lr │ │ - ldc2l 9, cr10, [r9, #84] @ 0x54 @ │ │ + ldc2l 9, cr10, [r9, #174] @ 0xae @ │ │ │ │ 0249ed6c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #108 @ 0x6c │ │ mov r4, r3 │ │ mov r8, r2 │ │ @@ -1400871,43 +1400870,43 @@ │ │ ldr r0, [pc, #132] @ 249f3ac │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 6, cr8, [r9, #896] @ 0x380 │ │ - ldc2l 8, cr6, [r7, #996] @ 0x3e4 │ │ - ldc2l 0, cr4, [r8, #596] @ 0x254 │ │ - ldc2l 0, cr4, [r8, #356] @ 0x164 │ │ - ldc2l 5, cr8, [r9, #836] @ 0x344 │ │ - ldc2l 15, cr3, [r8, #980] @ 0x3d4 │ │ + ldc2l 7, cr8, [r9, #52] @ 0x34 │ │ + ldc2l 9, cr6, [r7, #76] @ 0x4c @ │ │ + ldc2l 0, cr4, [r8, #776] @ 0x308 │ │ + ldc2l 0, cr4, [r8, #536] @ 0x218 │ │ + ldc2l 5, cr8, [r9, #1016] @ 0x3f8 │ │ + ldc2l 0, cr4, [r8, #136] @ 0x88 │ │ eoreq sl, fp, r8, lsr ip │ │ - ldc2l 2, cr2, [sl, #4] │ │ - ldc2l 15, cr3, [r8, #276] @ 0x114 │ │ + ldc2l 2, cr2, [sl, #184] @ 0xb8 │ │ + ldc2l 15, cr3, [r8, #456] @ 0x1c8 │ │ eoreq sl, fp, r8, ror #22 │ │ - ldc2l 2, cr8, [r9, #740] @ 0x2e4 │ │ - ldc2l 6, cr6, [r7, #964] @ 0x3c4 │ │ - ldc2l 14, cr3, [r8, #628] @ 0x274 │ │ - ldc2l 3, cr8, [r9, #852] @ 0x354 │ │ - ldc2l 13, cr3, [r8, #996] @ 0x3e4 │ │ + ldc2l 2, cr8, [r9, #920] @ 0x398 │ │ + ldc2l 7, cr6, [r7, #120] @ 0x78 │ │ + ldc2l 14, cr3, [r8, #808] @ 0x328 │ │ + ldc2l 4, cr8, [r9, #8] │ │ + ldc2l 14, cr3, [r8, #152] @ 0x98 │ │ eoreq sl, fp, r8, asr #20 │ │ ldc2l 3, cr1, [fp, #100] @ 0x64 │ │ - ldc2l 15, cr11, [r8, #276] @ 0x114 │ │ - ldc2l 11, cr5, [sl, #452] @ 0x1c4 @ │ │ - ldc2l 13, cr3, [r8, #372] @ 0x174 │ │ - vcadd.f32 d27, d26, d23, #270 │ │ + ldc2l 15, cr11, [r8, #456] @ 0x1c8 │ │ + ldc2l 11, cr5, [sl, #632] @ 0x278 @ │ │ + ldc2l 13, cr3, [r8, #552] @ 0x228 │ │ + ldc2l 8, cr11, [sl, #848] @ 0x350 │ │ ldc2l 13, cr13, [sl, #160] @ 0xa0 │ │ - ldc2l 12, cr3, [r8, #980] @ 0x3d4 │ │ - ldc2l 6, cr12, [r7, #420] @ 0x1a4 │ │ + ldc2l 13, cr3, [r8, #136] @ 0x88 │ │ + ldc2l 6, cr12, [r7, #600] @ 0x258 │ │ eoreq sl, fp, r0, lsr r9 │ │ - ldc2l 6, cr12, [r7, #972] @ 0x3cc │ │ - ldc2l 12, cr3, [r8, #276] @ 0x114 │ │ - ldc2l 13, cr15, [r9, #920] @ 0x398 │ │ - ldc2l 1, cr8, [r9, #336] @ 0x150 │ │ + ldc2l 7, cr12, [r7, #128] @ 0x80 │ │ + ldc2l 12, cr3, [r8, #456] @ 0x1c8 │ │ + ldc2l 14, cr15, [r9, #76] @ 0x4c │ │ + ldc2l 1, cr8, [r9, #516] @ 0x204 │ │ │ │ 0249f3b0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #108 @ 0x6c │ │ mov r4, r3 │ │ mov r8, r2 │ │ @@ -1401272,43 +1401271,43 @@ │ │ ldr r0, [pc, #132] @ 249f9e8 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 9, cr2, [r8, #78] @ 0x4e @ │ │ - ldc2l 2, cr6, [r7, #724] @ 0x2d4 │ │ - ldc2l 10, cr3, [r8, #324] @ 0x144 @ │ │ - ldc2l 10, cr3, [r8, #84] @ 0x54 @ │ │ - ldc2l 15, cr7, [r9, #564] @ 0x234 │ │ - ldc2l 9, cr3, [r8, #354] @ 0x162 @ │ │ + ldc2l 9, cr2, [r8, #168] @ 0xa8 @ │ │ + ldc2l 2, cr6, [r7, #904] @ 0x388 │ │ + ldc2l 10, cr3, [r8, #504] @ 0x1f8 @ │ │ + ldc2l 10, cr3, [r8, #264] @ 0x108 @ │ │ + ldc2l 15, cr7, [r9, #744] @ 0x2e8 │ │ + ldc2l 9, cr3, [r8, #444] @ 0x1bc @ │ │ strdeq sl, [fp], -ip @ │ │ - ldc2l 11, cr1, [sl, #756] @ 0x2f4 @ │ │ - ldc2l 9, cr3, [r8, #2] @ │ │ + ldc2l 11, cr1, [sl, #936] @ 0x3a8 @ │ │ + ldc2l 9, cr3, [r8, #92] @ 0x5c @ │ │ eoreq sl, fp, ip, lsr #10 │ │ - ldc2l 12, cr7, [r9, #468] @ 0x1d4 │ │ - ldc2l 0, cr6, [r7, #692] @ 0x2b4 │ │ - ldc2l 8, cr3, [r8, #356] @ 0x164 │ │ - ldc2l 13, cr7, [r9, #580] @ 0x244 │ │ - ldc2l 7, cr3, [r8, #724] @ 0x2d4 │ │ + ldc2l 12, cr7, [r9, #648] @ 0x288 │ │ + ldc2l 0, cr6, [r7, #872] @ 0x368 │ │ + vcadd.f32 d19, d24, d6, #270 │ │ + ldc2l 13, cr7, [r9, #760] @ 0x2f8 │ │ + ldc2l 7, cr3, [r8, #904] @ 0x388 │ │ eoreq sl, fp, ip, lsl #8 │ │ ldc2l 12, cr0, [fp, #884] @ 0x374 │ │ - ldc2l 9, cr11, [r8, #18] @ │ │ - ldc2l 13, cr3, [r7, #612] @ 0x264 │ │ - ldc2l 7, cr3, [r8, #100] @ 0x64 │ │ - ldc2l 2, cr11, [sl, #396] @ 0x18c │ │ + ldc2l 9, cr11, [r8, #108] @ 0x6c @ │ │ + ldc2l 13, cr3, [r7, #792] @ 0x318 │ │ + ldc2l 7, cr3, [r8, #280] @ 0x118 │ │ + ldc2l 2, cr11, [sl, #576] @ 0x240 │ │ ldc2l 6, cr13, [sl, #912] @ 0x390 │ │ - ldc2l 6, cr3, [r8, #708] @ 0x2c4 │ │ - ldc2l 0, cr12, [r7, #148] @ 0x94 │ │ + ldc2l 6, cr3, [r8, #888] @ 0x378 │ │ + ldc2l 0, cr12, [r7, #328] @ 0x148 │ │ strdeq sl, [fp], -r8 @ │ │ - ldc2l 0, cr12, [r7, #732] @ 0x2dc │ │ - ldc2l 6, cr3, [r8, #36] @ 0x24 │ │ - ldc2l 7, cr15, [r9, #680] @ 0x2a8 │ │ - ldc2l 3, cr2, [r8, #652] @ 0x28c │ │ + ldc2l 0, cr12, [r7, #912] @ 0x390 │ │ + ldc2l 6, cr3, [r8, #216] @ 0xd8 │ │ + ldc2l 7, cr15, [r9, #860] @ 0x35c │ │ + ldc2l 3, cr2, [r8, #832] @ 0x340 │ │ │ │ 0249f9ec : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #108 @ 0x6c │ │ mov r4, r3 │ │ mov r8, r2 │ │ @@ -1401674,41 +1401673,41 @@ │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldc2l 13, cr0, [fp, #412] @ 0x19c │ │ - ldc2l 12, cr5, [r7, #484] @ 0x1e4 │ │ - ldc2l 4, cr3, [r8, #84] @ 0x54 │ │ - ldc2l 3, cr3, [r8, #868] @ 0x364 │ │ - ldc2l 9, cr7, [r9, #162] @ 0xa2 @ │ │ - ldc2l 3, cr3, [r8, #468] @ 0x1d4 │ │ + ldc2l 12, cr5, [r7, #664] @ 0x298 │ │ + ldc2l 4, cr3, [r8, #264] @ 0x108 │ │ + ldc2l 4, cr3, [r8, #24] │ │ + ldc2l 9, cr7, [r9, #252] @ 0xfc @ │ │ + ldc2l 3, cr3, [r8, #648] @ 0x288 │ │ eoreq r9, fp, r8, asr #31 │ │ - ldc2l 5, cr1, [sl, #516] @ 0x204 │ │ - ldc2l 2, cr3, [r8, #788] @ 0x314 │ │ + ldc2l 5, cr1, [sl, #696] @ 0x2b8 │ │ + ldc2l 2, cr3, [r8, #968] @ 0x3c8 │ │ strdeq r9, [fp], -r8 @ │ │ - ldc2l 6, cr7, [r9, #228] @ 0xe4 │ │ - ldc2l 10, cr5, [r7, #452] @ 0x1c4 @ │ │ - ldc2l 2, cr3, [r8, #116] @ 0x74 │ │ - ldc2l 7, cr7, [r9, #340] @ 0x154 │ │ - ldc2l 1, cr3, [r8, #484] @ 0x1e4 │ │ + ldc2l 6, cr7, [r9, #408] @ 0x198 │ │ + ldc2l 10, cr5, [r7, #632] @ 0x278 @ │ │ + ldc2l 2, cr3, [r8, #296] @ 0x128 │ │ + ldc2l 7, cr7, [r9, #520] @ 0x208 │ │ + ldc2l 1, cr3, [r8, #664] @ 0x298 │ │ ldrdeq r9, [fp], -r8 @ │ │ ldc2l 6, cr0, [fp, #644] @ 0x284 │ │ - ldc2l 2, cr11, [r8, #820] @ 0x334 │ │ - ldc2l 7, cr13, [r9, #600] @ 0x258 │ │ - ldc2l 0, cr3, [r8, #884] @ 0x374 │ │ - ldc2l 12, cr10, [sl, #156] @ 0x9c │ │ + ldc2l 2, cr11, [r8, #1000] @ 0x3e8 │ │ + ldc2l 7, cr13, [r9, #780] @ 0x30c │ │ + ldc2l 1, cr3, [r8, #40] @ 0x28 │ │ + ldc2l 12, cr10, [sl, #336] @ 0x150 │ │ ldc2l 0, cr13, [sl, #672] @ 0x2a0 │ │ - ldc2l 0, cr3, [r8, #468] @ 0x1d4 │ │ - ldc2l 9, cr11, [r7, #466] @ 0x1d2 @ │ │ + ldc2l 0, cr3, [r8, #648] @ 0x288 │ │ + ldc2l 10, cr11, [r7, #88] @ 0x58 @ │ │ eoreq r9, fp, r4, asr #25 │ │ - ldc2l 10, cr11, [r7, #492] @ 0x1ec @ │ │ - ldc2l 15, cr2, [r8, #820] @ 0x334 │ │ - ldc2l 1, cr15, [r9, #440] @ 0x1b8 │ │ + ldc2l 10, cr11, [r7, #672] @ 0x2a0 @ │ │ + ldc2l 15, cr2, [r8, #1000] @ 0x3e8 │ │ + ldc2l 1, cr15, [r9, #620] @ 0x26c │ │ ldc2l 7, cr0, [fp, #908] @ 0x38c │ │ │ │ 024a0028 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #48 @ 0x30 │ │ ldr r7, [r2] │ │ @@ -1401793,18 +1401792,18 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r5 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r7, #0 │ │ b 24a007c │ │ - ldc2l 13, cr9, [r7, #336] @ 0x150 │ │ + ldc2l 13, cr9, [r7, #516] @ 0x204 │ │ ldc2l 7, cr14, [sl, #164] @ 0xa4 │ │ - ldc2l 13, cr2, [r8, #676] @ 0x2a4 │ │ - ldc2l 10, cr7, [r8, #108] @ 0x6c @ │ │ + ldc2l 13, cr2, [r8, #856] @ 0x358 │ │ + ldc2l 10, cr7, [r8, #288] @ 0x120 @ │ │ │ │ 024a019c : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #24 │ │ ldr r1, [r1, #16] │ │ ldr lr, [pc, #60] @ 24a01f0 │ │ @@ -1402084,21 +1402083,21 @@ │ │ b 24a0558 │ │ ldr r0, [fp, #-36] @ 0xffffffdc │ │ ldr r5, [sp, #36] @ 0x24 │ │ add r0, r0, #1 │ │ str r0, [fp, #-36] @ 0xffffffdc │ │ add r5, r9, r5 │ │ b 24a04e0 │ │ - ldc2l 10, cr11, [r8, #624] @ 0x270 @ │ │ - ldc2l 1, cr1, [sl, #852] @ 0x354 │ │ - ldc2l 12, cr2, [r8, #340] @ 0x154 │ │ - ldc2l 9, cr11, [r8, #392] @ 0x188 @ │ │ - ldc2l 12, cr7, [r7, #736] @ 0x2e0 │ │ - ldc2l 11, cr2, [r8, #596] @ 0x254 @ │ │ - ldc2l 9, cr9, [r8, #58] @ 0x3a @ │ │ + ldc2l 10, cr11, [r8, #804] @ 0x324 @ │ │ + ldc2l 2, cr1, [sl, #8] │ │ + ldc2l 12, cr2, [r8, #520] @ 0x208 │ │ + ldc2l 9, cr11, [r8, #482] @ 0x1e2 @ │ │ + ldc2l 12, cr7, [r7, #916] @ 0x394 │ │ + ldc2l 11, cr2, [r8, #776] @ 0x308 @ │ │ + ldc2l 9, cr9, [r8, #148] @ 0x94 @ │ │ eoreq r9, fp, r0, lsr r8 │ │ eoreq r9, fp, r4, lsr #13 │ │ │ │ 024a062c : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #16 │ │ @@ -1402148,18 +1402147,18 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 4, cr7, [r8, #968] @ 0x3c8 │ │ - ldc2l 15, cr6, [r9, #424] @ 0x1a8 │ │ - ldc2l 7, cr2, [r8, #964] @ 0x3c4 │ │ - ldc2l 0, cr7, [r7, #856] @ 0x358 │ │ + ldc2l 5, cr7, [r8, #124] @ 0x7c │ │ + ldc2l 15, cr6, [r9, #604] @ 0x25c │ │ + ldc2l 8, cr2, [r8, #120] @ 0x78 │ │ + ldc2l 1, cr7, [r7, #12] │ │ │ │ 024a0710 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #276 @ 0x114 │ │ mov r9, r0 │ │ ldr r0, [r2] │ │ @@ -1402703,45 +1402702,45 @@ │ │ sub r1, fp, #124 @ 0x7c │ │ mov r0, r5 │ │ mov r2, #1 │ │ bl 270da90 │ │ ldr r0, [pc, #80] @ 24a0ff0 │ │ add r0, pc, r0 │ │ b 24a0920 │ │ - ldc2l 4, cr9, [r8, #620] @ 0x26c │ │ - ldc2l 14, cr12, [r9, #948] @ 0x3b4 │ │ - ldc2l 7, cr2, [r8, #372] @ 0x174 │ │ + ldc2l 4, cr9, [r8, #800] @ 0x320 │ │ + ldc2l 15, cr12, [r9, #104] @ 0x68 │ │ + ldc2l 7, cr2, [r8, #552] @ 0x228 │ │ eoreq r9, fp, ip, lsl #8 │ │ - ldc2l 3, cr9, [r8, #236] @ 0xec │ │ - ldc2l 2, cr7, [r8, #972] @ 0x3cc │ │ - ldc2l 6, cr2, [r8, #4] │ │ + ldc2l 3, cr9, [r8, #416] @ 0x1a0 │ │ + ldc2l 3, cr7, [r8, #128] @ 0x80 │ │ + ldc2l 6, cr2, [r8, #184] @ 0xb8 │ │ eoreq r9, fp, ip, ror r2 │ │ - ldc2l 10, cr10, [r8, #596] @ 0x254 @ │ │ - ldc2l 3, cr9, [r8, #28] │ │ - ldc2l 12, cr10, [r9, #780] @ 0x30c │ │ - ldc2l 5, cr2, [r8, #820] @ 0x334 │ │ - ldc2l 3, cr9, [r8, #524] @ 0x20c │ │ - ldc2l 0, cr5, [r7, #612] @ 0x264 │ │ - ldc2l 6, cr2, [r8, #276] @ 0x114 │ │ + ldc2l 10, cr10, [r8, #776] @ 0x308 @ │ │ + ldc2l 3, cr9, [r8, #208] @ 0xd0 │ │ + ldc2l 12, cr10, [r9, #960] @ 0x3c0 │ │ + ldc2l 5, cr2, [r8, #1000] @ 0x3e8 │ │ + ldc2l 3, cr9, [r8, #704] @ 0x2c0 │ │ + ldc2l 0, cr5, [r7, #792] @ 0x318 │ │ + ldc2l 6, cr2, [r8, #456] @ 0x1c8 │ │ strdeq r9, [fp], -ip @ │ │ - ldc2l 12, cr8, [r8, #636] @ 0x27c │ │ - ldc2l 4, cr4, [r9, #908] @ 0x38c │ │ - ldc2l 15, cr1, [r8, #388] @ 0x184 │ │ - ldc2l 14, cr1, [r9, #532] @ 0x214 │ │ - ldc2l 2, cr9, [r8, #92] @ 0x5c │ │ - ldc2l 13, cr12, [r8, #424] @ 0x1a8 │ │ - ldc2l 4, cr2, [r8, #868] @ 0x364 │ │ + ldc2l 12, cr8, [r8, #816] @ 0x330 │ │ + ldc2l 5, cr4, [r9, #64] @ 0x40 │ │ + ldc2l 15, cr1, [r8, #568] @ 0x238 │ │ + ldc2l 14, cr1, [r9, #712] @ 0x2c8 │ │ + ldc2l 2, cr9, [r8, #272] @ 0x110 │ │ + ldc2l 13, cr12, [r8, #604] @ 0x25c │ │ + ldc2l 5, cr2, [r8, #24] │ │ eoreq r9, fp, r4, ror r1 │ │ streq pc, [r4], #1924 @ 0x784 │ │ eoreq r9, fp, r4, asr #2 │ │ streq pc, [r4], #1816 @ 0x718 │ │ - ldc2l 7, cr12, [r8, #520] @ 0x208 │ │ - ldc2l 7, cr2, [r9, #192] @ 0xc0 │ │ - ldc2l 13, cr5, [r9, #496] @ 0x1f0 │ │ - ldc2l 5, cr2, [r9, #208] @ 0xd0 │ │ + ldc2l 7, cr12, [r8, #700] @ 0x2bc │ │ + ldc2l 7, cr2, [r9, #372] @ 0x174 │ │ + ldc2l 13, cr5, [r9, #676] @ 0x2a4 │ │ + ldc2l 5, cr2, [r9, #388] @ 0x184 │ │ │ │ 024a1020 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #188 @ 0xbc │ │ mov r4, r0 │ │ ldr r0, [r0] │ │ @@ -1403109,16 +1403108,16 @@ │ │ add r0, sp, #40 @ 0x28 │ │ sub r2, fp, #48 @ 0x30 │ │ mov r1, r0 │ │ bl 270e370 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 6, cr5, [r9, #912] @ 0x390 │ │ - ldc2l 6, cr6, [r8, #996] @ 0x3e4 │ │ + ldc2l 7, cr5, [r9, #68] @ 0x44 │ │ + ldc2l 7, cr6, [r8, #152] @ 0x98 │ │ │ │ 024a15fc : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8} │ │ sub sp, sp, #504 @ 0x1f8 │ │ @@ -1404135,15 +1404134,15 @@ │ │ cmn r0, #1 │ │ mov r4, #0 │ │ movwgt r4, #1 │ │ ldr r7, [pc, #2980] @ 24a3190 │ │ mov r8, r4 │ │ add r7, pc, r7 │ │ b 24a2ac4 │ │ - ldc2l 5, cr14, [r7, #388] @ 0x184 │ │ + ldc2l 5, cr14, [r7, #568] @ 0x238 │ │ movw r9, #53392 @ 0xd090 │ │ cmp r7, #84 @ 0x54 │ │ movt r9, #3 │ │ beq 24a2ab4 │ │ ldr r7, [pc, #2696] @ 24a3098 │ │ cmp sl, #84 @ 0x54 │ │ ldr sl, [pc, #2692] @ 24a309c │ │ @@ -1404199,16 +1404198,16 @@ │ │ ldr r7, [pc, #2760] @ 24a31a8 │ │ ldr sl, [pc, #2760] @ 24a31ac │ │ cmp r0, #0 │ │ add r7, pc, r7 │ │ movne r8, r4 │ │ add sl, pc, sl │ │ b 24a2ac4 │ │ - ldc2l 12, cr11, [r8, #552] @ 0x228 │ │ - ldc2l 6, cr7, [sl, #704] @ 0x2c0 │ │ + ldc2l 12, cr11, [r8, #732] @ 0x2dc │ │ + ldc2l 6, cr7, [sl, #884] @ 0x374 │ │ ldr r1, [fp, #16] │ │ movw r9, #53392 @ 0xd090 │ │ ldr r0, [fp, #-248] @ 0xffffff08 │ │ movt r9, #3 │ │ ldr r2, [r1] │ │ sub r1, r0, #1 │ │ str r1, [fp, #-52] @ 0xffffffcc │ │ @@ -1404318,23 +1404317,23 @@ │ │ ldr r0, [pc, #1916] @ 24a3038 │ │ mov r8, #0 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ cmp r5, r0 │ │ movwle r8, #1 │ │ b 24a2ac4 │ │ - ldc2l 10, cr11, [r8, #920] @ 0x398 @ │ │ - ldc2l 5, cr7, [sl, #48] @ 0x30 │ │ - ldc2l 2, cr5, [r9, #128] @ 0x80 │ │ - ldc2l 4, cr7, [sl, #400] @ 0x190 │ │ - ldc2l 2, cr2, [r8, #16] │ │ - ldc2l 3, cr7, [sl, #928] @ 0x3a0 │ │ + ldc2l 11, cr11, [r8, #76] @ 0x4c @ │ │ + ldc2l 5, cr7, [sl, #228] @ 0xe4 │ │ + ldc2l 2, cr5, [r9, #308] @ 0x134 │ │ + ldc2l 4, cr7, [sl, #580] @ 0x244 │ │ + ldc2l 2, cr2, [r8, #196] @ 0xc4 │ │ + ldc2l 4, cr7, [sl, #84] @ 0x54 │ │ ldrbteq pc, [lr], #2392 @ 0x958 @ │ │ - ldc2l 5, cr6, [r7, #724] @ 0x2d4 │ │ - ldc2l 3, cr7, [sl, #336] @ 0x150 │ │ + ldc2l 5, cr6, [r7, #904] @ 0x388 │ │ + ldc2l 3, cr7, [sl, #516] @ 0x204 │ │ streq lr, [r4], #1732 @ 0x6c4 │ │ ldr r0, [pc, #1996] @ 24a30cc │ │ movw r3, #829 @ 0x33d │ │ ldr r6, [pc, #1992] @ 24a30d0 │ │ add r0, pc, r0 │ │ add r6, pc, r6 │ │ mov r2, r6 │ │ @@ -1404471,15 +1404470,15 @@ │ │ mov r2, sl │ │ mov r3, #924 @ 0x39c │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24a20fc │ │ ldc2l 12, cr14, [sl] │ │ - ldc2l 2, cr7, [sl, #512] @ 0x200 │ │ + ldc2l 2, cr7, [sl, #692] @ 0x2b4 │ │ ldreq r7, [sp, #-3184] @ 0xfffff390 │ │ cmp r1, r9 │ │ bcc 24a2b60 │ │ ldr r0, [pc, #1472] @ 24a310c │ │ movw r3, #862 @ 0x35e │ │ ldr r2, [pc, #1468] @ 24a3110 │ │ add r0, pc, r0 │ │ @@ -1404525,19 +1404524,19 @@ │ │ mov r2, #32 │ │ mov r3, #32 │ │ bl 270d960 │ │ cmp r0, #1 │ │ mov r8, #0 │ │ movwlt r8, #1 │ │ b 24a2ac4 │ │ - ldc2l 9, cr9, [r9, #450] @ 0x1c2 @ │ │ - ldc2l 1, cr7, [sl, #864] @ 0x360 │ │ - ldc2l 3, cr6, [r7, #920] @ 0x398 │ │ - ldc2l 2, cr1, [r8, #372] @ 0x174 │ │ - ldc2l 7, cr9, [r8, #244] @ 0xf4 │ │ + ldc2l 10, cr9, [r9, #56] @ 0x38 @ │ │ + ldc2l 2, cr7, [sl, #20] │ │ + ldc2l 4, cr6, [r7, #76] @ 0x4c │ │ + ldc2l 2, cr1, [r8, #552] @ 0x228 │ │ + ldc2l 7, cr9, [r8, #424] @ 0x1a8 │ │ strdeq r7, [fp], -r4 @ │ │ ldr r1, [fp, #16] │ │ movw r9, #53392 @ 0xd090 │ │ ldr r0, [fp, #-248] @ 0xffffff08 │ │ movt r9, #3 │ │ ldr r2, [r1] │ │ sub r1, r0, #1 │ │ @@ -1404660,16 +1404659,16 @@ │ │ bcc 24a2688 │ │ ldr r0, [pc, #728] @ 24a30f0 │ │ mov r2, sl │ │ movw r3, #834 @ 0x342 │ │ add r0, pc, r0 │ │ b 24a2680 │ │ ldrdeq r7, [fp], -r4 @ │ │ - ldc2l 7, cr15, [r8, #308] @ 0x134 │ │ - ldc2l 15, cr0, [r8, #564] @ 0x234 │ │ + ldc2l 7, cr15, [r8, #488] @ 0x1e8 │ │ + ldc2l 15, cr0, [r8, #744] @ 0x2e8 │ │ ldr r0, [pc, #544] @ 24a3058 │ │ movw r3, #787 @ 0x313 │ │ ldr r7, [pc, #540] @ 24a305c │ │ add r0, pc, r0 │ │ add r7, pc, r7 │ │ mov r2, r7 │ │ bl 270d9c0 │ │ @@ -1404732,15 +1404731,15 @@ │ │ mov r4, #0 │ │ add r0, pc, r0 │ │ ldr r0, [r0, r1, lsl #2] │ │ cmp r5, r0 │ │ movwge r4, #1 │ │ mov r8, r4 │ │ b 24a2ac4 │ │ - ldc2l 0, cr13, [r9, #872] @ 0x368 │ │ + ldc2l 1, cr13, [r9, #28] │ │ ldr sl, [pc, #280] @ 24a306c │ │ cmp r1, r9 │ │ add sl, pc, sl │ │ bcc 24a2f74 │ │ ldr r0, [pc, #268] @ 24a3070 │ │ mov r2, sl │ │ movw r3, #795 @ 0x31b │ │ @@ -1404759,16 +1404758,16 @@ │ │ bcc 24a28b4 │ │ ldr r0, [pc, #216] @ 24a307c │ │ mov r2, sl │ │ movw r3, #795 @ 0x31b │ │ add r0, pc, r0 │ │ b 24a28ac │ │ ldreq r8, [r0, #-2864]! @ 0xfffff4d0 │ │ - ldc2l 6, cr11, [r9, #648] @ 0x288 │ │ - ldc2l 14, cr6, [sl, #240] @ 0xf0 │ │ + ldc2l 6, cr11, [r9, #828] @ 0x33c │ │ + ldc2l 14, cr6, [sl, #420] @ 0x1a4 │ │ ldr r0, [pc, #56] @ 24a2ffc │ │ mov r1, #42 @ 0x2a │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #44] @ 24a3000 │ │ sub r1, fp, #232 @ 0xe8 │ │ mov r2, #1 │ │ @@ -1404776,126 +1404775,126 @@ │ │ bl 270da90 │ │ ldr r0, [pc, #28] @ 24a3004 │ │ mov r1, #18 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 24a2050 │ │ ldreq r8, [r0, #-2736]! @ 0xfffff550 │ │ - ldc2l 11, cr13, [r7, #244] @ 0xf4 @ │ │ - ldc2l 6, cr8, [r9, #136] @ 0x88 │ │ - ldc2l 14, cr15, [r7, #932] @ 0x3a4 │ │ - ldc2l 7, cr4, [r7, #824] @ 0x338 │ │ - ldc2l 13, cr6, [sl, #592] @ 0x250 │ │ - ldc2l 5, cr11, [r9, #184] @ 0xb8 │ │ - ldc2l 4, cr11, [r9, #1000] @ 0x3e8 │ │ - ldc2l 4, cr9, [r9, #420] @ 0x1a4 │ │ + ldc2l 11, cr13, [r7, #424] @ 0x1a8 @ │ │ + ldc2l 6, cr8, [r9, #316] @ 0x13c │ │ + ldc2l 15, cr15, [r7, #88] @ 0x58 │ │ + ldc2l 7, cr4, [r7, #1004] @ 0x3ec │ │ + ldc2l 13, cr6, [sl, #772] @ 0x304 │ │ + ldc2l 5, cr11, [r9, #364] @ 0x16c │ │ + ldc2l 5, cr11, [r9, #156] @ 0x9c │ │ + ldc2l 4, cr9, [r9, #600] @ 0x258 │ │ streq fp, [ip, #-2216]! @ 0xfffff758 │ │ - ldc2l 4, cr9, [r9, #148] @ 0x94 │ │ + ldc2l 4, cr9, [r9, #328] @ 0x148 │ │ streq fp, [ip, #-2148]! @ 0xfffff79c │ │ ldreq r8, [r0, #-692]! @ 0xfffffd4c │ │ - ldc2l 5, cr6, [sl, #800] @ 0x320 │ │ + ldc2l 5, cr6, [sl, #980] @ 0x3d4 │ │ ldc2l 15, cr13, [sl, #112] @ 0x70 │ │ ldreq r6, [sp, #-4004] @ 0xfffff05c │ │ ldc2l 14, cr13, [sl, #912] @ 0x390 │ │ ldreq r6, [sp, #-3948] @ 0xfffff094 │ │ ldreq r8, [r0, #-1964]! @ 0xfffff854 │ │ - ldc2l 10, cr6, [sl, #768] @ 0x300 @ │ │ + ldc2l 10, cr6, [sl, #948] @ 0x3b4 @ │ │ ldc2l 4, cr14, [sl, #80] @ 0x50 │ │ ldreq r7, [sp, #-1180] @ 0xfffffb64 │ │ ldc2l 3, cr14, [sl, #880] @ 0x370 │ │ ldreq r7, [sp, #-1128] @ 0xfffffb98 │ │ - ldc2l 0, cr6, [sl, #368] @ 0x170 │ │ + ldc2l 0, cr6, [sl, #548] @ 0x224 │ │ ldc2l 9, cr13, [sl, #160] @ 0xa0 @ │ │ - ldc2l 15, cr5, [sl, #832] @ 0x340 │ │ + ldc2l 15, cr5, [sl, #1012] @ 0x3f4 │ │ ldreq r6, [sp, #-2512] @ 0xfffff630 │ │ ldc2l 9, cr13, [sl, #32] @ │ │ ldreq r6, [sp, #-2460] @ 0xfffff664 │ │ - ldc2l 14, cr5, [sl, #752] @ 0x2f0 │ │ + ldc2l 14, cr5, [sl, #932] @ 0x3a4 │ │ vcadd.f32 d29, d10, d20, #270 │ │ ldreq r6, [sp, #-2220] @ 0xfffff754 │ │ ldreq r7, [r0, #-2916]! @ 0xfffff49c │ │ ldc2l 7, cr13, [sl, #912] @ 0x390 │ │ - ldc2l 15, cr5, [sl, #288] @ 0x120 │ │ + ldc2l 15, cr5, [sl, #468] @ 0x1d4 │ │ ldc2l 8, cr13, [sl, #704] @ 0x2c0 │ │ ldreq r6, [sp, #-2360] @ 0xfffff6c8 │ │ ldreq r7, [r0, #-3056]! @ 0xfffff410 │ │ ldc2l 8, cr13, [sl, #448] @ 0x1c0 │ │ ldreq r6, [sp, #-2296] @ 0xfffff708 │ │ ldreq r8, [r0, #-1252]! @ 0xfffffb1c │ │ - ldc2l 7, cr6, [sl, #992] @ 0x3e0 │ │ - ldc2l 5, cr1, [r8, #928] @ 0x3a0 │ │ + vcadd.f32 d22, d10, d21, #270 │ │ + ldc2l 6, cr1, [r8, #84] @ 0x54 │ │ ldrbteq lr, [lr], #3412 @ 0xd54 │ │ - ldc2l 5, cr1, [r8, #688] @ 0x2b0 │ │ + ldc2l 5, cr1, [r8, #868] @ 0x364 │ │ ldrbteq lr, [lr], #3352 @ 0xd18 │ │ ldreq r8, [r0, #-2188]! @ 0xfffff774 │ │ - ldc2l 11, cr6, [sl, #640] @ 0x280 @ │ │ - ldc2l 9, cr1, [r8, #288] @ 0x120 @ │ │ + ldc2l 11, cr6, [sl, #820] @ 0x334 @ │ │ + ldc2l 9, cr1, [r8, #378] @ 0x17a @ │ │ ldrbteq pc, [lr], #252 @ 0xfc @ │ │ - ldc2l 9, cr1, [r8, #168] @ 0xa8 @ │ │ + ldc2l 9, cr1, [r8, #258] @ 0x102 @ │ │ ldrbteq pc, [lr], #196 @ 0xc4 @ │ │ - ldc2l 5, cr6, [sl, #976] @ 0x3d0 │ │ - ldc2l 3, cr1, [r8, #144] @ 0x90 │ │ - ldc2l 5, cr6, [sl, #32] │ │ + ldc2l 6, cr6, [sl, #132] @ 0x84 │ │ + ldc2l 3, cr1, [r8, #324] @ 0x144 │ │ + ldc2l 5, cr6, [sl, #212] @ 0xd4 │ │ ldrbteq lr, [lr], #2696 @ 0xa88 │ │ - ldc2l 2, cr1, [r8, #896] @ 0x380 │ │ + ldc2l 3, cr1, [r8, #52] @ 0x34 │ │ ldrbteq lr, [lr], #2640 @ 0xa50 │ │ - ldc2l 0, cr6, [sl, #304] @ 0x130 │ │ - ldc2l 14, cr0, [r8, #320] @ 0x140 │ │ + ldc2l 0, cr6, [sl, #484] @ 0x1e4 │ │ + ldc2l 14, cr0, [r8, #500] @ 0x1f4 │ │ ldrbteq lr, [lr], #1468 @ 0x5bc │ │ ldreq r7, [r0, #-3312]! @ 0xfffff310 │ │ - ldc2l 14, cr0, [r8, #48] @ 0x30 │ │ - ldc2l 1, cr6, [sl, #768] @ 0x300 │ │ - ldc2l 15, cr0, [r8, #784] @ 0x310 │ │ + ldc2l 14, cr0, [r8, #228] @ 0xe4 │ │ + ldc2l 1, cr6, [sl, #948] @ 0x3b4 │ │ + ldc2l 15, cr0, [r8, #964] @ 0x3c4 │ │ ldrbteq lr, [lr], #1840 @ 0x730 │ │ ldreq r7, [r0, #-3684]! @ 0xfffff19c │ │ - ldc2l 15, cr0, [r8, #512] @ 0x200 │ │ + ldc2l 15, cr0, [r8, #692] @ 0x2b4 │ │ ldrbteq lr, [lr], #1772 @ 0x6ec │ │ - ldc2l 5, cr5, [r7, #116] @ 0x74 │ │ - ldc2l 2, cr6, [sl, #752] @ 0x2f0 │ │ + ldc2l 5, cr5, [r7, #296] @ 0x128 │ │ + ldc2l 2, cr6, [sl, #932] @ 0x3a4 │ │ streq sp, [r4], #1596 @ 0x63c │ │ - ldc2l 4, cr5, [r7, #836] @ 0x344 │ │ - ldc2l 2, cr6, [sl, #448] @ 0x1c0 │ │ + ldc2l 4, cr5, [r7, #1016] @ 0x3f8 │ │ + ldc2l 2, cr6, [sl, #628] @ 0x274 │ │ streq sp, [r4], #1520 @ 0x5f0 │ │ ldreq r7, [r0, #-3868]! @ 0xfffff0e4 │ │ - ldc2l 2, cr6, [sl, #192] @ 0xc0 │ │ - ldc2l 9, cr5, [r7, #114] @ 0x72 @ │ │ - ldc2l 6, cr6, [sl, #864] @ 0x360 │ │ + ldc2l 2, cr6, [sl, #372] @ 0x174 │ │ + ldc2l 9, cr5, [r7, #204] @ 0xcc @ │ │ + ldc2l 7, cr6, [sl, #20] │ │ streq sp, [r4], #2648 @ 0xa58 │ │ - vcadd.f32 , , , #270 │ │ - ldc2l 6, cr6, [sl, #560] @ 0x230 │ │ + ldc2l 9, cr5, [r7, #52] @ 0x34 @ │ │ + ldc2l 6, cr6, [sl, #740] @ 0x2e4 │ │ streq sp, [r4], #2572 @ 0xa0c │ │ ldreq r8, [r0, #-820]! @ 0xfffffccc │ │ - ldc2l 6, cr6, [sl, #288] @ 0x120 │ │ - ldc2l 12, cr5, [r7, #100] @ 0x64 │ │ - ldc2l 9, cr6, [sl, #368] @ 0x170 @ │ │ + ldc2l 6, cr6, [sl, #468] @ 0x1d4 │ │ + ldc2l 12, cr5, [r7, #280] @ 0x118 │ │ + ldc2l 9, cr6, [sl, #458] @ 0x1ca @ │ │ streq sp, [r4], #3384 @ 0xd38 │ │ - ldc2l 11, cr5, [r7, #788] @ 0x314 @ │ │ - ldc2l 9, cr6, [sl, #200] @ 0xc8 @ │ │ + ldc2l 11, cr5, [r7, #968] @ 0x3c8 @ │ │ + ldc2l 9, cr6, [sl, #290] @ 0x122 @ │ │ streq sp, [r4], #3300 @ 0xce4 │ │ - ldc2l 1, cr6, [sl, #208] @ 0xd0 │ │ - ldc2l 3, cr5, [r7, #500] @ 0x1f4 │ │ + ldc2l 1, cr6, [sl, #388] @ 0x184 │ │ + ldc2l 3, cr5, [r7, #680] @ 0x2a8 │ │ streq sp, [r4], #1184 @ 0x4a0 │ │ - ldc2l 3, cr5, [r7, #212] @ 0xd4 │ │ + ldc2l 3, cr5, [r7, #392] @ 0x188 │ │ streq sp, [r4], #1112 @ 0x458 │ │ ldreq r7, [r0, #-3436]! @ 0xfffff294 │ │ - ldc2l 8, cr6, [sl, #864] @ 0x360 │ │ - ldc2l 11, cr5, [r7, #132] @ 0x84 @ │ │ + ldc2l 9, cr6, [sl, #10] @ │ │ + ldc2l 11, cr5, [r7, #312] @ 0x138 @ │ │ streq sp, [r4], #3140 @ 0xc44 │ │ - ldc2l 10, cr5, [r7, #868] @ 0x364 @ │ │ + ldc2l 11, cr5, [r7, #24] @ │ │ streq sp, [r4], #3068 @ 0xbfc │ │ ldreq r8, [r0, #-1292]! @ 0xfffffaf4 │ │ strdeq r7, [fp], -r8 @ │ │ ldreq r8, [r0, #-60]! @ 0xffffffc4 │ │ - ldc2l 3, cr6, [sl, #320] @ 0x140 │ │ - ldc2l 11, cr10, [r9, #488] @ 0x1e8 @ │ │ - ldc2l 11, cr10, [r9, #328] @ 0x148 @ │ │ + ldc2l 3, cr6, [sl, #500] @ 0x1f4 │ │ + ldc2l 11, cr10, [r9, #668] @ 0x29c @ │ │ + ldc2l 11, cr10, [r9, #508] @ 0x1fc @ │ │ ldreq r8, [r0, #-1044]! @ 0xfffffbec │ │ - ldc2l 7, cr6, [sl, #144] @ 0x90 │ │ + ldc2l 7, cr6, [sl, #324] @ 0x144 │ │ ldreq r8, [r0, #-1780]! @ 0xfffff90c │ │ - ldc2l 10, cr6, [sl, #16] @ │ │ + ldc2l 10, cr6, [sl, #196] @ 0xc4 @ │ │ │ │ 024a31b8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #92 @ 0x5c │ │ cmp r0, #1 │ │ beq 24a3230 │ │ @@ -1405930,22 +1405929,22 @@ │ │ str r3, [fp, #-36] @ 0xffffffdc │ │ ldr r0, [pc, #4076] @ 24a51d4 │ │ add r0, pc, r0 │ │ add r2, r0, r1, lsl #2 │ │ b 24a4430 │ │ ldreq fp, [pc, #-2876]! @ 24a36bc │ │ ldreq fp, [pc, #-2896]! @ 24a36ac │ │ - ldc2l 9, cr2, [r8, #16] @ │ │ - ldc2l 13, cr15, [r9, #772] @ 0x304 │ │ + ldc2l 9, cr2, [r8, #106] @ 0x6a @ │ │ + ldc2l 13, cr15, [r9, #952] @ 0x3b8 │ │ ldreq fp, [pc, #-2764]! @ 24a373c │ │ - ldc2l 13, cr15, [r9, #564] @ 0x234 │ │ + ldc2l 13, cr15, [r9, #744] @ 0x2e8 │ │ ldc2l 6, cr11, [sl, #28] │ │ - ldc2l 1, cr7, [sl, #708] @ 0x2c4 │ │ + ldc2l 1, cr7, [sl, #888] @ 0x378 │ │ strbeq r3, [r0, #-2072] @ 0xfffff7e8 │ │ - ldc2l 8, cr2, [r8, #320] @ 0x140 │ │ + ldc2l 8, cr2, [r8, #500] @ 0x1f4 │ │ ldreq fp, [pc, #-2692]! @ 24a379c │ │ ldreq fp, [pc, #-3516]! @ 24a3468 │ │ ldreq fp, [pc, #-2664]! @ 24a37c0 │ │ ldreq fp, [pc, #-2608]! @ 24a37fc │ │ strbeq r2, [r0, #-1624] @ 0xfffff9a8 │ │ ldr r0, [pc, #4004] @ 24a51d8 │ │ mov r1, r2 │ │ @@ -1406026,31 +1406025,31 @@ │ │ ldreq fp, [pc, #-3352]! @ 24a364c │ │ strbeq r1, [r0, #-1200] @ 0xfffffb50 │ │ ldreq fp, [pc, #-2464]! @ 24a39cc │ │ strbeq r3, [r0, #-1792] @ 0xfffff900 │ │ ldreq fp, [pc, #-3296]! @ 24a3694 │ │ strbeq r0, [r0, #-3188] @ 0xfffff38c │ │ strbeq r0, [r0, #-3968] @ 0xfffff080 │ │ - ldc2l 11, cr15, [r9, #936] @ 0x3a8 @ │ │ + ldc2l 12, cr15, [r9, #92] @ 0x5c │ │ strbeq r0, [r0, #-3124] @ 0xfffff3cc │ │ strbeq r0, [r0, #-3912] @ 0xfffff0b8 │ │ ldreq fp, [pc, #-3152]! @ 24a373c │ │ ldreq fp, [pc, #-3532]! @ 24a35c4 │ │ strbeq r1, [r0, #-972] @ 0xfffffc34 │ │ ldreq lr, [pc, #-804]! @ 24a4074 │ │ strbeq r2, [r0, #-1244] @ 0xfffffb24 │ │ ldreq lr, [pc, #-1160]! @ 24a3f18 │ │ ldreq fp, [pc, #-2180]! @ 24a3b20 │ │ ldreq fp, [pc, #-2144]! @ 24a3b48 │ │ ldreq fp, [pc, #-2148]! @ 24a3b48 │ │ ldreq fp, [pc, #-2120]! @ 24a3b68 │ │ eoreq r6, fp, r8, ror r6 │ │ strbeq r0, [r0, #-2872] @ 0xfffff4c8 │ │ - ldc2l 5, cr2, [r8, #880] @ 0x370 │ │ - ldc2l 0, cr8, [r9, #704] @ 0x2c0 │ │ + ldc2l 6, cr2, [r8, #36] @ 0x24 │ │ + ldc2l 0, cr8, [r9, #884] @ 0x374 │ │ ldreq fp, [pc, #-2848]! @ 24a38a4 │ │ ldreq fp, [pc, #-2032]! @ 24a3bd8 │ │ ldreq fp, [pc, #-2856]! @ 24a38a4 │ │ strbeq r2, [r0, #-1028] @ 0xfffffbfc │ │ ldreq fp, [pc, #-2804]! @ 24a38e0 │ │ ldreq fp, [pc, #-2812]! @ 24a38dc │ │ ldreq fp, [pc, #-2776]! @ 24a3904 │ │ @@ -1406207,15 +1406206,15 @@ │ │ blt 24a48b4 │ │ mov r2, #0 │ │ mov r0, #1 │ │ b 24a4670 │ │ ldreq fp, [pc, #-2648]! @ 24a3bf0 │ │ strbeq r3, [r0, #-1140] @ 0xfffffb8c │ │ strbeq r0, [r0, #-3764] @ 0xfffff14c │ │ - ldc2l 13, cr13, [r9, #680] @ 0x2a8 │ │ + ldc2l 13, cr13, [r9, #860] @ 0x35c │ │ ldreq fp, [pc, #-2512]! @ 24a3c88 │ │ strbeq r0, [r0, #-4088] @ 0xfffff008 │ │ mov r2, r0 │ │ ldr r1, [fp, #-32] @ 0xffffffe0 │ │ add r0, r2, #1 │ │ str r0, [r8] │ │ cmp r2, r1 │ │ @@ -1406246,15 +1406245,15 @@ │ │ ldr r3, [r2, r1, lsl #2] │ │ ldr r2, [pc, #3452] @ 24a5454 │ │ add r2, pc, r2 │ │ str r3, [r2] │ │ mov r2, r0 │ │ b 24a4748 │ │ ldreq fp, [pc, #-1596]! @ 24a40b0 │ │ - ldc2l 14, cr7, [r9, #992] @ 0x3e0 │ │ + ldc2l 15, cr7, [r9, #148] @ 0x94 │ │ ldreq fp, [pc, #-1552]! @ 24a40e4 │ │ ldreq fp, [pc, #-2408]! @ 24a3d90 │ │ ldreq fp, [pc, #-1972]! @ 24a3f48 │ │ ldreq fp, [pc, #-1512]! @ 24a4118 │ │ strbeq r0, [r0, #-2716] @ 0xfffff564 │ │ ldr r0, [pc, #3408] @ 24a5458 │ │ mov r2, sl │ │ @@ -1406282,24 +1406281,24 @@ │ │ str r0, [r4] │ │ ldr r4, [r6, r3, lsl #2] │ │ str r4, [r7, r1, lsl #2] │ │ ldr r4, [r6, r0, lsl #2] │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ str r4, [r5, r1, lsl #2] │ │ b 24a465c │ │ - ldc2l 6, cr1, [sl, #52] @ 0x34 │ │ + ldc2l 6, cr1, [sl, #232] @ 0xe8 │ │ ldreq fp, [pc, #-1896]! @ 24a401c │ │ ldreq fp, [pc, #-1436]! @ 24a41ec │ │ ldreq fp, [pc, #-1416]! @ 24a4204 │ │ ldreq fp, [pc, #-2276]! @ 24a3eac │ │ - ldc2l 1, cr10, [r7, #280] @ 0x118 │ │ + ldc2l 1, cr10, [r7, #460] @ 0x1cc │ │ strbeq r0, [r0, #-2592] @ 0xfffff5e0 │ │ ldreq fp, [pc, #-1356]! @ 24a4250 │ │ ldreq fp, [pc, #-2208]! @ 24a3f00 │ │ - ldc2l 1, cr8, [r7, #556] @ 0x22c │ │ + ldc2l 1, cr8, [r7, #736] @ 0x2e0 │ │ ldreq fp, [pc, #-2156]! @ 24a3f3c │ │ strbeq r0, [r0, #-2104] @ 0xfffff7c8 │ │ strbeq r1, [r0, #-24] @ 0xffffffe8 │ │ strbeq r0, [r0, #-2484] @ 0xfffff64c │ │ ldr r0, [pc, #4016] @ 24a5768 │ │ mov r2, r9 │ │ mov r3, #1280 @ 0x500 │ │ @@ -1406355,18 +1406354,18 @@ │ │ ldreq fp, [pc, #-2456]! @ 24a3ef0 │ │ strbeq r3, [r0, #-536] @ 0xfffffde8 │ │ ldreq fp, [pc, #-1164]! @ 24a4404 │ │ ldreq fp, [pc, #-1988]! @ 24a40d0 │ │ ldreq fp, [pc, #-1132]! @ 24a442c │ │ ldreq fp, [pc, #-1960]! @ 24a40f4 │ │ ldreq fp, [pc, #-1112]! @ 24a4448 │ │ - ldc2l 13, cr5, [r9, #912] @ 0x390 │ │ + ldc2l 14, cr5, [r9, #68] @ 0x44 │ │ strbeq r0, [r0, #-1848] @ 0xfffff8c8 │ │ ldreq fp, [pc, #-1908]! @ 24a4138 │ │ - ldc2l 10, cr3, [sl, #872] @ 0x368 @ │ │ + ldc2l 11, cr3, [sl, #28] @ │ │ strbeq r0, [r0, #-1776] @ 0xfffff910 │ │ ldreq fp, [pc, #-2244]! @ 24a3ff4 │ │ ldr r0, [pc, #3796] @ 24a5790 │ │ add r0, pc, r0 │ │ str r0, [sp, #32] │ │ ldr r0, [pc, #3788] @ 24a5794 │ │ add r0, pc, r0 │ │ @@ -1406464,19 +1406463,19 @@ │ │ cmp r1, #99 @ 0x63 │ │ bhi 24a4a64 │ │ mov r2, r9 │ │ ldr r9, [pc, #3500] @ 24a57f4 │ │ add r9, pc, r9 │ │ b 24a4450 │ │ ldreq fp, [pc, #-788]! @ 24a4740 │ │ - ldc2l 1, cr12, [r7, #232] @ 0xe8 │ │ + ldc2l 1, cr12, [r7, #412] @ 0x19c │ │ ldreq sp, [pc, #-3424]! @ 24a3cfc │ │ strbeq r0, [r0, #-1524] @ 0xfffffa0c │ │ - ldc2l 1, cr6, [r8, #192] @ 0xc0 │ │ - ldc2l 0, cr2, [r8, #480] @ 0x1e0 │ │ + ldc2l 1, cr6, [r8, #372] @ 0x174 │ │ + ldc2l 0, cr2, [r8, #660] @ 0x294 │ │ ldr r0, [pc, #3468] @ 24a57f8 │ │ mov sl, r3 │ │ mov r1, r7 │ │ mov r2, r6 │ │ add r0, pc, r0 │ │ movw r3, #1227 @ 0x4cb │ │ bl 270d9c0 │ │ @@ -1406491,15 +1406490,15 @@ │ │ mov r2, r9 │ │ ldr r9, [pc, #4092] @ 24a5aa8 │ │ mov r3, sl │ │ add r9, pc, r9 │ │ b 24a445c │ │ strbeq r0, [r0, #-1452] @ 0xfffffa54 │ │ ldc2l 14, cr8, [sl, #976] @ 0x3d0 │ │ - ldc2l 0, cr2, [r8, #240] @ 0xf0 │ │ + ldc2l 0, cr2, [r8, #420] @ 0x1a4 │ │ ldreq fp, [pc, #-568]! @ 24a4890 │ │ ldr r0, [pc, #4064] @ 24a5aac │ │ mov r2, r6 │ │ movw r3, #1227 @ 0x4cb │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r1, [pc, #4048] @ 24a5ab0 │ │ @@ -1406515,15 +1406514,15 @@ │ │ bhi 24a4b48 │ │ mov r2, r9 │ │ ldr r9, [pc, #4088] @ 24a5b08 │ │ mov r3, sl │ │ add r9, pc, r9 │ │ b 24a4474 │ │ ldreq fp, [pc, #-572]! @ 24a48e4 │ │ - ldc2l 15, cr1, [r8, #1008] @ 0x3f0 │ │ + ldc2l 0, cr2, [r8, #164] @ 0xa4 │ │ ldreq fp, [pc, #-1388]! @ 24a45bc │ │ ldreq fp, [pc, #-544]! @ 24a490c │ │ ldreq fp, [pc, #-532]! @ 24a491c │ │ ldreq fp, [pc, #-512]! @ 24a4934 │ │ ldreq fp, [pc, #-1324]! @ 24a460c │ │ strbeq r0, [r0, #-2904] @ 0xfffff4a8 │ │ ldreq fp, [pc, #-504]! @ 24a4948 │ │ @@ -1406620,17 +1406619,17 @@ │ │ b 24a4ce4 │ │ strbeq r0, [r0, #-2572] @ 0xfffff5f4 │ │ ldreq fp, [pc, #-144]! @ 24a4c24 │ │ ldreq fp, [pc, #-972]! @ 24a48ec │ │ ldreq fp, [pc, #-932]! @ 24a4918 │ │ strbeq r0, [r0, #-2496] @ 0xfffff640 │ │ ldreq fp, [pc, #-912]! @ 24a4934 │ │ - ldc2l 7, cr13, [r9, #232] @ 0xe8 │ │ + ldc2l 7, cr13, [r9, #412] @ 0x19c │ │ strbeq r2, [r0, #-3480] @ 0xfffff268 │ │ - ldc2l 13, cr1, [r8, #864] @ 0x360 │ │ + ldc2l 14, cr1, [r8, #20] │ │ mov r0, r2 │ │ ldr r1, [fp, #-56] @ 0xffffffc8 │ │ add r2, r0, #1 │ │ str r2, [r5] │ │ cmp r0, r1 │ │ bge 24a5128 │ │ sub r1, r2, #1 │ │ @@ -1406682,23 +1406681,23 @@ │ │ ldr r5, [r8, r0, lsl #2] │ │ sub r1, r2, #1 │ │ cmp r1, #100 @ 0x64 │ │ bcs 24a4dec │ │ mov r0, r1 │ │ b 24a4e0c │ │ ldreq sl, [pc, #-3948]! @ 24a3e50 │ │ - vcadd.f32 d23, d9, d24, #270 │ │ + ldc2l 8, cr7, [r9, #340] @ 0x154 │ │ ldreq sl, [pc, #-3904]! @ 24a3e84 │ │ ldreq fp, [pc, #-664]! @ 24a4b30 │ │ ldreq fp, [pc, #-228]! @ 24a4ce8 │ │ ldreq sl, [pc, #-3864]! @ 24a3eb8 │ │ strbeq r0, [r0, #-972] @ 0xfffffc34 │ │ strbeq r0, [r0, #-1756] @ 0xfffff924 │ │ - ldc2l 12, cr1, [r8, #832] @ 0x340 │ │ - ldc2l 15, cr0, [sl, #180] @ 0xb4 │ │ + ldc2l 12, cr1, [r8, #1012] @ 0x3f4 │ │ + ldc2l 15, cr0, [sl, #360] @ 0x168 │ │ ldreq fp, [pc, #-136]! @ 24a4d5c │ │ ldreq sl, [pc, #-3772]! @ 24a3f2c │ │ ldreq sl, [pc, #-3752]! @ 24a3f44 │ │ ldreq fp, [pc, #-516]! @ 24a4bec │ │ ldr r0, [pc, #4080] @ 24a5de4 │ │ mov r2, r4 │ │ movw r3, #655 @ 0x28f │ │ @@ -1406742,22 +1406741,22 @@ │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ ldr r5, [pc, #3952] @ 24a5e08 │ │ ldr r5, [pc, r5] │ │ bcs 24a4f28 │ │ ldr r9, [pc, #3944] @ 24a5e0c │ │ add r9, pc, r9 │ │ b 24a4f48 │ │ - ldc2l 5, cr13, [r9, #712] @ 0x2c8 │ │ - ldc2l 10, cr9, [r7, #360] @ 0x168 @ │ │ + ldc2l 5, cr13, [r9, #892] @ 0x37c │ │ + ldc2l 10, cr9, [r7, #540] @ 0x21c @ │ │ strbeq r0, [r0, #-820] @ 0xfffffccc │ │ ldreq sl, [pc, #-3680]! @ 24a405c │ │ ldreq fp, [pc, #-436]! @ 24a4d0c │ │ - ldc2l 10, cr7, [r7, #636] @ 0x27c @ │ │ + ldc2l 10, cr7, [r7, #816] @ 0x330 @ │ │ ldreq fp, [pc, #-384]! @ 24a4d48 │ │ - ldc2l 5, cr13, [r9, #264] @ 0x108 │ │ + ldc2l 5, cr13, [r9, #444] @ 0x1bc │ │ ldreq sl, [pc, #-3628]! @ 24a40a4 │ │ ldreq sl, [pc, #-3580]! @ 24a40d8 │ │ ldreq sl, [pc, #-3592]! @ 24a40d0 │ │ strbeq r1, [r0, #-2584] @ 0xfffff5e8 │ │ ldreq sl, [pc, #-3544]! @ 24a4108 │ │ strbeq r1, [r0, #-2552] @ 0xfffff608 │ │ strbeq r2, [r0, #-2856] @ 0xfffff4d8 │ │ @@ -1406767,15 +1406766,15 @@ │ │ ldreq fp, [pc, #-212]! @ 24a4e24 │ │ strbeq r0, [r0, #-2156] @ 0xfffff794 │ │ strbeq r2, [r0, #-2760] @ 0xfffff538 │ │ ldreq fp, [pc, #-168]! @ 24a4e5c │ │ ldreq sl, [pc, #-3388]! @ 24a41cc │ │ strbeq r0, [r0, #-52] @ 0xffffffcc │ │ ldreq fp, [pc, #-92]! @ 24a4eb4 │ │ - ldc2l 6, cr5, [r9, #576] @ 0x240 │ │ + ldc2l 6, cr5, [r9, #756] @ 0x2f4 │ │ ldreq pc, [pc, #-4068]! @ 24a3f34 │ │ ldreq fp, [pc, #-32]! @ 24a4efc │ │ ldreq fp, [pc, #-392]! @ 24a4d98 │ │ strbeq r0, [r0, #-1932] @ 0xfffff874 │ │ ldreq sp, [pc, #-1764]! @ 24a4844 │ │ strbeq r1, [r0, #-2200] @ 0xfffff768 │ │ ldr r0, [pc, #3808] @ 24a5e10 │ │ @@ -1406946,15 +1406945,15 @@ │ │ ldreq pc, [pc, #-3768]! @ 24a430c │ │ ldr r1, [pc, #3684] @ 24a602c │ │ mov r0, #1 │ │ add r1, pc, r1 │ │ strb r0, [r1] │ │ b 24a32c0 │ │ ldreq sl, [pc, #-3808]! @ 24a42fc │ │ - ldc2l 2, cr3, [sl, #72] @ 0x48 │ │ + ldc2l 2, cr3, [sl, #252] @ 0xfc │ │ ldreq pc, [pc, #-3624]! @ 24a43bc │ │ ldreq sl, [pc, #-4084]! @ 24a41f4 │ │ ldc2l 7, cr8, [sl, #340] @ 0x154 │ │ strbeq r0, [r0, #-1488] @ 0xfffffa30 │ │ ldreq pc, [pc, #-3544]! @ 24a441c │ │ mov r0, #3 │ │ mov r2, r4 │ │ @@ -1406997,24 +1406996,24 @@ │ │ ldr r0, [r7] │ │ add r1, pc, r1 │ │ str r0, [r2] │ │ ldr r0, [fp, #16] │ │ ldr r0, [r0] │ │ str r0, [r1] │ │ b 24a5b64 │ │ - vcadd.f32 , , q11, #270 │ │ + ldc2l 9, cr11, [r7, #38] @ 0x26 @ │ │ mov r0, #1 │ │ cmp r7, #1 │ │ str r0, [r5] │ │ blt 24a5204 │ │ mov r0, #0 │ │ b 24a52e8 │ │ ldreq sp, [pc, #-1292]! @ 24a4dbc │ │ ldreq pc, [pc, #-3488]! @ 24a452c │ │ - vcadd.f32 , q12, q10, #270 │ │ + ldc2l 9, cr5, [r8, #34] @ 0x22 @ │ │ ldreq pc, [pc, #-3428]! @ 24a4570 │ │ ldc2l 6, cr8, [sl, #688] @ 0x2b0 │ │ add r1, r0, #2 │ │ add r0, r0, #1 │ │ cmp r0, r7 │ │ str r1, [r5] │ │ bge 24a5d3c │ │ @@ -1407071,29 +1407070,29 @@ │ │ ldr ip, [r1] │ │ ldr r2, [r2] │ │ str r2, [r7] │ │ ldr r7, [r9] │ │ sub r0, r0, r7 │ │ ldr r7, [fp, #24] │ │ b 24a5484 │ │ - ldc2l 3, cr5, [r9, #96] @ 0x60 │ │ + ldc2l 3, cr5, [r9, #276] @ 0x114 │ │ ldreq pc, [pc, #-3180]! @ 24a476c │ │ ldreq sl, [pc, #-3240]! @ 24a4734 │ │ ldreq sl, [pc, #-3596]! @ 24a45d4 │ │ strbeq r0, [r0, #-1040] @ 0xfffffbf0 │ │ ldreq sp, [pc, #-872]! @ 24a5080 │ │ strbeq r1, [r0, #-1312] @ 0xfffffae0 │ │ ldreq sp, [pc, #-1232]! @ 24a4f20 │ │ ldreq sl, [pc, #-2224]! @ 24a4b44 │ │ ldreq sl, [pc, #-2232]! @ 24a4b40 │ │ ldreq sl, [pc, #-2204]! @ 24a4b60 │ │ ldrdeq r5, [fp], -r0 @ │ │ ldreq pc, [pc, #-2952]! @ 24a487c │ │ ldreq sl, [pc, #-2972]! @ 24a486c │ │ - ldc2l 0, cr7, [r9, #1008] @ 0x3f0 │ │ + ldc2l 1, cr7, [r9, #164] @ 0xa4 │ │ ldreq sl, [pc, #-2948]! @ 24a488c │ │ strbeq r1, [r0, #-1120] @ 0xfffffba0 │ │ ldreq sl, [pc, #-2896]! @ 24a48c8 │ │ ldreq sl, [pc, #-2084]! @ 24a4bf8 │ │ ldreq sl, [pc, #-2892]! @ 24a48d4 │ │ ldreq sl, [pc, #-2856]! @ 24a48fc │ │ strbeq r0, [r0, #-308] @ 0xfffffecc │ │ @@ -1407101,20 +1407100,20 @@ │ │ ldreq sl, [pc, #-2804]! @ 24a493c │ │ ldreq sl, [pc, #-2764]! @ 24a4968 │ │ strbeq r0, [r0, #-232] @ 0xffffff18 │ │ ldreq sl, [pc, #-2732]! @ 24a4990 │ │ strbeq r2, [r0, #-1224] @ 0xfffffb38 │ │ ldreq pc, [pc, #-3844]! @ 24a4540 │ │ ldreq pc, [pc, #-3040]! @ 24a4868 │ │ - ldc2l 13, cr12, [r9, #888] @ 0x378 │ │ + ldc2l 14, cr12, [r9, #44] @ 0x2c │ │ ldreq sl, [pc, #-2564]! @ 24a4a4c │ │ strbeq r0, [r0, #-44] @ 0xffffffd4 │ │ ldreq sl, [pc, #-1708]! @ 24a4dac │ │ ldreq sl, [pc, #-1640]! @ 24a4df4 │ │ - ldc2l 15, cr6, [r9, #16] │ │ + ldc2l 15, cr6, [r9, #196] @ 0xc4 │ │ ldreq sl, [pc, #-1624]! @ 24a4e0c │ │ ldreq sl, [pc, #-1556]! @ 24a4e54 │ │ ldreq sl, [pc, #-2412]! @ 24a4b00 │ │ ldreq sl, [pc, #-1976]! @ 24a4cb8 │ │ ldreq sl, [pc, #-1516]! @ 24a4e88 │ │ ldr r2, [fp, #12] │ │ ldr r3, [r6] │ │ @@ -1407302,23 +1407301,23 @@ │ │ ldr sl, [sp, #40] @ 0x28 │ │ add r6, pc, r6 │ │ str r2, [r6] │ │ ldr r7, [r7] │ │ ldr r6, [fp, #24] │ │ sub r0, r0, r7 │ │ b 24a5828 │ │ - ldc2l 5, cr0, [sl, #900] @ 0x384 │ │ + ldc2l 6, cr0, [sl, #56] @ 0x38 │ │ ldreq sl, [pc, #-1852]! @ 24a5038 │ │ ldreq sl, [pc, #-1392]! @ 24a5208 │ │ ldreq sl, [pc, #-1372]! @ 24a5220 │ │ ldreq sl, [pc, #-2232]! @ 24a4ec8 │ │ - ldc2l 1, cr9, [r7, #104] @ 0x68 │ │ + ldc2l 1, cr9, [r7, #284] @ 0x11c │ │ ldreq sl, [pc, #-1320]! @ 24a5260 │ │ ldreq sl, [pc, #-2172]! @ 24a4f10 │ │ - ldc2l 1, cr7, [r7, #412] @ 0x19c │ │ + ldc2l 1, cr7, [r7, #592] @ 0x250 │ │ ldreq sl, [pc, #-2120]! @ 24a4f4c │ │ ldreq pc, [pc, #-1984]! @ 24a4fd8 │ │ ldreq pc, [pc, #-4000]! @ 24a47fc │ │ ldreq pc, [pc, #-1556]! @ 24a518c │ │ ldreq pc, [pc, #-2752]! @ 24a4ce4 │ │ ldreq ip, [pc, #-3820]! @ 24a48bc │ │ ldreq sp, [pc, #-112]! @ 24a573c │ │ @@ -1407334,15 +1407333,15 @@ │ │ ldreq sl, [pc, #-1012]! @ 24a53e0 │ │ ldreq sl, [pc, #-992]! @ 24a53f8 │ │ ldreq sl, [pc, #-988]! @ 24a5400 │ │ ldreq sl, [pc, #-968]! @ 24a5418 │ │ ldreq sl, [pc, #-1792]! @ 24a50e4 │ │ ldreq sl, [pc, #-940]! @ 24a543c │ │ ldreq sl, [pc, #-920]! @ 24a5454 │ │ - ldc2l 10, cr2, [sl, #312] @ 0x138 @ │ │ + ldc2l 10, cr2, [sl, #492] @ 0x1ec @ │ │ ldreq pc, [pc, #-1632]! @ 24a5194 │ │ ldreq sl, [pc, #-2092]! @ 24a4fcc │ │ ldreq sl, [pc, #-804]! @ 24a54d8 │ │ ldc2l 15, cr7, [sl, #404] @ 0x194 │ │ ldreq pc, [pc, #-3548]! @ 24a4a28 │ │ ldreq pc, [pc, #-1508]! @ 24a5224 │ │ ldr r2, [fp, #12] │ │ @@ -1407511,15 +1407510,15 @@ │ │ mov r2, #1 │ │ ldr r5, [pc, #1324] @ 24a5fc8 │ │ add r6, pc, r6 │ │ add r9, pc, r9 │ │ add r5, pc, r5 │ │ b 24a5af0 │ │ ldreq sl, [pc, #-700]! @ 24a57f4 │ │ - ldc2l 0, cr11, [r7, #824] @ 0x338 │ │ + ldc2l 0, cr11, [r7, #1004] @ 0x3ec │ │ ldreq ip, [pc, #-3316]! @ 24a4dc4 │ │ ldreq pc, [pc, #-1416]! @ 24a5534 │ │ mov r0, r9 │ │ mov r2, r5 │ │ movw r3, #939 @ 0x3ab │ │ bl 270d9c0 │ │ mov r1, r0 │ │ @@ -1407535,15 +1407534,15 @@ │ │ ldr r7, [r4, r1, lsl #2] │ │ cmp r1, #100 @ 0x64 │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ bcs 24a5ab8 │ │ mov r3, r2 │ │ b 24a5ad8 │ │ ldreq sl, [pc, #-600]! @ 24a58b8 │ │ - ldc2l 0, cr5, [r8, #544] @ 0x220 │ │ + ldc2l 0, cr5, [r8, #724] @ 0x2d4 │ │ ldreq pc, [pc, #-1288]! @ 24a5610 │ │ ldc2l 14, cr7, [sl, #320] @ 0x140 │ │ ldreq sl, [pc, #-448]! @ 24a5960 │ │ ldr r0, [pc, #1196] @ 24a5fd0 │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ str r1, [fp, #-32] @ 0xffffffe0 │ │ @@ -1407674,29 +1407673,29 @@ │ │ add r0, pc, r0 │ │ str r6, [r2] │ │ str r6, [r3] │ │ strb r1, [r7] │ │ b 24a32b8 │ │ ldreq sl, [pc, #-32]! @ 24a5d18 │ │ ldreq sl, [pc, #-888]! @ 24a59c4 │ │ - ldc2l 9, cr4, [r9, #320] @ 0x140 @ │ │ + ldc2l 9, cr4, [r9, #410] @ 0x19a @ │ │ mov r1, #1 │ │ cmp r7, #1 │ │ str r1, [r8] │ │ str r7, [fp, #-32] @ 0xffffffe0 │ │ blt 24a5204 │ │ ldr r4, [pc, #276] @ 24a5e6c │ │ mov r2, #0 │ │ ldr sl, [pc, #272] @ 24a5e70 │ │ ldr r9, [pc, #272] @ 24a5e74 │ │ add r4, pc, r4 │ │ add sl, pc, sl │ │ add r9, pc, r9 │ │ b 24a5d98 │ │ - ldc2l 13, cr0, [r8, #736] @ 0x2e0 │ │ + ldc2l 13, cr0, [r8, #916] @ 0x394 │ │ ldreq sl, [pc, #-832]! @ 24a5a3c │ │ ldreq r9, [pc, #-4040]! @ 24a4db8 │ │ ldreq sl, [pc, #-776]! @ 24a5a7c │ │ mov r2, r1 │ │ add r1, r1, #1 │ │ cmp r2, r7 │ │ str r5, [r4, r0, lsl #2] │ │ @@ -1407717,51 +1407716,51 @@ │ │ ldr r1, [pc, r1] │ │ b 24a5d80 │ │ str r6, [fp, #-36] @ 0xffffffdc │ │ ldr r6, [fp, #32] │ │ ldr r2, [sp, #44] @ 0x2c │ │ ldr r9, [sp, #48] @ 0x30 │ │ b 24a5204 │ │ - ldc2l 13, cr10, [r7, #664] @ 0x298 │ │ + ldc2l 13, cr10, [r7, #844] @ 0x34c │ │ ldreq sl, [pc, #-668]! @ 24a5b54 │ │ ldreq ip, [pc, #-2496]! @ 24a5434 │ │ ldreq r9, [pc, #-3876]! @ 24a4ed4 │ │ - ldc2l 6, cr2, [sl, #56] @ 0x38 │ │ - ldc2l 12, cr0, [r8, #928] @ 0x3a0 │ │ + ldc2l 6, cr2, [sl, #236] @ 0xec │ │ + ldc2l 13, cr0, [r8, #84] @ 0x54 │ │ ldreq sl, [pc, #-1012]! @ 24a5a10 │ │ eoreq r4, fp, ip, lsr #26 │ │ ldreq sl, [pc, #-552]! @ 24a5be4 │ │ ldreq r9, [pc, #-3780]! @ 24a4f4c │ │ - ldc2l 12, cr0, [r8, #560] @ 0x230 │ │ - ldc2l 12, cr4, [r8, #688] @ 0x2b0 │ │ - ldc2l 11, cr0, [r8, #976] @ 0x3d0 @ │ │ + ldc2l 12, cr0, [r8, #740] @ 0x2e4 │ │ + ldc2l 12, cr4, [r8, #868] @ 0x364 │ │ + ldc2l 12, cr0, [r8, #132] @ 0x84 │ │ ldreq ip, [pc, #-2568]! @ 24a5418 │ │ eoreq r4, fp, r0, lsr ip │ │ ldreq r9, [pc, #-3544]! @ 24a5050 │ │ ldreq sl, [pc, #-280]! @ 24a5d14 │ │ ldreq sl, [pc, #-236]! @ 24a5d44 │ │ ldreq sl, [pc, #-208]! @ 24a5d64 │ │ ldc2l 9, cr7, [sl, #442] @ 0x1ba @ │ │ ldreq pc, [pc, #-2120]! @ 24a55f4 │ │ eoreq r4, fp, r4, ror fp │ │ ldreq r9, [pc, #-3364]! @ 24a5120 │ │ ldreq sl, [pc, #-88]! @ 24a5df0 │ │ ldreq sl, [pc, #-36]! @ 24a5e28 │ │ ldreq sl, [pc, #-8]! @ 24a5e48 │ │ ldc2l 9, cr7, [sl, #56] @ 0x38 @ │ │ - ldc2l 10, cr0, [r8, #400] @ 0x190 @ │ │ + ldc2l 10, cr0, [r8, #580] @ 0x244 @ │ │ strbeq r0, [r0, #-2240] @ 0xfffff740 │ │ eoreq r4, fp, ip, lsr #21 │ │ ldreq r9, [pc, #-3996]! @ 24a4ec8 │ │ ldreq r9, [pc, #-3988]! @ 24a4ed4 │ │ ldreq r9, [pc, #-3060]! @ 24a5278 │ │ ldreq r9, [pc, #-3908]! @ 24a4f2c │ │ ldreq lr, [pc, #-2416]! @ 24a5504 │ │ - ldc2l 7, cr11, [r9, #24] │ │ - ldc2l 13, cr15, [r7, #784] @ 0x310 │ │ + ldc2l 7, cr11, [r9, #204] @ 0xcc │ │ + ldc2l 13, cr15, [r7, #964] @ 0x3c4 │ │ ldreq r9, [pc, #-724]! @ 24a5bac │ │ ldreq r9, [pc, #-3744]! @ 24a4fe4 │ │ ldreq r9, [pc, #-3736]! @ 24a4ff0 │ │ ldreq r9, [pc, #-3712]! @ 24a500c │ │ ldreq r9, [pc, #-3696]! @ 24a5020 │ │ ldreq r9, [pc, #-3652]! @ 24a5050 │ │ ldreq r9, [pc, #-3636]! @ 24a5064 │ │ @@ -1407837,39 +1407836,39 @@ │ │ strbeq r1, [r0, #-260] @ 0xfffffefc │ │ ldreq r9, [pc, #-1724]! @ 24a58f8 │ │ mlaeq fp, r8, r1, r4 │ │ strbeq r1, [r0, #-200] @ 0xffffff38 │ │ ldreq r9, [pc, #-820]! @ 24a5c8c │ │ ldreq r9, [pc, #-824]! @ 24a5c8c │ │ ldreq lr, [pc, #-3128]! @ 24a5390 │ │ - ldc2l 9, cr11, [r9, #412] @ 0x19c @ │ │ - ldc2l 0, cr0, [r8, #560] @ 0x230 │ │ + ldc2l 9, cr11, [r9, #502] @ 0x1f6 @ │ │ + ldc2l 0, cr0, [r8, #740] @ 0x2e4 │ │ ldreq r9, [pc, #-1480]! @ 24a5a0c │ │ ldreq lr, [pc, #-1364]! @ 24a5a84 │ │ - ldc2l 9, cr11, [r9, #84] @ 0x54 @ │ │ - ldc2l 15, cr15, [r7, #928] @ 0x3a0 │ │ + ldc2l 9, cr11, [r9, #174] @ 0xae @ │ │ + ldc2l 0, cr0, [r8, #84] @ 0x54 │ │ ldreq lr, [pc, #-2932]! @ 24a5470 │ │ ldreq r9, [pc, #-464]! @ 24a5e18 │ │ ldreq lr, [pc, #-1272]! @ 24a5af4 │ │ strbeq r0, [r0, #-3924] @ 0xfffff0ac │ │ strbeq r0, [r0, #-3888] @ 0xfffff0d0 │ │ ldreq r9, [pc, #-408]! @ 24a5e60 │ │ ldreq lr, [pc, #-1976]! @ 24a5844 │ │ ldreq r9, [pc, #-796]! @ 24a5ce4 │ │ - ldc2l 15, cr15, [r7, #256] @ 0x100 │ │ - ldc2l 9, cr5, [r9, #384] @ 0x180 @ │ │ + ldc2l 15, cr15, [r7, #436] @ 0x1b4 │ │ + ldc2l 9, cr5, [r9, #474] @ 0x1da @ │ │ ldreq r9, [pc, #-1080]! @ 24a5bd4 │ │ - ldc2l 3, cr13, [r9, #568] @ 0x238 │ │ + ldc2l 3, cr13, [r9, #748] @ 0x2ec │ │ ldreq r9, [pc, #-1016]! @ 24a5c1c │ │ - ldc2l 0, cr15, [r9, #852] @ 0x354 │ │ + ldc2l 1, cr15, [r9, #8] │ │ ldreq r9, [pc, #-964]! @ 24a5c58 │ │ ldreq r9, [pc, #-96]! @ 24a5fc0 │ │ ldreq r9, [pc, #-96]! @ 24a5fc4 │ │ ldreq r9, [pc, #-96]! @ 24a5fc8 │ │ - ldc2l 2, cr13, [r9, #996] @ 0x3e4 │ │ + ldc2l 3, cr13, [r9, #152] @ 0x98 │ │ ldreq r9, [pc, #-40]! @ 24a6008 │ │ ldreq r9, [pc, #-2936]! @ 24a54bc │ │ │ │ 024a6030 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ ldr r4, [pc, #48] @ 24a6070 │ │ @@ -1407883,15 +1407882,15 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ ldc2l 8, cr8, [sl, #380] @ 0x17c │ │ - ldc2l 4, cr4, [sl, #36] @ 0x24 │ │ + ldc2l 4, cr4, [sl, #216] @ 0xd8 │ │ │ │ 024a6078 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #88 @ 0x58 │ │ mov ip, r2 │ │ mov r2, r1 │ │ @@ -1408448,31 +1408447,31 @@ │ │ ldr r1, [fp, #56] @ 0x38 │ │ str r7, [r4] │ │ str r0, [r1] │ │ mov r0, #0 │ │ ldr r1, [fp, #60] @ 0x3c │ │ str r0, [r1] │ │ b 24a6804 │ │ - ldc2l 4, cr5, [r9, #88] @ 0x58 │ │ - ldc2l 5, cr9, [r9, #132] @ 0x84 │ │ - ldc2l 12, cr12, [r7, #532] @ 0x214 │ │ + ldc2l 4, cr5, [r9, #268] @ 0x10c │ │ + ldc2l 5, cr9, [r9, #312] @ 0x138 │ │ + ldc2l 12, cr12, [r7, #712] @ 0x2c8 │ │ eoreq r3, fp, ip, asr r9 │ │ - ldc2l 1, cr5, [r8, #308] @ 0x134 │ │ - ldc2l 3, cr5, [r9, #680] @ 0x2a8 │ │ + ldc2l 1, cr5, [r8, #488] @ 0x1e8 │ │ + ldc2l 3, cr5, [r9, #860] @ 0x35c │ │ eoreq r3, fp, r8, lsl r9 │ │ - ldc2l 13, cr1, [r7, #312] @ 0x138 │ │ - ldc2l 7, cr15, [r7, #632] @ 0x278 │ │ - ldc2l 4, cr9, [r8, #892] @ 0x37c │ │ - ldc2l 13, cr4, [r9, #264] @ 0x108 │ │ - ldc2l 6, cr15, [r7, #920] @ 0x398 │ │ - ldc2l 12, cr1, [r7, #120] @ 0x78 │ │ - ldc2l 15, cr8, [r8, #940] @ 0x3ac │ │ - ldc2l 8, cr1, [r7, #248] @ 0xf8 │ │ + ldc2l 13, cr1, [r7, #492] @ 0x1ec │ │ + ldc2l 7, cr15, [r7, #812] @ 0x32c │ │ + ldc2l 5, cr9, [r8, #48] @ 0x30 │ │ + ldc2l 13, cr4, [r9, #444] @ 0x1bc │ │ + ldc2l 7, cr15, [r7, #76] @ 0x4c │ │ + ldc2l 12, cr1, [r7, #300] @ 0x12c │ │ + ldc2l 0, cr9, [r8, #96] @ 0x60 │ │ + vcadd.f32 , , , #270 │ │ eoreq r3, fp, r8, asr r3 │ │ - ldc2l 13, cr4, [r9, #184] @ 0xb8 │ │ + ldc2l 13, cr4, [r9, #364] @ 0x16c │ │ │ │ 024a6974 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #40 @ 0x28 │ │ mov r6, r0 │ │ mov r0, #0 │ │ @@ -1408580,21 +1408579,21 @@ │ │ ldr r0, [pc, #44] @ 24a6b50 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ ldr r0, [fp, #-20] @ 0xffffffec │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 12, cr0, [r9, #628] @ 0x274 │ │ - ldc2l 12, cr6, [r9, #244] @ 0xf4 │ │ - ldc2l 4, cr12, [r7, #468] @ 0x1d4 │ │ - ldc2l 3, cr2, [sl, #536] @ 0x218 │ │ - ldc2l 4, cr12, [r7, #116] @ 0x74 │ │ - ldc2l 9, cr14, [r7, #182] @ 0xb6 @ │ │ - ldc2l 11, cr0, [r9, #148] @ 0x94 @ │ │ + ldc2l 12, cr0, [r9, #808] @ 0x328 │ │ + ldc2l 12, cr6, [r9, #424] @ 0x1a8 │ │ + ldc2l 4, cr12, [r7, #648] @ 0x288 │ │ + ldc2l 3, cr2, [sl, #716] @ 0x2cc │ │ + ldc2l 4, cr12, [r7, #296] @ 0x128 │ │ + ldc2l 9, cr14, [r7, #272] @ 0x110 @ │ │ + ldc2l 11, cr0, [r9, #328] @ 0x148 @ │ │ │ │ 024a6b54 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #40 @ 0x28 │ │ mov r6, r0 │ │ mov r0, #0 │ │ @@ -1408702,21 +1408701,21 @@ │ │ ldr r0, [pc, #44] @ 24a6d30 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ ldr r0, [fp, #-20] @ 0xffffffec │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 0, cr9, [r7, #96] @ 0x60 │ │ - ldc2l 10, cr6, [r9, #372] @ 0x174 @ │ │ - ldc2l 2, cr12, [r7, #596] @ 0x254 │ │ - ldc2l 1, cr2, [sl, #664] @ 0x298 │ │ - ldc2l 2, cr12, [r7, #244] @ 0xf4 │ │ - ldc2l 7, cr14, [r7, #492] @ 0x1ec │ │ - ldc2l 14, cr8, [r7, #640] @ 0x280 │ │ + ldc2l 0, cr9, [r7, #276] @ 0x114 │ │ + ldc2l 10, cr6, [r9, #552] @ 0x228 @ │ │ + ldc2l 2, cr12, [r7, #776] @ 0x308 │ │ + ldc2l 1, cr2, [sl, #844] @ 0x34c │ │ + ldc2l 2, cr12, [r7, #424] @ 0x1a8 │ │ + ldc2l 7, cr14, [r7, #672] @ 0x2a0 │ │ + ldc2l 14, cr8, [r7, #820] @ 0x334 │ │ │ │ 024a6d34 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #8 │ │ mov r5, r1 │ │ mov r4, r0 │ │ @@ -1408954,22 +1408953,22 @@ │ │ ldr r2, [fp, #8] │ │ str r0, [r2] │ │ ldr r3, [fp, #12] │ │ mov r0, r5 │ │ mov r1, r4 │ │ bl 270e390 │ │ b 24a6f94 │ │ - ldc2l 1, cr1, [r7, #700] @ 0x2bc │ │ - ldc2l 1, cr12, [r9, #272] @ 0x110 │ │ - ldc2l 15, cr11, [r7, #804] @ 0x324 │ │ - ldc2l 7, cr6, [r9, #612] @ 0x264 │ │ - ldc2l 1, cr1, [r7, #300] @ 0x12c │ │ - ldc2l 10, cr4, [r7, #452] @ 0x1c4 @ │ │ - ldc2l 15, cr11, [r7, #404] @ 0x194 │ │ - ldc2l 8, cr0, [r7, #216] @ 0xd8 │ │ + ldc2l 1, cr1, [r7, #880] @ 0x370 │ │ + ldc2l 1, cr12, [r9, #452] @ 0x1c4 │ │ + ldc2l 15, cr11, [r7, #984] @ 0x3d8 │ │ + ldc2l 7, cr6, [r9, #792] @ 0x318 │ │ + ldc2l 1, cr1, [r7, #480] @ 0x1e0 │ │ + ldc2l 10, cr4, [r7, #632] @ 0x278 @ │ │ + ldc2l 15, cr11, [r7, #584] @ 0x248 │ │ + vcadd.f32 q8, , , #270 │ │ ldreq pc, [pc, #-3240]! @ 24a6478 │ │ ldreq pc, [pc, #-3240]! @ 24a647c │ │ ldreq pc, [pc, #-3236]! @ 24a6484 │ │ eoreq r2, fp, ip, asr sp │ │ eoreq r2, fp, r4, asr sp │ │ eoreq r2, fp, r0, lsl #24 │ │ ldreq pc, [pc, #-2844]! @ 24a661c │ │ @@ -1409199,37 +1409198,37 @@ │ │ ldr r2, [fp, #8] │ │ str r0, [r2] │ │ ldr r3, [fp, #12] │ │ mov r0, r5 │ │ mov r1, r4 │ │ bl 270e390 │ │ b 24a7350 │ │ - vcadd.f32 q15, , , #270 │ │ - ldc2l 13, cr11, [r9, #608] @ 0x260 │ │ - ldc2l 12, cr11, [r7, #116] @ 0x74 │ │ - ldc2l 3, cr6, [r9, #948] @ 0x3b4 │ │ - ldc2l 8, cr14, [r7, #324] @ 0x144 │ │ - ldc2l 10, cr10, [r7, #64] @ 0x40 @ │ │ - ldc2l 11, cr11, [r7, #676] @ 0x2a4 @ │ │ - ldc2l 4, cr0, [r7, #488] @ 0x1e8 │ │ - ldc2l 12, cr15, [r6, #172] @ 0xac │ │ + ldc2l 8, cr14, [r7, #968] @ 0x3c8 │ │ + ldc2l 13, cr11, [r9, #788] @ 0x314 │ │ + ldc2l 12, cr11, [r7, #296] @ 0x128 │ │ + ldc2l 4, cr6, [r9, #104] @ 0x68 │ │ + ldc2l 8, cr14, [r7, #504] @ 0x1f8 │ │ + ldc2l 10, cr10, [r7, #244] @ 0xf4 @ │ │ + ldc2l 11, cr11, [r7, #856] @ 0x358 @ │ │ + ldc2l 4, cr0, [r7, #668] @ 0x29c │ │ + ldc2l 12, cr15, [r6, #352] @ 0x160 │ │ ldreq pc, [pc, #-2328]! @ 24a6bd8 │ │ ldreq pc, [pc, #-2324]! @ 24a6be0 │ │ ldrdeq r2, [fp], -r4 @ │ │ eoreq r2, fp, ip, asr #19 │ │ eoreq r2, fp, r0, asr #19 │ │ eoreq r2, fp, r0, ror #16 │ │ eoreq r2, fp, r0, asr r8 │ │ eoreq r2, fp, r4, asr #16 │ │ ldreq pc, [pc, #-1896]! @ 24a6da8 │ │ ldreq pc, [pc, #-1884]! @ 24a6db8 │ │ eoreq r2, fp, r4, ror #15 │ │ eoreq r2, fp, r4, lsl #15 │ │ eoreq r2, fp, ip, ror r7 │ │ - ldc2l 9, cr15, [r6, #342] @ 0x156 @ │ │ + ldc2l 9, cr15, [r6, #432] @ 0x1b0 @ │ │ ldreq pc, [pc, #-1684]! @ 24a6e94 │ │ ldreq pc, [pc, #-1672]! @ 24a6ea4 │ │ │ │ 024a7528 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #92 @ 0x5c │ │ @@ -1409442,30 +1409441,30 @@ │ │ ldr r2, [fp, #8] │ │ str r0, [r2] │ │ ldr r3, [fp, #12] │ │ mov r0, r5 │ │ mov r1, r4 │ │ bl 270e390 │ │ b 24a7714 │ │ - ldc2l 5, cr8, [r7, #388] @ 0x184 │ │ - ldc2l 9, cr11, [r9, #392] @ 0x188 @ │ │ - vcadd.f32 , , , #270 │ │ - ldc2l 0, cr6, [r9, #100] @ 0x64 │ │ - ldc2l 4, cr8, [r7, #1012] @ 0x3f4 │ │ - ldc2l 7, cr1, [sl, #480] @ 0x1e0 │ │ - ldc2l 7, cr11, [r7, #916] @ 0x394 │ │ - ldc2l 0, cr0, [r7, #728] @ 0x2d8 │ │ - ldc2l 8, cr15, [r6, #332] @ 0x14c │ │ + ldc2l 5, cr8, [r7, #568] @ 0x238 │ │ + ldc2l 9, cr11, [r9, #482] @ 0x1e2 @ │ │ + ldc2l 8, cr11, [r7, #472] @ 0x1d8 │ │ + ldc2l 0, cr6, [r9, #280] @ 0x118 │ │ + ldc2l 5, cr8, [r7, #168] @ 0xa8 │ │ + ldc2l 7, cr1, [sl, #660] @ 0x294 │ │ + ldc2l 8, cr11, [r7, #72] @ 0x48 │ │ + ldc2l 0, cr0, [r7, #908] @ 0x38c │ │ + vcadd.f32 d31, d22, d0, #270 │ │ ldreq pc, [pc, #-1352]! @ 24a736c │ │ ldreq pc, [pc, #-1352]! @ 24a7370 │ │ eoreq r2, fp, r8, lsl #12 │ │ eoreq r2, fp, r4, lsl #12 │ │ mlaeq fp, r8, r4, r2 │ │ eoreq r2, fp, ip, lsl #9 │ │ - ldc2l 6, cr15, [r6, #700] @ 0x2bc │ │ + ldc2l 6, cr15, [r6, #880] @ 0x370 │ │ ldreq pc, [pc, #-932]! @ 24a752c │ │ eoreq r2, fp, r8, lsr #8 │ │ eoreq r2, fp, ip, asr #7 │ │ strhteq r2, [fp], -r8 │ │ ldreq pc, [pc, #-732]! @ 24a7604 │ │ ldreq pc, [pc, #-728]! @ 24a760c │ │ │ │ @@ -1409675,22 +1409674,22 @@ │ │ ldr r2, [fp, #8] │ │ str r0, [r2] │ │ ldr r3, [fp, #12] │ │ mov r0, r5 │ │ mov r1, r4 │ │ bl 270e390 │ │ b 24a7ac0 │ │ - ldc2l 3, cr13, [r9, #684] @ 0x2ac │ │ - ldc2l 6, cr11, [r9, #96] @ 0x60 │ │ - ldc2l 4, cr11, [r7, #628] @ 0x274 │ │ - ldc2l 12, cr5, [r9, #436] @ 0x1b4 │ │ - ldc2l 3, cr13, [r9, #284] @ 0x11c │ │ - ldc2l 15, cr3, [r7, #276] @ 0x114 │ │ - ldc2l 4, cr11, [r7, #228] @ 0xe4 │ │ - ldc2l 13, cr15, [r6, #40] @ 0x28 │ │ + ldc2l 3, cr13, [r9, #864] @ 0x360 │ │ + ldc2l 6, cr11, [r9, #276] @ 0x114 │ │ + ldc2l 4, cr11, [r7, #808] @ 0x328 │ │ + ldc2l 12, cr5, [r9, #616] @ 0x268 │ │ + ldc2l 3, cr13, [r9, #464] @ 0x1d0 │ │ + ldc2l 15, cr3, [r7, #456] @ 0x1c8 │ │ + ldc2l 4, cr11, [r7, #408] @ 0x198 │ │ + ldc2l 13, cr15, [r6, #220] @ 0xdc │ │ ldreq pc, [pc, #-420]! @ 24a7aa8 │ │ ldreq pc, [pc, #-420]! @ 24a7aac │ │ ldreq pc, [pc, #-416]! @ 24a7ab4 │ │ eoreq r2, fp, r8, asr r2 │ │ eoreq r2, fp, r0, asr r2 │ │ strdeq r2, [fp], -ip @ │ │ ldreq pc, [pc, #-24]! @ 24a7c4c │ │ @@ -1409915,30 +1409914,30 @@ │ │ ldr r2, [fp, #8] │ │ str r0, [r2] │ │ ldr r3, [fp, #12] │ │ mov r0, r5 │ │ mov r1, r4 │ │ bl 270e390 │ │ b 24a7e78 │ │ - ldc2l 8, cr15, [r8, #712] @ 0x2c8 │ │ - ldc2l 2, cr11, [r9, #448] @ 0x1c0 │ │ - ldc2l 0, cr11, [r7, #980] @ 0x3d4 │ │ - vcadd.f32 , , , #270 │ │ - ldc2l 8, cr15, [r8, #248] @ 0xf8 │ │ - ldc2l 14, cr9, [r7, #928] @ 0x3a0 │ │ - ldc2l 0, cr11, [r7, #516] @ 0x204 │ │ - ldc2l 9, cr15, [r6, #164] @ 0xa4 @ │ │ - ldc2l 0, cr15, [r6, #1020] @ 0x3fc │ │ + ldc2l 8, cr15, [r8, #892] @ 0x37c │ │ + ldc2l 2, cr11, [r9, #628] @ 0x274 │ │ + ldc2l 1, cr11, [r7, #136] @ 0x88 │ │ + ldc2l 8, cr5, [r9, #968] @ 0x3c8 │ │ + vcadd.f32 , q4, , #270 │ │ + ldc2l 15, cr9, [r7, #84] @ 0x54 │ │ + ldc2l 0, cr11, [r7, #696] @ 0x2b8 │ │ + ldc2l 9, cr15, [r6, #254] @ 0xfe @ │ │ + ldc2l 1, cr15, [r6, #176] @ 0xb0 │ │ ldreq lr, [pc, #-3604]! @ 24a71f4 │ │ ldreq lr, [pc, #-3600]! @ 24a71fc │ │ eoreq r1, fp, ip, asr #29 │ │ eoreq r1, fp, r8, asr #29 │ │ eoreq r1, fp, ip, asr sp │ │ eoreq r1, fp, r0, asr sp │ │ - ldc2l 15, cr14, [r6, #364] @ 0x16c │ │ + ldc2l 15, cr14, [r6, #544] @ 0x220 │ │ ldreq lr, [pc, #-3180]! @ 24a73b8 │ │ eoreq r1, fp, ip, ror #25 │ │ mlaeq fp, r0, ip, r1 │ │ eoreq r1, fp, ip, ror ip │ │ ldreq lr, [pc, #-2984]! @ 24a748c │ │ ldreq lr, [pc, #-2976]! @ 24a7498 │ │ │ │ @@ -1410159,37 +1410158,37 @@ │ │ ldr r2, [fp, #8] │ │ str r0, [r2] │ │ ldr r3, [fp, #12] │ │ mov r0, r5 │ │ mov r1, r4 │ │ bl 270e390 │ │ b 24a8220 │ │ - ldc2l 6, cr7, [r9, #148] @ 0x94 │ │ - ldc2l 14, cr10, [r9, #736] @ 0x2e0 │ │ - ldc2l 13, cr10, [r7, #244] @ 0xf4 │ │ - ldc2l 5, cr5, [r9, #52] @ 0x34 │ │ - ldc2l 5, cr7, [r9, #772] @ 0x304 │ │ - ldc2l 12, cr0, [sl, #432] @ 0x1b0 │ │ - ldc2l 12, cr10, [r7, #868] @ 0x364 │ │ - ldc2l 5, cr15, [r6, #680] @ 0x2a8 │ │ - ldc2l 13, cr14, [r6, #284] @ 0x11c │ │ + ldc2l 6, cr7, [r9, #328] @ 0x148 │ │ + ldc2l 14, cr10, [r9, #916] @ 0x394 │ │ + ldc2l 13, cr10, [r7, #424] @ 0x1a8 │ │ + ldc2l 5, cr5, [r9, #232] @ 0xe8 │ │ + ldc2l 5, cr7, [r9, #952] @ 0x3b8 │ │ + ldc2l 12, cr0, [sl, #612] @ 0x264 │ │ + ldc2l 13, cr10, [r7, #24] │ │ + ldc2l 5, cr15, [r6, #860] @ 0x35c │ │ + ldc2l 13, cr14, [r6, #464] @ 0x1d0 │ │ ldreq lr, [pc, #-2660]! @ 24a796c │ │ ldreq lr, [pc, #-2660]! @ 24a7970 │ │ eoreq r1, fp, r4, lsr #22 │ │ eoreq r1, fp, ip, lsl fp │ │ eoreq r1, fp, ip, lsl #22 │ │ strhteq r1, [fp], -r4 │ │ eoreq r1, fp, r4, lsr #19 │ │ mlaeq fp, r8, r9, r1 │ │ ldreq lr, [pc, #-2232]! @ 24a7b38 │ │ ldreq lr, [pc, #-2224]! @ 24a7b44 │ │ eoreq r1, fp, r8, lsr r9 │ │ ldrdeq r1, [fp], -r8 @ │ │ ldrdeq r1, [fp], -r0 @ │ │ - ldc2l 10, cr14, [r6, #828] @ 0x33c @ │ │ + ldc2l 10, cr14, [r6, #1008] @ 0x3f0 @ │ │ ldreq lr, [pc, #-2020]! @ 24a7c24 │ │ ldreq lr, [pc, #-2012]! @ 24a7c30 │ │ │ │ 024a8408 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #40 @ 0x28 │ │ @@ -1410336,31 +1410335,31 @@ │ │ ldr r0, [pc, #68] @ 24a8690 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 12, cr15, [r6, #384] @ 0x180 │ │ + ldc2l 12, cr15, [r6, #564] @ 0x234 │ │ strhteq r1, [fp], -r0 │ │ - ldc2l 15, cr14, [r9, #80] @ 0x50 │ │ - ldc2l 9, cr10, [r7, #218] @ 0xda @ │ │ + ldc2l 15, cr14, [r9, #260] @ 0x104 │ │ + ldc2l 9, cr10, [r7, #308] @ 0x134 @ │ │ mlaeq fp, r0, r6, r1 │ │ - vcadd.f32 d28, d9, d16, #270 │ │ + vcadd.f32 q14, , , #270 │ │ mlaeq fp, r4, r7, r1 │ │ eoreq r1, fp, r0, lsl #15 │ │ eoreq r1, fp, ip, ror #14 │ │ - ldc2l 11, cr15, [r6, #564] @ 0x234 @ │ │ - ldc2l 9, cr10, [r7, #346] @ 0x15a @ │ │ - ldc2l 1, cr13, [r7, #960] @ 0x3c0 │ │ - ldc2l 10, cr15, [r6, #224] @ 0xe0 @ │ │ - ldc2l 7, cr3, [r8, #188] @ 0xbc │ │ - ldc2l 9, cr10, [r7, #10] @ │ │ - ldc2l 0, cr3, [r9, #184] @ 0xb8 │ │ - ldc2l 8, cr10, [r7, #740] @ 0x2e4 │ │ + ldc2l 11, cr15, [r6, #744] @ 0x2e8 @ │ │ + ldc2l 9, cr10, [r7, #436] @ 0x1b4 @ │ │ + ldc2l 2, cr13, [r7, #116] @ 0x74 │ │ + ldc2l 10, cr15, [r6, #404] @ 0x194 @ │ │ + ldc2l 7, cr3, [r8, #368] @ 0x170 │ │ + ldc2l 9, cr10, [r7, #100] @ 0x64 @ │ │ + ldc2l 0, cr3, [r9, #364] @ 0x16c │ │ + vcadd.f32 q13, , q11, #270 │ │ │ │ 024a86a4 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ mov r4, r1 │ │ ldr r1, [pc, #356] @ 24a8820 │ │ @@ -1410450,25 +1410449,25 @@ │ │ bl 270d9a0 │ │ mov r0, r5 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 13, cr14, [r9, #992] @ 0x3e0 │ │ + ldc2l 14, cr14, [r9, #148] @ 0x94 │ │ ldc2l 1, cr6, [sl, #192] @ 0xc0 │ │ - ldc2l 3, cr2, [sl, #704] @ 0x2c0 │ │ - ldc2l 4, cr7, [r7, #104] @ 0x68 │ │ - ldc2l 5, cr12, [r8, #744] @ 0x2e8 │ │ - vcadd.f32 d20, d9, d25, #270 │ │ - ldc2l 13, cr8, [r9, #292] @ 0x124 │ │ + ldc2l 3, cr2, [sl, #884] @ 0x374 │ │ + ldc2l 4, cr7, [r7, #284] @ 0x11c │ │ + ldc2l 5, cr12, [r8, #924] @ 0x39c │ │ + ldc2l 8, cr4, [r9, #344] @ 0x158 │ │ + ldc2l 13, cr8, [r9, #472] @ 0x1d8 │ │ ldc2l 0, cr6, [sl, #976] @ 0x3d0 │ │ - ldc2l 15, cr6, [r9, #760] @ 0x2f8 │ │ - ldc2l 6, cr10, [r7, #916] @ 0x394 │ │ - ldc2l 6, cr10, [r8, #132] @ 0x84 │ │ + ldc2l 15, cr6, [r9, #940] @ 0x3ac │ │ + ldc2l 7, cr10, [r7, #72] @ 0x48 │ │ + ldc2l 6, cr10, [r8, #312] @ 0x138 │ │ │ │ 024a884c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ mov r4, r1 │ │ ldr r1, [pc, #952] @ 24a8c1c │ │ @@ -1410707,27 +1410706,27 @@ │ │ mov r0, r4 │ │ mov r1, r8 │ │ mov r2, r7 │ │ mov r3, #1 │ │ str r5, [r6] │ │ bl 270d970 │ │ b 24a89d0 │ │ - ldc2l 13, cr14, [r8, #972] @ 0x3cc │ │ + ldc2l 14, cr14, [r8, #128] @ 0x80 │ │ ldc2l 14, cr7, [sl, #360] @ 0x168 │ │ - ldc2l 12, cr10, [r6, #760] @ 0x2f8 │ │ - ldc2l 4, cr1, [r7, #932] @ 0x3a4 │ │ - ldc2l 11, cr8, [r9, #820] @ 0x334 @ │ │ - ldc2l 3, cr12, [r8, #984] @ 0x3d8 │ │ + ldc2l 12, cr10, [r6, #940] @ 0x3ac │ │ + ldc2l 5, cr1, [r7, #88] @ 0x58 │ │ + ldc2l 11, cr8, [r9, #1000] @ 0x3e8 @ │ │ + ldc2l 4, cr12, [r8, #140] @ 0x8c │ │ ldc2l 14, cr7, [sl, #152] @ 0x98 │ │ - ldc2l 2, cr15, [r7, #412] @ 0x19c │ │ - ldc2l 5, cr10, [r7, #164] @ 0xa4 │ │ - ldc2l 4, cr10, [r8, #404] @ 0x194 │ │ - ldc2l 4, cr14, [r6, #156] @ 0x9c │ │ - ldc2l 3, cr14, [r6, #12] │ │ - ldc2l 2, cr14, [r6, #140] @ 0x8c │ │ + ldc2l 2, cr15, [r7, #592] @ 0x250 │ │ + ldc2l 5, cr10, [r7, #344] @ 0x158 │ │ + ldc2l 4, cr10, [r8, #584] @ 0x248 │ │ + ldc2l 4, cr14, [r6, #336] @ 0x150 │ │ + ldc2l 3, cr14, [r6, #192] @ 0xc0 │ │ + ldc2l 2, cr14, [r6, #320] @ 0x140 │ │ │ │ 024a8c50 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #48 @ 0x30 │ │ mov r7, r1 │ │ ldr r1, [pc, #860] @ 24a8fc4 │ │ @@ -1410943,36 +1410942,36 @@ │ │ str r0, [r6] │ │ ldr r0, [r9, #16] │ │ b 24a8fbc │ │ mov r0, #0 │ │ str r0, [r6] │ │ str r0, [r4] │ │ b 24a8e90 │ │ - vcadd.f32 q15, , q6, #270 │ │ - ldc2l 6, cr12, [r8, #584] @ 0x248 │ │ - ldc2l 13, cr1, [sl, #208] @ 0xd0 │ │ - ldc2l 13, cr6, [r7, #632] @ 0x278 │ │ - ldc2l 3, cr2, [r9, #472] @ 0x1d8 │ │ - ldc2l 6, cr12, [r8, #344] @ 0x158 │ │ + ldc2l 8, cr14, [r9, #484] @ 0x1e4 │ │ + ldc2l 6, cr12, [r8, #764] @ 0x2fc │ │ + ldc2l 13, cr1, [sl, #388] @ 0x184 │ │ + ldc2l 13, cr6, [r7, #812] @ 0x32c │ │ + ldc2l 3, cr2, [r9, #652] @ 0x28c │ │ + ldc2l 6, cr12, [r8, #524] @ 0x20c │ │ ldc2l 1, cr4, [sl, #500] @ 0x1f4 │ │ - ldc2l 0, cr10, [r7, #420] @ 0x1a4 │ │ - ldc2l 15, cr9, [r8, #660] @ 0x294 │ │ - ldc2l 15, cr11, [r8, #872] @ 0x368 │ │ - ldc2l 2, cr4, [r9, #292] @ 0x124 │ │ - ldc2l 7, cr8, [r9, #420] @ 0x1a4 │ │ - ldc2l 3, cr15, [r6, #608] @ 0x260 │ │ - ldc2l 6, cr12, [r8, #1016] @ 0x3f8 │ │ - ldc2l 3, cr15, [r6, #164] @ 0xa4 │ │ - ldc2l 1, cr10, [r7, #68] @ 0x44 │ │ - ldc2l 2, cr6, [r9, #568] @ 0x238 │ │ - ldc2l 5, cr12, [r8, #568] @ 0x238 │ │ + ldc2l 0, cr10, [r7, #600] @ 0x258 │ │ + ldc2l 15, cr9, [r8, #840] @ 0x348 │ │ + ldc2l 0, cr12, [r8, #28] │ │ + ldc2l 2, cr4, [r9, #472] @ 0x1d8 │ │ + ldc2l 7, cr8, [r9, #600] @ 0x258 │ │ + ldc2l 3, cr15, [r6, #788] @ 0x314 │ │ + ldc2l 7, cr12, [r8, #172] @ 0xac │ │ + ldc2l 3, cr15, [r6, #344] @ 0x158 │ │ + ldc2l 1, cr10, [r7, #248] @ 0xf8 │ │ + ldc2l 2, cr6, [r9, #748] @ 0x2ec │ │ + ldc2l 5, cr12, [r8, #748] @ 0x2ec │ │ ldc2l 9, cr5, [sl, #330] @ 0x14a @ │ │ - ldc2l 15, cr9, [r7, #644] @ 0x284 │ │ - ldc2l 14, cr13, [r6, #796] @ 0x31c │ │ - ldc2l 5, cr12, [r8, #60] @ 0x3c │ │ + ldc2l 15, cr9, [r7, #824] @ 0x338 │ │ + ldc2l 14, cr13, [r6, #976] @ 0x3d0 │ │ + ldc2l 5, cr12, [r8, #240] @ 0xf0 │ │ │ │ 024a901c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #52 @ 0x34 │ │ mov r7, r1 │ │ ldr r1, [pc, #932] @ 24a93d8 │ │ @@ -1411206,37 +1411205,37 @@ │ │ str r0, [r7] │ │ ldr r0, [r8, #20] │ │ b 24a93d0 │ │ mov r0, #0 │ │ str r0, [r7] │ │ str r0, [r9] │ │ b 24a9290 │ │ - ldc2l 4, cr14, [r9, #512] @ 0x200 │ │ - ldc2l 9, cr0, [r8, #484] @ 0x1e4 @ │ │ - ldc2l 9, cr1, [sl, #104] @ 0x68 @ │ │ - ldc2l 9, cr6, [r7, #316] @ 0x13c @ │ │ - ldc2l 6, cr13, [r9, #440] @ 0x1b8 │ │ - ldc2l 9, cr0, [r8, #364] @ 0x16c @ │ │ + ldc2l 4, cr14, [r9, #692] @ 0x2b4 │ │ + ldc2l 10, cr0, [r8, #124] @ 0x7c @ │ │ + ldc2l 9, cr1, [sl, #194] @ 0xc2 @ │ │ + ldc2l 9, cr6, [r7, #406] @ 0x196 @ │ │ + ldc2l 6, cr13, [r9, #620] @ 0x26c │ │ + ldc2l 9, cr0, [r8, #454] @ 0x1c6 @ │ │ ldc2l 13, cr3, [sl, #500] @ 0x1f4 │ │ - ldc2l 12, cr9, [r7, #420] @ 0x1a4 │ │ - ldc2l 11, cr9, [r8, #660] @ 0x294 @ │ │ - ldc2l 12, cr11, [r8, #56] @ 0x38 │ │ - ldc2l 14, cr3, [r9, #484] @ 0x1e4 │ │ - ldc2l 3, cr8, [r9, #612] @ 0x264 │ │ - ldc2l 15, cr1, [r9, #184] @ 0xb8 │ │ - ldc2l 15, cr14, [r6, #704] @ 0x2c0 │ │ - ldc2l 10, cr0, [r8, #376] @ 0x178 @ │ │ - ldc2l 15, cr14, [r6, #164] @ 0xa4 │ │ - ldc2l 13, cr9, [r7, #68] @ 0x44 │ │ - ldc2l 14, cr5, [r9, #568] @ 0x238 │ │ - ldc2l 8, cr0, [r8, #888] @ 0x378 │ │ + ldc2l 12, cr9, [r7, #600] @ 0x258 │ │ + ldc2l 11, cr9, [r8, #840] @ 0x348 @ │ │ + ldc2l 12, cr11, [r8, #236] @ 0xec │ │ + ldc2l 14, cr3, [r9, #664] @ 0x298 │ │ + ldc2l 3, cr8, [r9, #792] @ 0x318 │ │ + ldc2l 15, cr1, [r9, #364] @ 0x16c │ │ + ldc2l 15, cr14, [r6, #884] @ 0x374 │ │ + ldc2l 10, cr0, [r8, #556] @ 0x22c @ │ │ + ldc2l 15, cr14, [r6, #344] @ 0x158 │ │ + ldc2l 13, cr9, [r7, #248] @ 0xf8 │ │ + ldc2l 14, cr5, [r9, #748] @ 0x2ec │ │ + ldc2l 9, cr0, [r8, #22] @ │ │ ldc2l 5, cr5, [sl, #596] @ 0x254 │ │ - ldc2l 11, cr9, [r7, #580] @ 0x244 @ │ │ - ldc2l 10, cr13, [r6, #732] @ 0x2dc @ │ │ - ldc2l 0, cr12, [r8, #988] @ 0x3dc │ │ + ldc2l 11, cr9, [r7, #760] @ 0x2f8 @ │ │ + ldc2l 10, cr13, [r6, #912] @ 0x390 @ │ │ + ldc2l 1, cr12, [r8, #144] @ 0x90 │ │ │ │ 024a9434 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #32 │ │ mov r5, r1 │ │ ldr r1, [pc, #668] @ 24a96e8 │ │ @@ -1411404,32 +1411403,32 @@ │ │ sub r0, r2, #1 │ │ mov r2, r8 │ │ add r1, r5, r0 │ │ sub r3, r3, r0 │ │ mov r0, r9 │ │ bl 270d970 │ │ b 24a9608 │ │ - ldc2l 0, cr14, [r9, #416] @ 0x1a0 │ │ - ldc2l 14, cr9, [r8, #216] @ 0xd8 │ │ - ldc2l 5, cr1, [sl, #752] @ 0x2f0 │ │ - ldc2l 6, cr6, [r7, #152] @ 0x98 │ │ - ldc2l 12, cr14, [r6, #176] @ 0xb0 │ │ - vcadd.f32 d27, d8, d14, #270 │ │ - ldc2l 13, cr9, [r8, #1000] @ 0x3e8 │ │ - ldc2l 1, cr6, [r9, #808] @ 0x328 │ │ - ldc2l 8, cr9, [r7, #964] @ 0x3c4 │ │ - vcadd.f32 d25, d8, d29, #270 │ │ - ldc2l 14, cr9, [r8, #648] @ 0x288 │ │ - ldc2l 1, cr2, [r9, #228] @ 0xe4 │ │ - ldc2l 9, cr9, [r7, #306] @ 0x132 @ │ │ - ldc2l 11, cr5, [r9, #88] @ 0x58 @ │ │ - ldc2l 13, cr9, [r8, #200] @ 0xc8 │ │ - ldc2l 9, cr9, [r9, #370] @ 0x172 @ │ │ - vcadd.f32 d25, d7, d25, #270 │ │ - ldc2l 7, cr13, [r6, #316] @ 0x13c │ │ + ldc2l 0, cr14, [r9, #596] @ 0x254 │ │ + ldc2l 14, cr9, [r8, #396] @ 0x18c │ │ + ldc2l 5, cr1, [sl, #932] @ 0x3a4 │ │ + ldc2l 6, cr6, [r7, #332] @ 0x14c │ │ + ldc2l 12, cr14, [r6, #356] @ 0x164 │ │ + ldc2l 8, cr11, [r8, #236] @ 0xec │ │ + ldc2l 14, cr9, [r8, #156] @ 0x9c │ │ + ldc2l 1, cr6, [r9, #988] @ 0x3dc │ │ + ldc2l 9, cr9, [r7, #60] @ 0x3c @ │ │ + ldc2l 8, cr9, [r8, #360] @ 0x168 │ │ + ldc2l 14, cr9, [r8, #828] @ 0x33c │ │ + ldc2l 1, cr2, [r9, #408] @ 0x198 │ │ + ldc2l 9, cr9, [r7, #396] @ 0x18c @ │ │ + ldc2l 11, cr5, [r9, #268] @ 0x10c @ │ │ + ldc2l 13, cr9, [r8, #380] @ 0x17c │ │ + ldc2l 9, cr9, [r9, #460] @ 0x1cc @ │ │ + ldc2l 8, cr9, [r7, #344] @ 0x158 │ │ + ldc2l 7, cr13, [r6, #496] @ 0x1f0 │ │ │ │ 024a9730 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #316 @ 0x13c │ │ str r0, [sp, #4] │ │ mov r9, r1 │ │ @@ -1411552,18 +1411551,18 @@ │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ strhteq r0, [fp], -r8 │ │ eoreq r0, fp, r4, ror #8 │ │ - ldc2l 11, cr11, [r8, #824] @ 0x338 @ │ │ - ldc2l 13, cr1, [r9, #576] @ 0x240 │ │ - ldc2l 5, cr9, [r7, #804] @ 0x324 │ │ - ldc2l 0, cr4, [r7, #144] @ 0x90 │ │ + ldc2l 11, cr11, [r8, #1004] @ 0x3ec @ │ │ + ldc2l 13, cr1, [r9, #756] @ 0x2f4 │ │ + ldc2l 5, cr9, [r7, #984] @ 0x3d8 │ │ + ldc2l 0, cr4, [r7, #324] @ 0x144 │ │ │ │ 024a9940 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #60 @ 0x3c │ │ sub sp, sp, #2048 @ 0x800 │ │ mov r5, r1 │ │ @@ -1412002,34 +1412001,34 @@ │ │ vmrs APSR_nzcv, fpscr │ │ bmi 24a9ff8 │ │ vcmp.f64 d16, d17 │ │ mov r5, #1 │ │ vmrs APSR_nzcv, fpscr │ │ movgt r5, #3 │ │ b 24a9ff8 │ │ - ldc2l 10, cr5, [r9, #172] @ 0xac @ │ │ - ldc2l 9, cr15, [r8, #252] @ 0xfc @ │ │ - ldc2l 1, cr9, [r7, #68] @ 0x44 │ │ - ldc2l 14, cr8, [r8, #244] @ 0xf4 │ │ - ldc2l 8, cr5, [r9, #236] @ 0xec │ │ - ldc2l 7, cr3, [r9, #172] @ 0xac │ │ - ldc2l 15, cr8, [r7, #132] @ 0x84 │ │ - ldc2l 9, cr5, [r9, #374] @ 0x176 @ │ │ - vcadd.f32 d19, d25, d31, #270 │ │ - ldc2l 0, cr9, [r7, #660] @ 0x294 │ │ - ldc2l 15, cr8, [r8, #756] @ 0x2f4 │ │ - ldc2l 9, cr5, [r9, #126] @ 0x7e @ │ │ - ldc2l 10, cr5, [r9, #508] @ 0x1fc @ │ │ - ldc2l 7, cr11, [r8, #396] @ 0x18c │ │ - ldc2l 1, cr9, [r7, #404] @ 0x194 │ │ - ldc2l 13, cr0, [sl, #988] @ 0x3dc │ │ - ldc2l 10, cr5, [r9, #892] @ 0x37c @ │ │ + ldc2l 10, cr5, [r9, #352] @ 0x160 @ │ │ + ldc2l 9, cr15, [r8, #342] @ 0x156 @ │ │ + ldc2l 1, cr9, [r7, #248] @ 0xf8 │ │ + ldc2l 14, cr8, [r8, #424] @ 0x1a8 │ │ + vcadd.f32 , , q12, #270 │ │ + ldc2l 7, cr3, [r9, #352] @ 0x160 │ │ + ldc2l 15, cr8, [r7, #312] @ 0x138 │ │ + ldc2l 9, cr5, [r9, #464] @ 0x1d0 @ │ │ + ldc2l 8, cr3, [r9, #880] @ 0x370 │ │ + ldc2l 0, cr9, [r7, #840] @ 0x348 │ │ + ldc2l 15, cr8, [r8, #936] @ 0x3a8 │ │ + ldc2l 9, cr5, [r9, #216] @ 0xd8 @ │ │ + ldc2l 10, cr5, [r9, #688] @ 0x2b0 @ │ │ + ldc2l 7, cr11, [r8, #576] @ 0x240 │ │ + ldc2l 1, cr9, [r7, #584] @ 0x248 │ │ + ldc2l 14, cr0, [sl, #144] @ 0x90 │ │ + ldc2l 11, cr5, [r9, #48] @ 0x30 @ │ │ ldc2l 10, cr6, [sl, #748] @ 0x2ec @ │ │ - ldc2l 1, cr9, [r7, #788] @ 0x314 │ │ - ldc2l 3, cr5, [r9, #328] @ 0x148 │ │ + ldc2l 1, cr9, [r7, #968] @ 0x3c8 │ │ + ldc2l 3, cr5, [r9, #508] @ 0x1fc │ │ │ │ 024aa080 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #8 │ │ ldr r4, [pc, #268] @ 24aa1a0 │ │ mov r8, r2 │ │ @@ -1412100,19 +1412099,19 @@ │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, r9, fp, pc} │ │ ldreq ip, [pc, #-2720]! @ 24a9708 │ │ eoreq pc, sl, r4, lsr #26 │ │ eoreq pc, sl, ip, lsr fp @ │ │ ldc2l 7, cr4, [sl, #680] @ 0x2a8 │ │ - ldc2l 3, cr11, [r8, #480] @ 0x1e0 │ │ - ldc2l 13, cr8, [r7, #324] @ 0x144 │ │ - ldc2l 3, cr11, [r8, #392] @ 0x188 │ │ - vcadd.f32 , , q6, #270 │ │ - ldc2l 7, cr5, [r8, #56] @ 0x38 │ │ + ldc2l 3, cr11, [r8, #660] @ 0x294 │ │ + ldc2l 13, cr8, [r7, #504] @ 0x1f8 │ │ + ldc2l 3, cr11, [r8, #572] @ 0x23c │ │ + ldc2l 8, cr1, [r7, #996] @ 0x3e4 │ │ + ldc2l 7, cr5, [r8, #236] @ 0xec │ │ stc2l 1, cr15, [r2, #256]! @ 0x100 │ │ │ │ 024aa1c8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #52 @ 0x34 │ │ str r1, [fp, #-32] @ 0xffffffe0 │ │ @@ -1412267,22 +1412266,22 @@ │ │ bl 270d9a0 │ │ mov r0, r6 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 4, cr3, [r8, #344] @ 0x158 │ │ - ldc2l 3, cr13, [r8, #76] @ 0x4c │ │ - ldc2l 11, cr8, [r7, #356] @ 0x164 @ │ │ - ldc2l 12, cr4, [r9, #856] @ 0x358 │ │ - ldc2l 3, cr3, [r8, #856] @ 0x358 │ │ - ldc2l 10, cr14, [r9, #572] @ 0x23c @ │ │ - ldc2l 10, cr8, [r7, #868] @ 0x364 @ │ │ - ldc2l 12, cr4, [r9, #344] @ 0x158 │ │ + ldc2l 4, cr3, [r8, #524] @ 0x20c │ │ + ldc2l 3, cr13, [r8, #256] @ 0x100 │ │ + ldc2l 11, cr8, [r7, #536] @ 0x218 @ │ │ + ldc2l 13, cr4, [r9, #12] │ │ + ldc2l 4, cr3, [r8, #12] │ │ + ldc2l 10, cr14, [r9, #752] @ 0x2f0 @ │ │ + ldc2l 11, cr8, [r7, #24] @ │ │ + ldc2l 12, cr4, [r9, #524] @ 0x20c │ │ │ │ 024aa45c : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ ldr r4, [r1] │ │ str r4, [sp] │ │ @@ -1412319,17 +1412318,17 @@ │ │ mov r0, r4 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ ldc2l 4, cr4, [sl, #316] @ 0x13c │ │ - ldc2l 4, cr3, [r7, #548] @ 0x224 │ │ - ldc2l 9, cr8, [r7, #482] @ 0x1e2 @ │ │ - ldc2l 2, cr13, [r6, #856] @ 0x358 │ │ + ldc2l 4, cr3, [r7, #728] @ 0x2d8 │ │ + ldc2l 10, cr8, [r7, #120] @ 0x78 @ │ │ + ldc2l 3, cr13, [r6, #12] │ │ │ │ 024aa510 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #72 @ 0x48 │ │ ldr r5, [fp, #24] │ │ mov r4, r3 │ │ @@ -1412472,22 +1412471,22 @@ │ │ mov r1, r5 │ │ mov r2, #1 │ │ bl 270da80 │ │ ldr r0, [pc, #36] @ 24aa77c │ │ mov r1, #14 │ │ add r0, pc, r0 │ │ b 24aa640 │ │ - ldc2l 7, cr7, [r7, #520] @ 0x208 │ │ - ldc2l 10, cr8, [r9, #644] @ 0x284 @ │ │ - ldc2l 8, cr8, [r7, #868] @ 0x364 │ │ - ldc2l 0, cr7, [r7, #456] @ 0x1c8 │ │ - ldc2l 6, cr7, [r7, #408] @ 0x198 │ │ - ldc2l 13, cr6, [r9, #596] @ 0x254 │ │ - ldc2l 7, cr8, [r7, #772] @ 0x304 │ │ - ldc2l 4, cr13, [r7, #204] @ 0xcc │ │ + ldc2l 7, cr7, [r7, #700] @ 0x2bc │ │ + ldc2l 10, cr8, [r9, #824] @ 0x338 @ │ │ + ldc2l 9, cr8, [r7, #12] @ │ │ + ldc2l 0, cr7, [r7, #636] @ 0x27c │ │ + ldc2l 6, cr7, [r7, #588] @ 0x24c │ │ + ldc2l 13, cr6, [r9, #776] @ 0x308 │ │ + ldc2l 7, cr8, [r7, #952] @ 0x3b8 │ │ + ldc2l 4, cr13, [r7, #384] @ 0x180 │ │ │ │ 024aa780 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #84 @ 0x54 │ │ mov r4, r0 │ │ ldr r0, [r2, #32] │ │ @@ -1412756,27 +1412755,27 @@ │ │ mov r1, #10 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #60] @ 24aabfc │ │ add r0, pc, r0 │ │ b 24aaa6c │ │ ldc2l 6, cr2, [sl, #28] │ │ - ldc2l 15, cr10, [r6, #240] @ 0xf0 │ │ - ldc2l 4, cr8, [r7, #724] @ 0x2d4 │ │ - ldc2l 3, cr8, [r8, #772] @ 0x304 │ │ + ldc2l 15, cr10, [r6, #420] @ 0x1a4 │ │ + ldc2l 4, cr8, [r7, #904] @ 0x388 │ │ + ldc2l 3, cr8, [r8, #952] @ 0x3b8 │ │ eoreq pc, sl, ip, asr #11 │ │ eoreq pc, sl, r8, lsl r5 @ │ │ - ldc2l 4, cr12, [r6, #396] @ 0x18c │ │ + ldc2l 4, cr12, [r6, #576] @ 0x240 │ │ ldc2l 5, cr2, [sl, #124] @ 0x7c │ │ - ldc2l 12, cr2, [r9, #96] @ 0x60 │ │ - ldc2l 3, cr8, [r7, #788] @ 0x314 │ │ - ldc2l 11, cr6, [r8, #480] @ 0x1e0 @ │ │ - ldc2l 12, cr2, [r9, #16] │ │ - ldc2l 3, cr8, [r7, #356] @ 0x164 │ │ - ldc2l 4, cr4, [r9, #776] @ 0x308 │ │ + ldc2l 12, cr2, [r9, #276] @ 0x114 │ │ + ldc2l 3, cr8, [r7, #968] @ 0x3c8 │ │ + ldc2l 11, cr6, [r8, #660] @ 0x294 @ │ │ + ldc2l 12, cr2, [r9, #196] @ 0xc4 │ │ + ldc2l 3, cr8, [r7, #536] @ 0x218 │ │ + ldc2l 4, cr4, [r9, #956] @ 0x3bc │ │ ldc2l 4, cr2, [sl, #188] @ 0xbc │ │ │ │ 024aac00 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #24 │ │ mov r4, r2 │ │ @@ -1412874,19 +1412873,19 @@ │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270ce20 │ │ ldr r0, [pc, #20] @ 24aad9c │ │ mov r1, #17 │ │ add r0, pc, r0 │ │ b 24aacd0 │ │ - ldc2l 4, cr13, [r6, #228] @ 0xe4 │ │ - ldc2l 9, cr0, [r7, #44] @ 0x2c @ │ │ - ldc2l 3, cr13, [r6, #484] @ 0x1e4 │ │ - ldc2l 3, cr4, [r9, #164] @ 0xa4 │ │ - ldc2l 0, cr7, [r7, #664] @ 0x298 │ │ + ldc2l 4, cr13, [r6, #408] @ 0x198 │ │ + ldc2l 9, cr0, [r7, #134] @ 0x86 @ │ │ + ldc2l 3, cr13, [r6, #664] @ 0x298 │ │ + ldc2l 3, cr4, [r9, #344] @ 0x158 │ │ + ldc2l 0, cr7, [r7, #844] @ 0x34c │ │ │ │ 024aada4 : │ │ push {fp, lr} │ │ mov fp, sp │ │ mov r3, r2 │ │ mov r2, r1 │ │ mov r1, r0 │ │ @@ -1412932,16 +1412931,16 @@ │ │ add r0, r1, r0, lsl #7 │ │ str r0, [r4] │ │ ldrb r1, [r5, #4] │ │ add r0, r1, r0, lsl #7 │ │ str r0, [r4] │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 15, cr6, [r7, #344] @ 0x158 │ │ - ldc2l 7, cr0, [r7, #888] @ 0x378 │ │ + ldc2l 15, cr6, [r7, #524] @ 0x20c │ │ + vcadd.f32 d16, d7, d11, #270 │ │ │ │ 024aae70 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ sub r0, r0, #1 │ │ cmp r0, #12 │ │ @@ -1413963,16 +1413962,16 @@ │ │ ldr r0, [pc, #2252] @ 24ac734 │ │ mov r1, #18 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #2240] @ 24ac738 │ │ add r0, pc, r0 │ │ b 24ac52c │ │ - ldc2l 9, cr4, [r8, #136] @ 0x88 @ │ │ - ldc2l 0, cr0, [r9, #176] @ 0xb0 │ │ + ldc2l 9, cr4, [r8, #226] @ 0xe2 @ │ │ + ldc2l 0, cr0, [r9, #356] @ 0x164 │ │ ldr r1, [pc, #2040] @ 24ac684 │ │ mov r0, r9 │ │ ldr r2, [pc, #2036] @ 24ac688 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270d3f0 │ │ ldr r4, [pc, #2024] @ 24ac68c │ │ @@ -1413996,15 +1413995,15 @@ │ │ ldr r0, [pc, r0] │ │ add r0, r0, #1 │ │ str r0, [r8] │ │ ldr r0, [pc, #1956] @ 24ac69c │ │ ldr r0, [pc, r0] │ │ lsl r1, r0, #7 │ │ b 24ac0e4 │ │ - ldc2l 9, cr4, [r8, #48] @ 0x30 @ │ │ + ldc2l 9, cr4, [r8, #138] @ 0x8a @ │ │ eoreq lr, sl, ip, asr #29 │ │ ldreq ip, [pc, #-2100]! @ 24ab6dc │ │ ldreq ip, [pc, #-2072]! @ 24ab6fc │ │ ldreq fp, [pc, #-2996]! @ 24ab364 │ │ ldreq fp, [pc, #-2984]! @ 24ab374 │ │ ldreq fp, [pc, #-2948]! @ 24ab39c │ │ eoreq lr, sl, r4, lsr #28 │ │ @@ -1414064,32 +1414063,32 @@ │ │ mov r2, r4 │ │ bl 270d620 │ │ ldr r0, [pc, #2000] @ 24ac7d4 │ │ add r0, pc, r0 │ │ b 24ac52c │ │ ldreq fp, [pc, #-2904]! @ 24ab4b8 │ │ ldreq fp, [pc, #-2900]! @ 24ab4c0 │ │ - ldc2l 13, cr11, [r6, #876] @ 0x36c │ │ - ldc2l 6, cr0, [r9, #344] @ 0x158 │ │ + ldc2l 14, cr11, [r6, #32] │ │ + ldc2l 6, cr0, [r9, #524] @ 0x20c │ │ ldr r0, [pc, #1976] @ 24ac7d8 │ │ mov r1, #40 @ 0x28 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #1964] @ 24ac7dc │ │ mov r1, r4 │ │ mov r2, #1 │ │ add r0, pc, r0 │ │ bl 270da90 │ │ ldr r0, [pc, #1948] @ 24ac7e0 │ │ mov r1, #18 │ │ add r0, pc, r0 │ │ b 24ac2b4 │ │ - ldc2l 3, cr8, [r8, #252] @ 0xfc │ │ + ldc2l 3, cr8, [r8, #432] @ 0x1b0 │ │ strhteq lr, [sl], -ip │ │ - ldc2l 14, cr15, [r8, #592] @ 0x250 │ │ + ldc2l 14, cr15, [r8, #772] @ 0x304 │ │ mlaeq sl, r0, sp, lr │ │ ldreq ip, [pc, #-1784]! @ 24ab96c │ │ ldreq ip, [pc, #-1756]! @ 24ab98c │ │ ldreq fp, [pc, #-2672]! @ 24ab5fc │ │ ldr r1, [pc, #1512] @ 24ac658 │ │ mov r0, r9 │ │ ldr r2, [pc, #1508] @ 24ac65c │ │ @@ -1414121,16 +1414120,16 @@ │ │ mov r0, #256 @ 0x100 │ │ ldr r1, [pc, r1] │ │ add r1, r0, r1, lsl #8 │ │ ldr r0, [pc, #1460] @ 24ac6a0 │ │ str r1, [sl] │ │ add r0, pc, r0 │ │ b 24ac52c │ │ - ldc2l 10, cr14, [r7, #828] @ 0x33c @ │ │ - ldc2l 13, cr15, [r8, #976] @ 0x3d0 │ │ + ldc2l 10, cr14, [r7, #1008] @ 0x3f0 @ │ │ + ldc2l 14, cr15, [r8, #132] @ 0x84 │ │ ldr r1, [pc, #1804] @ 24ac810 │ │ movw r5, #64513 @ 0xfc01 │ │ ldr r0, [r8] │ │ movt r5, #65535 @ 0xffff │ │ ldr r2, [pc, #1792] @ 24ac814 │ │ add r1, pc, r1 │ │ ldr r3, [pc, #1788] @ 24ac818 │ │ @@ -1414142,18 +1414141,18 @@ │ │ add r2, sp, #24 │ │ str r0, [sp, #24] │ │ mov r0, r9 │ │ str r5, [r1] │ │ str r6, [sp, #8] │ │ bl 270d600 │ │ b 24ac534 │ │ - ldc2l 10, cr14, [r7, #652] @ 0x28c @ │ │ - ldc2l 6, cr14, [r8, #12] │ │ - ldc2l 13, cr15, [r8, #720] @ 0x2d0 │ │ - ldc2l 5, cr14, [r8, #860] @ 0x35c │ │ + ldc2l 10, cr14, [r7, #832] @ 0x340 @ │ │ + ldc2l 6, cr14, [r8, #192] @ 0xc0 │ │ + ldc2l 13, cr15, [r8, #900] @ 0x384 │ │ + ldc2l 6, cr14, [r8, #16] │ │ ldr r0, [pc, #1300] @ 24ac674 │ │ mov r1, #40 @ 0x28 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #1288] @ 24ac678 │ │ mov r1, r4 │ │ mov r2, #1 │ │ @@ -1414162,15 +1414161,15 @@ │ │ ldr r0, [pc, #1272] @ 24ac67c │ │ mov r1, #18 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #1260] @ 24ac680 │ │ add r0, pc, r0 │ │ b 24ac52c │ │ - ldc2l 13, cr15, [r8, #544] @ 0x220 │ │ + ldc2l 13, cr15, [r8, #724] @ 0x2d4 │ │ eoreq lr, sl, ip, ror ip │ │ ldreq ip, [pc, #-1508]! @ 24abbc4 │ │ ldr r1, [pc, #1684] @ 24ac840 │ │ mov r0, r7 │ │ mov r2, r6 │ │ mov r3, #8 │ │ add r1, pc, r1 │ │ @@ -1414191,17 +1414190,17 @@ │ │ mov r2, #1 │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270da90 │ │ ldr r1, [pc, #1408] @ 24ac788 │ │ add r1, pc, r1 │ │ b 24ac29c │ │ - ldc2l 12, cr13, [r9, #536] @ 0x218 │ │ - ldc2l 12, cr14, [r6, #216] @ 0xd8 │ │ - ldc2l 12, cr7, [r7, #532] @ 0x214 │ │ + ldc2l 12, cr13, [r9, #716] @ 0x2cc │ │ + ldc2l 12, cr14, [r6, #396] @ 0x18c │ │ + ldc2l 12, cr7, [r7, #712] @ 0x2c8 │ │ ldreq fp, [pc, #-2344]! @ 24ab8f8 │ │ ldr r0, [pc, #1420] @ 24ac7b0 │ │ mov r1, #74 @ 0x4a │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #1408] @ 24ac7b4 │ │ mov r1, r8 │ │ @@ -1414209,18 +1414208,18 @@ │ │ add r4, pc, r4 │ │ mov r0, r4 │ │ bl 270da90 │ │ ldr r1, [pc, #1388] @ 24ac7b8 │ │ add r1, pc, r1 │ │ b 24ac29c │ │ ldrdeq lr, [sl], -r0 @ │ │ - ldc2l 1, cr11, [r9, #772] @ 0x304 │ │ - ldc2l 2, cr6, [r9, #484] @ 0x1e4 │ │ - ldc2l 12, cr15, [r8, #608] @ 0x260 │ │ - ldc2l 2, cr6, [r9, #308] @ 0x134 │ │ + ldc2l 1, cr11, [r9, #952] @ 0x3b8 │ │ + ldc2l 2, cr6, [r9, #664] @ 0x298 │ │ + ldc2l 12, cr15, [r8, #788] @ 0x314 │ │ + ldc2l 2, cr6, [r9, #488] @ 0x1e8 │ │ eoreq lr, sl, r4, lsl #23 │ │ ldreq ip, [pc, #-1260]! @ 24abd84 │ │ ldr r0, [pc, #1260] @ 24ac760 │ │ mov r1, #74 @ 0x4a │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #1248] @ 24ac764 │ │ @@ -1414239,15 +1414238,15 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #1200] @ 24ac770 │ │ add r0, pc, r0 │ │ b 24ac52c │ │ ldreq ip, [pc, #-1232]! @ 24abdfc │ │ ldreq fp, [pc, #-2152]! @ 24aba68 │ │ - ldc2l 1, cr15, [r9, #244] @ 0xf4 │ │ + ldc2l 1, cr15, [r9, #424] @ 0x1a8 │ │ eoreq lr, sl, ip, lsl #22 │ │ ldreq ip, [pc, #-1140]! @ 24abe68 │ │ ldr r1, [pc, #1004] @ 24ac6cc │ │ mov r0, r9 │ │ ldr r2, [pc, #1000] @ 24ac6d0 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ @@ -1414275,15 +1414274,15 @@ │ │ str r0, [r8] │ │ ldr r0, [pc, #920] @ 24ac6e4 │ │ ldr r0, [pc, r0] │ │ lsl r1, r0, #7 │ │ b 24ac48c │ │ ldreq ip, [pc, #-1112]! @ 24abf04 │ │ ldreq fp, [pc, #-2028]! @ 24abb74 │ │ - ldc2l 11, cr15, [r8, #320] @ 0x140 @ │ │ + ldc2l 11, cr15, [r8, #500] @ 0x1f4 @ │ │ ldr r1, [pc, #936] @ 24ac710 │ │ mov r0, r9 │ │ ldr r2, [pc, #932] @ 24ac714 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ bl 270d400 │ │ ldr r4, [pc, #920] @ 24ac718 │ │ @@ -1414314,16 +1414313,16 @@ │ │ b 24ac48c │ │ eoreq lr, sl, r8, asr #20 │ │ ldreq ip, [pc, #-944]! @ 24ac03c │ │ ldreq ip, [pc, #-916]! @ 24ac05c │ │ ldreq fp, [pc, #-1836]! @ 24abcc8 │ │ ldc2l 4, cr3, [sl, #672] @ 0x2a0 │ │ ldc2l 4, cr3, [sl, #660] @ 0x294 │ │ - ldc2l 5, cr2, [r7, #116] @ 0x74 │ │ - ldc2l 7, cr8, [r7, #660] @ 0x294 │ │ + ldc2l 5, cr2, [r7, #296] @ 0x128 │ │ + ldc2l 7, cr8, [r7, #840] @ 0x348 │ │ ldr r2, [pc, #820] @ 24ac73c │ │ mov r3, #1024 @ 0x400 │ │ ldr r1, [pc, #816] @ 24ac740 │ │ ldr r0, [pc, #816] @ 24ac744 │ │ add r2, pc, r2 │ │ add r1, pc, r1 │ │ add r0, pc, r0 │ │ @@ -1414427,29 +1414426,29 @@ │ │ ldreq fp, [pc, #-1320]! @ 24ac080 │ │ eoreq lr, sl, r8, ror #15 │ │ ldreq ip, [pc, #-304]! @ 24ac480 │ │ ldreq ip, [pc, #-264]! @ 24ac4ac │ │ ldreq fp, [pc, #-1204]! @ 24ac104 │ │ eoreq lr, sl, r0, asr #14 │ │ ldreq ip, [pc, #-152]! @ 24ac528 │ │ - ldc2l 0, cr14, [r8, #300] @ 0x12c │ │ + ldc2l 0, cr14, [r8, #480] @ 0x1e0 │ │ ldreq ip, [pc, #-76]! @ 24ac57c │ │ ldreq ip, [pc, #-76]! @ 24ac580 │ │ ldreq ip, [pc, #-76]! @ 24ac584 │ │ ldreq ip, [pc, #-56]! @ 24ac59c │ │ ldreq ip, [pc, #-48]! @ 24ac5a8 │ │ ldreq fp, [pc, #-3384]! @ 24ab8a4 │ │ - ldc2l 15, cr11, [r8, #240] @ 0xf0 │ │ - ldc2l 7, cr7, [r7, #292] @ 0x124 │ │ + ldc2l 15, cr11, [r8, #420] @ 0x1a4 │ │ + ldc2l 7, cr7, [r7, #472] @ 0x1d8 │ │ ldreq fp, [pc, #-4076]! @ 24ab5fc │ │ ldreq fp, [pc, #-4060]! @ 24ab610 │ │ ldreq fp, [pc, #-4044]! @ 24ab624 │ │ - ldc2l 3, cr10, [r7, #504] @ 0x1f8 │ │ - ldc2l 0, cr4, [r8, #352] @ 0x160 │ │ - ldc2l 3, cr11, [r6, #636] @ 0x27c │ │ + ldc2l 3, cr10, [r7, #684] @ 0x2ac │ │ + ldc2l 0, cr4, [r8, #532] @ 0x214 │ │ + ldc2l 3, cr11, [r6, #816] @ 0x330 │ │ eoreq lr, sl, r4, lsr #7 │ │ ldreq fp, [pc, #-252]! @ 24ac508 │ │ ldreq fp, [pc, #-3368]! @ 24ab8e0 │ │ eoreq lr, sl, r4, lsl #7 │ │ ldreq fp, [pc, #-1248]! @ 24ac130 │ │ ldreq fp, [pc, #-3344]! @ 24ab904 │ │ eoreq lr, sl, r8, ror #6 │ │ @@ -1414457,15 +1414456,15 @@ │ │ eoreq lr, sl, r4, lsr r3 │ │ eoreq lr, sl, r0, lsr #6 │ │ eoreq lr, sl, r0, lsr #6 │ │ eoreq lr, sl, ip, lsl #6 │ │ strdeq lr, [sl], -r8 @ │ │ eoreq lr, sl, r4, ror #5 │ │ strhteq lr, [sl], -ip │ │ - ldc2l 12, cr3, [r8, #640] @ 0x280 │ │ + ldc2l 12, cr3, [r8, #820] @ 0x334 │ │ eoreq lr, sl, ip, lsl #12 │ │ eoreq lr, sl, ip, lsl r6 │ │ ldreq fp, [pc, #-868]! @ 24ac2e4 │ │ eoreq lr, sl, ip, lsl #12 │ │ ldreq fp, [pc, #-3956]! @ 24ab6dc │ │ ldreq fp, [pc, #-3924]! @ 24ab700 │ │ ldreq fp, [pc, #-3900]! @ 24ab71c │ │ @@ -1414473,26 +1414472,26 @@ │ │ eoreq sp, sl, r8, lsr #27 │ │ ldreq fp, [pc, #-772]! @ 24ac360 │ │ strhteq sp, [sl], -r8 │ │ ldreq fp, [pc, #-1824]! @ 24abf4c │ │ ldreq fp, [pc, #-1792]! @ 24abf70 │ │ ldreq fp, [pc, #-1768]! @ 24abf8c │ │ ldreq fp, [pc, #-1748]! @ 24abfa4 │ │ - ldc2l 3, cr9, [r8, #284] @ 0x11c │ │ - ldc2l 13, cr6, [r7, #308] @ 0x134 │ │ - ldc2l 6, cr11, [r6, #200] @ 0xc8 │ │ - ldc2l 3, cr5, [r9, #404] @ 0x194 │ │ + ldc2l 3, cr9, [r8, #464] @ 0x1d0 │ │ + ldc2l 13, cr6, [r7, #488] @ 0x1e8 │ │ + ldc2l 6, cr11, [r6, #380] @ 0x17c │ │ + ldc2l 3, cr5, [r9, #584] @ 0x248 │ │ eoreq sp, sl, r8, lsl #31 │ │ ldreq fp, [pc, #-228]! @ 24ac5ac │ │ mlaeq sl, r8, pc, sp @ │ │ ldreq fp, [pc, #-2304]! @ 24abd98 │ │ ldreq fp, [pc, #-2272]! @ 24abdbc │ │ ldreq fp, [pc, #-2248]! @ 24abdd8 │ │ ldreq fp, [pc, #-2232]! @ 24abdec │ │ - ldc2l 4, cr5, [r9, #36] @ 0x24 │ │ + ldc2l 4, cr5, [r9, #216] @ 0xd8 │ │ eoreq lr, sl, r4, lsl #5 │ │ ldreq sl, [pc, #-4000]! @ 24ab710 │ │ ldreq sl, [pc, #-3980]! @ 24ab728 │ │ ldreq sl, [pc, #-3940]! @ 24ab754 │ │ ldreq fp, [pc, #-2948]! @ 24abb38 │ │ ldreq sl, [pc, #-3936]! @ 24ab760 │ │ eoreq lr, sl, ip, lsl r2 │ │ @@ -1414519,104 +1414518,104 @@ │ │ strhteq sp, [sl], -r0 │ │ ldreq fp, [pc, #-12]! @ 24ac710 │ │ eoreq sp, sl, r0, asr #21 │ │ ldreq fp, [pc, #-1064]! @ 24ac2fc │ │ ldreq fp, [pc, #-1032]! @ 24ac320 │ │ ldreq fp, [pc, #-1008]! @ 24ac33c │ │ ldreq fp, [pc, #-988]! @ 24ac354 │ │ - ldc2l 6, cr9, [r8, #396] @ 0x18c │ │ - ldc2l 0, cr7, [r7, #420] @ 0x1a4 │ │ - ldc2l 9, cr11, [r6, #156] @ 0x9c @ │ │ - ldc2l 13, cr13, [r7, #492] @ 0x1ec │ │ + ldc2l 6, cr9, [r8, #576] @ 0x240 │ │ + ldc2l 0, cr7, [r7, #600] @ 0x258 │ │ + ldc2l 9, cr11, [r6, #246] @ 0xf6 @ │ │ + ldc2l 13, cr13, [r7, #672] @ 0x2a0 │ │ eoreq sp, sl, r4, lsl #20 │ │ eoreq sp, sl, r4, lsl sl │ │ ldreq sl, [pc, #-1884]! @ 24abff0 │ │ eoreq sp, sl, r4, lsl #20 │ │ ldreq fp, [pc, #-876]! @ 24ac3e8 │ │ ldreq fp, [pc, #-844]! @ 24ac40c │ │ ldreq fp, [pc, #-820]! @ 24ac428 │ │ ldreq fp, [pc, #-804]! @ 24ac43c │ │ - ldc2l 7, cr13, [r7, #364] @ 0x16c │ │ - ldc2l 9, cr13, [r7, #264] @ 0x108 @ │ │ - ldc2l 12, cr6, [r7, #228] @ 0xe4 │ │ + ldc2l 7, cr13, [r7, #544] @ 0x220 │ │ + ldc2l 9, cr13, [r7, #354] @ 0x162 @ │ │ + ldc2l 12, cr6, [r7, #408] @ 0x198 │ │ ldreq fp, [pc, #-1296]! @ 24ac260 │ │ - ldc2l 11, cr6, [r8, #452] @ 0x1c4 @ │ │ - ldc2l 4, cr13, [r8, #668] @ 0x29c │ │ + ldc2l 11, cr6, [r8, #632] @ 0x278 @ │ │ + ldc2l 4, cr13, [r8, #848] @ 0x350 │ │ eoreq lr, sl, r8, asr #1 │ │ ldreq fp, [pc, #-2608]! @ 24abd50 │ │ ldreq fp, [pc, #-2580]! @ 24abd70 │ │ - ldc2l 11, cr15, [r7, #136] @ 0x88 @ │ │ - ldc2l 12, cr6, [r7, #820] @ 0x334 │ │ + ldc2l 11, cr15, [r7, #316] @ 0x13c @ │ │ + ldc2l 12, cr6, [r7, #1000] @ 0x3e8 │ │ ldreq fp, [pc, #-1448]! @ 24ac1e8 │ │ eoreq lr, sl, r0, lsr #1 │ │ ldreq sl, [pc, #-3516]! @ 24ab9dc │ │ eoreq lr, sl, r0, lsl #1 │ │ ldreq fp, [pc, #-2500]! @ 24abddc │ │ ldreq sl, [pc, #-3424]! @ 24aba44 │ │ ldreq fp, [pc, #-2408]! @ 24abe40 │ │ eoreq sp, sl, r8, lsl pc │ │ ldreq fp, [pc, #-2176]! @ 24abf30 │ │ ldreq fp, [pc, #-2148]! @ 24abf50 │ │ - ldc2l 4, cr11, [r8, #716] @ 0x2cc │ │ - ldc2l 12, cr6, [r7, #548] @ 0x224 │ │ + ldc2l 4, cr11, [r8, #896] @ 0x380 │ │ + ldc2l 12, cr6, [r7, #728] @ 0x2d8 │ │ ldreq fp, [pc, #-1384]! @ 24ac258 │ │ strdeq sp, [sl], -r4 @ │ │ ldreq fp, [pc, #-1040]! @ 24ac3b8 │ │ ldrdeq sp, [sl], -r4 @ │ │ ldreq fp, [pc, #-2068]! @ 24abfbc │ │ ldreq sl, [pc, #-2996]! @ 24abc20 │ │ ldreq fp, [pc, #-1988]! @ 24ac014 │ │ - ldc2l 7, cr13, [r8, #396] @ 0x18c │ │ - ldc2l 4, cr9, [r8, #540] @ 0x21c │ │ - ldc2l 14, cr6, [r7, #564] @ 0x234 │ │ - ldc2l 7, cr11, [r6, #456] @ 0x1c8 │ │ - ldc2l 15, cr1, [r7, #728] @ 0x2d8 │ │ - ldc2l 4, cr7, [r7, #996] @ 0x3e4 │ │ + ldc2l 7, cr13, [r8, #576] @ 0x240 │ │ + ldc2l 4, cr9, [r8, #720] @ 0x2d0 │ │ + ldc2l 14, cr6, [r7, #744] @ 0x2e8 │ │ + ldc2l 7, cr11, [r6, #636] @ 0x27c │ │ + ldc2l 15, cr1, [r7, #908] @ 0x38c │ │ + ldc2l 5, cr7, [r7, #152] @ 0x98 │ │ ldreq fp, [pc, #-3536]! @ 24aba24 │ │ - ldc2l 3, cr7, [r8, #932] @ 0x3a4 │ │ - ldc2l 13, cr3, [r9, #752] @ 0x2f0 │ │ - ldc2l 4, cr7, [r7, #708] @ 0x2c4 │ │ + ldc2l 4, cr7, [r8, #88] @ 0x58 │ │ + ldc2l 13, cr3, [r9, #932] @ 0x3a4 │ │ + ldc2l 4, cr7, [r7, #888] @ 0x378 │ │ ldreq fp, [pc, #-3468]! @ 24aba78 │ │ - ldc2l 0, cr10, [r6, #40] @ 0x28 │ │ - ldc2l 5, cr7, [r7, #260] @ 0x104 │ │ + ldc2l 0, cr10, [r6, #220] @ 0xdc │ │ + ldc2l 5, cr7, [r7, #440] @ 0x1b8 │ │ ldreq fp, [pc, #-3616]! @ 24ab9f0 │ │ - ldc2l 4, cr13, [r9, #1016] @ 0x3f8 │ │ + ldc2l 5, cr13, [r9, #172] @ 0xac │ │ ldreq sl, [pc, #-2640]! @ 24abdc8 │ │ eoreq sp, sl, r0, lsl sp │ │ eoreq sp, sl, ip, ror #25 │ │ - ldc2l 12, cr5, [r8, #948] @ 0x3b4 │ │ - ldc2l 11, cr5, [r9, #680] @ 0x2a8 @ │ │ - ldc2l 7, cr12, [r6, #944] @ 0x3b0 │ │ - ldc2l 11, cr9, [r8, #524] @ 0x20c @ │ │ - ldc2l 5, cr7, [r7, #548] @ 0x224 │ │ - ldc2l 14, cr11, [r6, #440] @ 0x1b8 │ │ - ldc2l 0, cr2, [r7, #760] @ 0x2f8 │ │ - ldc2l 15, cr14, [r9, #856] @ 0x358 │ │ + ldc2l 13, cr5, [r8, #104] @ 0x68 │ │ + ldc2l 11, cr5, [r9, #860] @ 0x35c @ │ │ + ldc2l 8, cr12, [r6, #100] @ 0x64 │ │ + ldc2l 11, cr9, [r8, #704] @ 0x2c0 @ │ │ + ldc2l 5, cr7, [r7, #728] @ 0x2d8 │ │ + ldc2l 14, cr11, [r6, #620] @ 0x26c │ │ + ldc2l 0, cr2, [r7, #940] @ 0x3ac │ │ + ldc2l 0, cr15, [r9, #12] │ │ eoreq lr, sl, ip, lsl #5 │ │ - ldc2l 4, cr7, [r6, #556] @ 0x22c │ │ + ldc2l 4, cr7, [r6, #736] @ 0x2e0 │ │ eoreq sp, sl, r4, lsl #25 │ │ - ldc2l 0, cr11, [r9, #28] │ │ + ldc2l 0, cr11, [r9, #208] @ 0xd0 │ │ eoreq sp, sl, r8, lsl #19 │ │ ldc2l 10, cr0, [sl, #992] @ 0x3e0 @ │ │ eoreq sp, sl, ip, asr #18 │ │ - ldc2l 6, cr13, [r7, #956] @ 0x3bc │ │ - ldc2l 9, cr6, [r7, #170] @ 0xaa @ │ │ - ldc2l 14, cr8, [r7, #780] @ 0x30c │ │ - ldc2l 1, cr15, [r8, #488] @ 0x1e8 │ │ + ldc2l 7, cr13, [r7, #112] @ 0x70 │ │ + ldc2l 9, cr6, [r7, #260] @ 0x104 @ │ │ + ldc2l 14, cr8, [r7, #960] @ 0x3c0 │ │ + ldc2l 1, cr15, [r8, #668] @ 0x29c │ │ │ │ 024ac868 : │ │ push {fp, lr} │ │ mov fp, sp │ │ ldr r0, [pc, #16] @ 24ac888 │ │ mov r1, #17 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, #0 │ │ pop {fp, pc} │ │ - ldc2l 11, cr13, [r9, #916] @ 0x394 @ │ │ + ldc2l 12, cr13, [r9, #72] @ 0x48 │ │ │ │ 024ac88c : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #40 @ 0x28 │ │ mov r1, r0 │ │ mov r0, #0 │ │ @@ -1414887,18 +1414886,18 @@ │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #8 │ │ bl 270ce40 │ │ pop {r4, r5, fp, lr} │ │ mov r0, #0 │ │ bx lr │ │ - ldc2l 4, cr11, [r6, #768] @ 0x300 │ │ - ldc2l 8, cr8, [r8, #380] @ 0x17c │ │ - ldc2l 2, cr6, [r7, #404] @ 0x194 │ │ - ldc2l 11, cr10, [r6, #296] @ 0x128 @ │ │ + ldc2l 4, cr11, [r6, #948] @ 0x3b4 │ │ + vcadd.f32 d24, d24, d12, #270 │ │ + ldc2l 2, cr6, [r7, #584] @ 0x248 │ │ + ldc2l 11, cr10, [r6, #476] @ 0x1dc @ │ │ │ │ 024acc9c : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #40 @ 0x28 │ │ mov ip, r1 │ │ mov lr, r0 │ │ @@ -1415071,21 +1415070,21 @@ │ │ add r0, sp, #12 │ │ str r0, [sp, #8] │ │ ldr r1, [pc, #32] @ 24acf68 │ │ mov r0, r6 │ │ add r1, pc, r1 │ │ bl 270d3d0 │ │ b 24aceb0 │ │ - ldc2l 9, cr10, [r8, #340] @ 0x154 @ │ │ - vcadd.f32 , , , #270 │ │ - ldc2l 0, cr6, [r7, #996] @ 0x3e4 │ │ + ldc2l 9, cr10, [r8, #430] @ 0x1ae @ │ │ + ldc2l 8, cr13, [r9, #592] @ 0x250 │ │ + ldc2l 1, cr6, [r7, #152] @ 0x98 │ │ ldc2l 7, cr1, [sl, #216] @ 0xd8 │ │ eoreq sp, sl, r8, lsl r0 │ │ eoreq ip, sl, r8, lsl pc │ │ - ldc2l 9, cr10, [r8, #44] @ 0x2c @ │ │ + ldc2l 9, cr10, [r8, #134] @ 0x86 @ │ │ │ │ 024acf70 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #84 @ 0x54 │ │ mov r8, r3 │ │ mov r7, r2 │ │ @@ -1415421,31 +1415420,31 @@ │ │ add r0, r0, #1 │ │ str r0, [fp, #-44] @ 0xffffffd4 │ │ ldr r0, [sp, #40] @ 0x28 │ │ add r5, r0, r5 │ │ cmp r5, r4 │ │ ble 24ad390 │ │ b 24ad02c │ │ - ldc2l 6, cr6, [r6, #672] @ 0x2a0 │ │ - ldc2l 6, cr13, [r9, #252] @ 0xfc │ │ - ldc2l 14, cr5, [r7, #836] @ 0x344 │ │ + ldc2l 6, cr6, [r6, #852] @ 0x354 │ │ + ldc2l 6, cr13, [r9, #432] @ 0x1b0 │ │ + ldc2l 14, cr5, [r7, #1016] @ 0x3f8 │ │ ldc2l 5, cr1, [sl, #56] @ 0x38 │ │ - ldc2l 0, cr6, [r9, #272] @ 0x110 │ │ - ldc2l 14, cr5, [r7, #116] @ 0x74 │ │ + ldc2l 0, cr6, [r9, #452] @ 0x1c4 │ │ + ldc2l 14, cr5, [r7, #296] @ 0x128 │ │ strhteq ip, [sl], -ip │ │ - ldc2l 12, cr5, [r8, #740] @ 0x2e4 │ │ - ldc2l 8, cr0, [r7, #588] @ 0x24c │ │ - ldc2l 13, cr5, [r7, #644] @ 0x284 │ │ + ldc2l 12, cr5, [r8, #920] @ 0x398 │ │ + vcadd.f32 q8, , q0, #270 │ │ + ldc2l 13, cr5, [r7, #824] @ 0x338 │ │ eoreq ip, sl, r0, asr #26 │ │ - vcadd.f32 d24, d6, d13, #270 │ │ - ldc2l 13, cr5, [r7, #132] @ 0x84 │ │ - ldc2l 15, cr5, [r9, #268] @ 0x10c │ │ + ldc2l 8, cr8, [r6, #232] @ 0xe8 │ │ + ldc2l 13, cr5, [r7, #312] @ 0x138 │ │ + ldc2l 15, cr5, [r9, #448] @ 0x1c0 │ │ eoreq ip, sl, r0, ror ip │ │ eoreq ip, sl, r4, ror #21 │ │ - ldc2l 6, cr6, [r6, #80] @ 0x50 │ │ + ldc2l 6, cr6, [r6, #260] @ 0x104 │ │ │ │ 024ad508 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #124 @ 0x7c │ │ mov r8, r3 │ │ mov r4, r2 │ │ @@ -1415658,26 +1415657,26 @@ │ │ b 24ad720 │ │ ldr r1, [pc, #56] @ 24ad898 │ │ add r2, sp, #36 @ 0x24 │ │ ldr r0, [sp, #20] │ │ add r1, pc, r1 │ │ bl 270d420 │ │ b 24ad5c4 │ │ - ldc2l 11, cr5, [r9, #912] @ 0x390 @ │ │ - ldc2l 14, cr3, [r9, #740] @ 0x2e4 │ │ - ldc2l 9, cr5, [r7, #114] @ 0x72 @ │ │ - ldc2l 9, cr10, [r6, #360] @ 0x168 @ │ │ - ldc2l 8, cr5, [r7, #580] @ 0x244 │ │ - ldc2l 6, cr12, [r7, #4] │ │ + ldc2l 12, cr5, [r9, #68] @ 0x44 │ │ + ldc2l 14, cr3, [r9, #920] @ 0x398 │ │ + ldc2l 9, cr5, [r7, #204] @ 0xcc @ │ │ + ldc2l 9, cr10, [r6, #450] @ 0x1c2 @ │ │ + ldc2l 8, cr5, [r7, #760] @ 0x2f8 │ │ + ldc2l 6, cr12, [r7, #184] @ 0xb8 │ │ strhteq ip, [sl], -ip │ │ strhteq ip, [sl], -r0 │ │ eoreq ip, sl, r8, lsr r6 │ │ eoreq ip, sl, r4, ror #12 │ │ eoreq ip, sl, r4, lsl #20 │ │ - ldc2l 11, cr5, [r9, #336] @ 0x150 @ │ │ + ldc2l 11, cr5, [r9, #516] @ 0x204 @ │ │ │ │ 024ad8a0 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ ldr r4, [r1] │ │ cmp r4, #1 │ │ blt 24ad8e4 │ │ @@ -1415879,19 +1415878,19 @@ │ │ ldr r0, [pc, #36] @ 24adbd4 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 1, cr2, [r7, #828] @ 0x33c │ │ + ldc2l 1, cr2, [r7, #1008] @ 0x3f0 │ │ strdeq ip, [sl], -ip @ │ │ ldreq r9, [pc, #-3336]! @ 24acecc │ │ eoreq ip, sl, ip, asr #13 │ │ - ldc2l 0, cr2, [r7, #108] @ 0x6c │ │ + ldc2l 0, cr2, [r7, #288] @ 0x120 │ │ │ │ 024adbd8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #124 @ 0x7c │ │ ldr r4, [r2, #32] │ │ mov r9, r0 │ │ @@ -1416344,35 +1416343,35 @@ │ │ bl 270d970 │ │ b 24ae104 │ │ bl 270db20 │ │ clz r0, r0 │ │ lsr r0, r0, #5 │ │ str r0, [sl] │ │ b 24add74 │ │ - ldc2l 3, cr10, [r6, #932] @ 0x3a4 │ │ - ldc2l 12, cr7, [r6, #724] @ 0x2d4 │ │ - ldc2l 1, cr5, [r7, #532] @ 0x214 │ │ - ldc2l 0, cr5, [r8, #772] @ 0x304 │ │ - ldc2l 4, cr10, [r6, #580] @ 0x244 │ │ - ldc2l 1, cr7, [r9, #276] @ 0x114 │ │ - ldc2l 2, cr5, [r7, #180] @ 0xb4 │ │ - ldc2l 10, cr15, [r8, #644] @ 0x284 @ │ │ + ldc2l 4, cr10, [r6, #88] @ 0x58 │ │ + ldc2l 12, cr7, [r6, #904] @ 0x388 │ │ + ldc2l 1, cr5, [r7, #712] @ 0x2c8 │ │ + ldc2l 0, cr5, [r8, #952] @ 0x3b8 │ │ + ldc2l 4, cr10, [r6, #760] @ 0x2f8 │ │ + ldc2l 1, cr7, [r9, #456] @ 0x1c8 │ │ + ldc2l 2, cr5, [r7, #360] @ 0x168 │ │ + ldc2l 10, cr15, [r8, #824] @ 0x338 @ │ │ eoreq ip, sl, r8, lsr #5 │ │ eoreq ip, sl, ip, lsr #4 │ │ eoreq ip, sl, ip, ror #1 │ │ eoreq ip, sl, r0 │ │ - ldc2l 11, cr8, [r6, #172] @ 0xac @ │ │ - ldc2l 2, cr10, [r6, #484] @ 0x1e4 │ │ - vcadd.f32 , q4, q12, #270 │ │ - ldc2l 0, cr5, [r7, #84] @ 0x54 │ │ - ldc2l 7, cr3, [r8, #800] @ 0x320 │ │ - ldc2l 1, cr10, [r6, #804] @ 0x324 │ │ - ldc2l 8, cr15, [r8, #64] @ 0x40 │ │ - ldc2l 15, cr4, [r7, #404] @ 0x194 │ │ - ldc2l 0, cr1, [r9, #824] @ 0x338 │ │ + ldc2l 11, cr8, [r6, #352] @ 0x160 @ │ │ + ldc2l 2, cr10, [r6, #664] @ 0x298 │ │ + ldc2l 8, cr15, [r8, #596] @ 0x254 │ │ + ldc2l 0, cr5, [r7, #264] @ 0x108 │ │ + ldc2l 7, cr3, [r8, #980] @ 0x3d4 │ │ + ldc2l 1, cr10, [r6, #984] @ 0x3d8 │ │ + ldc2l 8, cr15, [r8, #244] @ 0xf4 │ │ + ldc2l 15, cr4, [r7, #584] @ 0x248 │ │ + ldc2l 0, cr1, [r9, #1004] @ 0x3ec │ │ │ │ 024ae354 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #76 @ 0x4c │ │ mov r9, r0 │ │ ldr r0, [r1, #16] │ │ @@ -1416576,25 +1416575,25 @@ │ │ ldr r0, [fp, #12] │ │ add r1, pc, r1 │ │ str r2, [fp, #-32] @ 0xffffffe0 │ │ add r0, r0, r2 │ │ sub r2, r8, r2 │ │ bl 270d970 │ │ b 24ae52c │ │ - ldc2l 8, cr13, [r7, #704] @ 0x2c0 │ │ - ldc2l 4, cr7, [r6, #528] @ 0x210 │ │ - ldc2l 9, cr4, [r7, #506] @ 0x1fa @ │ │ - ldc2l 9, cr4, [r8, #18] @ │ │ - ldc2l 9, cr13, [r7, #208] @ 0xd0 @ │ │ - ldc2l 9, cr6, [r9, #410] @ 0x19a @ │ │ - ldc2l 10, cr4, [r7, #724] @ 0x2d4 @ │ │ - ldc2l 3, cr15, [r8, #100] @ 0x64 │ │ + ldc2l 8, cr13, [r7, #884] @ 0x374 │ │ + ldc2l 4, cr7, [r6, #708] @ 0x2c4 │ │ + ldc2l 10, cr4, [r7, #168] @ 0xa8 @ │ │ + ldc2l 9, cr4, [r8, #108] @ 0x6c @ │ │ + ldc2l 9, cr13, [r7, #298] @ 0x12a @ │ │ + ldc2l 9, cr6, [r9, #500] @ 0x1f4 @ │ │ + ldc2l 10, cr4, [r7, #904] @ 0x388 @ │ │ + ldc2l 3, cr15, [r8, #280] @ 0x118 │ │ strdeq fp, [sl], -r0 @ │ │ eoreq fp, sl, r4, asr ip │ │ - ldc2l 7, cr8, [r6, #556] @ 0x22c │ │ + ldc2l 7, cr8, [r6, #736] @ 0x2e0 │ │ │ │ 024ae6c4 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #72 @ 0x48 │ │ ldr r4, [fp, #20] │ │ mov r7, #0 │ │ @@ -1416736,22 +1416735,22 @@ │ │ bl 270d9a0 │ │ mov r0, r5 │ │ mov r1, #7 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 3, cr7, [r7, #948] @ 0x3b4 │ │ + ldc2l 4, cr7, [r7, #104] @ 0x68 │ │ ldc2l 1, cr0, [sl, #584] @ 0x248 │ │ - ldc2l 7, cr4, [r7, #164] @ 0xa4 │ │ - ldc2l 14, cr2, [r7, #776] @ 0x308 │ │ - ldc2l 2, cr7, [r7, #932] @ 0x3a4 │ │ - ldc2l 6, cr10, [r9, #124] @ 0x7c │ │ - ldc2l 6, cr4, [r7, #164] @ 0xa4 │ │ - ldc2l 2, cr9, [r7, #620] @ 0x26c │ │ + ldc2l 7, cr4, [r7, #344] @ 0x158 │ │ + ldc2l 14, cr2, [r7, #956] @ 0x3bc │ │ + ldc2l 3, cr7, [r7, #88] @ 0x58 │ │ + ldc2l 6, cr10, [r9, #304] @ 0x130 │ │ + ldc2l 6, cr4, [r7, #344] @ 0x158 │ │ + ldc2l 2, cr9, [r7, #800] @ 0x320 │ │ │ │ 024ae930 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #24 │ │ ldr r2, [r2, #32] │ │ ldr r7, [r1, #16] │ │ @@ -1416887,26 +1416886,26 @@ │ │ bl 270da80 │ │ ldr r0, [pc, #60] @ 24aeb90 │ │ mov r1, #10 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r5 │ │ b 24aea10 │ │ - ldc2l 3, cr3, [r7, #596] @ 0x254 │ │ - ldc2l 0, cr7, [r6, #68] @ 0x44 │ │ - ldc2l 4, cr4, [r7, #900] @ 0x384 │ │ - ldc2l 4, cr4, [r8, #116] @ 0x74 │ │ - ldc2l 2, cr3, [r7, #900] @ 0x384 │ │ - ldc2l 2, cr3, [r7, #856] @ 0x358 │ │ - ldc2l 4, cr4, [r7, #180] @ 0xb4 │ │ - ldc2l 11, cr4, [r6, #476] @ 0x1dc @ │ │ - ldc2l 2, cr3, [r7, #404] @ 0x194 │ │ - ldc2l 2, cr13, [r7, #356] @ 0x164 │ │ - ldc2l 3, cr4, [r7, #708] @ 0x2c4 │ │ - ldc2l 5, cr0, [r9, #120] @ 0x78 │ │ + ldc2l 3, cr3, [r7, #776] @ 0x308 │ │ + ldc2l 0, cr7, [r6, #248] @ 0xf8 │ │ + ldc2l 5, cr4, [r7, #56] @ 0x38 │ │ + ldc2l 4, cr4, [r8, #296] @ 0x128 │ │ + ldc2l 3, cr3, [r7, #56] @ 0x38 │ │ + ldc2l 3, cr3, [r7, #12] │ │ + ldc2l 4, cr4, [r7, #360] @ 0x168 │ │ + ldc2l 11, cr4, [r6, #656] @ 0x290 @ │ │ + ldc2l 2, cr3, [r7, #584] @ 0x248 │ │ + ldc2l 2, cr13, [r7, #536] @ 0x218 │ │ + ldc2l 3, cr4, [r7, #888] @ 0x378 │ │ + ldc2l 5, cr0, [r9, #300] @ 0x12c │ │ │ │ 024aeb94 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ mov r9, r0 │ │ ldr r0, [r2, #32] │ │ @@ -1417179,29 +1417178,29 @@ │ │ clz r0, r0 │ │ ldr r8, [fp, #24] │ │ lsr r0, r0, #5 │ │ str r0, [r8] │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 15, cr11, [r9, #48] @ 0x30 │ │ - ldc2l 13, cr6, [r6, #324] @ 0x144 │ │ - ldc2l 2, cr4, [r7, #132] @ 0x84 │ │ - ldc2l 1, cr4, [r8, #372] @ 0x174 │ │ + ldc2l 15, cr11, [r9, #228] @ 0xe4 │ │ + ldc2l 13, cr6, [r6, #504] @ 0x1f8 │ │ + ldc2l 2, cr4, [r7, #312] @ 0x138 │ │ + ldc2l 1, cr4, [r8, #552] @ 0x228 │ │ eoreq fp, sl, r8, lsr r4 │ │ strdeq fp, [sl], -ip @ │ │ eoreq fp, sl, r4, lsr r3 │ │ - ldc2l 14, cr11, [r9, #400] @ 0x190 │ │ - ldc2l 0, cr3, [r7, #136] @ 0x88 │ │ - ldc2l 1, cr4, [r7, #484] @ 0x1e4 │ │ - vcadd.f32 q10, q11, , #270 │ │ - ldc2l 13, cr11, [r9, #832] @ 0x340 │ │ - ldc2l 15, cr12, [r7, #564] @ 0x234 │ │ - ldc2l 0, cr4, [r7, #916] @ 0x394 │ │ - ldc2l 2, cr0, [r9, #328] @ 0x148 │ │ + ldc2l 14, cr11, [r9, #580] @ 0x244 │ │ + ldc2l 0, cr3, [r7, #316] @ 0x13c │ │ + ldc2l 1, cr4, [r7, #664] @ 0x298 │ │ + ldc2l 8, cr4, [r6, #960] @ 0x3c0 │ │ + ldc2l 13, cr11, [r9, #1012] @ 0x3f4 │ │ + ldc2l 15, cr12, [r7, #744] @ 0x2e8 │ │ + ldc2l 1, cr4, [r7, #72] @ 0x48 │ │ + ldc2l 2, cr0, [r9, #508] @ 0x1fc │ │ │ │ 024af028 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #24 │ │ mov r4, r3 │ │ mov r3, r2 │ │ @@ -1417373,18 +1417372,18 @@ │ │ bl 270d9a0 │ │ mov r0, r5 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 9, cr0, [r7, #276] @ 0x114 @ │ │ - ldc2l 6, cr6, [r6, #864] @ 0x360 │ │ - ldc2l 12, cr3, [r7, #324] @ 0x144 │ │ - ldc2l 11, cr3, [r8, #372] @ 0x174 @ │ │ + ldc2l 9, cr0, [r7, #366] @ 0x16e @ │ │ + ldc2l 7, cr6, [r6, #20] │ │ + ldc2l 12, cr3, [r7, #504] @ 0x1f8 │ │ + ldc2l 11, cr3, [r8, #552] @ 0x228 @ │ │ strdeq fp, [sl], -ip @ │ │ │ │ 024af2f8 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #72 @ 0x48 │ │ ldr r5, [fp, #20] │ │ @@ -1417528,22 +1417527,22 @@ │ │ mov r1, r5 │ │ mov r2, #1 │ │ bl 270da80 │ │ ldr r0, [pc, #36] @ 24af564 │ │ mov r1, #14 │ │ add r0, pc, r0 │ │ b 24af424 │ │ - ldc2l 7, cr11, [r9, #948] @ 0x3b4 │ │ - ldc2l 1, cr2, [r9, #332] @ 0x14c │ │ - ldc2l 10, cr3, [r7, #980] @ 0x3d4 @ │ │ - ldc2l 2, cr2, [r7, #568] @ 0x238 │ │ - ldc2l 6, cr11, [r9, #820] @ 0x334 │ │ + ldc2l 8, cr11, [r9, #104] @ 0x68 │ │ + ldc2l 1, cr2, [r9, #512] @ 0x200 │ │ + ldc2l 11, cr3, [r7, #136] @ 0x88 @ │ │ + ldc2l 2, cr2, [r7, #748] @ 0x2ec │ │ + ldc2l 6, cr11, [r9, #1000] @ 0x3e8 │ │ ldc2l 3, cr15, [r9, #356] @ 0x164 │ │ - ldc2l 9, cr3, [r7, #434] @ 0x1b2 @ │ │ - ldc2l 6, cr8, [r7, #300] @ 0x12c │ │ + ldc2l 10, cr3, [r7, #24] @ │ │ + ldc2l 6, cr8, [r7, #480] @ 0x1e0 │ │ │ │ 024af568 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #24 │ │ mov r4, r0 │ │ ldr r0, [r2, #32] │ │ @@ -1417693,26 +1417692,26 @@ │ │ ldr r0, [pc, #64] @ 24af800 │ │ mov r1, #10 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ ldr r0, [pc, #36] @ 24af7f4 │ │ add r0, pc, r0 │ │ b 24af694 │ │ - ldc2l 5, cr6, [r7, #340] @ 0x154 │ │ - ldc2l 3, cr6, [r6, #80] @ 0x50 │ │ - vcadd.f32 d19, d23, d13, #270 │ │ - ldc2l 7, cr3, [r8, #612] @ 0x264 │ │ - ldc2l 4, cr6, [r7, #532] @ 0x214 │ │ - ldc2l 6, cr2, [r7, #344] @ 0x158 │ │ - ldc2l 7, cr3, [r7, #692] @ 0x2b4 │ │ - ldc2l 14, cr3, [r6, #988] @ 0x3dc │ │ - ldc2l 3, cr6, [r7, #596] @ 0x254 │ │ - ldc2l 5, cr12, [r7, #948] @ 0x3b4 │ │ - ldc2l 7, cr3, [r7, #276] @ 0x114 │ │ - ldc2l 8, cr15, [r8, #712] @ 0x2c8 │ │ + ldc2l 5, cr6, [r7, #520] @ 0x208 │ │ + ldc2l 3, cr6, [r6, #260] @ 0x104 │ │ + ldc2l 8, cr3, [r7, #744] @ 0x2e8 │ │ + ldc2l 7, cr3, [r8, #792] @ 0x318 │ │ + ldc2l 4, cr6, [r7, #712] @ 0x2c8 │ │ + ldc2l 6, cr2, [r7, #524] @ 0x20c │ │ + ldc2l 7, cr3, [r7, #872] @ 0x368 │ │ + ldc2l 15, cr3, [r6, #144] @ 0x90 │ │ + ldc2l 3, cr6, [r7, #776] @ 0x308 │ │ + ldc2l 6, cr12, [r7, #104] @ 0x68 │ │ + ldc2l 7, cr3, [r7, #456] @ 0x1c8 │ │ + ldc2l 8, cr15, [r8, #892] @ 0x37c │ │ │ │ 024af804 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #44 @ 0x2c │ │ mov r4, r0 │ │ ldr r0, [r2, #32] │ │ @@ -1417979,29 +1417978,29 @@ │ │ bgt 24afba8 │ │ bl 270db20 │ │ clz r0, r0 │ │ ldr r6, [fp, #24] │ │ lsr r0, r0, #5 │ │ str r0, [r6] │ │ b 24af91c │ │ - ldc2l 3, cr0, [r7, #124] @ 0x7c │ │ - ldc2l 1, cr6, [r6, #52] @ 0x34 │ │ - ldc2l 5, cr3, [r7, #884] @ 0x374 │ │ - ldc2l 5, cr3, [r8, #100] @ 0x64 │ │ + ldc2l 3, cr0, [r7, #304] @ 0x130 │ │ + ldc2l 1, cr6, [r6, #232] @ 0xe8 │ │ + ldc2l 6, cr3, [r7, #40] @ 0x28 │ │ + ldc2l 5, cr3, [r8, #280] @ 0x118 │ │ eoreq sl, sl, r4, ror #15 │ │ eoreq sl, sl, ip, lsr #15 │ │ ldrdeq sl, [sl], -ip @ │ │ - ldc2l 2, cr0, [r7, #284] @ 0x11c │ │ - ldc2l 3, cr2, [r7, #696] @ 0x2b8 │ │ - ldc2l 5, cr3, [r7, #20] │ │ - ldc2l 12, cr3, [r6, #316] @ 0x13c │ │ - ldc2l 1, cr0, [r7, #812] @ 0x32c │ │ - ldc2l 3, cr12, [r7, #196] @ 0xc4 │ │ - ldc2l 4, cr3, [r7, #548] @ 0x224 │ │ - ldc2l 5, cr15, [r8, #984] @ 0x3d8 │ │ + ldc2l 2, cr0, [r7, #464] @ 0x1d0 │ │ + ldc2l 3, cr2, [r7, #876] @ 0x36c │ │ + ldc2l 5, cr3, [r7, #200] @ 0xc8 │ │ + ldc2l 12, cr3, [r6, #496] @ 0x1f0 │ │ + ldc2l 1, cr0, [r7, #992] @ 0x3e0 │ │ + ldc2l 3, cr12, [r7, #376] @ 0x178 │ │ + ldc2l 4, cr3, [r7, #728] @ 0x2d8 │ │ + ldc2l 6, cr15, [r8, #140] @ 0x8c │ │ │ │ 024afc80 : │ │ push {r4, r5, r6, r7, r8, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #48 @ 0x30 │ │ mov r5, r3 │ │ ldr r3, [r2, #32] │ │ @@ -1418118,18 +1418117,18 @@ │ │ bl 270d9a0 │ │ mov r0, r5 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 9, cr13, [r8, #464] @ 0x1d0 @ │ │ - ldc2l 11, cr5, [r6, #336] @ 0x150 @ │ │ - ldc2l 0, cr3, [r7, #820] @ 0x334 │ │ - ldc2l 15, cr2, [r8, #868] @ 0x364 │ │ + ldc2l 10, cr13, [r8, #84] @ 0x54 @ │ │ + ldc2l 11, cr5, [r6, #516] @ 0x204 @ │ │ + ldc2l 0, cr3, [r7, #1000] @ 0x3e8 │ │ + ldc2l 0, cr3, [r8, #24] │ │ eoreq sl, sl, r0, lsl #11 │ │ │ │ 024afe7c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ sub r0, r0, #1 │ │ @@ -1418863,25 +1418862,25 @@ │ │ add r3, r3, r6 │ │ str r3, [sp, #8] │ │ add r2, r8, r2, lsl #2 │ │ add r3, r2, #4 │ │ add r2, sp, #8 │ │ bl 270d530 │ │ b 24b0448 │ │ - ldc2l 6, cr11, [r8, #220] @ 0xdc │ │ - ldc2l 3, cr10, [r9, #852] @ 0x354 │ │ + ldc2l 6, cr11, [r8, #400] @ 0x190 │ │ + ldc2l 4, cr10, [r9, #8] │ │ ldreq r7, [pc, #-3328]! @ 24afd14 │ │ ldreq r7, [pc, #-2868]! @ 24afee4 │ │ ldreq r7, [pc, #-2892]! @ 24afed0 │ │ ldreq r7, [pc, #-2800]! @ 24aff30 │ │ ldreq r7, [pc, #-2788]! @ 24aff40 │ │ ldreq r7, [pc, #-2804]! @ 24aff34 │ │ ldreq r7, [pc, #-2792]! @ 24aff44 │ │ - ldc2l 13, cr8, [r9, #904] @ 0x388 │ │ - ldc2l 6, cr13, [r8, #548] @ 0x224 │ │ + ldc2l 14, cr8, [r9, #60] @ 0x3c │ │ + ldc2l 6, cr13, [r8, #728] @ 0x2d8 │ │ ldreq r7, [pc, #-2712]! @ 24affa0 │ │ ldreq r7, [pc, #-2688]! @ 24affbc │ │ ldreq r7, [pc, #-1668]! @ 24b03bc │ │ ldreq r7, [pc, #-1704]! @ 24b039c │ │ ldreq r7, [pc, #-1672]! @ 24b03c0 │ │ ldreq r7, [pc, #-1732]! @ 24b0388 │ │ ldreq r7, [pc, #-1644]! @ 24b03e4 │ │ @@ -1418907,29 +1418906,29 @@ │ │ ldreq r7, [pc, #-1384]! @ 24b0538 │ │ ldreq r7, [pc, #-1372]! @ 24b0548 │ │ ldreq r7, [pc, #-1312]! @ 24b0588 │ │ ldreq r7, [pc, #-1352]! @ 24b0564 │ │ ldreq r7, [pc, #-1300]! @ 24b059c │ │ ldreq r7, [pc, #-3180]! @ 24afe48 │ │ ldreq r7, [pc, #-3204]! @ 24afe34 │ │ - ldc2l 10, cr9, [r6, #712] @ 0x2c8 @ │ │ - ldc2l 6, cr5, [r6, #92] @ 0x5c │ │ - ldc2l 10, cr2, [r7, #660] @ 0x294 @ │ │ - ldc2l 15, cr10, [r7, #500] @ 0x1f4 │ │ + ldc2l 10, cr9, [r6, #892] @ 0x37c @ │ │ + ldc2l 6, cr5, [r6, #272] @ 0x110 │ │ + ldc2l 10, cr2, [r7, #840] @ 0x348 @ │ │ + ldc2l 15, cr10, [r7, #680] @ 0x2a8 │ │ ldreq r7, [pc, #-3120]! @ 24afe9c │ │ - ldc2l 14, cr9, [r6, #872] @ 0x368 │ │ - ldc2l 3, cr3, [r8, #980] @ 0x3d4 │ │ - ldc2l 14, cr2, [r7, #484] @ 0x1e4 │ │ + ldc2l 15, cr9, [r6, #28] │ │ + ldc2l 4, cr3, [r8, #136] @ 0x88 │ │ + ldc2l 14, cr2, [r7, #664] @ 0x298 │ │ ldreq r7, [pc, #-2944]! @ 24aff5c │ │ ldreq r7, [pc, #-1900]! @ 24b0374 │ │ ldreq r7, [pc, #-1876]! @ 24b0390 │ │ ldreq r7, [pc, #-1888]! @ 24b0388 │ │ ldreq r7, [pc, #-1864]! @ 24b03a4 │ │ - ldc2l 3, cr13, [r8, #4] │ │ - ldc2l 10, cr8, [r9, #264] @ 0x108 @ │ │ + ldc2l 3, cr13, [r8, #184] @ 0xb8 │ │ + ldc2l 10, cr8, [r9, #444] @ 0x1bc @ │ │ ldreq r7, [pc, #-1788]! @ 24b03fc │ │ ldreq r7, [pc, #-1768]! @ 24b0414 │ │ ldreq r7, [pc, #-1200]! @ 24b0650 │ │ ldreq r7, [pc, #-1164]! @ 24b0678 │ │ ldreq r7, [pc, #-1132]! @ 24b069c │ │ ldreq r7, [pc, #-1128]! @ 24b06a4 │ │ ldreq r7, [pc, #-1140]! @ 24b069c │ │ @@ -1418938,58 +1418937,58 @@ │ │ ldreq r7, [pc, #-1088]! @ 24b06dc │ │ ldreq r7, [pc, #-1068]! @ 24b06f4 │ │ ldreq r7, [pc, #-1092]! @ 24b06e0 │ │ ldreq r7, [pc, #-1000]! @ 24b0740 │ │ ldreq r7, [pc, #-996]! @ 24b0748 │ │ ldreq r7, [pc, #-3068]! @ 24aff34 │ │ ldreq r7, [pc, #-3092]! @ 24aff20 │ │ - ldc2l 9, cr11, [r7, #316] @ 0x13c @ │ │ + ldc2l 9, cr11, [r7, #406] @ 0x196 @ │ │ ldc2l 5, cr14, [r9, #400] @ 0x190 │ │ ldreq r7, [pc, #-3008]! @ 24aff80 │ │ - ldc2l 13, cr11, [r7, #488] @ 0x1e8 │ │ - ldc2l 4, cr7, [r9, #608] @ 0x260 │ │ + ldc2l 13, cr11, [r7, #668] @ 0x29c │ │ + ldc2l 4, cr7, [r9, #788] @ 0x314 │ │ ldreq r7, [pc, #-1708]! @ 24b04a0 │ │ ldreq r7, [pc, #-3300]! @ 24afe6c │ │ - ldc2l 5, cr7, [r9, #1012] @ 0x3f4 │ │ - ldc2l 2, cr3, [r9, #76] @ 0x4c │ │ - ldc2l 15, cr2, [r7, #612] @ 0x264 │ │ + ldc2l 6, cr7, [r9, #168] @ 0xa8 │ │ + ldc2l 2, cr3, [r9, #256] @ 0x100 │ │ + ldc2l 15, cr2, [r7, #792] @ 0x318 │ │ ldreq r7, [pc, #-3212]! @ 24afed4 │ │ ldc2l 5, cr14, [r9, #904] @ 0x388 │ │ - ldc2l 14, cr6, [r9, #164] @ 0xa4 │ │ - ldc2l 1, cr15, [r7, #308] @ 0x134 │ │ + ldc2l 14, cr6, [r9, #344] @ 0x158 │ │ + ldc2l 1, cr15, [r7, #488] @ 0x1e8 │ │ ldreq r7, [pc, #-2368]! @ 24b0230 │ │ ldreq r7, [pc, #-2384]! @ 24b0224 │ │ - ldc2l 12, cr8, [r9, #376] @ 0x178 │ │ - ldc2l 4, cr13, [r8, #964] @ 0x3c4 │ │ + ldc2l 12, cr8, [r9, #556] @ 0x22c │ │ + ldc2l 5, cr13, [r8, #120] @ 0x78 │ │ ldreq r7, [pc, #-2300]! @ 24b0284 │ │ ldreq r7, [pc, #-976]! @ 24b07b4 │ │ ldreq r7, [pc, #-1000]! @ 24b07a0 │ │ - ldc2l 6, cr8, [r9, #904] @ 0x388 │ │ - ldc2l 15, cr12, [r8, #532] @ 0x214 │ │ + ldc2l 7, cr8, [r9, #60] @ 0x3c │ │ + ldc2l 15, cr12, [r8, #712] @ 0x2c8 │ │ ldreq r7, [pc, #-904]! @ 24b080c │ │ ldreq r7, [pc, #-656]! @ 24b0908 │ │ eoreq r9, sl, r4, lsl r9 │ │ ldreq r7, [pc, #-700]! @ 24b08e4 │ │ ldreq r7, [pc, #-2620]! @ 24b0168 │ │ - ldc2l 6, cr15, [r8, #200] @ 0xc8 │ │ - ldc2l 15, cr2, [r9, #428] @ 0x1ac │ │ - ldc2l 12, cr2, [r7, #964] @ 0x3c4 │ │ + ldc2l 6, cr15, [r8, #380] @ 0x17c │ │ + ldc2l 15, cr2, [r9, #608] @ 0x260 │ │ + ldc2l 13, cr2, [r7, #120] @ 0x78 │ │ ldreq r7, [pc, #-2532]! @ 24b01d0 │ │ ldc2l 3, cr14, [r9, #232] @ 0xe8 │ │ - ldc2l 0, cr15, [r8, #888] @ 0x378 │ │ - ldc2l 1, cr15, [r7, #148] @ 0x94 │ │ + ldc2l 1, cr15, [r8, #44] @ 0x2c │ │ + ldc2l 1, cr15, [r7, #328] @ 0x148 │ │ ldreq r7, [pc, #-2184]! @ 24b033c │ │ ldreq r7, [pc, #-2200]! @ 24b0330 │ │ - ldc2l 4, cr13, [r8, #324] @ 0x144 │ │ - ldc2l 11, cr8, [r9, #568] @ 0x238 @ │ │ + ldc2l 4, cr13, [r8, #504] @ 0x1f8 │ │ + ldc2l 11, cr8, [r9, #748] @ 0x2ec @ │ │ ldreq r7, [pc, #-2116]! @ 24b0390 │ │ ldreq r7, [pc, #-824]! @ 24b08a0 │ │ ldreq r7, [pc, #-844]! @ 24b0890 │ │ - ldc2l 15, cr12, [r8, #20] │ │ - ldc2l 6, cr8, [r9, #264] @ 0x108 │ │ + ldc2l 15, cr12, [r8, #200] @ 0xc8 │ │ + ldc2l 6, cr8, [r9, #444] @ 0x1bc │ │ ldreq r7, [pc, #-752]! @ 24b08f8 │ │ ldreq r7, [pc, #-548]! @ 24b09c8 │ │ eoreq r9, sl, r8, lsr #17 │ │ ldreq r7, [pc, #-592]! @ 24b09a4 │ │ eoreq sl, sl, r8, ror r0 │ │ ldreq r7, [pc, #-2536]! @ 24b0214 │ │ ldreq r7, [pc, #-2460]! @ 24b0264 │ │ @@ -1419014,16 +1419013,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #7 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 10, cr10, [r8, #524] @ 0x20c @ │ │ - vcadd.f32 d25, d9, d17, #270 │ │ + ldc2l 10, cr10, [r8, #704] @ 0x2c0 @ │ │ + vcadd.f32 , , q7, #270 │ │ │ │ 024b0c60 : │ │ ldr r1, [pc, #12] @ 24b0c74 │ │ ldr r1, [pc, r1] │ │ str r1, [r0] │ │ mov r0, #0 │ │ bx lr │ │ @@ -1419590,40 +1419589,40 @@ │ │ mov r3, #0 │ │ lsr r2, r1, #5 │ │ mov r1, #1 │ │ mov r7, r0 │ │ mov sl, r2 │ │ mov ip, r8 │ │ b 24b1034 │ │ - ldc2l 9, cr4, [r6, #82] @ 0x52 @ │ │ - ldc2l 5, cr8, [r8, #920] @ 0x398 │ │ - ldc2l 13, cr1, [r7, #500] @ 0x1f4 │ │ - ldc2l 12, cr1, [r8, #612] @ 0x264 │ │ - ldc2l 10, cr4, [r6, #708] @ 0x2c4 @ │ │ - ldc2l 15, cr7, [r9, #452] @ 0x1c4 │ │ - ldc2l 15, cr1, [r7, #20] │ │ - ldc2l 11, cr9, [r9, #604] @ 0x25c @ │ │ - ldc2l 6, cr4, [r6, #596] @ 0x254 │ │ - ldc2l 6, cr12, [r6, #64] @ 0x40 │ │ - ldc2l 10, cr1, [r7, #932] @ 0x3a4 @ │ │ - ldc2l 12, cr13, [r8, #472] @ 0x1d8 │ │ - ldc2l 5, cr4, [r6, #756] @ 0x2f4 │ │ - ldc2l 5, cr12, [r6, #224] @ 0xe0 │ │ - ldc2l 10, cr1, [r7, #68] @ 0x44 @ │ │ - ldc2l 11, cr13, [r8, #632] @ 0x278 @ │ │ - ldc2l 6, cr4, [r6, #740] @ 0x2e4 │ │ - ldc2l 1, cr4, [r8, #28] │ │ - ldc2l 14, cr13, [r8, #80] @ 0x50 │ │ - ldc2l 1, cr8, [r6, #196] @ 0xc4 │ │ - ldc2l 14, cr13, [r8, #496] @ 0x1f0 │ │ - ldc2l 1, cr8, [r6, #612] @ 0x264 │ │ - ldc2l 7, cr4, [r6, #708] @ 0x2c4 │ │ - ldc2l 9, cr6, [r7, #226] @ 0xe2 @ │ │ - ldc2l 12, cr1, [r7, #20] │ │ - ldc2l 6, cr12, [r6, #304] @ 0x130 │ │ + ldc2l 9, cr4, [r6, #172] @ 0xac @ │ │ + ldc2l 6, cr8, [r8, #76] @ 0x4c │ │ + ldc2l 13, cr1, [r7, #680] @ 0x2a8 │ │ + ldc2l 12, cr1, [r8, #792] @ 0x318 │ │ + ldc2l 10, cr4, [r6, #888] @ 0x378 @ │ │ + ldc2l 15, cr7, [r9, #632] @ 0x278 │ │ + ldc2l 15, cr1, [r7, #200] @ 0xc8 │ │ + ldc2l 11, cr9, [r9, #784] @ 0x310 @ │ │ + ldc2l 6, cr4, [r6, #776] @ 0x308 │ │ + ldc2l 6, cr12, [r6, #244] @ 0xf4 │ │ + ldc2l 11, cr1, [r7, #88] @ 0x58 @ │ │ + ldc2l 12, cr13, [r8, #652] @ 0x28c │ │ + ldc2l 5, cr4, [r6, #936] @ 0x3a8 │ │ + ldc2l 5, cr12, [r6, #404] @ 0x194 │ │ + ldc2l 10, cr1, [r7, #248] @ 0xf8 @ │ │ + ldc2l 11, cr13, [r8, #812] @ 0x32c @ │ │ + ldc2l 6, cr4, [r6, #920] @ 0x398 │ │ + ldc2l 1, cr4, [r8, #208] @ 0xd0 │ │ + ldc2l 14, cr13, [r8, #260] @ 0x104 │ │ + ldc2l 1, cr8, [r6, #376] @ 0x178 │ │ + ldc2l 14, cr13, [r8, #676] @ 0x2a4 │ │ + ldc2l 1, cr8, [r6, #792] @ 0x318 │ │ + ldc2l 7, cr4, [r6, #888] @ 0x378 │ │ + ldc2l 9, cr6, [r7, #316] @ 0x13c @ │ │ + ldc2l 12, cr1, [r7, #200] @ 0xc8 │ │ + ldc2l 6, cr12, [r6, #484] @ 0x1e4 │ │ │ │ 024b1580 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #16 │ │ add r3, sp, #4 │ │ mov r4, r2 │ │ @@ -1419705,18 +1419704,18 @@ │ │ bl 270d9a0 │ │ mov r0, r5 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 5, cr14, [r6, #496] @ 0x1f0 │ │ - ldc2l 14, cr3, [r8, #484] @ 0x1e4 │ │ - ldc2l 8, cr1, [r7, #196] @ 0xc4 │ │ - ldc2l 7, cr1, [r8, #436] @ 0x1b4 │ │ + ldc2l 5, cr14, [r6, #676] @ 0x2a4 │ │ + ldc2l 14, cr3, [r8, #664] @ 0x298 │ │ + ldc2l 8, cr1, [r7, #376] @ 0x178 │ │ + ldc2l 7, cr1, [r8, #616] @ 0x268 │ │ eoreq r8, sl, r0, lsl #25 │ │ │ │ 024b16e8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #36 @ 0x24 │ │ mov r6, r3 │ │ @@ -1419865,26 +1419864,26 @@ │ │ ldr r0, [pc, #64] @ 24b1978 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - vcadd.f32 d23, d9, d18, #270 │ │ - ldc2l 9, cr11, [r6, #428] @ 0x1ac @ │ │ + vcadd.f32 , , , #270 │ │ + ldc2l 10, cr11, [r6, #12] @ │ │ ldc2l 7, cr11, [r9, #52] @ 0x34 │ │ - ldc2l 5, cr1, [r7, #756] @ 0x2f4 │ │ - ldc2l 6, cr1, [r8, #648] @ 0x288 │ │ + ldc2l 5, cr1, [r7, #936] @ 0x3a8 │ │ + ldc2l 6, cr1, [r8, #828] @ 0x33c │ │ ldrdeq r8, [sl], -ip @ │ │ ldrdeq r8, [sl], -r0 @ │ │ - ldc2l 6, cr5, [r6, #12] │ │ + ldc2l 6, cr5, [r6, #192] @ 0xc0 │ │ eoreq r8, sl, r0, asr #20 │ │ eoreq r8, sl, ip, lsr #20 │ │ - ldc2l 5, cr5, [r6, #332] @ 0x14c │ │ - ldc2l 6, cr7, [r9, #8] │ │ + ldc2l 5, cr5, [r6, #512] @ 0x200 │ │ + ldc2l 6, cr7, [r9, #188] @ 0xbc │ │ │ │ 024b197c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #24 │ │ ldr r6, [r2, #32] │ │ mov r4, #0 │ │ @@ -1419946,18 +1419945,18 @@ │ │ bl 270d530 │ │ ldr r4, [sp, #20] │ │ b 24b1a7c │ │ mov r4, #1 │ │ mov r0, r4 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 13, cr11, [r7, #908] @ 0x38c │ │ - ldc2l 0, cr4, [r6, #52] @ 0x34 │ │ - ldc2l 4, cr1, [r7, #884] @ 0x374 │ │ - ldc2l 4, cr1, [r8, #100] @ 0x64 │ │ + ldc2l 14, cr11, [r7, #64] @ 0x40 │ │ + ldc2l 0, cr4, [r6, #232] @ 0xe8 │ │ + ldc2l 5, cr1, [r7, #40] @ 0x28 │ │ + ldc2l 4, cr1, [r8, #280] @ 0x118 │ │ │ │ 024b1a98 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #32 │ │ ldr r5, [r2, #32] │ │ ldr r4, [r1, #20] │ │ @@ -1420021,18 +1420020,18 @@ │ │ bl 270dd20 │ │ mov r1, r0 │ │ b 24b1ba0 │ │ mov r1, #1 │ │ mov r0, r1 │ │ sub sp, fp, #8 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 1, cr2, [r7, #412] @ 0x19c │ │ - ldc2l 14, cr3, [r6, #996] @ 0x3e4 │ │ - ldc2l 3, cr1, [r7, #804] @ 0x324 │ │ - ldc2l 3, cr1, [r8, #20] │ │ + ldc2l 1, cr2, [r7, #592] @ 0x250 │ │ + ldc2l 15, cr3, [r6, #152] @ 0x98 │ │ + ldc2l 3, cr1, [r7, #984] @ 0x3d8 │ │ + ldc2l 3, cr1, [r8, #200] @ 0xc8 │ │ │ │ 024b1bbc : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #24 │ │ ldr r6, [r2, #32] │ │ mov r4, #0 │ │ @@ -1420093,18 +1420092,18 @@ │ │ bl 270fc70 │ │ ldr r4, [sp, #20] │ │ b 24b1cb8 │ │ mov r4, #1 │ │ mov r0, r4 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 1, cr10, [r7, #668] @ 0x29c │ │ - ldc2l 13, cr3, [r6, #820] @ 0x334 │ │ - ldc2l 2, cr1, [r7, #628] @ 0x274 │ │ - ldc2l 1, cr1, [r8, #868] @ 0x364 │ │ + ldc2l 1, cr10, [r7, #848] @ 0x350 │ │ + ldc2l 13, cr3, [r6, #1000] @ 0x3e8 │ │ + ldc2l 2, cr1, [r7, #808] @ 0x328 │ │ + ldc2l 2, cr1, [r8, #24] │ │ │ │ 024b1cd4 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #8 │ │ mov r1, r0 │ │ ldr r0, [pc, #20] @ 24b1d00 │ │ @@ -1420682,28 +1420681,28 @@ │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrbeq pc, [r7, #1320] @ 0x528 @ │ │ ldrbeq pc, [r7, #2392] @ 0x958 @ │ │ ldrbeq pc, [r7, #2177] @ 0x881 @ │ │ - ldc2l 2, cr11, [r6, #696] @ 0x2b8 │ │ + ldc2l 2, cr11, [r6, #876] @ 0x36c │ │ ldrbeq pc, [r7, #2112] @ 0x840 @ │ │ ldrbeq pc, [r7, #2148] @ 0x864 @ │ │ ldrbeq pc, [r7, #940] @ 0x3ac @ │ │ ldrbeq pc, [r7, #1988] @ 0x7c4 @ │ │ ldrbeq pc, [r7, #2008] @ 0x7d8 @ │ │ - ldc2l 14, cr15, [r6, #168] @ 0xa8 │ │ - ldc2l 11, cr3, [r7, #840] @ 0x348 @ │ │ - ldc2l 15, cr0, [r7, #84] @ 0x54 │ │ + ldc2l 14, cr15, [r6, #348] @ 0x15c │ │ + ldc2l 11, cr3, [r7, #1020] @ 0x3fc @ │ │ + ldc2l 15, cr0, [r7, #264] @ 0x108 │ │ ldrbeq pc, [r7, #1804] @ 0x70c @ │ │ - ldc2l 15, cr0, [r8, #856] @ 0x358 │ │ + ldc2l 0, cr1, [r8, #12] │ │ ldrbeq pc, [r7, #2308] @ 0x904 @ │ │ ldrbeq pc, [r7, #2085] @ 0x825 @ │ │ - ldc2l 2, cr11, [r6, #328] @ 0x148 │ │ + ldc2l 2, cr11, [r6, #508] @ 0x1fc │ │ ldrbeq pc, [r7, #2068] @ 0x814 @ │ │ ldrbeq pc, [r7, #2312] @ 0x908 @ │ │ ldrbeq pc, [r7, #2340] @ 0x924 @ │ │ ldrbeq pc, [r7, #2248] @ 0x8c8 @ │ │ ldrbeq pc, [r7, #2216] @ 0x8a8 @ │ │ ldrbeq pc, [r7, #2220] @ 0x8ac @ │ │ ldrbeq pc, [r7, #2208] @ 0x8a0 @ │ │ @@ -1420712,82 +1420711,82 @@ │ │ ldrbeq pc, [r7, #636] @ 0x27c @ │ │ ldrbeq pc, [r7, #580] @ 0x244 @ │ │ ldrbeq pc, [r7, #584] @ 0x248 @ │ │ ldrbeq pc, [r7, #560] @ 0x230 @ │ │ ldrbeq pc, [r7, #516] @ 0x204 @ │ │ ldrbeq pc, [r7, #496] @ 0x1f0 @ │ │ ldrbeq pc, [r7, #484] @ 0x1e4 @ │ │ - vcadd.f32 , , q2, #270 │ │ - ldc2l 2, cr7, [r8, #512] @ 0x200 │ │ + ldc2l 8, cr9, [r7, #964] @ 0x3c4 │ │ + ldc2l 2, cr7, [r8, #692] @ 0x2b4 │ │ ldrbeq lr, [r7, #3464] @ 0xd88 │ │ ldrbeq pc, [r7, #384] @ 0x180 @ │ │ ldrbeq pc, [r7, #372] @ 0x174 @ │ │ ldrbeq lr, [r7, #3424] @ 0xd60 │ │ ldrbeq pc, [r7, #1900] @ 0x76c @ │ │ - ldc2l 14, cr9, [r7, #288] @ 0x120 │ │ - vcadd.f32 d23, d8, d4, #270 │ │ + ldc2l 14, cr9, [r7, #468] @ 0x1d4 │ │ + ldc2l 8, cr7, [r8, #196] @ 0xc4 │ │ ldrbeq pc, [r7, #1736] @ 0x6c8 @ │ │ ldrbeq pc, [r7, #1664] @ 0x680 @ │ │ - ldc2l 13, cr9, [r7, #336] @ 0x150 │ │ - ldc2l 7, cr7, [r8, #64] @ 0x40 │ │ + ldc2l 13, cr9, [r7, #516] @ 0x204 │ │ + ldc2l 7, cr7, [r8, #244] @ 0xf4 │ │ ldrbeq pc, [r7, #1576] @ 0x628 @ │ │ ldrbeq pc, [r7, #1544] @ 0x608 @ │ │ ldrbeq pc, [r7, #1532] @ 0x5fc @ │ │ ldrbeq pc, [r7, #1532] @ 0x5fc @ │ │ ldrbeq pc, [r7, #1512] @ 0x5e8 @ │ │ ldrbeq pc, [r7, #1468] @ 0x5bc @ │ │ ldrbeq pc, [r7, #416] @ 0x1a0 @ │ │ ldrbeq pc, [r7, #1448] @ 0x5a8 @ │ │ ldrbeq pc, [r7, #1444] @ 0x5a4 @ │ │ ldrbeq pc, [r7, #1436] @ 0x59c @ │ │ ldrbeq pc, [r7, #1436] @ 0x59c @ │ │ ldrbeq pc, [r7, #1400] @ 0x578 @ │ │ - ldc2l 12, cr9, [r7, #368] @ 0x170 │ │ - ldc2l 6, cr7, [r8, #96] @ 0x60 │ │ + ldc2l 12, cr9, [r7, #548] @ 0x224 │ │ + ldc2l 6, cr7, [r8, #276] @ 0x114 │ │ ldrbeq pc, [r7, #1384] @ 0x568 @ │ │ ldrbeq pc, [r7, #1344] @ 0x540 @ │ │ ldrbeq pc, [r7, #1332] @ 0x534 @ │ │ ldrbeq pc, [r7, #1312] @ 0x520 @ │ │ ldrbeq pc, [r7, #1312] @ 0x520 @ │ │ ldrbeq pc, [r7, #1252] @ 0x4e4 @ │ │ - vcadd.f32 , q3, q13, #270 │ │ - ldc2l 4, cr11, [r6, #636] @ 0x27c │ │ + ldc2l 8, cr15, [r6, #604] @ 0x25c │ │ + ldc2l 4, cr11, [r6, #816] @ 0x330 │ │ ldrbeq pc, [r7, #1184] @ 0x4a0 @ │ │ - ldc2l 11, cr9, [r7, #512] @ 0x200 @ │ │ - ldc2l 5, cr7, [r8, #240] @ 0xf0 │ │ + ldc2l 11, cr9, [r7, #692] @ 0x2b4 @ │ │ + ldc2l 5, cr7, [r8, #420] @ 0x1a4 │ │ ldrbeq pc, [r7, #1152] @ 0x480 @ │ │ ldrbeq pc, [r7, #1136] @ 0x470 @ │ │ ldrbeq pc, [r7, #1100] @ 0x44c @ │ │ ldrbeq pc, [r7, #1072] @ 0x430 @ │ │ ldrbeq pc, [r7, #1064] @ 0x428 @ │ │ - ldc2l 11, cr9, [r7] @ │ │ - ldc2l 4, cr7, [r8, #752] @ 0x2f0 │ │ + ldc2l 11, cr9, [r7, #180] @ 0xb4 @ │ │ + ldc2l 4, cr7, [r8, #932] @ 0x3a4 │ │ ldrbeq pc, [r7, #952] @ 0x3b8 @ │ │ ldrbeq pc, [r7, #964] @ 0x3c4 @ │ │ ldrbeq pc, [r7, #928] @ 0x3a0 @ │ │ ldrbeq pc, [r7, #924] @ 0x39c @ │ │ ldrbeq pc, [r7, #900] @ 0x384 @ │ │ ldrbeq pc, [r7, #868] @ 0x364 @ │ │ ldrbeq lr, [r7, #3912] @ 0xf48 │ │ ldrbeq pc, [r7, #844] @ 0x34c @ │ │ ldrbeq lr, [r7, #3892] @ 0xf34 │ │ ldrbeq pc, [r7, #828] @ 0x33c @ │ │ ldrbeq pc, [r7, #844] @ 0x34c @ │ │ ldrbeq pc, [r7, #816] @ 0x330 @ │ │ ldrbeq pc, [r7, #800] @ 0x320 @ │ │ - ldc2l 10, cr9, [r7, #16] @ │ │ - ldc2l 3, cr7, [r8, #768] @ 0x300 │ │ + ldc2l 10, cr9, [r7, #196] @ 0xc4 @ │ │ + ldc2l 3, cr7, [r8, #948] @ 0x3b4 │ │ ldrbeq pc, [r7, #784] @ 0x310 @ │ │ ldrbeq pc, [r7, #732] @ 0x2dc @ │ │ ldrbeq pc, [r7, #712] @ 0x2c8 @ │ │ - ldc2l 9, cr15, [r6, #324] @ 0x144 @ │ │ - ldc2l 7, cr13, [r6, #820] @ 0x334 │ │ - ldc2l 9, cr0, [r7, #170] @ 0xaa @ │ │ + ldc2l 9, cr15, [r6, #414] @ 0x19e @ │ │ + ldc2l 7, cr13, [r6, #1000] @ 0x3e8 │ │ + ldc2l 9, cr0, [r7, #260] @ 0x104 @ │ │ ldrbeq pc, [r7, #332] @ 0x14c @ │ │ - ldc2l 10, cr12, [r8, #760] @ 0x2f8 @ │ │ + ldc2l 10, cr12, [r8, #940] @ 0x3ac @ │ │ │ │ 024b2768 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ mov r4, r2 │ │ mov r5, r1 │ │ @@ -1421353,66 +1421352,66 @@ │ │ ldr r0, [pc, #224] @ 24b3110 │ │ add r0, pc, r0 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 11, cr2, [r8, #964] @ 0x3c4 @ │ │ - ldc2l 11, cr7, [r9, #116] @ 0x74 @ │ │ - ldc2l 12, cr4, [r9, #248] @ 0xf8 │ │ - ldc2l 12, cr14, [r8, #504] @ 0x1f8 │ │ - ldc2l 5, cr0, [r7, #788] @ 0x314 │ │ + ldc2l 12, cr2, [r8, #120] @ 0x78 │ │ + ldc2l 11, cr7, [r9, #296] @ 0x128 @ │ │ + ldc2l 12, cr4, [r9, #428] @ 0x1ac │ │ + ldc2l 12, cr14, [r8, #684] @ 0x2ac │ │ + ldc2l 5, cr0, [r7, #968] @ 0x3c8 │ │ mlaeq sl, r4, r9, r7 │ │ ldrbeq pc, [r7, #1432] @ 0x598 @ │ │ ldrbeq lr, [r7, #3876] @ 0xf24 │ │ ldrbeq pc, [r7, #1388] @ 0x56c @ │ │ ldrbeq lr, [r7, #3848] @ 0xf08 │ │ - ldc2l 11, cr8, [r8, #716] @ 0x2cc @ │ │ + ldc2l 11, cr8, [r8, #896] @ 0x380 @ │ │ ldc2l 14, cr11, [r9, #720] @ 0x2d0 │ │ - ldc2l 10, cr10, [r8, #88] @ 0x58 @ │ │ - ldc2l 0, cr0, [r7, #1012] @ 0x3f4 │ │ + ldc2l 10, cr10, [r8, #268] @ 0x10c @ │ │ + ldc2l 1, cr0, [r7, #168] @ 0xa8 │ │ ldrbeq lr, [r7, #3120] @ 0xc30 │ │ ldrbeq lr, [r7, #3100] @ 0xc1c │ │ ldrbeq pc, [r7, #604] @ 0x25c @ │ │ - ldc2l 7, cr2, [r8, #104] @ 0x68 │ │ + ldc2l 7, cr2, [r8, #284] @ 0x11c │ │ ldrbeq lr, [r7, #3796] @ 0xed4 │ │ ldrbeq pc, [r7, #1324] @ 0x52c @ │ │ ldrbeq lr, [r7, #3768] @ 0xeb8 │ │ ldrbeq pc, [r7, #1224] @ 0x4c8 @ │ │ ldrbeq lr, [r7, #3704] @ 0xe78 │ │ ldrbeq lr, [r7, #3680] @ 0xe60 │ │ - ldc2l 1, cr15, [r6, #1020] @ 0x3fc │ │ - ldc2l 2, cr0, [r7, #980] @ 0x3d4 │ │ + ldc2l 2, cr15, [r6, #176] @ 0xb0 │ │ + ldc2l 3, cr0, [r7, #136] @ 0x88 │ │ ldrbeq lr, [r7, #3632] @ 0xe30 │ │ eoreq r7, sl, r8, asr #13 │ │ ldrbeq lr, [r7, #3580] @ 0xdfc │ │ ldrbeq lr, [r7, #3568] @ 0xdf0 │ │ ldrbeq lr, [r7, #3536] @ 0xdd0 │ │ ldrbeq lr, [r7, #3524] @ 0xdc4 │ │ - ldc2l 5, cr4, [r9, #796] @ 0x31c │ │ - ldc2l 15, cr15, [r6, #404] @ 0x194 │ │ + ldc2l 5, cr4, [r9, #976] @ 0x3d0 │ │ + ldc2l 15, cr15, [r6, #584] @ 0x248 │ │ ldrbeq lr, [r7, #2712] @ 0xa98 │ │ ldrbeq lr, [r7, #2692] @ 0xa84 │ │ ldrbeq lr, [r7, #2684] @ 0xa7c │ │ ldrbeq lr, [r7, #3504] @ 0xdb0 │ │ ldrbeq lr, [r7, #3488] @ 0xda0 │ │ eoreq r7, sl, r4, lsr r6 │ │ ldrbeq pc, [r7, #176] @ 0xb0 @ │ │ ldrbeq lr, [r7, #3428] @ 0xd64 │ │ ldrbeq lr, [r7, #3412] @ 0xd54 │ │ ldrbeq lr, [r7, #3288] @ 0xcd8 │ │ ldrbeq pc, [r7, #804] @ 0x324 @ │ │ - ldc2l 1, cr0, [r9, #764] @ 0x2fc │ │ - ldc2l 15, cr15, [r6, #100] @ 0x64 │ │ + ldc2l 1, cr0, [r9, #944] @ 0x3b0 │ │ + ldc2l 15, cr15, [r6, #280] @ 0x118 │ │ ldrbeq lr, [r7, #2636] @ 0xa4c │ │ ldrbeq lr, [r7, #2624] @ 0xa40 │ │ ldrbeq pc, [r7, #80] @ 0x50 @ │ │ - ldc2l 3, cr8, [r7, #580] @ 0x244 │ │ - ldc2l 4, cr4, [r9, #872] @ 0x368 │ │ + ldc2l 3, cr8, [r7, #760] @ 0x2f8 │ │ + ldc2l 5, cr4, [r9, #28] │ │ ldrbeq lr, [r7, #3248] @ 0xcb0 │ │ ldc2l 10, cr13, [r9, #320] @ 0x140 @ │ │ ldc2l 12, cr11, [r9, #272] @ 0x110 │ │ ldrbeq lr, [r7, #3188] @ 0xc74 │ │ ldrbeq lr, [r7, #3184] @ 0xc70 │ │ ldc2l 11, cr13, [r9, #16] @ │ │ ldc2l 12, cr11, [r9, #992] @ 0x3e0 │ │ @@ -1421422,49 +1421421,49 @@ │ │ ldc2l 9, cr13, [r9, #288] @ 0x120 @ │ │ ldc2l 11, cr11, [r9, #528] @ 0x210 @ │ │ ldrbeq pc, [r7, #516] @ 0x204 @ │ │ ldrbeq lr, [r7, #2988] @ 0xbac │ │ ldrbeq lr, [r7, #2952] @ 0xb88 │ │ ldrbeq pc, [r7, #384] @ 0x180 @ │ │ ldrbeq pc, [r7, #372] @ 0x174 @ │ │ - ldc2l 11, cr7, [r9, #804] @ 0x324 @ │ │ - ldc2l 14, cr15, [r6, #900] @ 0x384 │ │ + ldc2l 11, cr7, [r9, #984] @ 0x3d8 @ │ │ + ldc2l 15, cr15, [r6, #56] @ 0x38 │ │ ldrbeq lr, [r7, #2580] @ 0xa14 │ │ ldrbeq pc, [r7, #104] @ 0x68 @ │ │ ldrbeq lr, [r7, #2824] @ 0xb08 │ │ ldrbeq pc, [r7, #328] @ 0x148 @ │ │ ldrbeq lr, [r7, #2800] @ 0xaf0 │ │ - ldc2l 14, cr13, [r8, #956] @ 0x3bc │ │ + ldc2l 15, cr13, [r8, #112] @ 0x70 │ │ ldc2l 10, cr11, [r9, #576] @ 0x240 @ │ │ ldrbeq lr, [r7, #2752] @ 0xac0 │ │ ldrbeq lr, [r7, #2096] @ 0x830 │ │ ldrbeq lr, [r7, #2880] @ 0xb40 │ │ ldrbeq pc, [r7, #460] @ 0x1cc @ │ │ - ldc2l 6, cr4, [r9, #488] @ 0x1e8 │ │ + ldc2l 6, cr4, [r9, #668] @ 0x29c │ │ ldrbeq pc, [r7, #2036] @ 0x7f4 @ │ │ - ldc2l 3, cr7, [r7, #52] @ 0x34 │ │ - ldc2l 4, cr9, [r7, #292] @ 0x124 │ │ - ldc2l 5, cr0, [r7, #276] @ 0x114 │ │ + ldc2l 3, cr7, [r7, #232] @ 0xe8 │ │ + ldc2l 4, cr9, [r7, #472] @ 0x1d8 │ │ + ldc2l 5, cr0, [r7, #456] @ 0x1c8 │ │ ldrbeq pc, [r7, #1724] @ 0x6bc @ │ │ - ldc2l 4, cr0, [r8, #500] @ 0x1f4 │ │ + ldc2l 4, cr0, [r8, #680] @ 0x2a8 │ │ ldrbeq pc, [r7, #2012] @ 0x7dc @ │ │ ldrbeq pc, [r7, #1192] @ 0x4a8 @ │ │ ldrbeq pc, [r7, #1984] @ 0x7c0 @ │ │ ldc2l 14, cr13, [r9] │ │ ldc2l 15, cr11, [r9, #976] @ 0x3d0 │ │ ldrbeq pc, [r7, #1660] @ 0x67c @ │ │ ldrbeq pc, [r7, #1616] @ 0x650 @ │ │ ldrbeq pc, [r7, #8] @ │ │ - ldc2l 3, cr14, [r8, #1004] @ 0x3ec │ │ + ldc2l 4, cr14, [r8, #160] @ 0xa0 │ │ ldc2l 15, cr11, [r9, #624] @ 0x270 │ │ ldrbeq pc, [r7, #1560] @ 0x618 @ │ │ ldrbeq lr, [r7, #3236] @ 0xca4 │ │ ldrbeq lr, [r7, #4020] @ 0xfb4 │ │ ldrbeq pc, [r7, #1500] @ 0x5dc @ │ │ - ldc2l 12, cr8, [r8, #140] @ 0x8c │ │ + ldc2l 12, cr8, [r8, #320] @ 0x140 │ │ ldc2l 15, cr11, [r9, #144] @ 0x90 │ │ ldrbeq lr, [r7, #3936] @ 0xf60 │ │ │ │ 024b31ec : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ @@ -1421482,16 +1421481,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 3, cr2, [r8, #52] @ 0x34 │ │ - ldc2l 2, cr7, [r9, #228] @ 0xe4 │ │ + ldc2l 3, cr2, [r8, #232] @ 0xe8 │ │ + ldc2l 2, cr7, [r9, #408] @ 0x198 │ │ │ │ 024b3248 : │ │ push {fp, lr} │ │ mov fp, sp │ │ sub sp, sp, #8 │ │ mov r2, r1 │ │ mov r1, r0 │ │ @@ -1421792,21 +1421791,21 @@ │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ eoreq r6, sl, r8, lsl #29 │ │ eoreq r6, sl, r0, ror lr │ │ strdeq r6, [sl], -r0 @ │ │ ldrdeq r6, [sl], -r8 @ │ │ ldc2l 2, cr13, [r9, #220] @ 0xdc │ │ - ldc2l 15, cr1, [r8, #592] @ 0x250 │ │ - ldc2l 9, cr15, [r6, #18] @ │ │ - ldc2l 10, cr11, [r8, #408] @ 0x198 @ │ │ + ldc2l 15, cr1, [r8, #772] @ 0x304 │ │ + ldc2l 9, cr15, [r6, #108] @ 0x6c @ │ │ + ldc2l 10, cr11, [r8, #588] @ 0x24c @ │ │ ldc2l 1, cr13, [r9, #220] @ 0xdc │ │ - ldc2l 15, cr7, [r8, #832] @ 0x340 │ │ - vcadd.f32 d31, d6, d9, #270 │ │ - ldc2l 2, cr10, [r6, #400] @ 0x190 │ │ + ldc2l 15, cr7, [r8, #1012] @ 0x3f4 │ │ + ldc2l 8, cr15, [r6, #216] @ 0xd8 │ │ + ldc2l 2, cr10, [r6, #580] @ 0x244 │ │ │ │ 024b371c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #412 @ 0x19c │ │ sub sp, sp, #2048 @ 0x800 │ │ str r0, [sp, #68] @ 0x44 │ │ @@ -1422183,30 +1422182,30 @@ │ │ ldr r0, [pc, #32] @ 24b3d20 │ │ mov r1, #19 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 24b3bcc │ │ strhteq r6, [sl], -r8 │ │ eoreq r6, sl, r0, ror #20 │ │ - ldc2l 0, cr6, [r7, #280] @ 0x118 │ │ - ldc2l 0, cr6, [r7, #252] @ 0xfc │ │ - ldc2l 2, cr15, [r6, #484] @ 0x1e4 │ │ - ldc2l 1, cr15, [r7, #132] @ 0x84 │ │ - ldc2l 5, cr11, [r8, #48] @ 0x30 │ │ - vcadd.f32 d21, d6, d29, #270 │ │ - ldc2l 15, cr5, [r7, #840] @ 0x348 │ │ - ldc2l 15, cr5, [r7, #812] @ 0x32c │ │ - ldc2l 2, cr15, [r6, #20] │ │ - ldc2l 6, cr11, [r8, #368] @ 0x170 │ │ - ldc2l 9, cr5, [r6, #250] @ 0xfa @ │ │ - ldc2l 0, cr6, [r7, #904] @ 0x388 │ │ - ldc2l 10, cr7, [r8, #880] @ 0x370 @ │ │ - ldc2l 3, cr15, [r6, #84] @ 0x54 │ │ - ldc2l 13, cr9, [r6, #448] @ 0x1c0 │ │ - ldc2l 0, cr6, [r7, #600] @ 0x258 │ │ + ldc2l 0, cr6, [r7, #460] @ 0x1cc │ │ + ldc2l 0, cr6, [r7, #432] @ 0x1b0 │ │ + ldc2l 2, cr15, [r6, #664] @ 0x298 │ │ + ldc2l 1, cr15, [r7, #312] @ 0x138 │ │ + ldc2l 5, cr11, [r8, #228] @ 0xe4 │ │ + ldc2l 8, cr5, [r6, #360] @ 0x168 │ │ + ldc2l 15, cr5, [r7, #1020] @ 0x3fc │ │ + ldc2l 15, cr5, [r7, #992] @ 0x3e0 │ │ + ldc2l 2, cr15, [r6, #200] @ 0xc8 │ │ + ldc2l 6, cr11, [r8, #548] @ 0x224 │ │ + ldc2l 9, cr5, [r6, #340] @ 0x154 @ │ │ + ldc2l 1, cr6, [r7, #60] @ 0x3c │ │ + ldc2l 11, cr7, [r8, #36] @ 0x24 @ │ │ + ldc2l 3, cr15, [r6, #264] @ 0x108 │ │ + ldc2l 13, cr9, [r6, #628] @ 0x274 │ │ + ldc2l 0, cr6, [r7, #780] @ 0x30c │ │ │ │ 024b3d54 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #300 @ 0x12c │ │ mov r6, r0 │ │ ldr r0, [r0] │ │ @@ -1422531,18 +1422530,18 @@ │ │ ldr r1, [fp, #-64] @ 0xffffffc0 │ │ add r0, r0, r1 │ │ str r0, [r7] │ │ bne 24b423c │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 6, cr15, [r7, #440] @ 0x1b8 │ │ - ldc2l 9, cr7, [r8, #82] @ 0x52 @ │ │ - ldc2l 1, cr15, [r6, #116] @ 0x74 │ │ - ldc2l 5, cr7, [r7, #1012] @ 0x3f4 │ │ + ldc2l 6, cr15, [r7, #620] @ 0x26c │ │ + ldc2l 9, cr7, [r8, #172] @ 0xac @ │ │ + ldc2l 1, cr15, [r6, #296] @ 0x128 │ │ + ldc2l 6, cr7, [r7, #168] @ 0xa8 │ │ ldrbeq sp, [r7, #4008] @ 0xfa8 │ │ │ │ 024b4290 : │ │ push {fp, lr} │ │ mov fp, sp │ │ ldr lr, [r2] │ │ mov r3, r0 │ │ @@ -1422606,15 +1422605,15 @@ │ │ bl 270f740 │ │ mov r0, r5 │ │ mov r1, #8 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 11, cr5, [r6, #620] @ 0x26c @ │ │ + ldc2l 11, cr5, [r6, #800] @ 0x320 @ │ │ eoreq r5, sl, r8, ror pc │ │ eoreq r5, sl, ip, ror #30 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 024b43a8 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ @@ -1422734,15 +1422733,15 @@ │ │ 024b4568 : │ │ ldr r1, [pc, #16] @ 24b4580 │ │ ldrb r2, [r0] │ │ add r1, pc, r1 │ │ cmp r2, #0 │ │ moveq r0, r1 │ │ bx lr │ │ - ldc2l 8, cr2, [r6, #620] @ 0x26c │ │ + vcadd.f32 q9, q11, q4, #270 │ │ │ │ 024b4584 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ mov r8, r2 │ │ mov r9, r1 │ │ mov r5, r0 │ │ @@ -1422835,16 +1422834,16 @@ │ │ bl 270cde0 │ │ ldr r0, [pc, #24] @ 24b4704 │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r4 │ │ pop {r4, r5, r6, r7, r8, sl, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 7, cr7, [r7, #80] @ 0x50 │ │ - ldc2l 5, cr11, [r6, #600] @ 0x258 │ │ + ldc2l 7, cr7, [r7, #260] @ 0x104 │ │ + ldc2l 5, cr11, [r6, #780] @ 0x30c │ │ ldc2l 9, cr8, [r9, #122] @ 0x7a @ │ │ │ │ 024b4708 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r8, r3 │ │ @@ -1422962,17 +1422961,17 @@ │ │ bl 270cef0 │ │ ldr r0, [pc, #28] @ 24b48f4 │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r5 │ │ pop {r4, r5, r6, r7, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 12, cr0, [r8, #988] @ 0x3dc │ │ - ldc2l 2, cr1, [r7, #900] @ 0x384 │ │ - ldc2l 5, cr14, [r6, #996] @ 0x3e4 │ │ + ldc2l 13, cr0, [r8, #144] @ 0x90 │ │ + ldc2l 3, cr1, [r7, #56] @ 0x38 │ │ + ldc2l 6, cr14, [r6, #152] @ 0x98 │ │ ldc2l 7, cr8, [r9, #324] @ 0x144 │ │ │ │ 024b48f8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ ldr r4, [fp, #12] │ │ @@ -1423098,21 +1423097,21 @@ │ │ ldr r4, [sp, #16] │ │ ldr r7, [sp, #12] │ │ str sl, [r7] │ │ str r0, [r4] │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldc2l 6, cr8, [r9, #116] @ 0x74 │ │ - ldc2l 1, cr1, [r7, #420] @ 0x1a4 │ │ - ldc2l 4, cr14, [r6, #516] @ 0x204 │ │ + ldc2l 1, cr1, [r7, #600] @ 0x258 │ │ + ldc2l 4, cr14, [r6, #696] @ 0x2b8 │ │ ldc2l 5, cr8, [r9, #868] @ 0x364 │ │ ldc2l 5, cr8, [r9, #692] @ 0x2b4 │ │ - ldc2l 15, cr8, [r6, #652] @ 0x28c │ │ - ldc2l 4, cr14, [r6, #68] @ 0x44 │ │ - ldc2l 12, cr12, [r7, #120] @ 0x78 │ │ + ldc2l 15, cr8, [r6, #832] @ 0x340 │ │ + ldc2l 4, cr14, [r6, #248] @ 0xf8 │ │ + ldc2l 12, cr12, [r7, #300] @ 0x12c │ │ │ │ 024b4b1c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ sub sl, r2, #1 │ │ mov r8, r0 │ │ @@ -1423211,22 +1423210,22 @@ │ │ bl 270ce00 │ │ mov r0, r4 │ │ bl 270cdd0 │ │ mov r0, r5 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 11, cr4, [r8, #472] @ 0x1d8 @ │ │ - ldc2l 15, cr0, [r7, #548] @ 0x224 │ │ - ldc2l 2, cr14, [r6, #644] @ 0x284 │ │ + ldc2l 11, cr4, [r8, #652] @ 0x28c @ │ │ + ldc2l 15, cr0, [r7, #728] @ 0x2d8 │ │ + ldc2l 2, cr14, [r6, #824] @ 0x338 │ │ ldc2l 3, cr8, [r9, #996] @ 0x3e4 │ │ - ldc2l 11, cr4, [r8, #24] @ │ │ - ldc2l 13, cr8, [r6, #780] @ 0x30c │ │ - ldc2l 2, cr14, [r6, #196] @ 0xc4 │ │ - ldc2l 10, cr12, [r7, #248] @ 0xf8 @ │ │ + ldc2l 11, cr4, [r8, #204] @ 0xcc @ │ │ + ldc2l 13, cr8, [r6, #960] @ 0x3c0 │ │ + ldc2l 2, cr14, [r6, #376] @ 0x178 │ │ + ldc2l 10, cr12, [r7, #428] @ 0x1ac @ │ │ │ │ 024b4cdc : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ sub sl, r1, #1 │ │ mov r4, r0 │ │ @@ -1423305,21 +1423304,21 @@ │ │ ldr r0, [pc, #44] @ 24b4e44 │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r4 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 14, cr5, [r9, #192] @ 0xc0 │ │ - ldc2l 13, cr0, [r7, #884] @ 0x374 │ │ - ldc2l 0, cr14, [r6, #980] @ 0x3d4 │ │ + ldc2l 14, cr5, [r9, #372] @ 0x174 │ │ + ldc2l 14, cr0, [r7, #40] @ 0x28 │ │ + ldc2l 1, cr14, [r6, #136] @ 0x88 │ │ ldc2l 2, cr8, [r9, #308] @ 0x134 │ │ - ldc2l 13, cr5, [r9, #928] @ 0x3a0 │ │ - ldc2l 13, cr0, [r7, #924] @ 0x39c │ │ - vcadd.f32 q14, , q3, #270 │ │ + ldc2l 14, cr5, [r9, #84] @ 0x54 │ │ + ldc2l 14, cr0, [r7, #80] @ 0x50 │ │ + ldc2l 8, cr12, [r7, #972] @ 0x3cc │ │ │ │ 024b4e48 : │ │ push {r4, r5, fp, lr} │ │ add fp, sp, #8 │ │ mov r5, r1 │ │ mov r4, r0 │ │ bl 2701920 │ │ @@ -1423349,18 +1423348,18 @@ │ │ bl 270cef0 │ │ ldr r0, [pc, #28] @ 24b4ee0 │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r5 │ │ pop {r4, r5, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 8, cr12, [r7, #368] @ 0x170 │ │ - ldc2l 13, cr10, [r6, #1016] @ 0x3f8 │ │ - ldc2l 0, cr14, [r6, #52] @ 0x34 │ │ - ldc2l 7, cr14, [r5, #676] @ 0x2a4 │ │ + vcadd.f32 d28, d23, d9, #270 │ │ + ldc2l 14, cr10, [r6, #172] @ 0xac │ │ + ldc2l 0, cr14, [r6, #232] @ 0xe8 │ │ + ldc2l 7, cr14, [r5, #856] @ 0x358 │ │ │ │ 024b4ee4 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ add r5, r0, r1 │ │ mov r8, r2 │ │ mov r9, r1 │ │ @@ -1423526,16 +1423525,16 @@ │ │ mov r1, r5 │ │ mov r2, r6 │ │ bl 2705940 │ │ mov r1, #0 │ │ str r0, [r8] │ │ strb r1, [r0, r6] │ │ pop {r4, r5, r6, r7, r8, sl, fp, pc} │ │ - ldc2l 13, cr15, [r8, #128] @ 0x80 │ │ - ldc2l 11, cr10, [r6, #312] @ 0x138 @ │ │ + ldc2l 13, cr15, [r8, #308] @ 0x134 │ │ + ldc2l 11, cr10, [r6, #492] @ 0x1ec @ │ │ ldc2l 14, cr7, [r9, #980] @ 0x3d4 │ │ │ │ 024b5184 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r8, r3 │ │ @@ -1423668,16 +1423667,16 @@ │ │ bl 270cde0 │ │ ldr r0, [pc, #24] @ 24b53a8 │ │ add r0, pc, r0 │ │ bl 270ce00 │ │ mov r0, r4 │ │ pop {r4, sl, fp, lr} │ │ b 270cdd0 │ │ - ldc2l 3, cr12, [r7, #544] @ 0x220 │ │ - ldc2l 8, cr10, [r6, #968] @ 0x3c8 │ │ + ldc2l 3, cr12, [r7, #724] @ 0x2d4 │ │ + ldc2l 9, cr10, [r6, #62] @ 0x3e @ │ │ ldc2l 12, cr7, [r9, #612] @ 0x264 │ │ │ │ 024b53ac : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ mov r4, r0 │ │ ldr r0, [r0] │ │ @@ -1423904,71 +1423903,71 @@ │ │ mov r0, r4 │ │ mov r1, #23 │ │ bl 270d9a0 │ │ mov r0, r5 │ │ mov r1, #6 │ │ bl 270ce40 │ │ b 24b7374 │ │ - ldc2l 0, cr8, [r7, #928] @ 0x3a0 │ │ - ldc2l 0, cr8, [r7, #784] @ 0x310 │ │ - ldc2l 0, cr4, [r8, #604] @ 0x25c │ │ - ldc2l 5, cr0, [r7, #128] @ 0x80 │ │ - ldc2l 1, cr6, [r6, #268] @ 0x10c │ │ - ldc2l 5, cr4, [r6, #880] @ 0x370 │ │ - ldc2l 10, cr13, [r7, #924] @ 0x39c @ │ │ - ldc2l 5, cr3, [r9, #956] @ 0x3bc │ │ - ldc2l 3, cr4, [r7, #284] @ 0x11c │ │ + ldc2l 1, cr8, [r7, #84] @ 0x54 │ │ + ldc2l 0, cr8, [r7, #964] @ 0x3c4 │ │ + ldc2l 0, cr4, [r8, #784] @ 0x310 │ │ + ldc2l 5, cr0, [r7, #308] @ 0x134 │ │ + ldc2l 1, cr6, [r6, #448] @ 0x1c0 │ │ + ldc2l 6, cr4, [r6, #36] @ 0x24 │ │ + ldc2l 11, cr13, [r7, #80] @ 0x50 @ │ │ + ldc2l 6, cr3, [r9, #112] @ 0x70 │ │ + ldc2l 3, cr4, [r7, #464] @ 0x1d0 │ │ ldc2l 0, cr9, [r9, #8] │ │ ldc2l 13, cr10, [r9, #944] @ 0x3b0 │ │ - ldc2l 13, cr3, [r8, #424] @ 0x1a8 │ │ - ldc2l 12, cr1, [r8, #868] @ 0x364 │ │ - ldc2l 9, cr13, [r7, #240] @ 0xf0 @ │ │ - ldc2l 15, cr15, [r5, #536] @ 0x218 │ │ - ldc2l 10, cr15, [r7, #720] @ 0x2d0 @ │ │ - ldc2l 0, cr13, [r8, #88] @ 0x58 │ │ - vcadd.f32 d29, d23, d24, #270 │ │ - ldc2l 14, cr5, [r6, #344] @ 0x158 │ │ - ldc2l 9, cr1, [r9, #328] @ 0x148 @ │ │ - ldc2l 9, cr15, [r7, #348] @ 0x15c @ │ │ - ldc2l 9, cr15, [r7, #266] @ 0x10a @ │ │ - ldc2l 11, cr9, [r7, #924] @ 0x39c @ │ │ - ldc2l 1, cr6, [r7, #264] @ 0x108 │ │ - ldc2l 11, cr7, [r8, #44] @ 0x2c @ │ │ - ldc2l 15, cr13, [r6, #160] @ 0xa0 │ │ + ldc2l 13, cr3, [r8, #604] @ 0x25c │ │ + ldc2l 13, cr1, [r8, #24] │ │ + ldc2l 9, cr13, [r7, #330] @ 0x14a @ │ │ + ldc2l 15, cr15, [r5, #716] @ 0x2cc │ │ + ldc2l 10, cr15, [r7, #900] @ 0x384 @ │ │ + ldc2l 0, cr13, [r8, #268] @ 0x10c │ │ + ldc2l 8, cr13, [r7, #852] @ 0x354 │ │ + ldc2l 14, cr5, [r6, #524] @ 0x20c │ │ + ldc2l 9, cr1, [r9, #418] @ 0x1a2 @ │ │ + ldc2l 9, cr15, [r7, #438] @ 0x1b6 @ │ │ + ldc2l 9, cr15, [r7, #356] @ 0x164 @ │ │ + ldc2l 12, cr9, [r7, #80] @ 0x50 │ │ + ldc2l 1, cr6, [r7, #444] @ 0x1bc │ │ + ldc2l 11, cr7, [r8, #224] @ 0xe0 @ │ │ + ldc2l 15, cr13, [r6, #340] @ 0x154 │ │ ldc2l 10, cr10, [r9, #616] @ 0x268 @ │ │ - ldc2l 15, cr9, [r6, #324] @ 0x144 │ │ - ldc2l 3, cr2, [r6, #328] @ 0x148 │ │ - ldc2l 12, cr5, [r6, #120] @ 0x78 │ │ - ldc2l 7, cr1, [r9, #428] @ 0x1ac │ │ - ldc2l 7, cr11, [r8, #320] @ 0x140 │ │ - ldc2l 0, cr4, [r6, #180] @ 0xb4 │ │ - ldc2l 12, cr7, [r6, #20] │ │ - ldc2l 15, cr11, [r6, #32] │ │ - ldc2l 9, cr9, [r7, #146] @ 0x92 @ │ │ - ldc2l 15, cr3, [r6, #412] @ 0x19c │ │ - ldc2l 6, cr11, [r8, #112] @ 0x70 │ │ - ldc2l 15, cr2, [r9, #620] @ 0x26c │ │ - ldc2l 7, cr11, [r7, #148] @ 0x94 │ │ - ldc2l 14, cr14, [r8, #136] @ 0x88 │ │ - ldc2l 7, cr3, [r8, #308] @ 0x134 │ │ - ldc2l 13, cr5, [r7, #428] @ 0x1ac │ │ - ldc2l 6, cr3, [r8, #988] @ 0x3dc │ │ - ldc2l 6, cr7, [r7, #912] @ 0x390 │ │ - ldc2l 2, cr13, [r7, #996] @ 0x3e4 │ │ - ldc2l 12, cr11, [r6, #652] @ 0x28c │ │ - ldc2l 4, cr15, [r7, #276] @ 0x114 │ │ - ldc2l 2, cr13, [r7, #380] @ 0x17c │ │ - ldc2l 5, cr7, [r7, #956] @ 0x3bc │ │ - ldc2l 15, cr12, [r8, #344] @ 0x158 │ │ - ldc2l 3, cr1, [r9, #224] @ 0xe0 │ │ + ldc2l 15, cr9, [r6, #504] @ 0x1f8 │ │ + ldc2l 3, cr2, [r6, #508] @ 0x1fc │ │ + ldc2l 12, cr5, [r6, #300] @ 0x12c │ │ + ldc2l 7, cr1, [r9, #608] @ 0x260 │ │ + ldc2l 7, cr11, [r8, #500] @ 0x1f4 │ │ + ldc2l 0, cr4, [r6, #360] @ 0x168 │ │ + ldc2l 12, cr7, [r6, #200] @ 0xc8 │ │ + ldc2l 15, cr11, [r6, #212] @ 0xd4 │ │ + ldc2l 9, cr9, [r7, #236] @ 0xec @ │ │ + ldc2l 15, cr3, [r6, #592] @ 0x250 │ │ + ldc2l 6, cr11, [r8, #292] @ 0x124 │ │ + ldc2l 15, cr2, [r9, #800] @ 0x320 │ │ + ldc2l 7, cr11, [r7, #328] @ 0x148 │ │ + ldc2l 14, cr14, [r8, #316] @ 0x13c │ │ + ldc2l 7, cr3, [r8, #488] @ 0x1e8 │ │ + ldc2l 13, cr5, [r7, #608] @ 0x260 │ │ + ldc2l 7, cr3, [r8, #144] @ 0x90 │ │ + ldc2l 7, cr7, [r7, #68] @ 0x44 │ │ + ldc2l 3, cr13, [r7, #152] @ 0x98 │ │ + ldc2l 12, cr11, [r6, #832] @ 0x340 │ │ + ldc2l 4, cr15, [r7, #456] @ 0x1c8 │ │ + ldc2l 2, cr13, [r7, #560] @ 0x230 │ │ + ldc2l 6, cr7, [r7, #112] @ 0x70 │ │ + ldc2l 15, cr12, [r8, #524] @ 0x20c │ │ + ldc2l 3, cr1, [r9, #404] @ 0x194 │ │ ldc2l 5, cr10, [r9, #340] @ 0x154 │ │ - ldc2l 7, cr15, [r5, #568] @ 0x238 │ │ - ldc2l 3, cr13, [r5, #500] @ 0x1f4 │ │ - ldc2l 9, cr9, [r6, #352] @ 0x160 @ │ │ - ldc2l 4, cr7, [r7, #540] @ 0x21c │ │ + ldc2l 7, cr15, [r5, #748] @ 0x2ec │ │ + ldc2l 3, cr13, [r5, #680] @ 0x2a8 │ │ + ldc2l 9, cr9, [r6, #442] @ 0x1ba @ │ │ + ldc2l 4, cr7, [r7, #720] @ 0x2d0 │ │ mov r4, r2 │ │ add r2, fp, #8 │ │ str r1, [sp, #36] @ 0x24 │ │ sub r6, fp, #36 @ 0x24 │ │ ldm r2, {r0, r1, r2} │ │ sub r7, r2, #4 │ │ sub sl, r1, #4 │ │ @@ -1425719,84 +1425718,84 @@ │ │ add r1, r0, #1 │ │ str r1, [fp, #-36] @ 0xffffffdc │ │ blt 24b7308 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldc2l 12, cr6, [r9, #700] @ 0x2bc │ │ - ldc2l 4, cr9, [r8, #72] @ 0x48 │ │ + ldc2l 4, cr9, [r8, #252] @ 0xfc │ │ ldc2l 12, cr6, [r9, #344] @ 0x158 │ │ - vcadd.f32 , q11, q3, #270 │ │ - ldc2l 5, cr5, [r6, #668] @ 0x29c │ │ - ldc2l 9, cr5, [r7, #194] @ 0xc2 @ │ │ + ldc2l 8, cr15, [r6, #972] @ 0x3cc │ │ + ldc2l 5, cr5, [r6, #848] @ 0x350 │ │ + ldc2l 9, cr5, [r7, #284] @ 0x11c @ │ │ ldc2l 5, cr8, [r9, #16] │ │ - ldc2l 9, cr14, [r8, #150] @ 0x96 @ │ │ - ldc2l 7, cr13, [r6, #60] @ 0x3c │ │ - ldc2l 0, cr15, [r7, #444] @ 0x1bc │ │ - vcadd.f32 , , q12, #270 │ │ - ldc2l 15, cr10, [r8, #860] @ 0x35c │ │ - ldc2l 15, cr0, [r9, #584] @ 0x248 │ │ - ldc2l 7, cr5, [r7, #868] @ 0x364 │ │ - ldc2l 1, cr3, [r8, #292] @ 0x124 │ │ - ldc2l 8, cr2, [r9, #736] @ 0x2e0 │ │ - ldc2l 0, cr5, [r8, #44] @ 0x2c │ │ - ldc2l 3, cr7, [r6, #744] @ 0x2e8 │ │ + ldc2l 9, cr14, [r8, #240] @ 0xf0 @ │ │ + ldc2l 7, cr13, [r6, #240] @ 0xf0 │ │ + ldc2l 0, cr15, [r7, #624] @ 0x270 │ │ + ldc2l 8, cr5, [r7, #596] @ 0x254 │ │ + ldc2l 0, cr11, [r8, #16] │ │ + ldc2l 15, cr0, [r9, #764] @ 0x2fc │ │ + vcadd.f32 d21, d7, d6, #270 │ │ + ldc2l 1, cr3, [r8, #472] @ 0x1d8 │ │ + vcadd.f32 q9, , , #270 │ │ + ldc2l 0, cr5, [r8, #224] @ 0xe0 │ │ + ldc2l 3, cr7, [r6, #924] @ 0x39c │ │ ldc2l 0, cr10, [r9, #736] @ 0x2e0 │ │ - ldc2l 6, cr5, [r7, #688] @ 0x2b0 │ │ - ldc2l 2, cr5, [r6, #460] @ 0x1cc │ │ - ldc2l 12, cr12, [r7, #320] @ 0x140 │ │ - ldc2l 4, cr15, [r6, #984] @ 0x3d8 │ │ + ldc2l 6, cr5, [r7, #868] @ 0x364 │ │ + ldc2l 2, cr5, [r6, #640] @ 0x280 │ │ + ldc2l 12, cr12, [r7, #500] @ 0x1f4 │ │ + ldc2l 5, cr15, [r6, #140] @ 0x8c │ │ ldc2l 1, cr8, [r9, #624] @ 0x270 │ │ - ldc2l 8, cr1, [r6, #604] @ 0x25c │ │ - ldc2l 6, cr2, [r9, #752] @ 0x2f0 │ │ - ldc2l 5, cr11, [r6, #144] @ 0x90 │ │ - ldc2l 14, cr6, [r8, #904] @ 0x388 │ │ + vcadd.f32 , q11, q2, #270 │ │ + ldc2l 6, cr2, [r9, #932] @ 0x3a4 │ │ + ldc2l 5, cr11, [r6, #324] @ 0x144 │ │ + ldc2l 15, cr6, [r8, #60] @ 0x3c │ │ ldc2l 14, cr9, [r9, #716] @ 0x2cc │ │ - ldc2l 4, cr14, [r8, #864] @ 0x360 │ │ - ldc2l 14, cr8, [r8, #168] @ 0xa8 │ │ - ldc2l 1, cr4, [r9, #976] @ 0x3d0 │ │ - ldc2l 7, cr12, [r8, #356] @ 0x164 │ │ - ldc2l 6, cr1, [r6, #716] @ 0x2cc │ │ - ldc2l 11, cr10, [r8, #116] @ 0x74 @ │ │ - ldc2l 1, cr1, [r7, #612] @ 0x264 │ │ - ldc2l 15, cr4, [r6, #144] @ 0x90 │ │ - ldc2l 5, cr1, [r6, #960] @ 0x3c0 │ │ - ldc2l 1, cr9, [r6, #480] @ 0x1e0 │ │ - ldc2l 12, cr2, [r8, #152] @ 0x98 │ │ - ldc2l 0, cr4, [r9, #132] @ 0x84 │ │ - ldc2l 10, cr4, [r8, #912] @ 0x390 @ │ │ - ldc2l 2, cr3, [r6, #532] @ 0x214 │ │ - ldc2l 0, cr3, [r7, #408] @ 0x198 │ │ - ldc2l 9, cr12, [r5, #466] @ 0x1d2 @ │ │ - ldc2l 1, cr5, [r7, #264] @ 0x108 │ │ - ldc2l 10, cr2, [r8, #648] @ 0x288 @ │ │ - ldc2l 10, cr6, [r7, #564] @ 0x234 @ │ │ - ldc2l 9, cr12, [r5, #12] @ │ │ - ldc2l 10, cr8, [r8, #104] @ 0x68 @ │ │ - ldc2l 9, cr6, [r8, #468] @ 0x1d4 @ │ │ - ldc2l 14, cr0, [r7, #148] @ 0x94 │ │ - ldc2l 8, cr0, [r8, #712] @ 0x2c8 │ │ - ldc2l 7, cr12, [r5, #884] @ 0x374 │ │ - ldc2l 11, cr4, [r6, #244] @ 0xf4 @ │ │ - ldc2l 15, cr4, [r7, #32] │ │ - ldc2l 0, cr2, [r9, #76] @ 0x4c │ │ - ldc2l 12, cr3, [r9, #420] @ 0x1a4 │ │ - ldc2l 1, cr1, [r6, #408] @ 0x198 │ │ - ldc2l 7, cr0, [r8, #240] @ 0xf0 │ │ - ldc2l 11, cr3, [r9, #824] @ 0x338 @ │ │ - ldc2l 13, cr13, [r8, #956] @ 0x3bc │ │ - ldc2l 12, cr14, [r6, #392] @ 0x188 │ │ - ldc2l 7, cr8, [r8, #88] @ 0x58 │ │ - ldc2l 4, cr14, [r7, #792] @ 0x318 │ │ - ldc2l 0, cr12, [r8, #272] @ 0x110 │ │ - ldc2l 6, cr6, [r7, #444] @ 0x1bc │ │ - ldc2l 10, cr3, [r9, #336] @ 0x150 @ │ │ - ldc2l 12, cr10, [r6, #44] @ 0x2c │ │ + ldc2l 5, cr14, [r8, #20] │ │ + ldc2l 14, cr8, [r8, #348] @ 0x15c │ │ + ldc2l 2, cr4, [r9, #132] @ 0x84 │ │ + ldc2l 7, cr12, [r8, #536] @ 0x218 │ │ + ldc2l 6, cr1, [r6, #896] @ 0x380 │ │ + ldc2l 11, cr10, [r8, #296] @ 0x128 @ │ │ + ldc2l 1, cr1, [r7, #792] @ 0x318 │ │ + ldc2l 15, cr4, [r6, #324] @ 0x144 │ │ + ldc2l 6, cr1, [r6, #116] @ 0x74 │ │ + ldc2l 1, cr9, [r6, #660] @ 0x294 │ │ + ldc2l 12, cr2, [r8, #332] @ 0x14c │ │ + ldc2l 0, cr4, [r9, #312] @ 0x138 │ │ + ldc2l 11, cr4, [r8, #68] @ 0x44 @ │ │ + ldc2l 2, cr3, [r6, #712] @ 0x2c8 │ │ + ldc2l 0, cr3, [r7, #588] @ 0x24c │ │ + ldc2l 10, cr12, [r5, #88] @ 0x58 @ │ │ + ldc2l 1, cr5, [r7, #444] @ 0x1bc │ │ + ldc2l 10, cr2, [r8, #828] @ 0x33c @ │ │ + ldc2l 10, cr6, [r7, #744] @ 0x2e8 @ │ │ + ldc2l 9, cr12, [r5, #102] @ 0x66 @ │ │ + ldc2l 10, cr8, [r8, #284] @ 0x11c @ │ │ + ldc2l 10, cr6, [r8, #92] @ 0x5c @ │ │ + ldc2l 14, cr0, [r7, #328] @ 0x148 │ │ + ldc2l 8, cr0, [r8, #892] @ 0x37c │ │ + vcadd.f32 d28, d5, d10, #270 │ │ + ldc2l 11, cr4, [r6, #424] @ 0x1a8 @ │ │ + ldc2l 15, cr4, [r7, #212] @ 0xd4 │ │ + ldc2l 0, cr2, [r9, #256] @ 0x100 │ │ + ldc2l 12, cr3, [r9, #600] @ 0x258 │ │ + ldc2l 1, cr1, [r6, #588] @ 0x24c │ │ + ldc2l 7, cr0, [r8, #420] @ 0x1a4 │ │ + ldc2l 11, cr3, [r9, #1004] @ 0x3ec @ │ │ + ldc2l 14, cr13, [r8, #112] @ 0x70 │ │ + ldc2l 12, cr14, [r6, #572] @ 0x23c │ │ + ldc2l 7, cr8, [r8, #268] @ 0x10c │ │ + ldc2l 4, cr14, [r7, #972] @ 0x3cc │ │ + ldc2l 0, cr12, [r8, #452] @ 0x1c4 │ │ + ldc2l 6, cr6, [r7, #624] @ 0x270 │ │ + ldc2l 10, cr3, [r9, #516] @ 0x204 @ │ │ + ldc2l 12, cr10, [r6, #224] @ 0xe0 │ │ ldc2l 7, cr7, [r9, #720] @ 0x2d0 │ │ - ldc2l 5, cr8, [r7, #1000] @ 0x3e8 │ │ + ldc2l 6, cr8, [r7, #156] @ 0x9c │ │ eoreq r3, sl, ip, lsr #32 │ │ │ │ 024b74a0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d13} │ │ @@ -1426750,15 +1426749,15 @@ │ │ ldr r1, [pc, #544] @ 24b85a4 │ │ add r2, sp, #88 @ 0x58 │ │ add r1, pc, r1 │ │ bl 270f460 │ │ mvn r4, #71 @ 0x47 │ │ mov r6, r5 │ │ b 24b83b4 │ │ - ldc2l 9, cr13, [r8, #324] @ 0x144 @ │ │ + ldc2l 9, cr13, [r8, #414] @ 0x19e @ │ │ add r0, r7, r1, lsl #3 │ │ add r4, r4, #1 │ │ add r6, r6, #8 │ │ cmn r4, #66 @ 0x42 │ │ vstr d8, [r0] │ │ beq 24b8500 │ │ ldr r0, [fp, #-92] @ 0xffffffa4 │ │ @@ -1426839,15 +1426838,15 @@ │ │ bcc 24b839c │ │ mov r0, r9 │ │ mov r2, sl │ │ mov r3, #504 @ 0x1f8 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24b839c │ │ - ldc2l 9, cr13, [r8, #252] @ 0xfc @ │ │ + ldc2l 9, cr13, [r8, #342] @ 0x156 @ │ │ ldr r0, [fp, #-92] @ 0xffffffa4 │ │ ldr r6, [pc, #156] @ 24b85a8 │ │ add r6, pc, r6 │ │ sub r1, r0, #1 │ │ sub r4, fp, #140 @ 0x8c │ │ cmp r1, #10 │ │ str r1, [fp, #-88] @ 0xffffffa8 │ │ @@ -1426866,68 +1426865,68 @@ │ │ bcc 24b826c │ │ mov r0, r6 │ │ mov r2, sl │ │ movw r3, #514 @ 0x202 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24b826c │ │ - ldc2l 10, cr5, [r8, #292] @ 0x124 @ │ │ - ldc2l 7, cr11, [r6, #980] @ 0x3d4 │ │ - ldc2l 10, cr13, [r5, #972] @ 0x3cc @ │ │ - ldc2l 7, cr5, [r8, #756] @ 0x2f4 │ │ - ldc2l 5, cr11, [r6, #420] @ 0x1a4 │ │ - ldc2l 13, cr3, [r7, #480] @ 0x1e0 │ │ - ldc2l 13, cr11, [r7, #576] @ 0x240 │ │ - ldc2l 1, cr13, [r8, #820] @ 0x334 │ │ - ldc2l 11, cr3, [r7, #736] @ 0x2e0 @ │ │ - ldc2l 11, cr11, [r7, #832] @ 0x340 @ │ │ - ldc2l 11, cr3, [r7, #512] @ 0x200 @ │ │ - ldc2l 11, cr11, [r7, #608] @ 0x260 @ │ │ - ldc2l 1, cr3, [r7, #784] @ 0x310 │ │ - ldc2l 1, cr11, [r7, #880] @ 0x370 │ │ - ldc2l 6, cr12, [r8, #772] @ 0x304 │ │ + ldc2l 10, cr5, [r8, #472] @ 0x1d8 @ │ │ + vcadd.f32 d27, d6, d18, #270 │ │ + ldc2l 11, cr13, [r5, #128] @ 0x80 @ │ │ + ldc2l 7, cr5, [r8, #936] @ 0x3a8 │ │ + ldc2l 5, cr11, [r6, #600] @ 0x258 │ │ + ldc2l 13, cr3, [r7, #660] @ 0x294 │ │ + ldc2l 13, cr11, [r7, #756] @ 0x2f4 │ │ + ldc2l 1, cr13, [r8, #1000] @ 0x3e8 │ │ + ldc2l 11, cr3, [r7, #916] @ 0x394 @ │ │ + ldc2l 11, cr11, [r7, #1012] @ 0x3f4 @ │ │ + ldc2l 11, cr3, [r7, #692] @ 0x2b4 @ │ │ + ldc2l 11, cr11, [r7, #788] @ 0x314 @ │ │ + ldc2l 1, cr3, [r7, #964] @ 0x3c4 │ │ + ldc2l 2, cr11, [r7, #36] @ 0x24 │ │ + ldc2l 6, cr12, [r8, #952] @ 0x3b8 │ │ eoreq r1, sl, ip, asr #30 │ │ - ldc2l 15, cr2, [r7, #96] @ 0x60 │ │ - ldc2l 11, cr3, [r7, #224] @ 0xe0 @ │ │ - ldc2l 11, cr11, [r7, #320] @ 0x140 @ │ │ - ldc2l 7, cr7, [r8, #260] @ 0x104 │ │ - ldc2l 9, cr11, [r7, #176] @ 0xb0 @ │ │ - ldc2l 5, cr7, [r8, #436] @ 0x1b4 │ │ - ldc2l 7, cr11, [r7, #528] @ 0x210 │ │ - ldc2l 5, cr7, [r8, #228] @ 0xe4 │ │ - ldc2l 5, cr7, [r8, #4] │ │ - ldc2l 7, cr11, [r7, #96] @ 0x60 │ │ - ldc2l 4, cr7, [r8, #804] @ 0x324 │ │ - ldc2l 6, cr11, [r7, #896] @ 0x380 │ │ - ldc2l 3, cr7, [r8, #804] @ 0x324 │ │ - ldc2l 5, cr11, [r7, #896] @ 0x380 │ │ - ldc2l 3, cr7, [r8, #148] @ 0x94 │ │ - ldc2l 5, cr11, [r7, #240] @ 0xf0 │ │ - ldc2l 2, cr7, [r8, #404] @ 0x194 │ │ - ldc2l 4, cr11, [r7, #496] @ 0x1f0 │ │ - ldc2l 2, cr7, [r8, #4] │ │ - ldc2l 4, cr11, [r7, #96] @ 0x60 │ │ - ldc2l 1, cr7, [r8, #820] @ 0x334 │ │ - ldc2l 3, cr11, [r7, #912] @ 0x390 │ │ - ldc2l 1, cr7, [r8, #612] @ 0x264 │ │ - ldc2l 3, cr11, [r7, #704] @ 0x2c0 │ │ - ldc2l 1, cr7, [r8, #404] @ 0x194 │ │ - ldc2l 3, cr11, [r7, #496] @ 0x1f0 │ │ - ldc2l 1, cr7, [r8, #196] @ 0xc4 │ │ - ldc2l 3, cr11, [r7, #288] @ 0x120 │ │ - ldc2l 0, cr7, [r8, #996] @ 0x3e4 │ │ - ldc2l 3, cr11, [r7, #64] @ 0x40 │ │ - ldc2l 10, cr3, [r7, #608] @ 0x260 @ │ │ - ldc2l 10, cr11, [r7, #704] @ 0x2c0 @ │ │ + ldc2l 15, cr2, [r7, #276] @ 0x114 │ │ + ldc2l 11, cr3, [r7, #404] @ 0x194 @ │ │ + ldc2l 11, cr11, [r7, #500] @ 0x1f4 @ │ │ + ldc2l 7, cr7, [r8, #440] @ 0x1b8 │ │ + ldc2l 9, cr11, [r7, #266] @ 0x10a @ │ │ + ldc2l 5, cr7, [r8, #616] @ 0x268 │ │ + ldc2l 7, cr11, [r7, #708] @ 0x2c4 │ │ + ldc2l 5, cr7, [r8, #408] @ 0x198 │ │ + ldc2l 5, cr7, [r8, #184] @ 0xb8 │ │ + ldc2l 7, cr11, [r7, #276] @ 0x114 │ │ + ldc2l 4, cr7, [r8, #984] @ 0x3d8 │ │ + ldc2l 7, cr11, [r7, #52] @ 0x34 │ │ + ldc2l 3, cr7, [r8, #984] @ 0x3d8 │ │ + ldc2l 6, cr11, [r7, #52] @ 0x34 │ │ + ldc2l 3, cr7, [r8, #328] @ 0x148 │ │ + ldc2l 5, cr11, [r7, #420] @ 0x1a4 │ │ + ldc2l 2, cr7, [r8, #584] @ 0x248 │ │ + ldc2l 4, cr11, [r7, #676] @ 0x2a4 │ │ + ldc2l 2, cr7, [r8, #184] @ 0xb8 │ │ + ldc2l 4, cr11, [r7, #276] @ 0x114 │ │ + ldc2l 1, cr7, [r8, #1000] @ 0x3e8 │ │ + ldc2l 4, cr11, [r7, #68] @ 0x44 │ │ + ldc2l 1, cr7, [r8, #792] @ 0x318 │ │ + ldc2l 3, cr11, [r7, #884] @ 0x374 │ │ + ldc2l 1, cr7, [r8, #584] @ 0x248 │ │ + ldc2l 3, cr11, [r7, #676] @ 0x2a4 │ │ + ldc2l 1, cr7, [r8, #376] @ 0x178 │ │ + ldc2l 3, cr11, [r7, #468] @ 0x1d4 │ │ + ldc2l 1, cr7, [r8, #152] @ 0x98 │ │ + ldc2l 3, cr11, [r7, #244] @ 0xf4 │ │ + ldc2l 10, cr3, [r7, #788] @ 0x314 @ │ │ + ldc2l 10, cr11, [r7, #884] @ 0x374 @ │ │ vcadd.f32 d24, d9, d16, #270 │ │ - ldc2l 0, cr7, [r8, #228] @ 0xe4 │ │ - ldc2l 2, cr11, [r7, #320] @ 0x140 │ │ - ldc2l 7, cr12, [r8, #52] @ 0x34 │ │ - ldc2l 2, cr11, [r7, #128] @ 0x80 │ │ - ldc2l 7, cr13, [r8, #584] @ 0x248 │ │ + ldc2l 0, cr7, [r8, #408] @ 0x198 │ │ + ldc2l 2, cr11, [r7, #500] @ 0x1f4 │ │ + ldc2l 7, cr12, [r8, #232] @ 0xe8 │ │ + ldc2l 2, cr11, [r7, #308] @ 0x134 │ │ + ldc2l 7, cr13, [r8, #764] @ 0x2fc │ │ │ │ 024b8640 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #316 @ 0x13c │ │ ldr r9, [fp, #8] │ │ mov r5, r0 │ │ @@ -1427223,29 +1427222,29 @@ │ │ ldr r0, [pc, #76] @ 24b8b2c │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 9, cr0, [r9, #10] @ │ │ + ldc2l 9, cr0, [r9, #100] @ 0x64 @ │ │ ldrbeq r9, [r7, #2528] @ 0x9e0 │ │ eoreq r1, sl, ip, lsr ip │ │ ldrbeq r9, [r7, #2508] @ 0x9cc │ │ eoreq r1, sl, r8, lsl #21 │ │ eoreq r1, sl, r8, lsr #23 │ │ - ldc2l 13, cr12, [r6, #368] @ 0x170 │ │ + ldc2l 13, cr12, [r6, #548] @ 0x224 │ │ ldrdeq r1, [sl], -r0 @ │ │ eoreq r1, sl, r8, ror r8 │ │ - ldc2l 14, cr6, [r7, #48] @ 0x30 │ │ - ldc2l 4, cr10, [r6, #180] @ 0xb4 │ │ + ldc2l 14, cr6, [r7, #228] @ 0xe4 │ │ + ldc2l 4, cr10, [r6, #360] @ 0x168 │ │ eoreq r1, sl, r4, lsl r8 │ │ - ldc2l 6, cr10, [r7, #136] @ 0x88 │ │ + ldc2l 6, cr10, [r7, #316] @ 0x13c │ │ eoreq r1, sl, r8, lsr #17 │ │ - ldc2l 4, cr0, [r9, #644] @ 0x284 │ │ + ldc2l 4, cr0, [r9, #824] @ 0x338 │ │ │ │ 024b8b30 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ sub sp, sp, #4544 @ 0x11c0 │ │ @@ -1428245,15 +1428244,15 @@ │ │ add r1, pc, r1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3116] @ 24ba704 │ │ add r0, pc, r0 │ │ mov r1, #20 │ │ bl 270d9a0 │ │ b 24b95fc │ │ - vcadd.f32 q13, , q7, #270 │ │ + ldc2l 8, cr10, [r7, #1004] @ 0x3ec │ │ ldr r1, [pc, #3096] @ 24ba708 │ │ add lr, sp, #1536 @ 0x600 │ │ add r0, lr, #11 │ │ mov r2, #80 @ 0x50 │ │ add r1, pc, r1 │ │ mov r3, #10 │ │ sub r5, fp, #1120 @ 0x460 │ │ @@ -1428285,22 +1428284,22 @@ │ │ bl 270d990 │ │ ldr r4, [pc, #2980] @ 24ba718 │ │ add lr, sp, #1536 @ 0x600 │ │ add r1, lr, #11 │ │ add r4, pc, r4 │ │ b 24b99ec │ │ ldrbeq r9, [r7, #1544] @ 0x608 │ │ - ldc2l 11, cr12, [r6, #544] @ 0x220 @ │ │ + ldc2l 11, cr12, [r6, #724] @ 0x2d4 @ │ │ ldrbeq r9, [r7, #2352] @ 0x930 │ │ - ldc2l 11, cr12, [r5, #412] @ 0x19c @ │ │ + ldc2l 11, cr12, [r5, #592] @ 0x250 @ │ │ ldrbeq r9, [r7, #1488] @ 0x5d0 │ │ eoreq r1, sl, fp, ror r7 │ │ eoreq r1, sl, r0, lsl #15 │ │ - ldc2l 1, cr13, [r6, #160] @ 0xa0 │ │ - ldc2l 14, cr12, [r6, #768] @ 0x300 │ │ + ldc2l 1, cr13, [r6, #340] @ 0x154 │ │ + ldc2l 14, cr12, [r6, #948] @ 0x3b4 │ │ ldrbeq r9, [r7, #2152] @ 0x868 │ │ ldr r0, [pc, #2924] @ 24ba71c │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #120 @ 0x78 │ │ add r0, pc, r0 │ │ bl 270d130 │ │ add r0, sp, #528 @ 0x210 │ │ @@ -1428330,27 +1428329,27 @@ │ │ str r0, [sp, #56] @ 0x38 │ │ mov r0, #1 │ │ vldr d8, [pc, #852] @ 24b9f80 │ │ str r2, [sp, #40] @ 0x28 │ │ str r1, [sp, #36] @ 0x24 │ │ str r0, [fp, #-1076] @ 0xfffffbcc │ │ b 24b9c9c │ │ - ldc2l 7, cr10, [r7, #104] @ 0x68 │ │ - ldc2l 13, cr2, [r6, #64] @ 0x40 │ │ - ldc2l 14, cr12, [r6, #88] @ 0x58 │ │ + ldc2l 7, cr10, [r7, #284] @ 0x11c │ │ + ldc2l 13, cr2, [r6, #244] @ 0xf4 │ │ + ldc2l 14, cr12, [r6, #268] @ 0x10c │ │ ldrbeq r9, [r7, #1424] @ 0x590 │ │ - ldc2l 6, cr10, [r5, #784] @ 0x310 │ │ - ldc2l 6, cr10, [r7, #440] @ 0x1b8 │ │ - ldc2l 6, cr10, [r5, #528] @ 0x210 │ │ + ldc2l 6, cr10, [r5, #964] @ 0x3c4 │ │ + ldc2l 6, cr10, [r7, #620] @ 0x26c │ │ + ldc2l 6, cr10, [r5, #708] @ 0x2c4 │ │ ldc2l 10, cr5, [r9, #712] @ 0x2c8 @ │ │ ldrbeq r9, [r7, #1764] @ 0x6e4 │ │ - ldc2l 4, cr8, [r8, #568] @ 0x238 │ │ - ldc2l 5, cr10, [r7, #776] @ 0x308 │ │ - ldc2l 4, cr8, [r8, #312] @ 0x138 │ │ - ldc2l 5, cr10, [r5, #780] @ 0x30c │ │ + ldc2l 4, cr8, [r8, #748] @ 0x2ec │ │ + ldc2l 5, cr10, [r7, #956] @ 0x3bc │ │ + ldc2l 4, cr8, [r8, #492] @ 0x1ec │ │ + ldc2l 5, cr10, [r5, #960] @ 0x3c0 │ │ add lr, sp, #1024 @ 0x400 │ │ add r0, lr, #120 @ 0x78 │ │ add r2, r0, r1, lsl #3 │ │ ldr r1, [pc, #2720] @ 24ba720 │ │ sub r0, fp, #1488 @ 0x5d0 │ │ add r1, pc, r1 │ │ bl 270e090 │ │ @@ -1428446,16 +1428445,16 @@ │ │ cmp r1, #1 │ │ bhi 24b9e10 │ │ sub r0, fp, #484 @ 0x1e4 │ │ str r6, [r0, r1, lsl #2] │ │ mov r6, r0 │ │ b 24b9e60 │ │ ldrbeq r9, [r7, #952] @ 0x3b8 │ │ - ldc2l 6, cr4, [r8, #728] @ 0x2d8 │ │ - ldc2l 5, cr10, [r7, #88] @ 0x58 │ │ + ldc2l 6, cr4, [r8, #908] @ 0x38c │ │ + ldc2l 5, cr10, [r7, #268] @ 0x10c │ │ ldr r0, [pc, #3804] @ 24bacf4 │ │ movw r3, #1155 @ 0x483 │ │ ldr r2, [pc, #3800] @ 24bacf8 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ ldr r1, [fp, #-1076] @ 0xfffffbcc │ │ @@ -1428477,21 +1428476,21 @@ │ │ beq 24bc084 │ │ ldr r0, [fp, #-1076] @ 0xfffffbcc │ │ sub r6, r0, #1 │ │ cmp r6, #2 │ │ bcs 24b9ea0 │ │ mov r1, r6 │ │ b 24b9eec │ │ - ldc2l 6, cr4, [r8, #472] @ 0x1d8 │ │ - ldc2l 11, cr0, [r7, #212] @ 0xd4 @ │ │ + ldc2l 6, cr4, [r8, #652] @ 0x28c │ │ + ldc2l 11, cr0, [r7, #392] @ 0x188 @ │ │ ldrbeq r9, [r7, #972] @ 0x3cc │ │ - ldc2l 12, cr6, [r6, #484] @ 0x1e4 │ │ - ldc2l 4, cr10, [r7, #424] @ 0x1a8 │ │ - ldc2l 12, cr6, [r6, #228] @ 0xe4 │ │ - ldc2l 11, cr1, [r9, #776] @ 0x308 @ │ │ + ldc2l 12, cr6, [r6, #664] @ 0x298 │ │ + ldc2l 4, cr10, [r7, #604] @ 0x25c │ │ + ldc2l 12, cr6, [r6, #408] @ 0x198 │ │ + ldc2l 11, cr1, [r9, #956] @ 0x3bc @ │ │ ldr r0, [pc, #3676] @ 24bad04 │ │ mov r1, r6 │ │ ldr r2, [pc, #3672] @ 24bad08 │ │ movw r3, #1187 @ 0x4a3 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ @@ -1428536,18 +1428535,18 @@ │ │ cmp r6, #2 │ │ bcs 24b9f8c │ │ ldr r4, [pc, #3512] @ 24bad1c │ │ mov r1, r6 │ │ add r4, pc, r4 │ │ b 24b9fd8 │ │ ldrbeq r9, [r7, #992] @ 0x3e0 │ │ - ldc2l 10, cr0, [r7, #272] @ 0x110 @ │ │ - ldc2l 3, cr10, [r7, #760] @ 0x2f8 │ │ - ldc2l 10, cr0, [r7, #16] @ │ │ - ldc2l 2, cr8, [r8, #196] @ 0xc4 │ │ + ldc2l 10, cr0, [r7, #452] @ 0x1c4 @ │ │ + ldc2l 3, cr10, [r7, #940] @ 0x3ac │ │ + ldc2l 10, cr0, [r7, #196] @ 0xc4 @ │ │ + ldc2l 2, cr8, [r8, #376] @ 0x178 │ │ andeq r0, r0, r0 │ │ cdpcc 0, 4, cr0, cr0, cr0, {0} │ │ ldrbeq r9, [r7, #948] @ 0x3b4 │ │ ldr r4, [pc, #3468] @ 24bad20 │ │ mov r1, r6 │ │ ldr r2, [pc, #3464] @ 24bad24 │ │ movw r3, #1195 @ 0x4ab │ │ @@ -1428584,46 +1428583,46 @@ │ │ ldr r0, [fp, #-1076] @ 0xfffffbcc │ │ sub r6, r0, #1 │ │ cmp r6, #2 │ │ bcs 24ba0b8 │ │ mov r1, r6 │ │ b 24ba0fc │ │ ldc2l 14, cr3, [r9, #444] @ 0x1bc │ │ - ldc2l 3, cr10, [r7, #72] @ 0x48 │ │ + ldc2l 3, cr10, [r7, #252] @ 0xfc │ │ ldc2l 14, cr3, [r9, #188] @ 0xbc │ │ - ldc2l 3, cr10, [r5, #104] @ 0x68 │ │ + ldc2l 3, cr10, [r5, #284] @ 0x11c │ │ ldrbeq r9, [r7, #584] @ 0x248 │ │ - ldc2l 8, cr0, [r7, #972] @ 0x3cc │ │ - ldc2l 2, cr10, [r7, #408] @ 0x198 │ │ - ldc2l 8, cr0, [r7, #716] @ 0x2cc │ │ - ldc2l 0, cr8, [r8, #896] @ 0x380 │ │ + ldc2l 9, cr0, [r7, #64] @ 0x40 @ │ │ + ldc2l 2, cr10, [r7, #588] @ 0x24c │ │ + vcadd.f32 q8, , q8, #270 │ │ + ldc2l 1, cr8, [r8, #52] @ 0x34 │ │ ldrbeq r9, [r7, #348] @ 0x15c │ │ - ldc2l 9, cr1, [r7, #208] @ 0xd0 @ │ │ - ldc2l 1, cr10, [r7, #744] @ 0x2e8 │ │ - ldc2l 9, cr1, [r7, #80] @ 0x50 @ │ │ - ldc2l 10, cr2, [r7, #20] @ │ │ + ldc2l 9, cr1, [r7, #298] @ 0x12a @ │ │ + ldc2l 1, cr10, [r7, #924] @ 0x39c │ │ + ldc2l 9, cr1, [r7, #170] @ 0xaa @ │ │ + ldc2l 10, cr2, [r7, #200] @ 0xc8 @ │ │ ldrbeq r8, [r7, #3952] @ 0xf70 │ │ - ldc2l 7, cr0, [r6, #796] @ 0x31c │ │ - ldc2l 1, cr10, [r7, #56] @ 0x38 │ │ - ldc2l 7, cr0, [r6, #540] @ 0x21c │ │ - ldc2l 9, cr2, [r7, #190] @ 0xbe @ │ │ + ldc2l 7, cr0, [r6, #976] @ 0x3d0 │ │ + ldc2l 1, cr10, [r7, #236] @ 0xec │ │ + ldc2l 7, cr0, [r6, #720] @ 0x2d0 │ │ + ldc2l 9, cr2, [r7, #280] @ 0x118 @ │ │ ldrbeq r8, [r7, #3908] @ 0xf44 │ │ - ldc2l 8, cr6, [r6, #488] @ 0x1e8 │ │ - ldc2l 0, cr10, [r7, #392] @ 0x188 │ │ - ldc2l 8, cr6, [r6, #232] @ 0xe8 │ │ - ldc2l 7, cr12, [r6, #404] @ 0x194 │ │ + vcadd.f32 d22, d22, d23, #270 │ │ + ldc2l 0, cr10, [r7, #572] @ 0x23c │ │ + vcadd.f32 q11, q3, , #270 │ │ + ldc2l 7, cr12, [r6, #584] @ 0x248 │ │ ldrbeq r9, [r7, #152] @ 0x98 │ │ ldc2l 1, cr7, [r9, #860] @ 0x35c │ │ - ldc2l 15, cr9, [r7, #744] @ 0x2e8 │ │ + ldc2l 15, cr9, [r7, #924] @ 0x39c │ │ ldc2l 1, cr7, [r9, #620] @ 0x26c │ │ - ldc2l 1, cr4, [r8, #16] │ │ + ldc2l 1, cr4, [r8, #196] @ 0xc4 │ │ ldrbeq r8, [r7, #3956] @ 0xf74 │ │ - ldc2l 15, cr9, [r7, #200] @ 0xc8 │ │ - ldc2l 6, cr12, [r6, #368] @ 0x170 │ │ - ldc2l 6, cr14, [r6, #20] │ │ + ldc2l 15, cr9, [r7, #380] @ 0x17c │ │ + ldc2l 6, cr12, [r6, #548] @ 0x224 │ │ + ldc2l 6, cr14, [r6, #200] @ 0xc8 │ │ ldrbeq r8, [r7, #3292] @ 0xcdc │ │ strhteq r0, [sl], -r4 │ │ ldr r2, [pc, #3912] @ 24bb008 │ │ mov r0, r4 │ │ mov r1, r6 │ │ movw r3, #1196 @ 0x4ac │ │ add r2, pc, r2 │ │ @@ -1428877,20 +1428876,20 @@ │ │ add r3, sp, #928 @ 0x3a0 │ │ mov r0, r5 │ │ mov r1, r7 │ │ mov r2, r6 │ │ str r4, [sp] │ │ bl 270f970 │ │ b 24bb0d8 │ │ - vcadd.f32 q15, , , #270 │ │ - ldc2l 0, cr4, [r7, #832] @ 0x340 │ │ + ldc2l 8, cr14, [r5, #488] @ 0x1e8 │ │ + ldc2l 0, cr4, [r7, #1012] @ 0x3f4 │ │ eoreq r0, sl, r4, lsr #27 │ │ - ldc2l 14, cr9, [r7, #264] @ 0x108 │ │ - ldc2l 0, cr4, [r7, #504] @ 0x1f8 │ │ - ldc2l 5, cr11, [r8, #340] @ 0x154 │ │ + ldc2l 14, cr9, [r7, #444] @ 0x1bc │ │ + ldc2l 0, cr4, [r7, #684] @ 0x2ac │ │ + ldc2l 5, cr11, [r8, #520] @ 0x208 │ │ eoreq r0, sl, ip, lsl #26 │ │ cmp r1, #2 │ │ bcc 24ba504 │ │ ldr r0, [pc, #3948] @ 24bb45c │ │ movw r3, #1206 @ 0x4b6 │ │ ldr r2, [pc, #3944] @ 24bb460 │ │ add r0, pc, r0 │ │ @@ -1428995,50 +1428994,50 @@ │ │ add r2, pc, r2 │ │ bl 270ff10 │ │ bl 270db20 │ │ ldr r9, [sp, #76] @ 0x4c │ │ cmp r0, #0 │ │ beq 24bb81c │ │ b 24b95fc │ │ - ldc2l 7, cr13, [r5, #316] @ 0x13c │ │ + ldc2l 7, cr13, [r5, #496] @ 0x1f0 │ │ ldrbeq r8, [r7, #3612] @ 0xe1c │ │ - ldc2l 11, cr7, [r8, #284] @ 0x11c @ │ │ - ldc2l 13, cr1, [r8, #632] @ 0x278 │ │ - ldc2l 8, cr9, [r8, #372] @ 0x174 │ │ - ldc2l 12, cr15, [r7, #632] @ 0x278 │ │ + ldc2l 11, cr7, [r8, #464] @ 0x1d0 @ │ │ + ldc2l 13, cr1, [r8, #812] @ 0x32c │ │ + vcadd.f32 d25, d24, d10, #270 │ │ + ldc2l 12, cr15, [r7, #812] @ 0x32c │ │ eoreq r0, sl, ip, lsl #24 │ │ ldc2l 6, cr3, [r9, #932] @ 0x3a4 │ │ mlaeq sl, r0, fp, r0 │ │ - ldc2l 2, cr1, [r9, #644] @ 0x284 │ │ - ldc2l 12, cr1, [r8, #188] @ 0xbc │ │ + ldc2l 2, cr1, [r9, #824] @ 0x338 │ │ + ldc2l 12, cr1, [r8, #368] @ 0x170 │ │ ldc2l 12, cr6, [r9, #560] @ 0x230 │ │ eoreq r0, sl, r8, ror sl │ │ - ldc2l 11, cr1, [r8, #704] @ 0x2c0 @ │ │ + ldc2l 11, cr1, [r8, #884] @ 0x374 @ │ │ ldrbeq r8, [r7, #2112] @ 0x840 │ │ ldrbeq r8, [r7, #2864] @ 0xb30 │ │ strhteq r0, [sl], -r8 │ │ - ldc2l 11, cr1, [r8, #200] @ 0xc8 @ │ │ - ldc2l 4, cr9, [r6, #868] @ 0x364 │ │ - ldc2l 9, cr7, [r7, #46] @ 0x2e @ │ │ - ldc2l 1, cr11, [r8, #608] @ 0x260 │ │ - ldc2l 4, cr9, [r6, #484] @ 0x1e4 │ │ - vcadd.f32 d23, d8, d8, #270 │ │ - ldc2l 4, cr9, [r6, #292] @ 0x124 │ │ - ldc2l 9, cr15, [r7, #180] @ 0xb4 @ │ │ + ldc2l 11, cr1, [r8, #380] @ 0x17c @ │ │ + ldc2l 5, cr9, [r6, #24] │ │ + ldc2l 9, cr7, [r7, #136] @ 0x88 @ │ │ + ldc2l 1, cr11, [r8, #788] @ 0x314 │ │ + ldc2l 4, cr9, [r6, #664] @ 0x298 │ │ + ldc2l 8, cr7, [r8, #212] @ 0xd4 │ │ + ldc2l 4, cr9, [r6, #472] @ 0x1d8 │ │ + ldc2l 9, cr15, [r7, #270] @ 0x10e @ │ │ ldc2l 4, cr3, [r9, #20] │ │ - ldc2l 3, cr15, [r8, #100] @ 0x64 │ │ - ldc2l 13, cr3, [r6, #596] @ 0x254 │ │ - ldc2l 14, cr1, [r6, #548] @ 0x224 │ │ - ldc2l 2, cr0, [r6, #932] @ 0x3a4 │ │ - ldc2l 8, cr13, [r7, #100] @ 0x64 │ │ - ldc2l 3, cr9, [r6, #292] @ 0x124 │ │ + ldc2l 3, cr15, [r8, #280] @ 0x118 │ │ + ldc2l 13, cr3, [r6, #776] @ 0x308 │ │ + ldc2l 14, cr1, [r6, #728] @ 0x2d8 │ │ + ldc2l 3, cr0, [r6, #88] @ 0x58 │ │ + vcadd.f32 , , q3, #270 │ │ + ldc2l 3, cr9, [r6, #472] @ 0x1d8 │ │ ldrdeq r0, [sl], -r4 @ │ │ eoreq r0, sl, r0, lsl #14 │ │ - ldc2l 14, cr11, [r6, #56] @ 0x38 │ │ - ldc2l 0, cr12, [r6, #432] @ 0x1b0 │ │ + ldc2l 14, cr11, [r6, #236] @ 0xec │ │ + ldc2l 0, cr12, [r6, #612] @ 0x264 │ │ cmp r1, #2 │ │ bcc 24ba750 │ │ ldr r0, [pc, #3412] @ 24bb490 │ │ movw r3, #1236 @ 0x4d4 │ │ ldr r2, [pc, #3408] @ 24bb494 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1429395,34 +1429394,34 @@ │ │ ldr r1, [pc, #3980] @ 24bbc54 │ │ sub r0, fp, #1488 @ 0x5d0 │ │ add r1, pc, r1 │ │ bl 270e090 │ │ b 24bb818 │ │ ldrbeq r8, [r7, #1376] @ 0x560 │ │ eoreq r0, sl, r8, ror r6 │ │ - ldc2l 0, cr13, [r5, #796] @ 0x31c │ │ + ldc2l 0, cr13, [r5, #976] @ 0x3d0 │ │ ldrbeq r8, [r7, #1940] @ 0x794 │ │ - ldc2l 1, cr8, [r8, #888] @ 0x378 │ │ - ldc2l 8, cr15, [r5, #740] @ 0x2e4 │ │ + ldc2l 2, cr8, [r8, #44] @ 0x2c │ │ + vcadd.f32 , , q11, #270 │ │ strhteq r0, [sl], -r0 │ │ eoreq r0, sl, r0, lsl r5 │ │ ldc2l 2, cr8, [r5, #800] @ 0x320 │ │ - ldc2l 15, cr11, [r6, #16] │ │ + ldc2l 15, cr11, [r6, #196] @ 0xc4 │ │ ldc2l 2, cr8, [r5, #592] @ 0x250 │ │ - ldc2l 14, cr11, [r6, #832] @ 0x340 │ │ + ldc2l 14, cr11, [r6, #1012] @ 0x3f4 │ │ ldc2l 9, cr4, [r9, #180] @ 0xb4 @ │ │ - ldc2l 14, cr11, [r6, #448] @ 0x1c0 │ │ + ldc2l 14, cr11, [r6, #628] @ 0x274 │ │ ldc2l 9, cr4, [r9, #106] @ 0x6a @ │ │ - ldc2l 14, cr11, [r6, #272] @ 0x110 │ │ + ldc2l 14, cr11, [r6, #452] @ 0x1c4 │ │ ldrbeq r8, [r7, #1324] @ 0x52c │ │ eoreq r0, sl, r4, asr #8 │ │ vcadd.f32 d20, d25, d29, #270 │ │ ldc2l 8, cr4, [r9, #468] @ 0x1d4 │ │ - ldc2l 13, cr11, [r6, #528] @ 0x210 │ │ - ldc2l 13, cr11, [r6, #352] @ 0x160 │ │ + ldc2l 13, cr11, [r6, #708] @ 0x2c4 │ │ + ldc2l 13, cr11, [r6, #532] @ 0x214 │ │ cmp r1, #2 │ │ bcc 24bad50 │ │ ldr r0, [pc, #4012] @ 24bbce8 │ │ movw r3, #1401 @ 0x579 │ │ ldr r2, [pc, #4008] @ 24bbcec │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1429596,32 +1429595,32 @@ │ │ ldr r2, [pc, #4012] @ 24bbf98 │ │ sub r0, fp, #784 @ 0x310 │ │ sub r1, fp, #1488 @ 0x5d0 │ │ add r2, pc, r2 │ │ mov r3, r2 │ │ bl 270e7a0 │ │ b 24bb818 │ │ - ldc2l 14, cr12, [r5, #12] │ │ + ldc2l 14, cr12, [r5, #192] @ 0xc0 │ │ ldrbeq r8, [r7, #1232] @ 0x4d0 │ │ - ldc2l 12, cr11, [r6, #368] @ 0x170 │ │ - ldc2l 12, cr11, [r6, #208] @ 0xd0 │ │ - ldc2l 11, cr11, [r6, #928] @ 0x3a0 @ │ │ - ldc2l 7, cr3, [r6, #208] @ 0xd0 │ │ - ldc2l 11, cr11, [r6, #592] @ 0x250 @ │ │ - ldc2l 14, cr12, [r8, #900] @ 0x384 │ │ - ldc2l 11, cr11, [r6, #256] @ 0x100 @ │ │ + ldc2l 12, cr11, [r6, #548] @ 0x224 │ │ + ldc2l 12, cr11, [r6, #388] @ 0x184 │ │ + ldc2l 12, cr11, [r6, #84] @ 0x54 │ │ + ldc2l 7, cr3, [r6, #388] @ 0x184 │ │ + ldc2l 11, cr11, [r6, #772] @ 0x304 @ │ │ + ldc2l 15, cr12, [r8, #56] @ 0x38 │ │ + ldc2l 11, cr11, [r6, #436] @ 0x1b4 @ │ │ ldc2l 6, cr4, [r9, #48] @ 0x30 │ │ ldc2l 5, cr4, [r9, #868] @ 0x364 │ │ - ldc2l 10, cr11, [r6, #928] @ 0x3a0 @ │ │ - ldc2l 15, cr10, [r7, #300] @ 0x12c │ │ - ldc2l 7, cr15, [r6, #340] @ 0x154 │ │ - ldc2l 10, cr11, [r6, #576] @ 0x240 @ │ │ + ldc2l 11, cr11, [r6, #84] @ 0x54 @ │ │ + ldc2l 15, cr10, [r7, #480] @ 0x1e0 │ │ + ldc2l 7, cr15, [r6, #520] @ 0x208 │ │ + ldc2l 10, cr11, [r6, #756] @ 0x2f4 @ │ │ ldrbeq r7, [r7, #4064] @ 0xfe0 │ │ - ldc2l 0, cr9, [r5, #828] @ 0x33c │ │ - ldc2l 10, cr11, [r6, #160] @ 0xa0 @ │ │ + ldc2l 0, cr9, [r5, #1008] @ 0x3f0 │ │ + ldc2l 10, cr11, [r6, #340] @ 0x154 @ │ │ ldrbeq r7, [r7, #3732] @ 0xe94 │ │ cmp r0, #0 │ │ beq 24bb0e4 │ │ ldr r0, [fp, #-1076] @ 0xfffffbcc │ │ sub r1, r0, #1 │ │ cmp r1, #2 │ │ bcc 24bb080 │ │ @@ -1429808,15 +1429807,15 @@ │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ ldr r0, [pc, #4088] @ 24bc340 │ │ add r0, pc, r0 │ │ b 24bb4bc │ │ eoreq r0, sl, r4, lsr #32 │ │ - vcadd.f32 d25, d22, d23, #270 │ │ + ldc2l 8, cr9, [r6, #848] @ 0x350 │ │ ldr r0, [fp, #-1076] @ 0xfffffbcc │ │ sub r1, r0, #1 │ │ cmp r1, #2 │ │ bcc 24bb380 │ │ ldr r0, [pc, #4056] @ 24bc344 │ │ movw r3, #1748 @ 0x6d4 │ │ ldr r2, [pc, #4052] @ 24bc348 │ │ @@ -1429838,16 +1429837,16 @@ │ │ add r2, r0, r1, lsl #5 │ │ ldr r1, [sp, #76] @ 0x4c │ │ ldr r3, [pc, #3988] @ 24bc350 │ │ add r0, lr, #808 @ 0x328 │ │ add r3, pc, r3 │ │ bl 270fbb0 │ │ b 24bb560 │ │ - ldc2l 7, cr0, [r9, #8] │ │ - ldc2l 9, cr11, [r6, #8] @ │ │ + ldc2l 7, cr0, [r9, #188] @ 0xbc │ │ + ldc2l 9, cr11, [r6, #98] @ 0x62 @ │ │ ldrbeq r7, [r7, #3864] @ 0xf18 │ │ cmp r1, #2 │ │ bcc 24bb3f8 │ │ ldr r0, [pc, #3952] @ 24bc354 │ │ movw r3, #1767 @ 0x6e7 │ │ ldr r2, [pc, #3948] @ 24bc358 │ │ add r0, pc, r0 │ │ @@ -1429874,30 +1429873,30 @@ │ │ add r8, sp, #920 @ 0x398 │ │ sub r1, r0, #1 │ │ cmp r1, #2 │ │ bcs 24bb498 │ │ ldr r0, [pc, #3856] @ 24bc364 │ │ add r0, pc, r0 │ │ b 24bb4bc │ │ - ldc2l 2, cr11, [r6, #560] @ 0x230 │ │ - ldc2l 13, cr6, [r8, #276] @ 0x114 │ │ - vcadd.f32 d27, d6, d28, #270 │ │ + ldc2l 2, cr11, [r6, #740] @ 0x2e4 │ │ + ldc2l 13, cr6, [r8, #456] @ 0x1c8 │ │ + ldc2l 8, cr11, [r6, #356] @ 0x164 │ │ ldrbeq r7, [r7, #3772] @ 0xebc │ │ - ldc2l 5, cr0, [r9, #840] @ 0x348 │ │ - ldc2l 7, cr11, [r6, #848] @ 0x350 │ │ + ldc2l 5, cr0, [r9, #1020] @ 0x3fc │ │ + vcadd.f32 d27, d6, d1, #270 │ │ ldrbeq r7, [r7, #3556] @ 0xde4 │ │ - ldc2l 14, cr8, [r5, #140] @ 0x8c │ │ - ldc2l 7, cr11, [r6, #496] @ 0x1f0 │ │ + ldc2l 14, cr8, [r5, #320] @ 0x140 │ │ + ldc2l 7, cr11, [r6, #676] @ 0x2a4 │ │ ldrbeq r7, [r7, #3056] @ 0xbf0 │ │ eoreq pc, r9, r0, lsl #27 │ │ - ldc2l 0, cr5, [r8, #580] @ 0x244 │ │ - ldc2l 6, cr11, [r6, #976] @ 0x3d0 │ │ - ldc2l 0, cr11, [r6, #688] @ 0x2b0 │ │ - ldc2l 10, cr6, [r8, #996] @ 0x3e4 @ │ │ - ldc2l 5, cr11, [r6, #896] @ 0x380 │ │ + ldc2l 0, cr5, [r8, #760] @ 0x2f8 │ │ + ldc2l 7, cr11, [r6, #132] @ 0x84 │ │ + ldc2l 0, cr11, [r6, #868] @ 0x364 │ │ + ldc2l 11, cr6, [r8, #152] @ 0x98 @ │ │ + ldc2l 6, cr11, [r6, #52] @ 0x34 │ │ ldr r0, [pc, #4064] @ 24bc480 │ │ movw r3, #1770 @ 0x6ea │ │ ldr r2, [pc, #4060] @ 24bc484 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ @@ -1430067,23 +1430066,23 @@ │ │ sub r2, fp, #1488 @ 0x5d0 │ │ add r0, lr, #120 @ 0x78 │ │ add r0, r0, r1, lsl #3 │ │ ldr r1, [sp, #28] │ │ bl 270f680 │ │ b 24bb7c0 │ │ ldrbeq r7, [r7, #3184] @ 0xc70 │ │ - ldc2l 3, cr0, [r9, #536] @ 0x218 │ │ - ldc2l 5, cr11, [r6, #544] @ 0x220 │ │ + ldc2l 3, cr0, [r9, #716] @ 0x2cc │ │ + ldc2l 5, cr11, [r6, #724] @ 0x2d4 │ │ ldrbeq r7, [r7, #2968] @ 0xb98 │ │ - ldc2l 11, cr8, [r5, #860] @ 0x35c @ │ │ - ldc2l 5, cr11, [r6, #192] @ 0xc0 │ │ + ldc2l 12, cr8, [r5, #16] │ │ + ldc2l 5, cr11, [r6, #372] @ 0x174 │ │ ldrbeq r7, [r7, #2468] @ 0x9a4 │ │ eoreq pc, r9, r4, lsr fp @ │ │ - ldc2l 1, cr15, [r6, #484] @ 0x1e4 │ │ - ldc2l 4, cr11, [r6, #720] @ 0x2d0 │ │ + ldc2l 1, cr15, [r6, #664] @ 0x298 │ │ + ldc2l 4, cr11, [r6, #900] @ 0x384 │ │ ldrbeq r7, [r7, #2556] @ 0x9fc │ │ cmp r0, #2 │ │ bcc 24bb7a8 │ │ ldr r0, [pc, #4088] @ 24bc78c │ │ mov r3, #1872 @ 0x750 │ │ ldr r2, [pc, #4084] @ 24bc790 │ │ add r0, pc, r0 │ │ @@ -1430261,18 +1430260,18 @@ │ │ movw r3, #2059 @ 0x80b │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ ldr r6, [fp, #-1076] @ 0xfffffbcc │ │ mov r1, r0 │ │ b 24bb974 │ │ eoreq pc, r9, r0, lsr #18 │ │ - ldc2l 12, cr4, [r8, #164] @ 0xa4 │ │ - ldc2l 2, cr11, [r6, #560] @ 0x230 │ │ - ldc2l 11, cr4, [r8, #884] @ 0x374 @ │ │ - ldc2l 2, cr11, [r6, #256] @ 0x100 │ │ + ldc2l 12, cr4, [r8, #344] @ 0x158 │ │ + ldc2l 2, cr11, [r6, #740] @ 0x2e4 │ │ + ldc2l 12, cr4, [r8, #40] @ 0x28 │ │ + ldc2l 2, cr11, [r6, #436] @ 0x1b4 │ │ ldr r2, [pc, #4084] @ 24bca70 │ │ sub lr, fp, #1024 @ 0x400 │ │ ldr r3, [pc, #4080] @ 24bca74 │ │ mov r0, #5 │ │ sub r5, lr, #60 @ 0x3c │ │ add lr, sp, #1024 @ 0x400 │ │ str r0, [sp, #12] │ │ @@ -1430297,18 +1430296,18 @@ │ │ ldr r7, [pc, #4052] @ 24bcab4 │ │ add r8, r1, #8 │ │ sub r9, fp, #472 @ 0x1d8 │ │ sub r4, fp, #1904 @ 0x770 │ │ add r7, pc, r7 │ │ mov r5, #7 │ │ b 24bbb34 │ │ - ldc2l 11, cr10, [r6, #480] @ 0x1e0 @ │ │ + ldc2l 11, cr10, [r6, #660] @ 0x294 @ │ │ ldrbeq r7, [r7, #2284] @ 0x8ec │ │ ldrbeq r7, [r7, #2256] @ 0x8d0 │ │ - ldc2l 10, cr4, [r8, #484] @ 0x1e4 @ │ │ + ldc2l 10, cr4, [r8, #664] @ 0x298 @ │ │ add r3, r9, r1, lsl #3 │ │ mov r0, r8 │ │ mov r1, r4 │ │ mov r2, r7 │ │ str r6, [sp] │ │ str r5, [sp, #4] │ │ bl 270d190 │ │ @@ -1430381,18 +1430380,18 @@ │ │ movw r3, #2084 @ 0x824 │ │ ldr r2, [pc, #4092] @ 24bcc30 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24bbb04 │ │ - ldc2l 0, cr11, [r6, #880] @ 0x370 │ │ + ldc2l 1, cr11, [r6, #36] @ 0x24 │ │ eoreq pc, r9, r8, lsl r7 @ │ │ - ldc2l 10, cr4, [r8, #100] @ 0x64 @ │ │ - ldc2l 0, cr11, [r6, #496] @ 0x1f0 │ │ + ldc2l 10, cr4, [r8, #280] @ 0x118 @ │ │ + ldc2l 0, cr11, [r6, #676] @ 0x2a4 │ │ strhteq pc, [r9], -r8 @ │ │ ldr r0, [pc, #4052] @ 24bcc34 │ │ mov r1, #186 @ 0xba │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #4040] @ 24bcc38 │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1430422,22 +1430421,22 @@ │ │ bl 270d9f0 │ │ ldr r1, [pc, #4044] @ 24bcca4 │ │ mov r0, r4 │ │ mov r2, #1 │ │ mov r3, #8 │ │ add r1, pc, r1 │ │ b 24b9a10 │ │ - ldc2l 4, cr6, [r8, #996] @ 0x3e4 │ │ - ldc2l 15, cr10, [r6, #896] @ 0x380 │ │ + ldc2l 5, cr6, [r8, #152] @ 0x98 │ │ + ldc2l 0, cr11, [r6, #52] @ 0x34 │ │ ldrbeq r7, [r7, #1648] @ 0x670 │ │ - ldc2l 13, cr15, [r8, #536] @ 0x218 │ │ - ldc2l 15, cr10, [r6, #544] @ 0x220 │ │ + ldc2l 13, cr15, [r8, #716] @ 0x2cc │ │ + ldc2l 15, cr10, [r6, #724] @ 0x2d4 │ │ ldrbeq r7, [r7, #1432] @ 0x598 │ │ - ldc2l 5, cr8, [r5, #860] @ 0x35c │ │ - ldc2l 15, cr10, [r6, #192] @ 0xc0 │ │ + ldc2l 6, cr8, [r5, #16] │ │ + ldc2l 15, cr10, [r6, #372] @ 0x174 │ │ ldrbeq r7, [r7, #932] @ 0x3a4 │ │ eoreq pc, r9, r4, lsr r5 @ │ │ mlaeq r9, ip, r4, pc @ │ │ eoreq pc, r9, r8, lsr r4 @ │ │ ldr r2, [pc, #3956] @ 24bcc94 │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r4, [pc, #3952] @ 24bcc98 │ │ @@ -1430592,16 +1430591,16 @@ │ │ bl 270d9f0 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #120 @ 0x78 │ │ mov r0, r4 │ │ mov r2, #1 │ │ mov r3, #80 @ 0x50 │ │ b 24b9a10 │ │ - ldc2l 6, cr4, [r8, #996] @ 0x3e4 │ │ - ldc2l 13, cr10, [r6, #368] @ 0x170 │ │ + ldc2l 7, cr4, [r8, #152] @ 0x98 │ │ + ldc2l 13, cr10, [r6, #548] @ 0x224 │ │ mlaeq r9, r0, r3, pc @ │ │ ldr r0, [sp, #64] @ 0x40 │ │ sub r1, fp, #1072 @ 0x430 │ │ add r2, sp, #84 @ 0x54 │ │ mov r3, #36 @ 0x24 │ │ bl 270cd90 │ │ ldr r0, [sp, #84] @ 0x54 │ │ @@ -1430641,26 +1430640,26 @@ │ │ mov r3, #36 @ 0x24 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3208] @ 24bccd0 │ │ mov r1, #23 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 24b95fc │ │ - ldc2l 10, cr15, [r8, #696] @ 0x2b8 @ │ │ - ldc2l 12, cr10, [r6, #704] @ 0x2c0 │ │ + ldc2l 10, cr15, [r8, #876] @ 0x36c @ │ │ + ldc2l 12, cr10, [r6, #884] @ 0x374 │ │ add r1, sp, #456 @ 0x1c8 │ │ ldr r0, [sp, #72] @ 0x48 │ │ str r0, [sp] │ │ add r2, r1, #4 │ │ add r3, r1, #8 │ │ sub r0, fp, #472 @ 0x1d8 │ │ bl 270f740 │ │ b 24bc544 │ │ ldrbeq r7, [r7, #708] @ 0x2c4 │ │ - ldc2l 6, cr10, [r6, #368] @ 0x170 │ │ + ldc2l 6, cr10, [r6, #548] @ 0x224 │ │ ldr r0, [pc, #3200] @ 24bcd0c │ │ mov r1, #205 @ 0xcd │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #3188] @ 24bcd10 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #808 @ 0x328 │ │ @@ -1430680,19 +1430679,19 @@ │ │ mov r3, #80 @ 0x50 │ │ bl 270d9f0 │ │ ldr r0, [pc, #3120] @ 24bcd14 │ │ mov r1, #18 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 24b95fc │ │ - ldc2l 4, cr2, [r8, #48] @ 0x30 │ │ - ldc2l 12, cr10, [r6, #128] @ 0x80 │ │ + ldc2l 4, cr2, [r8, #228] @ 0xe4 │ │ + ldc2l 12, cr10, [r6, #308] @ 0x134 │ │ ldrbeq r7, [r7, #600] @ 0x258 │ │ eoreq pc, r9, r8, lsr #4 │ │ - ldc2l 12, cr11, [r5, #508] @ 0x1fc │ │ + ldc2l 12, cr11, [r5, #688] @ 0x2b0 │ │ ldrbeq r7, [r7, #844] @ 0x34c │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r2, [pc, #2976] @ 24bccb4 │ │ ldr r3, [pc, #2976] @ 24bccb8 │ │ mov r1, #9 │ │ add r6, lr, #840 @ 0x348 │ │ sub lr, fp, #1024 @ 0x400 │ │ @@ -1430726,28 +1430725,28 @@ │ │ cmp r0, r1 │ │ bne 24bc998 │ │ sub lr, fp, #2048 @ 0x800 │ │ mov r1, r4 │ │ sub r0, lr, #152 @ 0x98 │ │ bl 270fbc0 │ │ b 24bc450 │ │ - ldc2l 9, cr4, [r6, #400] @ 0x190 @ │ │ - ldc2l 13, cr7, [r8, #876] @ 0x36c │ │ - ldc2l 10, cr9, [r8, #632] @ 0x278 @ │ │ - vcadd.f32 d26, d22, d17, #270 │ │ - ldc2l 10, cr10, [r6, #992] @ 0x3e0 @ │ │ + ldc2l 9, cr4, [r6, #490] @ 0x1ea @ │ │ + ldc2l 14, cr7, [r8, #32] │ │ + ldc2l 10, cr9, [r8, #812] @ 0x32c @ │ │ + vcadd.f32 q13, q11, q7, #270 │ │ + ldc2l 11, cr10, [r6, #148] @ 0x94 @ │ │ ldrbeq r7, [r7, #432] @ 0x1b0 │ │ eoreq pc, r9, r0, lsl #2 │ │ - ldc2l 13, cr7, [r8, #140] @ 0x8c │ │ - ldc2l 9, cr0, [r7, #162] @ 0xa2 @ │ │ - ldc2l 10, cr10, [r6, #384] @ 0x180 @ │ │ + ldc2l 13, cr7, [r8, #320] @ 0x140 │ │ + ldc2l 9, cr0, [r7, #252] @ 0xfc @ │ │ + ldc2l 10, cr10, [r6, #564] @ 0x234 @ │ │ ldrbeq r6, [r7, #3748] @ 0xea4 │ │ eoreq pc, r9, r4, ror r0 @ │ │ - vcadd.f32 q8, , , #270 │ │ - ldc2l 9, cr10, [r6, #480] @ 0x1e0 @ │ │ + ldc2l 9, cr0, [r7, #40] @ 0x28 @ │ │ + ldc2l 10, cr10, [r6, #116] @ 0x74 @ │ │ ldr r2, [pc, #2912] @ 24bcd48 │ │ sub lr, fp, #1024 @ 0x400 │ │ ldr r3, [pc, #2908] @ 24bcd4c │ │ mov r0, #32 │ │ sub r7, lr, #60 @ 0x3c │ │ add r1, sp, #904 @ 0x388 │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1430829,20 +1430828,20 @@ │ │ mov r0, r5 │ │ mov r2, #1 │ │ mov r3, #13 │ │ add r1, pc, r1 │ │ bl 270d9f0 │ │ b 24bc964 │ │ ldrbeq r6, [r7, #3796] @ 0xed4 │ │ - ldc2l 7, cr12, [r6, #164] @ 0xa4 │ │ - ldc2l 9, cr10, [r6, #352] @ 0x160 @ │ │ + ldc2l 7, cr12, [r6, #344] @ 0x158 │ │ + ldc2l 9, cr10, [r6, #442] @ 0x1ba @ │ │ ldrbeq r7, [r7, #240] @ 0xf0 │ │ eoreq lr, r9, r8, asr #31 │ │ - ldc2l 15, cr7, [r5, #920] @ 0x398 │ │ - ldc2l 9, cr10, [r6, #112] @ 0x70 @ │ │ + ldc2l 0, cr8, [r5, #76] @ 0x4c │ │ + ldc2l 9, cr10, [r6, #202] @ 0xca @ │ │ ldrbeq r6, [r7, #3836] @ 0xefc │ │ eoreq lr, r9, ip, asr #30 │ │ ldrbeq r6, [r7, #3720] @ 0xe88 │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r2, [pc, #2408] @ 24bccdc │ │ ldr r3, [pc, #2408] @ 24bcce0 │ │ mov r1, #11 │ │ @@ -1430908,16 +1430907,16 @@ │ │ mov r2, r8 │ │ mov r3, r8 │ │ bl 270e770 │ │ add r1, sp, #160 @ 0xa0 │ │ mov r0, r9 │ │ bl 270dde0 │ │ b 24b999c │ │ - ldc2l 13, cr5, [r8, #624] @ 0x270 │ │ - ldc2l 8, cr10, [r6, #496] @ 0x1f0 │ │ + ldc2l 13, cr5, [r8, #804] @ 0x324 │ │ + vcadd.f32 d26, d22, d25, #270 │ │ ldrbeq r6, [r7, #3616] @ 0xe20 │ │ mlaeq r9, r4, lr, lr │ │ ldr r0, [pc, #2280] @ 24bcd80 │ │ mov r1, #115 @ 0x73 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #2268] @ 24bcd84 │ │ @@ -1430938,16 +1430937,16 @@ │ │ mov r2, #1 │ │ bl 270da90 │ │ ldr r0, [pc, #2204] @ 24bcd88 │ │ add r0, pc, r0 │ │ b 24b9ad8 │ │ ldc2l 5, cr1, [r9, #616] @ 0x268 │ │ eoreq lr, r9, r8, lsr lr │ │ - ldc2l 1, cr4, [r8, #212] @ 0xd4 │ │ - ldc2l 7, cr10, [r6, #608] @ 0x260 │ │ + ldc2l 1, cr4, [r8, #392] @ 0x188 │ │ + ldc2l 7, cr10, [r6, #788] @ 0x314 │ │ ldr r0, [pc, #2044] @ 24bcd04 │ │ sub lr, fp, #2048 @ 0x800 │ │ sub r4, fp, #376 @ 0x178 │ │ ldr r1, [fp, #8] │ │ add r0, pc, r0 │ │ sub r2, lr, #152 @ 0x98 │ │ mov r3, r4 │ │ @@ -1430976,16 +1430975,16 @@ │ │ ldr r4, [pc, #2136] @ 24bcdd4 │ │ ldr r5, [pc, #2136] @ 24bcdd8 │ │ ldr r6, [pc, #2136] @ 24bcddc │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ add r6, pc, r6 │ │ b 24bc5bc │ │ - ldc2l 0, cr4, [r8, #932] @ 0x3a4 │ │ - ldc2l 7, cr10, [r6, #304] @ 0x130 │ │ + ldc2l 1, cr4, [r8, #88] @ 0x58 │ │ + ldc2l 7, cr10, [r6, #484] @ 0x1e4 │ │ ldr r0, [sp, #72] @ 0x48 │ │ add r1, r0, r1, lsl #3 │ │ mov r0, r4 │ │ bl 270d130 │ │ ldr r1, [fp, #-1076] @ 0xfffffbcc │ │ add r0, r1, #1 │ │ cmp r1, #3 │ │ @@ -1431018,16 +1431017,16 @@ │ │ ldr r4, [pc, #1924] @ 24bcda8 │ │ ldr r5, [pc, #1924] @ 24bcdac │ │ ldr r6, [pc, #1924] @ 24bcdb0 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ add r6, pc, r6 │ │ b 24bc668 │ │ - ldc2l 0, cr4, [r8, #388] @ 0x184 │ │ - ldc2l 6, cr10, [r6, #784] @ 0x310 │ │ + ldc2l 0, cr4, [r8, #568] @ 0x238 │ │ + ldc2l 6, cr10, [r6, #964] @ 0x3c4 │ │ eoreq lr, r9, r0, lsl #26 │ │ ldr r0, [sp, #72] @ 0x48 │ │ add r1, r0, r1, lsl #3 │ │ mov r0, r4 │ │ bl 270d130 │ │ ldr r1, [fp, #-1076] @ 0xfffffbcc │ │ add r0, r1, #1 │ │ @@ -1431040,16 +1431039,16 @@ │ │ bgt 24bc644 │ │ mov r0, r5 │ │ mov r2, r6 │ │ movw r3, #2234 @ 0x8ba │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24bc644 │ │ - ldc2l 0, cr4, [r8, #4] │ │ - ldc2l 6, cr10, [r6, #400] @ 0x190 │ │ + ldc2l 0, cr4, [r8, #184] @ 0xb8 │ │ + ldc2l 6, cr10, [r6, #580] @ 0x244 │ │ eoreq lr, r9, r0, lsr #25 │ │ ldr r0, [pc, #1720] @ 24bcd5c │ │ mov r1, #203 @ 0xcb │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r0, [pc, #1708] @ 24bcd60 │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1431072,16 +1431071,16 @@ │ │ ldr r0, [pc, #1648] @ 24bcd6c │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, r1, r1, lsl #2 │ │ add r2, lr, #840 @ 0x348 │ │ add r0, pc, r0 │ │ add r1, r2, r1, lsl #4 │ │ b 24bbf84 │ │ - ldc2l 15, cr3, [r8, #580] @ 0x244 │ │ - ldc2l 5, cr10, [r6, #976] @ 0x3d0 │ │ + ldc2l 15, cr3, [r8, #760] @ 0x2f8 │ │ + ldc2l 6, cr10, [r6, #132] @ 0x84 │ │ ldr r1, [pc, #1684] @ 24bcdb4 │ │ sub lr, fp, #2048 @ 0x800 │ │ ldr r0, [fp, #8] │ │ sub r2, lr, #152 @ 0x98 │ │ add r1, pc, r1 │ │ sub r3, fp, #376 @ 0x178 │ │ bl 270fef0 │ │ @@ -1431103,16 +1431102,16 @@ │ │ ldr r4, [pc, #1604] @ 24bcdbc │ │ ldr r5, [pc, #1604] @ 24bcdc0 │ │ ldr r6, [pc, #1604] @ 24bcdc4 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ add r6, pc, r6 │ │ b 24bc7b4 │ │ - ldc2l 15, cr3, [r8, #148] @ 0x94 │ │ - ldc2l 5, cr10, [r6, #544] @ 0x220 │ │ + ldc2l 15, cr3, [r8, #328] @ 0x148 │ │ + ldc2l 5, cr10, [r6, #724] @ 0x2d4 │ │ add r1, r9, r1, lsl #3 │ │ mov r0, r4 │ │ bl 270d130 │ │ ldr r1, [fp, #-1076] @ 0xfffffbcc │ │ add r0, r1, #1 │ │ cmp r1, #3 │ │ str r0, [fp, #-1076] @ 0xfffffbcc │ │ @@ -1431123,18 +1431122,18 @@ │ │ bgt 24bc794 │ │ mov r0, r5 │ │ mov r2, r6 │ │ mov r3, #2256 @ 0x8d0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24bc794 │ │ - ldc2l 14, cr3, [r8, #804] @ 0x324 │ │ - ldc2l 5, cr10, [r6, #176] @ 0xb0 │ │ - ldc2l 14, cr3, [r8, #436] @ 0x1b4 │ │ - ldc2l 4, cr10, [r6, #832] @ 0x340 │ │ + ldc2l 14, cr3, [r8, #984] @ 0x3d8 │ │ + ldc2l 5, cr10, [r6, #356] @ 0x164 │ │ + ldc2l 14, cr3, [r8, #616] @ 0x268 │ │ + ldc2l 4, cr10, [r6, #1012] @ 0x3f4 │ │ eoreq lr, r9, ip, lsl #22 │ │ ldr r0, [sp, #72] @ 0x48 │ │ sub r1, fp, #484 @ 0x1e4 │ │ add lr, sp, #1024 @ 0x400 │ │ str r0, [sp] │ │ add r3, r1, #4 │ │ add r0, lr, #120 @ 0x78 │ │ @@ -1431165,17 +1431164,17 @@ │ │ add r1, sp, #160 @ 0xa0 │ │ ldr r2, [pc, #1288] @ 24bcd7c │ │ add r2, pc, r2 │ │ str r2, [sp] │ │ str r0, [sp, #4] │ │ sub r0, fp, #376 @ 0x178 │ │ b 24bc53c │ │ - ldc2l 14, cr3, [r8, #100] @ 0x64 │ │ - ldc2l 4, cr10, [r6, #496] @ 0x1f0 │ │ - ldc2l 10, cr5, [r8, #680] @ 0x2a8 @ │ │ + ldc2l 14, cr3, [r8, #280] @ 0x118 │ │ + ldc2l 4, cr10, [r6, #676] @ 0x2a4 │ │ + ldc2l 10, cr5, [r8, #860] @ 0x35c @ │ │ mlaeq r9, ip, sl, lr │ │ ldr r0, [pc, #1160] @ 24bcd24 │ │ mov r1, #452 @ 0x1c4 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #1148] @ 24bcd28 │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1431192,18 +1431191,18 @@ │ │ bl 270da90 │ │ mov r0, r4 │ │ mov r1, r5 │ │ mov r2, #1 │ │ mov r3, #32 │ │ bl 270d9f0 │ │ b 24bcc80 │ │ - ldc2l 15, cr9, [r5, #808] @ 0x328 │ │ + ldc2l 15, cr9, [r5, #988] @ 0x3dc │ │ eoreq lr, r9, r8, asr #20 │ │ eoreq lr, r9, r0, lsr sl │ │ - ldc2l 3, cr10, [r6, #736] @ 0x2e0 │ │ + ldc2l 3, cr10, [r6, #916] @ 0x394 │ │ ldr r0, [pc, #1060] @ 24bcd2c │ │ movw r1, #329 @ 0x149 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #1048] @ 24bcd30 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #808 @ 0x328 │ │ @@ -1431233,15 +1431232,15 @@ │ │ ldr r0, [pc, #920] @ 24bcd18 │ │ add r0, pc, r0 │ │ b 24bcc48 │ │ ldr r0, [pc, #840] @ 24bccd4 │ │ mov r1, #168 @ 0xa8 │ │ add r0, pc, r0 │ │ b 24bcb6c │ │ - ldc2l 12, cr13, [r7, #508] @ 0x1fc │ │ + ldc2l 12, cr13, [r7, #688] @ 0x2b0 │ │ ldr r0, [sp, #64] @ 0x40 │ │ sub r1, fp, #1072 @ 0x430 │ │ add r2, sp, #84 @ 0x54 │ │ mov r3, #36 @ 0x24 │ │ bl 270cd90 │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r0, #0 │ │ @@ -1431250,15 +1431249,15 @@ │ │ sub r1, fp, #1072 @ 0x430 │ │ mov r2, #36 @ 0x24 │ │ bl 270daa0 │ │ ldr r0, [pc, #756] @ 24bccc4 │ │ mov r1, #212 @ 0xd4 │ │ add r0, pc, r0 │ │ b 24bcbe8 │ │ - ldc2l 1, cr12, [r6, #604] @ 0x25c │ │ + ldc2l 1, cr12, [r6, #784] @ 0x310 │ │ eoreq lr, r9, pc, ror #17 │ │ ldr r0, [pc, #1024] @ 24bcde8 │ │ mov r1, #215 @ 0xd7 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #1012] @ 24bcdec │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1431266,15 +1431265,15 @@ │ │ mov r2, #1 │ │ add r4, pc, r4 │ │ mov r3, #32 │ │ mov r0, r4 │ │ bl 270d9f0 │ │ sub r1, fp, #472 @ 0x1d8 │ │ b 24bbf80 │ │ - ldc2l 3, cr14, [r5, #896] @ 0x380 │ │ + ldc2l 4, cr14, [r5, #52] @ 0x34 │ │ sub r4, fp, #1824 @ 0x720 │ │ sub r0, fp, #376 @ 0x178 │ │ mov r1, r4 │ │ bl 270dde0 │ │ sub r9, fp, #1072 @ 0x430 │ │ add r1, sp, #160 @ 0xa0 │ │ mov r0, r4 │ │ @@ -1431288,15 +1431287,15 @@ │ │ ldr r4, [pc, #876] @ 24bcdc8 │ │ ldr r5, [pc, #876] @ 24bcdcc │ │ ldr r8, [pc, #876] @ 24bcdd0 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ add r8, pc, r8 │ │ b 24bca9c │ │ - ldc2l 0, cr4, [r6, #952] @ 0x3b8 │ │ + ldc2l 1, cr4, [r6, #108] @ 0x6c │ │ eoreq lr, r9, r8, ror #17 │ │ ldr r2, [sp, #72] @ 0x48 │ │ add r0, r9, r7, lsl #3 │ │ add r1, r2, r1, lsl #3 │ │ bl 270efa0 │ │ ldr r1, [fp, #-1076] @ 0xfffffbcc │ │ add r0, r1, #1 │ │ @@ -1431323,15 +1431322,15 @@ │ │ bcc 24bca78 │ │ mov r0, r4 │ │ mov r2, r5 │ │ movw r3, #2274 @ 0x8e2 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24bca78 │ │ - ldc2l 0, cr12, [r6, #124] @ 0x7c │ │ + ldc2l 0, cr12, [r6, #304] @ 0x130 │ │ ldr r0, [pc, #560] @ 24bcd38 │ │ movw r1, #322 @ 0x142 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #548] @ 24bcd3c │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #808 @ 0x328 │ │ @@ -1431345,17 +1431344,17 @@ │ │ add r1, lr, #171 @ 0xab │ │ mov r2, #1 │ │ mov r3, #5 │ │ bl 270d9f0 │ │ ldr r0, [pc, #496] @ 24bcd40 │ │ add r0, pc, r0 │ │ b 24b9ad8 │ │ - ldc2l 1, cr10, [r6, #800] @ 0x320 │ │ - ldc2l 2, cr14, [r5, #672] @ 0x2a0 │ │ - ldc2l 1, cr10, [r6, #624] @ 0x270 │ │ + ldc2l 1, cr10, [r6, #980] @ 0x3d4 │ │ + ldc2l 2, cr14, [r5, #852] @ 0x354 │ │ + ldc2l 1, cr10, [r6, #804] @ 0x324 │ │ ldr r0, [pc, #404] @ 24bccfc │ │ mov r1, #169 @ 0xa9 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #352] @ 24bccd8 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #808 @ 0x328 │ │ @@ -1431364,17 +1431363,17 @@ │ │ mov r3, #32 │ │ mov r0, r4 │ │ bl 270d9f0 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #840 @ 0x348 │ │ b 24bbf80 │ │ eoreq lr, r9, r0, asr #15 │ │ - ldc2l 2, cr13, [r8, #136] @ 0x88 │ │ - ldc2l 1, cr10, [r6, #256] @ 0x100 │ │ - ldc2l 1, cr13, [r8, #840] @ 0x348 │ │ + ldc2l 2, cr13, [r8, #316] @ 0x13c │ │ + ldc2l 1, cr10, [r6, #436] @ 0x1b4 │ │ + ldc2l 1, cr13, [r8, #1020] @ 0x3fc │ │ ldr r0, [sp, #64] @ 0x40 │ │ sub r1, fp, #1072 @ 0x430 │ │ add r2, sp, #84 @ 0x54 │ │ mov r3, #36 @ 0x24 │ │ bl 270cd90 │ │ ldr r0, [sp, #84] @ 0x54 │ │ cmp r0, #0 │ │ @@ -1431400,17 +1431399,17 @@ │ │ mov r2, #1 │ │ mov r3, #36 @ 0x24 │ │ mov r1, r5 │ │ bl 270d9f0 │ │ ldr r1, [pc, #160] @ 24bcccc │ │ add r1, pc, r1 │ │ b 24bc01c │ │ - ldc2l 0, cr10, [r6, #960] @ 0x3c0 │ │ - ldc2l 15, cr7, [r6, #32] │ │ - ldc2l 2, cr7, [r6, #292] @ 0x124 │ │ + ldc2l 1, cr10, [r6, #116] @ 0x74 │ │ + ldc2l 15, cr7, [r6, #212] @ 0xd4 │ │ + ldc2l 2, cr7, [r6, #472] @ 0x1d8 │ │ ldc2l 2, cr1, [r9, #212] @ 0xd4 │ │ ldr r0, [pc, #252] @ 24bcd44 │ │ add r0, pc, r0 │ │ movw r1, #310 @ 0x136 │ │ bl 270d990 │ │ ldr r4, [pc, #196] @ 24bcd1c │ │ add lr, sp, #1024 @ 0x400 │ │ @@ -1431425,101 +1431424,101 @@ │ │ mov r2, #1 │ │ bl 270da90 │ │ ldr r0, [pc, #152] @ 24bcd20 │ │ mov r1, #24 │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ b 24b95fc │ │ - ldc2l 13, cr13, [r6, #580] @ 0x244 │ │ + ldc2l 13, cr13, [r6, #760] @ 0x2f8 │ │ eoreq lr, r9, ip, ror #12 │ │ - ldc2l 11, cr9, [r5, #476] @ 0x1dc @ │ │ - ldc2l 8, cr15, [r7, #76] @ 0x4c │ │ - ldc2l 14, cr14, [r8, #276] @ 0x114 │ │ - ldc2l 15, cr10, [r8, #948] @ 0x3b4 │ │ - ldc2l 14, cr6, [r6, #852] @ 0x354 │ │ - ldc2l 4, cr15, [r7, #816] @ 0x330 │ │ - ldc2l 9, cr9, [r6, #326] @ 0x146 @ │ │ + ldc2l 11, cr9, [r5, #656] @ 0x290 @ │ │ + vcadd.f32 , , q0, #270 │ │ + ldc2l 14, cr14, [r8, #456] @ 0x1c8 │ │ + ldc2l 0, cr11, [r8, #104] @ 0x68 │ │ + ldc2l 15, cr6, [r6, #8] │ │ + ldc2l 4, cr15, [r7, #996] @ 0x3e4 │ │ + ldc2l 9, cr9, [r6, #416] @ 0x1a0 @ │ │ eoreq lr, r9, r0, asr #4 │ │ - ldc2l 4, cr5, [r7, #780] @ 0x30c │ │ + ldc2l 4, cr5, [r7, #960] @ 0x3c0 │ │ ldrbeq r6, [r7, #12] │ │ - ldc2l 0, cr13, [r6, #176] @ 0xb0 │ │ - ldc2l 2, cr6, [r6, #788] @ 0x314 │ │ - ldc2l 10, cr4, [r7, #12] @ │ │ - ldc2l 3, cr7, [r5, #564] @ 0x234 │ │ - ldc2l 2, cr15, [r6, #584] @ 0x248 │ │ - ldc2l 3, cr6, [r6, #260] @ 0x104 │ │ - ldc2l 7, cr9, [r6, #308] @ 0x134 │ │ + ldc2l 0, cr13, [r6, #356] @ 0x164 │ │ + ldc2l 2, cr6, [r6, #968] @ 0x3c8 │ │ + ldc2l 10, cr4, [r7, #192] @ 0xc0 @ │ │ + ldc2l 3, cr7, [r5, #744] @ 0x2e8 │ │ + ldc2l 2, cr15, [r6, #764] @ 0x2fc │ │ + ldc2l 3, cr6, [r6, #440] @ 0x1b8 │ │ + ldc2l 7, cr9, [r6, #488] @ 0x1e8 │ │ eoreq sp, r9, r0, ror #31 │ │ - ldc2l 2, cr5, [r7, #396] @ 0x18c │ │ + ldc2l 2, cr5, [r7, #576] @ 0x240 │ │ ldrbeq r5, [r7, #3500] @ 0xdac │ │ - ldc2l 14, cr10, [r6, #752] @ 0x2f0 │ │ + ldc2l 14, cr10, [r6, #932] @ 0x3a4 │ │ eoreq sp, r9, r0, ror pc │ │ eoreq sp, r9, r4, asr pc │ │ eoreq sp, r9, r4, asr #30 │ │ - ldc2l 7, cr10, [r7, #428] @ 0x1ac │ │ + ldc2l 7, cr10, [r7, #608] @ 0x260 │ │ eoreq sp, r9, r4, lsr #30 │ │ ldrbeq r5, [r7, #4040] @ 0xfc8 │ │ eoreq sp, r9, r4, asr lr │ │ - ldc2l 3, cr13, [r7, #556] @ 0x22c │ │ - ldc2l 14, cr6, [r6, #116] @ 0x74 │ │ - ldc2l 4, cr15, [r7, #60] @ 0x3c │ │ - ldc2l 10, cr6, [r5, #452] @ 0x1c4 @ │ │ - ldc2l 2, cr6, [r6, #388] @ 0x184 │ │ + ldc2l 3, cr13, [r7, #736] @ 0x2e0 │ │ + ldc2l 14, cr6, [r6, #296] @ 0x128 │ │ + ldc2l 4, cr15, [r7, #240] @ 0xf0 │ │ + ldc2l 10, cr6, [r5, #632] @ 0x278 @ │ │ + ldc2l 2, cr6, [r6, #568] @ 0x238 │ │ ldc2l 10, cr1, [r9, #460] @ 0x1cc @ │ │ - ldc2l 14, cr8, [r5, #580] @ 0x244 │ │ - ldc2l 6, cr6, [r6, #52] @ 0x34 │ │ - ldc2l 11, cr12, [r7, #884] @ 0x374 @ │ │ - ldc2l 5, cr6, [r6, #644] @ 0x284 │ │ + ldc2l 14, cr8, [r5, #760] @ 0x2f8 │ │ + ldc2l 6, cr6, [r6, #232] @ 0xe8 │ │ + ldc2l 12, cr12, [r7, #40] @ 0x28 │ │ + ldc2l 5, cr6, [r6, #824] @ 0x338 │ │ ldc2l 12, cr3, [r9, #156] @ 0x9c │ │ - ldc2l 2, cr11, [r5, #808] @ 0x328 │ │ - ldc2l 3, cr6, [r6, #644] @ 0x284 │ │ - ldc2l 8, cr8, [r6, #972] @ 0x3cc │ │ - ldc2l 15, cr4, [r6, #416] @ 0x1a0 │ │ + ldc2l 2, cr11, [r5, #988] @ 0x3dc │ │ + ldc2l 3, cr6, [r6, #824] @ 0x338 │ │ + ldc2l 9, cr8, [r6, #64] @ 0x40 @ │ │ + ldc2l 15, cr4, [r6, #596] @ 0x254 │ │ eoreq lr, r9, r7, asr #2 │ │ eoreq lr, r9, r4, ror r1 │ │ - ldc2l 14, cr10, [r8, #728] @ 0x2d8 │ │ - ldc2l 11, cr6, [r6, #900] @ 0x384 @ │ │ - ldc2l 12, cr6, [r8, #572] @ 0x23c │ │ - ldc2l 10, cr10, [r8, #56] @ 0x38 @ │ │ - vcadd.f32 d22, d6, d5, #270 │ │ + ldc2l 14, cr10, [r8, #908] @ 0x38c │ │ + ldc2l 12, cr6, [r6, #56] @ 0x38 │ │ + ldc2l 12, cr6, [r8, #752] @ 0x2f0 │ │ + ldc2l 10, cr10, [r8, #236] @ 0xec @ │ │ + ldc2l 8, cr6, [r6, #200] @ 0xc8 │ │ ldc2l 1, cr2, [r9, #180] @ 0xb4 │ │ - ldc2l 6, cr9, [r6, #240] @ 0xf0 │ │ - ldc2l 7, cr6, [r6, #756] @ 0x2f4 │ │ + ldc2l 6, cr9, [r6, #420] @ 0x1a4 │ │ + ldc2l 7, cr6, [r6, #936] @ 0x3a8 │ │ ldrbeq r5, [r7, #3260] @ 0xcbc │ │ eoreq sp, r9, r4, asr #22 │ │ ldrbeq r5, [r7, #3212] @ 0xc8c │ │ eoreq sp, r9, r0, lsl fp │ │ - ldc2l 2, cr3, [r8, #160] @ 0xa0 │ │ - ldc2l 10, cr6, [r6, #68] @ 0x44 @ │ │ - ldc2l 7, cr8, [r8, #740] @ 0x2e4 │ │ + ldc2l 2, cr3, [r8, #340] @ 0x154 │ │ + ldc2l 10, cr6, [r6, #248] @ 0xf8 @ │ │ + ldc2l 7, cr8, [r8, #920] @ 0x398 │ │ eoreq lr, r9, r8, asr #10 │ │ eoreq lr, r9, ip, lsr #10 │ │ ldc2l 7, cr4, [r9, #228] @ 0xe4 │ │ - ldc2l 14, cr9, [r6, #704] @ 0x2c0 │ │ - ldc2l 15, cr12, [r8, #340] @ 0x154 │ │ - ldc2l 14, cr9, [r6, #432] @ 0x1b0 │ │ + ldc2l 14, cr9, [r6, #884] @ 0x374 │ │ + ldc2l 15, cr12, [r8, #520] @ 0x208 │ │ + ldc2l 14, cr9, [r6, #612] @ 0x264 │ │ eoreq lr, r9, r4, asr r4 │ │ eoreq sp, r9, ip, asr sp │ │ - ldc2l 13, cr6, [r7, #384] @ 0x180 │ │ - ldc2l 6, cr9, [r6, #976] @ 0x3d0 │ │ + ldc2l 13, cr6, [r7, #564] @ 0x234 │ │ + ldc2l 7, cr9, [r6, #132] @ 0x84 │ │ ldrbeq r5, [r7, #3504] @ 0xdb0 │ │ eoreq sp, r9, r0, lsr ip │ │ eoreq sp, r9, r8, lsl #24 │ │ - ldc2l 5, cr8, [r8, #216] @ 0xd8 │ │ - ldc2l 5, cr9, [r6, #640] @ 0x280 │ │ - ldc2l 9, cr6, [r7, #88] @ 0x58 @ │ │ - ldc2l 2, cr9, [r6, #768] @ 0x300 │ │ + ldc2l 5, cr8, [r8, #396] @ 0x18c │ │ + ldc2l 5, cr9, [r6, #820] @ 0x334 │ │ + ldc2l 9, cr6, [r7, #178] @ 0xb2 @ │ │ + ldc2l 2, cr9, [r6, #948] @ 0x3b4 │ │ ldc2l 11, cr3, [r9, #288] @ 0x120 @ │ │ eoreq sp, r9, r4, lsl #28 │ │ - ldc2l 14, cr6, [r7, #32] │ │ - ldc2l 7, cr9, [r6, #624] @ 0x270 │ │ - ldc2l 6, cr3, [r8, #776] @ 0x308 │ │ - ldc2l 15, cr6, [r6, #356] @ 0x164 │ │ - ldc2l 3, cr13, [r5, #432] @ 0x1b0 │ │ - ldc2l 4, cr6, [r6, #772] @ 0x304 │ │ + ldc2l 14, cr6, [r7, #212] @ 0xd4 │ │ + ldc2l 7, cr9, [r6, #804] @ 0x324 │ │ + ldc2l 6, cr3, [r8, #956] @ 0x3bc │ │ + ldc2l 15, cr6, [r6, #536] @ 0x218 │ │ + ldc2l 3, cr13, [r5, #612] @ 0x264 │ │ + ldc2l 4, cr6, [r6, #952] @ 0x3b8 │ │ │ │ 024bcdf0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d13} │ │ sub sp, sp, #760 @ 0x2f8 │ │ @@ -1432468,15 +1432467,15 @@ │ │ ldr r1, [pc, #544] @ 24bdee4 │ │ add r2, sp, #88 @ 0x58 │ │ add r1, pc, r1 │ │ bl 270f460 │ │ mvn r4, #71 @ 0x47 │ │ mov r6, r5 │ │ b 24bdcf4 │ │ - ldc2l 7, cr4, [r8, #636] @ 0x27c │ │ + ldc2l 7, cr4, [r8, #816] @ 0x330 │ │ add r0, r7, r1, lsl #3 │ │ add r4, r4, #1 │ │ add r6, r6, #8 │ │ cmn r4, #66 @ 0x42 │ │ vstr d8, [r0] │ │ beq 24bde40 │ │ ldr r0, [fp, #-92] @ 0xffffffa4 │ │ @@ -1432557,15 +1432556,15 @@ │ │ bcc 24bdcdc │ │ mov r0, r9 │ │ mov r2, sl │ │ mov r3, #504 @ 0x1f8 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24bdcdc │ │ - ldc2l 7, cr4, [r8, #492] @ 0x1ec │ │ + ldc2l 7, cr4, [r8, #672] @ 0x2a0 │ │ ldr r0, [fp, #-92] @ 0xffffffa4 │ │ ldr r6, [pc, #156] @ 24bdee8 │ │ add r6, pc, r6 │ │ sub r1, r0, #1 │ │ sub r4, fp, #140 @ 0x8c │ │ cmp r1, #10 │ │ str r1, [fp, #-88] @ 0xffffffa8 │ │ @@ -1432584,68 +1432583,68 @@ │ │ bcc 24bdbac │ │ mov r0, r6 │ │ mov r2, sl │ │ movw r3, #514 @ 0x202 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24bdbac │ │ - ldc2l 0, cr0, [r8, #996] @ 0x3e4 │ │ - ldc2l 14, cr5, [r6, #660] @ 0x294 │ │ - ldc2l 1, cr8, [r5, #652] @ 0x28c │ │ - ldc2l 14, cr15, [r7, #452] @ 0x1c4 │ │ - ldc2l 12, cr5, [r6, #116] @ 0x74 │ │ - ldc2l 4, cr14, [r6, #160] @ 0xa0 │ │ - ldc2l 5, cr10, [r8, #692] @ 0x2b4 │ │ - ldc2l 8, cr7, [r8, #500] @ 0x1f4 │ │ - ldc2l 2, cr14, [r6, #416] @ 0x1a0 │ │ - ldc2l 3, cr10, [r8, #948] @ 0x3b4 │ │ - ldc2l 2, cr14, [r6, #192] @ 0xc0 │ │ - ldc2l 3, cr10, [r8, #724] @ 0x2d4 │ │ - vcadd.f32 d29, d22, d4, #270 │ │ - ldc2l 10, cr9, [r8, #36] @ 0x24 @ │ │ - ldc2l 13, cr6, [r8, #516] @ 0x204 │ │ + ldc2l 1, cr0, [r8, #152] @ 0x98 │ │ + ldc2l 14, cr5, [r6, #840] @ 0x348 │ │ + ldc2l 1, cr8, [r5, #832] @ 0x340 │ │ + ldc2l 14, cr15, [r7, #632] @ 0x278 │ │ + ldc2l 12, cr5, [r6, #296] @ 0x128 │ │ + ldc2l 4, cr14, [r6, #340] @ 0x154 │ │ + ldc2l 5, cr10, [r8, #872] @ 0x368 │ │ + vcadd.f32 d23, d24, d26, #270 │ │ + ldc2l 2, cr14, [r6, #596] @ 0x254 │ │ + ldc2l 4, cr10, [r8, #104] @ 0x68 │ │ + ldc2l 2, cr14, [r6, #372] @ 0x174 │ │ + ldc2l 3, cr10, [r8, #904] @ 0x388 │ │ + ldc2l 8, cr13, [r6, #708] @ 0x2c4 │ │ + ldc2l 10, cr9, [r8, #216] @ 0xd8 @ │ │ + ldc2l 13, cr6, [r8, #696] @ 0x2b8 │ │ ldrdeq ip, [r9], -ip @ │ │ - ldc2l 5, cr13, [r6, #864] @ 0x360 │ │ - ldc2l 1, cr14, [r6, #928] @ 0x3a0 │ │ - ldc2l 3, cr10, [r8, #436] @ 0x1b4 │ │ - ldc2l 14, cr1, [r8, #484] @ 0x1e4 │ │ - ldc2l 1, cr10, [r8, #1012] @ 0x3f4 │ │ - ldc2l 12, cr1, [r8, #708] @ 0x2c4 │ │ - ldc2l 0, cr10, [r8, #212] @ 0xd4 │ │ - ldc2l 12, cr1, [r8, #500] @ 0x1f4 │ │ - ldc2l 12, cr1, [r8, #276] @ 0x114 │ │ - ldc2l 15, cr9, [r8, #804] @ 0x324 │ │ - ldc2l 12, cr1, [r8, #52] @ 0x34 │ │ - ldc2l 15, cr9, [r8, #580] @ 0x244 │ │ - ldc2l 11, cr1, [r8, #52] @ 0x34 @ │ │ - ldc2l 14, cr9, [r8, #580] @ 0x244 │ │ - ldc2l 10, cr1, [r8, #420] @ 0x1a4 @ │ │ - ldc2l 13, cr9, [r8, #948] @ 0x3b4 │ │ - ldc2l 9, cr1, [r8, #338] @ 0x152 @ │ │ - ldc2l 13, cr9, [r8, #180] @ 0xb4 │ │ - ldc2l 9, cr1, [r8, #130] @ 0x82 @ │ │ - ldc2l 12, cr9, [r8, #788] @ 0x314 │ │ - ldc2l 9, cr1, [r8, #26] @ │ │ - ldc2l 12, cr9, [r8, #580] @ 0x244 │ │ - ldc2l 8, cr1, [r8, #868] @ 0x364 │ │ - ldc2l 12, cr9, [r8, #372] @ 0x174 │ │ - vcadd.f32 d17, d24, d21, #270 │ │ - ldc2l 12, cr9, [r8, #164] @ 0xa4 │ │ - ldc2l 8, cr1, [r8, #452] @ 0x1c4 │ │ - ldc2l 11, cr9, [r8, #980] @ 0x3d4 @ │ │ - ldc2l 8, cr1, [r8, #228] @ 0xe4 │ │ - ldc2l 11, cr9, [r8, #756] @ 0x2f4 @ │ │ - ldc2l 9, cr13, [r6] @ │ │ - ldc2l 10, cr9, [r8, #532] @ 0x214 @ │ │ + ldc2l 6, cr13, [r6, #20] │ │ + ldc2l 2, cr14, [r6, #84] @ 0x54 │ │ + ldc2l 3, cr10, [r8, #616] @ 0x268 │ │ + ldc2l 14, cr1, [r8, #664] @ 0x298 │ │ + ldc2l 2, cr10, [r8, #168] @ 0xa8 │ │ + ldc2l 12, cr1, [r8, #888] @ 0x378 │ │ + ldc2l 0, cr10, [r8, #392] @ 0x188 │ │ + ldc2l 12, cr1, [r8, #680] @ 0x2a8 │ │ + ldc2l 12, cr1, [r8, #456] @ 0x1c8 │ │ + ldc2l 15, cr9, [r8, #984] @ 0x3d8 │ │ + ldc2l 12, cr1, [r8, #232] @ 0xe8 │ │ + ldc2l 15, cr9, [r8, #760] @ 0x2f8 │ │ + ldc2l 11, cr1, [r8, #232] @ 0xe8 @ │ │ + ldc2l 14, cr9, [r8, #760] @ 0x2f8 │ │ + ldc2l 10, cr1, [r8, #600] @ 0x258 @ │ │ + ldc2l 14, cr9, [r8, #104] @ 0x68 │ │ + ldc2l 9, cr1, [r8, #428] @ 0x1ac @ │ │ + ldc2l 13, cr9, [r8, #360] @ 0x168 │ │ + ldc2l 9, cr1, [r8, #220] @ 0xdc @ │ │ + ldc2l 12, cr9, [r8, #968] @ 0x3c8 │ │ + ldc2l 9, cr1, [r8, #116] @ 0x74 @ │ │ + ldc2l 12, cr9, [r8, #760] @ 0x2f8 │ │ + ldc2l 9, cr1, [r8, #12] @ │ │ + ldc2l 12, cr9, [r8, #552] @ 0x228 │ │ + ldc2l 8, cr1, [r8, #840] @ 0x348 │ │ + ldc2l 12, cr9, [r8, #344] @ 0x158 │ │ + ldc2l 8, cr1, [r8, #632] @ 0x278 │ │ + ldc2l 12, cr9, [r8, #136] @ 0x88 │ │ + vcadd.f32 , q4, q11, #270 │ │ + ldc2l 11, cr9, [r8, #936] @ 0x3a8 @ │ │ + ldc2l 9, cr13, [r6, #90] @ 0x5a @ │ │ + ldc2l 10, cr9, [r8, #712] @ 0x2c8 @ │ │ ldc2l 6, cr2, [r9, #544] @ 0x220 │ │ - ldc2l 7, cr1, [r8, #500] @ 0x1f4 │ │ - ldc2l 11, cr9, [r8, #4] @ │ │ - ldc2l 14, cr6, [r8, #324] @ 0x144 │ │ - ldc2l 10, cr9, [r8, #836] @ 0x344 @ │ │ - ldc2l 5, cr4, [r8, #572] @ 0x23c │ │ + ldc2l 7, cr1, [r8, #680] @ 0x2a8 │ │ + ldc2l 11, cr9, [r8, #184] @ 0xb8 @ │ │ + ldc2l 14, cr6, [r8, #504] @ 0x1f8 │ │ + ldc2l 10, cr9, [r8, #1016] @ 0x3f8 @ │ │ + ldc2l 5, cr4, [r8, #752] @ 0x2f0 │ │ │ │ 024bdf80 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #316 @ 0x13c │ │ ldr r9, [fp, #8] │ │ mov r5, r0 │ │ @@ -1432952,24 +1432951,24 @@ │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldc2l 10, cr0, [r9, #264] @ 0x108 @ │ │ ldrbeq r4, [r7, #1304] @ 0x518 │ │ eoreq ip, r9, ip, asr #7 │ │ ldrbeq r4, [r7, #1284] @ 0x504 │ │ eoreq ip, r9, r8, lsl r2 │ │ eoreq ip, r9, r8, lsr r3 │ │ - ldc2l 4, cr7, [r6, #32] │ │ - ldc2l 8, cr13, [r5, #580] @ 0x244 │ │ - ldc2l 12, cr4, [r6, #1012] @ 0x3f4 │ │ + ldc2l 4, cr7, [r6, #212] @ 0xd4 │ │ + ldc2l 8, cr13, [r5, #760] @ 0x2f8 │ │ + ldc2l 13, cr4, [r6, #168] @ 0xa8 │ │ ldc2l 6, cr2, [r9, #252] @ 0xfc │ │ eoreq ip, r9, ip, asr #32 │ │ strdeq fp, [r9], -r4 @ │ │ - ldc2l 2, cr3, [r8, #32] │ │ - ldc2l 10, cr4, [r6, #868] @ 0x364 @ │ │ + ldc2l 2, cr3, [r8, #212] @ 0xd4 │ │ + ldc2l 11, cr4, [r6, #24] @ │ │ mlaeq r9, r0, pc, fp @ │ │ - ldc2l 12, cr4, [r7, #840] @ 0x348 │ │ + ldc2l 12, cr4, [r7, #1020] @ 0x3fc │ │ eoreq ip, r9, r4, lsr #32 │ │ ldc2l 5, cr0, [r9, #808] @ 0x328 │ │ │ │ 024be490 : │ │ push {r4, r5, r6, r7, r8, r9, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #88 @ 0x58 │ │ @@ -1433282,15 +1433281,15 @@ │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrbeq r3, [r7, #4064] @ 0xfe0 │ │ strdeq fp, [r9], -r4 @ │ │ eoreq fp, r9, r4, lsr #26 │ │ strhteq fp, [r9], -r0 │ │ eoreq fp, r9, r4, lsl #24 │ │ ldrbeq r3, [r7, #3593] @ 0xe09 │ │ - ldc2l 5, cr8, [r5, #924] @ 0x39c │ │ + ldc2l 6, cr8, [r5, #80] @ 0x50 │ │ ldrbeq r3, [r7, #3572] @ 0xdf4 │ │ ldrbeq r3, [r7, #3384] @ 0xd38 │ │ ldrbeq r3, [r7, #3365] @ 0xd25 │ │ eoreq fp, r9, r1, lsr #21 │ │ eoreq fp, r9, pc, lsl #21 │ │ eoreq fp, r9, r0, ror sl │ │ │ │ @@ -1433372,17 +1433371,17 @@ │ │ ldr r0, [pc, #28] @ 24beae0 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 12, cr4, [r5, #924] @ 0x39c │ │ + ldc2l 13, cr4, [r5, #80] @ 0x50 │ │ ldrbeq r3, [r7, #3164] @ 0xc5c │ │ - ldc2l 11, cr4, [r5, #940] @ 0x3ac @ │ │ + ldc2l 12, cr4, [r5, #96] @ 0x60 │ │ │ │ 024beae4 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #16 │ │ mov r6, r1 │ │ mov r4, r0 │ │ @@ -1433476,24 +1433475,24 @@ │ │ ldr r0, [pc, #44] @ 24bec88 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 1, cr1, [r6, #924] @ 0x39c │ │ - ldc2l 12, cr10, [r7, #760] @ 0x2f8 │ │ + ldc2l 2, cr1, [r6, #80] @ 0x50 │ │ + ldc2l 12, cr10, [r7, #940] @ 0x3ac │ │ eoreq fp, r9, r8, lsr #17 │ │ - ldc2l 2, cr13, [r6, #328] @ 0x148 │ │ - ldc2l 2, cr4, [r6, #756] @ 0x2f4 │ │ - ldc2l 15, cr10, [r6, #328] @ 0x148 │ │ - ldc2l 0, cr1, [r6, #604] @ 0x25c │ │ - ldc2l 11, cr4, [r5, #80] @ 0x50 @ │ │ - ldc2l 3, cr4, [r6, #36] @ 0x24 │ │ - ldc2l 7, cr12, [r6, #852] @ 0x354 │ │ + ldc2l 2, cr13, [r6, #508] @ 0x1fc │ │ + ldc2l 2, cr4, [r6, #936] @ 0x3a8 │ │ + ldc2l 15, cr10, [r6, #508] @ 0x1fc │ │ + ldc2l 0, cr1, [r6, #784] @ 0x310 │ │ + ldc2l 11, cr4, [r5, #260] @ 0x104 @ │ │ + ldc2l 3, cr4, [r6, #216] @ 0xd8 │ │ + vcadd.f32 d28, d6, d2, #270 │ │ │ │ 024bec98 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r5, r2 │ │ mov r9, r1 │ │ @@ -1433611,18 +1433610,18 @@ │ │ ldr r0, [pc, #32] @ 24bee90 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 4, cr4, [r8, #916] @ 0x394 │ │ - ldc2l 3, cr4, [r8, #400] @ 0x190 │ │ - ldc2l 5, cr0, [r7, #900] @ 0x384 │ │ - ldc2l 3, cr4, [r8, #244] @ 0xf4 │ │ + ldc2l 5, cr4, [r8, #72] @ 0x48 │ │ + ldc2l 3, cr4, [r8, #580] @ 0x244 │ │ + ldc2l 6, cr0, [r7, #56] @ 0x38 │ │ + ldc2l 3, cr4, [r8, #424] @ 0x1a8 │ │ │ │ 024bee94 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ sub r0, r0, #1 │ │ cmp r0, #4 │ │ @@ -1433944,31 +1433943,31 @@ │ │ cmp r5, #1 │ │ blt 24bf370 │ │ ldr r5, [r6, r5, lsl #2] │ │ add r7, r7, #1 │ │ cmp r5, #0 │ │ bgt 24bf39c │ │ b 24bf370 │ │ - ldc2l 5, cr4, [r5, #108] @ 0x6c │ │ - ldc2l 2, cr11, [r8, #468] @ 0x1d4 │ │ - ldc2l 5, cr4, [r7, #364] @ 0x16c │ │ - ldc2l 14, cr7, [r5, #860] @ 0x35c │ │ - ldc2l 5, cr4, [r7, #44] @ 0x2c │ │ - ldc2l 4, cr2, [r7, #412] @ 0x19c │ │ - ldc2l 4, cr2, [r7, #368] @ 0x170 │ │ - ldc2l 2, cr8, [r8, #892] @ 0x37c │ │ - ldc2l 13, cr0, [r6, #624] @ 0x270 │ │ - ldc2l 6, cr8, [r8, #260] @ 0x104 │ │ - ldc2l 7, cr12, [r7, #348] @ 0x15c │ │ - ldc2l 10, cr12, [r5, #880] @ 0x370 @ │ │ - vcadd.f32 d26, d7, d4, #270 │ │ - ldc2l 12, cr4, [r6, #332] @ 0x14c │ │ - ldc2l 15, cr9, [r8, #408] @ 0x198 │ │ - ldc2l 10, cr6, [r5, #180] @ 0xb4 @ │ │ - ldc2l 14, cr3, [r6, #452] @ 0x1c4 │ │ + ldc2l 5, cr4, [r5, #288] @ 0x120 │ │ + ldc2l 2, cr11, [r8, #648] @ 0x288 │ │ + ldc2l 5, cr4, [r7, #544] @ 0x220 │ │ + ldc2l 15, cr7, [r5, #16] │ │ + ldc2l 5, cr4, [r7, #224] @ 0xe0 │ │ + ldc2l 4, cr2, [r7, #592] @ 0x250 │ │ + ldc2l 4, cr2, [r7, #548] @ 0x224 │ │ + ldc2l 3, cr8, [r8, #48] @ 0x30 │ │ + ldc2l 13, cr0, [r6, #804] @ 0x324 │ │ + ldc2l 6, cr8, [r8, #440] @ 0x1b8 │ │ + ldc2l 7, cr12, [r7, #528] @ 0x210 │ │ + ldc2l 11, cr12, [r5, #36] @ 0x24 @ │ │ + ldc2l 8, cr10, [r7, #196] @ 0xc4 │ │ + ldc2l 12, cr4, [r6, #512] @ 0x200 │ │ + ldc2l 15, cr9, [r8, #588] @ 0x24c │ │ + ldc2l 10, cr6, [r5, #360] @ 0x168 @ │ │ + ldc2l 14, cr3, [r6, #632] @ 0x278 │ │ ldc2l 7, cr1, [r9, #796] @ 0x31c │ │ │ │ 024bf3f8 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ @@ -1433985,16 +1433984,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 2, cr4, [r5, #844] @ 0x34c │ │ - ldc2l 0, cr11, [r8, #180] @ 0xb4 │ │ + ldc2l 3, cr4, [r5] │ │ + ldc2l 0, cr11, [r8, #360] @ 0x168 │ │ │ │ 024bf454 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #100] @ 24bf4cc │ │ mov r6, r1 │ │ @@ -1434019,17 +1434018,17 @@ │ │ bl 270db20 │ │ ldr r0, [pc, #24] @ 24bf4d4 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 15, cr3, [r7, #908] @ 0x38c │ │ - ldc2l 9, cr7, [r5, #198] @ 0xc6 @ │ │ - ldc2l 15, cr3, [r7, #588] @ 0x24c │ │ + ldc2l 0, cr4, [r7, #64] @ 0x40 │ │ + ldc2l 9, cr7, [r5, #288] @ 0x120 @ │ │ + ldc2l 15, cr3, [r7, #768] @ 0x300 │ │ │ │ 024bf4d8 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #32 │ │ add r5, fp, #12 │ │ mov ip, r1 │ │ @@ -1434464,39 +1434463,39 @@ │ │ cmp r5, #1 │ │ blt 24bfb58 │ │ ldr r5, [r4, r5, lsl #2] │ │ add r6, r6, #1 │ │ cmp r5, #0 │ │ bgt 24bfb84 │ │ b 24bfb58 │ │ - ldc2l 14, cr13, [r7, #788] @ 0x314 │ │ - ldc2l 10, cr10, [r8, #1012] @ 0x3f4 @ │ │ - ldc2l 0, cr2, [r8, #8] │ │ + ldc2l 14, cr13, [r7, #968] @ 0x3c8 │ │ + ldc2l 11, cr10, [r8, #168] @ 0xa8 @ │ │ + ldc2l 0, cr2, [r8, #188] @ 0xbc │ │ strdeq sl, [r9], -ip @ │ │ - ldc2l 15, cr1, [r8, #728] @ 0x2d8 │ │ - ldc2l 4, cr10, [r5, #620] @ 0x26c │ │ - ldc2l 12, cr3, [r5, #676] @ 0x2a4 │ │ - ldc2l 4, cr3, [r6, #388] @ 0x184 │ │ + ldc2l 15, cr1, [r8, #908] @ 0x38c │ │ + ldc2l 4, cr10, [r5, #800] @ 0x320 │ │ + ldc2l 12, cr3, [r5, #856] @ 0x358 │ │ + ldc2l 4, cr3, [r6, #568] @ 0x238 │ │ ldc2l 5, cr13, [r8, #992] @ 0x3e0 │ │ - ldc2l 4, cr10, [r5, #76] @ 0x4c │ │ - ldc2l 12, cr1, [r7, #304] @ 0x130 │ │ - ldc2l 10, cr7, [r8, #828] @ 0x33c @ │ │ - ldc2l 5, cr12, [r6] │ │ - ldc2l 12, cr3, [r5, #996] @ 0x3e4 │ │ - ldc2l 4, cr3, [r6, #708] @ 0x2c4 │ │ + ldc2l 4, cr10, [r5, #256] @ 0x100 │ │ + ldc2l 12, cr1, [r7, #484] @ 0x1e4 │ │ + ldc2l 10, cr7, [r8, #1008] @ 0x3f0 @ │ │ + ldc2l 5, cr12, [r6, #180] @ 0xb4 │ │ + ldc2l 13, cr3, [r5, #152] @ 0x98 │ │ + ldc2l 4, cr3, [r6, #888] @ 0x378 │ │ ldc2l 6, cr13, [r8, #272] @ 0x110 │ │ - ldc2l 5, cr0, [r6, #992] @ 0x3e0 │ │ - ldc2l 14, cr7, [r8, #612] @ 0x264 │ │ - ldc2l 15, cr11, [r7, #700] @ 0x2bc │ │ - ldc2l 3, cr12, [r5, #208] @ 0xd0 │ │ - ldc2l 0, cr10, [r7, #368] @ 0x170 │ │ - ldc2l 4, cr4, [r6, #684] @ 0x2ac │ │ - ldc2l 6, cr5, [r8, #748] @ 0x2ec │ │ - ldc2l 2, cr6, [r5, #532] @ 0x214 │ │ - ldc2l 6, cr3, [r6, #804] @ 0x324 │ │ + ldc2l 6, cr0, [r6, #148] @ 0x94 │ │ + ldc2l 14, cr7, [r8, #792] @ 0x318 │ │ + ldc2l 15, cr11, [r7, #880] @ 0x370 │ │ + ldc2l 3, cr12, [r5, #388] @ 0x184 │ │ + ldc2l 0, cr10, [r7, #548] @ 0x224 │ │ + ldc2l 4, cr4, [r6, #864] @ 0x360 │ │ + ldc2l 6, cr5, [r8, #928] @ 0x3a0 │ │ + ldc2l 2, cr6, [r5, #712] @ 0x2c8 │ │ + ldc2l 6, cr3, [r6, #984] @ 0x3d8 │ │ ldc2l 0, cr1, [r9, #140] @ 0x8c │ │ │ │ 024bfc00 : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ @@ -1434513,16 +1434512,16 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #5 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 11, cr13, [r7, #948] @ 0x3b4 @ │ │ - vcadd.f32 d26, d8, d21, #270 │ │ + ldc2l 12, cr13, [r7, #104] @ 0x68 │ │ + ldc2l 8, cr10, [r8, #328] @ 0x148 │ │ │ │ 024bfc5c : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r0 │ │ ldr r0, [pc, #96] @ 24bfcd0 │ │ mov r6, r1 │ │ @@ -1434546,17 +1434545,17 @@ │ │ bl 270db20 │ │ ldr r0, [pc, #24] @ 24bfcd8 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 10, cr1, [r8, #184] @ 0xb8 @ │ │ + ldc2l 10, cr1, [r8, #364] @ 0x16c @ │ │ eoreq sl, r9, ip, lsr #14 │ │ - ldc2l 9, cr1, [r8, #452] @ 0x1c4 @ │ │ + ldc2l 10, cr1, [r8, #60] @ 0x3c @ │ │ │ │ 024bfcdc : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #32 │ │ mov lr, r0 │ │ ldr r0, [fp, #8] │ │ @@ -1434663,18 +1434662,18 @@ │ │ add r0, pc, r0 │ │ bl 270d9a0 │ │ mov r0, r4 │ │ mov r1, #7 │ │ bl 270ce40 │ │ mov r0, #0 │ │ pop {r4, r5, fp, pc} │ │ - ldc2l 0, cr12, [r6, #804] @ 0x324 │ │ - ldc2l 7, cr7, [r8, #628] @ 0x274 │ │ - ldc2l 0, cr3, [r6, #452] @ 0x1c4 │ │ - ldc2l 14, cr5, [r6, #824] @ 0x338 │ │ + ldc2l 0, cr12, [r6, #984] @ 0x3d8 │ │ + ldc2l 7, cr7, [r8, #808] @ 0x328 │ │ + ldc2l 0, cr3, [r6, #632] @ 0x278 │ │ + ldc2l 14, cr5, [r6, #1004] @ 0x3ec │ │ │ │ 024bfe8c : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r4, r1 │ │ ldr r1, [pc, #4084] @ 24c0e94 │ │ mov r7, #0 │ │ @@ -1435695,252 +1435694,252 @@ │ │ bl 270d970 │ │ mov r0, #636 @ 0x27c │ │ mov r2, #36 @ 0x24 │ │ str r0, [r5, #480] @ 0x1e0 │ │ movw r0, #4320 @ 0x10e0 │ │ ldr r1, [pc, #480] @ 24c1074 │ │ b 24c124c │ │ - ldc2l 9, cr13, [r7, #230] @ 0xe6 @ │ │ - vcadd.f32 , , , #270 │ │ - ldc2l 10, cr15, [r6, #408] @ 0x198 @ │ │ - ldc2l 7, cr7, [r8, #88] @ 0x58 │ │ - ldc2l 15, cr11, [r6, #820] @ 0x334 │ │ - ldc2l 11, cr13, [r5, #580] @ 0x244 @ │ │ - ldc2l 7, cr3, [r5, #708] @ 0x2c4 │ │ - ldc2l 13, cr5, [r6, #784] @ 0x310 │ │ - ldc2l 15, cr8, [r8, #988] @ 0x3dc │ │ - ldc2l 14, cr4, [r8, #864] @ 0x360 │ │ - ldc2l 9, cr15, [r6, #300] @ 0x12c @ │ │ - ldc2l 7, cr7, [r7, #400] @ 0x190 │ │ - ldc2l 12, cr9, [r6, #876] @ 0x36c │ │ - ldc2l 5, cr5, [r7, #800] @ 0x320 │ │ - ldc2l 11, cr10, [r8, #900] @ 0x384 @ │ │ - ldc2l 14, cr9, [r5, #464] @ 0x1d0 │ │ - ldc2l 8, cr15, [r6, #1008] @ 0x3f0 │ │ - ldc2l 7, cr13, [r6, #424] @ 0x1a8 │ │ - ldc2l 14, cr9, [r5, #188] @ 0xbc │ │ - ldc2l 13, cr4, [r8, #792] @ 0x318 │ │ - ldc2l 8, cr15, [r6, #600] @ 0x258 │ │ - ldc2l 11, cr15, [r5, #936] @ 0x3a8 @ │ │ - ldc2l 0, cr8, [r5, #100] @ 0x64 │ │ - ldc2l 6, cr7, [r7, #52] @ 0x34 │ │ - ldc2l 6, cr9, [r7, #536] @ 0x218 │ │ - ldc2l 12, cr1, [r6, #560] @ 0x230 │ │ - ldc2l 0, cr3, [r8, #204] @ 0xcc │ │ - ldc2l 5, cr5, [r5, #300] @ 0x12c │ │ - ldc2l 10, cr7, [r6, #544] @ 0x220 @ │ │ - ldc2l 5, cr15, [r7, #1004] @ 0x3ec │ │ - ldc2l 12, cr9, [r5, #756] @ 0x2f4 │ │ - ldc2l 9, cr10, [r8, #424] @ 0x1a8 @ │ │ - ldc2l 11, cr1, [r6, #672] @ 0x2a0 @ │ │ - ldc2l 11, cr1, [r6, #560] @ 0x230 @ │ │ - ldc2l 14, cr7, [r5, #584] @ 0x248 │ │ - ldc2l 14, cr7, [r5, #468] @ 0x1d4 │ │ - ldc2l 7, cr11, [r5, #624] @ 0x270 │ │ - ldc2l 3, cr3, [r5, #952] @ 0x3b8 │ │ - ldc2l 4, cr13, [r6, #784] @ 0x310 │ │ - ldc2l 4, cr13, [r7, #700] @ 0x2bc │ │ - ldc2l 14, cr2, [r8, #340] @ 0x154 │ │ - ldc2l 9, cr9, [r6, #102] @ 0x66 @ │ │ + ldc2l 9, cr13, [r7, #320] @ 0x140 @ │ │ + ldc2l 8, cr11, [r7, #456] @ 0x1c8 │ │ + ldc2l 10, cr15, [r6, #588] @ 0x24c @ │ │ + ldc2l 7, cr7, [r8, #268] @ 0x10c │ │ + ldc2l 15, cr11, [r6, #1000] @ 0x3e8 │ │ + ldc2l 11, cr13, [r5, #760] @ 0x2f8 @ │ │ + ldc2l 7, cr3, [r5, #888] @ 0x378 │ │ + ldc2l 13, cr5, [r6, #964] @ 0x3c4 │ │ + ldc2l 0, cr9, [r8, #144] @ 0x90 │ │ + ldc2l 15, cr4, [r8, #20] │ │ + ldc2l 9, cr15, [r6, #390] @ 0x186 @ │ │ + ldc2l 7, cr7, [r7, #580] @ 0x244 │ │ + ldc2l 13, cr9, [r6, #32] │ │ + ldc2l 5, cr5, [r7, #980] @ 0x3d4 │ │ + ldc2l 12, cr10, [r8, #56] @ 0x38 │ │ + ldc2l 14, cr9, [r5, #644] @ 0x284 │ │ + ldc2l 9, cr15, [r6, #82] @ 0x52 @ │ │ + ldc2l 7, cr13, [r6, #604] @ 0x25c │ │ + ldc2l 14, cr9, [r5, #368] @ 0x170 │ │ + ldc2l 13, cr4, [r8, #972] @ 0x3cc │ │ + vcadd.f32 , q11, , #270 │ │ + ldc2l 12, cr15, [r5, #92] @ 0x5c │ │ + ldc2l 0, cr8, [r5, #280] @ 0x118 │ │ + ldc2l 6, cr7, [r7, #232] @ 0xe8 │ │ + ldc2l 6, cr9, [r7, #716] @ 0x2cc │ │ + ldc2l 12, cr1, [r6, #740] @ 0x2e4 │ │ + ldc2l 0, cr3, [r8, #384] @ 0x180 │ │ + ldc2l 5, cr5, [r5, #480] @ 0x1e0 │ │ + ldc2l 10, cr7, [r6, #724] @ 0x2d4 @ │ │ + ldc2l 6, cr15, [r7, #160] @ 0xa0 │ │ + ldc2l 12, cr9, [r5, #936] @ 0x3a8 │ │ + ldc2l 10, cr10, [r8, #4] @ │ │ + ldc2l 11, cr1, [r6, #852] @ 0x354 @ │ │ + ldc2l 11, cr1, [r6, #740] @ 0x2e4 @ │ │ + ldc2l 14, cr7, [r5, #764] @ 0x2fc │ │ + ldc2l 14, cr7, [r5, #648] @ 0x288 │ │ + ldc2l 7, cr11, [r5, #804] @ 0x324 │ │ + ldc2l 4, cr3, [r5, #108] @ 0x6c │ │ + ldc2l 4, cr13, [r6, #964] @ 0x3c4 │ │ + ldc2l 4, cr13, [r7, #880] @ 0x370 │ │ + ldc2l 14, cr2, [r8, #520] @ 0x208 │ │ + ldc2l 9, cr9, [r6, #192] @ 0xc0 @ │ │ ldc2l 6, cr14, [r8, #124] @ 0x7c │ │ - ldc2l 4, cr13, [r7, #164] @ 0xa4 │ │ - ldc2l 8, cr7, [r6, #372] @ 0x174 │ │ - ldc2l 9, cr5, [r6, #10] @ │ │ - ldc2l 1, cr7, [r8, #756] @ 0x2f4 │ │ - ldc2l 2, cr1, [r7, #708] @ 0x2c4 │ │ - ldc2l 7, cr7, [r6, #864] @ 0x360 │ │ - ldc2l 3, cr13, [r7, #380] @ 0x17c │ │ - ldc2l 12, cr2, [r8, #1016] @ 0x3f8 │ │ - ldc2l 1, cr7, [r8, #76] @ 0x4c │ │ - ldc2l 2, cr13, [r6, #912] @ 0x390 │ │ - ldc2l 9, cr11, [r6, #328] @ 0x148 @ │ │ - ldc2l 2, cr9, [r7, #456] @ 0x1c8 │ │ - ldc2l 2, cr15, [r7, #448] @ 0x1c0 │ │ - ldc2l 9, cr11, [r6, #138] @ 0x8a @ │ │ - ldc2l 12, cr2, [r8, #76] @ 0x4c │ │ - vcadd.f32 d17, d6, d19, #270 │ │ - vcadd.f32 d17, d6, d6, #270 │ │ - ldc2l 6, cr7, [r6, #232] @ 0xe8 │ │ - ldc2l 6, cr5, [r6, #872] @ 0x368 │ │ - ldc2l 1, cr9, [r7, #400] @ 0x190 │ │ - ldc2l 11, cr2, [r8, #284] @ 0x11c @ │ │ - ldc2l 6, cr15, [r5, #196] @ 0xc4 │ │ + ldc2l 4, cr13, [r7, #344] @ 0x158 │ │ + vcadd.f32 d23, d22, d10, #270 │ │ + ldc2l 9, cr5, [r6, #100] @ 0x64 @ │ │ + ldc2l 1, cr7, [r8, #936] @ 0x3a8 │ │ + ldc2l 2, cr1, [r7, #888] @ 0x378 │ │ + vcadd.f32 d23, d6, d5, #270 │ │ + ldc2l 3, cr13, [r7, #560] @ 0x230 │ │ + ldc2l 13, cr2, [r8, #172] @ 0xac │ │ + ldc2l 1, cr7, [r8, #256] @ 0x100 │ │ + ldc2l 3, cr13, [r6, #68] @ 0x44 │ │ + ldc2l 9, cr11, [r6, #418] @ 0x1a2 @ │ │ + ldc2l 2, cr9, [r7, #636] @ 0x27c │ │ + ldc2l 2, cr15, [r7, #628] @ 0x274 │ │ + ldc2l 9, cr11, [r6, #228] @ 0xe4 @ │ │ + ldc2l 12, cr2, [r8, #256] @ 0x100 │ │ + ldc2l 8, cr1, [r6, #320] @ 0x140 │ │ + ldc2l 8, cr1, [r6, #204] @ 0xcc │ │ + ldc2l 6, cr7, [r6, #412] @ 0x19c │ │ + ldc2l 7, cr5, [r6, #28] │ │ + ldc2l 1, cr9, [r7, #580] @ 0x244 │ │ + ldc2l 11, cr2, [r8, #464] @ 0x1d0 @ │ │ + ldc2l 6, cr15, [r5, #376] @ 0x178 │ │ ldc2l 3, cr14, [r8, #16] │ │ - ldc2l 0, cr9, [r7, #900] @ 0x384 │ │ - ldc2l 0, cr13, [r7, #968] @ 0x3c8 │ │ - ldc2l 14, cr6, [r8, #820] @ 0x334 │ │ - ldc2l 6, cr1, [r6, #720] @ 0x2d0 │ │ - ldc2l 0, cr13, [r7, #588] @ 0x24c │ │ - ldc2l 5, cr5, [r6, #516] @ 0x204 │ │ - ldc2l 15, cr6, [r7, #472] @ 0x1d8 │ │ - ldc2l 9, cr7, [r5, #156] @ 0x9c @ │ │ - ldc2l 15, cr12, [r6, #928] @ 0x3a0 │ │ - ldc2l 6, cr9, [r5, #624] @ 0x270 │ │ - ldc2l 5, cr1, [r6, #788] @ 0x314 │ │ + ldc2l 1, cr9, [r7, #56] @ 0x38 │ │ + ldc2l 1, cr13, [r7, #124] @ 0x7c │ │ + ldc2l 14, cr6, [r8, #1000] @ 0x3e8 │ │ + ldc2l 6, cr1, [r6, #900] @ 0x384 │ │ + ldc2l 0, cr13, [r7, #768] @ 0x300 │ │ + ldc2l 5, cr5, [r6, #696] @ 0x2b8 │ │ + ldc2l 15, cr6, [r7, #652] @ 0x28c │ │ + ldc2l 9, cr7, [r5, #246] @ 0xf6 @ │ │ + ldc2l 0, cr13, [r6, #84] @ 0x54 │ │ + ldc2l 6, cr9, [r5, #804] @ 0x324 │ │ + ldc2l 5, cr1, [r6, #968] @ 0x3c8 │ │ ldc2l 15, cr15, [r8, #576] @ 0x240 │ │ - ldc2l 4, cr9, [r6, #168] @ 0xa8 │ │ - ldc2l 15, cr12, [r7, #384] @ 0x180 │ │ - ldc2l 15, cr12, [r7, #292] @ 0x124 │ │ - ldc2l 13, cr10, [r7, #868] @ 0x364 │ │ - ldc2l 4, cr5, [r6, #40] @ 0x28 │ │ - ldc2l 8, cr2, [r8, #580] @ 0x244 │ │ - ldc2l 4, cr1, [r6, #736] @ 0x2e0 │ │ - ldc2l 12, cr4, [r7, #240] @ 0xf0 │ │ - ldc2l 0, cr13, [r5, #1000] @ 0x3e8 │ │ - ldc2l 14, cr8, [r7, #36] @ 0x24 │ │ - ldc2l 10, cr2, [r7, #160] @ 0xa0 @ │ │ - ldc2l 4, cr1, [r6, #60] @ 0x3c │ │ - ldc2l 7, cr2, [r8, #644] @ 0x284 │ │ - ldc2l 11, cr4, [r7, #440] @ 0x1b8 @ │ │ - ldc2l 4, cr11, [r6, #388] @ 0x184 │ │ + ldc2l 4, cr9, [r6, #348] @ 0x15c │ │ + ldc2l 15, cr12, [r7, #564] @ 0x234 │ │ + ldc2l 15, cr12, [r7, #472] @ 0x1d8 │ │ + ldc2l 14, cr10, [r7, #24] │ │ + ldc2l 4, cr5, [r6, #220] @ 0xdc │ │ + ldc2l 8, cr2, [r8, #760] @ 0x2f8 │ │ + ldc2l 4, cr1, [r6, #916] @ 0x394 │ │ + ldc2l 12, cr4, [r7, #420] @ 0x1a4 │ │ + ldc2l 1, cr13, [r5, #156] @ 0x9c │ │ + ldc2l 14, cr8, [r7, #216] @ 0xd8 │ │ + ldc2l 10, cr2, [r7, #340] @ 0x154 @ │ │ + ldc2l 4, cr1, [r6, #240] @ 0xf0 │ │ + ldc2l 7, cr2, [r8, #824] @ 0x338 │ │ + ldc2l 11, cr4, [r7, #620] @ 0x26c @ │ │ + ldc2l 4, cr11, [r6, #568] @ 0x238 │ │ ldc2l 5, cr12, [r8, #628] @ 0x274 │ │ - ldc2l 6, cr7, [r5, #464] @ 0x1d0 │ │ - ldc2l 4, cr8, [r8, #444] @ 0x1bc │ │ - ldc2l 12, cr8, [r7, #864] @ 0x360 │ │ - ldc2l 15, cr12, [r5, #528] @ 0x210 │ │ - ldc2l 1, cr5, [r6, #896] @ 0x380 │ │ - ldc2l 3, cr11, [r6, #452] @ 0x1c4 │ │ - ldc2l 1, cr15, [r5, #312] @ 0x138 │ │ - ldc2l 10, cr4, [r7, #108] @ 0x6c @ │ │ - ldc2l 13, cr14, [r6, #548] @ 0x224 │ │ - ldc2l 14, cr12, [r5, #736] @ 0x2e0 │ │ - ldc2l 15, cr9, [r8, #908] @ 0x38c │ │ - ldc2l 2, cr9, [r5, #552] @ 0x228 │ │ - ldc2l 2, cr11, [r6, #524] @ 0x20c │ │ - ldc2l 11, cr8, [r7, #364] @ 0x16c @ │ │ - ldc2l 2, cr9, [r5, #164] @ 0xa4 │ │ - ldc2l 13, cr12, [r5, #948] @ 0x3b4 │ │ - ldc2l 13, cr10, [r5, #532] @ 0x214 │ │ - ldc2l 9, cr0, [r7, #500] @ 0x1f4 @ │ │ - ldc2l 10, cr8, [r7, #736] @ 0x2e0 @ │ │ - ldc2l 10, cr12, [r6, #632] @ 0x278 @ │ │ - ldc2l 11, cr14, [r6, #932] @ 0x3a4 @ │ │ - ldc2l 13, cr12, [r5, #144] @ 0x90 │ │ - ldc2l 3, cr7, [r5, #472] @ 0x1d8 │ │ - ldc2l 12, cr4, [r5, #360] @ 0x168 │ │ - ldc2l 12, cr12, [r5, #760] @ 0x2f8 │ │ - ldc2l 14, cr8, [r6, #576] @ 0x240 │ │ - ldc2l 3, cr6, [r8, #976] @ 0x3d0 │ │ - ldc2l 4, cr2, [r5, #732] @ 0x2dc │ │ - ldc2l 10, cr14, [r5, #580] @ 0x244 @ │ │ - ldc2l 8, cr12, [r5, #356] @ 0x164 │ │ - ldc2l 11, cr3, [r8, #848] @ 0x350 @ │ │ - ldc2l 3, cr4, [r7, #76] @ 0x4c │ │ - ldc2l 4, cr14, [r7, #1004] @ 0x3ec │ │ - ldc2l 10, cr4, [r6, #160] @ 0xa0 @ │ │ + ldc2l 6, cr7, [r5, #644] @ 0x284 │ │ + ldc2l 4, cr8, [r8, #624] @ 0x270 │ │ + ldc2l 13, cr8, [r7, #20] │ │ + ldc2l 15, cr12, [r5, #708] @ 0x2c4 │ │ + ldc2l 2, cr5, [r6, #52] @ 0x34 │ │ + ldc2l 3, cr11, [r6, #632] @ 0x278 │ │ + ldc2l 1, cr15, [r5, #492] @ 0x1ec │ │ + ldc2l 10, cr4, [r7, #288] @ 0x120 @ │ │ + ldc2l 13, cr14, [r6, #728] @ 0x2d8 │ │ + ldc2l 14, cr12, [r5, #916] @ 0x394 │ │ + ldc2l 0, cr10, [r8, #64] @ 0x40 │ │ + ldc2l 2, cr9, [r5, #732] @ 0x2dc │ │ + ldc2l 2, cr11, [r6, #704] @ 0x2c0 │ │ + ldc2l 11, cr8, [r7, #544] @ 0x220 @ │ │ + ldc2l 2, cr9, [r5, #344] @ 0x158 │ │ + ldc2l 14, cr12, [r5, #104] @ 0x68 │ │ + ldc2l 13, cr10, [r5, #712] @ 0x2c8 │ │ + ldc2l 10, cr0, [r7, #156] @ 0x9c @ │ │ + ldc2l 10, cr8, [r7, #916] @ 0x394 @ │ │ + ldc2l 10, cr12, [r6, #812] @ 0x32c @ │ │ + ldc2l 12, cr14, [r6, #88] @ 0x58 │ │ + ldc2l 13, cr12, [r5, #324] @ 0x144 │ │ + ldc2l 3, cr7, [r5, #652] @ 0x28c │ │ + ldc2l 12, cr4, [r5, #540] @ 0x21c │ │ + ldc2l 12, cr12, [r5, #940] @ 0x3ac │ │ + ldc2l 14, cr8, [r6, #756] @ 0x2f4 │ │ + ldc2l 4, cr6, [r8, #132] @ 0x84 │ │ + ldc2l 4, cr2, [r5, #912] @ 0x390 │ │ + ldc2l 10, cr14, [r5, #760] @ 0x2f8 @ │ │ + vcadd.f32 d28, d21, d6, #270 │ │ + ldc2l 12, cr3, [r8, #4] │ │ + ldc2l 3, cr4, [r7, #256] @ 0x100 │ │ + ldc2l 5, cr14, [r7, #160] @ 0xa0 │ │ + ldc2l 10, cr4, [r6, #340] @ 0x154 @ │ │ ldc2l 6, cr13, [r8, #672] @ 0x2a0 │ │ - ldc2l 11, cr8, [r5, #544] @ 0x220 @ │ │ - ldc2l 9, cr4, [r6, #394] @ 0x18a @ │ │ - ldc2l 3, cr2, [r5, #368] @ 0x170 │ │ - ldc2l 2, cr4, [r7, #136] @ 0x88 │ │ - vcadd.f32 q12, q11, q12, #270 │ │ - ldc2l 3, cr0, [r7, #68] @ 0x44 │ │ + ldc2l 11, cr8, [r5, #724] @ 0x2d4 @ │ │ + ldc2l 9, cr4, [r6, #484] @ 0x1e4 @ │ │ + ldc2l 3, cr2, [r5, #548] @ 0x224 │ │ + ldc2l 2, cr4, [r7, #316] @ 0x13c │ │ + ldc2l 9, cr8, [r6, #42] @ 0x2a @ │ │ + ldc2l 3, cr0, [r7, #248] @ 0xf8 │ │ ldc2l 5, cr13, [r8, #728] @ 0x2d8 │ │ - ldc2l 6, cr10, [r5, #200] @ 0xc8 │ │ - ldc2l 10, cr8, [r5, #436] @ 0x1b4 @ │ │ - ldc2l 10, cr8, [r5, #324] @ 0x144 @ │ │ - ldc2l 9, cr0, [r6, #216] @ 0xd8 @ │ │ - ldc2l 9, cr3, [r8, #322] @ 0x142 @ │ │ - ldc2l 12, cr1, [r8, #876] @ 0x36c │ │ - ldc2l 1, cr0, [r8, #268] @ 0x10c │ │ + ldc2l 6, cr10, [r5, #380] @ 0x17c │ │ + ldc2l 10, cr8, [r5, #616] @ 0x268 @ │ │ + ldc2l 10, cr8, [r5, #504] @ 0x1f8 @ │ │ + ldc2l 9, cr0, [r6, #306] @ 0x132 @ │ │ + ldc2l 9, cr3, [r8, #412] @ 0x19c @ │ │ + ldc2l 13, cr1, [r8, #32] │ │ + ldc2l 1, cr0, [r8, #448] @ 0x1c0 │ │ ldc2l 4, cr13, [r8, #624] @ 0x270 │ │ - ldc2l 7, cr8, [r6, #408] @ 0x198 │ │ - ldc2l 2, cr14, [r7, #380] @ 0x17c │ │ - ldc2l 12, cr1, [r8, #204] @ 0xcc │ │ - ldc2l 2, cr8, [r7, #132] @ 0x84 │ │ - vcadd.f32 d19, d24, d13, #270 │ │ - ldc2l 9, cr7, [r8, #132] @ 0x84 @ │ │ + ldc2l 7, cr8, [r6, #588] @ 0x24c │ │ + ldc2l 2, cr14, [r7, #560] @ 0x230 │ │ + ldc2l 12, cr1, [r8, #384] @ 0x180 │ │ + ldc2l 2, cr8, [r7, #312] @ 0x138 │ │ + ldc2l 8, cr3, [r8, #744] @ 0x2e8 │ │ + ldc2l 9, cr7, [r8, #222] @ 0xde @ │ │ ldc2l 3, cr13, [r8, #688] @ 0x2b0 │ │ - ldc2l 1, cr14, [r7, #572] @ 0x23c │ │ - ldc2l 1, cr8, [r7, #472] @ 0x1d8 │ │ - ldc2l 5, cr9, [r8, #364] @ 0x16c │ │ - ldc2l 6, cr8, [r6, #28] │ │ - ldc2l 1, cr12, [r6, #40] @ 0x28 │ │ - ldc2l 10, cr1, [r8, #840] @ 0x348 @ │ │ - ldc2l 6, cr0, [r6, #952] @ 0x3b8 │ │ - ldc2l 12, cr1, [r7, #744] @ 0x2e8 │ │ - ldc2l 4, cr9, [r8, #544] @ 0x220 │ │ - ldc2l 12, cr1, [r7, #508] @ 0x1fc │ │ - ldc2l 15, cr5, [r7, #448] @ 0x1c0 │ │ - ldc2l 4, cr8, [r6, #972] @ 0x3cc │ │ - ldc2l 4, cr14, [r5, #908] @ 0x38c │ │ - ldc2l 3, cr2, [r6, #964] @ 0x3c4 │ │ - ldc2l 1, cr14, [r6, #80] @ 0x50 │ │ - ldc2l 3, cr6, [r6, #888] @ 0x378 │ │ - ldc2l 9, cr1, [r8, #166] @ 0xa6 @ │ │ - ldc2l 6, cr10, [r6, #168] @ 0xa8 │ │ - ldc2l 3, cr9, [r8, #180] @ 0xb4 │ │ - ldc2l 13, cr15, [r7, #392] @ 0x188 │ │ - ldc2l 4, cr4, [r6, #56] @ 0x38 │ │ - ldc2l 14, cr7, [r7, #712] @ 0x2c8 │ │ - ldc2l 13, cr5, [r7, #804] @ 0x324 │ │ - ldc2l 13, cr9, [r7, #232] @ 0xe8 │ │ - ldc2l 12, cr5, [r8, #296] @ 0x128 │ │ - ldc2l 13, cr1, [r5, #104] @ 0x68 │ │ - ldc2l 13, cr14, [r6, #492] @ 0x1ec │ │ - ldc2l 12, cr9, [r7, #728] @ 0x2d8 │ │ - ldc2l 7, cr1, [r8, #696] @ 0x2b8 │ │ - ldc2l 4, cr3, [r8, #124] @ 0x7c │ │ - ldc2l 0, cr12, [r5, #288] @ 0x120 │ │ - ldc2l 12, cr1, [r5, #300] @ 0x12c │ │ - ldc2l 11, cr15, [r7, #620] @ 0x26c @ │ │ - ldc2l 3, cr0, [r6, #200] @ 0xc8 │ │ - ldc2l 10, cr5, [r8, #956] @ 0x3bc @ │ │ - ldc2l 11, cr15, [r6, #856] @ 0x358 @ │ │ - ldc2l 15, cr9, [r5, #148] @ 0x94 │ │ - ldc2l 12, cr11, [r6, #488] @ 0x1e8 │ │ + ldc2l 1, cr14, [r7, #752] @ 0x2f0 │ │ + ldc2l 1, cr8, [r7, #652] @ 0x28c │ │ + ldc2l 5, cr9, [r8, #544] @ 0x220 │ │ + ldc2l 6, cr8, [r6, #208] @ 0xd0 │ │ + ldc2l 1, cr12, [r6, #220] @ 0xdc │ │ + ldc2l 10, cr1, [r8, #1020] @ 0x3fc @ │ │ + ldc2l 7, cr0, [r6, #108] @ 0x6c │ │ + ldc2l 12, cr1, [r7, #924] @ 0x39c │ │ + ldc2l 4, cr9, [r8, #724] @ 0x2d4 │ │ + ldc2l 12, cr1, [r7, #688] @ 0x2b0 │ │ + ldc2l 15, cr5, [r7, #628] @ 0x274 │ │ + ldc2l 5, cr8, [r6, #128] @ 0x80 │ │ + ldc2l 5, cr14, [r5, #64] @ 0x40 │ │ + ldc2l 4, cr2, [r6, #120] @ 0x78 │ │ + ldc2l 1, cr14, [r6, #260] @ 0x104 │ │ + ldc2l 4, cr6, [r6, #44] @ 0x2c │ │ + ldc2l 9, cr1, [r8, #256] @ 0x100 @ │ │ + ldc2l 6, cr10, [r6, #348] @ 0x15c │ │ + ldc2l 3, cr9, [r8, #360] @ 0x168 │ │ + ldc2l 13, cr15, [r7, #572] @ 0x23c │ │ + ldc2l 4, cr4, [r6, #236] @ 0xec │ │ + ldc2l 14, cr7, [r7, #892] @ 0x37c │ │ + ldc2l 13, cr5, [r7, #984] @ 0x3d8 │ │ + ldc2l 13, cr9, [r7, #412] @ 0x19c │ │ + ldc2l 12, cr5, [r8, #476] @ 0x1dc │ │ + ldc2l 13, cr1, [r5, #284] @ 0x11c │ │ + ldc2l 13, cr14, [r6, #672] @ 0x2a0 │ │ + ldc2l 12, cr9, [r7, #908] @ 0x38c │ │ + ldc2l 7, cr1, [r8, #876] @ 0x36c │ │ + ldc2l 4, cr3, [r8, #304] @ 0x130 │ │ + ldc2l 0, cr12, [r5, #468] @ 0x1d4 │ │ + ldc2l 12, cr1, [r5, #480] @ 0x1e0 │ │ + ldc2l 11, cr15, [r7, #800] @ 0x320 @ │ │ + ldc2l 3, cr0, [r6, #380] @ 0x17c │ │ + ldc2l 11, cr5, [r8, #112] @ 0x70 @ │ │ + ldc2l 12, cr15, [r6, #12] │ │ + ldc2l 15, cr9, [r5, #328] @ 0x148 │ │ + ldc2l 12, cr11, [r6, #668] @ 0x29c │ │ ldc2l 4, cr11, [r8, #624] @ 0x270 │ │ - ldc2l 15, cr11, [r5, #108] @ 0x6c │ │ - ldc2l 9, cr3, [r7, #506] @ 0x1fa @ │ │ - ldc2l 9, cr3, [r7, #442] @ 0x1ba @ │ │ - ldc2l 0, cr6, [r6, #248] @ 0xf8 │ │ - ldc2l 10, cr15, [r7, #180] @ 0xb4 @ │ │ - ldc2l 7, cr1, [r7, #788] @ 0x314 │ │ - ldc2l 11, cr11, [r7, #580] @ 0x244 @ │ │ - ldc2l 13, cr9, [r5, #836] @ 0x344 │ │ - ldc2l 1, cr0, [r6, #428] @ 0x1ac │ │ - ldc2l 13, cr3, [r5, #344] @ 0x158 │ │ - ldc2l 11, cr11, [r6, #28] @ │ │ - ldc2l 0, cr4, [r6, #40] @ 0x28 │ │ - ldc2l 1, cr8, [r5, #560] @ 0x230 │ │ + ldc2l 15, cr11, [r5, #288] @ 0x120 │ │ + ldc2l 10, cr3, [r7, #168] @ 0xa8 @ │ │ + ldc2l 10, cr3, [r7, #40] @ 0x28 @ │ │ + ldc2l 0, cr6, [r6, #428] @ 0x1ac │ │ + ldc2l 10, cr15, [r7, #360] @ 0x168 @ │ │ + ldc2l 7, cr1, [r7, #968] @ 0x3c8 │ │ + ldc2l 11, cr11, [r7, #760] @ 0x2f8 @ │ │ + ldc2l 13, cr9, [r5, #1016] @ 0x3f8 │ │ + ldc2l 1, cr0, [r6, #608] @ 0x260 │ │ + ldc2l 13, cr3, [r5, #524] @ 0x20c │ │ + ldc2l 11, cr11, [r6, #208] @ 0xd0 @ │ │ + ldc2l 0, cr4, [r6, #220] @ 0xdc │ │ + ldc2l 1, cr8, [r5, #740] @ 0x2e4 │ │ ldc2l 12, cr12, [r8, #492] @ 0x1ec │ │ - ldc2l 14, cr5, [r6, #804] @ 0x324 │ │ - ldc2l 14, cr5, [r6, #680] @ 0x2a8 │ │ - ldc2l 6, cr1, [r7, #336] @ 0x150 │ │ + ldc2l 14, cr5, [r6, #984] @ 0x3d8 │ │ + ldc2l 14, cr5, [r6, #860] @ 0x35c │ │ + ldc2l 6, cr1, [r7, #516] @ 0x204 │ │ ldc2l 2, cr11, [r8, #260] @ 0x104 │ │ - ldc2l 3, cr1, [r8, #860] @ 0x35c │ │ - ldc2l 15, cr3, [r6, #48] @ 0x30 │ │ - ldc2l 13, cr8, [r8, #700] @ 0x2bc │ │ - ldc2l 13, cr8, [r8, #648] @ 0x288 │ │ - ldc2l 14, cr3, [r6, #640] @ 0x280 │ │ - ldc2l 11, cr9, [r5, #792] @ 0x318 @ │ │ - ldc2l 9, cr7, [r7, #52] @ 0x34 @ │ │ + ldc2l 4, cr1, [r8, #16] │ │ + ldc2l 15, cr3, [r6, #228] @ 0xe4 │ │ + ldc2l 13, cr8, [r8, #880] @ 0x370 │ │ + ldc2l 13, cr8, [r8, #828] @ 0x33c │ │ + ldc2l 14, cr3, [r6, #820] @ 0x334 │ │ + ldc2l 11, cr9, [r5, #972] @ 0x3cc @ │ │ + ldc2l 9, cr7, [r7, #142] @ 0x8e @ │ │ ldc2l 8, cr14, [r8, #988] @ 0x3dc │ │ - ldc2l 11, cr9, [r5, #356] @ 0x164 @ │ │ - ldc2l 10, cr3, [r5, #1016] @ 0x3f8 @ │ │ - ldc2l 9, cr13, [r6, #492] @ 0x1ec @ │ │ - ldc2l 11, cr11, [r5, #332] @ 0x14c @ │ │ - ldc2l 4, cr1, [r7, #492] @ 0x1ec │ │ - ldc2l 7, cr15, [r6, #280] @ 0x118 │ │ - ldc2l 6, cr15, [r7, #572] @ 0x23c │ │ - ldc2l 7, cr5, [r7, #180] @ 0xb4 │ │ - ldc2l 7, cr11, [r6, #920] @ 0x398 │ │ - ldc2l 0, cr6, [r5, #936] @ 0x3a8 │ │ - ldc2l 7, cr11, [r6, #668] @ 0x29c │ │ - ldc2l 13, cr2, [r8, #996] @ 0x3e4 │ │ - ldc2l 3, cr1, [r7, #444] @ 0x1bc │ │ - ldc2l 5, cr15, [r7, #684] @ 0x2ac │ │ - ldc2l 7, cr11, [r7, #140] @ 0x8c │ │ - ldc2l 13, cr2, [r8, #468] @ 0x1d4 │ │ + ldc2l 11, cr9, [r5, #536] @ 0x218 @ │ │ + ldc2l 11, cr3, [r5, #172] @ 0xac @ │ │ + ldc2l 10, cr13, [r6, #140] @ 0x8c @ │ │ + ldc2l 11, cr11, [r5, #512] @ 0x200 @ │ │ + ldc2l 4, cr1, [r7, #672] @ 0x2a0 │ │ + ldc2l 7, cr15, [r6, #460] @ 0x1cc │ │ + ldc2l 6, cr15, [r7, #752] @ 0x2f0 │ │ + ldc2l 7, cr5, [r7, #360] @ 0x168 │ │ + ldc2l 8, cr11, [r6, #76] @ 0x4c │ │ + ldc2l 1, cr6, [r5, #92] @ 0x5c │ │ + ldc2l 7, cr11, [r6, #848] @ 0x350 │ │ + ldc2l 14, cr2, [r8, #152] @ 0x98 │ │ + ldc2l 3, cr1, [r7, #624] @ 0x270 │ │ + ldc2l 5, cr15, [r7, #864] @ 0x360 │ │ + ldc2l 7, cr11, [r7, #320] @ 0x140 │ │ + ldc2l 13, cr2, [r8, #648] @ 0x288 │ │ ldc2l 15, cr10, [r8, #44] @ 0x2c │ │ - ldc2l 2, cr1, [r7, #836] @ 0x344 │ │ - ldc2l 5, cr9, [r7, #384] @ 0x180 │ │ - ldc2l 5, cr1, [r5, #332] @ 0x14c │ │ - ldc2l 7, cr13, [r6, #640] @ 0x280 │ │ - ldc2l 10, cr1, [r6, #228] @ 0xe4 @ │ │ + ldc2l 2, cr1, [r7, #1016] @ 0x3f8 │ │ + ldc2l 5, cr9, [r7, #564] @ 0x234 │ │ + ldc2l 5, cr1, [r5, #512] @ 0x200 │ │ + ldc2l 7, cr13, [r6, #820] @ 0x334 │ │ + ldc2l 10, cr1, [r6, #408] @ 0x198 @ │ │ add r0, r4, r0 │ │ mov r3, #5 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ movw r0, #637 @ 0x27d │ │ mov r2, #36 @ 0x24 │ │ str r0, [r5, #484] @ 0x1e4 │ │ @@ -1437981,254 +1437980,254 @@ │ │ add r1, pc, r1 │ │ bl 270d970 │ │ ldr r1, [pc, #496] @ 24c3430 │ │ movw r0, #12924 @ 0x327c │ │ add r0, r4, r0 │ │ mvn r6, #155 @ 0x9b │ │ b 24c360c │ │ - ldc2l 4, cr1, [r5, #980] @ 0x3d4 │ │ - ldc2l 10, cr13, [r5, #748] @ 0x2ec @ │ │ - ldc2l 3, cr3, [r7, #616] @ 0x268 │ │ - ldc2l 12, cr9, [r6, #468] @ 0x1d4 │ │ - ldc2l 4, cr9, [r7, #432] @ 0x1b0 │ │ + ldc2l 5, cr1, [r5, #136] @ 0x88 │ │ + ldc2l 10, cr13, [r5, #928] @ 0x3a0 @ │ │ + ldc2l 3, cr3, [r7, #796] @ 0x31c │ │ + ldc2l 12, cr9, [r6, #648] @ 0x288 │ │ + ldc2l 4, cr9, [r7, #612] @ 0x264 │ │ ldc2l 7, cr12, [r8, #204] @ 0xcc │ │ - ldc2l 3, cr5, [r8, #240] @ 0xf0 │ │ - ldc2l 7, cr3, [r5, #388] @ 0x184 │ │ - ldc2l 14, cr0, [r8, #912] @ 0x390 │ │ - ldc2l 1, cr1, [r7, #28] │ │ - ldc2l 11, cr2, [r8, #232] @ 0xe8 @ │ │ - ldc2l 2, cr3, [r7, #440] @ 0x1b8 │ │ - ldc2l 11, cr7, [r5, #312] @ 0x138 @ │ │ - ldc2l 7, cr11, [r5, #128] @ 0x80 │ │ - vcadd.f32 d21, d22, d1, #270 │ │ - ldc2l 0, cr1, [r7, #280] @ 0x118 │ │ - ldc2l 3, cr5, [r7, #168] @ 0xa8 │ │ - ldc2l 3, cr11, [r7, #944] @ 0x3b0 │ │ - ldc2l 15, cr0, [r7, #952] @ 0x3b8 │ │ - ldc2l 13, cr0, [r8, #468] @ 0x1d4 │ │ - ldc2l 4, cr13, [r6, #796] @ 0x31c │ │ - vcadd.f32 d29, d5, d28, #270 │ │ - ldc2l 10, cr7, [r5, #36] @ 0x24 @ │ │ - ldc2l 2, cr15, [r6, #28] │ │ - ldc2l 6, cr1, [r6, #916] @ 0x394 │ │ + ldc2l 3, cr5, [r8, #420] @ 0x1a4 │ │ + ldc2l 7, cr3, [r5, #568] @ 0x238 │ │ + ldc2l 15, cr0, [r8, #68] @ 0x44 │ │ + ldc2l 1, cr1, [r7, #208] @ 0xd0 │ │ + ldc2l 11, cr2, [r8, #412] @ 0x19c @ │ │ + ldc2l 2, cr3, [r7, #620] @ 0x26c │ │ + ldc2l 11, cr7, [r5, #492] @ 0x1ec @ │ │ + ldc2l 7, cr11, [r5, #308] @ 0x134 │ │ + vcadd.f32 d21, d22, d30, #270 │ │ + ldc2l 0, cr1, [r7, #460] @ 0x1cc │ │ + ldc2l 3, cr5, [r7, #348] @ 0x15c │ │ + ldc2l 4, cr11, [r7, #100] @ 0x64 │ │ + ldc2l 0, cr1, [r7, #108] @ 0x6c │ │ + ldc2l 13, cr0, [r8, #648] @ 0x288 │ │ + ldc2l 4, cr13, [r6, #976] @ 0x3d0 │ │ + ldc2l 8, cr13, [r5, #356] @ 0x164 │ │ + ldc2l 10, cr7, [r5, #216] @ 0xd8 @ │ │ + ldc2l 2, cr15, [r6, #208] @ 0xd0 │ │ + ldc2l 7, cr1, [r6, #72] @ 0x48 │ │ ldc2l 2, cr14, [r8, #668] @ 0x29c │ │ - ldc2l 1, cr9, [r7, #500] @ 0x1f4 │ │ - ldc2l 2, cr11, [r6, #580] @ 0x244 │ │ - ldc2l 5, cr11, [r5, #144] @ 0x90 │ │ + ldc2l 1, cr9, [r7, #680] @ 0x2a8 │ │ + ldc2l 2, cr11, [r6, #760] @ 0x2f8 │ │ + ldc2l 5, cr11, [r5, #324] @ 0x144 │ │ ldc2l 4, cr12, [r8, #92] @ 0x5c │ │ - ldc2l 2, cr7, [r7, #44] @ 0x2c │ │ - ldc2l 1, cr13, [r7, #832] @ 0x340 │ │ - ldc2l 6, cr13, [r5, #724] @ 0x2d4 │ │ - ldc2l 3, cr3, [r5, #1000] @ 0x3e8 │ │ + ldc2l 2, cr7, [r7, #224] @ 0xe0 │ │ + ldc2l 1, cr13, [r7, #1012] @ 0x3f4 │ │ + ldc2l 6, cr13, [r5, #904] @ 0x388 │ │ + ldc2l 4, cr3, [r5, #156] @ 0x9c │ │ ldc2l 3, cr12, [r8, #432] @ 0x1b0 │ │ - ldc2l 15, cr14, [r7, #896] @ 0x380 │ │ - vcadd.f32 d25, d6, d26, #270 │ │ - ldc2l 5, cr7, [r6, #948] @ 0x3b4 │ │ + ldc2l 0, cr15, [r7, #52] @ 0x34 │ │ + ldc2l 8, cr9, [r6, #348] @ 0x15c │ │ + ldc2l 6, cr7, [r6, #104] @ 0x68 │ │ ldc2l 9, cr10, [r8, #124] @ 0x7c @ │ │ - ldc2l 7, cr15, [r5, #68] @ 0x44 │ │ - ldc2l 5, cr3, [r6, #988] @ 0x3dc │ │ - ldc2l 7, cr7, [r5, #588] @ 0x24c │ │ - ldc2l 0, cr7, [r7, #508] @ 0x1fc │ │ - ldc2l 10, cr0, [r8, #340] @ 0x154 @ │ │ - ldc2l 6, cr15, [r5, #424] @ 0x1a8 │ │ - ldc2l 14, cr14, [r7, #652] @ 0x28c │ │ - ldc2l 6, cr2, [r8, #504] @ 0x1f8 │ │ - ldc2l 9, cr0, [r8, #414] @ 0x19e @ │ │ - ldc2l 1, cr13, [r6, #116] @ 0x74 │ │ - ldc2l 15, cr12, [r7, #476] @ 0x1dc │ │ - ldc2l 3, cr8, [r8, #488] @ 0x1e8 │ │ - ldc2l 4, cr7, [r6, #148] @ 0x94 │ │ - ldc2l 5, cr15, [r5, #360] @ 0x168 │ │ - ldc2l 15, cr10, [r7, #228] @ 0xe4 │ │ + ldc2l 7, cr15, [r5, #248] @ 0xf8 │ │ + ldc2l 6, cr3, [r6, #144] @ 0x90 │ │ + ldc2l 7, cr7, [r5, #768] @ 0x300 │ │ + ldc2l 0, cr7, [r7, #688] @ 0x2b0 │ │ + ldc2l 10, cr0, [r8, #520] @ 0x208 @ │ │ + ldc2l 6, cr15, [r5, #604] @ 0x25c │ │ + ldc2l 14, cr14, [r7, #832] @ 0x340 │ │ + ldc2l 6, cr2, [r8, #684] @ 0x2ac │ │ + ldc2l 9, cr0, [r8, #504] @ 0x1f8 @ │ │ + ldc2l 1, cr13, [r6, #296] @ 0x128 │ │ + ldc2l 15, cr12, [r7, #656] @ 0x290 │ │ + ldc2l 3, cr8, [r8, #668] @ 0x29c │ │ + ldc2l 4, cr7, [r6, #328] @ 0x148 │ │ + ldc2l 5, cr15, [r5, #540] @ 0x21c │ │ + ldc2l 15, cr10, [r7, #408] @ 0x198 │ │ ldc2l 7, cr10, [r8, #264] @ 0x108 │ │ - ldc2l 1, cr3, [r5, #104] @ 0x68 │ │ - ldc2l 13, cr14, [r6, #764] @ 0x2fc │ │ - ldc2l 10, cr0, [r7, #892] @ 0x37c @ │ │ - ldc2l 13, cr14, [r6, #476] @ 0x1dc │ │ - ldc2l 14, cr10, [r7, #452] @ 0x1c4 │ │ - ldc2l 2, cr5, [r6, #456] @ 0x1c8 │ │ - ldc2l 4, cr9, [r6, #856] @ 0x358 │ │ - ldc2l 1, cr1, [r6, #952] @ 0x3b8 │ │ - ldc2l 11, cr4, [r8, #696] @ 0x2b8 @ │ │ - ldc2l 9, cr1, [r7, #480] @ 0x1e0 @ │ │ - ldc2l 13, cr10, [r6, #564] @ 0x234 │ │ - ldc2l 12, cr14, [r6, #560] @ 0x230 │ │ - ldc2l 13, cr10, [r7, #388] @ 0x184 │ │ - ldc2l 1, cr13, [r5, #984] @ 0x3d8 │ │ - ldc2l 10, cr4, [r8, #988] @ 0x3dc @ │ │ - ldc2l 3, cr9, [r6, #788] @ 0x314 │ │ - ldc2l 3, cr2, [r8, #184] @ 0xb8 │ │ - ldc2l 3, cr6, [r8, #804] @ 0x324 │ │ - ldc2l 12, cr12, [r7, #300] @ 0x12c │ │ - ldc2l 1, cr3, [r6, #556] @ 0x22c │ │ - ldc2l 0, cr5, [r6, #528] @ 0x210 │ │ - ldc2l 1, cr3, [r6, #380] @ 0x17c │ │ - ldc2l 12, cr10, [r7, #152] @ 0x98 │ │ - ldc2l 0, cr7, [r6, #588] @ 0x24c │ │ - ldc2l 10, cr4, [r7, #872] @ 0x368 @ │ │ - ldc2l 4, cr5, [r5, #632] @ 0x278 │ │ - ldc2l 10, cr0, [r5, #312] @ 0x138 @ │ │ - ldc2l 11, cr10, [r7, #576] @ 0x240 @ │ │ - ldc2l 11, cr12, [r7, #32] @ │ │ - ldc2l 15, cr7, [r8, #144] @ 0x90 │ │ - ldc2l 15, cr7, [r8, #104] @ 0x68 │ │ - ldc2l 10, cr10, [r6, #844] @ 0x34c @ │ │ - ldc2l 9, cr14, [r7, #118] @ 0x76 @ │ │ - ldc2l 9, cr8, [r7, #206] @ 0xce @ │ │ - ldc2l 14, cr7, [r8, #616] @ 0x268 │ │ - vcadd.f32 q15, , q8, #270 │ │ - ldc2l 10, cr12, [r7, #36] @ 0x24 @ │ │ + ldc2l 1, cr3, [r5, #284] @ 0x11c │ │ + ldc2l 13, cr14, [r6, #944] @ 0x3b0 │ │ + ldc2l 11, cr0, [r7, #48] @ 0x30 @ │ │ + ldc2l 13, cr14, [r6, #656] @ 0x290 │ │ + ldc2l 14, cr10, [r7, #632] @ 0x278 │ │ + ldc2l 2, cr5, [r6, #636] @ 0x27c │ │ + ldc2l 5, cr9, [r6, #12] │ │ + ldc2l 2, cr1, [r6, #108] @ 0x6c │ │ + ldc2l 11, cr4, [r8, #876] @ 0x36c @ │ │ + ldc2l 10, cr1, [r7, #116] @ 0x74 @ │ │ + ldc2l 13, cr10, [r6, #744] @ 0x2e8 │ │ + ldc2l 12, cr14, [r6, #740] @ 0x2e4 │ │ + ldc2l 13, cr10, [r7, #568] @ 0x238 │ │ + ldc2l 2, cr13, [r5, #140] @ 0x8c │ │ + ldc2l 11, cr4, [r8, #144] @ 0x90 @ │ │ + ldc2l 3, cr9, [r6, #968] @ 0x3c8 │ │ + ldc2l 3, cr2, [r8, #364] @ 0x16c │ │ + ldc2l 3, cr6, [r8, #984] @ 0x3d8 │ │ + ldc2l 12, cr12, [r7, #480] @ 0x1e0 │ │ + ldc2l 1, cr3, [r6, #736] @ 0x2e0 │ │ + ldc2l 0, cr5, [r6, #708] @ 0x2c4 │ │ + ldc2l 1, cr3, [r6, #560] @ 0x230 │ │ + ldc2l 12, cr10, [r7, #332] @ 0x14c │ │ + ldc2l 0, cr7, [r6, #768] @ 0x300 │ │ + ldc2l 11, cr4, [r7, #28] @ │ │ + ldc2l 4, cr5, [r5, #812] @ 0x32c │ │ + ldc2l 10, cr0, [r5, #492] @ 0x1ec @ │ │ + ldc2l 11, cr10, [r7, #756] @ 0x2f4 @ │ │ + ldc2l 11, cr12, [r7, #212] @ 0xd4 @ │ │ + ldc2l 15, cr7, [r8, #324] @ 0x144 │ │ + ldc2l 15, cr7, [r8, #284] @ 0x11c │ │ + ldc2l 11, cr10, [r6] @ │ │ + ldc2l 9, cr14, [r7, #208] @ 0xd0 @ │ │ + ldc2l 9, cr8, [r7, #296] @ 0x128 @ │ │ + ldc2l 14, cr7, [r8, #796] @ 0x31c │ │ + ldc2l 9, cr14, [r7, #26] @ │ │ + ldc2l 10, cr12, [r7, #216] @ 0xd8 @ │ │ ldc2l 11, cr11, [r8, #812] @ 0x32c @ │ │ - ldc2l 0, cr7, [r5, #748] @ 0x2ec │ │ - ldc2l 11, cr2, [r5, #1016] @ 0x3f8 @ │ │ - ldc2l 4, cr14, [r7, #664] @ 0x298 │ │ - ldc2l 13, cr0, [r6, #580] @ 0x244 │ │ - ldc2l 12, cr10, [r5, #124] @ 0x7c │ │ - ldc2l 3, cr0, [r8, #172] @ 0xac │ │ - vcadd.f32 d24, d7, d7, #270 │ │ - ldc2l 5, cr0, [r7, #284] @ 0x11c │ │ - ldc2l 15, cr8, [r6, #740] @ 0x2e4 │ │ - ldc2l 6, cr2, [r7, #504] @ 0x1f8 │ │ - ldc2l 9, cr12, [r6, #472] @ 0x1d8 @ │ │ + ldc2l 0, cr7, [r5, #928] @ 0x3a0 │ │ + ldc2l 12, cr2, [r5, #172] @ 0xac │ │ + ldc2l 4, cr14, [r7, #844] @ 0x34c │ │ + ldc2l 13, cr0, [r6, #760] @ 0x2f8 │ │ + ldc2l 12, cr10, [r5, #304] @ 0x130 │ │ + ldc2l 3, cr0, [r8, #352] @ 0x160 │ │ + ldc2l 8, cr8, [r7, #208] @ 0xd0 │ │ + ldc2l 5, cr0, [r7, #464] @ 0x1d0 │ │ + ldc2l 15, cr8, [r6, #920] @ 0x398 │ │ + ldc2l 6, cr2, [r7, #684] @ 0x2ac │ │ + ldc2l 10, cr12, [r6, #100] @ 0x64 @ │ │ vcadd.f32 , q4, , #270 │ │ - ldc2l 11, cr10, [r5, #84] @ 0x54 @ │ │ - ldc2l 8, cr10, [r7, #492] @ 0x1ec │ │ - ldc2l 14, cr14, [r5, #200] @ 0xc8 │ │ - ldc2l 14, cr1, [r8, #380] @ 0x17c │ │ - ldc2l 12, cr7, [r8, #8] │ │ - ldc2l 0, cr5, [r5, #728] @ 0x2d8 │ │ - ldc2l 12, cr2, [r6, #828] @ 0x33c │ │ - ldc2l 7, cr6, [r7, #408] @ 0x198 │ │ - ldc2l 9, cr2, [r5, #326] @ 0x146 @ │ │ - ldc2l 9, cr2, [r5, #294] @ 0x126 @ │ │ - ldc2l 13, cr8, [r6, #940] @ 0x3ac │ │ - ldc2l 10, cr0, [r6, #1016] @ 0x3f8 @ │ │ - ldc2l 6, cr10, [r6, #844] @ 0x34c │ │ + ldc2l 11, cr10, [r5, #264] @ 0x108 @ │ │ + vcadd.f32 d26, d23, d24, #270 │ │ + ldc2l 14, cr14, [r5, #380] @ 0x17c │ │ + ldc2l 14, cr1, [r8, #560] @ 0x230 │ │ + ldc2l 12, cr7, [r8, #188] @ 0xbc │ │ + ldc2l 0, cr5, [r5, #908] @ 0x38c │ │ + ldc2l 12, cr2, [r6, #1008] @ 0x3f0 │ │ + ldc2l 7, cr6, [r7, #588] @ 0x24c │ │ + ldc2l 9, cr2, [r5, #416] @ 0x1a0 @ │ │ + ldc2l 9, cr2, [r5, #384] @ 0x180 @ │ │ + ldc2l 14, cr8, [r6, #96] @ 0x60 │ │ + ldc2l 11, cr0, [r6, #172] @ 0xac @ │ │ + ldc2l 7, cr10, [r6] │ │ ldc2l 6, cr13, [r8, #416] @ 0x1a0 │ │ - ldc2l 6, cr10, [r7, #860] @ 0x35c │ │ - ldc2l 12, cr14, [r5, #476] @ 0x1dc │ │ - ldc2l 9, cr5, [r8, #344] @ 0x158 @ │ │ - vcadd.f32 , q12, , #270 │ │ - ldc2l 2, cr12, [r7, #96] @ 0x60 │ │ - ldc2l 14, cr15, [r6, #380] @ 0x17c │ │ - vcadd.f32 , q4, q13, #270 │ │ - ldc2l 5, cr0, [r6, #876] @ 0x36c │ │ - ldc2l 1, cr10, [r6, #800] @ 0x320 │ │ - ldc2l 6, cr12, [r5, #372] @ 0x174 │ │ - ldc2l 8, cr6, [r5, #224] @ 0xe0 │ │ - ldc2l 0, cr0, [r5, #188] @ 0xbc │ │ - ldc2l 15, cr13, [r7, #772] @ 0x304 │ │ - ldc2l 15, cr13, [r7, #700] @ 0x2bc │ │ - ldc2l 15, cr13, [r7, #544] @ 0x220 │ │ + ldc2l 7, cr10, [r7, #16] │ │ + ldc2l 12, cr14, [r5, #656] @ 0x290 │ │ + ldc2l 9, cr5, [r8, #434] @ 0x1b2 @ │ │ + ldc2l 8, cr1, [r8, #1000] @ 0x3e8 │ │ + ldc2l 2, cr12, [r7, #276] @ 0x114 │ │ + ldc2l 14, cr15, [r6, #560] @ 0x230 │ │ + ldc2l 8, cr1, [r8, #604] @ 0x25c │ │ + ldc2l 6, cr0, [r6, #32] │ │ + ldc2l 1, cr10, [r6, #980] @ 0x3d4 │ │ + ldc2l 6, cr12, [r5, #552] @ 0x228 │ │ + vcadd.f32 q11, , , #270 │ │ + ldc2l 0, cr0, [r5, #368] @ 0x170 │ │ + ldc2l 15, cr13, [r7, #952] @ 0x3b8 │ │ + ldc2l 15, cr13, [r7, #880] @ 0x370 │ │ + ldc2l 15, cr13, [r7, #724] @ 0x2d4 │ │ ldc2l 2, cr11, [r8, #584] @ 0x248 │ │ - ldc2l 5, cr6, [r6, #380] @ 0x17c │ │ - ldc2l 15, cr15, [r4, #432] @ 0x1b0 │ │ - ldc2l 4, cr4, [r6, #676] @ 0x2a4 │ │ - ldc2l 4, cr7, [r8, #480] @ 0x1e0 │ │ - ldc2l 4, cr6, [r6, #944] @ 0x3b0 │ │ - ldc2l 9, cr4, [r5, #32] @ │ │ - ldc2l 2, cr10, [r5, #668] @ 0x29c │ │ + ldc2l 5, cr6, [r6, #560] @ 0x230 │ │ + ldc2l 15, cr15, [r4, #612] @ 0x264 │ │ + ldc2l 4, cr4, [r6, #856] @ 0x358 │ │ + ldc2l 4, cr7, [r8, #660] @ 0x294 │ │ + ldc2l 5, cr6, [r6, #100] @ 0x64 │ │ + ldc2l 9, cr4, [r5, #122] @ 0x7a @ │ │ + ldc2l 2, cr10, [r5, #848] @ 0x350 │ │ ldc2l 1, cr11, [r8, #552] @ 0x228 │ │ ldc2l 15, cr12, [r8, #372] @ 0x174 │ │ - ldc2l 15, cr9, [r7, #816] @ 0x330 │ │ - ldc2l 14, cr7, [r7, #180] @ 0xb4 │ │ - ldc2l 1, cr8, [r5, #536] @ 0x218 │ │ - ldc2l 1, cr8, [r5, #424] @ 0x1a8 │ │ - ldc2l 5, cr8, [r6, #884] @ 0x374 │ │ - ldc2l 12, cr1, [r7, #504] @ 0x1f8 │ │ - ldc2l 1, cr8, [r5, #80] @ 0x50 │ │ - ldc2l 15, cr11, [r6, #884] @ 0x374 │ │ - ldc2l 13, cr7, [r7, #256] @ 0x100 │ │ - ldc2l 3, cr6, [r6, #76] @ 0x4c │ │ - ldc2l 13, cr11, [r7, #964] @ 0x3c4 │ │ - ldc2l 4, cr1, [r8, #540] @ 0x21c │ │ - ldc2l 10, cr15, [r6, #168] @ 0xa8 @ │ │ - ldc2l 12, cr13, [r6, #800] @ 0x320 │ │ + ldc2l 15, cr9, [r7, #996] @ 0x3e4 │ │ + ldc2l 14, cr7, [r7, #360] @ 0x168 │ │ + ldc2l 1, cr8, [r5, #716] @ 0x2cc │ │ + ldc2l 1, cr8, [r5, #604] @ 0x25c │ │ + ldc2l 6, cr8, [r6, #40] @ 0x28 │ │ + ldc2l 12, cr1, [r7, #684] @ 0x2ac │ │ + ldc2l 1, cr8, [r5, #260] @ 0x104 │ │ + ldc2l 0, cr12, [r6, #40] @ 0x28 │ │ + ldc2l 13, cr7, [r7, #436] @ 0x1b4 │ │ + ldc2l 3, cr6, [r6, #256] @ 0x100 │ │ + ldc2l 14, cr11, [r7, #120] @ 0x78 │ │ + ldc2l 4, cr1, [r8, #720] @ 0x2d0 │ │ + ldc2l 10, cr15, [r6, #348] @ 0x15c @ │ │ + ldc2l 12, cr13, [r6, #980] @ 0x3d4 │ │ ldc2l 15, cr10, [r8, #464] @ 0x1d0 │ │ - ldc2l 11, cr1, [r7, #184] @ 0xb8 @ │ │ - ldc2l 3, cr1, [r8, #896] @ 0x380 │ │ - ldc2l 11, cr13, [r7, #908] @ 0x38c @ │ │ - ldc2l 1, cr0, [r6, #92] @ 0x5c │ │ - ldc2l 1, cr12, [r5, #792] @ 0x318 │ │ - ldc2l 1, cr7, [r8, #36] @ 0x24 │ │ - ldc2l 11, cr13, [r7, #436] @ 0x1b4 @ │ │ - ldc2l 10, cr1, [r7, #272] @ 0x110 @ │ │ + ldc2l 11, cr1, [r7, #364] @ 0x16c @ │ │ + ldc2l 4, cr1, [r8, #52] @ 0x34 │ │ + ldc2l 12, cr13, [r7, #64] @ 0x40 │ │ + ldc2l 1, cr0, [r6, #272] @ 0x110 │ │ + ldc2l 1, cr12, [r5, #972] @ 0x3cc │ │ + ldc2l 1, cr7, [r8, #216] @ 0xd8 │ │ + ldc2l 11, cr13, [r7, #616] @ 0x268 @ │ │ + ldc2l 10, cr1, [r7, #452] @ 0x1c4 @ │ │ ldc2l 14, cr10, [r8, #312] @ 0x138 │ │ - ldc2l 2, cr1, [r8, #848] @ 0x350 │ │ - ldc2l 12, cr9, [r7, #420] @ 0x1a4 │ │ - ldc2l 12, cr9, [r7, #300] @ 0x12c │ │ - ldc2l 2, cr5, [r8, #988] @ 0x3dc │ │ - ldc2l 15, cr3, [r6, #1008] @ 0x3f0 │ │ - ldc2l 4, cr4, [r5, #620] @ 0x26c │ │ + ldc2l 3, cr1, [r8, #4] │ │ + ldc2l 12, cr9, [r7, #600] @ 0x258 │ │ + ldc2l 12, cr9, [r7, #480] @ 0x1e0 │ │ + ldc2l 3, cr5, [r8, #144] @ 0x90 │ │ + ldc2l 0, cr4, [r6, #164] @ 0xa4 │ │ + ldc2l 4, cr4, [r5, #800] @ 0x320 │ │ ldc2l 3, cr9, [r8, #616] @ 0x268 │ │ - ldc2l 11, cr9, [r7, #652] @ 0x28c @ │ │ + ldc2l 11, cr9, [r7, #832] @ 0x340 @ │ │ ldc2l 13, cr10, [r8, #80] @ 0x50 │ │ - ldc2l 1, cr14, [r5, #220] @ 0xdc │ │ - ldc2l 4, cr4, [r5, #4] │ │ - ldc2l 10, cr5, [r7, #716] @ 0x2cc @ │ │ - ldc2l 1, cr6, [r5, #440] @ 0x1b8 │ │ - ldc2l 15, cr1, [r6, #784] @ 0x310 │ │ - ldc2l 10, cr11, [r7, #236] @ 0xec @ │ │ - ldc2l 9, cr13, [r6, #170] @ 0xaa @ │ │ - ldc2l 6, cr15, [r6, #444] @ 0x1bc │ │ - ldc2l 9, cr3, [r7, #44] @ 0x2c @ │ │ - ldc2l 9, cr9, [r6, #476] @ 0x1dc @ │ │ - ldc2l 15, cr13, [r5, #952] @ 0x3b8 │ │ - ldc2l 0, cr5, [r8, #744] @ 0x2e8 │ │ - vcadd.f32 , q2, q10, #270 │ │ + ldc2l 1, cr14, [r5, #400] @ 0x190 │ │ + ldc2l 4, cr4, [r5, #184] @ 0xb8 │ │ + ldc2l 10, cr5, [r7, #896] @ 0x380 @ │ │ + ldc2l 1, cr6, [r5, #620] @ 0x26c │ │ + ldc2l 15, cr1, [r6, #964] @ 0x3c4 │ │ + ldc2l 10, cr11, [r7, #416] @ 0x1a0 @ │ │ + ldc2l 9, cr13, [r6, #260] @ 0x104 @ │ │ + ldc2l 6, cr15, [r6, #624] @ 0x270 │ │ + ldc2l 9, cr3, [r7, #134] @ 0x86 @ │ │ + ldc2l 10, cr9, [r6, #108] @ 0x6c @ │ │ + ldc2l 0, cr14, [r5, #108] @ 0x6c │ │ + ldc2l 0, cr5, [r8, #924] @ 0x39c │ │ + ldc2l 8, cr15, [r4, #580] @ 0x244 │ │ ldc2l 11, cr10, [r8, #280] @ 0x118 @ │ │ - ldc2l 13, cr6, [r8, #472] @ 0x1d8 │ │ - ldc2l 13, cr11, [r5, #988] @ 0x3dc │ │ - ldc2l 2, cr4, [r5, #4] │ │ - ldc2l 13, cr6, [r8, #52] @ 0x34 │ │ - ldc2l 15, cr4, [r8, #832] @ 0x340 │ │ - ldc2l 15, cr0, [r8, #104] @ 0x68 │ │ - ldc2l 12, cr15, [r5, #384] @ 0x180 │ │ - ldc2l 7, cr13, [r6, #436] @ 0x1b4 │ │ - ldc2l 4, cr15, [r6, #432] @ 0x1b0 │ │ - ldc2l 9, cr11, [r6, #170] @ 0xaa @ │ │ - ldc2l 6, cr15, [r4, #800] @ 0x320 │ │ - ldc2l 6, cr7, [r7, #560] @ 0x230 │ │ - ldc2l 14, cr4, [r8, #804] @ 0x324 │ │ - ldc2l 10, cr9, [r5, #212] @ 0xd4 @ │ │ - ldc2l 12, cr1, [r6, #648] @ 0x288 │ │ - ldc2l 4, cr1, [r7, #984] @ 0x3d8 │ │ - ldc2l 9, cr9, [r5, #436] @ 0x1b4 @ │ │ + ldc2l 13, cr6, [r8, #652] @ 0x28c │ │ + ldc2l 14, cr11, [r5, #144] @ 0x90 │ │ + ldc2l 2, cr4, [r5, #184] @ 0xb8 │ │ + ldc2l 13, cr6, [r8, #232] @ 0xe8 │ │ + ldc2l 15, cr4, [r8, #1012] @ 0x3f4 │ │ + ldc2l 15, cr0, [r8, #284] @ 0x11c │ │ + ldc2l 12, cr15, [r5, #564] @ 0x234 │ │ + ldc2l 7, cr13, [r6, #616] @ 0x268 │ │ + ldc2l 4, cr15, [r6, #612] @ 0x264 │ │ + ldc2l 9, cr11, [r6, #260] @ 0x104 @ │ │ + ldc2l 6, cr15, [r4, #980] @ 0x3d4 │ │ + ldc2l 6, cr7, [r7, #740] @ 0x2e4 │ │ + ldc2l 14, cr4, [r8, #984] @ 0x3d8 │ │ + ldc2l 10, cr9, [r5, #392] @ 0x188 @ │ │ + ldc2l 12, cr1, [r6, #828] @ 0x33c │ │ + ldc2l 5, cr1, [r7, #140] @ 0x8c │ │ + ldc2l 10, cr9, [r5, #28] @ │ │ ldc2l 6, cr12, [r8, #724] @ 0x2d4 │ │ - ldc2l 10, cr15, [r5, #908] @ 0x38c @ │ │ - ldc2l 7, cr9, [r7, #84] @ 0x54 │ │ - vcadd.f32 , , q12, #270 │ │ - vcadd.f32 , , q4, #270 │ │ - ldc2l 5, cr3, [r7, #512] @ 0x200 │ │ - ldc2l 2, cr15, [r6, #556] @ 0x22c │ │ - ldc2l 12, cr13, [r5, #232] @ 0xe8 │ │ - vcadd.f32 , , , #270 │ │ - ldc2l 10, cr5, [r6, #644] @ 0x284 @ │ │ - ldc2l 7, cr7, [r5, #996] @ 0x3e4 │ │ - ldc2l 14, cr3, [r5, #600] @ 0x258 │ │ - ldc2l 5, cr5, [r7, #232] @ 0xe8 │ │ - ldc2l 11, cr5, [r5, #1016] @ 0x3f8 @ │ │ - ldc2l 7, cr7, [r5, #496] @ 0x1f0 │ │ - ldc2l 5, cr9, [r6, #16] │ │ - ldc2l 4, cr9, [r6, #972] @ 0x3cc │ │ - ldc2l 8, cr15, [r5, #732] @ 0x2dc │ │ - ldc2l 4, cr9, [r7, #916] @ 0x394 │ │ - ldc2l 13, cr3, [r5, #548] @ 0x224 │ │ - ldc2l 2, cr13, [r7, #956] @ 0x3bc │ │ - ldc2l 6, cr1, [r5, #496] @ 0x1f0 │ │ - ldc2l 4, cr9, [r6, #184] @ 0xb8 │ │ - ldc2l 5, cr11, [r6, #136] @ 0x88 │ │ + ldc2l 11, cr15, [r5, #64] @ 0x40 @ │ │ + ldc2l 7, cr9, [r7, #264] @ 0x108 │ │ + ldc2l 9, cr1, [r5, #42] @ 0x2a @ │ │ + ldc2l 8, cr1, [r5, #980] @ 0x3d4 │ │ + ldc2l 5, cr3, [r7, #692] @ 0x2b4 │ │ + ldc2l 2, cr15, [r6, #736] @ 0x2e0 │ │ + ldc2l 12, cr13, [r5, #412] @ 0x19c │ │ + ldc2l 8, cr1, [r5, #480] @ 0x1e0 │ │ + ldc2l 10, cr5, [r6, #824] @ 0x338 @ │ │ + vcadd.f32 d23, d5, d22, #270 │ │ + ldc2l 14, cr3, [r5, #780] @ 0x30c │ │ + ldc2l 5, cr5, [r7, #412] @ 0x19c │ │ + ldc2l 12, cr5, [r5, #172] @ 0xac │ │ + ldc2l 7, cr7, [r5, #676] @ 0x2a4 │ │ + ldc2l 5, cr9, [r6, #196] @ 0xc4 │ │ + ldc2l 5, cr9, [r6, #128] @ 0x80 │ │ + vcadd.f32 , , q10, #270 │ │ + ldc2l 5, cr9, [r7, #72] @ 0x48 │ │ + ldc2l 13, cr3, [r5, #728] @ 0x2d8 │ │ + ldc2l 3, cr13, [r7, #112] @ 0x70 │ │ + ldc2l 6, cr1, [r5, #676] @ 0x2a4 │ │ + ldc2l 4, cr9, [r6, #364] @ 0x16c │ │ + ldc2l 5, cr11, [r6, #316] @ 0x13c │ │ ldc2l 11, cr8, [r8, #876] @ 0x36c @ │ │ - vcadd.f32 , q11, q13, #270 │ │ - ldc2l 7, cr6, [r8, #680] @ 0x2a8 │ │ - ldc2l 2, cr13, [r6, #520] @ 0x208 │ │ - ldc2l 7, cr15, [r5, #248] @ 0xf8 │ │ - ldc2l 12, cr3, [r5, #208] @ 0xd0 │ │ - ldc2l 0, cr1, [r7, #656] @ 0x290 │ │ - ldc2l 9, cr4, [r8, #470] @ 0x1d6 @ │ │ + ldc2l 9, cr1, [r6, #46] @ 0x2e @ │ │ + ldc2l 7, cr6, [r8, #860] @ 0x35c │ │ + ldc2l 2, cr13, [r6, #700] @ 0x2bc │ │ + ldc2l 7, cr15, [r5, #428] @ 0x1ac │ │ + ldc2l 12, cr3, [r5, #388] @ 0x184 │ │ + ldc2l 0, cr1, [r7, #836] @ 0x344 │ │ + ldc2l 10, cr4, [r8, #96] @ 0x60 @ │ │ add r1, pc, r1 │ │ mov r2, #36 @ 0x24 │ │ mov r3, #6 │ │ str r6, [r5, #1436] @ 0x59c │ │ bl 270d970 │ │ str r6, [r5, #1440] @ 0x5a0 │ │ movw r0, #12960 @ 0x32a0 │ │ @@ -1440272,129 +1440271,129 @@ │ │ bl 270d970 │ │ add r0, r6, #101 @ 0x65 │ │ str r0, [r5, #2368] @ 0x940 │ │ ldr r1, [pc, #464] @ 24c57e0 │ │ movw r0, #21312 @ 0x5340 │ │ add r0, r4, r0 │ │ b 24c57e4 │ │ - ldc2l 4, cr7, [r5, #1004] @ 0x3ec │ │ - ldc2l 6, cr6, [r8, #740] @ 0x2e4 │ │ - ldc2l 7, cr11, [r5, #148] @ 0x94 │ │ - ldc2l 1, cr15, [r4, #108] @ 0x6c │ │ - ldc2l 14, cr14, [r6, #300] @ 0x12c │ │ - ldc2l 1, cr5, [r7, #772] @ 0x304 │ │ - ldc2l 4, cr7, [r5, #180] @ 0xb4 │ │ - ldc2l 10, cr3, [r5, #860] @ 0x35c @ │ │ - ldc2l 1, cr11, [r7, #220] @ 0xdc │ │ - ldc2l 15, cr0, [r7, #144] @ 0x90 │ │ - ldc2l 15, cr6, [r7, #996] @ 0x3e4 │ │ - ldc2l 14, cr0, [r7, #928] @ 0x3a0 │ │ - ldc2l 10, cr14, [r7, #800] @ 0x320 @ │ │ - ldc2l 15, cr6, [r7, #632] @ 0x278 │ │ - ldc2l 5, cr5, [r6, #464] @ 0x1d0 │ │ - ldc2l 14, cr0, [r7, #496] @ 0x1f0 │ │ - ldc2l 4, cr3, [r6, #552] @ 0x228 │ │ - ldc2l 0, cr9, [r7, #624] @ 0x270 │ │ - ldc2l 2, cr7, [r5, #572] @ 0x23c │ │ - ldc2l 4, cr11, [r5, #872] @ 0x368 │ │ - ldc2l 2, cr7, [r5, #312] @ 0x138 │ │ - ldc2l 14, cr6, [r7, #536] @ 0x218 │ │ + ldc2l 5, cr7, [r5, #160] @ 0xa0 │ │ + ldc2l 6, cr6, [r8, #920] @ 0x398 │ │ + ldc2l 7, cr11, [r5, #328] @ 0x148 │ │ + ldc2l 1, cr15, [r4, #288] @ 0x120 │ │ + ldc2l 14, cr14, [r6, #480] @ 0x1e0 │ │ + ldc2l 1, cr5, [r7, #952] @ 0x3b8 │ │ + ldc2l 4, cr7, [r5, #360] @ 0x168 │ │ + ldc2l 11, cr3, [r5, #16] @ │ │ + ldc2l 1, cr11, [r7, #400] @ 0x190 │ │ + ldc2l 15, cr0, [r7, #324] @ 0x144 │ │ + ldc2l 0, cr7, [r7, #152] @ 0x98 │ │ + ldc2l 15, cr0, [r7, #84] @ 0x54 │ │ + ldc2l 10, cr14, [r7, #980] @ 0x3d4 @ │ │ + ldc2l 15, cr6, [r7, #812] @ 0x32c │ │ + ldc2l 5, cr5, [r6, #644] @ 0x284 │ │ + ldc2l 14, cr0, [r7, #676] @ 0x2a4 │ │ + ldc2l 4, cr3, [r6, #732] @ 0x2dc │ │ + ldc2l 0, cr9, [r7, #804] @ 0x324 │ │ + ldc2l 2, cr7, [r5, #752] @ 0x2f0 │ │ + ldc2l 5, cr11, [r5, #28] │ │ + ldc2l 2, cr7, [r5, #492] @ 0x1ec │ │ + ldc2l 14, cr6, [r7, #716] @ 0x2cc │ │ ldc2l 15, cr11, [r8, #204] @ 0xcc │ │ - vcadd.f32 d19, d21, d24, #270 │ │ - ldc2l 1, cr1, [r5, #652] @ 0x28c │ │ - ldc2l 15, cr8, [r7, #532] @ 0x214 │ │ - ldc2l 3, cr15, [r5, #100] @ 0x64 │ │ - ldc2l 13, cr2, [r7, #1008] @ 0x3f0 │ │ - ldc2l 5, cr4, [r8, #940] @ 0x3ac │ │ - ldc2l 13, cr2, [r7, #748] @ 0x2ec │ │ - ldc2l 13, cr6, [r7, #304] @ 0x130 │ │ - ldc2l 3, cr5, [r6, #88] @ 0x58 │ │ - ldc2l 5, cr4, [r8, #392] @ 0x188 │ │ - ldc2l 2, cr15, [r5, #136] @ 0x88 │ │ - ldc2l 13, cr2, [r7, #68] @ 0x44 │ │ + ldc2l 8, cr3, [r5, #852] @ 0x354 │ │ + ldc2l 1, cr1, [r5, #832] @ 0x340 │ │ + ldc2l 15, cr8, [r7, #712] @ 0x2c8 │ │ + ldc2l 3, cr15, [r5, #280] @ 0x118 │ │ + ldc2l 14, cr2, [r7, #164] @ 0xa4 │ │ + ldc2l 6, cr4, [r8, #96] @ 0x60 │ │ + ldc2l 13, cr2, [r7, #928] @ 0x3a0 │ │ + ldc2l 13, cr6, [r7, #484] @ 0x1e4 │ │ + ldc2l 3, cr5, [r6, #268] @ 0x10c │ │ + ldc2l 5, cr4, [r8, #572] @ 0x23c │ │ + ldc2l 2, cr15, [r5, #316] @ 0x13c │ │ + ldc2l 13, cr2, [r7, #248] @ 0xf8 │ │ ldc2l 13, cr11, [r8, #460] @ 0x1cc │ │ ldc2l 15, cr9, [r8, #464] @ 0x1d0 │ │ - ldc2l 4, cr7, [r6, #268] @ 0x10c │ │ - ldc2l 6, cr3, [r5, #672] @ 0x2a0 │ │ - ldc2l 9, cr14, [r6, #232] @ 0xe8 @ │ │ - ldc2l 12, cr10, [r7, #844] @ 0x34c │ │ - ldc2l 6, cr14, [r7, #808] @ 0x328 │ │ - ldc2l 1, cr6, [r8, #56] @ 0x38 │ │ - ldc2l 3, cr7, [r6, #484] @ 0x1e4 │ │ - ldc2l 12, cr8, [r7, #908] @ 0x38c │ │ + ldc2l 4, cr7, [r6, #448] @ 0x1c0 │ │ + ldc2l 6, cr3, [r5, #852] @ 0x354 │ │ + ldc2l 9, cr14, [r6, #322] @ 0x142 @ │ │ + ldc2l 13, cr10, [r7] │ │ + ldc2l 6, cr14, [r7, #988] @ 0x3dc │ │ + ldc2l 1, cr6, [r8, #236] @ 0xec │ │ + ldc2l 3, cr7, [r6, #664] @ 0x298 │ │ + ldc2l 13, cr8, [r7, #64] @ 0x40 │ │ ldc2l 14, cr9, [r8, #220] @ 0xdc │ │ - ldc2l 12, cr8, [r6, #404] @ 0x194 │ │ - ldc2l 2, cr5, [r5, #820] @ 0x334 │ │ - ldc2l 14, cr8, [r5, #620] @ 0x26c │ │ - ldc2l 1, cr13, [r5, #920] @ 0x398 │ │ + ldc2l 12, cr8, [r6, #584] @ 0x248 │ │ + ldc2l 2, cr5, [r5, #1000] @ 0x3e8 │ │ + ldc2l 14, cr8, [r5, #800] @ 0x320 │ │ + ldc2l 2, cr13, [r5, #76] @ 0x4c │ │ ldc2l 3, cr8, [r8, #808] @ 0x328 │ │ - ldc2l 9, cr2, [r8, #108] @ 0x6c @ │ │ - ldc2l 10, cr2, [r7, #632] @ 0x278 @ │ │ - ldc2l 11, cr8, [r7, #664] @ 0x298 @ │ │ - ldc2l 15, cr4, [r6, #928] @ 0x3a0 │ │ - ldc2l 10, cr12, [r6, #164] @ 0xa4 @ │ │ - ldc2l 15, cr10, [r5, #736] @ 0x2e0 │ │ - ldc2l 4, cr3, [r5, #28] │ │ - ldc2l 4, cr14, [r7, #448] @ 0x1c0 │ │ - ldc2l 10, cr8, [r6, #608] @ 0x260 @ │ │ - ldc2l 0, cr5, [r5, #1016] @ 0x3f8 │ │ + ldc2l 9, cr2, [r8, #198] @ 0xc6 @ │ │ + ldc2l 10, cr2, [r7, #812] @ 0x32c @ │ │ + ldc2l 11, cr8, [r7, #844] @ 0x34c @ │ │ + ldc2l 0, cr5, [r6, #84] @ 0x54 │ │ + ldc2l 10, cr12, [r6, #344] @ 0x158 @ │ │ + ldc2l 15, cr10, [r5, #916] @ 0x394 │ │ + ldc2l 4, cr3, [r5, #208] @ 0xd0 │ │ + ldc2l 4, cr14, [r7, #628] @ 0x274 │ │ + ldc2l 10, cr8, [r6, #788] @ 0x314 @ │ │ + ldc2l 1, cr5, [r5, #172] @ 0xac │ │ ldc2l 2, cr8, [r8, #296] @ 0x128 │ │ - ldc2l 12, cr6, [r5, #492] @ 0x1ec │ │ - ldc2l 10, cr8, [r7, #276] @ 0x114 @ │ │ - ldc2l 9, cr10, [r7, #250] @ 0xfa @ │ │ - ldc2l 10, cr8, [r7, #28] @ │ │ - ldc2l 0, cr5, [r5, #184] @ 0xb8 │ │ - ldc2l 0, cr5, [r5, #68] @ 0x44 │ │ + ldc2l 12, cr6, [r5, #672] @ 0x2a0 │ │ + ldc2l 10, cr8, [r7, #456] @ 0x1c8 @ │ │ + ldc2l 9, cr10, [r7, #340] @ 0x154 @ │ │ + ldc2l 10, cr8, [r7, #208] @ 0xd0 @ │ │ + ldc2l 0, cr5, [r5, #364] @ 0x16c │ │ + ldc2l 0, cr5, [r5, #248] @ 0xf8 │ │ ldc2l 1, cr8, [r8, #348] @ 0x15c │ │ - ldc2l 13, cr2, [r6, #144] @ 0x90 │ │ - ldc2l 2, cr3, [r5, #252] @ 0xfc │ │ - ldc2l 15, cr15, [r7, #252] @ 0xfc │ │ - ldc2l 14, cr12, [r5, #712] @ 0x2c8 │ │ + ldc2l 13, cr2, [r6, #324] @ 0x144 │ │ + ldc2l 2, cr3, [r5, #432] @ 0x1b0 │ │ + ldc2l 15, cr15, [r7, #432] @ 0x1b0 │ │ + ldc2l 14, cr12, [r5, #892] @ 0x37c │ │ vcadd.f32 d27, d8, d16, #270 │ │ - ldc2l 13, cr0, [r6, #628] @ 0x274 │ │ - ldc2l 14, cr12, [r5, #320] @ 0x140 │ │ - ldc2l 4, cr14, [r6, #324] @ 0x144 │ │ - ldc2l 13, cr0, [r6, #236] @ 0xec │ │ - ldc2l 11, cr14, [r5, #868] @ 0x364 @ │ │ - ldc2l 14, cr4, [r5, #448] @ 0x1c0 │ │ - ldc2l 10, cr8, [r5, #172] @ 0xac @ │ │ - ldc2l 9, cr0, [r5, #342] @ 0x156 @ │ │ - ldc2l 14, cr4, [r5, #108] @ 0x6c │ │ - ldc2l 9, cr0, [r5, #244] @ 0xf4 @ │ │ - ldc2l 9, cr8, [r5, #356] @ 0x164 @ │ │ - ldc2l 5, cr12, [r7, #392] @ 0x188 │ │ - ldc2l 12, cr0, [r6, #8] │ │ - ldc2l 15, cr2, [r5, #920] @ 0x398 │ │ - ldc2l 7, cr10, [r6, #596] @ 0x254 │ │ - ldc2l 9, cr8, [r5, #20] @ │ │ - ldc2l 3, cr2, [r8, #776] @ 0x308 │ │ - ldc2l 3, cr2, [r8, #688] @ 0x2b0 │ │ - ldc2l 4, cr6, [r7, #648] @ 0x288 │ │ + ldc2l 13, cr0, [r6, #808] @ 0x328 │ │ + ldc2l 14, cr12, [r5, #500] @ 0x1f4 │ │ + ldc2l 4, cr14, [r6, #504] @ 0x1f8 │ │ + ldc2l 13, cr0, [r6, #416] @ 0x1a0 │ │ + ldc2l 12, cr14, [r5, #24] │ │ + ldc2l 14, cr4, [r5, #628] @ 0x274 │ │ + ldc2l 10, cr8, [r5, #352] @ 0x160 @ │ │ + ldc2l 9, cr0, [r5, #432] @ 0x1b0 @ │ │ + ldc2l 14, cr4, [r5, #288] @ 0x120 │ │ + ldc2l 9, cr0, [r5, #334] @ 0x14e @ │ │ + ldc2l 9, cr8, [r5, #446] @ 0x1be @ │ │ + ldc2l 5, cr12, [r7, #572] @ 0x23c │ │ + ldc2l 12, cr0, [r6, #188] @ 0xbc │ │ + ldc2l 0, cr3, [r5, #76] @ 0x4c │ │ + ldc2l 7, cr10, [r6, #776] @ 0x308 │ │ + ldc2l 9, cr8, [r5, #110] @ 0x6e @ │ │ + ldc2l 3, cr2, [r8, #956] @ 0x3bc │ │ + ldc2l 3, cr2, [r8, #868] @ 0x364 │ │ + ldc2l 4, cr6, [r7, #828] @ 0x33c │ │ ldc2l 13, cr7, [r8, #924] @ 0x39c │ │ - ldc2l 4, cr12, [r7, #168] @ 0xa8 │ │ - ldc2l 12, cr4, [r5, #364] @ 0x16c │ │ - ldc2l 10, cr10, [r5, #144] @ 0x90 @ │ │ - ldc2l 9, cr14, [r5, #116] @ 0x74 @ │ │ - ldc2l 2, cr0, [r7, #908] @ 0x38c │ │ - ldc2l 14, cr2, [r5, #320] @ 0x140 │ │ - ldc2l 9, cr4, [r6, #252] @ 0xfc @ │ │ - ldc2l 11, cr4, [r5, #576] @ 0x240 @ │ │ - ldc2l 3, cr12, [r6, #628] @ 0x274 │ │ - ldc2l 2, cr0, [r7, #260] @ 0x104 │ │ + ldc2l 4, cr12, [r7, #348] @ 0x15c │ │ + ldc2l 12, cr4, [r5, #544] @ 0x220 │ │ + ldc2l 10, cr10, [r5, #324] @ 0x144 @ │ │ + ldc2l 9, cr14, [r5, #206] @ 0xce @ │ │ + ldc2l 3, cr0, [r7, #64] @ 0x40 │ │ + ldc2l 14, cr2, [r5, #500] @ 0x1f4 │ │ + ldc2l 9, cr4, [r6, #342] @ 0x156 @ │ │ + ldc2l 11, cr4, [r5, #756] @ 0x2f4 @ │ │ + ldc2l 3, cr12, [r6, #808] @ 0x328 │ │ + ldc2l 2, cr0, [r7, #440] @ 0x1b8 │ │ ldc2l 3, cr11, [r8, #856] @ 0x358 │ │ - ldc2l 2, cr6, [r7, #884] @ 0x374 │ │ - ldc2l 11, cr3, [r8, #92] @ 0x5c @ │ │ - ldc2l 3, cr4, [r7, #552] @ 0x228 │ │ - ldc2l 6, cr0, [r5, #40] @ 0x28 │ │ - ldc2l 2, cr6, [r7, #396] @ 0x18c │ │ - ldc2l 7, cr2, [r6, #472] @ 0x1d8 │ │ - ldc2l 10, cr6, [r6, #12] @ │ │ - ldc2l 2, cr12, [r6, #252] @ 0xfc │ │ - ldc2l 5, cr8, [r5, #772] @ 0x304 │ │ - vcadd.f32 d19, d8, d31, #270 │ │ + ldc2l 3, cr6, [r7, #40] @ 0x28 │ │ + ldc2l 11, cr3, [r8, #272] @ 0x110 @ │ │ + ldc2l 3, cr4, [r7, #732] @ 0x2dc │ │ + ldc2l 6, cr0, [r5, #220] @ 0xdc │ │ + ldc2l 2, cr6, [r7, #576] @ 0x240 │ │ + ldc2l 7, cr2, [r6, #652] @ 0x28c │ │ + ldc2l 10, cr6, [r6, #192] @ 0xc0 @ │ │ + ldc2l 2, cr12, [r6, #432] @ 0x1b0 │ │ + ldc2l 5, cr8, [r5, #952] @ 0x3b8 │ │ + ldc2l 8, cr3, [r8, #368] @ 0x170 │ │ mov r2, #36 @ 0x24 │ │ add r1, pc, r1 │ │ mov r3, #13 │ │ bl 270d970 │ │ add r0, r6, #102 @ 0x66 │ │ str r0, [r5, #2372] @ 0x944 │ │ ldr r1, [pc, #3632] @ 24c6634 │ │ @@ -1441303,113 +1441302,113 @@ │ │ add r1, pc, r1 │ │ add r0, r4, r0 │ │ mov r2, #36 @ 0x24 │ │ mov r3, #6 │ │ bl 270d970 │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 0, cr12, [r6, #76] @ 0x4c │ │ - ldc2l 15, cr5, [r7, #632] @ 0x278 │ │ - ldc2l 7, cr3, [r8, #836] @ 0x344 │ │ - ldc2l 15, cr5, [r7, #368] @ 0x170 │ │ - ldc2l 15, cr5, [r7, #292] @ 0x124 │ │ - ldc2l 4, cr5, [r8, #364] @ 0x16c │ │ - ldc2l 4, cr10, [r5, #904] @ 0x388 │ │ - ldc2l 3, cr14, [r5, #968] @ 0x3c8 │ │ - ldc2l 3, cr5, [r8, #996] @ 0x3e4 │ │ - ldc2l 3, cr2, [r6, #732] @ 0x2dc │ │ + ldc2l 0, cr12, [r6, #256] @ 0x100 │ │ + ldc2l 15, cr5, [r7, #812] @ 0x32c │ │ + ldc2l 7, cr3, [r8, #1016] @ 0x3f8 │ │ + ldc2l 15, cr5, [r7, #548] @ 0x224 │ │ + ldc2l 15, cr5, [r7, #472] @ 0x1d8 │ │ + ldc2l 4, cr5, [r8, #544] @ 0x220 │ │ + ldc2l 5, cr10, [r5, #60] @ 0x3c │ │ + ldc2l 4, cr14, [r5, #124] @ 0x7c │ │ + ldc2l 4, cr5, [r8, #152] @ 0x98 │ │ + ldc2l 3, cr2, [r6, #912] @ 0x390 │ │ ldc2l 1, cr9, [r8, #284] @ 0x11c │ │ - ldc2l 1, cr6, [r5, #740] @ 0x2e4 │ │ - ldc2l 5, cr15, [r7, #648] @ 0x288 │ │ - ldc2l 4, cr0, [r6, #392] @ 0x188 │ │ - ldc2l 5, cr15, [r7, #428] @ 0x1ac │ │ - ldc2l 14, cr3, [r7, #532] @ 0x214 │ │ - ldc2l 13, cr11, [r7, #220] @ 0xdc │ │ - ldc2l 7, cr2, [r5, #936] @ 0x3a8 │ │ - ldc2l 7, cr2, [r5, #832] @ 0x340 │ │ - ldc2l 13, cr11, [r6, #500] @ 0x1f4 │ │ - ldc2l 0, cr0, [r5, #452] @ 0x1c4 │ │ - ldc2l 10, cr13, [r6, #84] @ 0x54 @ │ │ - ldc2l 0, cr8, [r5, #580] @ 0x244 │ │ - ldc2l 3, cr12, [r5, #696] @ 0x2b8 │ │ - ldc2l 12, cr1, [r7, #620] @ 0x26c │ │ - ldc2l 12, cr1, [r7, #504] @ 0x1f8 │ │ - ldc2l 4, cr4, [r5, #224] @ 0xe0 │ │ - ldc2l 13, cr7, [r7, #484] @ 0x1e4 │ │ - ldc2l 9, cr13, [r6, #86] @ 0x56 @ │ │ - ldc2l 0, cr14, [r5, #944] @ 0x3b0 │ │ - ldc2l 3, cr15, [r7, #216] @ 0xd8 │ │ - ldc2l 0, cr2, [r6, #628] @ 0x274 │ │ - ldc2l 11, cr11, [r6, #620] @ 0x26c @ │ │ - ldc2l 0, cr4, [r6, #964] @ 0x3c4 │ │ - ldc2l 5, cr13, [r7, #872] @ 0x368 │ │ - ldc2l 0, cr10, [r5, #852] @ 0x354 │ │ - ldc2l 11, cr11, [r6, #56] @ 0x38 @ │ │ - ldc2l 11, cr9, [r7, #284] @ 0x11c @ │ │ + ldc2l 1, cr6, [r5, #920] @ 0x398 │ │ + ldc2l 5, cr15, [r7, #828] @ 0x33c │ │ + ldc2l 4, cr0, [r6, #572] @ 0x23c │ │ + ldc2l 5, cr15, [r7, #608] @ 0x260 │ │ + ldc2l 14, cr3, [r7, #712] @ 0x2c8 │ │ + ldc2l 13, cr11, [r7, #400] @ 0x190 │ │ + ldc2l 8, cr2, [r5, #92] @ 0x5c │ │ + ldc2l 7, cr2, [r5, #1012] @ 0x3f4 │ │ + ldc2l 13, cr11, [r6, #680] @ 0x2a8 │ │ + ldc2l 0, cr0, [r5, #632] @ 0x278 │ │ + ldc2l 10, cr13, [r6, #264] @ 0x108 @ │ │ + ldc2l 0, cr8, [r5, #760] @ 0x2f8 │ │ + ldc2l 3, cr12, [r5, #876] @ 0x36c │ │ + ldc2l 12, cr1, [r7, #800] @ 0x320 │ │ + ldc2l 12, cr1, [r7, #684] @ 0x2ac │ │ + ldc2l 4, cr4, [r5, #404] @ 0x194 │ │ + ldc2l 13, cr7, [r7, #664] @ 0x298 │ │ + ldc2l 9, cr13, [r6, #176] @ 0xb0 @ │ │ + ldc2l 1, cr14, [r5, #100] @ 0x64 │ │ + ldc2l 3, cr15, [r7, #396] @ 0x18c │ │ + ldc2l 0, cr2, [r6, #808] @ 0x328 │ │ + ldc2l 11, cr11, [r6, #800] @ 0x320 @ │ │ + ldc2l 1, cr4, [r6, #120] @ 0x78 │ │ + ldc2l 6, cr13, [r7, #28] │ │ + ldc2l 1, cr10, [r5, #8] │ │ + ldc2l 11, cr11, [r6, #236] @ 0xec @ │ │ + ldc2l 11, cr9, [r7, #464] @ 0x1d0 @ │ │ ldc2l 11, cr10, [r8, #68] @ 0x44 @ │ │ - ldc2l 2, cr4, [r5, #312] @ 0x138 │ │ - ldc2l 12, cr9, [r6, #380] @ 0x17c │ │ - ldc2l 4, cr13, [r7, #860] @ 0x35c │ │ - ldc2l 4, cr2, [r5, #328] @ 0x148 │ │ - ldc2l 9, cr1, [r7, #436] @ 0x1b4 @ │ │ - ldc2l 10, cr9, [r7, #300] @ 0x12c @ │ │ - ldc2l 10, cr7, [r6, #484] @ 0x1e4 @ │ │ - ldc2l 0, cr12, [r5, #384] @ 0x180 │ │ - ldc2l 14, cr4, [r8, #368] @ 0x170 │ │ - ldc2l 14, cr4, [r8, #292] @ 0x124 │ │ - ldc2l 14, cr3, [r6, #604] @ 0x25c │ │ - ldc2l 7, cr15, [r6, #592] @ 0x250 │ │ - ldc2l 8, cr1, [r7, #724] @ 0x2d4 │ │ - ldc2l 9, cr7, [r6, #292] @ 0x124 @ │ │ + ldc2l 2, cr4, [r5, #492] @ 0x1ec │ │ + ldc2l 12, cr9, [r6, #560] @ 0x230 │ │ + ldc2l 5, cr13, [r7, #16] │ │ + ldc2l 4, cr2, [r5, #508] @ 0x1fc │ │ + ldc2l 10, cr1, [r7, #28] @ │ │ + ldc2l 10, cr9, [r7, #480] @ 0x1e0 @ │ │ + ldc2l 10, cr7, [r6, #664] @ 0x298 @ │ │ + ldc2l 0, cr12, [r5, #564] @ 0x234 │ │ + ldc2l 14, cr4, [r8, #548] @ 0x224 │ │ + ldc2l 14, cr4, [r8, #472] @ 0x1d8 │ │ + ldc2l 14, cr3, [r6, #784] @ 0x310 │ │ + ldc2l 7, cr15, [r6, #772] @ 0x304 │ │ + vcadd.f32 , , q9, #270 │ │ + ldc2l 9, cr7, [r6, #382] @ 0x17e @ │ │ ldc2l 11, cr8, [r8, #52] @ 0x34 @ │ │ - ldc2l 15, cr14, [r7, #668] @ 0x29c │ │ - ldc2l 11, cr7, [r5, #752] @ 0x2f0 @ │ │ - ldc2l 11, cr15, [r4, #188] @ 0xbc @ │ │ - ldc2l 8, cr7, [r6, #852] @ 0x354 │ │ - ldc2l 8, cr7, [r7, #860] @ 0x35c │ │ - ldc2l 8, cr9, [r7, #80] @ 0x50 │ │ - ldc2l 10, cr5, [r5, #568] @ 0x238 @ │ │ - ldc2l 1, cr13, [r7, #872] @ 0x368 │ │ - ldc2l 12, cr9, [r5, #784] @ 0x310 │ │ - ldc2l 14, cr14, [r7, #340] @ 0x154 │ │ - ldc2l 11, cr13, [r5, #724] @ 0x2d4 @ │ │ - ldc2l 7, cr9, [r7, #256] @ 0x100 │ │ - ldc2l 7, cr7, [r6, #604] @ 0x25c │ │ - ldc2l 11, cr1, [r6, #352] @ 0x160 @ │ │ - ldc2l 8, cr9, [r6, #236] @ 0xec │ │ + ldc2l 15, cr14, [r7, #848] @ 0x350 │ │ + ldc2l 11, cr7, [r5, #932] @ 0x3a4 @ │ │ + ldc2l 11, cr15, [r4, #368] @ 0x170 @ │ │ + ldc2l 9, cr7, [r6, #4] @ │ │ + ldc2l 9, cr7, [r7, #8] @ │ │ + vcadd.f32 , , , #270 │ │ + ldc2l 10, cr5, [r5, #748] @ 0x2ec @ │ │ + ldc2l 2, cr13, [r7, #28] │ │ + ldc2l 12, cr9, [r5, #964] @ 0x3c4 │ │ + ldc2l 14, cr14, [r7, #520] @ 0x208 │ │ + ldc2l 11, cr13, [r5, #904] @ 0x388 @ │ │ + ldc2l 7, cr9, [r7, #436] @ 0x1b4 │ │ + ldc2l 7, cr7, [r6, #784] @ 0x310 │ │ + ldc2l 11, cr1, [r6, #532] @ 0x214 @ │ │ + vcadd.f32 , q3, q12, #270 │ │ ldc2l 15, cr6, [r8, #32] │ │ - ldc2l 6, cr1, [r7, #16] │ │ - ldc2l 13, cr3, [r5, #672] @ 0x2a0 │ │ - ldc2l 13, cr5, [r6, #240] @ 0xf0 │ │ - ldc2l 10, cr13, [r5, #512] @ 0x200 @ │ │ - ldc2l 6, cr7, [r6, #504] @ 0x1f8 │ │ - ldc2l 12, cr14, [r7, #728] @ 0x2d8 │ │ - ldc2l 12, cr14, [r7, #612] @ 0x264 │ │ - ldc2l 5, cr9, [r7, #632] @ 0x278 │ │ - ldc2l 11, cr15, [r5] @ │ │ - ldc2l 8, cr7, [r5, #344] @ 0x158 │ │ - ldc2l 3, cr11, [r7, #1008] @ 0x3f0 │ │ + ldc2l 6, cr1, [r7, #196] @ 0xc4 │ │ + ldc2l 13, cr3, [r5, #852] @ 0x354 │ │ + ldc2l 13, cr5, [r6, #420] @ 0x1a4 │ │ + ldc2l 10, cr13, [r5, #692] @ 0x2b4 @ │ │ + ldc2l 6, cr7, [r6, #684] @ 0x2ac │ │ + ldc2l 12, cr14, [r7, #908] @ 0x38c │ │ + ldc2l 12, cr14, [r7, #792] @ 0x318 │ │ + ldc2l 5, cr9, [r7, #812] @ 0x32c │ │ + ldc2l 11, cr15, [r5, #180] @ 0xb4 @ │ │ + vcadd.f32 d23, d21, d3, #270 │ │ + ldc2l 4, cr11, [r7, #164] @ 0xa4 │ │ ldc2l 4, cr10, [r8, #876] @ 0x36c │ │ ldc2l 4, cr10, [r8, #760] @ 0x2f8 │ │ - ldc2l 14, cr1, [r5, #460] @ 0x1cc │ │ - ldc2l 9, cr9, [r5, #380] @ 0x17c @ │ │ - ldc2l 7, cr5, [r5, #108] @ 0x6c │ │ - ldc2l 7, cr7, [r5, #388] @ 0x184 │ │ - ldc2l 3, cr11, [r7, #28] │ │ - ldc2l 4, cr9, [r7, #100] @ 0x64 │ │ - ldc2l 10, cr5, [r6, #892] @ 0x37c @ │ │ - ldc2l 13, cr12, [r7, #868] @ 0x364 │ │ - ldc2l 3, cr9, [r7, #720] @ 0x2d0 │ │ + ldc2l 14, cr1, [r5, #640] @ 0x280 │ │ + ldc2l 9, cr9, [r5, #470] @ 0x1d6 @ │ │ + ldc2l 7, cr5, [r5, #288] @ 0x120 │ │ + ldc2l 7, cr7, [r5, #568] @ 0x238 │ │ + ldc2l 3, cr11, [r7, #208] @ 0xd0 │ │ + ldc2l 4, cr9, [r7, #280] @ 0x118 │ │ + ldc2l 11, cr5, [r6, #48] @ 0x30 @ │ │ + ldc2l 14, cr12, [r7, #24] │ │ + ldc2l 3, cr9, [r7, #900] @ 0x384 │ │ ldc2l 5, cr8, [r8, #576] @ 0x240 │ │ - ldc2l 10, cr3, [r5, #604] @ 0x25c @ │ │ - ldc2l 2, cr5, [r7, #424] @ 0x1a8 │ │ + ldc2l 10, cr3, [r5, #784] @ 0x310 @ │ │ + ldc2l 2, cr5, [r7, #604] @ 0x25c │ │ ldc2l 11, cr6, [r8, #412] @ 0x19c @ │ │ - ldc2l 15, cr12, [r6, #356] @ 0x164 │ │ - ldc2l 15, cr12, [r6, #240] @ 0xf0 │ │ - ldc2l 1, cr13, [r4, #620] @ 0x26c │ │ + ldc2l 15, cr12, [r6, #536] @ 0x218 │ │ + ldc2l 15, cr12, [r6, #420] @ 0x1a4 │ │ + ldc2l 1, cr13, [r4, #800] @ 0x320 │ │ │ │ 024c67c0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r6, r1 │ │ ldr r1, [fp, #8] │ │ @@ -1441533,15 +1441532,15 @@ │ │ vld1.8 {d16-d17}, [r3], r2 │ │ subs r0, r0, #16 │ │ vst1.8 {d16-d17}, [r7], r2 │ │ bne 24c69a8 │ │ cmp r8, ip │ │ beq 24c6924 │ │ b 24c68f4 │ │ - ldc2l 4, cr0, [r5, #700] @ 0x2bc │ │ + ldc2l 4, cr0, [r5, #880] @ 0x370 │ │ │ │ 024c69c8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #108 @ 0x6c │ │ mov r4, r3 │ │ mov sl, r2 │ │ @@ -1441826,43 +1441825,43 @@ │ │ bl 270df80 │ │ add r1, sp, #12 │ │ mov r0, sl │ │ mov r2, r6 │ │ mov r3, #32 │ │ bl 270d970 │ │ b 24c6bdc │ │ - ldc2l 5, cr5, [r6, #792] @ 0x318 │ │ - ldc2l 3, cr12, [r5, #100] @ 0x64 │ │ - ldc2l 1, cr4, [r8, #528] @ 0x210 │ │ - ldc2l 1, cr1, [r6, #300] @ 0x12c │ │ - ldc2l 12, cr2, [r6, #116] @ 0x74 │ │ - ldc2l 15, cr2, [r5, #700] @ 0x2bc │ │ - ldc2l 3, cr12, [r5, #420] @ 0x1a4 │ │ - ldc2l 7, cr1, [r5, #40] @ 0x28 │ │ - ldc2l 12, cr10, [r6, #776] @ 0x308 │ │ - ldc2l 14, cr6, [r7, #836] @ 0x344 │ │ - ldc2l 2, cr12, [r5, #692] @ 0x2b4 │ │ - ldc2l 1, cr4, [r8, #184] @ 0xb8 │ │ - ldc2l 13, cr6, [r7, #148] @ 0x94 │ │ - ldc2l 3, cr0, [r5, #364] @ 0x16c │ │ - ldc2l 7, cr4, [r6, #832] @ 0x340 │ │ - ldc2l 6, cr4, [r6, #288] @ 0x120 │ │ - ldc2l 8, cr4, [r5, #328] @ 0x148 │ │ - ldc2l 9, cr15, [r7, #90] @ 0x5a @ │ │ - ldc2l 10, cr10, [r5, #224] @ 0xe0 @ │ │ - ldc2l 1, cr12, [r5, #900] @ 0x384 │ │ + ldc2l 5, cr5, [r6, #972] @ 0x3cc │ │ + ldc2l 3, cr12, [r5, #280] @ 0x118 │ │ + ldc2l 1, cr4, [r8, #708] @ 0x2c4 │ │ + ldc2l 1, cr1, [r6, #480] @ 0x1e0 │ │ + ldc2l 12, cr2, [r6, #296] @ 0x128 │ │ + ldc2l 15, cr2, [r5, #880] @ 0x370 │ │ + ldc2l 3, cr12, [r5, #600] @ 0x258 │ │ + ldc2l 7, cr1, [r5, #220] @ 0xdc │ │ + ldc2l 12, cr10, [r6, #956] @ 0x3bc │ │ + ldc2l 14, cr6, [r7, #1016] @ 0x3f8 │ │ + ldc2l 2, cr12, [r5, #872] @ 0x368 │ │ + ldc2l 1, cr4, [r8, #364] @ 0x16c │ │ + ldc2l 13, cr6, [r7, #328] @ 0x148 │ │ + ldc2l 3, cr0, [r5, #544] @ 0x220 │ │ + ldc2l 7, cr4, [r6, #1012] @ 0x3f4 │ │ + ldc2l 6, cr4, [r6, #468] @ 0x1d4 │ │ + ldc2l 8, cr4, [r5, #508] @ 0x1fc │ │ + ldc2l 9, cr15, [r7, #180] @ 0xb4 @ │ │ + ldc2l 10, cr10, [r5, #404] @ 0x194 @ │ │ + ldc2l 2, cr12, [r5, #56] @ 0x38 │ │ ldc2l 13, cr7, [r8, #908] @ 0x38c │ │ ldc2l 10, cr9, [r8, #852] @ 0x354 @ │ │ - ldc2l 9, cr8, [r5, #500] @ 0x1f4 @ │ │ - ldc2l 12, cr11, [r7, #624] @ 0x270 │ │ - vcadd.f32 d16, d6, d29, #270 │ │ + ldc2l 10, cr8, [r5, #156] @ 0x9c @ │ │ + ldc2l 12, cr11, [r7, #804] @ 0x324 │ │ + ldc2l 8, cr0, [r6, #360] @ 0x168 │ │ ldc2l 4, cr9, [r8, #548] @ 0x224 │ │ - ldc2l 3, cr5, [r6, #888] @ 0x378 │ │ - ldc2l 9, cr10, [r5, #312] @ 0x138 @ │ │ - ldc2l 1, cr12, [r5, #276] @ 0x114 │ │ + ldc2l 4, cr5, [r6, #44] @ 0x2c │ │ + ldc2l 9, cr10, [r5, #402] @ 0x192 @ │ │ + ldc2l 1, cr12, [r5, #456] @ 0x1c8 │ │ ldc2l 11, cr9, [r8, #152] @ 0x98 @ │ │ │ │ 024c6ec8 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #112 @ 0x70 │ │ mov r6, r1 │ │ @@ -1441939,23 +1441938,23 @@ │ │ ldr r4, [sp] │ │ add r0, pc, r0 │ │ mov r1, #6 │ │ bl 270ce40 │ │ mov r0, r4 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 14, cr3, [r8, #728] @ 0x2d8 │ │ - ldc2l 14, cr15, [r4, #1020] @ 0x3fc │ │ - ldc2l 15, cr1, [r7, #332] @ 0x14c │ │ - ldc2l 15, cr11, [r6, #600] @ 0x258 │ │ - ldc2l 13, cr3, [r8, #792] @ 0x318 │ │ - ldc2l 9, cr8, [r7, #142] @ 0x8e @ │ │ - ldc2l 0, cr8, [r7, #784] @ 0x310 │ │ - ldc2l 15, cr11, [r4, #12] │ │ - ldc2l 13, cr3, [r8, #728] @ 0x2d8 │ │ + ldc2l 14, cr3, [r8, #908] @ 0x38c │ │ + ldc2l 15, cr15, [r4, #176] @ 0xb0 │ │ + ldc2l 15, cr1, [r7, #512] @ 0x200 │ │ + ldc2l 15, cr11, [r6, #780] @ 0x30c │ │ + ldc2l 13, cr3, [r8, #972] @ 0x3cc │ │ + ldc2l 9, cr8, [r7, #232] @ 0xe8 @ │ │ + ldc2l 0, cr8, [r7, #964] @ 0x3c4 │ │ + ldc2l 15, cr11, [r4, #192] @ 0xc0 │ │ + ldc2l 13, cr3, [r8, #908] @ 0x38c │ │ │ │ 024c7030 : │ │ push {r4, r5, r6, r7, fp, lr} │ │ add fp, sp, #16 │ │ mov r6, r0 │ │ ldr r0, [pc, #300] @ 24c7170 │ │ mov r5, r1 │ │ @@ -1443138,41 +1443137,41 @@ │ │ ldr r0, [pc, #124] @ 24c8320 │ │ mov r1, r6 │ │ mov r2, r5 │ │ movw r3, #414 @ 0x19e │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ b 24c8244 │ │ - ldc2l 0, cr10, [r6, #232] @ 0xe8 │ │ - ldc2l 5, cr2, [r6, #624] @ 0x270 │ │ - ldc2l 15, cr9, [r6, #792] @ 0x318 │ │ - ldc2l 5, cr2, [r6, #160] @ 0xa0 │ │ - ldc2l 15, cr9, [r6, #584] @ 0x248 │ │ - ldc2l 4, cr2, [r6, #976] @ 0x3d0 │ │ - ldc2l 14, cr9, [r6, #824] @ 0x338 │ │ - ldc2l 4, cr2, [r6, #192] @ 0xc0 │ │ - ldc2l 14, cr9, [r6, #248] @ 0xf8 │ │ - ldc2l 3, cr2, [r6, #640] @ 0x280 │ │ - ldc2l 13, cr9, [r6, #552] @ 0x228 │ │ - ldc2l 2, cr2, [r6, #944] @ 0x3b0 │ │ - ldc2l 11, cr9, [r6, #24] @ │ │ - ldc2l 0, cr2, [r6, #416] @ 0x1a0 │ │ - ldc2l 10, cr9, [r6, #824] @ 0x338 @ │ │ - ldc2l 0, cr2, [r6, #192] @ 0xc0 │ │ - ldc2l 10, cr9, [r6, #520] @ 0x208 @ │ │ - ldc2l 15, cr1, [r6, #912] @ 0x390 │ │ - ldc2l 15, cr1, [r6, #384] @ 0x180 │ │ - vcadd.f32 , q11, q3, #270 │ │ - vcadd.f32 d25, d6, d30, #270 │ │ - ldc2l 7, cr9, [r6, #904] @ 0x388 │ │ - ldc2l 7, cr9, [r6, #616] @ 0x268 │ │ - ldc2l 7, cr9, [r6, #328] @ 0x148 │ │ - ldc2l 11, cr1, [r6, #880] @ 0x370 @ │ │ - ldc2l 6, cr1, [r7, #216] @ 0xd8 │ │ - ldc2l 6, cr1, [r7, #24] │ │ + ldc2l 0, cr10, [r6, #412] @ 0x19c │ │ + ldc2l 5, cr2, [r6, #804] @ 0x324 │ │ + ldc2l 15, cr9, [r6, #972] @ 0x3cc │ │ + ldc2l 5, cr2, [r6, #340] @ 0x154 │ │ + ldc2l 15, cr9, [r6, #764] @ 0x2fc │ │ + ldc2l 5, cr2, [r6, #132] @ 0x84 │ │ + ldc2l 14, cr9, [r6, #1004] @ 0x3ec │ │ + ldc2l 4, cr2, [r6, #372] @ 0x174 │ │ + ldc2l 14, cr9, [r6, #428] @ 0x1ac │ │ + ldc2l 3, cr2, [r6, #820] @ 0x334 │ │ + ldc2l 13, cr9, [r6, #732] @ 0x2dc │ │ + ldc2l 3, cr2, [r6, #100] @ 0x64 │ │ + ldc2l 11, cr9, [r6, #204] @ 0xcc @ │ │ + ldc2l 0, cr2, [r6, #596] @ 0x254 │ │ + ldc2l 10, cr9, [r6, #1004] @ 0x3ec @ │ │ + ldc2l 0, cr2, [r6, #372] @ 0x174 │ │ + ldc2l 10, cr9, [r6, #700] @ 0x2bc @ │ │ + ldc2l 0, cr2, [r6, #68] @ 0x44 │ │ + ldc2l 15, cr1, [r6, #564] @ 0x234 │ │ + ldc2l 8, cr9, [r6, #972] @ 0x3cc │ │ + ldc2l 8, cr9, [r6, #364] @ 0x16c │ │ + vcadd.f32 d25, d6, d15, #270 │ │ + ldc2l 7, cr9, [r6, #796] @ 0x31c │ │ + ldc2l 7, cr9, [r6, #508] @ 0x1fc │ │ + ldc2l 12, cr1, [r6, #36] @ 0x24 │ │ + ldc2l 6, cr1, [r7, #396] @ 0x18c │ │ + ldc2l 6, cr1, [r7, #204] @ 0xcc │ │ │ │ 024c8324 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ mov r5, r3 │ │ mov r4, r2 │ │ @@ -1443220,15 +1443219,15 @@ │ │ mov r3, sl │ │ bl 270d960 │ │ cmp r0, #0 │ │ bne 24c836c │ │ ldr r0, [r4] │ │ str r0, [r8] │ │ b 24c83b8 │ │ - ldc2l 11, cr9, [r5, #660] @ 0x294 @ │ │ + ldc2l 11, cr9, [r5, #840] @ 0x348 @ │ │ │ │ 024c83fc : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #860 @ 0x35c │ │ mov r4, r3 │ │ mov r6, r2 │ │ @@ -1443728,49 +1443727,49 @@ │ │ ldr r0, [fp, #16] │ │ ldr r2, [fp, #12] │ │ add r1, pc, r1 │ │ str r0, [sp] │ │ add r0, sp, #84 @ 0x54 │ │ bl 270e230 │ │ b 24c84d0 │ │ - ldc2l 11, cr12, [r7, #480] @ 0x1e0 @ │ │ - ldc2l 9, cr14, [r4, #30] @ │ │ - ldc2l 0, cr11, [r6, #124] @ 0x7c │ │ - vcadd.f32 q15, q10, , #270 │ │ - ldc2l 15, cr10, [r6, #876] @ 0x36c │ │ - vcadd.f32 d30, d20, d11, #270 │ │ - ldc2l 15, cr10, [r6, #636] @ 0x27c │ │ - vcadd.f32 q15, q2, , #270 │ │ - ldc2l 15, cr10, [r6, #332] @ 0x14c │ │ - ldc2l 3, cr5, [r7, #464] @ 0x1d0 │ │ - vcadd.f32 d26, d21, d21, #270 │ │ + ldc2l 11, cr12, [r7, #660] @ 0x294 @ │ │ + ldc2l 9, cr14, [r4, #120] @ 0x78 @ │ │ + ldc2l 0, cr11, [r6, #304] @ 0x130 │ │ + ldc2l 8, cr14, [r4, #1008] @ 0x3f0 │ │ + ldc2l 0, cr11, [r6, #32] │ │ + ldc2l 8, cr14, [r4, #736] @ 0x2e0 │ │ + ldc2l 15, cr10, [r6, #816] @ 0x330 │ │ + ldc2l 8, cr14, [r4, #496] @ 0x1f0 │ │ + ldc2l 15, cr10, [r6, #512] @ 0x200 │ │ + ldc2l 3, cr5, [r7, #644] @ 0x284 │ │ + ldc2l 8, cr10, [r5, #840] @ 0x348 │ │ strhteq r1, [r9], -ip │ │ - ldc2l 2, cr9, [r6, #220] @ 0xdc │ │ - ldc2l 12, cr6, [r6, #632] @ 0x278 │ │ - ldc2l 1, cr5, [r7, #840] @ 0x348 │ │ - ldc2l 6, cr10, [r5, #244] @ 0xf4 │ │ - ldc2l 5, cr10, [r5, #1012] @ 0x3f4 │ │ - ldc2l 10, cr6, [r6, #88] @ 0x58 @ │ │ + ldc2l 2, cr9, [r6, #400] @ 0x190 │ │ + ldc2l 12, cr6, [r6, #812] @ 0x32c │ │ + ldc2l 1, cr5, [r7, #1020] @ 0x3fc │ │ + ldc2l 6, cr10, [r5, #424] @ 0x1a8 │ │ + ldc2l 6, cr10, [r5, #168] @ 0xa8 │ │ + ldc2l 10, cr6, [r6, #268] @ 0x10c @ │ │ eoreq r1, r9, r0, lsr #21 │ │ - ldc2l 5, cr10, [r5, #132] @ 0x84 │ │ - ldc2l 15, cr4, [r6, #516] @ 0x204 │ │ + ldc2l 5, cr10, [r5, #312] @ 0x138 │ │ + ldc2l 15, cr4, [r6, #696] @ 0x2b8 │ │ ldrdeq r1, [r9], -r4 @ │ │ - ldc2l 12, cr14, [r5, #980] @ 0x3d4 │ │ - ldc2l 5, cr11, [r5, #412] @ 0x19c │ │ - ldc2l 6, cr10, [r5, #756] @ 0x2f4 │ │ - ldc2l 4, cr10, [r5, #372] @ 0x174 │ │ + ldc2l 13, cr14, [r5, #136] @ 0x88 │ │ + ldc2l 5, cr11, [r5, #592] @ 0x250 │ │ + ldc2l 6, cr10, [r5, #936] @ 0x3a8 │ │ + ldc2l 4, cr10, [r5, #552] @ 0x228 │ │ eoreq r1, r9, r4, lsr r9 │ │ - ldc2l 12, cr14, [r5, #340] @ 0x154 │ │ - ldc2l 13, cr0, [r7, #788] @ 0x314 │ │ - ldc2l 3, cr10, [r5, #644] @ 0x284 │ │ + ldc2l 12, cr14, [r5, #520] @ 0x208 │ │ + ldc2l 13, cr0, [r7, #968] @ 0x3c8 │ │ + ldc2l 3, cr10, [r5, #824] @ 0x338 │ │ eoreq r1, r9, r8, ror r8 │ │ - ldc2l 2, cr2, [r8, #84] @ 0x54 │ │ - ldc2l 11, cr12, [r6, #180] @ 0xb4 @ │ │ + ldc2l 2, cr2, [r8, #264] @ 0x108 │ │ + ldc2l 11, cr12, [r6, #360] @ 0x168 @ │ │ eoreq r1, r9, r4, lsl r8 │ │ - ldc2l 10, cr12, [r7, #832] @ 0x340 @ │ │ + ldc2l 10, cr12, [r7, #1012] @ 0x3f4 @ │ │ │ │ 024c8c6c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #92 @ 0x5c │ │ mov r6, r1 │ │ ldr r1, [pc, #360] @ 24c8dec │ │ @@ -1443861,15 +1443860,15 @@ │ │ mov r1, r4 │ │ ldr r2, [fp, #28] │ │ mov r3, sl │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 1, cr14, [r4, #524] @ 0x20c │ │ + ldc2l 1, cr14, [r4, #704] @ 0x2c0 │ │ │ │ 024c8df0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #28 │ │ mov r4, r3 │ │ mov r5, r2 │ │ @@ -1443916,16 +1443915,16 @@ │ │ ldr r0, [pc, #24] @ 24c8ec4 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 1, cr1, [r5, #920] @ 0x398 │ │ - ldc2l 1, cr1, [r5, #376] @ 0x178 │ │ + ldc2l 2, cr1, [r5, #76] @ 0x4c │ │ + ldc2l 1, cr1, [r5, #556] @ 0x22c │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 024c8ed0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #12 │ │ @@ -1444573,78 +1444572,78 @@ │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrbeq r9, [r6, #1892] @ 0x764 │ │ ldrbeq r9, [r6, #1864] @ 0x748 │ │ ldrbeq r9, [r6, #1868] @ 0x74c │ │ ldrbeq r9, [r6, #1824] @ 0x720 │ │ ldrbeq r9, [r6, #1828] @ 0x724 │ │ ldrbeq r9, [r6, #1792] @ 0x700 │ │ - ldc2l 8, cr2, [r7, #500] @ 0x1f4 │ │ - ldc2l 10, cr6, [r6, #648] @ 0x288 @ │ │ + vcadd.f32 d18, d23, d26, #270 │ │ + ldc2l 10, cr6, [r6, #828] @ 0x33c @ │ │ ldrbeq r9, [r6, #1740] @ 0x6cc │ │ ldrbeq r9, [r6, #404] @ 0x194 │ │ - ldc2l 7, cr0, [r6, #816] @ 0x330 │ │ + ldc2l 7, cr0, [r6, #996] @ 0x3e4 │ │ ldc2l 5, cr5, [r8, #440] @ 0x1b8 │ │ - ldc2l 8, cr9, [r5, #628] @ 0x274 │ │ + vcadd.f32 , , q5, #270 │ │ ldrbeq r9, [r6, #84] @ 0x54 │ │ - ldc2l 6, cr12, [r5, #904] @ 0x388 │ │ + ldc2l 7, cr12, [r5, #60] @ 0x3c │ │ eoreq r0, r9, ip, ror #29 │ │ eoreq r1, r9, r0, lsl r4 │ │ - ldc2l 2, cr6, [r7, #376] @ 0x178 │ │ - ldc2l 9, cr0, [r5, #206] @ 0xce @ │ │ - ldc2l 1, cr12, [r6, #920] @ 0x398 │ │ + ldc2l 2, cr6, [r7, #556] @ 0x22c │ │ + ldc2l 9, cr0, [r5, #296] @ 0x128 @ │ │ + ldc2l 2, cr12, [r6, #76] @ 0x4c │ │ ldrbeq r9, [r6, #1668] @ 0x684 │ │ ldrbeq r9, [r6, #1648] @ 0x670 │ │ ldrbeq r8, [r6, #4000] @ 0xfa0 │ │ eoreq r0, r9, r4, lsl #26 │ │ ldrbeq r9, [r6, #1624] @ 0x658 │ │ ldrbeq r9, [r6, #1632] @ 0x660 │ │ eoreq r1, r9, r4, lsr #7 │ │ ldrbeq r9, [r6, #1592] @ 0x638 │ │ ldrbeq r8, [r6, #3864] @ 0xf18 │ │ - ldc2l 1, cr6, [r7, #472] @ 0x1d8 │ │ - ldc2l 6, cr6, [r5, #356] @ 0x164 │ │ - ldc2l 1, cr6, [r7, #324] @ 0x144 │ │ - ldc2l 0, cr10, [r4, #8] │ │ + ldc2l 1, cr6, [r7, #652] @ 0x28c │ │ + ldc2l 6, cr6, [r5, #536] @ 0x218 │ │ + ldc2l 1, cr6, [r7, #504] @ 0x1f8 │ │ + ldc2l 0, cr10, [r4, #188] @ 0xbc │ │ ldrbeq r8, [r6, #3972] @ 0xf84 │ │ - ldc2l 1, cr6, [r7, #920] @ 0x398 │ │ - ldc2l 6, cr6, [r5, #804] @ 0x324 │ │ - ldc2l 1, cr6, [r7, #772] @ 0x304 │ │ - ldc2l 2, cr4, [r6, #752] @ 0x2f0 │ │ + ldc2l 2, cr6, [r7, #76] @ 0x4c │ │ + ldc2l 6, cr6, [r5, #984] @ 0x3d8 │ │ + ldc2l 1, cr6, [r7, #952] @ 0x3b8 │ │ + ldc2l 2, cr4, [r6, #932] @ 0x3a4 │ │ ldrbeq r9, [r6, #1488] @ 0x5d0 │ │ ldrbeq r9, [r6, #1464] @ 0x5b8 │ │ ldrbeq r9, [r6, #1468] @ 0x5bc │ │ ldrbeq r9, [r6, #1424] @ 0x590 │ │ ldrbeq r9, [r6, #1428] @ 0x594 │ │ ldrbeq r9, [r6, #1392] @ 0x570 │ │ - ldc2l 6, cr2, [r7, #948] @ 0x3b4 │ │ - ldc2l 9, cr6, [r6, #36] @ 0x24 @ │ │ + ldc2l 7, cr2, [r7, #104] @ 0x68 │ │ + ldc2l 9, cr6, [r6, #126] @ 0x7e @ │ │ ldrbeq r9, [r6, #1340] @ 0x53c │ │ ldrbeq r9, [r6, #1028] @ 0x404 │ │ - ldc2l 5, cr6, [r7, #768] @ 0x300 │ │ + ldc2l 5, cr6, [r7, #948] @ 0x3b4 │ │ vcadd.f32 d21, d8, d26, #270 │ │ - ldc2l 11, cr9, [r5, #356] @ 0x164 @ │ │ + ldc2l 11, cr9, [r5, #536] @ 0x218 @ │ │ ldrbeq r9, [r6, #784] @ 0x310 │ │ - ldc2l 9, cr12, [r5, #316] @ 0x13c @ │ │ + ldc2l 9, cr12, [r5, #406] @ 0x196 @ │ │ ldrbeq r9, [r6, #996] @ 0x3e4 │ │ ldrbeq r9, [r6, #972] @ 0x3cc │ │ ldrbeq r8, [r6, #3728] @ 0xe90 │ │ ldrbeq r9, [r6, #948] @ 0x3b4 │ │ ldrbeq r9, [r6, #956] @ 0x3bc │ │ ldrbeq r9, [r6, #928] @ 0x3a0 │ │ ldrbeq r8, [r6, #3600] @ 0xe10 │ │ - ldc2l 0, cr6, [r7, #480] @ 0x1e0 │ │ - ldc2l 1, cr4, [r7, #572] @ 0x23c │ │ - ldc2l 0, cr6, [r7, #292] @ 0x124 │ │ - ldc2l 14, cr9, [r4, #1000] @ 0x3e8 │ │ + ldc2l 0, cr6, [r7, #660] @ 0x294 │ │ + ldc2l 1, cr4, [r7, #752] @ 0x2f0 │ │ + ldc2l 0, cr6, [r7, #472] @ 0x1d8 │ │ + ldc2l 15, cr9, [r4, #156] @ 0x9c │ │ ldrbeq r9, [r6, #844] @ 0x34c │ │ ldrbeq r8, [r6, #3708] @ 0xe7c │ │ - ldc2l 0, cr6, [r7, #928] @ 0x3a0 │ │ - ldc2l 1, cr4, [r7, #1020] @ 0x3fc │ │ - ldc2l 0, cr6, [r7, #740] @ 0x2e4 │ │ - ldc2l 1, cr4, [r6, #720] @ 0x2d0 │ │ + ldc2l 1, cr6, [r7, #84] @ 0x54 │ │ + ldc2l 2, cr4, [r7, #176] @ 0xb0 │ │ + ldc2l 0, cr6, [r7, #920] @ 0x398 │ │ + ldc2l 1, cr4, [r6, #900] @ 0x384 │ │ │ │ 024c99fc : │ │ mov r0, #0 │ │ bx lr │ │ │ │ 024c9a04 : │ │ push {fp, lr} │ │ @@ -1444801,21 +1444800,21 @@ │ │ mov r1, #6 │ │ ldr r0, [pc, #40] @ 24c9c7c │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 12, cr7, [r7, #920] @ 0x398 │ │ - ldc2l 15, cr3, [r7, #596] @ 0x254 │ │ + ldc2l 13, cr7, [r7, #76] @ 0x4c │ │ + ldc2l 15, cr3, [r7, #776] @ 0x308 │ │ ldc2l 10, cr4, [r8, #212] @ 0xd4 @ │ │ - ldc2l 9, cr3, [r6, #88] @ 0x58 @ │ │ - ldc2l 9, cr15, [r5, #484] @ 0x1e4 @ │ │ - vcadd.f32 , q11, q6, #270 │ │ - ldc2l 11, cr7, [r7, #328] @ 0x148 @ │ │ + ldc2l 9, cr3, [r6, #178] @ 0xb2 @ │ │ + ldc2l 10, cr15, [r5, #124] @ 0x7c @ │ │ + ldc2l 8, cr5, [r6, #996] @ 0x3e4 │ │ + ldc2l 11, cr7, [r7, #508] @ 0x1fc @ │ │ │ │ 024c9c80 : │ │ ldr r0, [r0] │ │ bx lr │ │ │ │ 024c9c88 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ @@ -1444951,31 +1444950,31 @@ │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrbeq r8, [r6, #3044] @ 0xbe4 │ │ ldrbeq r8, [r6, #3413] @ 0xd55 │ │ ldrbeq r8, [r6, #3005] @ 0xbbd │ │ - ldc2l 1, cr6, [r5, #424] @ 0x1a8 │ │ - ldc2l 1, cr6, [r5, #324] @ 0x144 │ │ - ldc2l 14, cr1, [r5, #408] @ 0x198 │ │ - ldc2l 3, cr3, [r5, #924] @ 0x39c │ │ - ldc2l 3, cr0, [r5, #256] @ 0x100 │ │ - ldc2l 0, cr15, [r7, #588] @ 0x24c │ │ - ldc2l 0, cr10, [r5, #452] @ 0x1c4 │ │ - ldc2l 11, cr15, [r6, #616] @ 0x268 @ │ │ - ldc2l 10, cr1, [r7, #436] @ 0x1b4 @ │ │ - vcadd.f32 , , , #270 │ │ - ldc2l 14, cr3, [r5, #64] @ 0x40 │ │ - ldc2l 10, cr4, [r6, #992] @ 0x3e0 @ │ │ - ldc2l 10, cr7, [r6, #420] @ 0x1a4 @ │ │ + ldc2l 1, cr6, [r5, #604] @ 0x25c │ │ + ldc2l 1, cr6, [r5, #504] @ 0x1f8 │ │ + ldc2l 14, cr1, [r5, #588] @ 0x24c │ │ + ldc2l 4, cr3, [r5, #80] @ 0x50 │ │ + ldc2l 3, cr0, [r5, #436] @ 0x1b4 │ │ + ldc2l 0, cr15, [r7, #768] @ 0x300 │ │ + ldc2l 0, cr10, [r5, #632] @ 0x278 │ │ + ldc2l 11, cr15, [r6, #796] @ 0x31c @ │ │ + ldc2l 10, cr1, [r7, #616] @ 0x268 @ │ │ + ldc2l 9, cr13, [r7, #48] @ 0x30 @ │ │ + ldc2l 14, cr3, [r5, #244] @ 0xf4 │ │ + ldc2l 11, cr4, [r6, #148] @ 0x94 @ │ │ + ldc2l 10, cr7, [r6, #600] @ 0x258 @ │ │ eoreq r0, r9, r0, lsr #11 │ │ ldrbeq r8, [r6, #2613] @ 0xa35 │ │ - ldc2l 0, cr8, [r5, #712] @ 0x2c8 │ │ - ldc2l 15, cr9, [r5, #536] @ 0x218 │ │ + ldc2l 0, cr8, [r5, #892] @ 0x37c │ │ + ldc2l 15, cr9, [r5, #716] @ 0x2cc │ │ │ │ 024c9ef0 : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #104 @ 0x68 │ │ bl 270ce10 │ │ cmp r0, #0 │ │ @@ -1445083,28 +1445082,28 @@ │ │ ldr r0, [pc, #72] @ 24ca0e8 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #16 │ │ pop {r4, r5, r6, sl, fp, pc} │ │ - ldc2l 14, cr9, [r5, #976] @ 0x3d0 │ │ - ldc2l 1, cr3, [r5, #892] @ 0x37c │ │ - ldc2l 3, cr9, [r4, #624] @ 0x270 │ │ - ldc2l 11, cr11, [r4, #900] @ 0x384 @ │ │ - ldc2l 14, cr5, [r5, #616] @ 0x268 │ │ - ldc2l 15, cr8, [r5, #20] │ │ - ldc2l 14, cr5, [r5, #420] @ 0x1a4 │ │ - ldc2l 11, cr1, [r5, #424] @ 0x1a8 @ │ │ - ldc2l 13, cr12, [r4, #796] @ 0x31c │ │ - ldc2l 14, cr8, [r5, #276] @ 0x114 │ │ - ldc2l 14, cr7, [r7, #56] @ 0x38 │ │ - ldc2l 14, cr8, [r5, #372] @ 0x174 │ │ - ldc2l 15, cr4, [r7, #904] @ 0x388 │ │ - ldc2l 13, cr9, [r5, #400] @ 0x190 │ │ + ldc2l 15, cr9, [r5, #132] @ 0x84 │ │ + ldc2l 2, cr3, [r5, #48] @ 0x30 │ │ + ldc2l 3, cr9, [r4, #804] @ 0x324 │ │ + ldc2l 12, cr11, [r4, #56] @ 0x38 │ │ + ldc2l 14, cr5, [r5, #796] @ 0x31c │ │ + ldc2l 15, cr8, [r5, #200] @ 0xc8 │ │ + ldc2l 14, cr5, [r5, #600] @ 0x258 │ │ + ldc2l 11, cr1, [r5, #604] @ 0x25c @ │ │ + ldc2l 13, cr12, [r4, #976] @ 0x3d0 │ │ + ldc2l 14, cr8, [r5, #456] @ 0x1c8 │ │ + ldc2l 14, cr7, [r7, #236] @ 0xec │ │ + ldc2l 14, cr8, [r5, #552] @ 0x228 │ │ + ldc2l 0, cr5, [r7, #60] @ 0x3c │ │ + ldc2l 13, cr9, [r5, #580] @ 0x244 │ │ │ │ 024ca0ec : │ │ mov r1, #2 │ │ str r1, [r0] │ │ mov r0, #0 │ │ bx lr │ │ │ │ @@ -1445310,31 +1445309,31 @@ │ │ eoreq r0, r9, ip, lsl #6 │ │ eoreq r0, r9, r4, lsr r3 │ │ eoreq r0, r9, ip, asr r3 │ │ eoreq r0, r9, r4, lsl #7 │ │ ldrbeq r8, [r6, #2284] @ 0x8ec │ │ eoreq r0, r9, ip, ror r3 │ │ eoreq r0, r9, r0, asr #3 │ │ - ldc2l 10, cr13, [r5, #532] @ 0x214 @ │ │ - ldc2l 7, cr5, [r6, #456] @ 0x1c8 │ │ - ldc2l 11, cr8, [r5, #932] @ 0x3a4 @ │ │ - ldc2l 1, cr11, [r5, #348] @ 0x15c │ │ + ldc2l 10, cr13, [r5, #712] @ 0x2c8 @ │ │ + ldc2l 7, cr5, [r6, #636] @ 0x27c │ │ + ldc2l 12, cr8, [r5, #88] @ 0x58 │ │ + ldc2l 1, cr11, [r5, #528] @ 0x210 │ │ eoreq r0, r9, ip, lsl r3 │ │ - ldc2l 10, cr11, [r4, #4] @ │ │ - ldc2l 7, cr3, [r7, #436] @ 0x1b4 │ │ + ldc2l 10, cr11, [r4, #184] @ 0xb8 @ │ │ + ldc2l 7, cr3, [r7, #616] @ 0x268 │ │ eoreq r0, r9, ip, lsl #2 │ │ - ldc2l 5, cr11, [r6, #488] @ 0x1e8 │ │ + ldc2l 5, cr11, [r6, #668] @ 0x29c │ │ eoreq r0, r9, r0, lsr #2 │ │ - ldc2l 15, cr13, [r4, #360] @ 0x168 │ │ + ldc2l 15, cr13, [r4, #540] @ 0x21c │ │ eoreq r0, r9, r4, lsr r1 │ │ - ldc2l 4, cr7, [r7, #100] @ 0x64 │ │ + ldc2l 4, cr7, [r7, #280] @ 0x118 │ │ eoreq r0, r9, r8, asr #2 │ │ - ldc2l 10, cr11, [r5, #636] @ 0x27c @ │ │ + ldc2l 10, cr11, [r5, #816] @ 0x330 @ │ │ eoreq r0, r9, ip, asr r1 │ │ - ldc2l 11, cr10, [r7, #836] @ 0x344 @ │ │ + ldc2l 11, cr10, [r7, #1016] @ 0x3f8 @ │ │ eoreq r0, r9, r0, ror #3 │ │ eoreq r0, r9, r8, lsl r2 │ │ eoreq r0, r9, r0, asr #4 │ │ eoreq r0, r9, ip, ror #4 │ │ mlaeq r9, r8, r2, r0 │ │ │ │ 024ca488 : │ │ @@ -1446302,53 +1446301,53 @@ │ │ ldr r0, [pc, #96] @ 24cb3d4 │ │ mov r2, sl │ │ movw r3, #383 @ 0x17f │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24cb120 │ │ - ldc2l 0, cr5, [r6, #988] @ 0x3dc │ │ - ldc2l 6, cr2, [r7, #836] @ 0x344 │ │ - ldc2l 4, cr8, [r5, #500] @ 0x1f4 │ │ - ldc2l 7, cr10, [r4, #492] @ 0x1ec │ │ - ldc2l 4, cr2, [r7, #372] @ 0x174 │ │ - ldc2l 2, cr8, [r5, #36] @ 0x24 │ │ - ldc2l 10, cr0, [r6] @ │ │ - ldc2l 3, cr9, [r5, #932] @ 0x3a4 │ │ - ldc2l 6, cr2, [r7, #472] @ 0x1d8 │ │ - vcadd.f32 q8, q3, q4, #270 │ │ - ldc2l 2, cr9, [r5, #196] @ 0xc4 │ │ - vcadd.f32 d16, d6, d12, #270 │ │ - ldc2l 1, cr9, [r5, #980] @ 0x3d4 │ │ - ldc2l 12, cr8, [r5, #996] @ 0x3e4 │ │ - ldc2l 0, cr2, [r7, #184] @ 0xb8 │ │ - ldc2l 2, cr0, [r6, #800] @ 0x320 │ │ - ldc2l 2, cr0, [r6, #192] @ 0xc0 │ │ + ldc2l 1, cr5, [r6, #144] @ 0x90 │ │ + ldc2l 6, cr2, [r7, #1016] @ 0x3f8 │ │ + ldc2l 4, cr8, [r5, #680] @ 0x2a8 │ │ + ldc2l 7, cr10, [r4, #672] @ 0x2a0 │ │ + ldc2l 4, cr2, [r7, #552] @ 0x228 │ │ + ldc2l 2, cr8, [r5, #216] @ 0xd8 │ │ + ldc2l 10, cr0, [r6, #180] @ 0xb4 @ │ │ + ldc2l 4, cr9, [r5, #88] @ 0x58 │ │ + ldc2l 6, cr2, [r7, #652] @ 0x28c │ │ + ldc2l 8, cr0, [r6, #468] @ 0x1d4 │ │ + ldc2l 2, cr9, [r5, #376] @ 0x178 │ │ + ldc2l 8, cr0, [r6, #228] @ 0xe4 │ │ + ldc2l 2, cr9, [r5, #136] @ 0x88 │ │ + ldc2l 13, cr8, [r5, #152] @ 0x98 │ │ + ldc2l 0, cr2, [r7, #364] @ 0x16c │ │ + ldc2l 2, cr0, [r6, #980] @ 0x3d4 │ │ + ldc2l 2, cr0, [r6, #372] @ 0x174 │ │ eoreq pc, r8, r4, ror #6 │ │ - ldc2l 0, cr0, [r6, #880] @ 0x370 │ │ - ldc2l 0, cr0, [r6, #672] @ 0x2a0 │ │ - ldc2l 7, cr0, [r6, #800] @ 0x320 │ │ - ldc2l 1, cr9, [r5, #708] @ 0x2c4 │ │ - ldc2l 8, cr0, [r5, #632] @ 0x278 │ │ - ldc2l 0, cr9, [r5, #420] @ 0x1a4 │ │ - ldc2l 6, cr0, [r5, #984] @ 0x3d8 │ │ - ldc2l 14, cr8, [r5, #772] @ 0x304 │ │ - ldc2l 14, cr8, [r5, #564] @ 0x234 │ │ - ldc2l 6, cr0, [r5, #552] @ 0x228 │ │ - ldc2l 14, cr8, [r5, #340] @ 0x154 │ │ - ldc2l 6, cr0, [r5, #360] @ 0x168 │ │ - ldc2l 14, cr8, [r5, #148] @ 0x94 │ │ - ldc2l 7, cr0, [r6, #224] @ 0xe0 │ │ - ldc2l 1, cr9, [r5, #132] @ 0x84 │ │ + ldc2l 1, cr0, [r6, #36] @ 0x24 │ │ + ldc2l 0, cr0, [r6, #852] @ 0x354 │ │ + ldc2l 7, cr0, [r6, #980] @ 0x3d4 │ │ + ldc2l 1, cr9, [r5, #888] @ 0x378 │ │ + vcadd.f32 q8, , , #270 │ │ + ldc2l 0, cr9, [r5, #600] @ 0x258 │ │ + ldc2l 7, cr0, [r5, #140] @ 0x8c │ │ + ldc2l 14, cr8, [r5, #952] @ 0x3b8 │ │ + ldc2l 14, cr8, [r5, #744] @ 0x2e8 │ │ + ldc2l 6, cr0, [r5, #732] @ 0x2dc │ │ + ldc2l 14, cr8, [r5, #520] @ 0x208 │ │ + ldc2l 6, cr0, [r5, #540] @ 0x21c │ │ + ldc2l 14, cr8, [r5, #328] @ 0x148 │ │ + ldc2l 7, cr0, [r6, #404] @ 0x194 │ │ + ldc2l 1, cr9, [r5, #312] @ 0x138 │ │ ldc2l 4, cr5, [r8, #768] @ 0x300 │ │ - ldc2l 5, cr0, [r5, #616] @ 0x268 │ │ - ldc2l 13, cr8, [r5, #404] @ 0x194 │ │ - ldc2l 0, cr2, [r7, #456] @ 0x1c8 │ │ - ldc2l 13, cr8, [r5, #212] @ 0xd4 │ │ - ldc2l 0, cr5, [r6, #12] │ │ + ldc2l 5, cr0, [r5, #796] @ 0x31c │ │ + ldc2l 13, cr8, [r5, #584] @ 0x248 │ │ + ldc2l 0, cr2, [r7, #636] @ 0x27c │ │ + ldc2l 13, cr8, [r5, #392] @ 0x188 │ │ + ldc2l 0, cr5, [r6, #192] @ 0xc0 │ │ │ │ 024cb424 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #20 │ │ mov r7, r1 │ │ ldr r1, [fp, #12] │ │ @@ -1446522,15 +1446521,15 @@ │ │ add r1, pc, r1 │ │ sub r2, r2, sl │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldrdeq pc, [r8], -r4 @ │ │ - ldc2l 7, cr11, [r4, #220] @ 0xdc │ │ + ldc2l 7, cr11, [r4, #400] @ 0x190 │ │ │ │ 024cb6f4 : │ │ push {r4, r5, r6, r8, r9, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #96 @ 0x60 │ │ ldr r9, [fp, #8] │ │ mov r5, r0 │ │ @@ -1446677,26 +1446676,26 @@ │ │ ldr r0, [pc, #64] @ 24cb980 │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r8, r9, sl, fp, pc} │ │ - ldc2l 11, cr7, [r7, #704] @ 0x2c0 @ │ │ + ldc2l 11, cr7, [r7, #884] @ 0x374 @ │ │ strdeq lr, [r8], -r8 @ │ │ eoreq lr, r8, ip, lsl lr │ │ - ldc2l 14, cr9, [r5, #1008] @ 0x3f0 │ │ + ldc2l 15, cr9, [r5, #164] @ 0xa4 │ │ eoreq lr, r8, r8, asr #26 │ │ strdeq lr, [r8], -r0 @ │ │ - ldc2l 10, cr7, [r7, #68] @ 0x44 @ │ │ - ldc2l 5, cr7, [r5, #820] @ 0x334 │ │ + ldc2l 10, cr7, [r7, #248] @ 0xf8 @ │ │ + ldc2l 5, cr7, [r5, #1000] @ 0x3e8 │ │ eoreq lr, r8, ip, lsl #25 │ │ - ldc2l 7, cr7, [r6, #776] @ 0x308 │ │ + ldc2l 7, cr7, [r6, #956] @ 0x3bc │ │ eoreq lr, r8, r0, lsr #26 │ │ - ldc2l 9, cr7, [r7, #320] @ 0x140 @ │ │ + ldc2l 9, cr7, [r7, #410] @ 0x19a @ │ │ │ │ 024cb984 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8} │ │ sub sp, sp, #1000 @ 0x3e8 │ │ @@ -1447459,15 +1447458,15 @@ │ │ str r0, [sp, #40] @ 0x28 │ │ add r0, lr, #504 @ 0x1f8 │ │ str r0, [sp, #64] @ 0x40 │ │ mov r0, #0 │ │ str r1, [sp, #32] │ │ str r0, [sp, #48] @ 0x30 │ │ b 24cc5cc │ │ - ldc2l 2, cr2, [r5, #52] @ 0x34 │ │ + ldc2l 2, cr2, [r5, #232] @ 0xe8 │ │ ldrbeq r7, [r6, #272] @ 0x110 │ │ ldr r1, [sp, #48] @ 0x30 │ │ add r5, r5, #32 │ │ sub r7, fp, #344 @ 0x158 │ │ add r0, r1, #2 │ │ str r0, [fp, #-340] @ 0xfffffeac │ │ ldr r0, [sp, #64] @ 0x40 │ │ @@ -1447742,25 +1447741,25 @@ │ │ sub r1, fp, #984 @ 0x3d8 │ │ add r3, sp, #552 @ 0x228 │ │ mov r0, sl │ │ mov r2, r4 │ │ str r9, [sp] │ │ bl 270f970 │ │ b 24cd088 │ │ - ldc2l 13, cr9, [r5, #176] @ 0xb0 │ │ + ldc2l 13, cr9, [r5, #356] @ 0x164 │ │ ldrbeq r7, [r6, #1076] @ 0x434 │ │ - ldc2l 13, cr9, [r4, #44] @ 0x2c │ │ + ldc2l 13, cr9, [r4, #224] @ 0xe0 │ │ ldrbeq r7, [r6, #212] @ 0xd4 │ │ eoreq lr, r8, r4, lsl ip │ │ - ldc2l 15, cr15, [r4, #224] @ 0xe0 │ │ + ldc2l 15, cr15, [r4, #404] @ 0x194 │ │ eoreq lr, r8, r3, asr #23 │ │ ldrbeq r7, [r6, #296] @ 0x128 │ │ - ldc2l 9, cr7, [r4] @ │ │ + ldc2l 9, cr7, [r4, #90] @ 0x5a @ │ │ ldrbeq r7, [r6, #744] @ 0x2e8 │ │ - ldc2l 7, cr5, [r7, #280] @ 0x118 │ │ + ldc2l 7, cr5, [r7, #460] @ 0x1cc │ │ mov r7, #32 │ │ add lr, sp, #1024 @ 0x400 │ │ str r7, [sp] │ │ add r4, lr, #472 @ 0x1d8 │ │ str r7, [sp, #4] │ │ sub r3, fp, #80 @ 0x50 │ │ ldr r0, [pc, #4016] @ 24cd9ec │ │ @@ -1447812,33 +1447811,33 @@ │ │ add r2, pc, r2 │ │ bl 270ff00 │ │ bl 270db20 │ │ cmp r0, #0 │ │ beq 24cd430 │ │ b 24cbef4 │ │ ldrbeq r7, [r6, #44] @ 0x2c │ │ - ldc2l 9, cr1, [r7, #444] @ 0x1bc @ │ │ + ldc2l 10, cr1, [r7, #44] @ 0x2c @ │ │ ldrbeq r7, [r6, #176] @ 0xb0 │ │ - ldc2l 0, cr4, [r5, #68] @ 0x44 │ │ + ldc2l 0, cr4, [r5, #248] @ 0xf8 │ │ ldrbeq r7, [r6, #308] @ 0x134 │ │ - ldc2l 14, cr13, [r5, #304] @ 0x130 │ │ + ldc2l 14, cr13, [r5, #484] @ 0x1e4 │ │ ldrbeq r7, [r6, #376] @ 0x178 │ │ ldc2l 2, cr1, [r8, #876] @ 0x36c │ │ ldrbeq r7, [r6, #124] @ 0x7c │ │ - ldc2l 13, cr13, [r5, #828] @ 0x33c │ │ + ldc2l 13, cr13, [r5, #1008] @ 0x3f0 │ │ ldrbeq r7, [r6] │ │ - ldc2l 14, cr14, [r5, #768] @ 0x300 │ │ + ldc2l 14, cr14, [r5, #948] @ 0x3b4 │ │ ldrbeq r6, [r6, #3716] @ 0xe84 │ │ - ldc2l 13, cr13, [r4, #524] @ 0x20c │ │ + ldc2l 13, cr13, [r4, #704] @ 0x2c0 │ │ ldrbeq r6, [r6, #3784] @ 0xec8 │ │ - ldc2l 14, cr3, [r5, #664] @ 0x298 │ │ + ldc2l 14, cr3, [r5, #844] @ 0x34c │ │ ldrbeq r7, [r6, #140] @ 0x8c │ │ ldc2l 8, cr4, [r8, #492] @ 0x1ec │ │ ldrbeq r6, [r6, #4052] @ 0xfd4 │ │ - ldc2l 13, cr9, [r5, #512] @ 0x200 │ │ + ldc2l 13, cr9, [r5, #692] @ 0x2b4 │ │ ldrbeq r7, [r6, #152] @ 0x98 │ │ ldrbeq r6, [r6, #3404] @ 0xd4c │ │ mlaeq r8, r8, r8, lr │ │ eoreq lr, r8, r4, lsl #17 │ │ mov r7, #32 │ │ ldr r5, [sp, #60] @ 0x3c │ │ str r7, [sp] │ │ @@ -1447993,22 +1447992,22 @@ │ │ bl 270e790 │ │ ldr r1, [pc, #4008] @ 24cdd74 │ │ mov r0, r6 │ │ mov r2, r7 │ │ add r1, pc, r1 │ │ bl 270e090 │ │ b 24cd430 │ │ - ldc2l 15, cr11, [r4, #324] @ 0x144 │ │ - ldc2l 7, cr1, [r6, #880] @ 0x370 │ │ + ldc2l 15, cr11, [r4, #504] @ 0x1f8 │ │ + vcadd.f32 d17, d6, d9, #270 │ │ eoreq lr, r8, r8, lsl #15 │ │ - ldc2l 12, cr1, [r5, #916] @ 0x394 │ │ - ldc2l 7, cr1, [r6, #536] @ 0x218 │ │ - ldc2l 12, cr8, [r7, #404] @ 0x194 │ │ + ldc2l 13, cr1, [r5, #72] @ 0x48 │ │ + ldc2l 7, cr1, [r6, #716] @ 0x2cc │ │ + ldc2l 12, cr8, [r7, #584] @ 0x248 │ │ strdeq lr, [r8], -r8 @ │ │ - ldc2l 14, cr10, [r4, #396] @ 0x18c │ │ + ldc2l 14, cr10, [r4, #576] @ 0x240 │ │ ldrbeq r6, [r6, #3728] @ 0xe90 │ │ mov r7, #32 │ │ ldr r5, [sp, #60] @ 0x3c │ │ str r7, [sp] │ │ add lr, sp, #1024 @ 0x400 │ │ str r7, [sp, #4] │ │ sub sl, fp, #80 @ 0x50 │ │ @@ -1448122,32 +1448121,32 @@ │ │ cmp r0, #0 │ │ bne 24cbef4 │ │ ldr r2, [sp, #52] @ 0x34 │ │ sub r0, fp, #256 @ 0x100 │ │ sub r1, fp, #440 @ 0x1b8 │ │ bl 270e790 │ │ b 24cd430 │ │ - ldc2l 2, cr5, [r7, #348] @ 0x15c │ │ - ldc2l 4, cr15, [r6, #696] @ 0x2b8 │ │ - ldc2l 15, cr6, [r7, #436] @ 0x1b4 │ │ - ldc2l 3, cr13, [r6, #728] @ 0x2d8 │ │ + ldc2l 2, cr5, [r7, #528] @ 0x210 │ │ + ldc2l 4, cr15, [r6, #876] @ 0x36c │ │ + ldc2l 15, cr6, [r7, #616] @ 0x268 │ │ + ldc2l 3, cr13, [r6, #908] @ 0x38c │ │ eoreq lr, r8, r0, lsl #12 │ │ ldc2l 14, cr0, [r8, #68] @ 0x44 │ │ mlaeq r8, r4, r5, lr │ │ - ldc2l 3, cr15, [r6, #812] @ 0x32c │ │ - ldc2l 9, cr14, [r7, #482] @ 0x1e2 @ │ │ + ldc2l 3, cr15, [r6, #992] @ 0x3e0 │ │ + ldc2l 10, cr14, [r7, #120] @ 0x78 @ │ │ ldc2l 3, cr4, [r8, #768] @ 0x300 │ │ eoreq lr, r8, r8, lsl #9 │ │ - ldc2l 2, cr15, [r6, #880] @ 0x370 │ │ + ldc2l 3, cr15, [r6, #36] @ 0x24 │ │ ldrbeq r6, [r6, #2256] @ 0x8d0 │ │ eoreq lr, r8, r0, lsl r4 │ │ ldrbeq r6, [r6, #2948] @ 0xb84 │ │ eoreq lr, r8, r4, lsl #7 │ │ - ldc2l 2, cr15, [r6, #152] @ 0x98 │ │ - ldc2l 11, cr6, [r5, #820] @ 0x334 @ │ │ + ldc2l 2, cr15, [r6, #332] @ 0x14c │ │ + ldc2l 11, cr6, [r5, #1000] @ 0x3e8 @ │ │ ldr r6, [sp, #56] @ 0x38 │ │ cmp r0, #0 │ │ ldr r5, [sp, #60] @ 0x3c │ │ beq 24cd094 │ │ mov r0, #32 │ │ sub r9, fp, #408 @ 0x198 │ │ str r0, [sp] │ │ @@ -1448324,19 +1448323,19 @@ │ │ ldr r0, [pc, #4080] @ 24ce2e4 │ │ add r1, sp, #616 @ 0x268 │ │ ldr r2, [sp, #40] @ 0x28 │ │ add r3, sp, #560 @ 0x230 │ │ add r0, pc, r0 │ │ bl 270e5f0 │ │ b 24cd360 │ │ - ldc2l 0, cr5, [r6, #44] @ 0x2c │ │ - vcadd.f32 d24, d23, d12, #270 │ │ - ldc2l 11, cr6, [r5, #436] @ 0x1b4 @ │ │ - ldc2l 14, cr4, [r7, #1008] @ 0x3f0 │ │ - ldc2l 11, cr6, [r5, #244] @ 0xf4 @ │ │ + ldc2l 0, cr5, [r6, #224] @ 0xe0 │ │ + ldc2l 8, cr8, [r7, #740] @ 0x2e4 │ │ + ldc2l 11, cr6, [r5, #616] @ 0x268 @ │ │ + ldc2l 15, cr4, [r7, #164] @ 0xa4 │ │ + ldc2l 11, cr6, [r5, #424] @ 0x1a8 @ │ │ sub r0, fp, #344 @ 0x158 │ │ str r0, [sp] │ │ add r0, sp, #560 @ 0x230 │ │ str r0, [sp, #4] │ │ mov r0, #32 │ │ add lr, sp, #1024 @ 0x400 │ │ str r0, [sp, #8] │ │ @@ -1448355,18 +1448354,18 @@ │ │ ldr r1, [pc, r1] │ │ cmp r0, r1 │ │ bne 24cd394 │ │ ldr r1, [sp, #52] @ 0x34 │ │ add r0, sp, #560 @ 0x230 │ │ bl 270efa0 │ │ b 24cd3c8 │ │ - ldc2l 0, cr13, [r6, #312] @ 0x138 │ │ + ldc2l 0, cr13, [r6, #492] @ 0x1ec │ │ ldc2l 10, cr0, [r8, #996] @ 0x3e4 @ │ │ - ldc2l 10, cr12, [r7, #36] @ 0x24 @ │ │ - ldc2l 7, cr7, [r5, #464] @ 0x1d0 │ │ + ldc2l 10, cr12, [r7, #216] @ 0xd8 @ │ │ + ldc2l 7, cr7, [r5, #644] @ 0x284 │ │ ldr r1, [pc, #3920] @ 24ce2ec │ │ sub r0, fp, #76 @ 0x4c │ │ add r2, sp, #552 @ 0x228 │ │ add r3, sp, #160 @ 0xa0 │ │ add r1, pc, r1 │ │ bl 270fff0 │ │ bl 270db20 │ │ @@ -1448384,17 +1448383,17 @@ │ │ cmp r0, #0 │ │ beq 24cd404 │ │ ldr r0, [sp, #52] @ 0x34 │ │ sub r2, fp, #440 @ 0x1b8 │ │ ldr r1, [sp, #24] │ │ bl 270f680 │ │ b 24cd414 │ │ - ldc2l 10, cr6, [r5, #724] @ 0x2d4 @ │ │ + ldc2l 10, cr6, [r5, #904] @ 0x388 @ │ │ ldc2l 10, cr0, [r8, #644] @ 0x284 @ │ │ - ldc2l 0, cr15, [r6, #508] @ 0x1fc │ │ + ldc2l 0, cr15, [r6, #688] @ 0x2b0 │ │ ldr r0, [sp, #52] @ 0x34 │ │ sub r2, fp, #440 @ 0x1b8 │ │ ldr r1, [sp, #24] │ │ bl 270f670 │ │ bl 270db20 │ │ ldr r5, [sp, #60] @ 0x3c │ │ cmp r0, #0 │ │ @@ -1448412,32 +1448411,32 @@ │ │ bl 270efe0 │ │ ldr r1, [pc, #3736] @ 24ce2f0 │ │ mov r0, r6 │ │ mov r2, r7 │ │ add r1, pc, r1 │ │ bl 270e090 │ │ b 24cc58c │ │ - ldc2l 6, cr14, [r7, #708] @ 0x2c4 │ │ - ldc2l 4, cr1, [r5, #4] │ │ - ldc2l 4, cr15, [r4, #996] @ 0x3e4 │ │ - ldc2l 9, cr13, [r4, #186] @ 0xba @ │ │ - ldc2l 14, cr10, [r6, #564] @ 0x234 │ │ - ldc2l 9, cr6, [r5, #378] @ 0x17a @ │ │ + ldc2l 6, cr14, [r7, #888] @ 0x378 │ │ + ldc2l 4, cr1, [r5, #184] @ 0xb8 │ │ + ldc2l 5, cr15, [r4, #152] @ 0x98 │ │ + ldc2l 9, cr13, [r4, #276] @ 0x114 @ │ │ + ldc2l 14, cr10, [r6, #744] @ 0x2e8 │ │ + ldc2l 9, cr6, [r5, #468] @ 0x1d4 @ │ │ eoreq lr, r8, r4, asr #2 │ │ ldrbeq r6, [r6, #1468] @ 0x5bc │ │ eoreq lr, r8, r0, asr r0 │ │ - ldc2l 7, cr10, [r4, #780] @ 0x30c │ │ + ldc2l 7, cr10, [r4, #960] @ 0x3c0 │ │ ldrbeq r6, [r6, #2032] @ 0x7f0 │ │ - ldc2l 8, cr5, [r7, #872] @ 0x368 │ │ - ldc2l 15, cr12, [r4, #740] @ 0x2e4 │ │ + ldc2l 9, cr5, [r7, #14] @ │ │ + ldc2l 15, cr12, [r4, #920] @ 0x398 │ │ eoreq sp, r8, ip, lsl #31 │ │ eoreq sp, r8, ip, ror #29 │ │ ldrbeq r6, [r6, #1684] @ 0x694 │ │ eoreq sp, r8, r8, lsr #30 │ │ - ldc2l 6, cr10, [r4, #668] @ 0x29c │ │ + ldc2l 6, cr10, [r4, #848] @ 0x350 │ │ ldrbeq r6, [r6, #1748] @ 0x6d4 │ │ ldr r2, [pc, #3676] @ 24ce318 │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r3, [pc, #3672] @ 24ce31c │ │ mov r0, #0 │ │ ldr r4, [sp, #56] @ 0x38 │ │ add r5, lr, #472 @ 0x1d8 │ │ @@ -1448607,22 +1448606,22 @@ │ │ add r1, r3, #4 │ │ str r1, [sp] │ │ mov r1, r4 │ │ stmib sp, {r0, r8} │ │ mov r0, sl │ │ bl 270dad0 │ │ b 24cbef4 │ │ - ldc2l 0, cr1, [r5, #1008] @ 0x3f0 │ │ - ldc2l 8, cr10, [r7, #884] @ 0x374 │ │ + ldc2l 1, cr1, [r5, #164] @ 0xa4 │ │ + ldc2l 9, cr10, [r7, #20] @ │ │ ldc2l 0, cr2, [r8, #240] @ 0xf0 │ │ - ldc2l 9, cr8, [r6, #358] @ 0x166 @ │ │ + ldc2l 9, cr8, [r6, #448] @ 0x1c0 @ │ │ ldrbeq r6, [r6, #968] @ 0x3c8 │ │ ldrbeq r6, [r6, #688] @ 0x2b0 │ │ eoreq sp, r8, r8, asr #27 │ │ - ldc2l 3, cr7, [r5, #380] @ 0x17c │ │ + ldc2l 3, cr7, [r5, #560] @ 0x230 │ │ ldr r2, [pc, #2996] @ 24ce350 │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r4, [pc, #2992] @ 24ce354 │ │ add r1, lr, #504 @ 0x1f8 │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r7, [sp, #56] @ 0x38 │ │ add r4, pc, r4 │ │ @@ -1448747,15 +1448746,15 @@ │ │ bl 270e090 │ │ add r0, r4, #1 │ │ add r6, r6, #32 │ │ cmp r4, sl │ │ mov r4, r0 │ │ blt 24cd89c │ │ b 24cbef4 │ │ - ldc2l 13, cr8, [r5, #384] @ 0x180 │ │ + ldc2l 13, cr8, [r5, #564] @ 0x234 │ │ ldr r0, [pc, #2248] @ 24ce278 │ │ mov r1, #170 @ 0xaa │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #2236] @ 24ce27c │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #472 @ 0x1d8 │ │ @@ -1448814,15 +1448813,15 @@ │ │ mov r2, #1 │ │ mov r3, #36 @ 0x24 │ │ bl 270d9f0 │ │ ldr r0, [pc, #1996] @ 24ce274 │ │ mov r1, #23 │ │ add r0, pc, r0 │ │ b 24cc32c │ │ - ldc2l 12, cr8, [r5, #256] @ 0x100 │ │ + ldc2l 12, cr8, [r5, #436] @ 0x1b4 │ │ ldr r0, [pc, #2032] @ 24ce2ac │ │ mov r1, #205 @ 0xcd │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #2020] @ 24ce2b0 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #472 @ 0x1d8 │ │ @@ -1448933,15 +1448932,15 @@ │ │ mov r3, #13 │ │ add r1, pc, r1 │ │ bl 270d9f0 │ │ ldr r0, [pc, #1668] @ 24ce308 │ │ mov r1, #21 │ │ add r0, pc, r0 │ │ b 24cc32c │ │ - ldc2l 9, cr8, [r5, #456] @ 0x1c8 @ │ │ + ldc2l 10, cr8, [r5, #68] @ 0x44 @ │ │ ldr r2, [pc, #1472] @ 24ce258 │ │ add lr, sp, #1024 @ 0x400 │ │ ldr r3, [pc, #1468] @ 24ce25c │ │ mov r1, #9 │ │ mov r0, #80 @ 0x50 │ │ add r6, lr, #504 @ 0x1f8 │ │ str r1, [sp, #12] │ │ @@ -1449173,15 +1449172,15 @@ │ │ add r0, pc, r0 │ │ b 24ce1f4 │ │ ldr r0, [pc, #576] @ 24ce280 │ │ mov r1, #168 @ 0xa8 │ │ add r0, pc, r0 │ │ b 24ce118 │ │ ldrbeq r5, [r6, #3168] @ 0xc60 │ │ - ldc2l 6, cr8, [r5, #688] @ 0x2b0 │ │ + ldc2l 6, cr8, [r5, #868] @ 0x364 │ │ ldr r0, [sp, #48] @ 0x30 │ │ sub r1, fp, #688 @ 0x2b0 │ │ add r2, sp, #72 @ 0x48 │ │ mov r3, #36 @ 0x24 │ │ bl 270cd90 │ │ ldr r0, [sp, #72] @ 0x48 │ │ cmp r0, #0 │ │ @@ -1449218,17 +1449217,17 @@ │ │ mov r2, #1 │ │ mov r3, #5 │ │ bl 270d9f0 │ │ ldr r0, [pc, #476] @ 24ce2d4 │ │ mov r1, #20 │ │ add r0, pc, r0 │ │ b 24cc32c │ │ - ldc2l 12, cr9, [r4, #1020] @ 0x3fc │ │ + ldc2l 13, cr9, [r4, #176] @ 0xb0 │ │ ldrbeq r5, [r6, #3372] @ 0xd2c │ │ - ldc2l 10, cr2, [r5, #288] @ 0x120 @ │ │ + ldc2l 10, cr2, [r5, #468] @ 0x1d4 @ │ │ ldr r0, [pc, #396] @ 24ce2a0 │ │ mov r1, #169 @ 0xa9 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r4, [pc, #352] @ 24ce284 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #472 @ 0x1d8 │ │ @@ -1449236,16 +1449235,16 @@ │ │ add r4, pc, r4 │ │ mov r3, #32 │ │ mov r0, r4 │ │ bl 270d9f0 │ │ add lr, sp, #1024 @ 0x400 │ │ add r1, lr, #504 @ 0x1f8 │ │ b 24cd9dc │ │ - ldc2l 14, cr5, [r7, #364] @ 0x16c │ │ - ldc2l 11, cr7, [r7, #120] @ 0x78 @ │ │ + ldc2l 14, cr5, [r7, #544] @ 0x220 │ │ + ldc2l 11, cr7, [r7, #300] @ 0x12c @ │ │ ldrbeq r5, [r6, #2992] @ 0xbb0 │ │ eoreq sp, r8, r4, lsl #9 │ │ ldr r0, [sp, #48] @ 0x30 │ │ sub r1, fp, #688 @ 0x2b0 │ │ add r2, sp, #72 @ 0x48 │ │ mov r3, #36 @ 0x24 │ │ bl 270cd90 │ │ @@ -1449273,15 +1449272,15 @@ │ │ mov r2, #1 │ │ mov r3, #36 @ 0x24 │ │ mov r1, r5 │ │ bl 270d9f0 │ │ ldr r1, [pc, #152] @ 24ce270 │ │ add r1, pc, r1 │ │ b 24cda7c │ │ - ldc2l 13, cr5, [r7, #796] @ 0x31c │ │ + ldc2l 13, cr5, [r7, #976] @ 0x3d0 │ │ ldrbeq r5, [r6, #2244] @ 0x8c4 │ │ ldrbeq r5, [r6, #2624] @ 0xa40 │ │ eoreq sp, r8, ip, lsl r4 │ │ ldr r0, [pc, #228] @ 24ce2d8 │ │ add r0, pc, r0 │ │ movw r1, #310 @ 0x136 │ │ bl 270d990 │ │ @@ -1449301,93 +1449300,93 @@ │ │ mov r1, #24 │ │ add r0, pc, r0 │ │ b 24cc32c │ │ ldrbeq r5, [r6, #2300] @ 0x8fc │ │ ldrbeq r5, [r6, #2488] @ 0x9b8 │ │ ldrdeq sp, [r8], -r4 @ │ │ ldc2l 7, cr15, [r7, #968] @ 0x3c8 │ │ - ldc2l 5, cr9, [r7, #564] @ 0x234 │ │ - ldc2l 4, cr5, [r5, #468] @ 0x1d4 │ │ - ldc2l 10, cr13, [r6, #432] @ 0x1b0 @ │ │ - ldc2l 14, cr7, [r5, #140] @ 0x8c │ │ + ldc2l 5, cr9, [r7, #744] @ 0x2e8 │ │ + ldc2l 4, cr5, [r5, #648] @ 0x288 │ │ + ldc2l 10, cr13, [r6, #612] @ 0x264 @ │ │ + ldc2l 14, cr7, [r5, #320] @ 0x140 │ │ mlaeq r8, ip, r9, ip │ │ - ldc2l 9, cr3, [r6, #118] @ 0x76 @ │ │ + ldc2l 9, cr3, [r6, #208] @ 0xd0 @ │ │ ldrbeq r4, [r6, #3556] @ 0xde4 │ │ - ldc2l 9, cr11, [r5, #232] @ 0xe8 @ │ │ - ldc2l 13, cr4, [r5, #100] @ 0x64 │ │ - ldc2l 4, cr3, [r6, #348] @ 0x15c │ │ - ldc2l 9, cr5, [r4, #90] @ 0x5a @ │ │ - ldc2l 12, cr1, [r7, #392] @ 0x188 │ │ - ldc2l 4, cr5, [r5, #996] @ 0x3e4 │ │ - ldc2l 11, cr13, [r5, #888] @ 0x378 @ │ │ - ldc2l 13, cr4, [r5, #596] @ 0x254 │ │ - ldc2l 13, cr7, [r5, #196] @ 0xc4 │ │ + ldc2l 9, cr11, [r5, #322] @ 0x142 @ │ │ + ldc2l 13, cr4, [r5, #280] @ 0x118 │ │ + ldc2l 4, cr3, [r6, #528] @ 0x210 │ │ + ldc2l 9, cr5, [r4, #180] @ 0xb4 @ │ │ + ldc2l 12, cr1, [r7, #572] @ 0x23c │ │ + ldc2l 5, cr5, [r5, #152] @ 0x98 │ │ + ldc2l 12, cr13, [r5, #44] @ 0x2c │ │ + ldc2l 13, cr4, [r5, #776] @ 0x308 │ │ + ldc2l 13, cr7, [r5, #376] @ 0x178 │ │ strhteq ip, [r8], -ip │ │ - ldc2l 8, cr3, [r6, #252] @ 0xfc │ │ + vcadd.f32 , q3, q14, #270 │ │ ldrbeq r4, [r6, #3304] @ 0xce8 │ │ - ldc2l 9, cr9, [r5, #32] @ │ │ + ldc2l 9, cr9, [r5, #122] @ 0x7a @ │ │ ldrbeq r5, [r6, #4] │ │ - ldc2l 1, cr9, [r6, #764] @ 0x2fc │ │ + ldc2l 1, cr9, [r6, #944] @ 0x3b0 │ │ eoreq ip, r8, r4, lsr #18 │ │ ldrbeq r4, [r6, #3920] @ 0xf50 │ │ - ldc2l 9, cr11, [r6, #182] @ 0xb6 @ │ │ - ldc2l 3, cr5, [r5, #948] @ 0x3b4 │ │ - ldc2l 9, cr13, [r6, #454] @ 0x1c6 @ │ │ - ldc2l 3, cr5, [r4, #756] @ 0x2f4 │ │ - ldc2l 12, cr4, [r5, #724] @ 0x2d4 │ │ + ldc2l 9, cr11, [r6, #272] @ 0x110 @ │ │ + ldc2l 4, cr5, [r5, #104] @ 0x68 │ │ + ldc2l 10, cr13, [r6, #64] @ 0x40 @ │ │ + ldc2l 3, cr5, [r4, #936] @ 0x3a8 │ │ + ldc2l 12, cr4, [r5, #904] @ 0x388 │ │ ldc2l 4, cr0, [r8, #796] @ 0x31c │ │ - ldc2l 7, cr7, [r4, #340] @ 0x154 │ │ - ldc2l 14, cr4, [r5, #836] @ 0x344 │ │ - ldc2l 13, cr9, [r4, #136] @ 0x88 │ │ - ldc2l 13, cr4, [r5, #996] @ 0x3e4 │ │ - ldc2l 3, cr7, [r5, #284] @ 0x11c │ │ - ldc2l 9, cr3, [r5, #376] @ 0x178 @ │ │ + ldc2l 7, cr7, [r4, #520] @ 0x208 │ │ + ldc2l 14, cr4, [r5, #1016] @ 0x3f8 │ │ + ldc2l 13, cr9, [r4, #316] @ 0x13c │ │ + ldc2l 14, cr4, [r5, #152] @ 0x98 │ │ + ldc2l 3, cr7, [r5, #464] @ 0x1d0 │ │ + ldc2l 9, cr3, [r5, #466] @ 0x1d2 @ │ │ ldrbeq r5, [r6, #2740] @ 0xab4 │ │ eoreq sp, r8, r4, lsl #6 │ │ eoreq sp, r8, ip, ror #6 │ │ ldrbeq r5, [r6, #2768] @ 0xad0 │ │ ldrbeq r5, [r6, #2708] @ 0xa94 │ │ eoreq sp, r8, r0, lsl #4 │ │ ldrdeq ip, [r8], -r3 @ │ │ eoreq ip, r8, r4, lsl #22 │ │ - ldc2l 5, cr9, [r7, #472] @ 0x1d8 │ │ - ldc2l 2, cr5, [r5, #644] @ 0x284 │ │ - ldc2l 3, cr5, [r7, #316] @ 0x13c │ │ + ldc2l 5, cr9, [r7, #652] @ 0x28c │ │ + ldc2l 2, cr5, [r5, #824] @ 0x338 │ │ + ldc2l 3, cr5, [r7, #496] @ 0x1f0 │ │ ldc2l 9, cr2, [r8, #30] @ │ │ ldrbeq r4, [r6, #3768] @ 0xeb8 │ │ strhteq ip, [r8], -r8 │ │ ldrbeq r4, [r6, #3720] @ 0xe88 │ │ - ldc2l 14, cr3, [r7, #632] @ 0x278 │ │ + ldc2l 14, cr3, [r7, #812] @ 0x32c │ │ eoreq sp, r8, ip, ror #2 │ │ - ldc2l 3, cr8, [r4, #696] @ 0x2b8 │ │ + ldc2l 3, cr8, [r4, #876] @ 0x36c │ │ eoreq sp, r8, r4, lsl r1 │ │ eoreq sp, r8, r7, asr #32 │ │ strdeq sp, [r8], -r0 @ │ │ eoreq ip, r8, r3, asr #31 │ │ - ldc2l 5, cr2, [r5, #312] @ 0x138 │ │ + ldc2l 5, cr2, [r5, #492] @ 0x1ec │ │ eoreq sp, r8, r8 │ │ ldrbeq r5, [r6, #1992] @ 0x7c8 │ │ ldc2l 3, cr15, [r7, #1000] @ 0x3e8 │ │ ldrbeq r5, [r6, #1896] @ 0x768 │ │ ldrbeq r5, [r6, #1828] @ 0x724 │ │ ldc2l 3, cr15, [r7, #424] @ 0x1a8 │ │ - ldc2l 3, cr12, [r5, #84] @ 0x54 │ │ + ldc2l 3, cr12, [r5, #264] @ 0x108 │ │ eoreq ip, r8, r8, asr #29 │ │ - ldc2l 1, cr8, [r4, #12] │ │ - vcadd.f32 , , q0, #270 │ │ - ldc2l 0, cr5, [r5, #164] @ 0xa4 │ │ - ldc2l 13, cr6, [r7, #836] @ 0x344 │ │ + ldc2l 1, cr8, [r4, #192] @ 0xc0 │ │ + vcadd.f32 , , , #270 │ │ + ldc2l 0, cr5, [r5, #344] @ 0x158 │ │ + ldc2l 13, cr6, [r7, #1016] @ 0x3f8 │ │ eoreq ip, r8, r8, lsr #27 │ │ ldc2l 12, cr2, [r8, #788] @ 0x314 │ │ - ldc2l 2, cr14, [r4, #572] @ 0x23c │ │ - ldc2l 4, cr11, [r7, #948] @ 0x3b4 │ │ + ldc2l 2, cr14, [r4, #752] @ 0x2f0 │ │ + ldc2l 5, cr11, [r7, #104] @ 0x68 │ │ eoreq ip, r8, ip, asr #25 │ │ - ldc2l 12, cr11, [r4, #752] @ 0x2f0 │ │ - ldc2l 1, cr9, [r7, #648] @ 0x288 │ │ - ldc2l 15, cr4, [r5, #612] @ 0x264 │ │ + ldc2l 12, cr11, [r4, #932] @ 0x3a4 │ │ + ldc2l 1, cr9, [r7, #828] @ 0x33c │ │ + ldc2l 15, cr4, [r5, #792] @ 0x318 │ │ │ │ 024ce388 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d13} │ │ sub sp, sp, #3216 @ 0xc90 │ │ @@ -1450041,53 +1450040,53 @@ │ │ ldr r0, [pc, #96] @ 24cee20 │ │ mov r2, sl │ │ mov r3, #384 @ 0x180 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ mov r1, r0 │ │ b 24ceb6c │ │ - ldc2l 9, cr9, [r5, #244] @ 0xf4 @ │ │ - ldc2l 12, cr14, [r6, #532] @ 0x214 │ │ - ldc2l 10, cr4, [r5, #196] @ 0xc4 @ │ │ - ldc2l 13, cr6, [r4, #188] @ 0xbc │ │ - ldc2l 10, cr14, [r6, #68] @ 0x44 @ │ │ - ldc2l 7, cr4, [r5, #756] @ 0x2f4 │ │ - ldc2l 15, cr12, [r5, #720] @ 0x2d0 │ │ - ldc2l 4, cr1, [r7, #608] @ 0x260 │ │ - ldc2l 12, cr14, [r6, #168] @ 0xa8 │ │ - ldc2l 13, cr12, [r5, #1008] @ 0x3f0 │ │ - ldc2l 2, cr1, [r7, #896] @ 0x380 │ │ - ldc2l 13, cr12, [r5, #768] @ 0x300 │ │ - ldc2l 2, cr1, [r7, #656] @ 0x290 │ │ - ldc2l 13, cr0, [r7, #672] @ 0x2a0 │ │ - ldc2l 5, cr14, [r6, #904] @ 0x388 │ │ - ldc2l 8, cr12, [r5, #496] @ 0x1f0 │ │ - ldc2l 7, cr12, [r5, #912] @ 0x390 │ │ + ldc2l 9, cr9, [r5, #334] @ 0x14e @ │ │ + ldc2l 12, cr14, [r6, #712] @ 0x2c8 │ │ + ldc2l 10, cr4, [r5, #376] @ 0x178 @ │ │ + ldc2l 13, cr6, [r4, #368] @ 0x170 │ │ + ldc2l 10, cr14, [r6, #248] @ 0xf8 @ │ │ + ldc2l 7, cr4, [r5, #936] @ 0x3a8 │ │ + ldc2l 15, cr12, [r5, #900] @ 0x384 │ │ + ldc2l 4, cr1, [r7, #788] @ 0x314 │ │ + ldc2l 12, cr14, [r6, #348] @ 0x15c │ │ + ldc2l 14, cr12, [r5, #164] @ 0xa4 │ │ + ldc2l 3, cr1, [r7, #52] @ 0x34 │ │ + ldc2l 13, cr12, [r5, #948] @ 0x3b4 │ │ + ldc2l 2, cr1, [r7, #836] @ 0x344 │ │ + ldc2l 13, cr0, [r7, #852] @ 0x354 │ │ + ldc2l 6, cr14, [r6, #60] @ 0x3c │ │ + vcadd.f32 d28, d21, d25, #270 │ │ + ldc2l 8, cr12, [r5, #68] @ 0x44 │ │ eoreq fp, r8, ip, ror #19 │ │ - ldc2l 6, cr12, [r5, #576] @ 0x240 │ │ - ldc2l 6, cr12, [r5, #368] @ 0x170 │ │ - ldc2l 13, cr12, [r5, #496] @ 0x1f0 │ │ - ldc2l 2, cr1, [r7, #384] @ 0x180 │ │ - ldc2l 14, cr12, [r4, #328] @ 0x148 │ │ - ldc2l 1, cr1, [r7, #96] @ 0x60 │ │ - ldc2l 12, cr12, [r4, #680] @ 0x2a8 │ │ - ldc2l 15, cr0, [r7, #448] @ 0x1c0 │ │ - ldc2l 15, cr0, [r7, #240] @ 0xf0 │ │ - ldc2l 12, cr12, [r4, #248] @ 0xf8 │ │ - ldc2l 15, cr0, [r7, #16] │ │ - ldc2l 12, cr12, [r4, #56] @ 0x38 │ │ - ldc2l 14, cr0, [r7, #848] @ 0x350 │ │ - ldc2l 12, cr12, [r5, #944] @ 0x3b0 │ │ - ldc2l 1, cr1, [r7, #832] @ 0x340 │ │ + ldc2l 6, cr12, [r5, #756] @ 0x2f4 │ │ + ldc2l 6, cr12, [r5, #548] @ 0x224 │ │ + ldc2l 13, cr12, [r5, #676] @ 0x2a4 │ │ + ldc2l 2, cr1, [r7, #564] @ 0x234 │ │ + ldc2l 14, cr12, [r4, #508] @ 0x1fc │ │ + ldc2l 1, cr1, [r7, #276] @ 0x114 │ │ + ldc2l 12, cr12, [r4, #860] @ 0x35c │ │ + ldc2l 15, cr0, [r7, #628] @ 0x274 │ │ + ldc2l 15, cr0, [r7, #420] @ 0x1a4 │ │ + ldc2l 12, cr12, [r4, #428] @ 0x1ac │ │ + ldc2l 15, cr0, [r7, #196] @ 0xc4 │ │ + ldc2l 12, cr12, [r4, #236] @ 0xec │ │ + ldc2l 15, cr0, [r7, #4] │ │ + ldc2l 13, cr12, [r5, #100] @ 0x64 │ │ + ldc2l 1, cr1, [r7, #1012] @ 0x3f4 │ │ ldc2l 10, cr1, [r8, #464] @ 0x1d0 @ │ │ - ldc2l 11, cr12, [r4, #312] @ 0x138 @ │ │ - ldc2l 14, cr0, [r7, #80] @ 0x50 │ │ - ldc2l 6, cr14, [r6, #152] @ 0x98 │ │ - ldc2l 13, cr0, [r7, #912] @ 0x390 │ │ - vcadd.f32 d25, d21, d6, #270 │ │ + ldc2l 11, cr12, [r4, #492] @ 0x1ec @ │ │ + ldc2l 14, cr0, [r7, #260] @ 0x104 │ │ + ldc2l 6, cr14, [r6, #332] @ 0x14c │ │ + ldc2l 14, cr0, [r7, #68] @ 0x44 │ │ + ldc2l 8, cr9, [r5, #716] @ 0x2cc │ │ │ │ 024cee70 : │ │ push {r4, r5, r6, r8, r9, sl, fp, lr} │ │ add fp, sp, #24 │ │ sub sp, sp, #96 @ 0x60 │ │ ldr r9, [fp, #8] │ │ mov r5, r0 │ │ @@ -1450239,29 +1450238,29 @@ │ │ ldr r0, [pc, #76] @ 24cf11c │ │ mov r1, #8 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #24 │ │ pop {r4, r5, r6, r8, r9, sl, fp, pc} │ │ - ldc2l 9, cr2, [r6, #398] @ 0x18e @ │ │ + ldc2l 9, cr2, [r6, #488] @ 0x1e8 @ │ │ eoreq fp, r8, ip, asr #14 │ │ eoreq fp, r8, r0, ror r7 │ │ - ldc2l 7, cr6, [r5, #432] @ 0x1b0 │ │ - ldc2l 10, cr12, [r4, #948] @ 0x3b4 @ │ │ - ldc2l 15, cr3, [r5, #356] @ 0x164 │ │ + ldc2l 7, cr6, [r5, #612] @ 0x264 │ │ + ldc2l 11, cr12, [r4, #104] @ 0x68 @ │ │ + ldc2l 15, cr3, [r5, #536] @ 0x218 │ │ ldc2l 8, cr1, [r8, #620] @ 0x26c │ │ eoreq fp, r8, r8, lsl #13 │ │ eoreq fp, r8, r0, lsr r6 │ │ - ldc2l 15, cr11, [r7, #328] @ 0x148 │ │ - ldc2l 14, cr3, [r5, #244] @ 0xf4 │ │ + ldc2l 15, cr11, [r7, #508] @ 0x1fc │ │ + ldc2l 14, cr3, [r5, #424] @ 0x1a8 │ │ eoreq fp, r8, ip, asr #11 │ │ - ldc2l 0, cr4, [r6, #216] @ 0xd8 │ │ + ldc2l 0, cr4, [r6, #396] @ 0x18c │ │ eoreq fp, r8, r0, ror #12 │ │ - ldc2l 7, cr2, [r6, #652] @ 0x28c │ │ + ldc2l 7, cr2, [r6, #832] @ 0x340 │ │ │ │ 024cf120 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #60 @ 0x3c │ │ mov r5, r3 │ │ mov r4, r2 │ │ @@ -1451292,29 +1451291,29 @@ │ │ mov r1, r0 │ │ ldr r2, [pc, r2] │ │ ldr r0, [pc, #3948] @ 24d10b0 │ │ mov r3, #4 │ │ add r0, pc, r0 │ │ str r3, [r0, r1, lsl #2] │ │ b 24d019c │ │ - ldc2l 6, cr4, [r4, #496] @ 0x1f0 │ │ + ldc2l 6, cr4, [r4, #676] @ 0x2a4 │ │ mov r0, #1 │ │ b 24d00bc │ │ ldrbeq r3, [r6, #3300] @ 0xce4 │ │ ldrbeq r4, [r6, #1676] @ 0x68c │ │ ldrbeq r4, [r6, #1608] @ 0x648 │ │ ldrbeq r4, [r6, #1584] @ 0x630 │ │ ldrbeq r4, [r6, #1596] @ 0x63c │ │ ldrbeq r4, [r6, #1588] @ 0x634 │ │ ldrbeq r4, [r6, #1568] @ 0x620 │ │ ldrbeq r4, [r6, #1520] @ 0x5f0 │ │ ldrbeq r4, [r6, #1556] @ 0x614 │ │ ldrbeq r3, [r6, #3184] @ 0xc70 │ │ ldrbeq r3, [r6, #3161] @ 0xc59 │ │ - ldc2l 12, cr7, [r4, #44] @ 0x2c │ │ + ldc2l 12, cr7, [r4, #224] @ 0xe0 │ │ ldrbeq r4, [r6, #1180] @ 0x49c │ │ ldr r0, [pc, #3868] @ 24d10b4 │ │ add r0, pc, r0 │ │ str r2, [r0] │ │ sub r8, r2, #1 │ │ cmp r8, #132 @ 0x84 │ │ mov r0, r8 │ │ @@ -1451346,15 +1451345,15 @@ │ │ ldr r0, [r0, r1, lsl #2] │ │ ldr r2, [pc, #4048] @ 24d11e8 │ │ add r2, pc, r2 │ │ str r0, [r2] │ │ b 24d0300 │ │ ldrbeq r4, [r6, #1148] @ 0x47c │ │ ldrbeq r4, [r6, #1504] @ 0x5e0 │ │ - ldc2l 4, cr8, [r7, #60] @ 0x3c │ │ + ldc2l 4, cr8, [r7, #240] @ 0xf0 │ │ ldrbeq r3, [r6, #3900] @ 0xf3c │ │ ldrbeq r4, [r6, #1340] @ 0x53c │ │ ldrbeq r4, [r6, #416] @ 0x1a0 │ │ ldrbeq r4, [r6, #1320] @ 0x528 │ │ ldrbeq r4, [r6, #1304] @ 0x518 │ │ ldrbeq r4, [r6, #940] @ 0x3ac │ │ ldrbeq r4, [r6, #908] @ 0x38c │ │ @@ -1451365,24 +1451364,24 @@ │ │ ldrbeq r4, [r6, #1136] @ 0x470 │ │ ldrbeq r3, [r6, #3172] @ 0xc64 │ │ ldrbeq r3, [r6, #3828] @ 0xef4 │ │ ldrbeq r3, [r6, #3680] @ 0xe60 │ │ ldrbeq r3, [r6, #3132] @ 0xc3c │ │ ldrbeq r3, [r6, #3792] @ 0xed0 │ │ ldrbeq r4, [r6, #1088] @ 0x440 │ │ - ldc2l 10, cr0, [r5, #452] @ 0x1c4 @ │ │ - ldc2l 0, cr2, [r5, #260] @ 0x104 │ │ + ldc2l 10, cr0, [r5, #632] @ 0x278 @ │ │ + ldc2l 0, cr2, [r5, #440] @ 0x1b8 │ │ mlaeq r8, ip, r2, fp │ │ - ldc2l 15, cr11, [r5, #16] │ │ + ldc2l 15, cr11, [r5, #196] @ 0xc4 │ │ ldrbeq r4, [r6, #1020] @ 0x3fc │ │ - ldc2l 14, cr1, [r6, #896] @ 0x380 │ │ + ldc2l 15, cr1, [r6, #52] @ 0x34 │ │ eoreq fp, r8, r0, ror r2 │ │ ldrbeq r3, [r6, #2980] @ 0xba4 │ │ ldrbeq r3, [r6, #3632] @ 0xe30 │ │ - ldc2l 3, cr12, [r6, #748] @ 0x2ec │ │ + ldc2l 3, cr12, [r6, #928] @ 0x3a0 │ │ ldr r0, [pc, #3960] @ 24d121c │ │ movw r3, #979 @ 0x3d3 │ │ ldr r5, [pc, #3956] @ 24d1220 │ │ add r0, pc, r0 │ │ add r5, pc, r5 │ │ mov r2, r5 │ │ bl 270d9c0 │ │ @@ -1451487,15 +1451486,15 @@ │ │ rsb r1, r0, #0 │ │ ldr r0, [pc, #4040] @ 24d1414 │ │ add r0, pc, r0 │ │ str r1, [r0] │ │ mov r1, r6 │ │ bl 270e080 │ │ b 24d0494 │ │ - ldc2l 1, cr12, [r4, #788] @ 0x314 │ │ + ldc2l 1, cr12, [r4, #968] @ 0x3c8 │ │ ldrbeq r3, [r6, #2912] @ 0xb60 │ │ ldrbeq r3, [r6, #3564] @ 0xdec │ │ ldrbeq r3, [r6, #4076] @ 0xfec │ │ ldrbeq r4, [r6, #848] @ 0x350 │ │ ldrbeq r4, [r6, #816] @ 0x330 │ │ ldrbeq r3, [r6, #3976] @ 0xf88 │ │ ldrbeq r3, [r6, #3292] @ 0xcdc │ │ @@ -1451615,15 +1451614,15 @@ │ │ ldrbeq r3, [r6, #3456] @ 0xd80 │ │ ldrbeq r4, [r6, #248] @ 0xf8 │ │ ldrbeq r4, [r6, #244] @ 0xf4 │ │ ldrbeq r4, [r6, #224] @ 0xe0 │ │ ldrbeq r4, [r6, #160] @ 0xa0 │ │ ldrbeq r3, [r6, #3932] @ 0xf5c │ │ ldrbeq r3, [r6, #3916] @ 0xf4c │ │ - ldc2l 6, cr0, [r5, #788] @ 0x314 │ │ + ldc2l 6, cr0, [r5, #968] @ 0x3c8 │ │ ldr r0, [pc, #3796] @ 24d153c │ │ ldr r0, [pc, r0] │ │ sub r1, r0, #1 │ │ cmp r1, #132 @ 0x84 │ │ bcc 24d0690 │ │ ldr r0, [pc, #3780] @ 24d1540 │ │ mov r3, #992 @ 0x3e0 │ │ @@ -1451700,16 +1451699,16 @@ │ │ ldrbeq r3, [r6, #2108] @ 0x83c │ │ ldrbeq r3, [r6, #3284] @ 0xcd4 │ │ ldrbeq r3, [r6, #3808] @ 0xee0 │ │ ldrbeq r4, [r6, #20] │ │ ldrbeq r3, [r6, #3784] @ 0xec8 │ │ ldrbeq r3, [r6, #3768] @ 0xeb8 │ │ ldrbeq r3, [r6, #4092] @ 0xffc │ │ - ldc2l 4, cr4, [r7, #996] @ 0x3e4 │ │ - ldc2l 6, cr0, [r5, #52] @ 0x34 │ │ + ldc2l 5, cr4, [r7, #152] @ 0x98 │ │ + ldc2l 6, cr0, [r5, #232] @ 0xe8 │ │ ldrbeq r3, [r6, #3132] @ 0xc3c │ │ ldrbeq r3, [r6, #3676] @ 0xe5c │ │ ldrbeq r3, [r6, #3640] @ 0xe38 │ │ ldrbeq r3, [r6, #3940] @ 0xf64 │ │ ldrbeq r3, [r6, #3612] @ 0xe1c │ │ ldrbeq r3, [r6, #3596] @ 0xe0c │ │ mov r1, #255 @ 0xff │ │ @@ -1451762,20 +1451761,20 @@ │ │ add r0, pc, r0 │ │ str r1, [r0] │ │ mov r1, r4 │ │ bl 270e080 │ │ ldr r0, [pc, #3592] @ 24d16ac │ │ ldr r0, [pc, r0] │ │ b 24d08cc │ │ - ldc2l 5, cr0, [r5, #500] @ 0x1f4 │ │ + ldc2l 5, cr0, [r5, #680] @ 0x2a8 │ │ ldrbeq r3, [r6, #3548] @ 0xddc │ │ ldrbeq r3, [r6, #3520] @ 0xdc0 │ │ ldrbeq r3, [r6, #1772] @ 0x6ec │ │ - ldc2l 6, cr5, [r7, #692] @ 0x2b4 │ │ - ldc2l 5, cr0, [r5, #228] @ 0xe4 │ │ + ldc2l 6, cr5, [r7, #872] @ 0x368 │ │ + ldc2l 5, cr0, [r5, #408] @ 0x198 │ │ ldr r0, [pc, #3544] @ 24d16a0 │ │ ldr r0, [pc, r0] │ │ str r0, [r2, r1, lsl #2] │ │ ldr r1, [pc, #3548] @ 24d16b0 │ │ ldr sl, [fp, #20] │ │ ldr r1, [pc, r1] │ │ ldr r2, [pc, #3540] @ 24d16b4 │ │ @@ -1451790,16 +1451789,16 @@ │ │ vstr d16, [r0] │ │ ldr r0, [pc, #3508] @ 24d16bc │ │ ldr r0, [pc, r0] │ │ add r2, r0, #1 │ │ b 24d0190 │ │ ldrbeq r3, [r6, #2388] @ 0x954 │ │ ldrbeq r3, [r6, #3468] @ 0xd8c │ │ - ldc2l 3, cr4, [r7, #932] @ 0x3a4 │ │ - ldc2l 6, cr5, [r7, #340] @ 0x154 │ │ + ldc2l 4, cr4, [r7, #88] @ 0x58 │ │ + ldc2l 6, cr5, [r7, #520] @ 0x208 │ │ ldrbeq r3, [r6, #3376] @ 0xd30 │ │ ldr r1, [pc, #3476] @ 24d16c0 │ │ cmp r2, r0 │ │ mov r0, #2 │ │ str r8, [fp, #-32] @ 0xffffffe0 │ │ add r1, pc, r1 │ │ movwgt r0, #3 │ │ @@ -1451819,21 +1451818,21 @@ │ │ bl 270d970 │ │ b 24d13f0 │ │ ldrbeq r3, [r6, #2292] @ 0x8f4 │ │ ldrbeq r3, [r6, #3628] @ 0xe2c │ │ ldrbeq r3, [r6, #2124] @ 0x84c │ │ ldrbeq r3, [r6, #3324] @ 0xcfc │ │ ldrbeq r3, [r6, #2744] @ 0xab8 │ │ - ldc2l 4, cr0, [r5, #372] @ 0x174 │ │ + ldc2l 4, cr0, [r5, #552] @ 0x228 │ │ ldrbeq r3, [r6, #3260] @ 0xcbc │ │ ldrbeq r3, [r6, #3232] @ 0xca0 │ │ ldrbeq r3, [r6, #1484] @ 0x5cc │ │ ldrbeq r3, [r6, #2128] @ 0x850 │ │ - ldc2l 2, cr4, [r7, #980] @ 0x3d4 │ │ - ldc2l 4, cr0, [r5, #36] @ 0x24 │ │ + ldc2l 3, cr4, [r7, #136] @ 0x88 │ │ + ldc2l 4, cr0, [r5, #216] @ 0xd8 │ │ ldr r0, [pc, #2912] @ 24d1510 │ │ ldr r1, [pc, #2912] @ 24d1514 │ │ ldr r2, [sp, #28] │ │ add r0, pc, r0 │ │ str r2, [sp] │ │ add r1, pc, r1 │ │ ldr r2, [fp, #16] │ │ @@ -1451869,21 +1451868,21 @@ │ │ mov r1, #187 @ 0xbb │ │ b 24d0b08 │ │ ldrbeq r3, [r6, #2616] @ 0xa38 │ │ ldrbeq r3, [r6, #3160] @ 0xc58 │ │ ldrbeq r3, [r6, #3124] @ 0xc34 │ │ ldrbeq r3, [r6, #3112] @ 0xc28 │ │ ldrbeq r3, [r6, #1340] @ 0x53c │ │ - ldc2l 4, cr5, [r7, #980] @ 0x3d4 │ │ - ldc2l 3, cr0, [r5, #516] @ 0x204 │ │ + ldc2l 5, cr5, [r7, #136] @ 0x88 │ │ + ldc2l 3, cr0, [r5, #696] @ 0x2b8 │ │ ldrbeq r3, [r6, #1948] @ 0x79c │ │ ldrbeq r3, [r6, #3028] @ 0xbd4 │ │ - ldc2l 2, cr4, [r7, #196] @ 0xc4 │ │ + ldc2l 2, cr4, [r7, #376] @ 0x178 │ │ ldrbeq r3, [r6, #2424] @ 0x978 │ │ - ldc2l 3, cr0, [r5, #132] @ 0x84 │ │ + ldc2l 3, cr0, [r5, #312] @ 0x138 │ │ ldrbeq r3, [r6, #2944] @ 0xb80 │ │ ldr r0, [pc, #2788] @ 24d1560 │ │ ldr r1, [pc, #2788] @ 24d1564 │ │ ldr r2, [sp, #28] │ │ add r0, pc, r0 │ │ str r2, [sp] │ │ add r1, pc, r1 │ │ @@ -1451930,27 +1451929,27 @@ │ │ mov r0, r6 │ │ mov r1, r5 │ │ mov r2, #1 │ │ bl 270da90 │ │ ldr r3, [pc, #2544] @ 24d1534 │ │ ldr r3, [pc, r3] │ │ b 24d0c1c │ │ - ldc2l 4, cr5, [r7, #388] @ 0x184 │ │ + ldc2l 4, cr5, [r7, #568] @ 0x238 │ │ ldrbeq r3, [r6, #1804] @ 0x70c │ │ ldrbeq r3, [r6, #2880] @ 0xb40 │ │ ldrbeq r3, [r6, #2860] @ 0xb2c │ │ ldrbeq r3, [r6, #2824] @ 0xb08 │ │ ldrbeq r3, [r6, #1720] @ 0x6b8 │ │ - ldc2l 2, cr0, [r5, #468] @ 0x1d4 │ │ + ldc2l 2, cr0, [r5, #648] @ 0x288 │ │ ldrbeq r3, [r6, #2772] @ 0xad4 │ │ ldrbeq r3, [r6, #2744] @ 0xab8 │ │ ldrbeq r3, [r6, #992] @ 0x3e0 │ │ ldrbeq r3, [r6, #1636] @ 0x664 │ │ - ldc2l 3, cr5, [r7, #580] @ 0x244 │ │ - ldc2l 2, cr0, [r5, #116] @ 0x74 │ │ + ldc2l 3, cr5, [r7, #760] @ 0x2f8 │ │ + ldc2l 2, cr0, [r5, #296] @ 0x128 │ │ ldr r0, [pc, #2552] @ 24d157c │ │ ldr r1, [pc, #2552] @ 24d1580 │ │ ldr r2, [sp, #28] │ │ add r0, pc, r0 │ │ str r2, [sp] │ │ add r1, pc, r1 │ │ ldr r2, [fp, #16] │ │ @@ -1451993,17 +1451992,17 @@ │ │ bl 270d9f0 │ │ ldr r0, [pc, #2308] @ 24d1538 │ │ add r0, pc, r0 │ │ b 24d13e8 │ │ ldrbeq r3, [r6, #2680] @ 0xa78 │ │ ldrbeq r3, [r6, #1576] @ 0x628 │ │ ldrbeq r3, [r6, #1536] @ 0x600 │ │ - ldc2l 10, cr7, [r7, #156] @ 0x9c @ │ │ - ldc2l 3, cr5, [r7, #132] @ 0x84 │ │ - ldc2l 1, cr0, [r5, #692] @ 0x2b4 │ │ + ldc2l 10, cr7, [r7, #336] @ 0x150 @ │ │ + ldc2l 3, cr5, [r7, #312] @ 0x138 │ │ + ldc2l 1, cr0, [r5, #872] @ 0x368 │ │ ldr r4, [pc, #2372] @ 24d159c │ │ mov r2, #255 @ 0xff │ │ ldr r5, [pc, #2368] @ 24d15a0 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ mov r0, r4 │ │ mov r1, r5 │ │ @@ -1452017,15 +1452016,15 @@ │ │ add r1, pc, r1 │ │ str r0, [r2] │ │ mov r0, r1 │ │ mov r1, #162 @ 0xa2 │ │ b 24d0d08 │ │ ldrbeq r3, [r6, #1480] @ 0x5c8 │ │ ldrbeq r3, [r6, #2560] @ 0xa00 │ │ - ldc2l 0, cr4, [r7, #372] @ 0x174 │ │ + ldc2l 0, cr4, [r7, #552] @ 0x228 │ │ ldrbeq r3, [r6, #1956] @ 0x7a4 │ │ ldrbeq r3, [r6, #2828] @ 0xb0c │ │ ldrbeq r3, [r6, #1904] @ 0x770 │ │ ldrbeq r3, [r6, #1892] @ 0x764 │ │ ldrbeq r3, [r6, #2792] @ 0xae8 │ │ ldrbeq r3, [r6, #2424] @ 0x978 │ │ ldr r4, [pc, #2496] @ 24d1688 │ │ @@ -1452066,24 +1452065,24 @@ │ │ ldrbeq r3, [r6, #2752] @ 0xac0 │ │ ldrbeq r3, [r6, #2740] @ 0xab4 │ │ ldrbeq r3, [r6, #1800] @ 0x708 │ │ ldrbeq r3, [r6, #2688] @ 0xa80 │ │ ldrbeq r3, [r6, #2668] @ 0xa6c │ │ ldrbeq r3, [r6, #2312] @ 0x908 │ │ ldrbeq r3, [r6, #2296] @ 0x8f8 │ │ - ldc2l 0, cr0, [r5, #452] @ 0x1c4 │ │ + ldc2l 0, cr0, [r5, #632] @ 0x278 │ │ ldrbeq r3, [r6, #2256] @ 0x8d0 │ │ ldrbeq r3, [r6, #488] @ 0x1e8 │ │ - ldc2l 15, cr3, [r7, #132] @ 0x84 │ │ - ldc2l 0, cr0, [r5, #212] @ 0xd4 │ │ + ldc2l 15, cr3, [r7, #312] @ 0x138 │ │ + ldc2l 0, cr0, [r5, #392] @ 0x188 │ │ ldrbeq r3, [r6, #1636] @ 0x664 │ │ ldrbeq r3, [r6, #2160] @ 0x870 │ │ ldrbeq r3, [r6, #2172] @ 0x87c │ │ - ldc2l 1, cr5, [r7, #388] @ 0x184 │ │ - ldc2l 15, cr15, [r4, #948] @ 0x3b4 │ │ + ldc2l 1, cr5, [r7, #568] @ 0x238 │ │ + ldc2l 0, cr0, [r5, #104] @ 0x68 │ │ ldrbeq r3, [r6, #2464] @ 0x9a0 │ │ ldrbeq r3, [r6, #2456] @ 0x998 │ │ ldr r0, [pc, #2104] @ 24d15d8 │ │ ldr r1, [pc, #2104] @ 24d15dc │ │ ldr r2, [sp, #28] │ │ add r0, pc, r0 │ │ str r2, [sp] │ │ @@ -1452139,24 +1452138,24 @@ │ │ bl 270d9f0 │ │ ldr r3, [pc, #1924] @ 24d1600 │ │ mov r0, r6 │ │ mov r1, r8 │ │ ldr r3, [pc, r3] │ │ b 24d11c8 │ │ ldrbeq r3, [r6, #2084] @ 0x824 │ │ - ldc2l 15, cr15, [r4, #628] @ 0x274 │ │ + ldc2l 15, cr15, [r4, #808] @ 0x328 │ │ ldrbeq r3, [r6, #2044] @ 0x7fc │ │ ldrbeq r3, [r6, #276] @ 0x114 │ │ - ldc2l 14, cr3, [r7, #308] @ 0x134 │ │ - ldc2l 15, cr15, [r4, #388] @ 0x184 │ │ + ldc2l 14, cr3, [r7, #488] @ 0x1e8 │ │ + ldc2l 15, cr15, [r4, #568] @ 0x238 │ │ ldrbeq r3, [r6, #1984] @ 0x7c0 │ │ ldrbeq r3, [r6, #1416] @ 0x588 │ │ ldrbeq r3, [r6, #1940] @ 0x794 │ │ - ldc2l 0, cr5, [r7, #564] @ 0x234 │ │ - ldc2l 15, cr15, [r4, #100] @ 0x64 │ │ + ldc2l 0, cr5, [r7, #744] @ 0x2e8 │ │ + ldc2l 15, cr15, [r4, #280] @ 0x118 │ │ ldrbeq r3, [r6, #820] @ 0x334 │ │ ldrbeq r3, [r6, #636] @ 0x27c │ │ ldrbeq r3, [r6, #2188] @ 0x88c │ │ ldrbeq r3, [r6, #584] @ 0x248 │ │ ldrbeq r3, [r6, #1244] @ 0x4dc │ │ ldrbeq r3, [r6, #1784] @ 0x6f8 │ │ ldr r0, [pc, #1928] @ 24d165c │ │ @@ -1452273,21 +1452272,21 @@ │ │ b 24d13d8 │ │ ldrbeq r3, [r6, #464] @ 0x1d0 │ │ ldrbeq r3, [r6, #1884] @ 0x75c │ │ ldrbeq r3, [r6, #956] @ 0x3bc │ │ ldrbeq r3, [r6, #1844] @ 0x734 │ │ ldrbeq r3, [r6, #1468] @ 0x5bc │ │ ldrbeq r3, [r6, #1452] @ 0x5ac │ │ - ldc2l 12, cr3, [r7, #36] @ 0x24 │ │ - ldc2l 13, cr15, [r4, #116] @ 0x74 │ │ + ldc2l 12, cr3, [r7, #216] @ 0xd8 │ │ + ldc2l 13, cr15, [r4, #296] @ 0x128 │ │ ldrbeq r3, [r6, #1768] @ 0x6e8 │ │ ldrbeq r3, [r6, #836] @ 0x344 │ │ ldrbeq r3, [r6, #1676] @ 0x68c │ │ - ldc2l 11, cr3, [r7, #452] @ 0x1c4 @ │ │ - ldc2l 12, cr15, [r4, #532] @ 0x214 │ │ + ldc2l 11, cr3, [r7, #632] @ 0x278 @ │ │ + ldc2l 12, cr15, [r4, #712] @ 0x2c8 │ │ ldrbeq r3, [r6, #1620] @ 0x654 │ │ ldrbeq r3, [r6, #692] @ 0x2b4 │ │ ldr r0, [pc, #1352] @ 24d1618 │ │ ldr r1, [pc, #1352] @ 24d161c │ │ ldr r2, [sp, #28] │ │ add r0, pc, r0 │ │ str r2, [sp] │ │ @@ -1452367,20 +1452366,20 @@ │ │ mov r0, r4 │ │ mov r1, r5 │ │ bl 270ec70 │ │ ldr r0, [pc, #656] @ 24d14a4 │ │ mov r1, #160 @ 0xa0 │ │ add r0, pc, r0 │ │ b 24d135c │ │ - ldc2l 3, cr7, [r7, #988] @ 0x3dc │ │ - ldc2l 11, cr15, [r4, #612] @ 0x264 @ │ │ + ldc2l 4, cr7, [r7, #144] @ 0x90 │ │ + ldc2l 11, cr15, [r4, #792] @ 0x318 @ │ │ ldrbeq r2, [r6, #3348] @ 0xd14 │ │ ldrbeq r3, [r6, #972] @ 0x3cc │ │ ldrbeq r3, [r6, #1352] @ 0x548 │ │ - ldc2l 12, cr4, [r7, #772] @ 0x304 │ │ + ldc2l 12, cr4, [r7, #952] @ 0x3b8 │ │ ldr r2, [pc, #648] @ 24d14c4 │ │ add r0, r1, r0 │ │ ldr r4, [pc, #644] @ 24d14c8 │ │ ldr r5, [pc, #644] @ 24d14cc │ │ add r2, pc, r2 │ │ add r4, pc, r4 │ │ add r5, pc, r5 │ │ @@ -1452425,21 +1452424,21 @@ │ │ mov r1, #22 │ │ add r0, pc, r0 │ │ b 24d13ec │ │ ldrbeq r2, [r6, #3948] @ 0xf6c │ │ ldrbeq r3, [r6, #908] @ 0x38c │ │ ldrbeq r3, [r6, #1280] @ 0x500 │ │ ldrbeq r3, [r6, #1260] @ 0x4ec │ │ - ldc2l 9, cr3, [r7, #442] @ 0x1ba @ │ │ - ldc2l 10, cr15, [r4, #964] @ 0x3c4 @ │ │ + ldc2l 10, cr3, [r7, #40] @ 0x28 @ │ │ + ldc2l 11, cr15, [r4, #120] @ 0x78 @ │ │ ldrbeq r3, [r6, #292] @ 0x124 │ │ ldrbeq r3, [r6, #1184] @ 0x4a0 │ │ ldrbeq r3, [r6, #1176] @ 0x498 │ │ - ldc2l 9, cr3, [r7, #274] @ 0x112 @ │ │ - ldc2l 10, cr15, [r4, #628] @ 0x274 @ │ │ + ldc2l 9, cr3, [r7, #364] @ 0x16c @ │ │ + ldc2l 10, cr15, [r4, #808] @ 0x328 @ │ │ ldrbeq r3, [r6, #208] @ 0xd0 │ │ ldrbeq r3, [r6, #716] @ 0x2cc │ │ ldrbeq r3, [r6, #708] @ 0x2c4 │ │ ldrbeq r3, [r6, #972] @ 0x3cc │ │ ldr r4, [pc, #432] @ 24d14e8 │ │ mov r2, #255 @ 0xff │ │ ldr r5, [pc, #428] @ 24d14ec │ │ @@ -1452518,91 +1452517,91 @@ │ │ mov r1, #105 @ 0x69 │ │ b 24d0d08 │ │ ldrbeq r3, [r6, #836] @ 0x344 │ │ ldrbeq r3, [r6, #860] @ 0x35c │ │ ldrbeq r3, [r6, #504] @ 0x1f8 │ │ ldrbeq r2, [r6, #3380] @ 0xd34 │ │ ldrbeq r3, [r6, #788] @ 0x314 │ │ - ldc2l 9, cr6, [r4, #134] @ 0x86 @ │ │ + ldc2l 9, cr6, [r4, #224] @ 0xe0 @ │ │ ldrbeq r3, [r6, #452] @ 0x1c4 │ │ ldrbeq r3, [r6, #444] @ 0x1bc │ │ ldrbeq r3, [r6, #424] @ 0x1a8 │ │ ldrbeq r3, [r6, #392] @ 0x188 │ │ ldrbeq r3, [r6, #380] @ 0x17c │ │ ldrbeq r3, [r6, #360] @ 0x168 │ │ ldrbeq r3, [r6, #308] @ 0x134 │ │ ldrbeq r3, [r6, #284] @ 0x11c │ │ ldrbeq r1, [r6, #3293] @ 0xcdd │ │ ldrbeq r2, [r6, #1544] @ 0x608 │ │ - ldc2l 9, cr10, [r4, #218] @ 0xda @ │ │ + ldc2l 9, cr10, [r4, #308] @ 0x134 @ │ │ ldrbeq r2, [r6, #1096] @ 0x448 │ │ ldrbeq r1, [r6, #3696] @ 0xe70 │ │ ldrbeq r2, [r6, #1064] @ 0x428 │ │ - ldc2l 11, cr1, [r5, #148] @ 0x94 @ │ │ + ldc2l 11, cr1, [r5, #328] @ 0x148 @ │ │ ldrbeq r2, [r6, #1020] @ 0x3fc │ │ ldrbeq r2, [r6, #1004] @ 0x3ec │ │ - ldc2l 9, cr8, [r5, #470] @ 0x1d6 @ │ │ + ldc2l 10, cr8, [r5, #96] @ 0x60 @ │ │ ldrbeq r2, [r6, #1408] @ 0x580 │ │ ldrbeq r1, [r6, #3213] @ 0xc8d │ │ ldrbeq r2, [r6, #1464] @ 0x5b8 │ │ ldrbeq r2, [r6, #1348] @ 0x544 │ │ - ldc2l 5, cr6, [r6, #764] @ 0x2fc │ │ - ldc2l 12, cr1, [r5, #148] @ 0x94 │ │ + ldc2l 5, cr6, [r6, #944] @ 0x3b0 │ │ + ldc2l 12, cr1, [r5, #328] @ 0x148 │ │ ldrbeq r2, [r6, #1284] @ 0x504 │ │ ldrbeq r2, [r6, #1272] @ 0x4f8 │ │ - ldc2l 5, cr0, [r6, #576] @ 0x240 │ │ + ldc2l 5, cr0, [r6, #756] @ 0x2f4 │ │ ldrbeq r1, [r6, #2969] @ 0xb99 │ │ ldrbeq r2, [r6, #1220] @ 0x4c4 │ │ - ldc2l 7, cr14, [r5, #112] @ 0x70 │ │ + ldc2l 7, cr14, [r5, #292] @ 0x124 │ │ ldrbeq r1, [r6, #2737] @ 0xab1 │ │ ldrbeq r2, [r6, #988] @ 0x3dc │ │ ldrbeq r2, [r6, #880] @ 0x370 │ │ - ldc2l 6, cr12, [r6, #236] @ 0xec │ │ - ldc2l 1, cr2, [r5, #676] @ 0x2a4 │ │ + ldc2l 6, cr12, [r6, #416] @ 0x1a0 │ │ + ldc2l 1, cr2, [r5, #856] @ 0x358 │ │ ldrbeq r2, [r6, #2696] @ 0xa88 │ │ - ldc2l 7, cr14, [r5, #4] │ │ + ldc2l 7, cr14, [r5, #184] @ 0xb8 │ │ ldrbeq r2, [r6, #3656] @ 0xe48 │ │ ldrbeq r2, [r6, #3608] @ 0xe18 │ │ ldrbeq r2, [r6, #1261] @ 0x4ed │ │ ldrbeq r2, [r6, #3608] @ 0xe18 │ │ ldrbeq r2, [r6, #3504] @ 0xdb0 │ │ ldrbeq r2, [r6, #3480] @ 0xd98 │ │ - ldc2l 14, cr6, [r6, #860] @ 0x35c │ │ - ldc2l 3, cr2, [r5, #660] @ 0x294 │ │ + ldc2l 15, cr6, [r6, #16] │ │ + ldc2l 3, cr2, [r5, #840] @ 0x348 │ │ ldrbeq r2, [r6, #3228] @ 0xc9c │ │ ldrbeq r2, [r6, #3200] @ 0xc80 │ │ - ldc2l 5, cr12, [r6, #496] @ 0x1f0 │ │ + ldc2l 5, cr12, [r6, #676] @ 0x2a4 │ │ ldrbeq r3, [r6, #444] @ 0x1bc │ │ - ldc2l 6, cr3, [r7, #692] @ 0x2b4 │ │ - ldc2l 7, cr15, [r4, #772] @ 0x304 │ │ + ldc2l 6, cr3, [r7, #872] @ 0x368 │ │ + ldc2l 7, cr15, [r4, #952] @ 0x3b8 │ │ ldrbeq r2, [r6, #3572] @ 0xdf4 │ │ ldrbeq r3, [r6, #368] @ 0x170 │ │ ldrbeq r3, [r6, #360] @ 0x168 │ │ - ldc2l 6, cr3, [r7, #356] @ 0x164 │ │ - ldc2l 7, cr15, [r4, #436] @ 0x1b4 │ │ + ldc2l 6, cr3, [r7, #536] @ 0x218 │ │ + ldc2l 7, cr15, [r4, #616] @ 0x268 │ │ ldrbeq r2, [r6, #3488] @ 0xda0 │ │ ldrbeq r2, [r6, #3452] @ 0xd7c │ │ ldrbeq r2, [r6, #3404] @ 0xd4c │ │ ldrbeq r2, [r6, #1057] @ 0x421 │ │ ldrbeq r2, [r6, #3404] @ 0xd4c │ │ ldrbeq r2, [r6, #3300] @ 0xce4 │ │ ldrbeq r2, [r6, #3276] @ 0xccc │ │ - ldc2l 14, cr8, [r6, #148] @ 0x94 │ │ + ldc2l 14, cr8, [r6, #328] @ 0x148 │ │ ldrbeq r2, [r6, #3188] @ 0xc74 │ │ ldrbeq r2, [r6, #3140] @ 0xc44 │ │ ldrbeq r2, [r6, #793] @ 0x319 │ │ ldrbeq r2, [r6, #3140] @ 0xc44 │ │ ldrbeq r2, [r6, #3032] @ 0xbd8 │ │ - ldc2l 1, cr7, [r5, #364] @ 0x16c │ │ - ldc2l 2, cr2, [r5, #740] @ 0x2e4 │ │ + ldc2l 1, cr7, [r5, #544] @ 0x220 │ │ + ldc2l 2, cr2, [r5, #920] @ 0x398 │ │ ldrbeq r2, [r6, #2980] @ 0xba4 │ │ ldrbeq r2, [r6, #633] @ 0x279 │ │ ldrbeq r2, [r6, #2980] @ 0xba4 │ │ ldrbeq r2, [r6, #2872] @ 0xb38 │ │ - ldc2l 14, cr12, [r6, #436] @ 0x1b4 │ │ + ldc2l 14, cr12, [r6, #616] @ 0x268 │ │ ldrbeq r3, [r6, #540] @ 0x21c │ │ ldrbeq r3, [r6, #224] @ 0xe0 │ │ ldrbeq r3, [r6, #504] @ 0x1f8 │ │ ldrbeq r3, [r6, #196] @ 0xc4 │ │ ldrbeq r3, [r6, #176] @ 0xb0 │ │ ldrbeq r3, [r6, #156] @ 0x9c │ │ ldrbeq r3, [r6, #144] @ 0x90 │ │ @@ -1452612,52 +1452611,52 @@ │ │ ldrbeq r2, [r6, #3952] @ 0xf70 │ │ ldrbeq r2, [r6, #2648] @ 0xa58 │ │ ldrbeq r2, [r6, #2600] @ 0xa28 │ │ ldrbeq r2, [r6, #253] @ 0xfd │ │ ldrbeq r2, [r6, #2600] @ 0xa28 │ │ ldrbeq r2, [r6, #2496] @ 0x9c0 │ │ ldrbeq r2, [r6, #2472] @ 0x9a8 │ │ - ldc2l 11, cr8, [r6, #828] @ 0x33c @ │ │ - ldc2l 0, cr2, [r5, #532] @ 0x214 │ │ + ldc2l 11, cr8, [r6, #1008] @ 0x3f0 @ │ │ + ldc2l 0, cr2, [r5, #712] @ 0x2c8 │ │ ldrbeq r2, [r6, #2136] @ 0x858 │ │ ldrbeq r2, [r6, #2388] @ 0x954 │ │ ldrbeq r2, [r6, #2364] @ 0x93c │ │ - ldc2l 13, cr14, [r4, #200] @ 0xc8 │ │ + ldc2l 13, cr14, [r4, #380] @ 0x17c │ │ ldrbeq r2, [r6, #2716] @ 0xa9c │ │ ldrbeq r3, [r6, #148] @ 0x94 │ │ ldrbeq r2, [r6, #3928] @ 0xf58 │ │ - ldc2l 6, cr6, [r4, #572] @ 0x23c │ │ + ldc2l 6, cr6, [r4, #752] @ 0x2f0 │ │ ldrbeq r2, [r6, #1832] @ 0x728 │ │ ldrbeq r2, [r6, #1784] @ 0x6f8 │ │ ldrbeq r1, [r6, #3533] @ 0xdcd │ │ ldrbeq r2, [r6, #1784] @ 0x6f8 │ │ ldrbeq r2, [r6, #1676] @ 0x68c │ │ ldrbeq r2, [r6, #1412] @ 0x584 │ │ ldrbeq r2, [r6, #1376] @ 0x560 │ │ - ldc2l 12, cr6, [r5, #268] @ 0x10c │ │ - ldc2l 13, cr1, [r5, #324] @ 0x144 │ │ + ldc2l 12, cr6, [r5, #448] @ 0x1c0 │ │ + ldc2l 13, cr1, [r5, #504] @ 0x1f8 │ │ ldrbeq r2, [r6, #1316] @ 0x524 │ │ ldrbeq r2, [r6, #1308] @ 0x51c │ │ ldrbeq r2, [r6, #1260] @ 0x4ec │ │ ldrbeq r3, [r6, #4] │ │ ldrbeq r2, [r6, #3784] @ 0xec8 │ │ ldrbeq r2, [r6, #3756] @ 0xeac │ │ - ldc2l 5, cr6, [r4, #1004] @ 0x3ec │ │ + ldc2l 6, cr6, [r4, #160] @ 0xa0 │ │ ldrbeq r2, [r6, #2504] @ 0x9c8 │ │ ldrbeq r2, [r6, #2340] @ 0x924 │ │ ldrbeq r2, [r6, #2292] @ 0x8f4 │ │ ldrbeq r1, [r6, #4041] @ 0xfc9 │ │ ldrbeq r2, [r6, #2292] @ 0x8f4 │ │ ldrbeq r2, [r6, #1916] @ 0x77c │ │ - ldc2l 1, cr10, [r7, #320] @ 0x140 │ │ - ldc2l 15, cr1, [r5, #436] @ 0x1b4 │ │ + ldc2l 1, cr10, [r7, #500] @ 0x1f4 │ │ + ldc2l 15, cr1, [r5, #616] @ 0x268 │ │ ldrbeq r2, [r6, #1856] @ 0x740 │ │ ldrbeq r2, [r6, #1844] @ 0x734 │ │ ldrbeq r2, [r6, #1792] @ 0x700 │ │ - ldc2l 2, cr8, [r5, #916] @ 0x394 │ │ + ldc2l 3, cr8, [r5, #72] @ 0x48 │ │ ldrbeq r2, [r6, #521] @ 0x209 │ │ ldrbeq r2, [r6, #2868] @ 0xb34 │ │ ldrbeq r2, [r6, #2760] @ 0xac8 │ │ ldc2l 12, cr15, [r7, #408] @ 0x198 │ │ ldrbeq r2, [r6, #3988] @ 0xf94 │ │ ldrbeq r2, [r6, #3964] @ 0xf7c │ │ ldrbeq r2, [r6, #3860] @ 0xf14 │ │ @@ -1452665,26 +1452664,26 @@ │ │ ldrbeq r2, [r6, #2528] @ 0x9e0 │ │ ldrbeq r2, [r6, #3896] @ 0xf38 │ │ ldrbeq r2, [r6, #3544] @ 0xdd8 │ │ ldrbeq r2, [r6, #3532] @ 0xdcc │ │ ldrbeq r2, [r6, #3844] @ 0xf04 │ │ ldrbeq r2, [r6, #3868] @ 0xf1c │ │ ldrbeq r2, [r6, #3812] @ 0xee4 │ │ - ldc2l 13, cr6, [r7, #364] @ 0x16c │ │ + ldc2l 13, cr6, [r7, #544] @ 0x220 │ │ ldrbeq r2, [r6, #3420] @ 0xd5c │ │ ldrbeq r2, [r6, #2064] @ 0x810 │ │ ldrbeq r2, [r6, #2016] @ 0x7e0 │ │ ldrbeq r1, [r6, #3765] @ 0xeb5 │ │ ldrbeq r2, [r6, #2016] @ 0x7e0 │ │ ldrbeq r2, [r6, #1908] @ 0x774 │ │ - ldc2l 12, cr4, [r4, #804] @ 0x324 │ │ - ldc2l 14, cr1, [r5, #340] @ 0x154 │ │ + ldc2l 12, cr4, [r4, #984] @ 0x3d8 │ │ + ldc2l 14, cr1, [r5, #520] @ 0x208 │ │ ldrbeq r2, [r6, #1848] @ 0x738 │ │ ldrbeq r2, [r6, #1253] @ 0x4e5 │ │ - ldc2l 3, cr2, [r4, #880] @ 0x370 │ │ + ldc2l 4, cr2, [r4, #36] @ 0x24 │ │ ldrble sp, [r4], #1236 @ 0x4d4 │ │ │ │ 024d16f8 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8} │ │ @@ -1452986,31 +1452985,31 @@ │ │ vstr d16, [sl] │ │ b 24d1860 │ │ nop {0} │ │ andeq r0, r0, r0 │ │ adcmi r2, ip, r0 │ │ andeq r0, r0, r0 │ │ submi r0, lr, r0 │ │ - ldc2l 6, cr5, [r4, #956] @ 0x3bc │ │ - ldc2l 6, cr5, [r4, #268] @ 0x10c │ │ - ldc2l 6, cr4, [r5, #400] @ 0x190 │ │ - ldc2l 6, cr1, [r5, #468] @ 0x1d4 │ │ - ldc2l 5, cr5, [r4, #1004] @ 0x3ec │ │ - ldc2l 14, cr5, [r7, #448] @ 0x1c0 │ │ - ldc2l 5, cr5, [r4, #540] @ 0x21c │ │ - ldc2l 15, cr9, [r6, #408] @ 0x198 │ │ - ldc2l 15, cr9, [r6, #556] @ 0x22c │ │ + ldc2l 7, cr5, [r4, #112] @ 0x70 │ │ + ldc2l 6, cr5, [r4, #448] @ 0x1c0 │ │ + ldc2l 6, cr4, [r5, #580] @ 0x244 │ │ + ldc2l 6, cr1, [r5, #648] @ 0x288 │ │ + ldc2l 6, cr5, [r4, #160] @ 0xa0 │ │ + ldc2l 14, cr5, [r7, #628] @ 0x274 │ │ + ldc2l 5, cr5, [r4, #720] @ 0x2d0 │ │ + ldc2l 15, cr9, [r6, #588] @ 0x24c │ │ + ldc2l 15, cr9, [r6, #736] @ 0x2e0 │ │ ldc2l 2, cr13, [r7, #952] @ 0x3b8 │ │ - ldc2l 6, cr0, [r5, #132] @ 0x84 │ │ - ldc2l 5, cr0, [r5, #548] @ 0x224 │ │ - ldc2l 14, cr9, [r6, #344] @ 0x158 │ │ - ldc2l 14, cr9, [r6, #220] @ 0xdc │ │ + ldc2l 6, cr0, [r5, #312] @ 0x138 │ │ + ldc2l 5, cr0, [r5, #728] @ 0x2d8 │ │ + ldc2l 14, cr9, [r6, #524] @ 0x20c │ │ + ldc2l 14, cr9, [r6, #400] @ 0x190 │ │ eoreq r8, r8, r4, lsl #24 │ │ - ldc2l 0, cr6, [r6, #588] @ 0x24c │ │ - ldc2l 5, cr1, [r5, #500] @ 0x1f4 │ │ + ldc2l 0, cr6, [r6, #768] @ 0x300 │ │ + ldc2l 5, cr1, [r5, #680] @ 0x2a8 │ │ │ │ 024d1c04 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #52 @ 0x34 │ │ str r2, [sp, #40] @ 0x28 │ │ str r1, [sp, #32] │ │ @@ -1453968,15 +1453967,15 @@ │ │ cmp r0, #300 @ 0x12c │ │ bhi 24d2cf4 │ │ mov r1, r6 │ │ ldr r5, [fp, #-36] @ 0xffffffdc │ │ ldr r8, [fp, #20] │ │ b 24d2d4c │ │ ldrbeq r1, [r6, #3116] @ 0xc2c │ │ - ldc2l 1, cr5, [r4, #732] @ 0x2dc │ │ + ldc2l 1, cr5, [r4, #912] @ 0x390 │ │ ldr r0, [pc, #3732] @ 24d39b0 │ │ mov r3, #6 │ │ ldr r1, [pc, #3728] @ 24d39b4 │ │ ldr r2, [pc, #3728] @ 24d39b8 │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ add r2, pc, r2 │ │ @@ -1454065,37 +1454064,37 @@ │ │ eoreq r8, r8, r0, lsr sl │ │ ldrbeq r3, [r6, #2032] @ 0x7f0 │ │ ldrbeq r1, [r6, #3000] @ 0xbb8 │ │ ldrbeq r2, [r6, #2500] @ 0x9c4 │ │ ldrbeq r3, [r6, #1964] @ 0x7ac │ │ ldrbeq r3, [r6, #1944] @ 0x798 │ │ ldrbeq r3, [r6, #1932] @ 0x78c │ │ - ldc2l 0, cr8, [r5, #732] @ 0x2dc │ │ - ldc2l 11, cr9, [r7, #916] @ 0x394 @ │ │ - ldc2l 2, cr7, [r7, #804] @ 0x324 │ │ - ldc2l 11, cr3, [r6, #340] @ 0x154 @ │ │ + ldc2l 0, cr8, [r5, #912] @ 0x390 │ │ + ldc2l 12, cr9, [r7, #72] @ 0x48 │ │ + ldc2l 2, cr7, [r7, #984] @ 0x3d8 │ │ + ldc2l 11, cr3, [r6, #520] @ 0x208 @ │ │ ldrbeq r3, [r6, #1860] @ 0x744 │ │ - ldc2l 11, cr9, [r7, #548] @ 0x224 @ │ │ + ldc2l 11, cr9, [r7, #728] @ 0x2d8 @ │ │ ldrbeq r3, [r6, #1816] @ 0x718 │ │ - ldc2l 10, cr15, [r5, #828] @ 0x33c @ │ │ - ldc2l 11, cr9, [r7, #324] @ 0x144 @ │ │ + ldc2l 10, cr15, [r5, #1008] @ 0x3f0 @ │ │ + ldc2l 11, cr9, [r7, #504] @ 0x1f8 @ │ │ ldrbeq r3, [r6, #1764] @ 0x6e4 │ │ ldrbeq r3, [r6, #1744] @ 0x6d0 │ │ - ldc2l 2, cr7, [r7, #212] @ 0xd4 │ │ - ldc2l 10, cr3, [r6, #772] @ 0x304 @ │ │ + ldc2l 2, cr7, [r7, #392] @ 0x188 │ │ + ldc2l 10, cr3, [r6, #952] @ 0x3b8 @ │ │ ldrbeq r3, [r6, #1712] @ 0x6b0 │ │ - ldc2l 10, cr9, [r7, #980] @ 0x3d4 @ │ │ - ldc2l 9, cr15, [r6, #196] @ 0xc4 @ │ │ - ldc2l 10, cr15, [r5, #280] @ 0x118 @ │ │ + ldc2l 11, cr9, [r7, #136] @ 0x88 @ │ │ + ldc2l 9, cr15, [r6, #286] @ 0x11e @ │ │ + ldc2l 10, cr15, [r5, #460] @ 0x1cc @ │ │ ldrbeq r3, [r6, #1628] @ 0x65c │ │ - ldc2l 11, cr5, [r6, #872] @ 0x368 @ │ │ - ldc2l 4, cr6, [r4, #296] @ 0x128 │ │ + ldc2l 12, cr5, [r6, #28] │ │ + ldc2l 4, cr6, [r4, #476] @ 0x1dc │ │ ldc2l 11, cr14, [r7, #724] @ 0x2d4 @ │ │ - ldc2l 11, cr11, [r5, #360] @ 0x168 @ │ │ - ldc2l 13, cr9, [r4, #360] @ 0x168 │ │ + ldc2l 11, cr11, [r5, #540] @ 0x21c @ │ │ + ldc2l 13, cr9, [r4, #540] @ 0x21c │ │ ldrbeq r3, [r6, #1512] @ 0x5e8 │ │ ldr r0, [pc, #3992] @ 24d3c94 │ │ mov r1, r6 │ │ ldr r2, [pc, #3988] @ 24d3c98 │ │ movw r3, #1170 @ 0x492 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1454210,21 +1454209,21 @@ │ │ str r9, [sp] │ │ mov r2, r5 │ │ bl 270e230 │ │ ldr r1, [pc, #3596] @ 24d3cdc │ │ str r9, [sp] │ │ add r1, pc, r1 │ │ b 24d2320 │ │ - ldc2l 9, cr9, [r6, #184] @ 0xb8 @ │ │ - ldc2l 13, cr9, [r4, #120] @ 0x78 │ │ + ldc2l 9, cr9, [r6, #274] @ 0x112 @ │ │ + ldc2l 13, cr9, [r4, #300] @ 0x12c │ │ ldrbeq r3, [r6, #1452] @ 0x5ac │ │ - ldc2l 15, cr0, [r5, #684] @ 0x2ac │ │ + ldc2l 15, cr0, [r5, #864] @ 0x360 │ │ ldc2l 12, cr12, [r7, #664] @ 0x298 │ │ - ldc2l 8, cr15, [r6, #356] @ 0x164 │ │ - ldc2l 4, cr1, [r7, #364] @ 0x16c │ │ + vcadd.f32 d31, d22, d6, #270 │ │ + ldc2l 4, cr1, [r7, #544] @ 0x220 │ │ ldrbeq r3, [r6, #1360] @ 0x550 │ │ ldr r5, [pc, #3552] @ 24d3ce0 │ │ mov r1, #12 │ │ add r5, pc, r5 │ │ mov r0, r5 │ │ bl 2710090 │ │ ldr r1, [pc, #3536] @ 24d3ce4 │ │ @@ -1454253,32 +1454252,32 @@ │ │ add r0, pc, r0 │ │ add r1, pc, r1 │ │ str r4, [sp] │ │ add r2, pc, r2 │ │ bl 2710050 │ │ ldr r6, [fp, #48] @ 0x30 │ │ b 24d302c │ │ - ldc2l 14, cr4, [r4, #348] @ 0x15c │ │ + ldc2l 14, cr4, [r4, #528] @ 0x210 │ │ ldrbeq r1, [r6, #2152] @ 0x868 │ │ ldrbeq r1, [r6, #2128] @ 0x850 │ │ - ldc2l 12, cr1, [r6, #972] @ 0x3cc │ │ + ldc2l 13, cr1, [r6, #128] @ 0x80 │ │ ldc2l 11, cr12, [r7, #688] @ 0x2b0 @ │ │ ldrbeq r3, [r6, #1156] @ 0x484 │ │ ldrbeq r3, [r6, #1120] @ 0x460 │ │ ldrbeq r3, [r6, #1080] @ 0x438 │ │ ldrbeq r1, [r6, #2044] @ 0x7fc │ │ - ldc2l 13, cr4, [r4, #252] @ 0xfc │ │ + ldc2l 13, cr4, [r4, #432] @ 0x1b0 │ │ ldc2l 9, cr14, [r7, #42] @ 0x2a @ │ │ - ldc2l 14, cr2, [r5, #160] @ 0xa0 │ │ + ldc2l 14, cr2, [r5, #340] @ 0x154 │ │ ldrbeq r1, [r6, #1860] @ 0x744 │ │ ldrbeq r1, [r6, #1860] @ 0x744 │ │ ldrbeq r1, [r6, #1812] @ 0x714 │ │ ldrbeq r1, [r6, #1800] @ 0x708 │ │ - ldc2l 15, cr7, [r4, #80] @ 0x50 │ │ - ldc2l 10, cr11, [r4, #472] @ 0x1d8 @ │ │ + ldc2l 15, cr7, [r4, #260] @ 0x104 │ │ + ldc2l 10, cr11, [r4, #652] @ 0x28c @ │ │ ldrbeq r3, [r6, #824] @ 0x338 │ │ ldr r0, [pc, #3364] @ 24d3cfc │ │ mov r2, #5 │ │ ldr r1, [pc, #3360] @ 24d3d00 │ │ mov r3, #1 │ │ add r0, pc, r0 │ │ ldr r1, [pc, r1] │ │ @@ -1454379,51 +1454378,51 @@ │ │ add r1, pc, r1 │ │ bl 270d970 │ │ ldr r1, [fp, #20] │ │ mov r0, #0 │ │ str r0, [r1] │ │ b 24d2330 │ │ ldc2l 10, cr12, [r7, #280] @ 0x118 @ │ │ - ldc2l 10, cr9, [r4, #488] @ 0x1e8 @ │ │ - ldc2l 7, cr2, [r4, #892] @ 0x37c │ │ - ldc2l 10, cr9, [r4, #312] @ 0x138 @ │ │ + ldc2l 10, cr9, [r4, #668] @ 0x29c @ │ │ + vcadd.f32 d18, d4, d12, #270 │ │ + ldc2l 10, cr9, [r4, #492] @ 0x1ec @ │ │ ldrbeq r3, [r6, #728] @ 0x2d8 │ │ - ldc2l 9, cr13, [r5, #250] @ 0xfa @ │ │ - ldc2l 10, cr9, [r4, #152] @ 0x98 @ │ │ + ldc2l 9, cr13, [r5, #340] @ 0x154 @ │ │ + ldc2l 10, cr9, [r4, #332] @ 0x14c @ │ │ ldrbeq r3, [r6, #688] @ 0x2b0 │ │ - ldc2l 13, cr2, [r7, #600] @ 0x258 │ │ - ldc2l 2, cr1, [r6, #792] @ 0x318 │ │ - ldc2l 13, cr9, [r5, #72] @ 0x48 │ │ + ldc2l 13, cr2, [r7, #780] @ 0x30c │ │ + ldc2l 2, cr1, [r6, #972] @ 0x3cc │ │ + ldc2l 13, cr9, [r5, #252] @ 0xfc │ │ eoreq r8, r8, r8, lsr #8 │ │ - ldc2l 11, cr4, [r4, #236] @ 0xec @ │ │ - ldc2l 1, cr5, [r4, #76] @ 0x4c │ │ + ldc2l 11, cr4, [r4, #416] @ 0x1a0 @ │ │ + ldc2l 1, cr5, [r4, #256] @ 0x100 │ │ eoreq r8, r8, r4, ror #7 │ │ ldrbeq r3, [r6, #432] @ 0x1b0 │ │ - ldc2l 13, cr8, [r7, #680] @ 0x2a8 │ │ + ldc2l 13, cr8, [r7, #860] @ 0x35c │ │ ldrbeq r1, [r6, #1284] @ 0x504 │ │ - ldc2l 4, cr15, [r6, #212] @ 0xd4 │ │ - ldc2l 7, cr5, [r6, #240] @ 0xf0 │ │ + ldc2l 4, cr15, [r6, #392] @ 0x188 │ │ + ldc2l 7, cr5, [r6, #420] @ 0x1a4 │ │ ldrbeq r3, [r6, #296] @ 0x128 │ │ - ldc2l 5, cr2, [r4, #1020] @ 0x3fc │ │ - ldc2l 13, cr8, [r7, #104] @ 0x68 │ │ - ldc2l 5, cr2, [r4, #828] @ 0x33c │ │ + ldc2l 6, cr2, [r4, #176] @ 0xb0 │ │ + ldc2l 13, cr8, [r7, #284] @ 0x11c │ │ + ldc2l 5, cr2, [r4, #1008] @ 0x3f0 │ │ ldrbeq r3, [r6, #208] @ 0xd0 │ │ ldrbeq r1, [r6, #1116] @ 0x45c │ │ - ldc2l 10, cr13, [r4, #964] @ 0x3c4 @ │ │ - ldc2l 9, cr3, [r4, #350] @ 0x15e @ │ │ + ldc2l 11, cr13, [r4, #120] @ 0x78 @ │ │ + ldc2l 9, cr3, [r4, #440] @ 0x1b8 @ │ │ ldrbeq r3, [r6, #124] @ 0x7c │ │ - ldc2l 9, cr1, [r5, #390] @ 0x186 @ │ │ - ldc2l 10, cr3, [r5, #444] @ 0x1bc @ │ │ + ldc2l 9, cr1, [r5, #480] @ 0x1e0 @ │ │ + ldc2l 10, cr3, [r5, #624] @ 0x270 @ │ │ ldrbeq r3, [r6, #80] @ 0x50 │ │ ldc2l 5, cr14, [r7, #864] @ 0x360 │ │ - ldc2l 7, cr11, [r4, #408] @ 0x198 │ │ - ldc2l 0, cr1, [r6, #728] @ 0x2d8 │ │ - ldc2l 6, cr11, [r6, #928] @ 0x3a0 │ │ - ldc2l 2, cr15, [r6, #900] @ 0x384 │ │ - ldc2l 14, cr0, [r7, #892] @ 0x37c │ │ + ldc2l 7, cr11, [r4, #588] @ 0x24c │ │ + ldc2l 0, cr1, [r6, #908] @ 0x38c │ │ + ldc2l 7, cr11, [r6, #84] @ 0x54 │ │ + ldc2l 3, cr15, [r6, #56] @ 0x38 │ │ + ldc2l 15, cr0, [r7, #48] @ 0x30 │ │ ldr r0, [pc, #2864] @ 24d3d48 │ │ ldr r0, [pc, r0] │ │ ldr r5, [pc, #2860] @ 24d3d4c │ │ cmp r0, #0 │ │ add r5, pc, r5 │ │ beq 24d303c │ │ ldr sl, [pc, #2848] @ 24d3d50 │ │ @@ -1454597,46 +1454596,46 @@ │ │ ldr r1, [pc, #3660] @ 24d431c │ │ str r2, [sp, #8] │ │ add r2, r8, r0 │ │ add r1, pc, r1 │ │ str r7, [sp] │ │ str r6, [sp, #4] │ │ b 24d394c │ │ - ldc2l 12, cr8, [r7] │ │ - ldc2l 5, cr11, [r5, #120] @ 0x78 │ │ + ldc2l 12, cr8, [r7, #180] @ 0xb4 │ │ + ldc2l 5, cr11, [r5, #300] @ 0x12c │ │ sub r5, r0, #1 │ │ cmp r0, #300 @ 0x12c │ │ bhi 24d3568 │ │ mov r1, r5 │ │ ldr r6, [fp, #44] @ 0x2c │ │ ldr sl, [fp, #-36] @ 0xffffffdc │ │ ldr r8, [fp, #20] │ │ ldr r4, [fp, #36] @ 0x24 │ │ b 24d35c8 │ │ - ldc2l 10, cr15, [r4, #16] @ │ │ + ldc2l 10, cr15, [r4, #196] @ 0xc4 @ │ │ ldrbeq r1, [r6, #764] @ 0x2fc │ │ ldrbeq r1, [r6, #776] @ 0x308 │ │ ldrbeq r2, [r6, #3908] @ 0xf44 │ │ - ldc2l 2, cr6, [r7, #948] @ 0x3b4 │ │ + ldc2l 3, cr6, [r7, #104] @ 0x68 │ │ ldrbeq r2, [r6, #3876] @ 0xf24 │ │ - ldc2l 3, cr3, [r6, #228] @ 0xe4 │ │ + ldc2l 3, cr3, [r6, #408] @ 0x198 │ │ ldrbeq r2, [r6, #3840] @ 0xf00 │ │ - ldc2l 6, cr5, [r7, #896] @ 0x380 │ │ + ldc2l 7, cr5, [r7, #52] @ 0x34 │ │ ldrbeq r2, [r6, #3792] @ 0xed0 │ │ - ldc2l 9, cr2, [r5, #192] @ 0xc0 @ │ │ + ldc2l 9, cr2, [r5, #282] @ 0x11a @ │ │ ldrbeq r2, [r6, #3756] @ 0xeac │ │ ldrbeq r2, [r6, #3740] @ 0xe9c │ │ ldrbeq r2, [r6, #3740] @ 0xe9c │ │ ldrbeq r2, [r6, #3720] @ 0xe88 │ │ - ldc2l 4, cr5, [r6, #84] @ 0x54 │ │ - ldc2l 0, cr5, [r7, #188] @ 0xbc │ │ + ldc2l 4, cr5, [r6, #264] @ 0x108 │ │ + ldc2l 0, cr5, [r7, #368] @ 0x170 │ │ ldrbeq r1, [r6, #476] @ 0x1dc │ │ - ldc2l 15, cr4, [r7, #924] @ 0x39c │ │ + ldc2l 0, cr5, [r7, #80] @ 0x50 │ │ ldrbeq r1, [r6, #408] @ 0x198 │ │ - vcadd.f32 q9, , , #270 │ │ + ldc2l 8, cr2, [r7, #968] @ 0x3c8 │ │ ldrbeq r1, [r6, #308] @ 0x134 │ │ ldr r0, [pc, #3324] @ 24d426c │ │ mov r1, r5 │ │ ldr r2, [pc, #3320] @ 24d4270 │ │ movw r3, #1268 @ 0x4f4 │ │ add r0, pc, r0 │ │ add r2, pc, r2 │ │ @@ -1454735,33 +1454734,33 @@ │ │ str r6, [sp] │ │ bl 270e230 │ │ ldr r1, [pc, #2988] @ 24d42ac │ │ add r4, r4, r7, lsl #2 │ │ add r1, pc, r1 │ │ b 24d22d8 │ │ ldrbeq r1, [r6, #308] @ 0x134 │ │ - ldc2l 6, cr4, [r4, #780] @ 0x30c │ │ - ldc2l 2, cr5, [r6, #848] @ 0x350 │ │ - ldc2l 5, cr0, [r5, #416] @ 0x1a0 │ │ - ldc2l 2, cr5, [r6, #660] @ 0x294 │ │ + ldc2l 6, cr4, [r4, #960] @ 0x3c0 │ │ + ldc2l 3, cr5, [r6, #4] │ │ + ldc2l 5, cr0, [r5, #596] @ 0x254 │ │ + ldc2l 2, cr5, [r6, #840] @ 0x348 │ │ ldrbeq r2, [r6, #3336] @ 0xd08 │ │ - ldc2l 2, cr5, [r6, #500] @ 0x1f4 │ │ - ldc2l 2, cr5, [r6, #452] @ 0x1c4 │ │ + ldc2l 2, cr5, [r6, #680] @ 0x2a8 │ │ + ldc2l 2, cr5, [r6, #632] @ 0x278 │ │ ldrbeq r2, [r6, #3244] @ 0xcac │ │ ldrbeq r1, [r6, #3720] @ 0xe88 │ │ ldrbeq r2, [r6, #3212] @ 0xc8c │ │ - ldc2l 12, cr0, [r6, #908] @ 0x38c │ │ - ldc2l 7, cr9, [r5, #152] @ 0x98 │ │ + ldc2l 13, cr0, [r6, #64] @ 0x40 │ │ + ldc2l 7, cr9, [r5, #332] @ 0x14c │ │ eoreq r7, r8, ip, lsr lr │ │ - ldc2l 5, cr4, [r4, #284] @ 0x11c │ │ - ldc2l 11, cr4, [r4, #172] @ 0xac @ │ │ + ldc2l 5, cr4, [r4, #464] @ 0x1d0 │ │ + ldc2l 11, cr4, [r4, #352] @ 0x160 @ │ │ strdeq r7, [r8], -r8 @ │ │ ldrbeq r2, [r6, #3012] @ 0xbc4 │ │ - ldc2l 4, cr4, [r4, #924] @ 0x39c │ │ - ldc2l 10, cr4, [r4, #812] @ 0x32c @ │ │ + ldc2l 5, cr4, [r4, #80] @ 0x50 │ │ + ldc2l 10, cr4, [r4, #992] @ 0x3e0 @ │ │ mlaeq r8, ip, sp, r7 │ │ ldrbeq r2, [r6, #2920] @ 0xb68 │ │ ldr r0, [pc, #3000] @ 24d4320 │ │ mov r3, #1 │ │ ldr r4, [pc, #2996] @ 24d4324 │ │ ldr sl, [pc, #2996] @ 24d4328 │ │ add r0, pc, r0 │ │ @@ -1454887,45 +1454886,45 @@ │ │ mov r0, r4 │ │ mov r3, r4 │ │ bl 270e000 │ │ ldr r0, [fp, #24] │ │ mov r1, sl │ │ b 24d2c68 │ │ ldrbeq r2, [r6, #2860] @ 0xb2c │ │ - ldc2l 14, cr8, [r6, #792] @ 0x318 │ │ - ldc2l 14, cr8, [r6, #796] @ 0x31c │ │ + ldc2l 14, cr8, [r6, #972] @ 0x3cc │ │ + ldc2l 14, cr8, [r6, #976] @ 0x3d0 │ │ ldrbeq r2, [r6, #2800] @ 0xaf0 │ │ - ldc2l 0, cr11, [r5, #340] @ 0x154 │ │ - ldc2l 5, cr15, [r4, #360] @ 0x168 │ │ - ldc2l 4, cr4, [r4, #60] @ 0x3c │ │ + ldc2l 0, cr11, [r5, #520] @ 0x208 │ │ + ldc2l 5, cr15, [r4, #540] @ 0x21c │ │ + ldc2l 4, cr4, [r4, #240] @ 0xf0 │ │ ldrbeq r2, [r6, #2716] @ 0xa9c │ │ eoreq r7, r8, r4, asr #25 │ │ eoreq r7, r8, ip, ror #24 │ │ - ldc2l 2, cr5, [r7, #316] @ 0x13c │ │ - ldc2l 15, cr4, [r6, #932] @ 0x3a4 │ │ + ldc2l 2, cr5, [r7, #496] @ 0x1f0 │ │ + ldc2l 0, cr5, [r6, #88] @ 0x58 │ │ eoreq r7, r8, r0, lsr ip │ │ ldrbeq r2, [r6, #2588] @ 0xa1c │ │ ldrbeq r2, [r6, #2544] @ 0x9f0 │ │ ldrbeq r0, [r6, #3512] @ 0xdb8 │ │ ldrbeq r2, [r6, #2536] @ 0x9e8 │ │ ldrbeq r2, [r6, #2532] @ 0x9e4 │ │ - ldc2l 12, cr14, [r6, #592] @ 0x250 │ │ + ldc2l 12, cr14, [r6, #772] @ 0x304 │ │ ldrbeq r0, [r6, #3368] @ 0xd28 │ │ ldrbeq r1, [r6, #2908] @ 0xb5c │ │ - ldc2l 2, cr4, [r4, #716] @ 0x2cc │ │ - ldc2l 8, cr14, [r4, #592] @ 0x250 │ │ + ldc2l 2, cr4, [r4, #896] @ 0x380 │ │ + vcadd.f32 q15, q10, , #270 │ │ ldrbeq r1, [r6, #2788] @ 0xae4 │ │ - ldc2l 11, cr8, [r5, #528] @ 0x210 @ │ │ + ldc2l 11, cr8, [r5, #708] @ 0x2c4 @ │ │ ldrbeq r0, [r6, #3192] @ 0xc78 │ │ - ldc2l 3, cr9, [r5, #880] @ 0x370 │ │ + ldc2l 4, cr9, [r5, #36] @ 0x24 │ │ ldrbeq r2, [r6, #2256] @ 0x8d0 │ │ ldrbeq r0, [r6, #3136] @ 0xc40 │ │ ldrbeq r1, [r6, #2664] @ 0xa68 │ │ - ldc2l 2, cr0, [r5, #532] @ 0x214 │ │ - ldc2l 9, cr14, [r4, #244] @ 0xf4 @ │ │ + ldc2l 2, cr0, [r5, #712] @ 0x2c8 │ │ + ldc2l 9, cr14, [r4, #334] @ 0x14e @ │ │ ldr r0, [pc, #2460] @ 24d438c │ │ mov r1, #1 │ │ mov r9, r4 │ │ add r0, pc, r0 │ │ bl 2710070 │ │ cmp r0, #0 │ │ beq 24d3d54 │ │ @@ -1455089,59 +1455088,59 @@ │ │ str r4, [sp, #12] │ │ bl 270e000 │ │ ldr r1, [pc, #1908] @ 24d43fc │ │ ldr r0, [fp, #24] │ │ add r1, pc, r1 │ │ ldr r2, [fp, #44] @ 0x2c │ │ b 24d1fd8 │ │ - ldc2l 0, cr0, [r5, #48] @ 0x30 │ │ - ldc2l 13, cr4, [r6, #292] @ 0x124 │ │ + ldc2l 0, cr0, [r5, #228] @ 0xe4 │ │ + ldc2l 13, cr4, [r6, #472] @ 0x1d8 │ │ ldrbeq r2, [r6, #1964] @ 0x7ac │ │ - ldc2l 13, cr4, [r6, #116] @ 0x74 │ │ - ldc2l 13, cr4, [r6, #68] @ 0x44 │ │ + ldc2l 13, cr4, [r6, #296] @ 0x128 │ │ + ldc2l 13, cr4, [r6, #248] @ 0xf8 │ │ ldrbeq r2, [r6, #1868] @ 0x74c │ │ ldrbeq r1, [r6, #2344] @ 0x928 │ │ ldrbeq r2, [r6, #1836] @ 0x72c │ │ - ldc2l 7, cr0, [r6, #492] @ 0x1ec │ │ - ldc2l 1, cr9, [r5, #792] @ 0x318 │ │ + ldc2l 7, cr0, [r6, #672] @ 0x2a0 │ │ + ldc2l 1, cr9, [r5, #972] @ 0x3cc │ │ ldrdeq r7, [r8], -ip @ │ │ - ldc2l 15, cr3, [r4, #908] @ 0x38c │ │ - ldc2l 5, cr4, [r4, #796] @ 0x31c │ │ + ldc2l 0, cr4, [r4, #64] @ 0x40 │ │ + ldc2l 5, cr4, [r4, #976] @ 0x3d0 │ │ mlaeq r8, r8, r8, r7 │ │ ldrbeq r2, [r6, #1628] @ 0x65c │ │ - ldc2l 15, cr3, [r4, #492] @ 0x1ec │ │ - ldc2l 5, cr4, [r4, #380] @ 0x17c │ │ + ldc2l 15, cr3, [r4, #672] @ 0x2a0 │ │ + ldc2l 5, cr4, [r4, #560] @ 0x230 │ │ eoreq r7, r8, r0, lsr r8 │ │ ldrbeq r2, [r6, #1532] @ 0x5fc │ │ ldrbeq r2, [r6, #1468] @ 0x5bc │ │ ldrbeq r2, [r6, #1440] @ 0x5a0 │ │ ldrbeq r0, [r6, #2348] @ 0x92c │ │ - ldc2l 0, cr9, [r5, #980] @ 0x3d4 │ │ + ldc2l 1, cr9, [r5, #136] @ 0x88 │ │ ldrbeq r2, [r6, #1364] @ 0x554 │ │ - ldc2l 4, cr1, [r7, #796] @ 0x31c │ │ + ldc2l 4, cr1, [r7, #976] @ 0x3d0 │ │ ldrbeq r2, [r6, #1344] @ 0x540 │ │ - ldc2l 0, cr9, [r5, #308] @ 0x134 │ │ + ldc2l 0, cr9, [r5, #488] @ 0x1e8 │ │ ldrbeq r0, [r6, #2172] @ 0x87c │ │ - ldc2l 4, cr1, [r7, #140] @ 0x8c │ │ + ldc2l 4, cr1, [r7, #320] @ 0x140 │ │ ldrbeq r2, [r6, #1184] @ 0x4a0 │ │ ldrbeq r0, [r6, #2120] @ 0x848 │ │ ldrbeq r2, [r6, #1148] @ 0x47c │ │ - ldc2l 3, cr1, [r7, #908] @ 0x38c │ │ + ldc2l 4, cr1, [r7, #64] @ 0x40 │ │ ldrbeq r0, [r6, #2044] @ 0x7fc │ │ ldrbeq r1, [r6, #1584] @ 0x630 │ │ - ldc2l 3, cr14, [r4, #640] @ 0x280 │ │ + ldc2l 3, cr14, [r4, #820] @ 0x334 │ │ ldrbeq r1, [r6, #1520] @ 0x5f0 │ │ - ldc2l 6, cr8, [r5, #576] @ 0x240 │ │ - ldc2l 9, cr6, [r6, #508] @ 0x1fc @ │ │ + ldc2l 6, cr8, [r5, #756] @ 0x2f4 │ │ + ldc2l 10, cr6, [r6, #172] @ 0xac @ │ │ ldrbeq r2, [r6, #992] @ 0x3e0 │ │ - ldc2l 4, cr14, [r4, #792] @ 0x318 │ │ - ldc2l 13, cr15, [r4, #644] @ 0x284 │ │ + ldc2l 4, cr14, [r4, #972] @ 0x3cc │ │ + ldc2l 13, cr15, [r4, #824] @ 0x338 │ │ ldrbeq r0, [r6, #1836] @ 0x72c │ │ ldrbeq r1, [r6, #1368] @ 0x558 │ │ - ldc2l 12, cr3, [r4, #684] @ 0x2ac │ │ + ldc2l 12, cr3, [r4, #864] @ 0x360 │ │ ldrbeq r2, [r6, #668] @ 0x29c │ │ ldrbeq r2, [r6, #656] @ 0x290 │ │ ldrbeq r0, [r6, #1584] @ 0x630 │ │ ldr r0, [pc, #1700] @ 24d4400 │ │ mov r4, #7 │ │ ldr r1, [pc, #1696] @ 24d4404 │ │ mov r3, #7 │ │ @@ -1455459,188 +1455458,188 @@ │ │ mov r2, r6 │ │ str r5, [sp] │ │ add r1, pc, r1 │ │ b 24d2328 │ │ ldrbeq r2, [r6, #612] @ 0x264 │ │ ldrbeq r2, [r6, #592] @ 0x250 │ │ ldrbeq r2, [r6, #592] @ 0x250 │ │ - ldc2l 14, cr6, [r4, #48] @ 0x30 │ │ - ldc2l 7, cr4, [r6, #836] @ 0x344 │ │ + ldc2l 14, cr6, [r4, #228] @ 0xe4 │ │ + ldc2l 7, cr4, [r6, #1016] @ 0x3f8 │ │ ldrbeq r0, [r6, #1464] @ 0x5b8 │ │ ldrbeq r2, [r6, #504] @ 0x1f8 │ │ - ldc2l 7, cr15, [r4, #608] @ 0x260 │ │ - ldc2l 4, cr4, [r6, #852] @ 0x354 │ │ + ldc2l 7, cr15, [r4, #788] @ 0x314 │ │ + ldc2l 5, cr4, [r6, #8] │ │ ldrbeq r1, [r6, #3892] @ 0xf34 │ │ - ldc2l 4, cr4, [r6, #644] @ 0x284 │ │ - ldc2l 4, cr4, [r6, #596] @ 0x254 │ │ + ldc2l 4, cr4, [r6, #824] @ 0x338 │ │ + ldc2l 4, cr4, [r6, #776] @ 0x308 │ │ ldrbeq r1, [r6, #3784] @ 0xec8 │ │ ldrbeq r1, [r6, #168] @ 0xa8 │ │ ldrbeq r0, [r6, #648] @ 0x288 │ │ ldrbeq r1, [r6, #3752] @ 0xea8 │ │ - ldc2l 14, cr15, [r5, #1020] @ 0x3fc │ │ - ldc2l 9, cr8, [r5, #140] @ 0x8c @ │ │ + ldc2l 15, cr15, [r5, #176] @ 0xb0 │ │ + ldc2l 9, cr8, [r5, #230] @ 0xe6 @ │ │ eoreq r7, r8, ip, asr r0 │ │ - ldc2l 7, cr3, [r4, #396] @ 0x18c │ │ - ldc2l 13, cr3, [r4, #284] @ 0x11c │ │ + ldc2l 7, cr3, [r4, #576] @ 0x240 │ │ + ldc2l 13, cr3, [r4, #464] @ 0x1d0 │ │ eoreq r7, r8, r4, lsl r0 │ │ ldrbeq r1, [r6, #3552] @ 0xde0 │ │ - ldc2l 7, cr3, [r4, #44] @ 0x2c │ │ + ldc2l 7, cr3, [r4, #224] @ 0xe0 │ │ ldrbeq r0, [r6, #1404] @ 0x57c │ │ - ldc2l 12, cr14, [r4, #160] @ 0xa0 │ │ + ldc2l 12, cr14, [r4, #340] @ 0x154 │ │ ldrbeq r0, [r6, #1356] @ 0x54c │ │ ldrbeq r0, [r6, #1356] @ 0x54c │ │ - ldc2l 12, cr1, [r5, #32] │ │ + ldc2l 12, cr1, [r5, #212] @ 0xd4 │ │ ldrbeq r0, [r6, #1316] @ 0x524 │ │ ldrbeq r0, [r6, #1316] @ 0x524 │ │ - ldc2l 5, cr2, [r6, #420] @ 0x1a4 │ │ + ldc2l 5, cr2, [r6, #600] @ 0x258 │ │ ldrbeq r0, [r6, #1276] @ 0x4fc │ │ ldrbeq r0, [r6, #1276] @ 0x4fc │ │ - ldc2l 4, cr5, [r7, #820] @ 0x334 │ │ + ldc2l 4, cr5, [r7, #1000] @ 0x3e8 │ │ ldrbeq r0, [r6, #1236] @ 0x4d4 │ │ ldrbeq r0, [r6, #1236] @ 0x4d4 │ │ - vcadd.f32 q10, , q12, #270 │ │ + ldc2l 9, cr4, [r7, #42] @ 0x2a @ │ │ ldrbeq r0, [r6, #1196] @ 0x4ac │ │ ldrbeq r0, [r6, #1196] @ 0x4ac │ │ ldrbeq r0, [r6, #1176] @ 0x498 │ │ - ldc2l 10, cr3, [r4, #156] @ 0x9c @ │ │ - ldc2l 0, cr14, [r4, #32] │ │ + ldc2l 10, cr3, [r4, #336] @ 0x150 @ │ │ + ldc2l 0, cr14, [r4, #212] @ 0xd4 │ │ ldrbeq r0, [r6, #1064] @ 0x428 │ │ - ldc2l 2, cr8, [r5, #992] @ 0x3e0 │ │ + ldc2l 3, cr8, [r5, #148] @ 0x94 │ │ ldrbeq r0, [r6, #1008] @ 0x3f0 │ │ - ldc2l 6, cr12, [r5, #992] @ 0x3e0 │ │ + ldc2l 7, cr12, [r5, #148] @ 0x94 │ │ ldrbeq r2, [r6, #68] @ 0x44 │ │ - ldc2l 1, cr14, [r4, #168] @ 0xa8 │ │ + ldc2l 1, cr14, [r4, #348] @ 0x15c │ │ ldrbeq r0, [r6, #928] @ 0x3a0 │ │ ldrbeq r0, [r6, #920] @ 0x398 │ │ - ldc2l 9, cr15, [r4, #474] @ 0x1da @ │ │ - ldc2l 15, cr3, [r5, #668] @ 0x29c │ │ + ldc2l 10, cr15, [r4, #104] @ 0x68 @ │ │ + ldc2l 15, cr3, [r5, #848] @ 0x350 │ │ ldrbeq r0, [r6, #224] @ 0xe0 │ │ ldrbeq r0, [r6, #224] @ 0xe0 │ │ - ldc2l 4, cr5, [r6, #396] @ 0x18c │ │ + ldc2l 4, cr5, [r6, #576] @ 0x240 │ │ ldrbeq r0, [r6, #176] @ 0xb0 │ │ ldrbeq r0, [r6, #176] @ 0xb0 │ │ - ldc2l 5, cr0, [r6, #236] @ 0xec │ │ + ldc2l 5, cr0, [r6, #416] @ 0x1a0 │ │ ldrbeq r0, [r6, #136] @ 0x88 │ │ ldrbeq r0, [r6, #136] @ 0x88 │ │ - ldc2l 5, cr11, [r5, #880] @ 0x370 │ │ + ldc2l 6, cr11, [r5, #36] @ 0x24 │ │ ldrbeq r0, [r6, #96] @ 0x60 │ │ ldrbeq r0, [r6, #96] @ 0x60 │ │ - ldc2l 1, cr8, [r7, #4] │ │ + ldc2l 1, cr8, [r7, #184] @ 0xb8 │ │ ldrbeq r0, [r6, #56] @ 0x38 │ │ ldrbeq r0, [r6, #56] @ 0x38 │ │ ldrbeq r0, [r6, #40] @ 0x28 │ │ - ldc2l 5, cr3, [r4, #732] @ 0x2dc │ │ - ldc2l 11, cr13, [r4, #608] @ 0x260 @ │ │ + ldc2l 5, cr3, [r4, #912] @ 0x390 │ │ + ldc2l 11, cr13, [r4, #788] @ 0x314 @ │ │ ldrbeq pc, [r5, #4024] @ 0xfb8 @ │ │ - ldc2l 14, cr7, [r5, #544] @ 0x220 │ │ + ldc2l 14, cr7, [r5, #724] @ 0x2d4 │ │ ldrbeq pc, [r5, #3968] @ 0xf80 @ │ │ - ldc2l 1, cr4, [r6, #892] @ 0x37c │ │ + ldc2l 2, cr4, [r6, #48] @ 0x30 │ │ ldrbeq r1, [r6, #3028] @ 0xbd4 │ │ - ldc2l 12, cr13, [r4, #744] @ 0x2e8 │ │ + ldc2l 12, cr13, [r4, #924] @ 0x39c │ │ ldrbeq pc, [r5, #3888] @ 0xf30 @ │ │ ldrbeq pc, [r5, #3880] @ 0xf28 @ │ │ - ldc2l 5, cr15, [r4, #500] @ 0x1f4 │ │ - ldc2l 11, cr14, [r4, #280] @ 0x118 @ │ │ - vcadd.f32 q8, , , #270 │ │ - ldc2l 3, cr3, [r4, #876] @ 0x36c │ │ - ldc2l 10, cr14, [r4, #776] @ 0x308 @ │ │ + ldc2l 5, cr15, [r4, #680] @ 0x2a8 │ │ + ldc2l 11, cr14, [r4, #460] @ 0x1cc @ │ │ + ldc2l 9, cr0, [r7, #36] @ 0x24 @ │ │ + ldc2l 4, cr3, [r4, #32] │ │ + ldc2l 10, cr14, [r4, #956] @ 0x3bc @ │ │ ldrbeq pc, [r5, #3564] @ 0xdec @ │ │ ldrbeq pc, [r5, #3568] @ 0xdf0 @ │ │ - vcadd.f32 q8, , , #270 │ │ + vcadd.f32 d16, d23, d14, #270 │ │ ldrbeq r1, [r6, #2588] @ 0xa1c │ │ ldrbeq pc, [r5, #3520] @ 0xdc0 @ │ │ ldrbeq pc, [r5, #3524] @ 0xdc4 @ │ │ ldrbeq pc, [r5, #3484] @ 0xd9c @ │ │ ldrbeq pc, [r5, #3480] @ 0xd98 @ │ │ ldrbeq pc, [r5, #3464] @ 0xd88 @ │ │ ldrbeq pc, [r5, #3460] @ 0xd84 @ │ │ - ldc2l 9, cr13, [r4, #48] @ 0x30 @ │ │ - ldc2l 12, cr7, [r5, #80] @ 0x50 │ │ + ldc2l 9, cr13, [r4, #138] @ 0x8a @ │ │ + ldc2l 12, cr7, [r5, #260] @ 0x104 │ │ ldrbeq pc, [r5, #3344] @ 0xd10 @ │ │ ldrbeq pc, [r5, #3340] @ 0xd0c @ │ │ ldrbeq pc, [r5, #3324] @ 0xcfc @ │ │ ldrbeq pc, [r5, #3320] @ 0xcf8 @ │ │ ldc2l 14, cr12, [r7, #544] @ 0x220 │ │ ldrbeq r1, [r6, #2288] @ 0x8f0 │ │ - ldc2l 9, cr13, [r4, #428] @ 0x1ac @ │ │ + ldc2l 10, cr13, [r4, #12] @ │ │ ldrbeq pc, [r5, #3164] @ 0xc5c @ │ │ ldrbeq pc, [r5, #3160] @ 0xc58 @ │ │ - ldc2l 2, cr15, [r4, #612] @ 0x264 │ │ + ldc2l 2, cr15, [r4, #792] @ 0x318 │ │ ldrbeq pc, [r5, #3100] @ 0xc1c @ │ │ ldrbeq pc, [r5, #3092] @ 0xc14 @ │ │ - ldc2l 1, cr3, [r4, #524] @ 0x20c │ │ - ldc2l 10, cr13, [r6, #348] @ 0x15c @ │ │ - ldc2l 3, cr6, [r4, #136] @ 0x88 │ │ + ldc2l 1, cr3, [r4, #704] @ 0x2c0 │ │ + ldc2l 10, cr13, [r6, #528] @ 0x210 @ │ │ + ldc2l 3, cr6, [r4, #316] @ 0x13c │ │ ldrbeq r1, [r6, #1860] @ 0x744 │ │ - ldc2l 1, cr14, [r4, #636] @ 0x27c │ │ - ldc2l 2, cr6, [r4, #984] @ 0x3d8 │ │ + ldc2l 1, cr14, [r4, #816] @ 0x330 │ │ + ldc2l 3, cr6, [r4, #140] @ 0x8c │ │ ldrbeq r1, [r6, #1816] @ 0x718 │ │ ldc2l 3, cr9, [r7, #376] @ 0x178 │ │ - ldc2l 1, cr12, [r4, #356] @ 0x164 │ │ + ldc2l 1, cr12, [r4, #536] @ 0x218 │ │ ldrbeq r1, [r6, #1768] @ 0x6e8 │ │ - ldc2l 12, cr9, [r5, #232] @ 0xe8 │ │ - ldc2l 1, cr12, [r4, #180] @ 0xb4 │ │ + ldc2l 12, cr9, [r5, #412] @ 0x19c │ │ + ldc2l 1, cr12, [r4, #360] @ 0x168 │ │ ldrbeq r1, [r6, #1724] @ 0x6bc │ │ - ldc2l 5, cr15, [r6, #620] @ 0x26c │ │ - ldc2l 2, cr5, [r7, #52] @ 0x34 │ │ + ldc2l 5, cr15, [r6, #800] @ 0x320 │ │ + ldc2l 2, cr5, [r7, #232] @ 0xe8 │ │ ldrbeq r1, [r6, #1676] @ 0x68c │ │ - ldc2l 15, cr1, [r4, #604] @ 0x25c │ │ - ldc2l 1, cr5, [r7, #900] @ 0x384 │ │ + ldc2l 15, cr1, [r4, #784] @ 0x310 │ │ + ldc2l 2, cr5, [r7, #56] @ 0x38 │ │ ldrbeq r1, [r6, #1632] @ 0x660 │ │ - ldc2l 3, cr15, [r5, #304] @ 0x130 │ │ - ldc2l 13, cr11, [r5, #248] @ 0xf8 │ │ + ldc2l 3, cr15, [r5, #484] @ 0x1e4 │ │ + ldc2l 13, cr11, [r5, #428] @ 0x1ac │ │ ldc2l 13, cr10, [r7, #344] @ 0x158 │ │ ldrbeq r1, [r6, #1580] @ 0x62c │ │ ldrbeq r1, [r6, #1572] @ 0x624 │ │ - ldc2l 4, cr4, [r4, #36] @ 0x24 │ │ - ldc2l 9, cr13, [r5, #426] @ 0x1aa @ │ │ + ldc2l 4, cr4, [r4, #216] @ 0xd8 │ │ + ldc2l 10, cr13, [r5, #8] @ │ │ ldrbeq r1, [r6, #1512] @ 0x5e8 │ │ - ldc2l 12, cr5, [r6, #224] @ 0xe0 │ │ - ldc2l 8, cr3, [r7, #120] @ 0x78 │ │ + ldc2l 12, cr5, [r6, #404] @ 0x194 │ │ + vcadd.f32 , , , #270 │ │ ldrbeq r1, [r6, #1464] @ 0x5b8 │ │ - ldc2l 1, cr6, [r4, #456] @ 0x1c8 │ │ - ldc2l 14, cr15, [r4, #972] @ 0x3cc │ │ + ldc2l 1, cr6, [r4, #636] @ 0x27c │ │ + ldc2l 15, cr15, [r4, #128] @ 0x80 │ │ ldrbeq r1, [r6, #1412] @ 0x584 │ │ - ldc2l 14, cr3, [r5, #700] @ 0x2bc │ │ + ldc2l 14, cr3, [r5, #880] @ 0x370 │ │ ldc2l 12, cr10, [r7, #520] @ 0x208 │ │ ldrbeq r1, [r6, #1364] @ 0x554 │ │ - ldc2l 11, cr5, [r6, #696] @ 0x2b8 @ │ │ - ldc2l 8, cr15, [r3, #348] @ 0x15c │ │ + ldc2l 11, cr5, [r6, #876] @ 0x36c @ │ │ + vcadd.f32 d31, d19, d4, #270 │ │ ldrbeq r1, [r6, #1320] @ 0x528 │ │ - ldc2l 10, cr9, [r5, #528] @ 0x210 @ │ │ - vcadd.f32 d31, d3, d31, #270 │ │ + ldc2l 10, cr9, [r5, #708] @ 0x2c4 @ │ │ + ldc2l 8, cr15, [r3, #368] @ 0x170 │ │ ldrbeq r1, [r6, #1276] @ 0x4fc │ │ - ldc2l 12, cr7, [r4, #304] @ 0x130 │ │ - ldc2l 12, cr7, [r4, #304] @ 0x130 │ │ + ldc2l 12, cr7, [r4, #484] @ 0x1e4 │ │ + ldc2l 12, cr7, [r4, #484] @ 0x1e4 │ │ ldrbeq r1, [r6, #1232] @ 0x4d0 │ │ - ldc2l 14, cr3, [r5, #16] │ │ - ldc2l 3, cr15, [r6, #732] @ 0x2dc │ │ + ldc2l 14, cr3, [r5, #196] @ 0xc4 │ │ + ldc2l 3, cr15, [r6, #912] @ 0x390 │ │ ldrbeq r1, [r6, #1188] @ 0x4a4 │ │ - ldc2l 15, cr0, [r7, #560] @ 0x230 │ │ - ldc2l 10, cr3, [r6, #876] @ 0x36c @ │ │ + ldc2l 15, cr0, [r7, #740] @ 0x2e4 │ │ + ldc2l 11, cr3, [r6, #32] @ │ │ ldrbeq r1, [r6, #1144] @ 0x478 │ │ ldc2l 10, cr12, [r7, #312] @ 0x138 @ │ │ - ldc2l 6, cr3, [r7, #732] @ 0x2dc │ │ + ldc2l 6, cr3, [r7, #912] @ 0x390 │ │ ldrbeq r1, [r6, #1100] @ 0x44c │ │ - ldc2l 15, cr4, [r7, #692] @ 0x2b4 │ │ - ldc2l 13, cr5, [r5, #360] @ 0x168 │ │ + ldc2l 15, cr4, [r7, #872] @ 0x368 │ │ + ldc2l 13, cr5, [r5, #540] @ 0x21c │ │ ldrbeq r1, [r6, #1056] @ 0x420 │ │ - ldc2l 13, cr5, [r5, #216] @ 0xd8 │ │ + ldc2l 13, cr5, [r5, #396] @ 0x18c │ │ ldc2l 0, cr9, [r7, #448] @ 0x1c0 │ │ ldrbeq r1, [r6, #1012] @ 0x3f4 │ │ - ldc2l 12, cr2, [r4, #940] @ 0x3ac │ │ - ldc2l 4, cr15, [r5, #60] @ 0x3c │ │ - ldc2l 14, cr7, [r5, #376] @ 0x178 │ │ + ldc2l 13, cr2, [r4, #96] @ 0x60 │ │ + ldc2l 4, cr15, [r5, #240] @ 0xf0 │ │ + ldc2l 14, cr7, [r5, #556] @ 0x22c │ │ eoreq r6, r8, r4, ror r5 │ │ - ldc2l 12, cr2, [r4, #476] @ 0x1dc │ │ - ldc2l 2, cr3, [r4, #364] @ 0x16c │ │ + ldc2l 12, cr2, [r4, #656] @ 0x290 │ │ + ldc2l 2, cr3, [r4, #544] @ 0x220 │ │ eoreq r6, r8, ip, lsr #10 │ │ ldrbeq r1, [r6, #752] @ 0x2f0 │ │ - ldc2l 12, cr2, [r4, #60] @ 0x3c │ │ - ldc2l 1, cr3, [r4, #956] @ 0x3bc │ │ + ldc2l 12, cr2, [r4, #240] @ 0xf0 │ │ + ldc2l 2, cr3, [r4, #112] @ 0x70 │ │ eoreq r6, r8, r0, asr #9 │ │ ldrbeq r1, [r6, #644] @ 0x284 │ │ │ │ 024d451c : │ │ push {r4, sl, fp, lr} │ │ add fp, sp, #8 │ │ sub sp, sp, #8 │ │ @@ -1455651,15 +1455650,15 @@ │ │ ldr r0, [pc, #20] @ 24d4554 │ │ mov r1, #1 │ │ add r0, pc, r0 │ │ bl 2710060 │ │ mov r0, r4 │ │ sub sp, fp, #8 │ │ pop {r4, sl, fp, pc} │ │ - ldc2l 11, cr10, [r6, #192] @ 0xc0 @ │ │ + ldc2l 11, cr10, [r6, #372] @ 0x174 @ │ │ │ │ 024d4558 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d9} │ │ sub sp, sp, #40 @ 0x28 │ │ @@ -1456575,138 +1456574,138 @@ │ │ ldrbeq r0, [r6, #3912] @ 0xf48 │ │ ldc2l 11, cr13, [r3, #568] @ 0x238 @ │ │ andeq r0, r0, r0 │ │ submi r8, lr, r0 │ │ andeq r0, r0, r0 │ │ submi r8, sp, r0 │ │ ldrbeq r0, [r6, #3820] @ 0xeec │ │ - ldc2l 7, cr2, [r4, #588] @ 0x24c │ │ + ldc2l 7, cr2, [r4, #768] @ 0x300 │ │ ldrbeq r0, [r6, #3796] @ 0xed4 │ │ - ldc2l 2, cr7, [r6, #136] @ 0x88 │ │ + ldc2l 2, cr7, [r6, #316] @ 0x13c │ │ ldrbeq r0, [r6, #3736] @ 0xe98 │ │ ldrbeq r0, [r6, #3576] @ 0xdf8 │ │ eoreq r5, r8, r4, asr #31 │ │ ldrbeq r0, [r6, #3552] @ 0xde0 │ │ ldrbeq r0, [r6, #3496] @ 0xda8 │ │ ldrbeq r0, [r6, #3480] @ 0xd98 │ │ ldrbeq r0, [r6, #3484] @ 0xd9c │ │ - ldc2l 6, cr2, [r4, #572] @ 0x23c │ │ + ldc2l 6, cr2, [r4, #752] @ 0x2f0 │ │ ldrbeq r0, [r6, #3448] @ 0xd78 │ │ ldc2l 3, cr12, [r7, #8] │ │ ldrbeq r0, [r6, #3404] @ 0xd4c │ │ ldc2l 4, cr10, [r7, #24] │ │ - ldc2l 7, cr13, [r4, #180] @ 0xb4 │ │ + ldc2l 7, cr13, [r4, #360] @ 0x168 │ │ ldc2l 3, cr10, [r7, #728] @ 0x2d8 │ │ - ldc2l 5, cr15, [r4, #888] @ 0x378 │ │ - ldc2l 6, cr14, [r4, #356] @ 0x164 │ │ - ldc2l 6, cr1, [r5, #108] @ 0x6c │ │ - ldc2l 5, cr14, [r4, #932] @ 0x3a4 │ │ + ldc2l 6, cr15, [r4, #44] @ 0x2c │ │ + ldc2l 6, cr14, [r4, #536] @ 0x218 │ │ + ldc2l 6, cr1, [r5, #288] @ 0x120 │ │ + ldc2l 6, cr14, [r4, #88] @ 0x58 │ │ eoreq r5, r8, r8, lsl #30 │ │ - ldc2l 6, cr13, [r4, #132] @ 0x84 │ │ + ldc2l 6, cr13, [r4, #312] @ 0x138 │ │ ldrbeq r0, [r6, #2764] @ 0xacc │ │ ldrbeq r0, [r6, #2968] @ 0xb98 │ │ ldrbeq r0, [r6, #2748] @ 0xabc │ │ ldrbeq r0, [r6, #2692] @ 0xa84 │ │ ldrbeq r0, [r6, #2952] @ 0xb88 │ │ ldrbeq r0, [r6, #2936] @ 0xb78 │ │ - ldc2l 9, cr14, [r5, #236] @ 0xec @ │ │ - ldc2l 2, cr14, [r4, #676] @ 0x2a4 │ │ + ldc2l 9, cr14, [r5, #326] @ 0x146 @ │ │ + ldc2l 2, cr14, [r4, #856] @ 0x358 │ │ eoreq r5, r8, r4, asr #23 │ │ ldrbeq r0, [r6, #2200] @ 0x898 │ │ ldrbeq r0, [r6, #2224] @ 0x8b0 │ │ ldc2l 2, cr10, [r7, #664] @ 0x298 │ │ ldrbeq r0, [r6, #2984] @ 0xba8 │ │ ldrbeq r0, [r6, #3192] @ 0xc78 │ │ ldrbeq r0, [r6, #2924] @ 0xb6c │ │ ldrbeq r0, [r6, #3176] @ 0xc68 │ │ ldrbeq r0, [r6, #2964] @ 0xb94 │ │ ldrbeq r0, [r6, #3160] @ 0xc58 │ │ - ldc2l 2, cr7, [r4, #352] @ 0x160 │ │ - ldc2l 4, cr14, [r4, #772] @ 0x304 │ │ + ldc2l 2, cr7, [r4, #532] @ 0x214 │ │ + ldc2l 4, cr14, [r4, #952] @ 0x3b8 │ │ eoreq r5, r8, r0, ror #27 │ │ - ldc2l 10, cr10, [r6, #1016] @ 0x3f8 @ │ │ - ldc2l 0, cr14, [r4, #532] @ 0x214 │ │ + ldc2l 11, cr10, [r6, #172] @ 0xac @ │ │ + ldc2l 0, cr14, [r4, #712] @ 0x2c8 │ │ ldrbeq r0, [r6, #1740] @ 0x6cc │ │ eoreq r5, r8, r8, asr #19 │ │ - ldc2l 10, cr12, [r6, #492] @ 0x1ec @ │ │ + ldc2l 10, cr12, [r6, #672] @ 0x2a0 @ │ │ ldc2l 14, cr11, [r7, #20] │ │ - ldc2l 14, cr12, [r4, #892] @ 0x37c │ │ + ldc2l 15, cr12, [r4, #48] @ 0x30 │ │ ldrbeq r0, [r6, #1172] @ 0x494 │ │ - ldc2l 13, cr0, [r4, #316] @ 0x13c │ │ + ldc2l 13, cr0, [r4, #496] @ 0x1f0 │ │ ldc2l 10, cr11, [r7, #740] @ 0x2e4 @ │ │ - ldc2l 14, cr13, [r4, #36] @ 0x24 │ │ + ldc2l 14, cr13, [r4, #216] @ 0xd8 │ │ mlaeq r8, r0, r6, r5 │ │ strdeq r5, [r8], -r8 @ │ │ ldrbeq r0, [r6, #1036] @ 0x40c │ │ - ldc2l 12, cr0, [r4, #780] @ 0x30c │ │ + ldc2l 12, cr0, [r4, #960] @ 0x3c0 │ │ ldc2l 10, cr11, [r7, #180] @ 0xb4 @ │ │ - ldc2l 13, cr13, [r4, #500] @ 0x1f4 │ │ + ldc2l 13, cr13, [r4, #680] @ 0x2a8 │ │ eoreq r5, r8, r0, lsl #12 │ │ ldrbeq r0, [r6, #940] @ 0x3ac │ │ - ldc2l 6, cr12, [r6, #284] @ 0x11c │ │ + ldc2l 6, cr12, [r6, #464] @ 0x1d0 │ │ ldc2l 9, cr11, [r7, #418] @ 0x1a2 @ │ │ - ldc2l 13, cr13, [r4, #84] @ 0x54 │ │ + ldc2l 13, cr13, [r4, #264] @ 0x108 │ │ eoreq r5, r8, r8, lsr r6 │ │ ldrbeq r0, [r6, #1892] @ 0x764 │ │ ldrbeq r0, [r6, #1920] @ 0x780 │ │ - ldc2l 4, cr12, [r6, #492] @ 0x1ec │ │ + ldc2l 4, cr12, [r6, #672] @ 0x2a0 │ │ vcadd.f32 d27, d7, d5, #270 │ │ ldrbeq r0, [r6, #388] @ 0x184 │ │ ldrbeq r0, [r6, #2612] @ 0xa34 │ │ ldrbeq r0, [r6, #2428] @ 0x97c │ │ - ldc2l 2, cr14, [r4, #996] @ 0x3e4 │ │ + ldc2l 3, cr14, [r4, #152] @ 0x98 │ │ eoreq r5, r8, r0, lsr #24 │ │ ldrbeq r0, [r6, #2324] @ 0x914 │ │ ldrbeq r0, [r6, #2816] @ 0xb00 │ │ - ldc2l 11, cr14, [r3, #268] @ 0x10c @ │ │ - ldc2l 1, cr14, [r4, #996] @ 0x3e4 │ │ + ldc2l 11, cr14, [r3, #448] @ 0x1c0 @ │ │ + ldc2l 2, cr14, [r4, #152] @ 0x98 │ │ eoreq r5, r8, r0, lsr #22 │ │ ldrbeq r0, [r6, #2324] @ 0x914 │ │ ldrbeq r0, [r6, #2560] @ 0xa00 │ │ - ldc2l 1, cr13, [r4, #376] @ 0x178 │ │ + ldc2l 1, cr13, [r4, #556] @ 0x22c │ │ ldrbeq r0, [r6, #1828] @ 0x724 │ │ ldrbeq r0, [r6, #1012] @ 0x3f4 │ │ ldrbeq r0, [r6, #724] @ 0x2d4 │ │ ldrbeq r0, [r6, #964] @ 0x3c4 │ │ ldrbeq r0, [r6, #720] @ 0x2d0 │ │ ldrbeq r0, [r6, #648] @ 0x288 │ │ ldrbeq r0, [r6, #632] @ 0x278 │ │ ldrbeq r0, [r6, #856] @ 0x358 │ │ ldrbeq r0, [r6, #612] @ 0x264 │ │ ldrbeq r0, [r6, #540] @ 0x21c │ │ - ldc2l 5, cr14, [r3, #492] @ 0x1ec │ │ - ldc2l 11, cr13, [r4, #756] @ 0x2f4 @ │ │ + ldc2l 5, cr14, [r3, #672] @ 0x2a0 │ │ + ldc2l 11, cr13, [r4, #936] @ 0x3a8 @ │ │ ldrdeq r5, [r8], -ip @ │ │ ldrbeq r0, [r6, #520] @ 0x208 │ │ ldrbeq r0, [r6, #2444] @ 0x98c │ │ ldrbeq r0, [r6, #2460] @ 0x99c │ │ ldrbeq r0, [r6, #2704] @ 0xa90 │ │ ldrbeq r0, [r6, #1680] @ 0x690 │ │ ldrbeq r0, [r6, #1608] @ 0x648 │ │ ldrbeq r0, [r6, #1588] @ 0x634 │ │ ldrbeq r0, [r6, #1608] @ 0x648 │ │ ldrbeq r0, [r6, #1552] @ 0x610 │ │ - ldc2l 1, cr6, [r7, #876] @ 0x36c │ │ + ldc2l 2, cr6, [r7, #32] │ │ ldrbeq r0, [r6, #1480] @ 0x5c8 │ │ ldrbeq r0, [r6, #1416] @ 0x588 │ │ - ldc2l 12, cr10, [r5, #336] @ 0x150 │ │ + ldc2l 12, cr10, [r5, #516] @ 0x204 │ │ ldc2l 11, cr11, [r7, #916] @ 0x394 @ │ │ - ldc2l 15, cr13, [r4, #212] @ 0xd4 │ │ + ldc2l 15, cr13, [r4, #392] @ 0x188 │ │ eoreq r5, r8, r4, lsr r8 │ │ ldrbeq r0, [r6, #1336] @ 0x538 │ │ - ldc2l 11, cr10, [r5, #944] @ 0x3b0 @ │ │ + ldc2l 12, cr10, [r5, #100] @ 0x64 │ │ ldc2l 11, cr11, [r7, #500] @ 0x1f4 @ │ │ - ldc2l 14, cr13, [r4, #820] @ 0x334 │ │ + ldc2l 14, cr13, [r4, #1000] @ 0x3e8 │ │ ldrdeq r5, [r8], -r4 @ │ │ ldrbeq r0, [r6, #1232] @ 0x4d0 │ │ ldrbeq r0, [r6, #1664] @ 0x680 │ │ - ldc2l 2, cr2, [r4, #572] @ 0x23c │ │ + ldc2l 2, cr2, [r4, #752] @ 0x2f0 │ │ ldc2l 11, cr13, [r3, #472] @ 0x1d8 @ │ │ ldrbeq r0, [r6, #3848] @ 0xf08 │ │ - ldc2l 12, cr5, [r6, #752] @ 0x2f0 │ │ + ldc2l 12, cr5, [r6, #932] @ 0x3a4 │ │ │ │ 024d55ac : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ sub sp, sp, #24 │ │ mov ip, r2 │ │ mov r2, r1 │ │ @@ -1456760,15 +1456759,15 @@ │ │ mov r3, #2 │ │ add r1, pc, r1 │ │ bl 270d970 │ │ mov r0, #0 │ │ pop {fp, pc} │ │ ldrbeq pc, [r5, #3716] @ 0xe84 @ │ │ ldc2l 10, cr12, [r3, #840] @ 0x348 @ │ │ - ldc2l 12, cr4, [r6, #704] @ 0x2c0 │ │ + ldc2l 12, cr4, [r6, #884] @ 0x374 │ │ │ │ 024d568c : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #52 @ 0x34 │ │ mov r6, r1 │ │ ldr r1, [pc, #296] @ 24d57cc │ │ @@ -1456843,15 +1456842,15 @@ │ │ mov r1, r4 │ │ ldr r2, [fp, #20] │ │ mov r3, sl │ │ bl 270d970 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 7, cr1, [r4, #396] @ 0x18c │ │ + ldc2l 7, cr1, [r4, #576] @ 0x240 │ │ │ │ 024d57d0 : │ │ ldr r2, [r1] │ │ cmp r0, #1 │ │ bne 24d581c │ │ cmp r2, #1 │ │ blt 24d5850 │ │ @@ -1456973,17 +1456972,17 @@ │ │ str r0, [r6] │ │ ldr r0, [r5] │ │ ldr r1, [r4] │ │ add r0, r1, r0 │ │ str r0, [r4] │ │ mov r0, #0 │ │ pop {r4, r5, r6, r7, fp, pc} │ │ - ldc2l 6, cr3, [r7, #932] @ 0x3a4 │ │ + ldc2l 7, cr3, [r7, #88] @ 0x58 │ │ ldc2l 1, cr11, [r7, #996] @ 0x3e4 │ │ - ldc2l 11, cr7, [r4, #464] @ 0x1d0 @ │ │ + ldc2l 11, cr7, [r4, #644] @ 0x284 @ │ │ │ │ 024d59c0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #60 @ 0x3c │ │ mov r4, r3 │ │ mov r5, r2 │ │ @@ -1458004,15 +1458003,15 @@ │ │ mov r2, #4 │ │ ldr r0, [pc, #3864] @ 24d78d0 │ │ ldr r8, [sp, #40] @ 0x28 │ │ ldr r5, [fp, #-40] @ 0xffffffd8 │ │ add r0, pc, r0 │ │ str r2, [r0] │ │ b 24d6b0c │ │ - ldc2l 5, cr12, [r4, #704] @ 0x2c0 │ │ + ldc2l 5, cr12, [r4, #884] @ 0x374 │ │ ldrbeq pc, [r5, #3048] @ 0xbe8 @ │ │ ldrbeq r0, [r6, #1108] @ 0x454 │ │ ldrbeq r0, [r6, #1088] @ 0x440 │ │ ldr r0, [pc, #3804] @ 24d78bc │ │ mov r2, #3 │ │ add r0, pc, r0 │ │ str r2, [r0] │ │ @@ -1458043,22 +1458042,22 @@ │ │ ldrbeq r0, [r6, #1096] @ 0x448 │ │ ldrbeq r0, [r6, #1088] @ 0x440 │ │ ldrbeq r0, [r6, #1060] @ 0x424 │ │ ldrbeq r0, [r6, #1012] @ 0x3f4 │ │ ldrbeq r0, [r6, #1056] @ 0x420 │ │ ldrbeq pc, [r5, #2932] @ 0xb74 @ │ │ ldrbeq pc, [r5, #2909] @ 0xb5d @ │ │ - ldc2l 3, cr1, [r4, #380] @ 0x17c │ │ + ldc2l 3, cr1, [r4, #560] @ 0x230 │ │ ldrbeq r0, [r6, #672] @ 0x2a0 │ │ ldrbeq r0, [r6, #640] @ 0x280 │ │ ldrbeq r0, [r6, #984] @ 0x3d8 │ │ ldrbeq pc, [r5, #3428] @ 0xd64 @ │ │ - ldc2l 2, cr4, [r5, #712] @ 0x2c8 │ │ - ldc2l 1, cr14, [r6, #948] @ 0x3b4 │ │ - ldc2l 2, cr1, [r4, #684] @ 0x2ac │ │ + ldc2l 2, cr4, [r5, #892] @ 0x37c │ │ + ldc2l 2, cr14, [r6, #104] @ 0x68 │ │ + ldc2l 2, cr1, [r4, #864] @ 0x360 │ │ ldr r1, [pc, #4076] @ 24d7a78 │ │ mov r2, r4 │ │ add r1, pc, r1 │ │ str r0, [r1] │ │ ldr r1, [sp, #32] │ │ ldr r0, [r1, r0, lsl #3] │ │ rsb r1, r0, #0 │ │ @@ -1458117,40 +1458116,40 @@ │ │ add r0, pc, r0 │ │ ldr r7, [fp, #32] │ │ ldr r0, [r0, r1, lsl #2] │ │ ldr r2, [pc, #3424] @ 24d78e4 │ │ add r2, pc, r2 │ │ str r0, [r2] │ │ b 24d6c5c │ │ - ldc2l 2, cr1, [r4, #140] @ 0x8c │ │ + ldc2l 2, cr1, [r4, #320] @ 0x140 │ │ ldrbeq r0, [r6, #680] @ 0x2a8 │ │ ldrbeq pc, [r5, #3868] @ 0xf1c @ │ │ ldrbeq r0, [r6, #664] @ 0x298 │ │ ldrbeq r0, [r6, #648] @ 0x288 │ │ ldrbeq r0, [r6, #296] @ 0x128 │ │ ldrbeq r0, [r6, #268] @ 0x10c │ │ - ldc2l 10, cr1, [r7, #236] @ 0xec @ │ │ + ldc2l 10, cr1, [r7, #416] @ 0x1a0 @ │ │ ldrbeq r0, [r6, #592] @ 0x250 │ │ ldrbeq r0, [r6, #224] @ 0xe0 │ │ ldrbeq pc, [r5, #2548] @ 0x9f4 @ │ │ ldrbeq pc, [r5, #3200] @ 0xc80 @ │ │ ldrbeq pc, [r5, #2516] @ 0x9d4 @ │ │ ldrbeq pc, [r5, #3172] @ 0xc64 @ │ │ ldrbeq r0, [r6, #460] @ 0x1cc │ │ - ldc2l 8, cr13, [r5, #864] @ 0x360 │ │ - ldc2l 7, cr11, [r4, #148] @ 0x94 │ │ + ldc2l 9, cr13, [r5, #10] @ │ │ + ldc2l 7, cr11, [r4, #328] @ 0x148 │ │ eoreq r4, r8, r8, ror #21 │ │ - ldc2l 5, cr5, [r5, #928] @ 0x3a0 │ │ + ldc2l 6, cr5, [r5, #84] @ 0x54 │ │ ldrbeq r0, [r6, #392] @ 0x188 │ │ - ldc2l 5, cr11, [r5, #784] @ 0x310 │ │ + ldc2l 5, cr11, [r5, #964] @ 0x3c4 │ │ strhteq r4, [r8], -ip │ │ ldrbeq pc, [r5, #2364] @ 0x93c @ │ │ ldrbeq pc, [r5, #3012] @ 0xbc4 @ │ │ - ldc2l 10, cr5, [r6, #636] @ 0x27c @ │ │ - vcadd.f32 d21, d20, d25, #270 │ │ + ldc2l 10, cr5, [r6, #816] @ 0x330 @ │ │ + ldc2l 8, cr5, [r4, #856] @ 0x358 │ │ ldrbeq pc, [r5, #2296] @ 0x8f8 @ │ │ ldrbeq pc, [r5, #2944] @ 0xb80 @ │ │ ldr r0, [pc, #3300] @ 24d78e8 │ │ mov r2, r6 │ │ movw r3, #949 @ 0x3b5 │ │ add r0, pc, r0 │ │ bl 270d9c0 │ │ @@ -1458537,18 +1458536,18 @@ │ │ ldr r1, [pc, #1824] @ 24d7928 │ │ add r2, pc, r2 │ │ add r1, pc, r1 │ │ str r0, [r2] │ │ mov r0, r1 │ │ mov r1, #183 @ 0xb7 │ │ b 24d729c │ │ - ldc2l 13, cr14, [r6, #580] @ 0x244 │ │ + ldc2l 13, cr14, [r6, #760] @ 0x2f8 │ │ ldrbeq pc, [r5, #1776] @ 0x6f0 @ │ │ ldrbeq pc, [r5, #2856] @ 0xb28 @ │ │ - ldc2l 13, cr14, [r6, #276] @ 0x114 │ │ + ldc2l 13, cr14, [r6, #456] @ 0x1c8 │ │ ldrbeq pc, [r5, #2772] @ 0xad4 @ │ │ ldrbeq pc, [r5, #1684] @ 0x694 @ │ │ ldrbeq pc, [r5, #3016] @ 0xbc8 @ │ │ ldrbeq pc, [r5, #2724] @ 0xaa4 @ │ │ ldr r2, [fp, #8] │ │ ldr r0, [pc, #1796] @ 24d794c │ │ ldr r1, [pc, #1796] @ 24d7950 │ │ @@ -1458635,22 +1458634,22 @@ │ │ mov r2, #1 │ │ bl 270da90 │ │ ldr r0, [pc, #1528] @ 24d7990 │ │ add r0, pc, r0 │ │ mov r1, #21 │ │ b 24d7808 │ │ ldrbeq pc, [r5, #1392] @ 0x570 @ │ │ - ldc2l 12, cr14, [r6, #4] │ │ - ldc2l 11, cr14, [r6, #948] @ 0x3b4 @ │ │ + ldc2l 12, cr14, [r6, #184] @ 0xb8 │ │ + ldc2l 12, cr14, [r6, #104] @ 0x68 │ │ ldrbeq pc, [r5, #1356] @ 0x54c @ │ │ ldrbeq pc, [r5, #2436] @ 0x984 @ │ │ ldrbeq pc, [r5, #1840] @ 0x730 @ │ │ ldrbeq pc, [r5, #2364] @ 0x93c @ │ │ ldrbeq pc, [r5, #1256] @ 0x4e8 @ │ │ - ldc2l 11, cr14, [r6, #436] @ 0x1b4 @ │ │ + ldc2l 11, cr14, [r6, #616] @ 0x268 @ │ │ ldr r2, [fp, #8] │ │ ldr r0, [pc, #1660] @ 24d7a4c │ │ ldr r1, [pc, #1660] @ 24d7a50 │ │ str r2, [sp] │ │ add r0, pc, r0 │ │ ldr r2, [fp, #28] │ │ add r1, pc, r1 │ │ @@ -1458678,17 +1458677,17 @@ │ │ mov r0, r5 │ │ mov r1, r4 │ │ mov r2, #1 │ │ bl 270da90 │ │ ldr r0, [pc, #1560] @ 24d7a64 │ │ add r0, pc, r0 │ │ b 24d7398 │ │ - ldc2l 11, cr14, [r6, #356] @ 0x164 @ │ │ - ldc2l 9, cr3, [r5, #284] @ 0x11c @ │ │ - ldc2l 9, cr3, [r5, #236] @ 0xec @ │ │ + ldc2l 11, cr14, [r6, #536] @ 0x218 @ │ │ + ldc2l 9, cr3, [r5, #374] @ 0x176 @ │ │ + ldc2l 9, cr3, [r5, #326] @ 0x146 @ │ │ ldrbeq pc, [r5, #2268] @ 0x8dc @ │ │ ldrbeq pc, [r5, #2248] @ 0x8c8 @ │ │ ldrbeq pc, [r5, #2216] @ 0x8a8 @ │ │ ldrbeq pc, [r5, #2172] @ 0x87c @ │ │ ldrbeq pc, [r5, #2148] @ 0x864 @ │ │ ldrbeq pc, [r5, #396] @ 0x18c @ │ │ ldrbeq pc, [r5, #1036] @ 0x40c @ │ │ @@ -1458731,16 +1458730,16 @@ │ │ mov r0, r5 │ │ mov r1, r6 │ │ mov r2, #1 │ │ ldr r3, [pc, r3] │ │ bl 270d9f0 │ │ b 24d75b0 │ │ ldrbeq pc, [r5, #2088] @ 0x828 @ │ │ - ldc2l 1, cr1, [r7, #204] @ 0xcc │ │ - ldc2l 10, cr14, [r6, #180] @ 0xb4 @ │ │ + ldc2l 1, cr1, [r7, #384] @ 0x180 │ │ + ldc2l 10, cr14, [r6, #360] @ 0x168 @ │ │ ldrbeq pc, [r5, #908] @ 0x38c @ │ │ ldrbeq pc, [r5, #1988] @ 0x7c4 @ │ │ ldr r2, [fp, #8] │ │ ldr r0, [pc, #1248] @ 24d7a20 │ │ ldr r1, [pc, #1248] @ 24d7a24 │ │ str r2, [sp] │ │ add r0, pc, r0 │ │ @@ -1458789,15 +1458788,15 @@ │ │ b 24d780c │ │ ldrbeq pc, [r5, #1340] @ 0x53c @ │ │ ldrbeq pc, [r5, #1328] @ 0x530 @ │ │ ldrbeq pc, [r5, #2216] @ 0x8a8 @ │ │ ldrbeq pc, [r5, #1856] @ 0x740 @ │ │ ldrbeq pc, [r5, #2176] @ 0x880 @ │ │ ldrbeq pc, [r5, #2160] @ 0x870 @ │ │ - ldc2l 9, cr14, [r6, #202] @ 0xca @ │ │ + ldc2l 9, cr14, [r6, #292] @ 0x124 @ │ │ ldr r2, [fp, #8] │ │ ldr r0, [pc, #832] @ 24d795c │ │ ldr r1, [pc, #832] @ 24d7960 │ │ str r2, [sp] │ │ add r0, pc, r0 │ │ ldr r2, [fp, #28] │ │ add r1, pc, r1 │ │ @@ -1458847,15 +1458846,15 @@ │ │ mov r2, #1 │ │ bl 270da90 │ │ b 24d77fc │ │ ldr r0, [pc, #372] @ 24d7860 │ │ mov r1, #157 @ 0x9d │ │ add r0, pc, r0 │ │ b 24d77a8 │ │ - ldc2l 8, cr14, [r6, #708] @ 0x2c4 │ │ + ldc2l 8, cr14, [r6, #888] @ 0x378 │ │ ldrbeq pc, [r5, #1076] @ 0x434 @ │ │ ldrbeq pc, [r5, #1600] @ 0x640 @ │ │ ldrbeq pc, [r5, #1608] @ 0x648 @ │ │ ldrbeq pc, [r5, #1900] @ 0x76c @ │ │ ldrbeq pc, [r5, #1536] @ 0x600 @ │ │ ldr r3, [pc, #352] @ 24d7874 │ │ add r0, r2, r0 │ │ @@ -1458886,15 +1458885,15 @@ │ │ add r0, pc, r0 │ │ b 24d7808 │ │ ldrbeq pc, [r5, #1500] @ 0x5dc @ │ │ ldrbeq lr, [r5, #3832] @ 0xef8 │ │ ldrbeq pc, [r5, #1448] @ 0x5a8 @ │ │ ldrbeq pc, [r5, #884] @ 0x374 @ │ │ ldrbeq pc, [r5, #1408] @ 0x580 @ │ │ - ldc2l 7, cr14, [r6, #836] @ 0x344 │ │ + ldc2l 7, cr14, [r6, #1016] @ 0x3f8 │ │ ldrbeq pc, [r5, #288] @ 0x120 @ │ │ ldrbeq pc, [r5, #116] @ 0x74 @ │ │ ldr r0, [pc, #228] @ 24d7888 │ │ movw r1, #261 @ 0x105 │ │ add r0, pc, r0 │ │ bl 270d990 │ │ ldr r5, [pc, #176] @ 24d7864 │ │ @@ -1458938,27 +1458937,27 @@ │ │ ldr r1, [fp, #-40] @ 0xffffffd8 │ │ add r0, pc, r0 │ │ b 24d7388 │ │ ldrbeq pc, [r5, #56] @ 0x38 @ │ │ ldrbeq pc, [r5, #1564] @ 0x61c @ │ │ ldrbeq pc, [r5, #708] @ 0x2c4 @ │ │ ldrbeq pc, [r5, #1248] @ 0x4e0 @ │ │ - ldc2l 1, cr4, [r6, #460] @ 0x1cc │ │ + ldc2l 1, cr4, [r6, #640] @ 0x280 │ │ ldrbeq lr, [r5, #232] @ 0xe8 │ │ ldrbeq lr, [r5, #1700] @ 0x6a4 │ │ - ldc2l 6, cr11, [r4, #964] @ 0x3c4 │ │ + ldc2l 7, cr11, [r4, #120] @ 0x78 │ │ ldrbeq lr, [r5, #1660] @ 0x67c │ │ ldrbeq lr, [r5, #1884] @ 0x75c │ │ - ldc2l 6, cr2, [r5, #872] @ 0x368 │ │ - ldc2l 7, cr11, [r4, #532] @ 0x214 │ │ + ldc2l 7, cr2, [r5, #28] │ │ + ldc2l 7, cr11, [r4, #712] @ 0x2c8 │ │ ldrbeq lr, [r5, #1824] @ 0x720 │ │ - ldc2l 1, cr10, [r5, #32] │ │ - ldc2l 12, cr11, [r6, #124] @ 0x7c │ │ - ldc2l 0, cr12, [r3, #784] @ 0x310 │ │ - ldc2l 6, cr11, [r4, #484] @ 0x1e4 │ │ + ldc2l 1, cr10, [r5, #212] @ 0xd4 │ │ + ldc2l 12, cr11, [r6, #304] @ 0x130 │ │ + ldc2l 0, cr12, [r3, #964] @ 0x3c4 │ │ + ldc2l 6, cr11, [r4, #664] @ 0x298 │ │ ldrbeq pc, [r5, #1552] @ 0x610 @ │ │ ldrbeq pc, [r5, #1552] @ 0x610 @ │ │ ldrbeq pc, [r5, #1468] @ 0x5bc @ │ │ ldrbeq lr, [r5, #3240] @ 0xca8 │ │ ldrbeq pc, [r5, #452] @ 0x1c4 @ │ │ ldrbeq lr, [r5, #3348] @ 0xd14 │ │ ldrbeq pc, [r5, #564] @ 0x234 @ │ │ @@ -1458972,131 +1458971,131 @@ │ │ ldrbeq pc, [r5, #260] @ 0x104 @ │ │ ldrbeq pc, [r5, #1292] @ 0x50c @ │ │ ldrbeq pc, [r5, #916] @ 0x394 @ │ │ ldrbeq pc, [r5] @ │ │ ldrbeq pc, [r5, #536] @ 0x218 @ │ │ ldrbeq lr, [r5, #2840] @ 0xb18 │ │ ldrbeq pc, [r5, #460] @ 0x1cc @ │ │ - ldc2l 10, cr0, [r7, #604] @ 0x25c @ │ │ + ldc2l 10, cr0, [r7, #784] @ 0x310 @ │ │ ldrbeq lr, [r5, #2672] @ 0xa70 │ │ ldrbeq pc, [r5, #292] @ 0x124 @ │ │ ldrbeq pc, [r5, #660] @ 0x294 @ │ │ - ldc2l 3, cr14, [r6, #404] @ 0x194 │ │ + ldc2l 3, cr14, [r6, #584] @ 0x248 │ │ ldrbeq lr, [r5, #3264] @ 0xcc0 │ │ ldrbeq pc, [r5, #228] @ 0xe4 @ │ │ ldrbeq pc, [r5, #588] @ 0x24c @ │ │ ldrbeq pc, [r5, #568] @ 0x238 @ │ │ ldrbeq lr, [r5, #3716] @ 0xe84 │ │ ldrbeq pc, [r5, #500] @ 0x1f4 @ │ │ ldrbeq pc, [r5, #492] @ 0x1ec @ │ │ ldrbeq lr, [r5, #3640] @ 0xe38 │ │ ldrbeq lr, [r5, #3296] @ 0xce0 │ │ ldrbeq lr, [r5, #3252] @ 0xcb4 │ │ ldrbeq lr, [r5, #3176] @ 0xc68 │ │ - ldc2l 9, cr8, [r5, #380] @ 0x17c @ │ │ - ldc2l 12, cr11, [r4, #68] @ 0x44 │ │ + ldc2l 9, cr8, [r5, #470] @ 0x1d6 @ │ │ + ldc2l 12, cr11, [r4, #248] @ 0xf8 │ │ ldrbeq lr, [r5, #2996] @ 0xbb4 │ │ - ldc2l 14, cr5, [r6, #416] @ 0x1a0 │ │ + ldc2l 14, cr5, [r6, #596] @ 0x254 │ │ ldrbeq lr, [r5, #3888] @ 0xf30 │ │ ldrbeq lr, [r5, #2940] @ 0xb7c │ │ ldrbeq lr, [r5, #3820] @ 0xeec │ │ ldrbeq lr, [r5, #3812] @ 0xee4 │ │ ldrbeq lr, [r5, #2864] @ 0xb30 │ │ ldrbeq lr, [r5, #3164] @ 0xc5c │ │ ldrbeq lr, [r5, #3120] @ 0xc30 │ │ ldrbeq lr, [r5, #3044] @ 0xbe4 │ │ - ldc2l 12, cr2, [r5, #172] @ 0xac │ │ + ldc2l 12, cr2, [r5, #352] @ 0x160 │ │ ldrbeq lr, [r5, #2184] @ 0x888 │ │ ldrbeq lr, [r5, #2140] @ 0x85c │ │ - ldc2l 2, cr4, [r6, #708] @ 0x2c4 │ │ - vcadd.f32 , q2, , #270 │ │ - ldc2l 5, cr2, [r5, #828] @ 0x33c │ │ + ldc2l 2, cr4, [r6, #888] @ 0x378 │ │ + ldc2l 8, cr11, [r4, #584] @ 0x248 │ │ + ldc2l 5, cr2, [r5, #1008] @ 0x3f0 │ │ ldrbeq pc, [r5, #52] @ 0x34 @ │ │ ldrbeq pc, [r5, #44] @ 0x2c @ │ │ ldrbeq lr, [r5, #2992] @ 0xbb0 │ │ ldrbeq lr, [r5, #2948] @ 0xb84 │ │ ldc2l 14, cr5, [r7, #32] │ │ - ldc2l 11, cr11, [r4, #564] @ 0x234 @ │ │ - vcadd.f32 q11, q3, q0, #270 │ │ - ldc2l 11, cr11, [r4, #244] @ 0xf4 @ │ │ - ldc2l 0, cr8, [r5, #692] @ 0x2b4 │ │ + ldc2l 11, cr11, [r4, #744] @ 0x2e8 @ │ │ + vcadd.f32 q11, q3, , #270 │ │ + ldc2l 11, cr11, [r4, #424] @ 0x1a8 @ │ │ + ldc2l 0, cr8, [r5, #872] @ 0x368 │ │ ldrbeq pc, [r5, #292] @ 0x124 @ │ │ ldrbeq pc, [r5, #284] @ 0x11c @ │ │ ldrbeq pc, [r5, #108] @ 0x6c @ │ │ ldrbeq lr, [r5, #2168] @ 0x878 │ │ ldrbeq lr, [r5, #3472] @ 0xd90 │ │ ldrbeq pc, [r5, #80] @ 0x50 @ │ │ - ldc2l 15, cr15, [r3, #844] @ 0x34c │ │ + ldc2l 0, cr0, [r4] │ │ ldrbeq lr, [r5, #3840] @ 0xf00 │ │ ldrbeq lr, [r5, #3820] @ 0xeec │ │ ldrbeq lr, [r5, #3820] @ 0xeec │ │ ldrbeq lr, [r5, #3816] @ 0xee8 │ │ ldrbeq lr, [r5, #3804] @ 0xedc │ │ ldrbeq lr, [r5, #3776] @ 0xec0 │ │ - ldc2l 15, cr2, [r5, #312] @ 0x138 │ │ + ldc2l 15, cr2, [r5, #492] @ 0x1ec │ │ ldrbeq lr, [r5, #4084] @ 0xff4 │ │ ldrbeq lr, [r5, #3724] @ 0xe8c │ │ ldrbeq lr, [r5, #3712] @ 0xe80 │ │ ldrbeq lr, [r5, #3996] @ 0xf9c │ │ ldrbeq lr, [r5, #3652] @ 0xe44 │ │ ldrbeq lr, [r5, #3612] @ 0xe1c │ │ - ldc2l 14, cr2, [r5, #632] @ 0x278 │ │ - ldc2l 13, cr12, [r6, #868] @ 0x364 │ │ + ldc2l 14, cr2, [r5, #812] @ 0x32c │ │ + ldc2l 14, cr12, [r6, #24] │ │ ldrbeq lr, [r5, #3372] @ 0xd2c │ │ ldrbeq lr, [r5, #3700] @ 0xe74 │ │ ldrbeq lr, [r5, #3332] @ 0xd04 │ │ ldrbeq lr, [r5, #2592] @ 0xa20 │ │ ldrbeq lr, [r5, #2548] @ 0x9f4 │ │ ldrbeq lr, [r5, #2480] @ 0x9b0 │ │ - ldc2l 9, cr14, [r3, #92] @ 0x5c @ │ │ - ldc2l 9, cr11, [r4, #442] @ 0x1ba @ │ │ + ldc2l 9, cr14, [r3, #182] @ 0xb6 @ │ │ + ldc2l 10, cr11, [r4, #40] @ 0x28 @ │ │ ldrbeq lr, [r5, #2148] @ 0x864 │ │ ldrbeq lr, [r5, #2392] @ 0x958 │ │ ldrbeq lr, [r5, #3608] @ 0xe18 │ │ ldrbeq lr, [r5, #3308] @ 0xcec │ │ - ldc2l 13, cr15, [r3, #460] @ 0x1cc │ │ + ldc2l 13, cr15, [r3, #640] @ 0x280 │ │ ldrbeq lr, [r5, #2404] @ 0x964 │ │ ldrbeq lr, [r5, #2360] @ 0x938 │ │ - ldc2l 4, cr8, [r6, #44] @ 0x2c │ │ - ldc2l 9, cr11, [r4, #138] @ 0x8a @ │ │ + ldc2l 4, cr8, [r6, #224] @ 0xe0 │ │ + ldc2l 9, cr11, [r4, #228] @ 0xe4 @ │ │ ldrbeq lr, [r5, #1996] @ 0x7cc │ │ ldrbeq lr, [r5, #1988] @ 0x7c4 │ │ - ldc2l 9, cr8, [r4, #164] @ 0xa4 @ │ │ + ldc2l 9, cr8, [r4, #254] @ 0xfe @ │ │ ldrbeq lr, [r5, #3496] @ 0xda8 │ │ ldrbeq lr, [r5, #3196] @ 0xc7c │ │ ldrbeq lr, [r5, #3172] @ 0xc64 │ │ - ldc2l 12, cr15, [r3, #1020] @ 0x3fc │ │ + ldc2l 13, cr15, [r3, #176] @ 0xb0 │ │ ldrbeq lr, [r5, #2772] @ 0xad4 │ │ ldrbeq lr, [r5, #2728] @ 0xaa8 │ │ - ldc2l 0, cr12, [r6, #836] @ 0x344 │ │ - ldc2l 10, cr11, [r4, #724] @ 0x2d4 @ │ │ + ldc2l 0, cr12, [r6, #1016] @ 0x3f8 │ │ + ldc2l 10, cr11, [r4, #904] @ 0x388 @ │ │ ldrbeq lr, [r5, #2364] @ 0x93c │ │ ldrbeq lr, [r5, #2352] @ 0x930 │ │ - ldc2l 14, cr1, [r5, #356] @ 0x164 │ │ - ldc2l 12, cr1, [r7, #816] @ 0x330 │ │ + ldc2l 14, cr1, [r5, #536] @ 0x218 │ │ + ldc2l 12, cr1, [r7, #996] @ 0x3e4 │ │ ldrbeq lr, [r5, #3408] @ 0xd50 │ │ ldrbeq lr, [r5, #3388] @ 0xd3c │ │ ldrbeq lr, [r5, #3372] @ 0xd2c │ │ ldrbeq lr, [r5, #2928] @ 0xb70 │ │ ldrbeq pc, [r5, #140] @ 0x8c @ │ │ ldrbeq pc, [r5, #976] @ 0x3d0 @ │ │ - ldc2l 3, cr3, [r5, #168] @ 0xa8 │ │ + ldc2l 3, cr3, [r5, #348] @ 0x15c │ │ ldrbeq pc, [r5, #664] @ 0x298 @ │ │ ldrbeq pc, [r5, #652] @ 0x28c @ │ │ ldrbeq pc, [r5, #944] @ 0x3b0 @ │ │ ldrbeq pc, [r5, #976] @ 0x3d0 @ │ │ ldrbeq pc, [r5, #964] @ 0x3c4 @ │ │ ldrbeq lr, [r5, #3388] @ 0xd3c │ │ ldrbeq lr, [r5, #1936] @ 0x790 │ │ ldrbeq lr, [r5, #2076] @ 0x81c │ │ ldrbeq lr, [r5, #2032] @ 0x7f0 │ │ - ldc2l 2, cr4, [r6, #276] @ 0x114 │ │ - ldc2l 7, cr11, [r4, #964] @ 0x3c4 │ │ + ldc2l 2, cr4, [r6, #456] @ 0x1c8 │ │ + ldc2l 8, cr11, [r4, #120] @ 0x78 │ │ ldrbeq lr, [r5, #25] │ │ - ldc2l 7, cr10, [r4, #608] @ 0x260 │ │ + ldc2l 7, cr10, [r4, #788] @ 0x314 │ │ │ │ 024d7abc : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #4 │ │ vpush {d8-d13} │ │ sub sp, sp, #216 @ 0xd8 │ │ @@ -1459476,25 +1459475,25 @@ │ │ bl 270d9c0 │ │ ldr r3, [sp, #52] @ 0x34 │ │ mov r1, r0 │ │ b 24d7f9c │ │ mov r0, r2 │ │ bl 270dd30 │ │ b 24d7c10 │ │ - ldc2l 1, cr14, [r3, #880] @ 0x370 │ │ - ldc2l 10, cr9, [r5, #248] @ 0xf8 @ │ │ - ldc2l 0, cr14, [r3, #736] @ 0x2e0 │ │ - ldc2l 0, cr14, [r3, #544] @ 0x220 │ │ - ldc2l 9, cr9, [r5, #412] @ 0x19c @ │ │ - ldc2l 9, cr9, [r5, #316] @ 0x13c @ │ │ - vcadd.f32 , , q1, #270 │ │ - ldc2l 14, cr13, [r3, #752] @ 0x2f0 │ │ - ldc2l 7, cr9, [r5, #1000] @ 0x3e8 │ │ - ldc2l 7, cr9, [r5, #760] @ 0x2f8 │ │ - ldc2l 14, cr13, [r3, #240] @ 0xf0 │ │ + ldc2l 2, cr14, [r3, #36] @ 0x24 │ │ + ldc2l 10, cr9, [r5, #428] @ 0x1ac @ │ │ + ldc2l 0, cr14, [r3, #916] @ 0x394 │ │ + ldc2l 0, cr14, [r3, #724] @ 0x2d4 │ │ + ldc2l 9, cr9, [r5, #502] @ 0x1f6 @ │ │ + ldc2l 9, cr9, [r5, #406] @ 0x196 @ │ │ + vcadd.f32 , , , #270 │ │ + ldc2l 14, cr13, [r3, #932] @ 0x3a4 │ │ + vcadd.f32 d25, d5, d23, #270 │ │ + ldc2l 7, cr9, [r5, #940] @ 0x3ac │ │ + ldc2l 14, cr13, [r3, #420] @ 0x1a4 │ │ │ │ 024d80ec : │ │ push {r4, r5, r6, sl, fp, lr} │ │ add fp, sp, #16 │ │ ldr r6, [pc, #68] @ 24d8140 │ │ mov r5, r2 │ │ mov r2, r1 │ │ @@ -1459793,39 +1459792,39 @@ │ │ ldr r0, [pc, #116] @ 24d8604 │ │ mov r1, #6 │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, r4 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ - ldc2l 1, cr0, [r4, #324] @ 0x144 │ │ + ldc2l 1, cr0, [r4, #504] @ 0x1f8 │ │ ldrbeq sp, [r5, #3404] @ 0xd4c │ │ eoreq r2, r8, r4, asr r6 │ │ ldrbeq sp, [r5, #3364] @ 0xd24 │ │ ldrbeq sp, [r5, #3500] @ 0xdac │ │ ldrbeq sp, [r5, #3380] @ 0xd34 │ │ eoreq r2, r8, r4, ror #11 │ │ ldrbeq sp, [r5, #3220] @ 0xc94 │ │ ldrbeq sp, [r5, #3148] @ 0xc4c │ │ ldrbeq sp, [r5, #3104] @ 0xc20 │ │ ldrbeq sp, [r5, #3132] @ 0xc3c │ │ - ldc2l 8, cr5, [r4, #872] @ 0x368 │ │ + ldc2l 9, cr5, [r4, #14] @ │ │ eoreq r2, r8, ip, ror #9 │ │ - ldc2l 5, cr9, [r5, #192] @ 0xc0 │ │ - ldc2l 8, cr5, [r6, #600] @ 0x258 │ │ - ldc2l 7, cr1, [r6, #424] @ 0x1a8 │ │ + ldc2l 5, cr9, [r5, #372] @ 0x174 │ │ + vcadd.f32 , q11, , #270 │ │ + ldc2l 7, cr1, [r6, #604] @ 0x25c │ │ ldc2l 13, cr4, [r7, #508] @ 0x1fc │ │ ldc2l 8, cr6, [r7, #216] @ 0xd8 │ │ - ldc2l 7, cr5, [r6, #916] @ 0x394 │ │ + ldc2l 8, cr5, [r6, #72] @ 0x48 │ │ eoreq r2, r8, ip, ror #6 │ │ - ldc2l 7, cr15, [r6, #736] @ 0x2e0 │ │ + ldc2l 7, cr15, [r6, #916] @ 0x394 │ │ ldrbeq sp, [r5, #2620] @ 0xa3c │ │ ldrbeq sp, [r5, #2464] @ 0x9a0 │ │ ldrbeq sp, [r5, #2484] @ 0x9b4 │ │ - ldc2l 13, cr15, [r3, #244] @ 0xf4 │ │ + ldc2l 13, cr15, [r3, #424] @ 0x1a8 │ │ │ │ 024d8608 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #36 @ 0x24 │ │ mov r4, r3 │ │ mov r5, r2 │ │ @@ -1459940,16 +1459939,16 @@ │ │ add r0, pc, r0 │ │ bl 270ce40 │ │ mov r0, #0 │ │ sub sp, fp, #28 │ │ pop {r4, r5, r6, r7, r8, r9, sl, fp, pc} │ │ ldr r1, [sp, #32] │ │ b 24d86b8 │ │ - ldc2l 9, cr12, [r6, #264] @ 0x108 @ │ │ - ldc2l 7, cr12, [r6, #976] @ 0x3d0 │ │ + ldc2l 9, cr12, [r6, #354] @ 0x162 @ │ │ + vcadd.f32 d28, d6, d17, #270 │ │ │ │ 024d87f0 : │ │ push {r4, r5, r6, r7, r8, r9, sl, fp, lr} │ │ add fp, sp, #28 │ │ sub sp, sp, #636 @ 0x27c │ │ mov r4, r3 │ │ mov r6, r2 │ │ @@ -1460633,76 +1460632,76 @@ │ │ add r0, r0, r4 │ │ str r0, [r1] │ │ ldr r1, [fp, #16] │ │ ldr r0, [r1] │ │ add r0, r0, #10 │ │ str r0, [r1] │ │ b 24d8b64 │ │ - ldc2l 7, cr12, [r6, #628] @ 0x274 │ │ + ldc2l 7, cr12, [r6, #808] @ 0x328 │ │ eoreq r1, r8, ip, asr #31 │ │ eoreq r2, r8, r4, asr #3 │ │ ldrbeq sp, [r5, #1812] @ 0x714 │ │ - ldc2l 6, cr10, [r4, #292] @ 0x124 │ │ - ldc2l 14, cr14, [r6, #636] @ 0x27c │