--- /home/fdroid/fdroiddata/tmp/kzs.th000.tsdm_client_492.apk +++ /home/fdroid/fdroiddata/tmp/sigcp_kzs.th000.tsdm_client_492.apk ├── zipinfo {} │ @@ -1307,8 +1307,8 @@ │ -rw---- 0.0 fat 324 b- stor 81-Jan-01 01:01 res/zE.png │ -rw---- 0.0 fat 2463 b- stor 81-Jan-01 01:01 res/zV.9.png │ -rw---- 0.0 fat 308 b- defN 81-Jan-01 01:01 res/zn.xml │ -rw---- 0.0 fat 204924 b- stor 81-Jan-01 01:01 resources.arsc │ -rw-r--r-- 0.0 unx 147104 b- defN 81-Jan-01 01:01 META-INF/CERT.SF │ -rw-r--r-- 0.0 unx 2107 b- defN 81-Jan-01 01:01 META-INF/CERT.RSA │ -rw-r--r-- 0.0 unx 147030 b- defN 81-Jan-01 01:01 META-INF/MANIFEST.MF │ -1312 files, 48833445 bytes uncompressed, 29201546 bytes compressed: 40.2% │ +1312 files, 48833445 bytes uncompressed, 29201544 bytes compressed: 40.2% ├── lib/armeabi-v7a/libflutter_avif.so │ ├── strings --all --bytes=8 {} │ │ @@ -121,15 +121,15 @@ │ │ epoll_fd │ │ notifierNulError.zdebug_ │ │ headerIoErrorWireErrorReflectMessageNotInitializedBufferHasNotEnoughCapacityIncompatibleProtobufTypeAndRuntimeTypeGroupIsNotImplementedMessageNotFoundInFilesDependencyNotFoundNonUniqueDependenciesNonUniqueFieldNameNonUniqueFileDescriptorCycleInFileDescriptorsMapEntryNameMustEndWithEntryMapEntryMustHaveNoMapEntryIncorrectFieldsCouldNotParseDefaultValueForFieldassertion failed: amt <= self.remaining_in_buf().len()/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rs/rustc/90b35a6239c3d8bdabc530a6a0816f7ff89a0aaf/library/std/src/sync/once.rscalled `Result::unwrap()` on an `Err` valueErrorsrc/flutter_avif.rscannot spawn task/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/async-std-1.13.0/src/task/spawn.rsno entry found for keyCouldn't decode the image. Code: yuv_to_rgb error decode error /home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/lazy_static-1.5.0/src/inline_lazy.rscannot access a Thread Local Storage value during or after destruction/rustc/90b35a6239c3d8bdabc530a6a0816f7ff89a0aaf/library/std/src/thread/local.rsassertion failed: amt <= self.remaining_in_buf().len()/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rs/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/slab-0.4.9/src/lib.rsinternal error: entered unreachable codeassertion failed: amt <= self.remaining_in_buf().len()/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rsLazy instance has previously been poisoned/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/once_cell-1.20.2/src/lib.rsassertion failed: amt <= self.remaining_in_buf().len()/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rs()Utf8Errorvalid_up_toerror_lenVarintFixed64LengthDelimitedStartGroupFixed32Headerscheduledrunningcompletedclosedawaiterref_countPoisonError │ │ /home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/concurrent-queue-2.5.0/src/unbounded.rsClosed/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_output_stream/mod.rsassertion failed: vec_len + self.buffer.pos_within_buf() <= vec.capacity()given slice is too small to serialize the messageassertion failed: self.buffer.pos_within_buf() == 0internal error: entered unreachable codeassertion failed: self.limit >= self.pos_of_buf_start/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/buf_read_iter.rsassertion failed: limit_within_buf >= self.pos_within_buf as u64/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rs/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/wire_format.rsassertion failed: field_number > 0 && field_number <= FIELD_NUMBER_MAXassertion failed: limit >= self.limit/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/buf_read_iter.rsassertion failed: self.limit >= self.pos_of_buf_startassertion failed: amt <= self.remaining_in_buf().len()/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rsUnexpected end of file/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/buf_read_or_reader.rsFile-level box header │ │ Exceeded possible count of unique ipma version and flags tuples │ │ Box[pixi] contains unsupported plane count [%u] │ │ Box[mdhd] has an unsupported version [%u] │ │ -1.0.0-0-g99172b1 │ │ +1.0.0-0-g99172b11 │ │ getFloatRegister │ │ Box[hdlr] handler_type is not 'pict' │ │ Box[iloc] has an invalid item ID [%u] │ │ Item ID [%u] contains an extent length which overflows: [%llu] │ │ Meta box contains multiple idat boxes │ │ av1C contains illegal marker and version pair: [%u] │ │ Box[lsel] │ ├── readelf --wide --decompress --string-dump=.rodata {} │ │ @@ -36,434 +36,434 @@ │ │ [ 8a8] headerIoErrorWireErrorReflectMessageNotInitializedBufferHasNotEnoughCapacityIncompatibleProtobufTypeAndRuntimeTypeGroupIsNotImplementedMessageNotFoundInFilesDependencyNotFoundNonUniqueDependenciesNonUniqueFieldNameNonUniqueFileDescriptorCycleInFileDescriptorsMapEntryNameMustEndWithEntryMapEntryMustHaveNoMapEntryIncorrectFieldsCouldNotParseDefaultValueForFieldassertion failed: amt <= self.remaining_in_buf().len()/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rs/rustc/90b35a6239c3d8bdabc530a6a0816f7ff89a0aaf/library/std/src/sync/once.rscalled `Result::unwrap()` on an `Err` valueErrorsrc/flutter_avif.rscannot spawn task/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/async-std-1.13.0/src/task/spawn.rsno entry found for keyCouldn't decode the image. Code: yuv_to_rgb error decode error /home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/lazy_static-1.5.0/src/inline_lazy.rscannot access a Thread Local Storage value during or after destruction/rustc/90b35a6239c3d8bdabc530a6a0816f7ff89a0aaf/library/std/src/thread/local.rsassertion failed: amt <= self.remaining_in_buf().len()/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rs/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/slab-0.4.9/src/lib.rsinternal error: entered unreachable codeassertion failed: amt <= self.remaining_in_buf().len()/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rsLazy instance has previously been poisoned/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/once_cell-1.20.2/src/lib.rsassertion failed: amt <= self.remaining_in_buf().len()/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rs()Utf8Errorvalid_up_toerror_lenVarintFixed64LengthDelimitedStartGroupFixed32Headerscheduledrunningcompletedclosedawaiterref_countPoisonError │ │ [ 10b8] /home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/concurrent-queue-2.5.0/src/unbounded.rsClosed/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_output_stream/mod.rsassertion failed: vec_len + self.buffer.pos_within_buf() <= vec.capacity()given slice is too small to serialize the messageassertion failed: self.buffer.pos_within_buf() == 0internal error: entered unreachable codeassertion failed: self.limit >= self.pos_of_buf_start/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/buf_read_iter.rsassertion failed: limit_within_buf >= self.pos_within_buf as u64/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rs/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/wire_format.rsassertion failed: field_number > 0 && field_number <= FIELD_NUMBER_MAXassertion failed: limit >= self.limit/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/buf_read_iter.rsassertion failed: self.limit >= self.pos_of_buf_startassertion failed: amt <= self.remaining_in_buf().len()/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/input_buf.rsUnexpected end of file/home/runner/.cargo/registry/src/index.crates.io-6f17d22bba15001f/protobuf-3.7.1/src/coded_input_stream/buf_read_or_reader.rsFile-level box header │ │ [ 169b] Exceeded possible count of unique ipma version and flags tuples │ │ [ 16db] Box[pixi] contains unsupported plane count [%u] │ │ [ 170b] Box[mdhd] has an unsupported version [%u] │ │ [ 1735] BT.601 │ │ [ 173c] dimg │ │ - [ 1741] 1.0.0-0-g99172b1 │ │ - [ 1752] getFloatRegister │ │ - [ 1763] r5 │ │ - [ 1766] d26 │ │ - [ 176a] Box[hdlr] handler_type is not 'pict' │ │ - [ 178f] Box[iloc] has an invalid item ID [%u] │ │ - [ 17b5] Item ID [%u] contains an extent length which overflows: [%llu] │ │ - [ 17f4] Meta box contains multiple idat boxes │ │ - [ 181a] av1C contains illegal marker and version pair: [%u] │ │ - [ 184e] Box[lsel] │ │ - [ 1858] Grid box contains illegal dimensions: [%u x %u] │ │ - [ 1888] SMPTE RP 431-2 │ │ - [ 1897] MA1A │ │ - [ 189c] dinf │ │ - [ 18a1] stsd │ │ - [ 18a6] libunwind: %s - %s\n │ │ - [ 18ba] s11 │ │ - [ 18be] d14 │ │ - [ 18c2] Primary item not specified │ │ - [ 18dd] Item ID [%u] contains an extent length which overflows the item size: [%zu, %zu] │ │ - [ 192e] Box[pixi] │ │ - [ 1938] Image allocation failure │ │ - [ 1951] s->max_frame_delay >= 0 && s->max_frame_delay <= DAV1D_MAX_FRAME_DELAY │ │ - [ 1998] dst->data == ((void*)0) │ │ - [ 19b0] _Unwind_VRS_Set │ │ - [ 19c0] Type matching not implemented │ │ - [ 19de] s18 │ │ - [ 19e2] Box[ftyp] contains a compatible brands section that isn't divisible by 4 [%zu] │ │ - [ 1a31] Box[%s] contains a duplicate unique box of type '%s' │ │ - [ 1a66] a1op │ │ - [ 1a6b] Duplicate Box[stbl] for a single track detected │ │ - [ 1a9b] Box[co64] │ │ - [ 1aa5] prof │ │ - [ 1aaa] Input validation check '%s' failed in %s!\n │ │ - [ 1ad5] flags != NULL │ │ - [ 1ae3] dst->data[0] == ((void*)0) │ │ - [ 1afe] dav1d_picture_move_ref │ │ - [ 1b15] s3 │ │ - [ 1b18] d25 │ │ - [ 1b1c] iref │ │ - [ 1b21] Box[trak] │ │ - [ 1b2b] Truncated sample table │ │ - [ 1b42] Item ID %u depth specified by pixi property [%u] does not match av1C property depth [%u] │ │ - [ 1b9b] BT.709 │ │ - [ 1ba2] mime │ │ - [ 1ba7] free_callback != NULL │ │ - [ 1bbd] Error parsing OBU data\n │ │ - [ 1bd5] p->data[0] != ((void*)0) │ │ - [ 1bee] pc │ │ - [ 1bf1] s4 │ │ - [ 1bf4] s5 │ │ - [ 1bf7] s14 │ │ - [ 1bfb] d2 │ │ - [ 1bfe] d8 │ │ - [ 1c01] d11 │ │ - [ 1c05] d24 │ │ - [ 1c09] d31 │ │ - [ 1c0d] Box[stsc] │ │ - [ 1c17] Grid image's first tile is missing an av1C property │ │ - [ 1c4b] BT.470-6 System M │ │ - [ 1c5d] mif1 │ │ - [ 1c62] min_quantizer │ │ - [ 1c70] buf->data != ((void*)0) │ │ - [ 1c88] _Unwind_Resume() can't return │ │ - [ 1ca6] s17 │ │ - [ 1caa] d30 │ │ - [ 1cae] meta │ │ - [ 1cb3] Box[av1C] │ │ - [ 1cbd] Box[ipma] item IDs are not ordered by increasing ID │ │ - [ 1cf1] Box[iref] has an invalid item ID [%u] │ │ - [ 1d17] Exceeded avifDecoder's imageCountLimit │ │ - [ 1d3e] FCC USFC 73.682 │ │ - [ 1d4e] %s: Child box too large, possibly truncated data │ │ - [ 1d7f] minf │ │ - [ 1d84] in != NULL │ │ - [ 1d8f] ptr != NULL │ │ - [ 1d9b] buf != ((void*)0) │ │ - [ 1dad] Failed to wrap picture: %s\n │ │ - [ 1dc9] r11 │ │ - [ 1dcd] s12 │ │ - [ 1dd1] s21 │ │ - [ 1dd5] d7 │ │ - [ 1dd8] [Strict] clap width %d/%d is not an integer │ │ - [ 1e04] [Strict] calculated crop X offset %d/%d is not an integer │ │ - [ 1e3e] [Strict] crop rect X offset and width must both be even due to this image's YUV subsampling │ │ - [ 1e9a] Box[meta] does not have a Box[hdlr] as its first child box │ │ - [ 1ed5] Box[lsel] contains an unsupported layer [%u] │ │ - [ 1f02] Box[ipma] has an invalid item ID [%u] │ │ - [ 1f28] Box[stsc] does not begin with chunk 1 [%u] │ │ - [ 1f53] Sample table contains a chunk with 0 samples │ │ - [ 1f80] ftyp │ │ - [ 1f85] pict │ │ - [ 1f8a] moov │ │ - [ 1f8f] mdia │ │ - [ 1f94] stts │ │ - [ 1f99] grid │ │ - [ 1f9e] threads │ │ - [ 1fa6] r1 │ │ - [ 1fa9] r6 │ │ - [ 1fac] r7 │ │ - [ 1faf] _Unwind_GetTextRelBase │ │ - [ 1fc6] [Strict] crop rect width and height must be nonzero │ │ - [ 1ffa] dav1d │ │ - [ 2000] Failed to find Box[ipco] as the first box in Box[iprp] │ │ - [ 2037] Generic film │ │ - [ 2044] auxv │ │ - [ 204a] AOM Coding │ │ - [ 2055] auxi │ │ - [ 205a] dav1d_send_data │ │ - [ 206a] Frame size %dx%d exceeds limit %u\n │ │ - [ 208d] Malformed ITU-T T.35 metadata message format\n │ │ - [ 20bb] Unknown Metadata OBU type %d\n │ │ - [ 20d9] s1 │ │ - [ 20dc] d20 │ │ - [ 20e0] d29 │ │ - [ 20e4] [Strict] crop rect is out of the image's bounds │ │ - [ 2114] BT.2020 (non-constant luminance) │ │ - [ 2135] mvhd │ │ - [ 213a] Color │ │ - [ 2140] speed │ │ - [ 2146] dav1d_open │ │ - [ 2151] Compiled without support for %d-bit decoding\n │ │ - [ 217f] s10 │ │ - [ 2183] s16 │ │ - [ 2187] s25 │ │ - [ 218b] [Strict] at least one crop offset is not positive │ │ - [ 21bd] pitm │ │ - [ 21c2] Box[a1lx] │ │ - [ 21cc] Box[ipma] for item ID [%u] contains an illegal property index [%u] (out of [%u] properties) │ │ - [ 2228] Box[iref] │ │ - [ 2232] %s: Failed to find a NULL terminator when reading a string │ │ - [ 226d] %s: Header size overflow check failure │ │ - [ 2294] getInfoFromEHABISection │ │ - [ 22ac] r0 │ │ - [ 22af] s27 │ │ - [ 22b3] d3 │ │ - [ 22b6] d27 │ │ - [ 22ba] Box[meta] │ │ - [ 22c4] iprp │ │ - [ 22c9] Box[iprp] │ │ - [ 22d3] Box[irot] │ │ - [ 22dd] Box[tkhd] has an unsupported version [%u] │ │ - [ 2307] Box[stsz] │ │ - [ 2311] Item ID %u has zero extents │ │ - [ 232d] avifImageScale() failed │ │ - [ 2345] stsc │ │ - [ 234a] dav1d_get_picture │ │ - [ 235c] dav1d_data_props_unref_internal │ │ - [ 237c] r3 │ │ - [ 237f] _Unwind_GetDataRelBase() not implemented │ │ - [ 23a8] [Strict] image width %u or height %u is greater than INT32_MAX │ │ - [ 23e7] [Strict] croppedCenterY overflowed │ │ - [ 240a] decoder->image does not match srcAlpha in width, height, or bit depth │ │ - [ 2450] Box[tkhd] │ │ - [ 245a] Box[stss] │ │ - [ 2464] Sample table contains an offset/size pair which overflows: [%llu / %u] │ │ - [ 24ab] Box[grid] has unsupported version [%u] │ │ - [ 24d2] avif │ │ - [ 24d7] avis │ │ - [ 24dc] Frame size limit reduced from %u to %u.\n │ │ - [ 2505] unwind_phase2 │ │ - [ 2513] d5 │ │ - [ 2516] Failed to find AV1 color track │ │ - [ 2535] Box[hdlr] │ │ - [ 253f] Box[hdlr] contains a pre_defined value that is nonzero │ │ - [ 2576] Item ID [%u] contains an extent offset which overflows: [base: %llu offset:%llu] │ │ - [ 25c7] Box[ipma] │ │ - [ 25d1] %s: Expecting box version 2 or 3, got version %u │ │ - [ 2602] Box[mdia] │ │ - [ 260c] Item ID %u is stored in an idat, but no associated idat box was found │ │ - [ 2652] [Strict] Item ID %u of type '%.4s' is missing mandatory pixi property │ │ - [ 2698] [Strict] Item ID %u is missing an ispe property, so its clap property cannot be validated │ │ - [ 26f2] EBU Tech. 3213-E │ │ - [ 2703] Alpha │ │ - [ 2709] dav1d_data_unref_internal │ │ - [ 2723] Overrun in OBU bit buffer into next OBU\n │ │ - [ 274c] unknown personality routine │ │ - [ 2768] s0 │ │ - [ 276b] s31 │ │ - [ 276f] d23 │ │ - [ 2773] _Unwind_GetDataRelBase │ │ - [ 278a] [Strict] Alpha auxiliary image item ID [%u] is missing a mandatory ispe property │ │ - [ 27db] Box[meta] has no child boxes │ │ - [ 27f8] Box[iloc] │ │ - [ 2802] Box[minf] │ │ - [ 280c] Item ID %u extent offset failed size hint sanity check. Truncated data? │ │ - [ 2854] a1lx layer index [%d] does not fit in item size │ │ - [ 2884] SMPTE 240M │ │ - [ 288f] %s: Failed to skip %zu bytes, truncated data? │ │ - [ 28bd] libavif │ │ - [ 28c5] true │ │ - [ 28ca] c_out != ((void*)0) │ │ - [ 28de] dav1d_data_wrap_user_data_internal │ │ - [ 2901] Unknown OBU type %d of size %u\n │ │ - [ 2921] getRegister │ │ - [ 292d] r4 │ │ - [ 2930] d19 │ │ - [ 2934] Box[iloc] has an unsupported extent_index │ │ - [ 295e] out != NULL │ │ - [ 296a] dav1d_data_wrap_internal │ │ - [ 2983] c != ((void*)0) │ │ - [ 2993] s15 │ │ - [ 2997] Item ID [%u] dimensions are too large [%ux%u] │ │ - [ 29c5] Box[infe] │ │ - [ 29cf] Box[moov] │ │ - [ 29d9] Box[stts] │ │ - [ 29e3] urn:mpeg:hevc:2015:auxid:1 │ │ - [ 29fe] Exif header │ │ - [ 2a0a] Item ID %u has impossible extent size in idat buffer │ │ - [ 2a3f] Exceeded avifDecoder's imageCountLimit (progressive) │ │ - [ 2a74] Item ID %u of type '%.4s' is missing mandatory av1C property │ │ - [ 2ab1] XYZ │ │ - [ 2ab5] auxC │ │ - [ 2aba] mdhd │ │ - [ 2abf] colr │ │ - [ 2ac4] still_picture │ │ - [ 2ad2] dav1d_data_create_internal │ │ - [ 2aed] setFloatRegister │ │ - [ 2afe] d13 │ │ - [ 2b02] [Strict] cropX overflowed │ │ - [ 2b1c] hdlr │ │ - [ 2b21] a1lx │ │ - [ 2b26] Box[tref] │ │ - [ 2b30] Item ID %u tried to read %zu bytes, but only received %zu bytes │ │ - [ 2b70] Alpha plane dimensions do not match color plane dimensions │ │ - [ 2bab] s->n_threads >= 0 && s->n_threads <= DAV1D_MAX_THREADS │ │ - [ 2be2] Error parsing frame header\n │ │ - [ 2bfe] unsupported arm register │ │ - [ 2c17] lr │ │ - [ 2c1a] r9 │ │ - [ 2c1d] s8 │ │ - [ 2c20] d28 │ │ - [ 2c24] Box[a1op] │ │ - [ 2c2e] Box[a1op] contains an unsupported operating point [%u] │ │ - [ 2c65] stbl │ │ - [ 2c6a] cdsc │ │ - [ 2c6f] pasp │ │ - [ 2c74] s->allocator.release_picture_callback != NULL │ │ - [ 2ca2] sp │ │ - [ 2ca5] r12 │ │ - [ 2ca9] d21 │ │ - [ 2cad] Box[pasp] │ │ - [ 2cb7] Box[infe] has an invalid item ID [%u] │ │ - [ 2cdd] Track ID [%u] has an invalid size [%ux%u] │ │ - [ 2d07] Item ID %u read has overflowing offset │ │ - [ 2d2e] Grid image contains tile with an unsupported property marked as essential │ │ - [ 2d78] BT.470-6 System BG │ │ - [ 2d8b] %s: Failed to read %zu bytes, truncated data? │ │ - [ 2db9] XMP │ │ - [ 2dbd] imir │ │ - [ 2dc2] quantizer │ │ - [ 2dcc] dav1d_apply_grain │ │ - [ 2dde] dav1d_picture_ref │ │ - [ 2df0] during phase1 personality function said it would stop here, but now in phase2 it did not stop here │ │ - [ 2e53] s13 │ │ - [ 2e57] s20 │ │ - [ 2e5b] s22 │ │ - [ 2e5f] d1 │ │ - [ 2e62] d16 │ │ - [ 2e66] [Strict] clap height %d/%d is not an integer │ │ - [ 2e93] Multiple boxes of unique Box[pitm] found │ │ - [ 2ebc] Box[pitm] │ │ - [ 2ec6] Box[iinf] has an unsupported version %u │ │ - [ 2eee] Box[stbl] │ │ - [ 2ef8] tkhd │ │ - [ 2efd] vmhd │ │ - [ 2f02] tile_cols │ │ - [ 2f0c] dav1d_data_ref │ │ - [ 2f1b] Picture already allocated!\n │ │ - [ 2f37] setRegister │ │ - [ 2f43] s26 │ │ - [ 2f47] d12 │ │ - [ 2f4b] [Strict] croppedCenterX overflowed │ │ - [ 2f6e] Grid image width (%u) or height (%u) or tile width (%u) or height (%u) shall be even if chroma is subsampled in that dimension. See MIAF (ISO/IEC 23000-22:2019), Section 7.3.11.4.2 │ │ - [ 3023] Box[iloc] has an unsupported version [%u] │ │ - [ 304d] Box[auxC] │ │ - [ 3057] Item ID [%u] has a %s property association which must not be marked essential, but is │ │ - [ 30ad] Item ID %u has impossible extent offset in idat buffer │ │ - [ 30e4] Box[grid] │ │ - [ 30ee] tile->codec->getNextImage() failed │ │ - [ 3111] msf1 │ │ - [ 3116] ispe │ │ - [ 311b] prem │ │ - [ 3120] clap │ │ - [ 3125] width │ │ - [ 312b] height │ │ - [ 3132] s->allocator.alloc_picture_callback != NULL │ │ - [ 315e] _Unwind_VRS_Get_Internal │ │ - [ 3177] r8 │ │ - [ 317a] s19 │ │ - [ 317e] s23 │ │ - [ 3182] Primary item not found │ │ - [ 3199] iloc │ │ - [ 319e] Box[stco] │ │ - [ 31a8] Box[stsd] │ │ - [ 31b2] Exceeded avifIO's sizeHint, possibly truncated data │ │ - [ 31e6] Item ID %u reported size failed size hint sanity check. Truncated data? │ │ - [ 322e] Grid box dimensions are too large: [%u x %u] │ │ - [ 325b] iso8 │ │ - [ 3260] av1C │ │ - [ 3265] dav1d_parse_sequence_header │ │ - [ 3281] p != ((void*)0) │ │ - [ 3291] s2 │ │ - [ 3294] d4 │ │ - [ 3297] d9 │ │ - [ 329a] [Strict] cropY overflowed │ │ - [ 32b4] [Strict] calculated crop Y offset %d/%d is not an integer │ │ - [ 32ee] lsel │ │ - [ 32f3] Grid box contains illegal field length: [%u] │ │ - [ 3320] Grid image of dimensions %ux%u requires %u tiles, and only %u were found │ │ - [ 3369] Error parsing sequence header\n │ │ - [ 3388] s28 │ │ - [ 338c] d0 │ │ - [ 338f] unknown register │ │ - [ 33a0] Failed to find AV1 color track's color properties │ │ - [ 33d2] Box[iloc] has an unsupported construction method [%u] │ │ - [ 3408] urn:mpeg:mpegB:cicp:systems:auxiliary:alpha │ │ - [ 3434] Grid image contains mismatched tiles │ │ - [ 3459] BT.2020 │ │ - [ 3461] ipco │ │ - [ 3466] tref │ │ - [ 346b] stsz │ │ - [ 3470] dav1d_log │ │ - [ 347a] Overrun in OBU bit buffer\n │ │ - [ 3495] s24 │ │ - [ 3499] _Unwind_GetTextRelBase() not implemented │ │ - [ 34c2] [Strict] crop rect Y offset and height must both be even due to this image's YUV subsampling │ │ - [ 351f] idat box has a length of 0 │ │ - [ 353a] Box[a1lx] has bits set in the reserved section [%u] │ │ - [ 356e] lsel property requests layer index [%u] which isn't present in a1lx property ([%u] layers) │ │ - [ 35c9] pixi │ │ - [ 35ce] url │ │ - [ 35d3] stss │ │ - [ 35d8] ccst │ │ - [ 35dd] auxl │ │ - [ 35e2] in->data == NULL || in->sz │ │ - [ 35fd] dav1d_get_decode_error_data_props │ │ - [ 361f] buf != NULL │ │ - [ 362b] src != ((void*)0) │ │ - [ 363d] src->data != ((void*)0) │ │ - [ 3655] Invalid descriptor kind found. │ │ - [ 3674] [Strict] clap contains a denominator that is not strictly positive │ │ - [ 36b7] Grid image tile width (%u) or height (%u) cannot be smaller than 64. See MIAF (ISO/IEC 23000-22:2019), Section 7.3.11.4.2 │ │ - [ 3731] Item ID [%u] has an invalid size [%ux%u] │ │ - [ 375a] Item ID [%u] is missing a mandatory ispe property │ │ - [ 378c] iinf │ │ - [ 3791] Multiple Box[ipma] with a given pair of values of version and flags. See HEIF (ISO 23008-12:2017) 9.3.1 │ │ - [ 37f9] Box[ipco] │ │ - [ 3803] Box[iinf] contains a box that isn't type 'infe' │ │ - [ 3833] %s: Expecting box version %u, got version %u │ │ - [ 3860] MA1B │ │ - [ 3865] nclx │ │ - [ 386a] c_out != NULL │ │ - [ 3878] s7 │ │ - [ 387b] d22 │ │ - [ 387f] Box[ispe] │ │ - [ 3889] SMPTE ST 240 │ │ - [ 3896] miaf │ │ - [ 389b] trak │ │ - [ 38a0] Exif │ │ - [ 38a5] dst != ((void*)0) │ │ - [ 38b7] _Unwind_Resume │ │ - [ 38c6] unsupported register class │ │ - [ 38e1] r10 │ │ - [ 38e5] d6 │ │ - [ 38e8] rav1e │ │ - [ 38ee] Box[ftyp] │ │ - [ 38f8] Box[iprp] contains a box that isn't type 'ipma' │ │ - [ 3928] Box[colr] │ │ - [ 3932] Duplicate Box[ipma] for item ID [%u] │ │ - [ 3957] Item ID %u has %zu unexpected trailing bytes │ │ - [ 3984] avifImageLimitedToFullAlpha failed │ │ - [ 39a7] %s: Failed to read UX8 value; Unsupported UX8 factor [%llu] │ │ - [ 39e3] stco │ │ - [ 39e8] mdat │ │ - [ 39ed] c != NULL │ │ - [ 39f7] dav1d_get_event_flags │ │ - [ 3a0d] props != ((void*)0) │ │ - [ 3a21] src->data[0] != ((void*)0) │ │ - [ 3a3c] Unknown ARM float register │ │ - [ 3a57] r2 │ │ - [ 3a5a] s6 │ │ - [ 3a5d] [Strict] clap width or height is negative │ │ - [ 3a87] Box[imir] │ │ - [ 3a91] Box[mdhd] │ │ - [ 3a9b] Box[stsc] chunks are not strictly increasing │ │ - [ 3ac8] ipma │ │ - [ 3acd] dref │ │ - [ 3ad2] s != NULL │ │ - [ 3adc] dav1d_close │ │ - [ 3ae8] d10 │ │ - [ 3aec] Box[irot] contains nonzero reserved bits [%u] │ │ - [ 3b1a] Box[imir] contains nonzero reserved bits [%u] │ │ - [ 3b48] Item ID [%u] has a %s property association which must be marked essential, but is not │ │ - [ 3b9e] Box[iref] has an invalid item ID dimg ref [%u] │ │ - [ 3bcd] Track ID [%u] dimensions are too large [%ux%u] │ │ - [ 3bfc] Grid image tiles do not completely cover the image (HEIF (ISO/IEC 23008-12:2017), Section 6.6.2.3.1) │ │ - [ 3c61] SMPTE EG 432-1 (DCI P3) │ │ - [ 3c79] avifImageScale() called, but is unimplemented without libyuv! │ │ - [ 3cb7] av01 │ │ - [ 3cbc] s->operating_point >= 0 && s->operating_point <= 31 │ │ - [ 3cf0] dav1d-worker │ │ - [ 3cfd] dav1d_picture_unref_internal │ │ - [ 3d1a] index inlined table detected but pr function requires extra words │ │ - [ 3d5c] s9 │ │ - [ 3d5f] s29 │ │ - [ 3d63] d15 │ │ - [ 3d67] d17 │ │ - [ 3d6b] idat │ │ - [ 3d70] Item ID [%u] contains duplicate sets of extents │ │ - [ 3da0] Box[clap] │ │ - [ 3daa] Box[iinf] │ │ - [ 3db4] Grid image tiles in the rightmost column and bottommost row do not overlap the reconstructed image grid canvas. See MIAF (ISO/IEC 23000-22:2019), Section 7.3.11.4.2, Figure 2 │ │ - [ 3e63] infe │ │ - [ 3e68] irot │ │ - [ 3e6d] tile_rows │ │ - [ 3e77] _Unwind_VRS_Pop │ │ - [ 3e87] ProcessDescriptors │ │ - [ 3e9a] s30 │ │ - [ 3e9e] d18 │ │ + [ 1741] 1.0.0-0-g99172b11 │ │ + [ 1753] getFloatRegister │ │ + [ 1764] r5 │ │ + [ 1767] d26 │ │ + [ 176b] Box[hdlr] handler_type is not 'pict' │ │ + [ 1790] Box[iloc] has an invalid item ID [%u] │ │ + [ 17b6] Item ID [%u] contains an extent length which overflows: [%llu] │ │ + [ 17f5] Meta box contains multiple idat boxes │ │ + [ 181b] av1C contains illegal marker and version pair: [%u] │ │ + [ 184f] Box[lsel] │ │ + [ 1859] Grid box contains illegal dimensions: [%u x %u] │ │ + [ 1889] SMPTE RP 431-2 │ │ + [ 1898] MA1A │ │ + [ 189d] dinf │ │ + [ 18a2] stsd │ │ + [ 18a7] libunwind: %s - %s\n │ │ + [ 18bb] s11 │ │ + [ 18bf] d14 │ │ + [ 18c3] Primary item not specified │ │ + [ 18de] Item ID [%u] contains an extent length which overflows the item size: [%zu, %zu] │ │ + [ 192f] Box[pixi] │ │ + [ 1939] Image allocation failure │ │ + [ 1952] s->max_frame_delay >= 0 && s->max_frame_delay <= DAV1D_MAX_FRAME_DELAY │ │ + [ 1999] dst->data == ((void*)0) │ │ + [ 19b1] _Unwind_VRS_Set │ │ + [ 19c1] Type matching not implemented │ │ + [ 19df] s18 │ │ + [ 19e3] Box[ftyp] contains a compatible brands section that isn't divisible by 4 [%zu] │ │ + [ 1a32] Box[%s] contains a duplicate unique box of type '%s' │ │ + [ 1a67] a1op │ │ + [ 1a6c] Duplicate Box[stbl] for a single track detected │ │ + [ 1a9c] Box[co64] │ │ + [ 1aa6] prof │ │ + [ 1aab] Input validation check '%s' failed in %s!\n │ │ + [ 1ad6] flags != NULL │ │ + [ 1ae4] dst->data[0] == ((void*)0) │ │ + [ 1aff] dav1d_picture_move_ref │ │ + [ 1b16] s3 │ │ + [ 1b19] d25 │ │ + [ 1b1d] iref │ │ + [ 1b22] Box[trak] │ │ + [ 1b2c] Truncated sample table │ │ + [ 1b43] Item ID %u depth specified by pixi property [%u] does not match av1C property depth [%u] │ │ + [ 1b9c] BT.709 │ │ + [ 1ba3] mime │ │ + [ 1ba8] free_callback != NULL │ │ + [ 1bbe] Error parsing OBU data\n │ │ + [ 1bd6] p->data[0] != ((void*)0) │ │ + [ 1bef] pc │ │ + [ 1bf2] s4 │ │ + [ 1bf5] s5 │ │ + [ 1bf8] s14 │ │ + [ 1bfc] d2 │ │ + [ 1bff] d8 │ │ + [ 1c02] d11 │ │ + [ 1c06] d24 │ │ + [ 1c0a] d31 │ │ + [ 1c0e] Box[stsc] │ │ + [ 1c18] Grid image's first tile is missing an av1C property │ │ + [ 1c4c] BT.470-6 System M │ │ + [ 1c5e] mif1 │ │ + [ 1c63] min_quantizer │ │ + [ 1c71] buf->data != ((void*)0) │ │ + [ 1c89] _Unwind_Resume() can't return │ │ + [ 1ca7] s17 │ │ + [ 1cab] d30 │ │ + [ 1caf] meta │ │ + [ 1cb4] Box[av1C] │ │ + [ 1cbe] Box[ipma] item IDs are not ordered by increasing ID │ │ + [ 1cf2] Box[iref] has an invalid item ID [%u] │ │ + [ 1d18] Exceeded avifDecoder's imageCountLimit │ │ + [ 1d3f] FCC USFC 73.682 │ │ + [ 1d4f] %s: Child box too large, possibly truncated data │ │ + [ 1d80] minf │ │ + [ 1d85] in != NULL │ │ + [ 1d90] ptr != NULL │ │ + [ 1d9c] buf != ((void*)0) │ │ + [ 1dae] Failed to wrap picture: %s\n │ │ + [ 1dca] r11 │ │ + [ 1dce] s12 │ │ + [ 1dd2] s21 │ │ + [ 1dd6] d7 │ │ + [ 1dd9] [Strict] clap width %d/%d is not an integer │ │ + [ 1e05] [Strict] calculated crop X offset %d/%d is not an integer │ │ + [ 1e3f] [Strict] crop rect X offset and width must both be even due to this image's YUV subsampling │ │ + [ 1e9b] Box[meta] does not have a Box[hdlr] as its first child box │ │ + [ 1ed6] Box[lsel] contains an unsupported layer [%u] │ │ + [ 1f03] Box[ipma] has an invalid item ID [%u] │ │ + [ 1f29] Box[stsc] does not begin with chunk 1 [%u] │ │ + [ 1f54] Sample table contains a chunk with 0 samples │ │ + [ 1f81] ftyp │ │ + [ 1f86] pict │ │ + [ 1f8b] moov │ │ + [ 1f90] mdia │ │ + [ 1f95] stts │ │ + [ 1f9a] grid │ │ + [ 1f9f] threads │ │ + [ 1fa7] r1 │ │ + [ 1faa] r6 │ │ + [ 1fad] r7 │ │ + [ 1fb0] _Unwind_GetTextRelBase │ │ + [ 1fc7] [Strict] crop rect width and height must be nonzero │ │ + [ 1ffb] dav1d │ │ + [ 2001] Failed to find Box[ipco] as the first box in Box[iprp] │ │ + [ 2038] Generic film │ │ + [ 2045] auxv │ │ + [ 204b] AOM Coding │ │ + [ 2056] auxi │ │ + [ 205b] dav1d_send_data │ │ + [ 206b] Frame size %dx%d exceeds limit %u\n │ │ + [ 208e] Malformed ITU-T T.35 metadata message format\n │ │ + [ 20bc] Unknown Metadata OBU type %d\n │ │ + [ 20da] s1 │ │ + [ 20dd] d20 │ │ + [ 20e1] d29 │ │ + [ 20e5] [Strict] crop rect is out of the image's bounds │ │ + [ 2115] BT.2020 (non-constant luminance) │ │ + [ 2136] mvhd │ │ + [ 213b] Color │ │ + [ 2141] speed │ │ + [ 2147] dav1d_open │ │ + [ 2152] Compiled without support for %d-bit decoding\n │ │ + [ 2180] s10 │ │ + [ 2184] s16 │ │ + [ 2188] s25 │ │ + [ 218c] [Strict] at least one crop offset is not positive │ │ + [ 21be] pitm │ │ + [ 21c3] Box[a1lx] │ │ + [ 21cd] Box[ipma] for item ID [%u] contains an illegal property index [%u] (out of [%u] properties) │ │ + [ 2229] Box[iref] │ │ + [ 2233] %s: Failed to find a NULL terminator when reading a string │ │ + [ 226e] %s: Header size overflow check failure │ │ + [ 2295] getInfoFromEHABISection │ │ + [ 22ad] r0 │ │ + [ 22b0] s27 │ │ + [ 22b4] d3 │ │ + [ 22b7] d27 │ │ + [ 22bb] Box[meta] │ │ + [ 22c5] iprp │ │ + [ 22ca] Box[iprp] │ │ + [ 22d4] Box[irot] │ │ + [ 22de] Box[tkhd] has an unsupported version [%u] │ │ + [ 2308] Box[stsz] │ │ + [ 2312] Item ID %u has zero extents │ │ + [ 232e] avifImageScale() failed │ │ + [ 2346] stsc │ │ + [ 234b] dav1d_get_picture │ │ + [ 235d] dav1d_data_props_unref_internal │ │ + [ 237d] r3 │ │ + [ 2380] _Unwind_GetDataRelBase() not implemented │ │ + [ 23a9] [Strict] image width %u or height %u is greater than INT32_MAX │ │ + [ 23e8] [Strict] croppedCenterY overflowed │ │ + [ 240b] decoder->image does not match srcAlpha in width, height, or bit depth │ │ + [ 2451] Box[tkhd] │ │ + [ 245b] Box[stss] │ │ + [ 2465] Sample table contains an offset/size pair which overflows: [%llu / %u] │ │ + [ 24ac] Box[grid] has unsupported version [%u] │ │ + [ 24d3] avif │ │ + [ 24d8] avis │ │ + [ 24dd] Frame size limit reduced from %u to %u.\n │ │ + [ 2506] unwind_phase2 │ │ + [ 2514] d5 │ │ + [ 2517] Failed to find AV1 color track │ │ + [ 2536] Box[hdlr] │ │ + [ 2540] Box[hdlr] contains a pre_defined value that is nonzero │ │ + [ 2577] Item ID [%u] contains an extent offset which overflows: [base: %llu offset:%llu] │ │ + [ 25c8] Box[ipma] │ │ + [ 25d2] %s: Expecting box version 2 or 3, got version %u │ │ + [ 2603] Box[mdia] │ │ + [ 260d] Item ID %u is stored in an idat, but no associated idat box was found │ │ + [ 2653] [Strict] Item ID %u of type '%.4s' is missing mandatory pixi property │ │ + [ 2699] [Strict] Item ID %u is missing an ispe property, so its clap property cannot be validated │ │ + [ 26f3] EBU Tech. 3213-E │ │ + [ 2704] Alpha │ │ + [ 270a] dav1d_data_unref_internal │ │ + [ 2724] Overrun in OBU bit buffer into next OBU\n │ │ + [ 274d] unknown personality routine │ │ + [ 2769] s0 │ │ + [ 276c] s31 │ │ + [ 2770] d23 │ │ + [ 2774] _Unwind_GetDataRelBase │ │ + [ 278b] [Strict] Alpha auxiliary image item ID [%u] is missing a mandatory ispe property │ │ + [ 27dc] Box[meta] has no child boxes │ │ + [ 27f9] Box[iloc] │ │ + [ 2803] Box[minf] │ │ + [ 280d] Item ID %u extent offset failed size hint sanity check. Truncated data? │ │ + [ 2855] a1lx layer index [%d] does not fit in item size │ │ + [ 2885] SMPTE 240M │ │ + [ 2890] %s: Failed to skip %zu bytes, truncated data? │ │ + [ 28be] libavif │ │ + [ 28c6] true │ │ + [ 28cb] c_out != ((void*)0) │ │ + [ 28df] dav1d_data_wrap_user_data_internal │ │ + [ 2902] Unknown OBU type %d of size %u\n │ │ + [ 2922] getRegister │ │ + [ 292e] r4 │ │ + [ 2931] d19 │ │ + [ 2935] Box[iloc] has an unsupported extent_index │ │ + [ 295f] out != NULL │ │ + [ 296b] dav1d_data_wrap_internal │ │ + [ 2984] c != ((void*)0) │ │ + [ 2994] s15 │ │ + [ 2998] Item ID [%u] dimensions are too large [%ux%u] │ │ + [ 29c6] Box[infe] │ │ + [ 29d0] Box[moov] │ │ + [ 29da] Box[stts] │ │ + [ 29e4] urn:mpeg:hevc:2015:auxid:1 │ │ + [ 29ff] Exif header │ │ + [ 2a0b] Item ID %u has impossible extent size in idat buffer │ │ + [ 2a40] Exceeded avifDecoder's imageCountLimit (progressive) │ │ + [ 2a75] Item ID %u of type '%.4s' is missing mandatory av1C property │ │ + [ 2ab2] XYZ │ │ + [ 2ab6] auxC │ │ + [ 2abb] mdhd │ │ + [ 2ac0] colr │ │ + [ 2ac5] still_picture │ │ + [ 2ad3] dav1d_data_create_internal │ │ + [ 2aee] setFloatRegister │ │ + [ 2aff] d13 │ │ + [ 2b03] [Strict] cropX overflowed │ │ + [ 2b1d] hdlr │ │ + [ 2b22] a1lx │ │ + [ 2b27] Box[tref] │ │ + [ 2b31] Item ID %u tried to read %zu bytes, but only received %zu bytes │ │ + [ 2b71] Alpha plane dimensions do not match color plane dimensions │ │ + [ 2bac] s->n_threads >= 0 && s->n_threads <= DAV1D_MAX_THREADS │ │ + [ 2be3] Error parsing frame header\n │ │ + [ 2bff] unsupported arm register │ │ + [ 2c18] lr │ │ + [ 2c1b] r9 │ │ + [ 2c1e] s8 │ │ + [ 2c21] d28 │ │ + [ 2c25] Box[a1op] │ │ + [ 2c2f] Box[a1op] contains an unsupported operating point [%u] │ │ + [ 2c66] stbl │ │ + [ 2c6b] cdsc │ │ + [ 2c70] pasp │ │ + [ 2c75] s->allocator.release_picture_callback != NULL │ │ + [ 2ca3] sp │ │ + [ 2ca6] r12 │ │ + [ 2caa] d21 │ │ + [ 2cae] Box[pasp] │ │ + [ 2cb8] Box[infe] has an invalid item ID [%u] │ │ + [ 2cde] Track ID [%u] has an invalid size [%ux%u] │ │ + [ 2d08] Item ID %u read has overflowing offset │ │ + [ 2d2f] Grid image contains tile with an unsupported property marked as essential │ │ + [ 2d79] BT.470-6 System BG │ │ + [ 2d8c] %s: Failed to read %zu bytes, truncated data? │ │ + [ 2dba] XMP │ │ + [ 2dbe] imir │ │ + [ 2dc3] quantizer │ │ + [ 2dcd] dav1d_apply_grain │ │ + [ 2ddf] dav1d_picture_ref │ │ + [ 2df1] during phase1 personality function said it would stop here, but now in phase2 it did not stop here │ │ + [ 2e54] s13 │ │ + [ 2e58] s20 │ │ + [ 2e5c] s22 │ │ + [ 2e60] d1 │ │ + [ 2e63] d16 │ │ + [ 2e67] [Strict] clap height %d/%d is not an integer │ │ + [ 2e94] Multiple boxes of unique Box[pitm] found │ │ + [ 2ebd] Box[pitm] │ │ + [ 2ec7] Box[iinf] has an unsupported version %u │ │ + [ 2eef] Box[stbl] │ │ + [ 2ef9] tkhd │ │ + [ 2efe] vmhd │ │ + [ 2f03] tile_cols │ │ + [ 2f0d] dav1d_data_ref │ │ + [ 2f1c] Picture already allocated!\n │ │ + [ 2f38] setRegister │ │ + [ 2f44] s26 │ │ + [ 2f48] d12 │ │ + [ 2f4c] [Strict] croppedCenterX overflowed │ │ + [ 2f6f] Grid image width (%u) or height (%u) or tile width (%u) or height (%u) shall be even if chroma is subsampled in that dimension. See MIAF (ISO/IEC 23000-22:2019), Section 7.3.11.4.2 │ │ + [ 3024] Box[iloc] has an unsupported version [%u] │ │ + [ 304e] Box[auxC] │ │ + [ 3058] Item ID [%u] has a %s property association which must not be marked essential, but is │ │ + [ 30ae] Item ID %u has impossible extent offset in idat buffer │ │ + [ 30e5] Box[grid] │ │ + [ 30ef] tile->codec->getNextImage() failed │ │ + [ 3112] msf1 │ │ + [ 3117] ispe │ │ + [ 311c] prem │ │ + [ 3121] clap │ │ + [ 3126] width │ │ + [ 312c] height │ │ + [ 3133] s->allocator.alloc_picture_callback != NULL │ │ + [ 315f] _Unwind_VRS_Get_Internal │ │ + [ 3178] r8 │ │ + [ 317b] s19 │ │ + [ 317f] s23 │ │ + [ 3183] Primary item not found │ │ + [ 319a] iloc │ │ + [ 319f] Box[stco] │ │ + [ 31a9] Box[stsd] │ │ + [ 31b3] Exceeded avifIO's sizeHint, possibly truncated data │ │ + [ 31e7] Item ID %u reported size failed size hint sanity check. Truncated data? │ │ + [ 322f] Grid box dimensions are too large: [%u x %u] │ │ + [ 325c] iso8 │ │ + [ 3261] av1C │ │ + [ 3266] dav1d_parse_sequence_header │ │ + [ 3282] p != ((void*)0) │ │ + [ 3292] s2 │ │ + [ 3295] d4 │ │ + [ 3298] d9 │ │ + [ 329b] [Strict] cropY overflowed │ │ + [ 32b5] [Strict] calculated crop Y offset %d/%d is not an integer │ │ + [ 32ef] lsel │ │ + [ 32f4] Grid box contains illegal field length: [%u] │ │ + [ 3321] Grid image of dimensions %ux%u requires %u tiles, and only %u were found │ │ + [ 336a] Error parsing sequence header\n │ │ + [ 3389] s28 │ │ + [ 338d] d0 │ │ + [ 3390] unknown register │ │ + [ 33a1] Failed to find AV1 color track's color properties │ │ + [ 33d3] Box[iloc] has an unsupported construction method [%u] │ │ + [ 3409] urn:mpeg:mpegB:cicp:systems:auxiliary:alpha │ │ + [ 3435] Grid image contains mismatched tiles │ │ + [ 345a] BT.2020 │ │ + [ 3462] ipco │ │ + [ 3467] tref │ │ + [ 346c] stsz │ │ + [ 3471] dav1d_log │ │ + [ 347b] Overrun in OBU bit buffer\n │ │ + [ 3496] s24 │ │ + [ 349a] _Unwind_GetTextRelBase() not implemented │ │ + [ 34c3] [Strict] crop rect Y offset and height must both be even due to this image's YUV subsampling │ │ + [ 3520] idat box has a length of 0 │ │ + [ 353b] Box[a1lx] has bits set in the reserved section [%u] │ │ + [ 356f] lsel property requests layer index [%u] which isn't present in a1lx property ([%u] layers) │ │ + [ 35ca] pixi │ │ + [ 35cf] url │ │ + [ 35d4] stss │ │ + [ 35d9] ccst │ │ + [ 35de] auxl │ │ + [ 35e3] in->data == NULL || in->sz │ │ + [ 35fe] dav1d_get_decode_error_data_props │ │ + [ 3620] buf != NULL │ │ + [ 362c] src != ((void*)0) │ │ + [ 363e] src->data != ((void*)0) │ │ + [ 3656] Invalid descriptor kind found. │ │ + [ 3675] [Strict] clap contains a denominator that is not strictly positive │ │ + [ 36b8] Grid image tile width (%u) or height (%u) cannot be smaller than 64. See MIAF (ISO/IEC 23000-22:2019), Section 7.3.11.4.2 │ │ + [ 3732] Item ID [%u] has an invalid size [%ux%u] │ │ + [ 375b] Item ID [%u] is missing a mandatory ispe property │ │ + [ 378d] iinf │ │ + [ 3792] Multiple Box[ipma] with a given pair of values of version and flags. See HEIF (ISO 23008-12:2017) 9.3.1 │ │ + [ 37fa] Box[ipco] │ │ + [ 3804] Box[iinf] contains a box that isn't type 'infe' │ │ + [ 3834] %s: Expecting box version %u, got version %u │ │ + [ 3861] MA1B │ │ + [ 3866] nclx │ │ + [ 386b] c_out != NULL │ │ + [ 3879] s7 │ │ + [ 387c] d22 │ │ + [ 3880] Box[ispe] │ │ + [ 388a] SMPTE ST 240 │ │ + [ 3897] miaf │ │ + [ 389c] trak │ │ + [ 38a1] Exif │ │ + [ 38a6] dst != ((void*)0) │ │ + [ 38b8] _Unwind_Resume │ │ + [ 38c7] unsupported register class │ │ + [ 38e2] r10 │ │ + [ 38e6] d6 │ │ + [ 38e9] rav1e │ │ + [ 38ef] Box[ftyp] │ │ + [ 38f9] Box[iprp] contains a box that isn't type 'ipma' │ │ + [ 3929] Box[colr] │ │ + [ 3933] Duplicate Box[ipma] for item ID [%u] │ │ + [ 3958] Item ID %u has %zu unexpected trailing bytes │ │ + [ 3985] avifImageLimitedToFullAlpha failed │ │ + [ 39a8] %s: Failed to read UX8 value; Unsupported UX8 factor [%llu] │ │ + [ 39e4] stco │ │ + [ 39e9] mdat │ │ + [ 39ee] c != NULL │ │ + [ 39f8] dav1d_get_event_flags │ │ + [ 3a0e] props != ((void*)0) │ │ + [ 3a22] src->data[0] != ((void*)0) │ │ + [ 3a3d] Unknown ARM float register │ │ + [ 3a58] r2 │ │ + [ 3a5b] s6 │ │ + [ 3a5e] [Strict] clap width or height is negative │ │ + [ 3a88] Box[imir] │ │ + [ 3a92] Box[mdhd] │ │ + [ 3a9c] Box[stsc] chunks are not strictly increasing │ │ + [ 3ac9] ipma │ │ + [ 3ace] dref │ │ + [ 3ad3] s != NULL │ │ + [ 3add] dav1d_close │ │ + [ 3ae9] d10 │ │ + [ 3aed] Box[irot] contains nonzero reserved bits [%u] │ │ + [ 3b1b] Box[imir] contains nonzero reserved bits [%u] │ │ + [ 3b49] Item ID [%u] has a %s property association which must be marked essential, but is not │ │ + [ 3b9f] Box[iref] has an invalid item ID dimg ref [%u] │ │ + [ 3bce] Track ID [%u] dimensions are too large [%ux%u] │ │ + [ 3bfd] Grid image tiles do not completely cover the image (HEIF (ISO/IEC 23008-12:2017), Section 6.6.2.3.1) │ │ + [ 3c62] SMPTE EG 432-1 (DCI P3) │ │ + [ 3c7a] avifImageScale() called, but is unimplemented without libyuv! │ │ + [ 3cb8] av01 │ │ + [ 3cbd] s->operating_point >= 0 && s->operating_point <= 31 │ │ + [ 3cf1] dav1d-worker │ │ + [ 3cfe] dav1d_picture_unref_internal │ │ + [ 3d1b] index inlined table detected but pr function requires extra words │ │ + [ 3d5d] s9 │ │ + [ 3d60] s29 │ │ + [ 3d64] d15 │ │ + [ 3d68] d17 │ │ + [ 3d6c] idat │ │ + [ 3d71] Item ID [%u] contains duplicate sets of extents │ │ + [ 3da1] Box[clap] │ │ + [ 3dab] Box[iinf] │ │ + [ 3db5] Grid image tiles in the rightmost column and bottommost row do not overlap the reconstructed image grid canvas. See MIAF (ISO/IEC 23000-22:2019), Section 7.3.11.4.2, Figure 2 │ │ + [ 3e64] infe │ │ + [ 3e69] irot │ │ + [ 3e6e] tile_rows │ │ + [ 3e78] _Unwind_VRS_Pop │ │ + [ 3e88] ProcessDescriptors │ │ + [ 3e9b] s30 │ │ + [ 3e9f] d18 │ │ [ 3ec0] application/rdf+xml │ │ [ 3ed4] urn:mpeg:mpegB:cicp:systems:auxiliary:alpha │ │ [ 3f20] @ │ │ [ 3f24] application/rdf+xml │ │ [ 3f38] ()a Display implementation returned an error unexpectedly/rustc/90b35a6239c3d8bdabc530a6a0816f7ff89a0aaf/library/alloc/src/string.rscalled `Result::unwrap()` on an `Err` valuefalseError/rustc/90b35a6239c3d8bdabc530a6a0816f7ff89a0aaf/library/alloc/src/collections/btree/map/entry.rsParseIntErrorTryFromIntError/rustc/90b35a6239c3d8bdabc530a6a0816f7ff89a0aaf/library/core/src/slice/iter.rsNormal operation │ │ [ 40cc] The encoder needs more data to produce an output packet │ │ [ 4104] There are enough frames in the queue │ ├── objdump --line-numbers --disassemble --demangle --reloc --no-show-raw-insn --section=.text {} │ │ @@ -23390,26 +23390,26 @@ │ │ b.n 7e894 │ │ lsls r4, r4, #8 │ │ add.w r0, r0, r0 │ │ b.n 7eebe │ │ beq.n 7e7b8 │ │ b.n 7ec18 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r3, r4, r7} │ │ - vrsra.u64 q8, , #6 │ │ - vrintp.f32 d30, d12 │ │ - vqshl.u64 d31, d26, #57 @ 0x39 │ │ - @ instruction: 0xfff9ebf4 │ │ - vqshl.u32 , , #25 │ │ - @ instruction: 0xfff9ebfb │ │ - vrshr.u64 , q13, #7 │ │ - vqshlu.s32 q15, q10, #25 │ │ - vtbl.8 d31, {d9-d11}, d10 │ │ - vtbx.8 d31, {d9-d11}, d0 │ │ - @ instruction: 0xfff9e893 │ │ + ldmia.w sp!, {r0, r3, r4, r7} │ │ + vrsra.u64 q8, q11, #6 │ │ + vrintp.f32 d30, d13 │ │ + vqshl.u64 d31, d27, #57 @ 0x39 │ │ + @ instruction: 0xfff9ebf5 │ │ + vqshl.u32 , q14, #25 │ │ + @ instruction: 0xfff9ebfc │ │ + vrshr.u64 , , #7 │ │ + vqshlu.s32 q15, , #25 │ │ + vtbl.8 d31, {d9-d11}, d11 │ │ + vtbx.8 d31, {d9-d11}, d1 │ │ + @ instruction: 0xfff9e894 │ │ @ instruction: 0xfff94bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ b.n 7ecd8 │ │ movs r0, r0 │ │ b.n 7ee62 │ │ strh r0, [r0, #0] │ │ b.n 7eb06 │ │ @@ -24025,18 +24025,18 @@ │ │ b.n 7ee20 │ │ @ instruction: 0xffdfeaff │ │ asrs r4, r1, #32 │ │ b.n 7e848 │ │ asrs r1, r0, #32 │ │ b.n 7ee2c │ │ @ instruction: 0xffdceaff │ │ - b.n 7f0b0 │ │ - vrshr.u64 d30, d28, #7 │ │ - @ instruction: 0xfff9dfae │ │ - vqshlu.s32 d31, d30, #25 │ │ + b.n 7f0b2 │ │ + vrshr.u64 d30, d29, #7 │ │ + @ instruction: 0xfff9dfaf │ │ + vqshlu.s32 d31, d31, #25 │ │ vqshrun.s64 d20, q8, #7 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 7f244 │ │ beq.n 7ed3c │ │ b.n 7f1c8 │ │ stmia r0!, {r1} │ │ b.n 7f072 │ │ @@ -24101,16 +24101,16 @@ │ │ add.w r0, r0, r0, lsl #12 │ │ b.n 7f4ee │ │ movs r3, r0 │ │ b.n 7f0f2 │ │ beq.n 7edc4 │ │ b.n 7f24c │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r0, r1, r4, r6, r7, r8, r9, sl, ip, sp, lr, pc} │ │ - vcgt.s32 , q3, #0 │ │ + ldmia.w sp!, {r2, r4, r6, r7, r8, r9, sl, ip, sp, lr, pc} │ │ + vcgt.s32 , , #0 │ │ vcvt.f16.u16 d20, d0, #7 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 7f2e4 │ │ movs r0, r2 │ │ b.n 7f50e │ │ lsls r5, r6, #5 │ │ add.w r0, r0, r8, lsl #4 │ │ @@ -24999,16 +24999,16 @@ │ │ movs r4, r1 │ │ asrs r4, r0, #22 │ │ movs r5, r0 │ │ b.n 7f8da │ │ beq.n 7f5bc │ │ b.n 7fa34 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r1, r3, r4, r5, r6, r9, ip, sp, lr, pc} │ │ - vabs.s32 d29, d6 │ │ + ldmia.w sp!, {r0, r1, r3, r4, r5, r6, r9, ip, sp, lr, pc} │ │ + vabs.s32 d29, d7 │ │ vcgt.s32 d18, d0, #0 │ │ b.n 7f0ce │ │ stmia r6!, {r0, r5, r6} │ │ b.n 7fbc0 │ │ stmia r6!, {r0, r3, r5, r6} │ │ b.n 7fc42 │ │ asrs r1, r0, #32 │ │ @@ -27098,20 +27098,20 @@ │ │ @ instruction: 0xeb00a000 │ │ b.n 80ea6 │ │ movs r2, r1 │ │ b.n 80aaa │ │ beq.n 807a4 │ │ b.n 80c04 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r1, r2, r4, r5, r6, fp, ip, lr, pc} │ │ - vcle.f32 q15, q5, #0 │ │ - vqrdmlah.s q14, , d14[0] │ │ - @ instruction: 0xfff9e8bc │ │ - vqrdmlah.s , , d31[0] │ │ - vqshlu.s64 d30, d12, #57 @ 0x39 │ │ + ldmia.w sp!, {r0, r1, r2, r4, r5, r6, fp, ip, lr, pc} │ │ + vcle.f32 q15, , #0 │ │ + vqrdmlah.s q14, , d15[0] │ │ + @ instruction: 0xfff9e8bd │ │ + vcvt.f32.u32 , q8, #7 │ │ + vqshlu.s64 d30, d13, #57 @ 0x39 │ │ vqshrun.s64 d20, q8, #7 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 80cac │ │ ands r0, r0 │ │ b.n 80ad6 │ │ movs r1, r0 │ │ b.n 80ada │ │ @@ -29502,15 +29502,15 @@ │ │ lsls r4, r5, #1 │ │ b.n 817cc │ │ movs r0, r0 │ │ b.n 82336 │ │ movs r6, r7 │ │ subs r0, r0, r0 │ │ lsls r3, r0, #1 │ │ - @ instruction: 0xea00cba3 │ │ + @ instruction: 0xea00cba4 │ │ vcgt.s32 q13, q12, #0 │ │ b.n 817c0 │ │ str r4, [r7, #4] │ │ b.n 817e4 │ │ lsls r0, r7, #1 │ │ b.n 817e8 │ │ movs r0, r0 │ │ @@ -29527,15 +29527,15 @@ │ │ movs r6, r7 │ │ and.w r0, r0, r0, lsl #8 │ │ b.n 8240e │ │ movs r7, r0 │ │ and.w r0, r0, r1, lsl #8 │ │ b.n 82416 │ │ movs r5, r0 │ │ - @ instruction: 0xea00bc7d │ │ + @ instruction: 0xea00bc7e │ │ vcgt.s32 d18, d0, #0 │ │ b.n 82022 │ │ str r4, [r7, #4] │ │ b.n 81820 │ │ movs r0, r0 │ │ b.n 81f8e │ │ movs r0, #0 │ │ @@ -29730,15 +29730,15 @@ │ │ movs r6, r1 │ │ @ instruction: 0xea00a014 │ │ b.n 825c6 │ │ @ instruction: 0xfa8deaff │ │ add r0, pc, #8 @ (adr r0, 81e94 ) │ │ b.n 825ce │ │ @ instruction: 0xfa8beaff │ │ - stmia r4!, {r2, r3} │ │ + stmia r4!, {r0, r2, r3} │ │ vcgt.s32 d16, d24, #0 │ │ b.n 81a42 │ │ str r7, [r4, #36] @ 0x24 │ │ b.n 824ac │ │ adds r0, #172 @ 0xac │ │ b.n 825e2 │ │ str r1, [r5, #68] @ 0x44 │ │ @@ -29806,15 +29806,15 @@ │ │ b.n 82428 │ │ movs r0, #1 │ │ b.n 823ce │ │ @ instruction: 0xfff91aff │ │ movs r0, #3 │ │ b.n 82272 │ │ movs r0, r3 │ │ - @ instruction: 0xea00c4ee │ │ + @ instruction: 0xea00c4ef │ │ vcgt.s32 d16, d0, #0 │ │ b.n 825e4 │ │ movs r0, #3 │ │ b.n 82282 │ │ movs r4, r2 │ │ lsrs r0, r0, #8 │ │ adds r0, #8 │ │ @@ -29865,15 +29865,15 @@ │ │ lsrs r0, r0, #8 │ │ movs r0, #72 @ 0x48 │ │ b.n 824ae │ │ movs r1, r0 │ │ b.n 8244e │ │ @ instruction: 0xfff91aff │ │ movs r2, r2 │ │ - @ instruction: 0xea00c9b6 │ │ + @ instruction: 0xea00c9b7 │ │ vcgt.s32 d16, d0, #0 │ │ b.n 82664 │ │ movs r7, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r1 │ │ b.n 824ca │ │ lsls r0, r0, #2 │ │ @@ -30027,35 +30027,35 @@ │ │ b.n 82466 │ │ str r0, [r0, r0] │ │ b.n 81c44 │ │ asrs r1, r0, #32 │ │ b.n 8224c │ │ bfcsel e, 8292e , 12, le │ │ @ instruction: 0xffb7eaff │ │ - cbnz r1, 8217a │ │ - @ instruction: 0xfff9c9d1 │ │ - vshr.u64 d27, d25, #7 │ │ - vclt.f32 , , #0 │ │ + cbnz r2, 8217a │ │ + @ instruction: 0xfff9c9d2 │ │ + vshr.u64 d27, d26, #7 │ │ + vclt.f32 , q5, #0 │ │ vsri.64 d26, d31, #7 │ │ - sha1h.32 q14, q15 │ │ - vqrshrun.s64 d26, , #7 │ │ - vtbx.8 d28, {d9}, d18 │ │ - vqshrn.u64 d28, q4, #7 │ │ - @ instruction: 0xfff9bcba │ │ - @ instruction: 0xfff9b8df │ │ - vshr.u32 , , #7 │ │ + sha1h.32 q14, │ │ + vqrshrun.s64 d26, q6, #7 │ │ vtbx.8 d28, {d9}, d19 │ │ - vqdmulh.s q13, , d8[0] │ │ - @ instruction: 0xfff9bef1 │ │ - vcge.f32 d28, d25, #0 │ │ - vmlsl.u , d25, d23[0] │ │ - vrshr.u64 d28, d16, #7 │ │ - vtbx.8 d27, {d9}, d31 │ │ - vsli.32 d27, d10, #25 │ │ - vcle.f32 q14, q7, #0 │ │ + vqshrn.u64 d28, , #7 │ │ + @ instruction: 0xfff9bcbb │ │ + vtbx.8 d27, {d25}, d16 │ │ + vshr.u32 , q5, #7 │ │ + vtbx.8 d28, {d9}, d20 │ │ + vqdmulh.s q13, , d9[0] │ │ + @ instruction: 0xfff9bef2 │ │ + vcge.f32 d28, d26, #0 │ │ + vmlsl.u , d25, d24[0] │ │ + vrshr.u64 d28, d17, #7 │ │ + vqrshrun.s64 d27, q8, #7 │ │ + vsli.32 d27, d11, #25 │ │ + vcle.f32 q14, , #0 │ │ @ instruction: 0xfff94ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 826ac │ │ beq.n 8219c │ │ b.n 82630 │ │ str r0, [sp, #0] │ │ b.n 824da │ │ @@ -30375,15 +30375,15 @@ │ │ b.n 828e8 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ b.n 82b9a │ │ beq.n 82494 │ │ b.n 828f4 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r1, r3, r6, sl, ip, sp, pc} │ │ + ldmia.w sp!, {r0, r1, r3, r6, sl, ip, sp, pc} │ │ vtbl.8 d28, {d25-d26}, d24 │ │ @ instruction: 0xfff94ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 8298c │ │ beq.n 8247c │ │ b.n 82910 │ │ add r0, pc, #80 @ (adr r0, 824c8 ) │ │ @@ -30937,20 +30937,20 @@ │ │ b.n 82dac │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r3, ip} │ │ b.n 8245c │ │ asrs r1, r0, #32 │ │ b.n 82a40 │ │ @ instruction: 0xff88eaff │ │ - add r6, pc, #540 @ (adr r6, 82b44 ) │ │ - vrshr.u32 q13, , #7 │ │ - vceq.f32 q13, , #0 │ │ - vshr.u64 d26, d15, #7 │ │ - vshll.u32 q13, d4, #25 │ │ - vabs.f32 , q1 │ │ + add r6, pc, #544 @ (adr r6, 82b48 ) │ │ + vrshr.u32 q13, q10, #7 │ │ + vceq.f32 q13, q4, #0 │ │ + vcge.s32 d26, d16, #0 │ │ + vshll.u32 q13, d5, #25 │ │ + vabs.f32 , │ │ @ instruction: 0xfff94ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 82e60 │ │ beq.n 829b0 │ │ b.n 82de4 │ │ str r0, [sp, #0] │ │ b.n 82c8e │ │ @@ -31502,23 +31502,23 @@ │ │ b.n 82908 │ │ bfcsel 2, 825d2 , 4, cc │ │ movs r4, r2 │ │ b.n 8351a │ │ beq.n 82e14 │ │ b.n 83274 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r0, r1, r3, r5, r6, r7, ip, sp, pc} │ │ - vneg.f32 q13, │ │ - vclt.f32 , q9, #0 │ │ - vsri.64 d27, d13, #7 │ │ - vcvt.f16.u16 d26, d2, #7 │ │ - vtbx.8 d26, {d25}, d24 │ │ - vtbx.8 d26, {d25-d28}, d16 │ │ - @ instruction: 0xfff9ba77 │ │ - @ instruction: 0xfff9a9d0 │ │ + ldmia.w sp!, {r2, r3, r5, r6, r7, ip, sp, pc} │ │ + vneg.f32 q13, q13 │ │ + vclt.f32 , , #0 │ │ + vsri.64 d27, d14, #7 │ │ + vcvt.f16.u16 d26, d3, #7 │ │ + vtbx.8 d26, {d25}, d25 │ │ + vtbx.8 d26, {d25-d28}, d17 │ │ + @ instruction: 0xfff9ba78 │ │ + @ instruction: 0xfff9a9d1 │ │ @ instruction: 0xfff94df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ b.n 83328 │ │ beq.n 82e50 │ │ b.n 832ac │ │ strb r3, [r0, #0] │ │ b.n 83156 │ │ @@ -31738,19 +31738,19 @@ │ │ cmp r0, r4 │ │ b.n 8333a │ │ movs r4, r0 │ │ b.n 8333e │ │ beq.n 83030 │ │ b.n 83498 │ │ ldrh r0, [r6, #46] @ 0x2e │ │ - ldmia.w sp!, {r3, r4, r5, r8, ip, sp, pc} │ │ - vsri.64 d26, d23, #7 │ │ - vcle.s32 d27, d27, #0 │ │ - vqshlu.s64 , q14, #57 @ 0x39 │ │ - vceq.i32 d27, d2, #0 │ │ + ldmia.w sp!, {r0, r3, r4, r5, r8, ip, sp, pc} │ │ + vsri.64 d26, d24, #7 │ │ + vcle.s32 d27, d28, #0 │ │ + vqshlu.s64 , , #57 @ 0x39 │ │ + vceq.i32 d27, d3, #0 │ │ @ instruction: 0xfff94ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 8353c │ │ beq.n 8305c │ │ b.n 834c0 │ │ stmia r0!, {} │ │ b.n 82b4c │ │ @@ -32092,17 +32092,17 @@ │ │ b.n 83414 │ │ vpadd.i8 q15, q10, │ │ movs r0, r0 │ │ b.n 83a3e │ │ beq.n 83338 │ │ b.n 83798 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r1, r2, r8, r9, fp, sp, pc} │ │ - @ instruction: 0xfff9aed8 │ │ - vqshl.u64 d25, d15, #57 @ 0x39 │ │ + ldmia.w sp!, {r0, r1, r2, r8, r9, fp, sp, pc} │ │ + @ instruction: 0xfff9aed9 │ │ + vneg.f32 d25, d16 │ │ vcgt.s32 q9, q10, #0 │ │ b.n 82e36 │ │ asrs r0, r0, #32 │ │ b.n 8365a │ │ movs r0, r0 │ │ b.n 83a5e │ │ movs r0, r0 │ │ @@ -32633,18 +32633,18 @@ │ │ str r0, [r0, #0] │ │ b.n 83ece │ │ movs r6, r0 │ │ b.n 83ad2 │ │ beq.n 837cc │ │ b.n 83c2c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r1, r7, sl, fp, sp, pc} │ │ - vrshr.u32 d26, d8, #7 │ │ - vcle.s32 d26, d7, #0 │ │ - vdup.8 q13, d22[4] │ │ + ldmia.w sp!, {r0, r1, r7, sl, fp, sp, pc} │ │ + vrshr.u32 d26, d9, #7 │ │ + vcle.s32 d26, d8, #0 │ │ + vdup.8 q13, d23[4] │ │ @ instruction: 0xfff94bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ b.n 83ccc │ │ beq.n 837e4 │ │ b.n 83c50 │ │ str r4, [r4, #4] │ │ b.n 832da │ │ @@ -32878,18 +32878,18 @@ │ │ movs r0, r0 │ │ b.n 840e2 │ │ movs r1, r1 │ │ lsls r0, r4, #14 │ │ beq.n 839d8 │ │ b.n 83e40 │ │ ldrh r0, [r6, #30] │ │ - ldmia.w sp!, {r1, r3, r7, sl, fp, ip, pc} │ │ - vcge.s32 d26, d16, #0 │ │ - vshr.u32 , q13, #7 │ │ - vtbx.8 d25, {d25-d28}, d28 │ │ + ldmia.w sp!, {r0, r1, r3, r7, sl, fp, ip, pc} │ │ + vcge.s32 d26, d17, #0 │ │ + vshr.u32 , , #7 │ │ + vtbx.8 d25, {d25-d28}, d29 │ │ @ instruction: 0xfff94bf0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ b.n 83ee0 │ │ beq.n 839e8 │ │ b.n 83e64 │ │ str r0, [r0, r0] │ │ b.n 83d0e │ │ @@ -33617,15 +33617,15 @@ │ │ b.n 84480 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {} │ │ b.n 84732 │ │ beq.n 8402c │ │ b.n 8448c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r1, r4, r6, r8, r9, ip, pc} │ │ + ldmia.w sp!, {r0, r1, r4, r6, r8, r9, ip, pc} │ │ @ instruction: 0xfff94ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 84520 │ │ beq.n 84060 │ │ b.n 844a4 │ │ strh r0, [r0, #0] │ │ b.n 8434e │ │ @@ -33948,17 +33948,17 @@ │ │ b.n 843dc │ │ @ instruction: 0xeb52ebff │ │ movs r4, r0 │ │ b.n 84606 │ │ beq.n 84300 │ │ b.n 84760 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r1, r2, r4, r5, r6, r7, sl, fp, ip, pc} │ │ - vceq.f32 q13, q2, #0 │ │ - @ instruction: 0xfff98f29 │ │ + ldmia.w sp!, {r0, r1, r2, r4, r5, r6, r7, sl, fp, ip, pc} │ │ + vceq.f32 q13, , #0 │ │ + @ instruction: 0xfff98f2a │ │ @ instruction: 0xfff94ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 847fc │ │ beq.n 8438c │ │ b.n 84780 │ │ strb r4, [r2, #0] │ │ b.n 83e0a │ │ @@ -34921,19 +34921,19 @@ │ │ b.n 845f4 │ │ @ instruction: 0xffbceaff │ │ movs r1, r0 │ │ b.n 85202 │ │ beq.n 84afc │ │ b.n 84f5c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r2, r4, r5, r6, r9, sl, fp, ip, pc} │ │ - vclt.f32 q13, q4, #0 │ │ - vabs.f32 d26, d28 │ │ - vclt.s32 d24, d8, #0 │ │ - vsri.64 , q0, #7 │ │ + ldmia.w sp!, {r0, r2, r4, r5, r6, r9, sl, fp, ip, pc} │ │ + vclt.f32 q13, , #0 │ │ + vabs.f32 d26, d29 │ │ + vclt.s32 d24, d9, #0 │ │ + vsri.64 , , #7 │ │ @ instruction: 0xfff94ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 85000 │ │ beq.n 84af0 │ │ b.n 84f84 │ │ ldrh r2, [r0, #24] │ │ stc 0, cr13, [sp, #-64]! @ 0xffffffc0 │ │ @@ -37012,15 +37012,15 @@ │ │ lsls r1, r2, #5 │ │ lsrs r0, r0, #8 │ │ asrs r0, r7, #22 │ │ b.n 85f80 │ │ asrs r4, r4, #1 │ │ b.n 857e8 │ │ movs r5, r0 │ │ - @ instruction: 0xea0082a2 │ │ + @ instruction: 0xea0082a3 │ │ vcgt.s32 , q10, #0 │ │ b.n 861f4 │ │ movs r4, #35 @ 0x23 │ │ add.w r0, r0, r0 │ │ b.n 86382 │ │ lsls r1, r1, #5 │ │ lsrs r0, r0, #8 │ │ @@ -37355,15 +37355,15 @@ │ │ asrs r0, r4, #12 │ │ b.n 85ae8 │ │ strb r0, [r0, #0] │ │ b.n 85ac8 │ │ asrs r1, r0, #32 │ │ b.n 860d0 │ │ movs r2, r6 │ │ - @ instruction: 0xea009c5a │ │ + @ instruction: 0xea009c5b │ │ vrsra.u32 , q0, #7 │ │ b.n 85afc │ │ movs r0, #80 @ 0x50 │ │ b.n 859f8 │ │ asrs r1, r0, #32 │ │ b.n 860e4 │ │ lsls r6, r1, #2 │ │ @@ -37428,15 +37428,15 @@ │ │ and.w r2, r0, r4, asr #6 │ │ b.n 85b90 │ │ movs r0, #88 @ 0x58 │ │ b.n 85a8c │ │ asrs r1, r0, #32 │ │ b.n 86178 │ │ lsls r1, r5, #1 │ │ - @ instruction: 0xea00834d │ │ + @ instruction: 0xea00834e │ │ vclt.s32 , q12, #0 │ │ b.n 85ba4 │ │ adds r0, #3 │ │ b.n 86188 │ │ movs r1, r0 │ │ and.w r2, r0, r8, asr #13 │ │ b.n 85bb0 │ │ @@ -37597,15 +37597,15 @@ │ │ and.w r0, r0, r4, asr #6 │ │ b.n 85d10 │ │ movs r0, #100 @ 0x64 │ │ b.n 85d10 │ │ asrs r1, r0, #32 │ │ b.n 862f8 │ │ movs r1, r1 │ │ - @ instruction: 0xea008494 │ │ + @ instruction: 0xea008495 │ │ vceq.i32 d17, d28, #0 │ │ b.n 85d24 │ │ movs r0, #128 @ 0x80 │ │ b.n 85d24 │ │ asrs r1, r0, #32 │ │ b.n 8630c │ │ movs r4, r0 │ │ @@ -37632,74 +37632,74 @@ │ │ b.n 8673c │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r2, r3, r4, r5, r7, ip} │ │ b.n 85d68 │ │ asrs r1, r0, #32 │ │ b.n 8634c │ │ @ instruction: 0xffdfeaff │ │ - ldr r5, [r0, #20] │ │ - @ instruction: 0xfff96bbe │ │ - vtbl.8 d23, {d9-d11}, d24 │ │ - vsri.32 d23, d23, #7 │ │ - vqshlu.s32 q11, q3, #25 │ │ - vqrdmulh.s q11, , d2[0] │ │ - vqshl.u64 q11, , #57 @ 0x39 │ │ - @ instruction: 0xfff96a56 │ │ - vsli.32 d24, d16, #25 │ │ - vqshl.u64 q11, , #57 @ 0x39 │ │ - @ instruction: 0xfff96a72 │ │ - vtbl.8 d24, {d9-d12}, d27 │ │ - vneg.f32 d22, d21 │ │ - vshll.u32 q11, d14, #25 │ │ - @ instruction: 0xfff97f05 │ │ - @ instruction: 0xfff97d07 │ │ - vclt.f32 d23, d0, #0 │ │ - vcgt.f32 q11, , #0 │ │ - vshll.u32 q12, d4, #25 │ │ - vcgt.s32 q12, q5, #0 │ │ - vsri.32 d23, d10, #7 │ │ - vqshlu.s32 d22, d25, #25 │ │ - vqshl.u32 d22, d21, #25 │ │ - vneg.f32 d22, d9 │ │ - vtbl.8 d22, {d9-d11}, d2 │ │ - @ instruction: 0xfff96f0d │ │ - @ instruction: 0xfff97b9f │ │ - @ instruction: 0xfff98a70 │ │ - vceq.f32 d22, d12, #0 │ │ - vsra.u64 q12, , #7 │ │ - vabs.f32 q11, │ │ - vtbx.8 d22, {d25-d26}, d22 │ │ - @ instruction: 0xfff96ff8 │ │ - @ instruction: 0xfff97d85 │ │ - @ instruction: 0xfff96cf0 │ │ - vcvt.u32.f32 , , #7 │ │ - vtbl.8 d22, {d25-d27}, d21 │ │ - vdup.8 d22, d22[4] │ │ - vclt.f32 d24, d30, #0 │ │ - vshr.u64 d23, d8, #7 │ │ - vqrshrun.s64 d22, q13, #7 │ │ - vqrdmlah.s , , d7[0] │ │ - vtbl.8 d23, {d25-d26}, d13 │ │ - vshr.u64 q12, q11, #7 │ │ - vtbx.8 d24, {d9-d10}, d8 │ │ - vqshlu.s32 q12, , #25 │ │ + ldr r6, [r0, #20] │ │ + @ instruction: 0xfff96bbf │ │ + vtbl.8 d23, {d9-d11}, d25 │ │ + vsri.32 d23, d24, #7 │ │ + vqshlu.s32 q11, , #25 │ │ + vqrdmulh.s q11, , d3[0] │ │ + vqshl.u64 q11, q7, #57 @ 0x39 │ │ + @ instruction: 0xfff96a57 │ │ + vsli.32 d24, d17, #25 │ │ + vqshl.u64 q11, q13, #57 @ 0x39 │ │ + @ instruction: 0xfff96a73 │ │ + vtbl.8 d24, {d9-d12}, d28 │ │ + vneg.f32 d22, d22 │ │ + vshll.u32 q11, d15, #25 │ │ + @ instruction: 0xfff97f06 │ │ + @ instruction: 0xfff97d08 │ │ + vclt.f32 d23, d1, #0 │ │ + vcgt.f32 q11, q2, #0 │ │ + vshll.u32 q12, d5, #25 │ │ + vcgt.s32 q12, , #0 │ │ + vsri.32 d23, d11, #7 │ │ + vqshlu.s32 d22, d26, #25 │ │ + vqshl.u32 d22, d22, #25 │ │ + vneg.f32 d22, d10 │ │ + vtbl.8 d22, {d9-d11}, d3 │ │ + @ instruction: 0xfff96f0e │ │ + vtbl.8 d23, {d25-d28}, d16 │ │ + @ instruction: 0xfff98a71 │ │ + vceq.f32 d22, d13, #0 │ │ + vsra.u64 q12, q12, #7 │ │ + vabs.f32 q11, q15 │ │ + vtbx.8 d22, {d25-d26}, d23 │ │ + @ instruction: 0xfff96ff9 │ │ + @ instruction: 0xfff97d86 │ │ + @ instruction: 0xfff96cf1 │ │ + vcvt.u32.f32 , q10, #7 │ │ + vtbl.8 d22, {d25-d27}, d22 │ │ + vdup.8 d22, d23[4] │ │ + vclt.f32 d24, d31, #0 │ │ + vshr.u64 d23, d9, #7 │ │ + vqrshrun.s64 d22, , #7 │ │ + vqrdmlah.s , , d8[0] │ │ + vtbl.8 d23, {d25-d26}, d14 │ │ + vshr.u64 q12, , #7 │ │ + vtbx.8 d24, {d9-d10}, d9 │ │ + vqshlu.s32 q12, q9, #25 │ │ sha1h.32 q11, │ │ - vqshlu.s64 q12, q2, #57 @ 0x39 │ │ - vqrdmulh.s , , d5[0] │ │ - vcgt.f32 d23, d9, #0 │ │ - @ instruction: 0xfff97adb │ │ - vclt.f32 q12, , #0 │ │ - vneg.f32 q11, │ │ - vshll.u32 q11, d26, #25 │ │ - vtbl.8 d22, {d25}, d20 │ │ - vcvt.u16.f16 , q6, #7 │ │ - vtbl.8 d22, {d25-d28}, d25 │ │ - vtbl.8 d24, {d9}, d30 │ │ - vabs.f32 d23, d15 │ │ - vtbx.8 d23, {d9-d12}, d10 │ │ + vqshlu.s64 q12, , #57 @ 0x39 │ │ + vqrdmulh.s , , d6[0] │ │ + vcgt.f32 d23, d10, #0 │ │ + @ instruction: 0xfff97adc │ │ + vqshlu.s32 q12, q0, #25 │ │ + vneg.f32 q11, q1 │ │ + vshll.u32 q11, d27, #25 │ │ + vtbl.8 d22, {d25}, d21 │ │ + vcvt.u16.f16 , , #7 │ │ + vtbl.8 d22, {d25-d28}, d26 │ │ + vtbl.8 d24, {d9}, d31 │ │ + vqshl.u32 d23, d0, #25 │ │ + vtbx.8 d23, {d9-d12}, d11 │ │ @ instruction: 0xfff94ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 86844 │ │ beq.n 863c4 │ │ b.n 867c8 │ │ movs r0, #8 │ │ b.n 85e4c │ │ @@ -38555,26 +38555,26 @@ │ │ @ instruction: 0xebff6000 │ │ b.n 871aa │ │ movs r6, r0 │ │ b.n 86dae │ │ beq.n 86aa8 │ │ b.n 86f08 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r0, r3, r5, r8, r9, pc} │ │ - sha1h.32 q12, │ │ - vqshlu.s64 q12, q6, #57 @ 0x39 │ │ - vcgt.f32 q12, , #0 │ │ - vqrdmlsh.s , , d6[0] │ │ - vclt.f32 d23, d17, #0 │ │ - vcgt.s32 d24, d4, #0 │ │ - vsri.64 q11, , #7 │ │ - vcvt.f16.u16 d21, d26, #7 │ │ - vclt.s32 d23, d21, #0 │ │ - vneg.f32 q11, │ │ - @ instruction: 0xfff97f24 │ │ + ldmia.w sp!, {r1, r3, r5, r8, r9, pc} │ │ + sha1h.32 q12, q4 │ │ + vqshlu.s64 q12, , #57 @ 0x39 │ │ + vcgt.f32 q12, q6, #0 │ │ + vqrdmlsh.s , , d7[0] │ │ + vclt.f32 d23, d18, #0 │ │ + vcgt.s32 d24, d5, #0 │ │ + vsri.64 q11, q2, #7 │ │ + vcvt.f16.u16 d21, d27, #7 │ │ + vclt.s32 d23, d22, #0 │ │ + vneg.f32 q11, q6 │ │ + @ instruction: 0xfff97f25 │ │ @ instruction: 0xfff948f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ b.n 86fc8 │ │ beq.n 86ae0 │ │ b.n 86f4c │ │ ands r3, r0 │ │ b.n 86df6 │ │ @@ -38670,15 +38670,15 @@ │ │ b.n 87010 │ │ ldrh r0, [r6, #6] │ │ ldmia.w sp!, {r0} │ │ b.n 872c2 │ │ beq.n 86ba4 │ │ b.n 8701c │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r1, r2, r5, r6, r7, sl, fp, ip, lr} │ │ + ldmia.w sp!, {r0, r1, r2, r5, r6, r7, sl, fp, ip, lr} │ │ vshll.u32 , d23, #25 │ │ @ instruction: 0xfff948f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ b.n 870b4 │ │ beq.n 86bcc │ │ b.n 87038 │ │ ands r3, r0 │ │ @@ -38730,16 +38730,16 @@ │ │ @ instruction: 0xebff5000 │ │ b.n 87346 │ │ movs r5, r0 │ │ b.n 86f4a │ │ beq.n 86c2c │ │ b.n 870a4 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r4, r5, r6, r7, r9, sl, fp, sp, lr} │ │ - @ instruction: 0xfff96eae │ │ + ldmia.w sp!, {r0, r4, r5, r6, r7, r9, sl, fp, sp, lr} │ │ + @ instruction: 0xfff96eaf │ │ vcvt.f16.u16 q10, q8, #7 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ b.n 8713c │ │ beq.n 86c54 │ │ b.n 870c0 │ │ ands r3, r0 │ │ b.n 86f6a │ │ @@ -38794,16 +38794,16 @@ │ │ b.n 86db0 │ │ b.n 86e4e │ │ @ instruction: 0xebff0000 │ │ b.n 873da │ │ beq.n 86cbc │ │ b.n 87134 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ - ldmia.w sp!, {r1, r4, r7, r9, fp, ip, lr} │ │ - vcge.s32 q11, , #0 │ │ + ldmia.w sp!, {r0, r1, r4, r7, r9, fp, ip, lr} │ │ + vcge.s32 q11, q1, #0 │ │ @ instruction: 0xfff948f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ b.n 871cc │ │ beq.n 86cf4 │ │ b.n 87150 │ │ str r3, [r0, #0] │ │ b.n 86ffa │ │ @@ -38956,16 +38956,16 @@ │ │ movs r0, r2 │ │ b.n 8690c │ │ movs r4, r0 │ │ b.n 87146 │ │ beq.n 86e28 │ │ b.n 872a0 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r1, r2, r4, r5, r6, r8, r9, sp, lr} │ │ - vqshlu.s32 d23, d18, #25 │ │ + ldmia.w sp!, {r0, r1, r2, r4, r5, r6, r8, r9, sp, lr} │ │ + vqshlu.s32 d23, d19, #25 │ │ @ instruction: 0xfff94ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 87338 │ │ beq.n 86e78 │ │ b.n 872bc │ │ strh r0, [r0, #0] │ │ b.n 87166 │ │ @@ -39115,16 +39115,16 @@ │ │ str r1, [r0, r0] │ │ b.n 876a6 │ │ movs r5, r0 │ │ b.n 872aa │ │ beq.n 86fa4 │ │ b.n 87404 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r0, r1, r5, r6, r7, r9, fp, ip, lr} │ │ - vsra.u64 , q7, #7 │ │ + ldmia.w sp!, {r2, r5, r6, r7, r9, fp, ip, lr} │ │ + vsra.u64 , , #7 │ │ vcgt.s32 d16, d0, #0 │ │ b.n 8761e │ │ asrs r0, r0, #32 │ │ asrs r0, r2, #22 │ │ movs r0, r0 │ │ asrs r1, r2, #13 │ │ vrhadd.u16 d0, d14, d31 │ │ @@ -52887,15 +52887,15 @@ │ │ b.n 8e4a0 │ │ asrs r1, r0, #32 │ │ b.n 8ea8c │ │ stmia r1!, {r1, r2, r5, r7} │ │ @ instruction: 0xebff0000 │ │ b.n 8f0b6 │ │ ldrh r0, [r0, #0] │ │ - ldmia.w sp!, {r0, r3, r7, r8} │ │ + ldmia.w sp!, {r1, r3, r7, r8} │ │ vshr.u64 q8, q0, #7 │ │ b.n 8ed02 │ │ movs r0, r0 │ │ b.n 8e4a6 │ │ movs r1, r0 │ │ b.n 8ea8a │ │ vrhadd.u16 d14, d14, d31 │ │ @@ -52972,15 +52972,15 @@ │ │ b.n 8eb4c │ │ movs r0, #5 │ │ b.n 8ed72 │ │ stmia r1!, {r0, r2, r4, r5, r6} │ │ @ instruction: 0xebff0000 │ │ b.n 8f17a │ │ ldrh r0, [r4, #32] │ │ - ldmia.w sp!, {r0, r1, r2, r3, r4, r6, r7, sl, fp, sp, lr, pc} │ │ + ldmia.w sp!, {r5, r6, r7, sl, fp, sp, lr, pc} │ │ vqshrun.s64 d20, q8, #8 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 8ef64 │ │ ands r2, r0 │ │ b.n 8ed8e │ │ movs r0, #208 @ 0xd0 │ │ b.n 8edd2 │ │ @@ -53026,15 +53026,15 @@ │ │ movs r4, r0 │ │ b.n 8ebaa │ │ movs r4, r0 │ │ b.n 8e5b8 │ │ movs r1, r0 │ │ b.n 8f1f2 │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r0, r1, r4, r7, r8, ip, sp, lr, pc} │ │ + ldmia.w sp!, {r2, r4, r7, r8, ip, sp, lr, pc} │ │ @ instruction: 0xfff84cb0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ b.n 8efdc │ │ beq.n 8ead4 │ │ b.n 8ef60 │ │ strb r3, [r0, #0] │ │ b.n 8ee0a │ │ @@ -53282,19 +53282,19 @@ │ │ add.w r0, r0, r0, ror #3 │ │ b.n 8f05e │ │ movs r1, r0 │ │ b.n 8f41a │ │ beq.n 8ecfc │ │ b.n 8f174 │ │ ldrh r0, [r6, #36] @ 0x24 │ │ - ldmia.w sp!, {r0, r1, r2, r3, r4, r6, ip, sp, lr, pc} │ │ - vshr.u64 d31, d7, #8 │ │ - vrev64.32 d31, d19 │ │ - vqrdmlsh.s q15, q12, d23[0] │ │ - vqdmulh.s , q12, d31[0] │ │ + ldmia.w sp!, {r5, r6, ip, sp, lr, pc} │ │ + vshr.u64 d31, d8, #8 │ │ + vrev64.32 d31, d20 │ │ + vqrdmlsh.s q15, q12, d24[0] │ │ + @ instruction: 0xfff8fcf0 │ │ vqshrun.s64 d20, q8, #8 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 8f218 │ │ movs r4, r4 │ │ ldmia.w r0, {r2, ip, sp} │ │ b.n 8e82a │ │ adds r0, #5 │ │ @@ -53339,15 +53339,15 @@ │ │ b.n 8f09a │ │ lsls r5, r3, #11 │ │ add.w r0, r0, r0, ror #2 │ │ b.n 8f0ea │ │ movs r1, r0 │ │ b.n 8f4a6 │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r0, r1, r2, r3, r4, r6, r7, r9, sl, fp, sp, lr, pc} │ │ + ldmia.w sp!, {r5, r6, r7, r9, sl, fp, sp, lr, pc} │ │ vqshrun.s64 d20, q8, #8 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 8f290 │ │ movs r4, r4 │ │ ldmia.w r0, {r2, ip, sp} │ │ b.n 8e8a2 │ │ adds r0, #5 │ │ @@ -53390,15 +53390,15 @@ │ │ b.n 8e8f0 │ │ lsls r5, r0, #11 │ │ add.w r0, r0, r0 │ │ b.n 8e8de │ │ movs r1, r0 │ │ b.n 8f51a │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r0, r1, r2, r5, r6, r9, sl, fp, sp, lr, pc} │ │ + ldmia.w sp!, {r3, r5, r6, r9, sl, fp, sp, lr, pc} │ │ vqshrun.s64 d20, q8, #8 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 8f304 │ │ movs r4, r4 │ │ ldmia.w r0, {r2, ip, sp} │ │ b.n 8e916 │ │ adds r0, #5 │ │ @@ -53447,15 +53447,15 @@ │ │ b.n 8f18e │ │ lsls r4, r5, #10 │ │ add.w r0, r0, r0, ror #3 │ │ b.n 8f1de │ │ movs r1, r0 │ │ b.n 8f59a │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r0, r1, r4, r5, r6, r7, r8, sl, fp, sp, lr, pc} │ │ + ldmia.w sp!, {r2, r4, r5, r6, r7, r8, sl, fp, sp, lr, pc} │ │ vqrshrun.s64 d20, q0, #8 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 8f384 │ │ str r0, [r0, #0] │ │ b.n 8e98e │ │ ands r1, r0 │ │ b.n 8f1b2 │ │ @@ -53513,15 +53513,15 @@ │ │ ldrh r0, [r2, #2] │ │ ldmia.w sp!, {r0, r1, r3, r4, r5, r6, r9} │ │ add.w r0, r0, r0, ror #2 │ │ b.n 8f272 │ │ movs r1, r0 │ │ b.n 8f62e │ │ ldrh r0, [r2, #2] │ │ - ldmia.w sp!, {r0, r1, r3, r5, r6, r8, sl, fp, sp, lr, pc} │ │ + ldmia.w sp!, {r2, r3, r5, r6, r8, sl, fp, sp, lr, pc} │ │ vqrshrun.s64 d20, q0, #8 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 8f418 │ │ str r0, [r0, #0] │ │ b.n 8ea22 │ │ ands r1, r0 │ │ b.n 8f246 │ │ @@ -53577,15 +53577,15 @@ │ │ ldrh r0, [r2, #2] │ │ ldmia.w sp!, {r2, r3, r4, r6, r9} │ │ add.w r0, r0, r0 │ │ b.n 8ea82 │ │ movs r1, r0 │ │ b.n 8f6be │ │ ldrh r0, [r2, #2] │ │ - ldmia.w sp!, {r0, r1, r2, r4, r6, r7, sl, fp, sp, lr, pc} │ │ + ldmia.w sp!, {r3, r4, r6, r7, sl, fp, sp, lr, pc} │ │ @ instruction: 0xfff84df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ b.n 8f4a8 │ │ str r0, [r2, #12] │ │ b.n 8f312 │ │ adds r0, #4 │ │ b.n 8eac2 │ │ @@ -53668,15 +53668,15 @@ │ │ movs r1, r0 │ │ b.n 8f77e │ │ asrs r0, r0, #32 │ │ b.n 8f782 │ │ asrs r5, r0, #32 │ │ b.n 8efce │ │ ldrh r0, [r6, #46] @ 0x2e │ │ - ldmia.w sp!, {r1, r5, r6, r7, sp, lr, pc} │ │ + ldmia.w sp!, {r0, r1, r5, r6, r7, sp, lr, pc} │ │ @ instruction: 0xfff848f0 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ b.n 8f570 │ │ str r0, [r2, #12] │ │ b.n 8f3da │ │ ands r0, r0 │ │ b.n 8f39e │ │ @@ -53866,18 +53866,18 @@ │ │ movs r0, #3 │ │ b.n 8f522 │ │ itett hi │ │ @ instruction: 0xebff0000 │ │ bls.n 8f92a @ unpredictable branch in IT block │ │ │ │ ldrhhi r0, [r6, #6] │ │ - ldmiahi.w sp!, {r0, r1, r4, r6, r8, r9, fp, sp, lr, pc} │ │ - @ instruction: 0xfff8eaf7 │ │ - @ instruction: 0xfff8e563 │ │ - @ instruction: 0xfff8df0d │ │ + ldmiahi.w sp!, {r2, r4, r6, r8, r9, fp, sp, lr, pc} │ │ + @ instruction: 0xfff8eaf8 │ │ + @ instruction: 0xfff8e564 │ │ + @ instruction: 0xfff8df0e │ │ vqshrun.s64 d20, q8, #8 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 8f720 │ │ str r1, [r0, r0] │ │ b.n 8f54a │ │ ands r0, r0 │ │ b.n 8f54e │ │ @@ -53915,15 +53915,15 @@ │ │ movs r0, #3 │ │ b.n 8f592 │ │ iteet vs │ │ @ instruction: 0xebff0000 │ │ bvc.n 8f99a @ unpredictable branch in IT block │ │ │ │ ldrhvc r0, [r6, #0] │ │ - ldmiavs.w sp!, {r1, r2, r3, r4, r5, r6, r8, fp, ip, lr, pc} │ │ + ldmiavs.w sp!, {r0, r1, r2, r3, r4, r5, r6, r8, fp, ip, lr, pc} │ │ vcvt.f16.u16 q10, q8, #8 │ │ stmdb sp!, {r4, ip, sp, pc} │ │ b.n 8f784 │ │ str r0, [r0, #0] │ │ b.n 8ed8e │ │ adds r0, #4 │ │ b.n 8ed92 │ │ @@ -53979,15 +53979,15 @@ │ │ adds r4, r1, r0 │ │ asrs r1, r0, #6 │ │ asrs r6, r1, #32 │ │ asrs r1, r0, #6 │ │ asrs r0, r0, #32 │ │ asrs r2, r0, #22 │ │ ldrh r0, [r6, #34] @ 0x22 │ │ - ldmia.w sp!, {r0, r1, r2, r3, r5, r6, r8, fp, sp, lr, pc} │ │ + ldmia.w sp!, {r4, r5, r6, r8, fp, sp, lr, pc} │ │ vtbl.8 d20, {d8}, d0 │ │ stmdb sp!, {r0, r2, r3, ip, sp, pc} │ │ b.n 8f632 │ │ beq.n 8f304 │ │ b.n 8f790 │ │ movs r0, #0 │ │ b.n 8ee1a │ │ @@ -54048,16 +54048,16 @@ │ │ @ instruction: 0xebff1000 │ │ b.n 8faae │ │ movs r1, r0 │ │ b.n 8f6b2 │ │ beq.n 8f38a │ │ b.n 8f6b6 │ │ ldrh r0, [r0, #0] │ │ - ldmia.w sp!, {r0, r1, r2, r3, r4, r6, r7, fp, sp, lr, pc} │ │ - @ instruction: 0xfff8f34f │ │ + ldmia.w sp!, {r5, r6, r7, fp, sp, lr, pc} │ │ + vrsra.u32 , q0, #8 │ │ vrev64.32 d18, d1 │ │ b.n 8f6c6 │ │ adds r0, #0 │ │ b.n 8faca │ │ movs r0, #240 @ 0xf0 │ │ b.n 8f70e │ │ vrhadd.u16 d14, d14, d31 │ │ @@ -56476,27 +56476,27 @@ │ │ ldmia.w sp!, {r1, r3, r4, sp, pc} │ │ b.n 90f92 │ │ movs r2, r1 │ │ b.n 90b96 │ │ beq.n 90890 │ │ b.n 90cf0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r0, r5, r6, r7, r8, r9, fp, lr, pc} │ │ - vqrdmulh.s q14, q4, d30[0] │ │ - @ instruction: 0xfff8e5eb │ │ - vtbx.8 d28, {d8-d10}, d26 │ │ - vtbl.8 d28, {d8-d11}, d13 │ │ - vpaddl.s32 , │ │ - vshr.u64 q15, , #8 │ │ - @ instruction: 0xfff8dbdb │ │ - vqabs.s32 q15, │ │ - vrev64.32 q15, │ │ - vsra.u32 , , #8 │ │ - @ instruction: 0xfff8dabf │ │ - @ instruction: 0xfff8dad7 │ │ + ldmia.w sp!, {r1, r5, r6, r7, r8, r9, fp, lr, pc} │ │ + vqrdmulh.s q14, q4, d31[0] │ │ + @ instruction: 0xfff8e5ec │ │ + vtbx.8 d28, {d8-d10}, d27 │ │ + vtbl.8 d28, {d8-d11}, d14 │ │ + vrshr.u32 , q8, #8 │ │ + vshr.u64 q15, q5, #8 │ │ + @ instruction: 0xfff8dbdc │ │ + vqabs.s32 q15, q4 │ │ + vrev64.32 q15, q13 │ │ + vsra.u32 , q6, #8 │ │ + vtbx.8 d29, {d24-d26}, d0 │ │ + @ instruction: 0xfff8dad8 │ │ @ instruction: 0xfff84ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 90db4 │ │ beq.n 908a4 │ │ b.n 90d38 │ │ ldrh r0, [r1, #24] │ │ stc 0, cr13, [sp, #-512]! @ 0xfffffe00 │ │ @@ -58283,32 +58283,32 @@ │ │ ldrh r6, [r0, #30] │ │ vldr d9, [pc, #-860] @ 914b0 │ │ ldc 0, cr3, [pc, #-0] @ 91810 │ │ b.n 91f56 │ │ strb r0, [r2, #0] │ │ b.n 91334 │ │ movs r0, r5 │ │ - @ instruction: 0xea00c3f8 │ │ - vtbl.8 d28, {d8-d9}, d26 │ │ - vtbl.8 d28, {d8-d9}, d23 │ │ - vtbx.8 d28, {d24}, d3 │ │ - vclz.i32 , │ │ - vqshlu.s32 d29, d11, #24 │ │ - vrev64.32 d28, d9 │ │ - vmull.u , d8, d26 │ │ - @ instruction: 0xfff8bbf3 │ │ - @ instruction: 0xfff8dbb0 │ │ - vqrdmlsh.s , q12, d14[0] │ │ - vcvt.f32.u32 d28, d4, #8 │ │ - vrshr.u32 q14, , #8 │ │ - @ instruction: 0xfff8cb71 │ │ - vsri.32 d28, d25, #8 │ │ - @ instruction: 0xfff8d3e5 │ │ - vtbx.8 d29, {d24}, d8 │ │ - vcvt.u32.f32 , , #8 │ │ + @ instruction: 0xea00c3f9 │ │ + vtbl.8 d28, {d8-d9}, d27 │ │ + vtbl.8 d28, {d8-d9}, d24 │ │ + vtbx.8 d28, {d24}, d4 │ │ + vclz.i32 , q11 │ │ + vqshlu.s32 d29, d12, #24 │ │ + vrev64.32 d28, d10 │ │ + vmull.u , d8, d27 │ │ + @ instruction: 0xfff8bbf4 │ │ + @ instruction: 0xfff8dbb1 │ │ + vqrdmlsh.s , q12, d15[0] │ │ + vcvt.f32.u32 d28, d5, #8 │ │ + vrshr.u32 q14, q5, #8 │ │ + @ instruction: 0xfff8cb72 │ │ + vsri.32 d28, d26, #8 │ │ + @ instruction: 0xfff8d3e6 │ │ + vtbx.8 d29, {d24}, d9 │ │ + vcvt.u32.f32 , q6, #8 │ │ vrev64.32 d16, d8 │ │ b.n 91baa │ │ asrs r6, r0, #32 │ │ b.n 91bae │ │ bfcsel 1e, 9206e , 20, ne │ │ movs r0, r1 │ │ b.n 91bb6 │ │ @@ -59036,15 +59036,15 @@ │ │ ands r0, r0 │ │ b.n 92602 │ │ str r0, [r1, r0] │ │ b.n 92606 │ │ asrs r0, r0, #32 │ │ b.n 9260a │ │ movs r7, r1 │ │ - @ instruction: 0xea00ba7c │ │ + @ instruction: 0xea00ba7d │ │ vpadal.u32 d27, d0 │ │ vrev64.32 d16, d8 │ │ b.n 9221a │ │ bfcsel 18, 916da , 1a, ls │ │ asrs r0, r0, #32 │ │ b.n 91a10 │ │ movs r0, r1 │ │ @@ -59090,18 +59090,18 @@ │ │ b.n 91f7a │ │ movs r0, #3 │ │ b.n 91f8a │ │ movs r2, r0 │ │ b.n 92262 │ │ @ instruction: 0xffe31aff │ │ @ instruction: 0xffebeaff │ │ - cbnz r4, 91f6e │ │ - vrev16.32 d28, d0 │ │ - vpaddl.s32 d29, d17 │ │ - vqrdmulh.s q14, q12, d2[0] │ │ + cbnz r5, 91f6e │ │ + vrev16.32 d28, d1 │ │ + vpaddl.s32 d29, d18 │ │ + vqrdmulh.s q14, q12, d3[0] │ │ vrev64.32 d16, d8 │ │ b.n 9229e │ │ bfcsel 14, 9175e , 18, cs │ │ ands r0, r0 │ │ b.n 922a6 │ │ movs r0, r1 │ │ b.n 922aa │ │ @@ -59403,16 +59403,16 @@ │ │ bfcsel 12, 91a0e , 16, cc │ │ movs r0, r1 │ │ b.n 92556 │ │ asrs r4, r0, #32 │ │ b.n 9255a │ │ bfcsel 14, 91a1a , 16, vs │ │ ldc2 10, cr14, [r0, #1020] @ 0x3fc @ │ │ - bne.n 921ae │ │ - @ instruction: 0xfff8cda0 │ │ + bne.n 921b0 │ │ + @ instruction: 0xfff8cda1 │ │ vshr.u32 d16, d28, #8 │ │ b.n 91d68 │ │ asrs r4, r7, #4 │ │ b.n 91d52 │ │ movs r0, r1 │ │ b.n 91d58 │ │ movs r0, r0 │ │ @@ -59619,15 +59619,15 @@ │ │ movs r6, #97 @ 0x61 │ │ b.n 92a08 │ │ movs r1, #48 @ 0x30 │ │ b.n 92a84 │ │ lsls r4, r7, #4 │ │ b.n 91f22 │ │ @ instruction: 0xffdbeaff │ │ - stmia r4!, {r0, r3, r4, r6, r7} │ │ + stmia r4!, {r1, r3, r4, r6, r7} │ │ vtbx.8 d29, {d24}, d16 │ │ vshr.u32 d17, d20, #8 │ │ b.n 91f4c │ │ movs r0, r1 │ │ b.n 92756 │ │ bfcsel 12, 92c16 , 16, vs │ │ movs r0, r0 │ │ @@ -59757,15 +59757,15 @@ │ │ movs r0, r0 │ │ asrs r2, r2, #13 │ │ @ instruction: 0xffd00aff │ │ movs r0, r1 │ │ b.n 92872 │ │ bf e, 98d32 │ │ @ instruction: 0xffcdeaff │ │ - bcc.n 92514 │ │ + bcc.n 92516 │ │ vshr.u32 d17, d8, #8 │ │ b.n 9207c │ │ movs r0, r1 │ │ b.n 92886 │ │ bf 10, a0d46 │ │ asrs r4, r3, #32 │ │ b.n 92088 │ │ @@ -59960,16 +59960,16 @@ │ │ lsrs r0, r0, #8 │ │ ands r1, r0 │ │ b.n 92bf6 │ │ movs r5, r0 │ │ b.n 9299a │ │ @ instruction: 0xfff69aff │ │ movs r2, r1 │ │ - @ instruction: 0xea00b6fa │ │ - vtbl.8 d27, {d24}, d1 │ │ + @ instruction: 0xea00b6fb │ │ + vtbl.8 d27, {d24}, d2 │ │ vshr.u32 d16, d0, #8 │ │ b.n 92232 │ │ movs r0, r7 │ │ b.n 92224 │ │ movs r0, r1 │ │ b.n 92a4e │ │ bfcsel c, 91f0e , 10, vc │ │ @@ -60141,50 +60141,50 @@ │ │ b.n 92fca │ │ beq.n 9290c │ │ b.n 92d24 │ │ ldrh r0, [r1, #24] │ │ ldc 0, cr13, [sp], #16 │ │ b.n 92db0 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl, fp, lr, pc} │ │ - vsri.32 d28, d24, #8 │ │ + ldmia.w sp!, {r9, sl, fp, lr, pc} │ │ + vsri.32 d28, d25, #8 │ │ vrsra.u64 d29, d12, #8 │ │ - vtbl.8 d28, {d24}, d26 │ │ - vtbl.8 d26, {d24}, d22 │ │ - vqshlu.s64 , q10, #56 @ 0x38 │ │ - @ instruction: 0xfff8ab39 │ │ - vsri.32 , , #8 │ │ - @ instruction: 0xfff8bd05 │ │ - vsra.u64 q14, q2, #8 │ │ - vtbl.8 d28, {d8}, d11 │ │ - vrsra.u32 , , #8 │ │ - @ instruction: 0xfff8be82 │ │ - vcvt.f32.u32 , q4, #8 │ │ - vrsra.u32 , q0, #8 │ │ - vpaddl.u32 d27, d13 │ │ - @ instruction: 0xfff8bb9d │ │ - vshr.u32 d27, d31, #8 │ │ - vsra.u64 d28, d9, #8 │ │ - @ instruction: 0xfff8aafc │ │ - @ instruction: 0xfff8cd0d │ │ - vqneg.s32 q14, q9 │ │ - vqrdmlah.s , q4, d13[0] │ │ - vtbl.8 d28, {d24-d27}, d27 │ │ - vsri.64 d27, d17, #8 │ │ - vsli.32 q14, , #24 │ │ - vqshlu.s32 q14, , #24 │ │ - @ instruction: 0xfff8af88 │ │ - vqabs.s32 q13, │ │ - @ instruction: 0xfff8cb5f │ │ - vcvt.f32.u32 q13, , #8 │ │ - vshr.u32 d28, d16, #8 │ │ - vrshr.u64 d28, d28, #8 │ │ - @ instruction: 0xfff8acdd │ │ + vtbl.8 d28, {d24}, d27 │ │ + vtbl.8 d26, {d24}, d23 │ │ + vqshlu.s64 , , #56 @ 0x38 │ │ + @ instruction: 0xfff8ab3a │ │ + vsri.32 , q1, #8 │ │ + @ instruction: 0xfff8bd06 │ │ + vsra.u64 q14, , #8 │ │ + vtbl.8 d28, {d8}, d12 │ │ + vrsra.u32 , q12, #8 │ │ + @ instruction: 0xfff8be83 │ │ + vcvt.f32.u32 , , #8 │ │ + vrsra.u32 , , #8 │ │ + vpaddl.u32 d27, d14 │ │ + @ instruction: 0xfff8bb9e │ │ + vrev64.32 , q0 │ │ + vsra.u64 d28, d10, #8 │ │ + @ instruction: 0xfff8aafd │ │ + @ instruction: 0xfff8cd0e │ │ + vqneg.s32 q14, │ │ + vqrdmlah.s , q4, d14[0] │ │ + vtbl.8 d28, {d24-d27}, d28 │ │ + vsri.64 d27, d18, #8 │ │ + vsli.32 q14, q12, #24 │ │ + vqshlu.s32 q14, q4, #24 │ │ + @ instruction: 0xfff8af89 │ │ + vqabs.s32 q13, q15 │ │ + vtbx.8 d28, {d8-d11}, d16 │ │ + vcvt.f32.u32 q13, q1, #8 │ │ + vshr.u32 d28, d17, #8 │ │ + vrshr.u64 d28, d29, #8 │ │ + @ instruction: 0xfff8acde │ │ vtbx.8 d28, {d8-d11}, d4 │ │ - vpaddl.u32 q14, q8 │ │ + vpaddl.u32 q14, │ │ @ instruction: 0xfff84df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ b.n 92e4c │ │ str r0, [r0, r0] │ │ b.n 92c76 │ │ movs r0, r2 │ │ b.n 92e3a │ │ @@ -60897,27 +60897,27 @@ │ │ b.n 9329a │ │ asrs r4, r0, #32 │ │ b.n 9329e │ │ bf 6, 9b75e │ │ beq.n 92f9c │ │ b.n 933fc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r0, r1, r2, r4, r5, r6, r7, r9, sl, fp, sp, pc} │ │ - vqrdmlah.s , q12, d5[0] │ │ - vqrdmlah.s q13, q4, d19[0] │ │ - vcvt.f32.u32 d25, d17, #8 │ │ - vcvt.f32.u32 d26, d7, #8 │ │ - vtbl.8 d27, {d24-d27}, d21 │ │ - vcvt.f32.u32 q13, , #8 │ │ - @ instruction: 0xfff8aef7 │ │ - vrshr.u64 d27, d16, #8 │ │ - @ instruction: 0xfff8be90 │ │ - vcvt.u32.f32 d27, d8, #8 │ │ - @ instruction: 0xfff8ad81 │ │ - @ instruction: 0xfff8ad0d │ │ + ldmia.w sp!, {r3, r4, r5, r6, r7, r9, sl, fp, sp, pc} │ │ + vqrdmlah.s , q12, d6[0] │ │ + vqrdmlah.s q13, q4, d20[0] │ │ + vcvt.f32.u32 d25, d18, #8 │ │ + vcvt.f32.u32 d26, d8, #8 │ │ + vtbl.8 d27, {d24-d27}, d22 │ │ + vcvt.f32.u32 q13, q14, #8 │ │ + @ instruction: 0xfff8aef8 │ │ + vrshr.u64 d27, d17, #8 │ │ + @ instruction: 0xfff8be91 │ │ + vcvt.u32.f32 d27, d9, #8 │ │ + @ instruction: 0xfff8ad82 │ │ + @ instruction: 0xfff8ad0e │ │ vqshrun.s64 d20, q8, #8 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 934c0 │ │ stmia r1!, {r2, r3, r4, r5} │ │ b.n 92aca │ │ b.n 92fac │ │ b.n 936ee │ │ @@ -61513,16 +61513,16 @@ │ │ b.n 93950 │ │ ldrh r0, [r6, #0] │ │ ldmia.w sp!, {r1, r3, r4} │ │ b.n 93c02 │ │ beq.n 934d4 │ │ b.n 9395c │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r2, r3, r4, r6, r7, r9, ip, sp, pc} │ │ - vqshlu.s32 q13, q13, #24 │ │ + ldmia.w sp!, {r0, r2, r3, r4, r6, r7, r9, ip, sp, pc} │ │ + vqshlu.s32 q13, , #24 │ │ @ instruction: 0xfff84df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ b.n 939f4 │ │ beq.n 934ec │ │ b.n 93978 │ │ str r1, [r0, #0] │ │ b.n 93822 │ │ @@ -61586,17 +61586,17 @@ │ │ ldmia.w sp!, {r1, r3, r4, lr} │ │ b.n 93c9e │ │ movs r4, r0 │ │ b.n 938a2 │ │ beq.n 93594 │ │ b.n 939fc │ │ ldrh r0, [r6, #46] @ 0x2e │ │ - ldmia.w sp!, {r1, r2, r3, r5, r8, sl, ip, pc} │ │ - vqshl.u32 d26, d29, #24 │ │ - @ instruction: 0xfff8a5c2 │ │ + ldmia.w sp!, {r0, r1, r2, r3, r5, r8, sl, ip, pc} │ │ + vqshl.u32 d26, d30, #24 │ │ + @ instruction: 0xfff8a5c3 │ │ vqrshrun.s64 d27, q10, #8 │ │ @ instruction: 0xfff84ff0 │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 93a9c │ │ beq.n 9362c │ │ b.n 93a20 │ │ lsrs r0, r3 │ │ @@ -63891,24 +63891,24 @@ │ │ b.n 94c32 │ │ b.n 94368 │ │ add.w r0, r6, r4 │ │ b.n 94c3a │ │ beq.n 94934 │ │ b.n 94d94 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r5, sl, ip, pc} │ │ - vrshr.u32 d25, d13, #8 │ │ - vtbx.8 d25, {d8-d10}, d17 │ │ - vtbx.8 d25, {d8-d10}, d11 │ │ - vtbl.8 d24, {d24}, d18 │ │ - vsubw.u q12, q4, d26 │ │ - vcls.s32 , q7 │ │ - vsri.64 d26, d21, #8 │ │ - vsli.32 d25, d14, #24 │ │ - vqshl.u32 d24, d16, #24 │ │ + ldmia.w sp!, {r0, r5, sl, ip, pc} │ │ + vrshr.u32 d25, d14, #8 │ │ + vtbx.8 d25, {d8-d10}, d18 │ │ + vtbx.8 d25, {d8-d10}, d12 │ │ + vtbl.8 d24, {d24}, d19 │ │ + vsubw.u q12, q4, d27 │ │ + vcls.s32 , │ │ + vsri.64 d26, d22, #8 │ │ + vsli.32 d25, d15, #24 │ │ + vqshl.u32 d24, d17, #24 │ │ @ instruction: 0xfff84df0 │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ b.n 94e4c │ │ beq.n 94944 │ │ b.n 94dd0 │ │ str r0, [r0, r0] │ │ b.n 94c7a │ │ @@ -342941,17 +342941,17 @@ │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r1, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ movs r0, r0 │ │ - bge.n 14f110 │ │ - vqshrn.u64 d30, q1, #20 │ │ - vrshr.u32 d31, d5, #20 │ │ + bge.n 14f112 │ │ + vqshrn.u64 d30, , #20 │ │ + vrshr.u32 d31, d6, #20 │ │ vcvt.u16.f16 , q2, #20 │ │ movs r0, r2 │ │ ble.n 14f05c │ │ movs r0, r2 │ │ bgt.n 14f050 │ │ movs r0, r2 │ │ lsls r0, r7, #2 │ │ @@ -343058,23 +343058,23 @@ │ │ b.n 14f078 │ │ lsls r0, r5, #2 │ │ b.n 14f63e │ │ @ instruction: 0xfbbbeb03 │ │ movs r5, r2 │ │ b.n 14f906 │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r1, r5, r6, fp, ip, lr, pc} │ │ - vabdl.u32 , d28, d17 │ │ - @ instruction: 0xffecdda2 │ │ + ldmia.w sp!, {r0, r1, r5, r6, fp, ip, lr, pc} │ │ + vabdl.u32 , d28, d18 │ │ + @ instruction: 0xffecdda3 │ │ vmull.u32 , d28, d12[1] │ │ movs r0, r2 │ │ - bhi.n 14f1f8 │ │ - @ instruction: 0xffecdb24 │ │ - vmlal.u32 , d12, d2 │ │ - vrsra.u32 d31, d22, #20 │ │ + bhi.n 14f1fa │ │ + @ instruction: 0xffecdb25 │ │ + vmlal.u32 , d12, d3 │ │ + vrsra.u32 d31, d23, #20 │ │ @ instruction: 0xffec4bf0 │ │ stmdb sp!, {lr} │ │ b.n 14f4b2 │ │ lsrs r5, r0, #29 │ │ b.n 14f676 │ │ ldr r6, [r1, #52] @ 0x34 │ │ b.n 14f67a │ │ @@ -343413,21 +343413,21 @@ │ │ @ instruction: 0xffd61aff │ │ movs r1, #64 @ 0x40 │ │ b.n 14ef86 │ │ movs r0, r0 │ │ b.n 14fb0e │ │ @ instruction: 0xffd61aff │ │ @ instruction: 0xffd2eaff │ │ - bpl.n 14f3e0 │ │ - vsri.64 , , #20 │ │ - vcvt.f32.u32 d29, d18, #20 │ │ + bpl.n 14f3e2 │ │ + vsri.64 , q11, #20 │ │ + vcvt.f32.u32 d29, d19, #20 │ │ vmlal.u32 , d28, d12 │ │ movs r0, r2 │ │ - bpl.n 14f3c8 │ │ - vsri.32 q15, q1, #20 │ │ + bpl.n 14f3ca │ │ + vsri.32 q15, , #20 │ │ @ instruction: 0xffec48f0 │ │ stmdb sp!, {lr} │ │ b.n 14f7d2 │ │ lsrs r2, r0, #29 │ │ b.n 14f996 │ │ ldrb r6, [r1, #13] │ │ b.n 14f99a │ │ @@ -344025,23 +344025,23 @@ │ │ movs r0, #5 │ │ b.n 14fcfa │ │ lsrs r1, r2, #6 │ │ add.w r0, r0, r0 │ │ b.n 150102 │ │ strh r0, [r6, #2] │ │ ldmia.w sp!, {r0, r4, r6, r8, fp, ip, sp, lr, pc} │ │ - @ instruction: 0xeb03d042 │ │ - @ instruction: 0xffecef81 │ │ - vsubw.u32 q15, q6, d28 │ │ + @ instruction: 0xeb03d043 │ │ + @ instruction: 0xffecef82 │ │ + vsubw.u32 q15, q6, d29 │ │ vsubw.u32 , q6, d4 │ │ movs r0, r2 │ │ - beq.n 14fa38 │ │ - @ instruction: 0xffecdede │ │ - vshr.u32 d29, d10, #20 │ │ - vrshr.u64 , q8, #20 │ │ + beq.n 14fa3a │ │ + @ instruction: 0xffecdedf │ │ + vshr.u32 d29, d11, #20 │ │ + vrshr.u64 , , #20 │ │ @ instruction: 0xffec4ff0 │ │ stmdb sp!, {r2, ip, lr, pc} │ │ b.n 14fe8c │ │ add sp, #0 │ │ b.n 14fd36 │ │ lsls r0, r2, #1 │ │ b.n 14fefa │ │ @@ -344561,21 +344561,21 @@ │ │ b.n 14fdbc │ │ lsls r0, r5, #2 │ │ b.n 150382 │ │ str??.w lr, [sl], #3 │ │ movs r5, r2 │ │ b.n 15064a │ │ ldrh r0, [r0, #0] │ │ - ldmia.w sp!, {r1, r4, r6, r7, r9, fp, lr, pc} │ │ - vshll.u32 q15, d1, #12 │ │ - @ instruction: 0xffece9fb │ │ + ldmia.w sp!, {r0, r1, r4, r6, r7, r9, fp, lr, pc} │ │ + vshll.u32 q15, d2, #12 │ │ + @ instruction: 0xffece9fc │ │ @ instruction: 0xffeccda8 │ │ movs r0, r2 │ │ - ldmia r2, {r1, r2, r3, r4, r5, r7} │ │ - vmull.u32 q14, d28, d5[1] │ │ + ldmia r2, {r0, r1, r2, r3, r4, r5, r7} │ │ + vmull.u32 q14, d28, d6[1] │ │ vqshrun.s64 d20, q8, #20 │ │ stmdb sp!, {} │ │ b.n 15054e │ │ movs r1, r2 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ b.n 150558 │ │ @@ -344631,21 +344631,21 @@ │ │ b.n 14fe6c │ │ lsls r0, r5, #2 │ │ b.n 150432 │ │ ldrh.w lr, [lr], #3 │ │ movs r5, r2 │ │ b.n 1506fa │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r1, r5, r9, fp, lr, pc} │ │ - vmul.f32 q15, q6, d1[1] │ │ - vsli.32 q15, , #12 │ │ + ldmia.w sp!, {r0, r1, r5, r9, fp, lr, pc} │ │ + vmul.f32 q15, q6, d2[1] │ │ + vsli.32 q15, q1, #12 │ │ @ instruction: 0xffecccf8 │ │ movs r0, r2 │ │ - ldmia r2, {r1, r2, r3} │ │ - @ instruction: 0xffecd8be │ │ + ldmia r2, {r0, r1, r2, r3} │ │ + @ instruction: 0xffecd8bf │ │ @ instruction: 0xffecdcd9 │ │ and.w r2, r1, r1, lsr #8 │ │ @ instruction: 0xea00c000 │ │ b.n 14fa9c │ │ stmia r0!, {} │ │ b.n 14fa80 │ │ movs r2, #71 @ 0x47 │ │ @@ -345484,38 +345484,38 @@ │ │ b.n 1509be │ │ bfcsel 1a, 14fc86 , 1e, ne │ │ mrc2 10, 7, lr, cr15, cr15, {7} @ │ │ adds r4, r4, #1 │ │ movs r1, r2 │ │ lsls r4, r7, #26 │ │ movs r0, r0 │ │ - stmia r7!, {r1, r2, r3, r4, r6} │ │ - vsli.32 d30, d10, #12 │ │ - vcvt.u16.f16 q14, q9, #20 │ │ + stmia r7!, {r0, r1, r2, r3, r4, r6} │ │ + vsli.32 d30, d11, #12 │ │ + vcvt.u16.f16 q14, , #20 │ │ @ instruction: 0xffecc9d0 │ │ movs r0, r2 │ │ - stmia r7!, {r1, r3, r6} │ │ - @ instruction: 0xffece76e │ │ - vqshl.u32 d28, d22, #12 │ │ - vqshrun.s64 d29, , #20 │ │ - vabdl.u32 q14, d12, d18 │ │ - vmls.f32 q14, q14, d5[0] │ │ - vabdl.u32 q14, d12, d14 │ │ - @ instruction: 0xffecdd92 │ │ - vqshlu.s64 q14, q13, #44 @ 0x2c │ │ - vmul.i32 , q14, d0[0] │ │ - vmlsl.u32 q14, d28, d6[1] │ │ - @ instruction: 0xffece8f4 │ │ + stmia r7!, {r0, r1, r3, r6} │ │ + @ instruction: 0xffece76f │ │ + vqshl.u32 d28, d23, #12 │ │ + vqshrun.s64 d29, q10, #20 │ │ + vabdl.u32 q14, d12, d19 │ │ + vmls.f32 q14, q14, d6[0] │ │ + vabdl.u32 q14, d12, d15 │ │ + @ instruction: 0xffecdd93 │ │ + vqshlu.s64 q14, , #44 @ 0x2c │ │ + vmul.i32 , q14, d1[0] │ │ + vmlsl.u32 q14, d28, d7[1] │ │ + @ instruction: 0xffece8f5 │ │ vmlsl.u32 q14, d28, d0 │ │ movs r0, r2 │ │ ldmia r1!, {r3, r5, r7} │ │ movs r0, r2 │ │ ldmia r2, {r2, r3, r5, r6} │ │ movs r0, r2 │ │ - beq.n 1507d4 │ │ + beq.n 1507d6 │ │ @ instruction: 0xffec8cfc │ │ vqshlu.s32 q14, q8, #15 │ │ movs r0, r2 │ │ ldr r0, [pc, #0] @ (1506e8 ) │ │ stmdb sp!, {r0, r1, r2, r4, sp} │ │ @ instruction: 0xeb00ee36 │ │ @ instruction: 0xeb01db37 │ │ @@ -346008,17 +346008,17 @@ │ │ b.n 150a84 │ │ lsls r0, r5, #2 │ │ b.n 15104a │ │ bfcsel 14, 150f52 , 16, al │ │ asrs r1, r0, #32 │ │ b.n 151292 │ │ mcr2 10, 7, lr, cr9, cr15, {7} @ │ │ - pop {r1, r4, r5, r6, r7, pc} │ │ - vmull.u32 q14, d12, d10 │ │ - vcvt.f32.u32 d29, d8, #20 │ │ + pop {r0, r1, r4, r5, r6, r7, pc} │ │ + vmull.u32 q14, d12, d11 │ │ + vcvt.f32.u32 d29, d9, #20 │ │ vmla.i32 q14, q14, d0[1] │ │ movs r0, r2 │ │ bmi.n 150b10 │ │ bmi.n 150b12 │ │ bmi.n 150b14 │ │ bmi.n 150b16 │ │ bmi.n 150b18 │ │ @@ -350904,15 +350904,15 @@ │ │ movs r1, r0 │ │ b.n 1539b4 │ │ lsrs r0, r2, #28 │ │ b.n 153808 │ │ adds r2, #160 @ 0xa0 │ │ b.n 15386e │ │ movs r5, r0 │ │ - @ instruction: 0xea00c5c4 │ │ + @ instruction: 0xea00c5c5 │ │ vaddl.u32 , d12, d1 │ │ b.n 153a3c │ │ str r1, [r0, r0] │ │ b.n 153a48 │ │ movs r7, r0 │ │ b.n 153bec │ │ asrs r4, r2, #32 │ │ @@ -360639,17 +360639,17 @@ │ │ b.n 158778 │ │ lsls r0, r5, #2 │ │ b.n 158d3e │ │ bpl.n 158836 │ │ add.w r0, r3, r0 │ │ b.n 158f86 │ │ ldrh r0, [r6, #6] │ │ - ldmia.w sp!, {r1, r2, r3, r4, r5, r6, r7, lr} │ │ - vqdmulh.s32 , q6, d11[1] │ │ - vsra.u32 d21, d10, #20 │ │ + ldmia.w sp!, {r0, r1, r2, r3, r4, r5, r6, r7, lr} │ │ + vqdmulh.s32 , q6, d12[1] │ │ + vsra.u32 d21, d11, #20 │ │ @ instruction: 0xffec43ec │ │ movs r0, r2 │ │ lsls r0, r2, #1 │ │ movt r0, #512 @ 0x200 │ │ b.n 158fa2 │ │ asrs r2, r0, #4 │ │ b.n 158fa6 │ │ @@ -360763,23 +360763,23 @@ │ │ bpl.n 1588c0 │ │ add.w r0, r3, r5, lsr #32 │ │ b.n 15911a │ │ strh r0, [r6, #2] │ │ ldmia.w sp!, {r0, r1, r3} │ │ b.n 159122 │ │ strh r0, [r6, #2] │ │ - ldmia.w sp!, {r1, r2, r4, lr} │ │ - @ instruction: 0xffec5b87 │ │ - @ instruction: 0xffec4e9e │ │ + ldmia.w sp!, {r0, r1, r2, r4, lr} │ │ + @ instruction: 0xffec5b88 │ │ + @ instruction: 0xffec4e9f │ │ vrshr.u64 q10, q4, #20 │ │ movs r0, r2 │ │ - ands r2, r0 │ │ - vmlal.u32 q10, d28, d3[1] │ │ - vqrdmlsh.s32 , q14, d14[1] │ │ - vmla.i32 q10, q14, d7[1] │ │ + ands r3, r0 │ │ + vmlal.u32 q10, d28, d4[1] │ │ + vqrdmlsh.s32 , q14, d15[1] │ │ + vmla.i32 q10, q14, d8[1] │ │ vqshrun.s64 d20, q8, #20 │ │ stmdb sp!, {} │ │ b.n 15902e │ │ movs r5, r1 │ │ lsrs r0, r0, #8 │ │ movs r0, r0 │ │ b.n 15903a │ │ @@ -360834,21 +360834,21 @@ │ │ b.n 15893c │ │ lsls r0, r5, #2 │ │ b.n 158f02 │ │ bpl.n 158918 │ │ add.w r0, r3, r5, lsr #32 │ │ b.n 1591ca │ │ ldrh r0, [r6, #0] │ │ - ldmia.w sp!, {r1, r4, r6, r8, r9, sl, fp, ip, sp} │ │ - vmull.u32 , d28, d3[0] │ │ - vqrdmulh.s32 q10, q6, d2[1] │ │ + ldmia.w sp!, {r0, r1, r4, r6, r8, r9, sl, fp, ip, sp} │ │ + vmull.u32 , d28, d4[0] │ │ + vqrdmulh.s32 q10, q6, d3[1] │ │ vsubl.u32 q10, d12, d24 │ │ movs r0, r2 │ │ - subs r7, #62 @ 0x3e │ │ - vshr.u32 d20, d23, #20 │ │ + subs r7, #63 @ 0x3f │ │ + vshr.u32 d20, d24, #20 │ │ vqshrun.s64 d20, q8, #20 │ │ stmdb sp!, {} │ │ b.n 1590ce │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #0 │ │ b.n 158556 │ │ @@ -360952,25 +360952,25 @@ │ │ movs r0, #44 @ 0x2c │ │ b.n 158658 │ │ asrs r1, r0, #32 │ │ b.n 158c3c │ │ movs r0, #2 │ │ b.n 158c40 │ │ @ instruction: 0xffceeaff │ │ - subs r6, #202 @ 0xca │ │ - vqdmulh.s32 , q14, d1[0] │ │ - vrsra.u32 d21, d12, #20 │ │ + subs r6, #203 @ 0xcb │ │ + vqdmulh.s32 , q14, d2[0] │ │ + vrsra.u32 d21, d13, #20 │ │ vsra.u64 d20, d20, #20 │ │ movs r0, r2 │ │ - subs r6, #222 @ 0xde │ │ - vqrdmulh.s32 , q14, d8[0] │ │ - vcvt.f32.u32 d19, d14, #20 │ │ - @ instruction: 0xffec599b │ │ - vmull.p64 , d12, d10 │ │ - @ instruction: 0xffec5999 │ │ + subs r6, #223 @ 0xdf │ │ + vqrdmulh.s32 , q14, d9[0] │ │ + vcvt.f32.u32 d19, d15, #20 │ │ + @ instruction: 0xffec599c │ │ + vmull.p64 , d12, d11 │ │ + @ instruction: 0xffec599a │ │ vqshrun.s64 d20, q8, #20 │ │ stmdb sp!, {ip, lr} │ │ b.n 158e96 │ │ movs r0, r4 │ │ b.n 15905a │ │ ands r1, r0 │ │ b.n 158e9e │ │ @@ -361041,17 +361041,17 @@ │ │ adds r0, #3 │ │ b.n 158d20 │ │ movs r0, r0 │ │ b.n 158b44 │ │ lsls r0, r5, #2 │ │ b.n 15910a │ │ bpl.n 158c1c │ │ - and.w sp, r3, r2, ror #12 │ │ - vmull.u32 , d28, d13 │ │ - vsli.64 q10, q4, #44 @ 0x2c │ │ + and.w sp, r3, r3, ror #12 │ │ + vmull.u32 , d28, d14 │ │ + vsli.64 q10, , #44 @ 0x2c │ │ vaddl.u32 q10, d12, d16 │ │ movs r0, r2 │ │ ldr r0, [pc, #192] @ (158ce0 ) │ │ stmdb sp!, {r3, ip, lr, pc} │ │ b.n 1590c0 │ │ movs r0, r0 │ │ b.n 1592ca │ │ @@ -361136,21 +361136,21 @@ │ │ b.n 158c18 │ │ lsls r0, r5, #2 │ │ b.n 1591de │ │ beq.n 158cf0 │ │ b.n 1591fc │ │ ldr r0, [pc, #192] @ (158da4 ) │ │ ldmia.w sp!, {r0, r4, r6, r7, sl, ip, lr, pc} │ │ - and.w ip, r3, r6, ror #13 │ │ - vqrdmlsh.s32 , q6, d3[1] │ │ - @ instruction: 0xffec48b1 │ │ + and.w ip, r3, r7, ror #13 │ │ + vqrdmlsh.s32 , q6, d4[1] │ │ + @ instruction: 0xffec48b2 │ │ vqrdmlsh.s32 , q6, d12[0] │ │ movs r0, r2 │ │ - subs r4, #98 @ 0x62 │ │ - vmull.p64 , d12, d20 │ │ + subs r4, #99 @ 0x63 │ │ + vmull.p64 , d12, d21 │ │ @ instruction: 0xffec4ff0 │ │ stmdb sp!, {r2, ip, lr, pc} │ │ b.n 1591a4 │ │ ldrh r4, [r0, #24] │ │ stc 0, cr13, [sp, #-288]! @ 0xfffffee0 │ │ b.n 1591ac │ │ str r4, [r0, #0] │ │ @@ -371367,15 +371367,15 @@ │ │ b.n 15e84e │ │ movs r0, r0 │ │ b.n 15e34a │ │ add r6, pc, #472 @ (adr r6, 15e414 ) │ │ add.w r0, r1, r5, lsl #16 │ │ b.n 15e582 │ │ mcr2 10, 7, lr, cr14, cr15, {7} @ │ │ - stc2 15, cr15, [r5], {235} @ 0xeb │ │ + stc2 15, cr15, [r6], {235} @ 0xeb │ │ blx 55e88c │ │ blx 55e890 │ │ ldr r7, [pc, #960] @ (15e614 ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 15e774 │ │ svc 107 @ 0x6b │ │ b.n 15e6f8 │ │ @@ -556434,17 +556434,17 @@ │ │ subs r1, #220 @ 0xdc │ │ @ instruction: 0xeb02d008 │ │ b.n 1bfddc │ │ ldr r0, [pc, #0] @ (1bf8c4 ) │ │ ldmia.w sp!, {r3, ip, lr, pc} │ │ b.n 1bfde4 │ │ vrhadd.u16 d14, d14, d31 │ │ - beq.n 1bf7d4 │ │ - vcvt.u32.f32 , , #27 │ │ - vshll.u32 q15, d28, #5 │ │ + beq.n 1bf7d6 │ │ + vcvt.u32.f32 , q2, #27 │ │ + vshll.u32 q15, d29, #5 │ │ vrsra.u32 , q8, #27 │ │ movs r1, r1 │ │ eors r0, r6 │ │ stmdb sp!, {r0, ip, lr} │ │ b.n 1bfc26 │ │ ands r0, r0 │ │ b.n 1bfc2a │ │ @@ -559617,15 +559617,15 @@ │ │ movs r1, r5 │ │ ldr r2, [sp, #0] │ │ asrs r4, r2, #10 │ │ b.n 1c0fe8 │ │ asrs r1, r0, #32 │ │ b.n 1c15cc │ │ lsls r6, r0, #1 │ │ - @ instruction: 0xea00c569 │ │ + @ instruction: 0xea00c56a │ │ vaddl.u32 , d5, d1 │ │ b.n 1c1944 │ │ str r0, [r0, #0] │ │ b.n 1c1bfe │ │ movs r0, r0 │ │ b.n 1c1b6c │ │ movs r7, r7 │ │ @@ -559686,15 +559686,15 @@ │ │ b.n 1c1074 │ │ ldc2l 10, cr14, [r9, #1020]! @ 0x3fc @ │ │ movs r3, r1 │ │ b.n 1c1d02 │ │ beq.n 1c15cc │ │ b.n 1c1a60 │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r0, r4, r6, r7, r8, ip, lr, pc} │ │ + ldmia.w sp!, {r1, r4, r6, r7, r8, ip, lr, pc} │ │ vshr.u32 d17, d8, #27 │ │ b.n 1c1082 │ │ movs r0, r2 │ │ b.n 1c1086 │ │ lsls r1, r0, #12 │ │ b.n 1c165a │ │ asrs r2, r1, #32 │ │ @@ -559781,15 +559781,15 @@ │ │ movs r0, r0 │ │ b.n 1c1d4e │ │ movs r0, r3 │ │ b.n 1c1122 │ │ movs r4, r3 │ │ b.n 1c1126 │ │ @ instruction: 0xfba5eaff │ │ - bgt.n 1c15a0 │ │ + bgt.n 1c15a2 │ │ vaddl.u32 q8, d5, d6 │ │ b.n 1c1730 │ │ asrs r6, r0, #32 │ │ b.n 1c172e │ │ cmp r5, #6 │ │ b.n 1c1d6a │ │ adds r2, #28 │ │ @@ -559883,15 +559883,15 @@ │ │ b.n 1c1e2e │ │ movs r3, r1 │ │ b.n 1c1eb2 │ │ movs r2, r0 │ │ b.n 1c1d98 │ │ ldc2 10, cr1, [r1, #1020] @ 0x3fc @ │ │ @ instruction: 0xfb6ceaff │ │ - blt.n 1c16ec │ │ + blt.n 1c16ee │ │ vshr.u32 d20, d8, #27 │ │ b.n 1c1240 │ │ lsls r0, r0, #1 │ │ b.n 1c1c12 │ │ adds r2, r0, r5 │ │ add.w r0, r0, r4, lsr #4 │ │ b.n 1c124c │ │ @@ -559904,24 +559904,24 @@ │ │ str r3, [r1, r0] │ │ b.n 1c1a62 │ │ stmia r0!, {r3} │ │ b.n 1c1a66 │ │ b.n 1c173a │ │ b.n 1c1a6a │ │ ldc2l 10, cr14, [sp, #-1020]! @ 0xfffffc04 @ │ │ - ldmia r4, {r0, r1, r2, r3, r4, r6, r7} │ │ - @ instruction: 0xffe5da96 │ │ - @ instruction: 0xffe5cc9f │ │ - vmlsl.u32 q14, d21, d14[0] │ │ - vrsra.u64 , q15, #27 │ │ - vshr.u64 q14, , #27 │ │ - vqrdmlah.s32 , , d7[0] │ │ - vrsubhn.i64 d29, , q15 │ │ - vqshrn.u64 d27, , #27 │ │ - vrshr.u32 q14, , #27 │ │ + ldmia r4!, {r5, r6, r7} │ │ + @ instruction: 0xffe5da97 │ │ + vmull.u32 q14, d21, d16 │ │ + vmlsl.u32 q14, d21, d15[0] │ │ + vrsra.u64 , , #27 │ │ + vshr.u64 q14, q10, #27 │ │ + vqrdmlah.s32 , , d8[0] │ │ + vrsubhn.i64 d29, , │ │ + vqshrn.u64 d27, q15, #27 │ │ + vmlal.u32 q14, d5, d0[1] │ │ @ instruction: 0xffe54ff0 │ │ stmdb sp!, {r2, ip, lr, pc} │ │ b.n 1c1bf8 │ │ str r0, [sp, #0] │ │ b.n 1c1aa2 │ │ add r0, pc, #4 @ (adr r0, 1c1768 ) │ │ b.n 1c1aa6 │ │ @@ -560926,15 +560926,15 @@ │ │ vpmin.u , q14, │ │ movs r2, r1 │ │ b.n 1c233a │ │ asrs r2, r0, #32 │ │ b.n 1c273e │ │ lsrs r4, r4, #25 │ │ @ instruction: 0xeb00ff78 │ │ - @ instruction: 0xeaffca59 │ │ + @ instruction: 0xeaffca5a │ │ @ instruction: 0xffe54ff0 │ │ stmdb sp!, {r2, r4, r5, r6, ip, lr, pc} │ │ b.n 1c24ac │ │ strh r0, [r5, #0] │ │ b.n 1c1b36 │ │ add sp, #0 │ │ b.n 1c235a │ │ @@ -567020,15 +567020,15 @@ │ │ b.n 1c4db4 │ │ bf 1e, 1c287a │ │ adds r0, #0 │ │ b.n 1c5a42 │ │ add r0, pc, #48 @ (adr r0, 1c52b4 ) │ │ b.n 1c4dc0 │ │ bf 1e, 1bf886 │ │ - str r7, [sp, #808] @ 0x328 │ │ + str r7, [sp, #812] @ 0x32c │ │ vaddl.u32 q8, d5, d1 │ │ b.n 1c5980 │ │ movs r2, r1 │ │ ldmia r2!, {} │ │ movs r1, r0 │ │ b.n 1c598c │ │ movs r5, r0 │ │ @@ -570439,18 +570439,18 @@ │ │ b.n 1c6fa4 │ │ b.n 1c736a │ │ @ instruction: 0xebff000b │ │ b.n 1c764e │ │ beq.n 1c6e98 │ │ b.n 1c73ac │ │ ldrh r0, [r6, #62] @ 0x3e │ │ - ldmia.w sp!, {r0, r1, r5, r6, r7, ip, sp, lr} │ │ + ldmia.w sp!, {r2, r5, r6, r7, ip, sp, lr} │ │ vrsubhn.i64 d16, , q14 │ │ movs r0, r0 │ │ - ldrb r5, [r4, r6] │ │ + ldrb r6, [r4, r6] │ │ @ instruction: 0xffe54ff0 │ │ stmdb sp!, {r2, r3, r6, ip, lr, pc} │ │ b.n 1c7344 │ │ b.n 1c6f2c │ │ b.n 1c73c8 │ │ add r0, pc, #480 @ (adr r0, 1c7090 ) │ │ b.n 1c73b8 │ │ @@ -570665,25 +570665,25 @@ │ │ movs r0, #44 @ 0x2c │ │ b.n 1c6bbc │ │ asrs r1, r0, #32 │ │ b.n 1c71a0 │ │ movs r0, #2 │ │ b.n 1c71a4 │ │ @ instruction: 0xffbdeaff │ │ - ldr r2, [r5, r6] │ │ - vabdl.u32 , d21, d17 │ │ - vqdmulh.s32 q11, , d14[0] │ │ + ldr r3, [r5, r6] │ │ + vabdl.u32 , d21, d18 │ │ + vqdmulh.s32 q11, , d15[0] │ │ @ instruction: 0xffe55c94 │ │ movs r1, r1 │ │ - ldr r6, [r7, r6] │ │ - @ instruction: 0xffe559f3 │ │ - @ instruction: 0xffe558ba │ │ - vsri.32 d23, d23, #27 │ │ - vmlal.u32 , d21, d22 │ │ - vqshrun.s64 d23, , #27 │ │ + ldr r7, [r7, r6] │ │ + @ instruction: 0xffe559f4 │ │ + @ instruction: 0xffe558bb │ │ + vsri.32 d23, d24, #27 │ │ + vmlal.u32 , d21, d23 │ │ + vqshrun.s64 d23, q5, #27 │ │ vaddl.u32 q8, d5, d0 │ │ b.n 1c7756 │ │ movs r7, r0 │ │ lsrs r0, r0, #8 │ │ movs r0, #8 │ │ b.n 1c6bde │ │ movs r0, r0 │ │ @@ -570760,25 +570760,25 @@ │ │ movs r0, #44 @ 0x2c │ │ b.n 1c6c9c │ │ asrs r1, r0, #32 │ │ b.n 1c7280 │ │ movs r0, #2 │ │ b.n 1c7284 │ │ @ instruction: 0xffdfeaff │ │ - ldr r2, [r0, r1] │ │ - vqshlu.s32 d23, d25, #5 │ │ - vmlal.u32 , d21, d6 │ │ + ldr r3, [r0, r1] │ │ + vqshlu.s32 d23, d26, #5 │ │ + vmlal.u32 , d21, d7 │ │ @ instruction: 0xffe55b2c │ │ movs r1, r1 │ │ - ldr r6, [r2, r1] │ │ - vmlal.u32 , d21, d11 │ │ - vqshl.u64 , q5, #37 @ 0x25 │ │ - vrsra.u32 , , #27 │ │ - @ instruction: 0xffe557c6 │ │ - vqshl.u32 d23, d25, #5 │ │ + ldr r7, [r2, r1] │ │ + vmlal.u32 , d21, d12 │ │ + vqshl.u64 , , #37 @ 0x25 │ │ + vrsra.u32 , q4, #27 │ │ + @ instruction: 0xffe557c7 │ │ + vqshl.u32 d23, d26, #5 │ │ vqshrun.s64 d20, q8, #27 │ │ stmdb sp!, {r0, lr} │ │ b.n 1c74da │ │ str r0, [r0, r0] │ │ b.n 1c74de │ │ vqrdmlah.s32 q15, q12, │ │ movs r0, #160 @ 0xa0 │ │ @@ -570886,25 +570886,25 @@ │ │ movs r0, #44 @ 0x2c │ │ b.n 1c6dcc │ │ asrs r1, r0, #32 │ │ b.n 1c73b0 │ │ movs r0, #2 │ │ b.n 1c73b4 │ │ @ instruction: 0xffd7eaff │ │ - ldrsb r2, [r6, r4] │ │ - vabal.u32 , d5, d25 │ │ - vqshl.u32 , q11, #5 │ │ + ldrsb r3, [r6, r4] │ │ + vabal.u32 , d5, d26 │ │ + vqshl.u32 , , #5 │ │ vshll.u32 , d12, #5 │ │ movs r1, r1 │ │ - ldrsb r6, [r0, r5] │ │ - vqshl.u32 , , #5 │ │ - vrsubhn.i64 d21, , q13 │ │ - vsubl.u32 , d5, d23 │ │ - vqshlu.s64 d21, d6, #37 @ 0x25 │ │ - vrsubhn.i64 d23, , │ │ + ldrsb r7, [r0, r5] │ │ + vqshl.u32 , q14, #5 │ │ + vrsubhn.i64 d21, , │ │ + vsubl.u32 , d5, d24 │ │ + vqshlu.s64 d21, d7, #37 @ 0x25 │ │ + vrsubhn.i64 d23, , q5 │ │ vshr.u32 d20, d0, #27 │ │ stmdb sp!, {} │ │ b.n 1c796a │ │ movs r1, r3 │ │ lsrs r0, r0, #8 │ │ ands r0, r0 │ │ b.n 1c7612 │ │ @@ -570973,21 +570973,21 @@ │ │ b.n 1c7484 │ │ movs r0, r0 │ │ b.n 1c72a8 │ │ lsls r0, r5, #2 │ │ b.n 1c786e │ │ ands r0, r2 │ │ ldmia.w sp!, {r1, r2, r3, r5, r8, r9, fp, ip} │ │ - and.w r5, r2, r6, asr #23 │ │ - @ instruction: 0xffe56db9 │ │ - vqshrun.s64 d23, , #27 │ │ + and.w r5, r2, r7, asr #23 │ │ + @ instruction: 0xffe56dba │ │ + vqshrun.s64 d23, q3, #27 │ │ @ instruction: 0xffe558bc │ │ movs r1, r1 │ │ - strb r2, [r2, r7] │ │ - vqshlu.s64 , , #37 @ 0x25 │ │ + strb r3, [r2, r7] │ │ + vqshlu.s64 , q13, #37 @ 0x25 │ │ vshr.u32 d20, d0, #27 │ │ stmdb sp!, {lr} │ │ b.n 1c76d6 │ │ @ instruction: 0xffc9ebff │ │ movs r0, r0 │ │ b.n 1c7ade │ │ lsls r0, r5, #2 │ │ @@ -765544,17 +765544,17 @@ │ │ movs r4, r0 │ │ b.n 24bb6e │ │ lsrs r7, r7, #7 │ │ add.w r0, r0, r4 │ │ b.n 24bb76 │ │ lsrs r1, r2, #11 │ │ add.w r9, r0, r4, ror #2 │ │ - add.w pc, r0, lr │ │ - vqshl.u64 d18, d30, #29 │ │ - @ instruction: 0xffdd2f22 │ │ + add.w pc, r0, pc │ │ + vqshl.u64 d18, d31, #29 │ │ + @ instruction: 0xffdd2f23 │ │ vraddhn.i32 d17, , q0 │ │ movs r1, r0 │ │ ldr r4, [pc, #448] @ (24ba10 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ b.n 24bd70 │ │ str r0, [r1, r0] │ │ b.n 24b390 │ │ @@ -765670,17 +765670,17 @@ │ │ movs r4, r0 │ │ b.n 24bc8a │ │ lsrs r0, r7, #6 │ │ add.w r0, r0, r4 │ │ b.n 24bc92 │ │ lsrs r2, r1, #10 │ │ add.w r9, r0, sp, asr #1 │ │ - add.w sp, r0, r2, ror #3 │ │ - @ instruction: 0xffdd0ef4 │ │ - vmull.p q9, d13, d6 │ │ + add.w sp, r0, r3, ror #3 │ │ + @ instruction: 0xffdd0ef5 │ │ + vmull.p q9, d13, d7 │ │ vmlal.u16 , d29, d4[2] │ │ movs r1, r0 │ │ ldr r7, [pc, #960] @ (24bd2c ) │ │ stmdb sp!, {r2, r3, r4, ip, sp, pc} │ │ b.n 24be8c │ │ beq.n 24b99c │ │ b.n 24be10 │ │ @@ -766294,17 +766294,17 @@ │ │ movs r4, r0 │ │ b.n 24c1be │ │ lsrs r3, r5, #1 │ │ add.w r0, r0, r4 │ │ b.n 24c1c6 │ │ lsrs r5, r7, #4 │ │ add.w r8, r0, r0, asr #32 │ │ - add.w r8, r0, lr, ror #2 │ │ - vmull.p q9, d29, d7 │ │ - @ instruction: 0xffdd28d2 │ │ + add.w r8, r0, pc, ror #2 │ │ + vmull.p q9, d29, d8 │ │ + @ instruction: 0xffdd28d3 │ │ @ instruction: 0xffdd0db0 │ │ movs r1, r0 │ │ movs r1, r0 │ │ b.n 24c1e2 │ │ asrs r2, r0, #32 │ │ b.n 24c1e6 │ │ @ instruction: 0xffffeaff │ │ @@ -766558,22 +766558,22 @@ │ │ movs r4, r0 │ │ b.n 24c402 │ │ lsls r2, r3, #31 │ │ add.w r0, r0, r4 │ │ b.n 24c40a │ │ lsrs r4, r5, #2 │ │ add.w r7, r0, pc, lsl #2 │ │ - add.w r6, r0, sl, ror #1 │ │ - @ instruction: 0xffdd2c53 │ │ - vabdl.u16 q8, d29, d8 │ │ + add.w r6, r0, fp, ror #1 │ │ + @ instruction: 0xffdd2c54 │ │ + vabdl.u16 q8, d29, d9 │ │ @ instruction: 0xffdd0b6c │ │ movs r1, r0 │ │ - lsls r2, r6, #26 │ │ - vmull.u16 q9, d29, d11 │ │ - vsri.16 q9, , #3 │ │ + lsls r3, r6, #26 │ │ + vmull.u16 q9, d29, d12 │ │ + vsri.16 q9, q3, #3 │ │ @ instruction: 0xffdd0ba4 │ │ movs r1, r0 │ │ movs r1, r0 │ │ b.n 24c436 │ │ asrs r2, r0, #32 │ │ b.n 24c43a │ │ vpmin.u32 q15, q13, │ │ @@ -766837,17 +766837,17 @@ │ │ movs r4, r0 │ │ b.n 24c67e │ │ lsls r2, r2, #5 │ │ @ instruction: 0xeb00d01c │ │ b.n 24c7dc │ │ ldrh r0, [r6, #62] @ 0x3e │ │ ldmia.w sp!, {r4, r5, r6, r7, r9, sl} │ │ - add.w r4, r0, r2, lsl #1 │ │ - vshr.u64 d17, d9, #35 │ │ - @ instruction: 0xffdd1980 │ │ + add.w r4, r0, r3, lsl #1 │ │ + vshr.u64 d17, d10, #35 │ │ + @ instruction: 0xffdd1981 │ │ vqshrn.u32 d16, q10, #3 │ │ movs r1, r0 │ │ ldr r4, [pc, #64] @ (24c3a0 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 24c880 │ │ udf #46 @ 0x2e │ │ b.n 24c804 │ │ @@ -766904,17 +766904,17 @@ │ │ movs r4, r0 │ │ b.n 24c71a │ │ lsls r4, r2, #28 │ │ add.w r0, r0, r4 │ │ b.n 24c722 │ │ lsls r6, r4, #31 │ │ add.w r6, r0, r9, lsl #3 │ │ - add.w r3, r0, r2, asr #1 │ │ - @ instruction: 0xffdd236b │ │ - vqshl.u16 d16, d24, #13 │ │ + add.w r3, r0, r3, asr #1 │ │ + @ instruction: 0xffdd236c │ │ + vqshl.u16 d16, d25, #13 │ │ vqrshrun.s32 d16, q2, #3 │ │ movs r1, r0 │ │ ldr r7, [pc, #448] @ (24c5bc ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ b.n 24c91c │ │ beq.n 24c464 │ │ b.n 24c8a0 │ │ @@ -767551,17 +767551,17 @@ │ │ movs r4, r0 │ │ b.n 24ccde │ │ lsls r3, r4, #22 │ │ add.w r0, r0, r4 │ │ b.n 24cce6 │ │ lsls r5, r6, #25 │ │ add.w r5, r0, r8, lsr #1 │ │ - @ instruction: 0xeb00fd9e │ │ - @ instruction: 0xffdc0e11 │ │ - vmla.i16 , , d2[3] │ │ + @ instruction: 0xeb00fd9f │ │ + @ instruction: 0xffdc0e12 │ │ + vmla.i16 , , d3[3] │ │ vrshr.u64 d16, d0, #35 │ │ movs r1, r0 │ │ ldr r4, [pc, #64] @ (24ca00 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 24cee0 │ │ adds r0, #2 │ │ b.n 24cecc │ │ @@ -767655,17 +767655,17 @@ │ │ movs r4, r0 │ │ b.n 24cdc6 │ │ lsls r1, r5, #21 │ │ add.w r0, r0, r4 │ │ b.n 24cdce │ │ lsls r3, r7, #24 │ │ add.w r5, r0, lr, lsr #32 │ │ - @ instruction: 0xeb00fcb6 │ │ - vrsra.u16 d17, d31, #4 │ │ - vaddl.u16 , d13, d2 │ │ + @ instruction: 0xeb00fcb7 │ │ + @ instruction: 0xffdc1340 │ │ + vaddl.u16 , d13, d3 │ │ vaddw.u16 q8, , d24 │ │ movs r1, r0 │ │ movs r7, r3 │ │ b.n 24d22c │ │ lsrs r1, r0, #16 │ │ b.n 24cf2e │ │ lsrs r0, r2, #28 │ │ @@ -767782,17 +767782,17 @@ │ │ movs r4, r0 │ │ b.n 24cee2 │ │ lsls r2, r4, #20 │ │ add.w r0, r0, r4 │ │ b.n 24ceea │ │ lsls r4, r6, #23 │ │ add.w r4, r0, r7, lsr #3 │ │ - @ instruction: 0xeb00fb9a │ │ - vshll.u16 , d30, #12 │ │ - @ instruction: 0xffdc1d24 │ │ + @ instruction: 0xeb00fb9b │ │ + vshll.u16 , d31, #12 │ │ + @ instruction: 0xffdc1d25 │ │ vaddl.u16 q8, d29, d12 │ │ movs r1, r0 │ │ ldr r0, [pc, #960] @ (24cf84 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ b.n 24d0e4 │ │ ands r2, r0 │ │ b.n 24cf0e │ │ @@ -767904,17 +767904,17 @@ │ │ movs r4, r0 │ │ b.n 24cff2 │ │ lsls r6, r3, #19 │ │ add.w r0, r0, r4 │ │ b.n 24cffa │ │ lsls r0, r6, #22 │ │ add.w r4, r0, r3, lsr #2 │ │ - @ instruction: 0xeb00fa8a │ │ - vqdmulh.s16 q8, q14, d1[1] │ │ - @ instruction: 0xffdd1c14 │ │ + @ instruction: 0xeb00fa8b │ │ + vqdmulh.s16 q8, q14, d2[1] │ │ + @ instruction: 0xffdd1c15 │ │ @ instruction: 0xffddff7c │ │ movs r0, r0 │ │ ldr r4, [pc, #448] @ (24ce94 ) │ │ stmdb sp!, {r4, ip, sp, pc} │ │ b.n 24d1f4 │ │ beq.n 24ccec │ │ b.n 24d178 │ │ @@ -768374,24 +768374,24 @@ │ │ b.n 24d40e │ │ lsls r3, r5, #18 │ │ add.w r3, r0, lr, lsl #2 │ │ add.w r4, r0, r0, lsl #1 │ │ movs r1, r0 │ │ lsls r0, r2, #17 │ │ movs r1, r0 │ │ - bl c4098 │ │ - lsls r4, r3, #1 │ │ - vsli.16 d16, d0, #13 │ │ + bl c5098 │ │ + lsls r5, r3, #1 │ │ + vsli.16 d16, d1, #13 │ │ @ instruction: 0xffddfb68 │ │ movs r0, r0 │ │ lsls r4, r6, #16 │ │ movs r1, r0 │ │ - bl fc0ac │ │ - lsls r4, r2, #2 │ │ - @ instruction: 0xffdd1b16 │ │ + bl fd0ac │ │ + lsls r5, r2, #2 │ │ + @ instruction: 0xffdd1b17 │ │ @ instruction: 0xffddfba0 │ │ movs r0, r0 │ │ asrs r2, r0, #32 │ │ b.n 24d606 │ │ lsls r1, r4, #2 │ │ b.n 24d44a │ │ lsls r0, r2, #2 │ │ @@ -769383,95 +769383,95 @@ │ │ b.n 24da7c │ │ vrhadd.u16 d14, d14, d31 │ │ lsls r4, r0, #5 │ │ b.n 24d4a4 │ │ movs r0, r0 │ │ b.n 24da88 │ │ vrhadd.u16 d14, d14, d31 │ │ - @ instruction: 0xf94affdc │ │ - lsls r7, r7, #8 │ │ - vmls.f16 q8, , d2[3] │ │ - @ instruction: 0xffddf994 │ │ - vqshlu.s64 , q3, #28 │ │ - vsra.u16 , , #4 │ │ - vmull.u16 , d29, d0[3] │ │ - vmla.i16 q8, q6, d1[3] │ │ - @ instruction: 0xffddef23 │ │ - vqshlu.s64 , , #28 │ │ - vqshlu.s16 , q8, #12 │ │ - vqrshrun.s32 d16, , #4 │ │ - vrsra.u64 d16, d22, #35 │ │ - @ instruction: 0xffdd0f2d │ │ - vraddhn.i32 d31, , │ │ - vrshr.u64 d16, d21, #36 │ │ - vqrdmlsh.s16 , , d0[0] │ │ - vabdl.u16 , d28, d25 │ │ - vqrshrun.s32 d16, , #4 │ │ - vrshr.u64 d31, d29, #35 │ │ - vmlal.u16 , d28, d5[2] │ │ - @ instruction: 0xffdcf36c │ │ - vmla.i16 , q14, d6[3] │ │ - @ instruction: 0xffdd0ffc │ │ - vsri.16 d16, d9, #3 │ │ - vsubw.u16 , , d0 │ │ - vmul.i16 , , d7[0] │ │ - vqrdmlsh.s16 q15, q14, d6[0] │ │ - vsri.16 d31, d17, #4 │ │ - vsli.16 q8, , #12 │ │ - vraddhn.i32 d31, , │ │ - vmla.f16 q8, q6, d7[0] │ │ - vqshl.u64 d31, d23, #29 │ │ - vrshr.u16 d31, d18, #4 │ │ - vmla.f16 , q14, d6[2] │ │ - vqshl.u64 q8, q11, #28 │ │ - vmlsl.u16 q8, d13, d3[3] │ │ - vsli.64 , , #29 │ │ - vsli.64 d16, d27, #28 │ │ - vqshrun.s32 d16, q11, #3 │ │ - @ instruction: 0xffdd0a99 │ │ - @ instruction: 0xffddf9fb │ │ - vqshl.u16 d16, d19, #12 │ │ - vqrshrn.u32 d31, , #3 │ │ - vshll.u16 q8, d0, #12 │ │ - vrshr.u64 , , #35 │ │ - vsli.16 d17, d26, #13 │ │ - @ instruction: 0xffddffaf │ │ - @ instruction: 0xffdc0bf4 │ │ - vsubw.u16 q8, , d31 │ │ - vsra.u64 d31, d3, #35 │ │ - @ instruction: 0xffdcfb03 │ │ - @ instruction: 0xffdc0904 │ │ - @ instruction: 0xffddfb2f │ │ - vmla.f16 , q6, d1[0] │ │ - vrsra.u64 d31, d1, #35 │ │ - vsra.u64 , q11, #36 │ │ - @ instruction: 0xffdc07c3 │ │ - vshr.u16 , q0, #3 │ │ - vmla.f16 , , d5[0] │ │ - vsli.16 d16, d19, #12 │ │ - vshr.u64 q8, q7, #35 │ │ - vaddl.u16 , d29, d10 │ │ - vrsra.u16 d17, d3, #4 │ │ - vqshlu.s64 q8, q13, #29 │ │ - vrshr.u64 , , #35 │ │ - vrsra.u64 , q13, #35 │ │ - vmla.i16 q8, , d0[1] │ │ - vqshlu.s16 d31, d4, #13 │ │ - vrshr.u16 q8, , #4 │ │ - vaddw.u16 , , d7 │ │ - @ instruction: 0xffddff53 │ │ - vrshr.u16 , , #4 │ │ - vrsra.u64 d31, d8, #36 │ │ - vmull.u16 q15, d28, d6 │ │ - @ instruction: 0xffdcfb5a │ │ - vrsra.u64 d16, d16, #36 │ │ - @ instruction: 0xffddf99c │ │ - vsli.16 , q5, #12 │ │ - vraddhn.i32 d31, q6, │ │ - vmlal.u16 q8, d28, d19 │ │ + @ instruction: 0xf94bffdc │ │ + lsls r0, r0, #9 │ │ + vmls.f16 q8, , d3[3] │ │ + @ instruction: 0xffddf995 │ │ + vqshlu.s64 , , #28 │ │ + vsra.u16 , q14, #4 │ │ + vmull.u16 , d29, d1[3] │ │ + vmla.i16 q8, q6, d2[3] │ │ + @ instruction: 0xffddef24 │ │ + vqshlu.s64 , q15, #28 │ │ + vqshlu.s16 , , #12 │ │ + vqrshrun.s32 d16, q2, #4 │ │ + vrsra.u64 d16, d23, #35 │ │ + @ instruction: 0xffdd0f2e │ │ + vraddhn.i32 d31, , q5 │ │ + vrshr.u64 d16, d22, #36 │ │ + vqrdmlsh.s16 , , d1[0] │ │ + vabdl.u16 , d28, d26 │ │ + vqrshrun.s32 d16, q5, #4 │ │ + vrshr.u64 d31, d30, #35 │ │ + vmlal.u16 , d28, d6[2] │ │ + @ instruction: 0xffdcf36d │ │ + vmla.i16 , q14, d7[3] │ │ + @ instruction: 0xffdd0ffd │ │ + vsri.16 d16, d10, #3 │ │ + vsubw.u16 , , d1 │ │ + vmul.i16 , , d0[1] │ │ + vqrdmlsh.s16 q15, q14, d7[0] │ │ + vsri.16 d31, d18, #4 │ │ + vsli.16 q8, q2, #12 │ │ + vsri.16 d31, d16, #3 │ │ + vmla.f16 q8, q6, d0[1] │ │ + vqshl.u64 d31, d24, #29 │ │ + vrshr.u16 d31, d19, #4 │ │ + vmla.f16 , q14, d7[2] │ │ + vqshl.u64 q8, , #28 │ │ + vmlsl.u16 q8, d13, d4[3] │ │ + vsli.64 , q15, #29 │ │ + vsli.64 d16, d28, #28 │ │ + vqshrun.s32 d16, , #3 │ │ + @ instruction: 0xffdd0a9a │ │ + @ instruction: 0xffddf9fc │ │ + vqshl.u16 d16, d20, #12 │ │ + vqrshrn.u32 d31, q6, #3 │ │ + vshll.u16 q8, d1, #12 │ │ + vmlal.u16 , d29, d0[2] │ │ + vsli.16 d17, d27, #13 │ │ + @ instruction: 0xffddffb0 │ │ + @ instruction: 0xffdc0bf5 │ │ + vrsra.u64 d16, d16, #35 │ │ + vsra.u64 d31, d4, #35 │ │ + @ instruction: 0xffdcfb04 │ │ + @ instruction: 0xffdc0905 │ │ + @ instruction: 0xffddfb30 │ │ + vmla.f16 , q6, d2[0] │ │ + vrsra.u64 d31, d2, #35 │ │ + vsra.u64 , , #36 │ │ + @ instruction: 0xffdc07c4 │ │ + vshr.u16 , , #3 │ │ + vmla.f16 , , d6[0] │ │ + vsli.16 d16, d20, #12 │ │ + vshr.u64 q8, , #35 │ │ + vaddl.u16 , d29, d11 │ │ + vrsra.u16 d17, d4, #4 │ │ + vqshlu.s64 q8, , #29 │ │ + vrshr.u64 , q6, #35 │ │ + vrsra.u64 , , #35 │ │ + vmla.i16 q8, , d1[1] │ │ + vqshlu.s16 d31, d5, #13 │ │ + vrshr.u16 q8, q15, #4 │ │ + vaddw.u16 , , d8 │ │ + @ instruction: 0xffddff54 │ │ + vrshr.u16 , q7, #4 │ │ + vrsra.u64 d31, d9, #36 │ │ + vmull.u16 q15, d28, d7 │ │ + @ instruction: 0xffdcfb5b │ │ + vrsra.u64 d16, d17, #36 │ │ + @ instruction: 0xffddf99d │ │ + vsli.16 , , #12 │ │ + vraddhn.i32 d31, q6, q13 │ │ + vmlal.u16 q8, d28, d20 │ │ @ instruction: 0xffdd4c10 │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 24dfd4 │ │ asrs r0, r6, #32 │ │ b.n 24d5fc │ │ movs r0, #48 @ 0x30 │ │ b.n 24d600 │ │ @@ -769492,17 +769492,17 @@ │ │ movs r4, r0 │ │ b.n 24de22 │ │ lsls r2, r2, #5 │ │ add.w r0, r0, r4 │ │ b.n 24de2a │ │ lsls r4, r4, #8 │ │ add.w r1, r0, r7 │ │ - @ instruction: 0xeb00ec5a │ │ - @ instruction: 0xffdcfb1f │ │ - vabdl.u16 , d12, d23 │ │ + @ instruction: 0xeb00ec5b │ │ + @ instruction: 0xffdcfb20 │ │ + vabdl.u16 , d12, d24 │ │ vmla.f16 , q6, d4[1] │ │ movs r0, r0 │ │ ldr r4, [pc, #64] @ (24db44 ) │ │ stmdb sp!, {r3, ip, sp, pc} │ │ b.n 24e024 │ │ asrs r0, r6, #32 │ │ b.n 24d64c │ │ @@ -769525,17 +769525,17 @@ │ │ movs r4, r0 │ │ b.n 24de72 │ │ lsls r6, r7, #4 │ │ add.w r0, r0, r4 │ │ b.n 24de7a │ │ lsls r0, r2, #8 │ │ add.w r0, r0, r3, ror #3 │ │ - @ instruction: 0xeb00ec0a │ │ - vsubw.u16 , q6, d11 │ │ - vqshl.u64 q8, , #28 │ │ + @ instruction: 0xeb00ec0b │ │ + vsubw.u16 , q6, d12 │ │ + vqshl.u64 q8, q9, #28 │ │ vshr.u64 , q14, #35 │ │ movs r0, r0 │ │ ldr r5, [pc, #960] @ (24df14 ) │ │ stmdb sp!, {r3, r4, ip, sp, pc} │ │ b.n 24e074 │ │ svc 214 @ 0xd6 │ │ b.n 24dff8 │ ├── readelf --wide --decompress --hex-dump=.data.rel.ro {} │ │ @@ -129,52 +129,52 @@ │ │ 0x00252b70 4c2b2500 95c30700 a1af0700 ed1f2400 L+%...........$. │ │ 0x00252b80 9daf0700 99c30700 4dc20100 63000000 ........M...c... │ │ 0x00252b90 79000000 09000000 1bc30100 78000000 y...........x... │ │ 0x00252ba0 8c000000 09000000 1bc30100 78000000 ............x... │ │ 0x00252bb0 74000000 09000000 fec30100 74000000 t...........t... │ │ 0x00252bc0 3f000000 09000000 88c40100 7d000000 ?...........}... │ │ 0x00252bd0 46000000 2e000000 bcb30100 00000000 F............... │ │ - 0x00252be0 00000000 00000000 02000000 7ace0100 ............z... │ │ + 0x00252be0 00000000 00000000 02000000 7bce0100 ............{... │ │ 0x00252bf0 a03e0900 a43e0900 01000000 04000000 .>...>.......... │ │ - 0x00252c00 68e70100 08430900 0c430900 02000000 h....C...C...... │ │ + 0x00252c00 69e70100 08430900 0c430900 02000000 i....C...C...... │ │ 0x00252c10 00000000 00000000 00000000 00000000 ................ │ │ - 0x00252c20 00000000 01000000 1bca0100 0ad7233f ..............#? │ │ + 0x00252c20 00000000 01000000 1cca0100 0ad7233f ..............#? │ │ 0x00252c30 c3f5a83e 9a99993e 9a99193f 9a99193e ...>...>...?...> │ │ 0x00252c40 8fc2753d 371aa03e b072a83e 04000000 ..u=7..>.r.>.... │ │ - 0x00252c50 cbca0100 1f852b3f c3f5a83e 3d0a573e ......+?...>=.W> │ │ + 0x00252c50 ccca0100 1f852b3f c3f5a83e 3d0a573e ......+?...>=.W> │ │ 0x00252c60 8fc2353f 295c0f3e 0ad7a33d 52b89e3e ..5?)\.>...=R..> │ │ - 0x00252c70 c1caa13e 05000000 f8db0100 0ad7233f ...>..........#? │ │ + 0x00252c70 c1caa13e 05000000 f9db0100 0ad7233f ...>..........#? │ │ 0x00252c80 c3f5a83e e17a943e 9a99193f 9a99193e ...>.z.>...?...> │ │ 0x00252c90 8fc2753d 371aa03e b072a83e 06000000 ..u=7..>.r.>.... │ │ 0x00252ca0 b5c50100 ae47213f 7b14ae3e 52b89e3e .....G!?{..>R..> │ │ 0x00252cb0 ec51183f 52b81e3e 295c8f3d 371aa03e .Q.?R..>)\.=7..> │ │ - 0x00252cc0 b072a83e 07000000 04d70100 ae47213f .r.>.........G!? │ │ + 0x00252cc0 b072a83e 07000000 05d70100 ae47213f .r.>.........G!? │ │ 0x00252cd0 7b14ae3e 52b89e3e ec51183f 52b81e3e {..>R..>.Q.?R..> │ │ 0x00252ce0 295c8f3d 371aa03e b072a83e 08000000 )\.=7..>.r.>.... │ │ - 0x00252cf0 b7ce0100 04562e3f f853a33e fed4783e .....V.?.S.>..x> │ │ + 0x00252cf0 b8ce0100 04562e3f f853a33e fed4783e .....V.?.S.>..x> │ │ 0x00252d00 e926313f e17a143e 39b4483d 52b89e3e .&1?.z.>9.H=R..> │ │ - 0x00252d10 c1caa13e 09000000 d9e20100 7d3f353f ...>........}?5? │ │ + 0x00252d10 c1caa13e 09000000 dae20100 7d3f353f ...>........}?5? │ │ 0x00252d20 0681953e 7b142e3e 31084c3f dd24063e ...>{..>1.L?.$.> │ │ 0x00252d30 7f6a3c3d 371aa03e b072a83e 0a000000 .j<=7..>.r.>.... │ │ - 0x00252d40 31d90100 0000803f 00000000 00000000 1......?........ │ │ + 0x00252d40 32d90100 0000803f 00000000 00000000 2......?........ │ │ 0x00252d50 0000803f 00000000 00000000 4ca6aa3e ...?........L..> │ │ - 0x00252d60 4ca6aa3e 0b000000 08c70100 7b142e3f L..>........{..? │ │ + 0x00252d60 4ca6aa3e 0b000000 09c70100 7b142e3f L..>........{..? │ │ 0x00252d70 0ad7a33e 14ae873e d7a3303f 9a99193e ...>...>..0?...> │ │ 0x00252d80 8fc2753d 9cc4a03e 46b6b33e 0c000000 ..u=...>F..>.... │ │ - 0x00252d90 e1ea0100 7b142e3f 0ad7a33e 14ae873e ....{..?...>...> │ │ + 0x00252d90 e2ea0100 7b142e3f 0ad7a33e 14ae873e ....{..?...>...> │ │ 0x00252da0 d7a3303f 9a99193e 8fc2753d 371aa03e ..0?...>..u=7..> │ │ - 0x00252db0 b072a83e 16000000 72d50100 ae47213f .r.>....r....G!? │ │ + 0x00252db0 b072a83e 16000000 73d50100 ae47213f .r.>....s....G!? │ │ 0x00252dc0 7b14ae3e 3d0a973e 48e11a3f 52b81e3e {..>=..>H..?R..> │ │ 0x00252dd0 2db29d3d 371aa03e b072a83e 01000000 -..=7..>.r.>.... │ │ - 0x00252de0 1bca0100 d0b3593e 98dd933d 04000000 ......Y>...=.... │ │ - 0x00252df0 becb0100 9a99993e ae47e13d 05000000 .......>.G.=.... │ │ - 0x00252e00 f8db0100 8716993e d578e93d 06000000 .......>.x.=.... │ │ + 0x00252de0 1cca0100 d0b3593e 98dd933d 04000000 ......Y>...=.... │ │ + 0x00252df0 bfcb0100 9a99993e ae47e13d 05000000 .......>.G.=.... │ │ + 0x00252e00 f9db0100 8716993e d578e93d 06000000 .......>.x.=.... │ │ 0x00252e10 b5c50100 8716993e d578e93d 07000000 .......>.x.=.... │ │ - 0x00252e20 09e70100 8716593e 0e2db23d 09000000 ......Y>.-.=.... │ │ - 0x00252e30 94cf0100 9d80863e 8fe4723d 242c2500 .......>..r=$,%. │ │ + 0x00252e20 0ae70100 8716593e 0e2db23d 09000000 ......Y>.-.=.... │ │ + 0x00252e30 95cf0100 9d80863e 8fe4723d 242c2500 .......>..r=$,%. │ │ 0x00252e40 242c2500 242c2500 4c2c2500 742c2500 $,%.$,%.L,%.t,%. │ │ 0x00252e50 9c2c2500 c42c2500 ec2c2500 142d2500 .,%..,%..,%..-%. │ │ 0x00252e60 3c2d2500 642d2500 8c2d2500 242c2500 <-%.d-%..-%.$,%. │ │ 0x00252e70 242c2500 242c2500 242c2500 242c2500 $,%.$,%.$,%.$,%. │ │ 0x00252e80 242c2500 242c2500 242c2500 242c2500 $,%.$,%.$,%.$,%. │ │ 0x00252e90 b42d2500 b7610900 0c000000 04000000 .-%..a.......... │ │ 0x00252ea0 0d7f0900 497e0900 ad5d0900 f1ed0100 ....I~...]......